lpc11xx.pp 19 KB

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  1. unit lpc11xx;
  2. {$goto on}
  3. {$define lpc11xx}
  4. interface
  5. {$PACKRECORDS 2}
  6. const
  7. //------------------------- Cortex-M0 Processor Exceptions Numbers -------------------------
  8. Reset_IRQn = -15; // 1 Reset Vector, invoked on Power up and warm reset
  9. NonMaskableInt_IRQn = -14; // 2 Non Maskable Interrupt
  10. HardFault_IRQn = -13; // 3 Cortex-M0 Hard Fault Interrupt
  11. SVCall_IRQn = -5; // 11 Cortex-M0 SV Call Interrupt
  12. PendSV_IRQn = -2; // 14 Cortex-M0 Pend SV Interrupt
  13. SysTick_IRQn = -1; // 15 Cortex-M0 System Tick Interrupt
  14. //------------------------- LPC11Cxx or LPC11xx Specific Interrupt Numbers -------------------------
  15. WAKEUP0_IRQn = 0; // All I/O pins can be used as wakeup source.
  16. WAKEUP1_IRQn = 1; // There are 13 pins in total for LPC11xx
  17. WAKEUP2_IRQn = 2;
  18. WAKEUP3_IRQn = 3;
  19. WAKEUP4_IRQn = 4;
  20. WAKEUP5_IRQn = 5;
  21. WAKEUP6_IRQn = 6;
  22. WAKEUP7_IRQn = 7;
  23. WAKEUP8_IRQn = 8;
  24. WAKEUP9_IRQn = 9;
  25. WAKEUP10_IRQn = 10;
  26. WAKEUP11_IRQn = 11;
  27. WAKEUP12_IRQn = 12;
  28. CAN_IRQn = 13; // CAN Interrupt
  29. SSP1_IRQn = 14; // SSP1 Interrupt
  30. I2C_IRQn = 15; // I2C Interrupt
  31. TIMER_16_0_IRQn = 16; // 16-bit Timer0 Interrupt
  32. TIMER_16_1_IRQn = 17; // 16-bit Timer1 Interrupt
  33. TIMER_32_0_IRQn = 18; // 32-bit Timer0 Interrupt
  34. TIMER_32_1_IRQn = 19; // 32-bit Timer1 Interrupt
  35. SSP0_IRQn = 20; // SSP0 Interrupt
  36. UART_IRQn = 21; // UART Interrupt
  37. ADC_IRQn = 24; // A/D Converter Interrupt
  38. WDT_IRQn = 25; // Watchdog timer Interrupt
  39. BOD_IRQn = 26; // Brown Out Detect(BOD) Interrupt
  40. FMC_IRQn = 27; // Flash Memory Controller Interrupt
  41. EINT3_IRQn = 28; // External Interrupt 3 Interrupt
  42. EINT2_IRQn = 29; // External Interrupt 2 Interrupt
  43. EIN1_IRQn = 30; // External Interrupt 1 Interrupt
  44. EINT0_IRQn = 31; // External Interrupt 0 Interrupt
  45. type
  46. { ------------- System Control (SYSCON) ------------- }
  47. TSYSCON_Registers = record
  48. SYSMEMREMAP : longword;
  49. PRESETCTRL : longword;
  50. SYSPLLCTRL : longword;
  51. SYSPLLSTAT : longword;
  52. RESERVED0 : array [0 .. 3] of longword;
  53. SYSOSCCTRL : longword;
  54. WDTOSCCTRL : longword;
  55. IRCCTRL : longword;
  56. RESERVED1 : longword;
  57. SYSRSTSTAT : longword;
  58. RESERVED2 : array [0 .. 2] of longword;
  59. SYSPLLCLKSEL : longword;
  60. SYSPLLCLKUEN : longword;
  61. RESERVED3 : array [0 .. 9] of longword;
  62. MAINCLKSEL : longword;
  63. MAINCLKUEN : longword;
  64. SYSAHBCLKDIV : longword;
  65. RESERVED4 : longword;
  66. SYSAHBCLKCTRL: longword;
  67. RESERVED5 : array [0 .. 3] of longword;
  68. SSP0CLKDIV : longword;
  69. UARTCLKDIV : longword;
  70. SSP1CLKDIV : longword;
  71. RESERVED6 : array [0 .. 11] of longword;
  72. WDTCLKSEL : longword;
  73. WDTCLKUEN : longword;
  74. WDTCLKDIV : longword;
  75. RESERVED8 : longword;
  76. CLKOUTCLKSEL : longword;
  77. CLKOUTUEN : longword;
  78. CLKOUTDIV : longword;
  79. RESERVED9 : array [0 .. 4] of longword;
  80. PIOPORCAP0 : longword;
  81. PIOPORCAP1 : longword;
  82. RESERVED10 : array [0 .. 17] of longword;
  83. BODCTRL : longword;
  84. SYSTCKCAL : longword;
  85. RESERVED13 : array [0 .. 6] of longword;
  86. NMISRC : longword;
  87. RESERVED14 : array [0 .. 33] of longword;
  88. STARTAPRP0 : longword;
  89. STARTERP0 : longword;
  90. STARTRSRP0CLR: longword;
  91. STARTSRP0 : longword;
  92. STARTAPRP1 : longword;
  93. STARTERP1 : longword;
  94. STARTRSRP1CLR: longword;
  95. STARTSRP1 : longword;
  96. RESERVED17 : array [0 .. 3] of longword;
  97. PDSLEEPCFG : longword;
  98. PDAWAKECFG : longword;
  99. PDRUNCFG : longword;
  100. RESERVED15 : array [0 .. 109] of longword;
  101. DEVICE_ID : longword;
  102. end;
  103. { ------------- Pin Connect Block (IOCON) ------------- }
  104. TIOCON_Registers = record
  105. PIO2_6 : longword;
  106. RESERVED0 : longword;
  107. PIO2_0 : longword;
  108. RESET_PIO0_0 : longword;
  109. PIO0_1 : longword;
  110. PIO1_8 : longword;
  111. RESERVED1 : longword;
  112. PIO0_2 : longword;
  113. PIO2_7 : longword;
  114. PIO2_8 : longword;
  115. PIO2_1 : longword;
  116. PIO0_3 : longword;
  117. PIO0_4 : longword;
  118. PIO0_5 : longword;
  119. PIO1_9 : longword;
  120. PIO3_4 : longword;
  121. PIO2_4 : longword;
  122. PIO2_5 : longword;
  123. PIO3_5 : longword;
  124. PIO0_6 : longword;
  125. PIO0_7 : longword;
  126. PIO2_9 : longword;
  127. PIO2_10 : longword;
  128. PIO2_2 : longword;
  129. PIO0_8 : longword;
  130. PIO0_9 : longword;
  131. SWCLK_PIO0_10: longword;
  132. PIO1_10 : longword;
  133. PIO2_11 : longword;
  134. R_PIO0_11 : longword;
  135. R_PIO1_0 : longword;
  136. R_PIO1_1 : longword;
  137. R_PIO1_2 : longword;
  138. PIO3_0 : longword;
  139. PIO3_1 : longword;
  140. PIO2_3 : longword;
  141. SWDIO_PIO1_3 : longword;
  142. PIO1_4 : longword;
  143. PIO1_11 : longword;
  144. PIO3_2 : longword;
  145. PIO1_5 : longword;
  146. PIO1_6 : longword;
  147. PIO1_7 : longword;
  148. PIO3_3 : longword;
  149. SCK_LOC : longword;
  150. DSR_LOC : longword;
  151. DCD_LOC : longword;
  152. RI_LOC : longword;
  153. end;
  154. { ------------- Power Management Unit (PMU) ------------- }
  155. TPMU_Registers = record
  156. PCON : longword;
  157. GPREG0: longword;
  158. GPREG1: longword;
  159. GPREG2: longword;
  160. GPREG3: longword;
  161. GPREG4: longword;
  162. end;
  163. { ------------- Flash Controller (FLASHCTRL) ------------- }
  164. TFLASHCTRL_Registers = record
  165. RESERVED0: array [0 .. 3] of longword;
  166. FLASHCFG : longword;
  167. RESERVED1: array [0 .. 2] of longword;
  168. FMSSTART : longword;
  169. FMSSTOP : longword;
  170. RESERVED2: longword;
  171. FMSW0 : longword;
  172. FMSW1 : longword;
  173. FMSW2 : longword;
  174. FMSW3 : longword;
  175. RESERVED3: array [0 .. 1000] of longword;
  176. FMSTAT : longword;
  177. RESERVED4: longword;
  178. FMSTATCLR: longword;
  179. end;
  180. { ------------- General Purpose Input/Output (GPIO) ------------- }
  181. TGPIO_Registers = record
  182. MASKED_ACCESS: array [0 .. 4095] of longword;
  183. RESERVED1 : array [0 .. 4095] of longword;
  184. DIR : longword;
  185. IS : longword;
  186. IBE : longword;
  187. IEV : longword;
  188. IE : longword;
  189. RIS : longword;
  190. MIS : longword;
  191. IC : longword;
  192. end;
  193. { ------------- Timer (TMR) ------------- }
  194. TTMR_Registers = record
  195. IR : longword;
  196. TCR : longword;
  197. TC : longword;
  198. PR : longword;
  199. PC : longword;
  200. MCR : longword;
  201. MR0 : longword;
  202. MR1 : longword;
  203. MR2 : longword;
  204. MR3 : longword;
  205. CCR : longword;
  206. CR0 : longword;
  207. CR1 : longword;
  208. RESERVED1: array [0 .. 1] of longword;
  209. EMR : longword;
  210. RESERVED2: array [0 .. 11] of longword;
  211. CTCR : longword;
  212. PWMC : longword;
  213. end;
  214. { ------------- Universal Asynchronous Receiver Transmitter (UART) ------------- }
  215. TUART_Registers = record
  216. RBR_THR_DLL: longword;
  217. DLM_IER : longword;
  218. IIR_FCR : longword;
  219. LCR : longword;
  220. MCR : longword;
  221. LSR : longword;
  222. MSR : longword;
  223. SCR : longword;
  224. ACR : longword;
  225. RESERVED0 : longword;
  226. FDR : longword;
  227. RESERVED1 : longword;
  228. TER : longword;
  229. RESERVED2 : array [0 .. 5] of longword;
  230. RS485CTRL : longword;
  231. ADRMATCH : longword;
  232. RS485DLY : longword;
  233. FIFOLVL : longword;
  234. end;
  235. { ------------- Synchronous Serial Communication (SSP) ------------- }
  236. TSSP_Registers = record
  237. CR0 : longword;
  238. CR1 : longword;
  239. DR : longword;
  240. SR : longword;
  241. CPSR: longword;
  242. IMSC: longword;
  243. RIS : longword;
  244. MIS : longword;
  245. ICR : longword;
  246. end;
  247. { ------------- Inter-Integrated Circuit (I2C) ------------- }
  248. TI2C_Registers = record
  249. CONSET : longword;
  250. STAT : longword;
  251. DAT : longword;
  252. ADR0 : longword;
  253. SCLH : longword;
  254. SCLL : longword;
  255. CONCLR : longword;
  256. MMCTRL : longword;
  257. ADR1 : longword;
  258. ADR2 : longword;
  259. ADR3 : longword;
  260. DATA_BUFFER: longword;
  261. MASK0 : longword;
  262. MASK1 : longword;
  263. MASK2 : longword;
  264. MASK3 : longword;
  265. end;
  266. { ------------- Watchdog Timer (WDT) ------------- }
  267. TWDT_Registers = record
  268. _MOD : longword;
  269. TC : longword;
  270. FEED : longword;
  271. TV : longword;
  272. RESERVED0: longword;
  273. WARNINT : longword;
  274. WINDOW : longword;
  275. end;
  276. { ------------- Analog-to-Digital Converter (ADC) ------------- }
  277. TADC_Registers = record
  278. CR : longword;
  279. GDR : longword;
  280. RESERVED0: longword;
  281. INTEN : longword;
  282. DR : array [0 .. 7] of longword;
  283. STAT : longword;
  284. end;
  285. { ------------- CAN Controller (CAN) ------------- }
  286. TCAN_Registers = record
  287. CNTL : longword;
  288. STAT : longword;
  289. EC : longword;
  290. BT : longword;
  291. INT : longword;
  292. TEST : longword;
  293. BRPE : longword;
  294. RESERVED0 : longword;
  295. IF1_CMDREQ: longword;
  296. IF1_CMDMSK: longword;
  297. IF1_MSK1 : longword;
  298. IF1_MSK2 : longword;
  299. IF1_ARB1 : longword;
  300. IF1_ARB2 : longword;
  301. IF1_MCTRL : longword;
  302. IF1_DA1 : longword;
  303. IF1_DA2 : longword;
  304. IF1_DB1 : longword;
  305. IF1_DB2 : longword;
  306. RESERVED1 : array [0 .. 12] of longword;
  307. IF2_CMDREQ: longword;
  308. IF2_CMDMSK: longword;
  309. IF2_MSK1 : longword;
  310. IF2_MSK2 : longword;
  311. IF2_ARB1 : longword;
  312. IF2_ARB2 : longword;
  313. IF2_MCTRL : longword;
  314. IF2_DA1 : longword;
  315. IF2_DA2 : longword;
  316. IF2_DB1 : longword;
  317. IF2_DB2 : longword;
  318. RESERVED2 : array [0 .. 20] of longword;
  319. TXREQ1 : longword;
  320. TXREQ2 : longword;
  321. RESERVED3 : array [0 .. 5] of longword;
  322. ND1 : longword;
  323. ND2 : longword;
  324. RESERVED4 : array [0 .. 5] of longword;
  325. IR1 : longword;
  326. IR2 : longword;
  327. RESERVED5 : array [0 .. 5] of longword;
  328. MSGV1 : longword;
  329. MSGV2 : longword;
  330. RESERVED6 : array [0 .. 5] of longword;
  331. CLKDIV : longword;
  332. end;
  333. // ****************************************************************************
  334. // Peripheral memory map
  335. // ****************************************************************************
  336. const
  337. { Base addresses }
  338. LPC_FLASH_BASE = ($00000000);
  339. LPC_RAM_BASE = ($10000000);
  340. LPC_APB0_BASE = ($40000000);
  341. LPC_AHB_BASE = ($50000000);
  342. /// APB peripherals
  343. LPC_I2C_BASE = (LPC_APB0_BASE + $00000);
  344. LPC_WDT_BASE = (LPC_APB0_BASE + $04000);
  345. LPC_UART_BASE = (LPC_APB0_BASE + $08000);
  346. LPC_CT16B0_BASE = (LPC_APB0_BASE + $0C000);
  347. LPC_CT16B1_BASE = (LPC_APB0_BASE + $10000);
  348. LPC_CT32B0_BASE = (LPC_APB0_BASE + $14000);
  349. LPC_CT32B1_BASE = (LPC_APB0_BASE + $18000);
  350. LPC_ADC_BASE = (LPC_APB0_BASE + $1C000);
  351. LPC_PMU_BASE = (LPC_APB0_BASE + $38000);
  352. LPC_FLASHCTRL_BASE = (LPC_APB0_BASE + $3C000);
  353. LPC_SSP0_BASE = (LPC_APB0_BASE + $40000);
  354. LPC_IOCON_BASE = (LPC_APB0_BASE + $44000);
  355. LPC_SYSCON_BASE = (LPC_APB0_BASE + $48000);
  356. LPC_CAN_BASE = (LPC_APB0_BASE + $50000);
  357. LPC_SSP1_BASE = (LPC_APB0_BASE + $58000);
  358. // AHB peripherals
  359. LPC_GPIO0_BASE = (LPC_AHB_BASE + $00000);
  360. LPC_GPIO1_BASE = (LPC_AHB_BASE + $10000);
  361. LPC_GPIO2_BASE = (LPC_AHB_BASE + $20000);
  362. LPC_GPIO3_BASE = (LPC_AHB_BASE + $30000);
  363. // ****************************************************************************
  364. // Peripheral declaration
  365. // ****************************************************************************
  366. {$ALIGN 2}
  367. var
  368. LPC_I2C : TI2C_Registers absolute(LPC_I2C_BASE);
  369. LPC_WDT : TWDT_Registers absolute(LPC_WDT_BASE);
  370. LPC_UART : TUART_Registers absolute(LPC_UART_BASE);
  371. LPC_TMR16B0 : TTMR_Registers absolute(LPC_CT16B0_BASE);
  372. LPC_TMR16B1 : TTMR_Registers absolute(LPC_CT16B1_BASE);
  373. LPC_TMR32B0 : TTMR_Registers absolute(LPC_CT32B0_BASE);
  374. LPC_TMR32B1 : TTMR_Registers absolute(LPC_CT32B1_BASE);
  375. LPC_ADC : TADC_Registers absolute(LPC_ADC_BASE);
  376. LPC_PMU : TPMU_Registers absolute(LPC_PMU_BASE);
  377. LPC_FLASHCTRL: TPMU_Registers absolute(LPC_PMU_BASE);
  378. LPC_SSP0 : TSSP_Registers absolute(LPC_SSP0_BASE);
  379. LPC_SSP1 : TSSP_Registers absolute(LPC_SSP1_BASE);
  380. LPC_CAN : TCAN_Registers absolute(LPC_CAN_BASE);
  381. LPC_IOCON : TIOCON_Registers absolute(LPC_IOCON_BASE);
  382. LPC_SYSCON : TSYSCON_Registers absolute(LPC_SYSCON_BASE);
  383. LPC_GPIO0 : TGPIO_Registers absolute(LPC_GPIO0_BASE);
  384. LPC_GPIO1 : TGPIO_Registers absolute(LPC_GPIO1_BASE);
  385. LPC_GPIO2 : TGPIO_Registers absolute(LPC_GPIO2_BASE);
  386. LPC_GPIO3 : TGPIO_Registers absolute(LPC_GPIO3_BASE);
  387. implementation
  388. procedure NonMaskableInt_interrupt; external name 'NonMaskableInt_interrupt';
  389. procedure Hardfault_interrupt; external name 'Hardfault_interrupt';
  390. procedure Startup_Checksum; external name 'Startup_Checksum';
  391. procedure SVCall_interrupt; external name 'SVCall_interrupt';
  392. procedure PendSV_interrupt; external name 'PendSV_interrupt';
  393. procedure SysTick_interrupt; external name 'SysTick_interrupt';
  394. procedure WAKEUP0_Interrupt; external name 'WAKEUP0_Interrupt';
  395. procedure WAKEUP1_Interrupt; external name 'WAKEUP1_Interrupt';
  396. procedure WAKEUP2_Interrupt; external name 'WAKEUP2_Interrupt';
  397. procedure WAKEUP3_Interrupt; external name 'WAKEUP3_Interrupt';
  398. procedure WAKEUP4_Interrupt; external name 'WAKEUP4_Interrupt';
  399. procedure WAKEUP5_Interrupt; external name 'WAKEUP5_Interrupt';
  400. procedure WAKEUP6_Interrupt; external name 'WAKEUP6_Interrupt';
  401. procedure WAKEUP7_Interrupt; external name 'WAKEUP7_Interrupt';
  402. procedure WAKEUP8_Interrupt; external name 'WAKEUP8_Interrupt';
  403. procedure WAKEUP9_Interrupt; external name 'WAKEUP9_Interrupt';
  404. procedure WAKEUP10_Interrupt; external name 'WAKEUP10_Interrupt';
  405. procedure WAKEUP11_Interrupt; external name 'WAKEUP11_Interrupt';
  406. procedure WAKEUP12_Interrupt; external name 'WAKEUP12_Interrupt';
  407. procedure CAN_Interrupt; external name 'CAN_Interrupt';
  408. procedure SSP1_Interrupt; external name 'SSP1_Interrupt';
  409. procedure I2C_Interrupt; external name 'I2C_Interrupt';
  410. procedure TIMER16_0_Interrupt; external name 'TIMER16_0_Interrupt';
  411. procedure TIMER16_1_Interrupt; external name 'TIMER16_1_Interrupt';
  412. procedure TIMER32_0_Interrupt; external name 'TIMER32_0_Interrupt';
  413. procedure TIMER32_1_Interrupt; external name 'TIMER32_1_Interrupt';
  414. procedure SSP0_Interrupt; external name 'SSP0_Interrupt';
  415. procedure UART_Interrupt; external name 'UART_Interrupt';
  416. procedure ADC_Interrupt; external name 'ADC_Interrupt';
  417. procedure WDT_Interrupt; external name 'WDT_Interrupt';
  418. procedure BOD_Interrupt; external name 'BOD_Interrupt';
  419. procedure FMC_Interrupt; external name 'FMC_Interrupt';
  420. procedure EINT3_Interrupt; external name 'EINT3_Interrupt';
  421. procedure EINT2_Interrupt; external name 'EINT2_Interrupt';
  422. procedure EINT1_Interrupt; external name 'EINT1_Interrupt';
  423. procedure EINT0_Interrupt; external name 'EINT0_Interrupt';
  424. {$I cortexm0_start.inc}
  425. procedure Vectors; assembler;
  426. nostackframe;
  427. label interrupt_vectors;
  428. asm
  429. .section ".init.interrupt_vectors"
  430. interrupt_vectors:
  431. .long _stack_top // stack top address
  432. .long Startup
  433. .long NonMaskableInt_interrupt
  434. .long Hardfault_interrupt
  435. .long 0
  436. .long 0
  437. .long 0
  438. .long Startup_Checksum
  439. .long 0
  440. .long 0
  441. .long 0
  442. .long SVCall_interrupt
  443. .long 0
  444. .long 0
  445. .long PendSV_interrupt
  446. .long SysTick_interrupt
  447. .long WAKEUP0_Interrupt
  448. .long WAKEUP1_Interrupt
  449. .long WAKEUP2_Interrupt
  450. .long WAKEUP3_Interrupt
  451. .long WAKEUP4_Interrupt
  452. .long WAKEUP5_Interrupt
  453. .long WAKEUP6_Interrupt
  454. .long WAKEUP7_Interrupt
  455. .long WAKEUP8_Interrupt
  456. .long WAKEUP9_Interrupt
  457. .long WAKEUP10_Interrupt
  458. .long WAKEUP11_Interrupt
  459. .long WAKEUP12_Interrupt
  460. .long CAN_Interrupt
  461. .long SSP1_Interrupt
  462. .long I2C_Interrupt
  463. .long TIMER16_0_Interrupt
  464. .long TIMER16_1_Interrupt
  465. .long TIMER32_0_Interrupt
  466. .long TIMER32_1_Interrupt
  467. .long SSP0_Interrupt
  468. .long UART_Interrupt
  469. .long 0
  470. .long 0
  471. .long ADC_Interrupt
  472. .long WDT_Interrupt
  473. .long BOD_Interrupt
  474. .long FMC_Interrupt
  475. .long EINT3_Interrupt
  476. .long EINT2_Interrupt
  477. .long EINT1_Interrupt
  478. .long EINT0_Interrupt
  479. .weak NonMaskableInt_interrupt
  480. .weak Hardfault_interrupt
  481. .weak Startup_Checksum
  482. .weak SVCall_interrupt
  483. .weak PendSV_interrupt
  484. .weak SysTick_interrupt
  485. .weak WAKEUP0_Interrupt
  486. .weak WAKEUP1_Interrupt
  487. .weak WAKEUP2_Interrupt
  488. .weak WAKEUP3_Interrupt
  489. .weak WAKEUP4_Interrupt
  490. .weak WAKEUP5_Interrupt
  491. .weak WAKEUP6_Interrupt
  492. .weak WAKEUP7_Interrupt
  493. .weak WAKEUP8_Interrupt
  494. .weak WAKEUP9_Interrupt
  495. .weak WAKEUP10_Interrupt
  496. .weak WAKEUP11_Interrupt
  497. .weak WAKEUP12_Interrupt
  498. .weak CAN_Interrupt
  499. .weak SSP1_Interrupt
  500. .weak I2C_Interrupt
  501. .weak TIMER16_0_Interrupt
  502. .weak TIMER16_1_Interrupt
  503. .weak TIMER32_0_Interrupt
  504. .weak TIMER32_1_Interrupt
  505. .weak SSP0_Interrupt
  506. .weak UART_Interrupt
  507. .weak ADC_Interrupt
  508. .weak WDT_Interrupt
  509. .weak BOD_Interrupt
  510. .weak FMC_Interrupt
  511. .weak EINT3_Interrupt
  512. .weak EINT2_Interrupt
  513. .weak EINT1_Interrupt
  514. .weak EINT0_Interrupt
  515. .set NonMaskableInt_interrupt, Startup
  516. .set Hardfault_interrupt , Startup
  517. .set SVCall_interrupt , Startup
  518. .set PendSV_interrupt , Startup
  519. .set SysTick_interrupt , Startup
  520. .set WAKEUP0_Interrupt , Startup
  521. .set WAKEUP1_Interrupt , Startup
  522. .set WAKEUP2_Interrupt , Startup
  523. .set WAKEUP3_Interrupt , Startup
  524. .set WAKEUP4_Interrupt , Startup
  525. .set WAKEUP5_Interrupt , Startup
  526. .set WAKEUP6_Interrupt , Startup
  527. .set WAKEUP7_Interrupt , Startup
  528. .set WAKEUP8_Interrupt , Startup
  529. .set WAKEUP9_Interrupt , Startup
  530. .set WAKEUP10_Interrupt , Startup
  531. .set WAKEUP11_Interrupt , Startup
  532. .set WAKEUP12_Interrupt , Startup
  533. .set CAN_Interrupt , Startup
  534. .set SSP1_Interrupt , Startup
  535. .set I2C_Interrupt , Startup
  536. .set TIMER16_0_Interrupt, Startup
  537. .set TIMER16_1_Interrupt, Startup
  538. .set TIMER32_0_Interrupt, Startup
  539. .set TIMER32_1_Interrupt, Startup
  540. .set SSP0_Interrupt , Startup
  541. .set UART_Interrupt , Startup
  542. .set ADC_Interrupt , Startup
  543. .set WDT_Interrupt , Startup
  544. .set BOD_Interrupt , Startup
  545. .set FMC_Interrupt , Startup
  546. .set EINT3_Interrupt , Startup
  547. .set EINT2_Interrupt , Startup
  548. .set EINT1_Interrupt , Startup
  549. .set EINT0_Interrupt , Startup
  550. .text
  551. end;
  552. end.