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cpuinfo.pas 2.8 KB

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  1. {
  2. Copyright (c) 1998-2006 by Florian Klaempfl
  3. Basic Processor information
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. Unit cpuinfo;
  18. {$i fpcdefs.inc}
  19. Interface
  20. uses
  21. globtype;
  22. Type
  23. bestreal = extended;
  24. {$if FPC_FULLVERSION>20700}
  25. bestrealrec = TExtended80Rec;
  26. {$endif FPC_FULLVERSION>20700}
  27. ts32real = single;
  28. ts64real = double;
  29. ts80real = extended;
  30. ts128real = type extended;
  31. ts64comp = type extended;
  32. pbestreal=^bestreal;
  33. { possible supported processors for this target }
  34. tcputype =
  35. (cpu_none,
  36. cpu_itanium
  37. );
  38. tfputype =
  39. (fpu_none,
  40. fpu_itanium
  41. );
  42. tcontrollertype =
  43. (ct_none
  44. );
  45. Const
  46. { Is there support for dealing with multiple microcontrollers available }
  47. { for this platform? }
  48. ControllerSupport = false;
  49. { We know that there are fields after sramsize
  50. but we don't care about this warning }
  51. {$PUSH}
  52. {$WARN 3177 OFF}
  53. embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
  54. (
  55. (controllertypestr:''; controllerunitstr:''; flashbase:0; flashsize:0; srambase:0; sramsize:0));
  56. {$POP}
  57. { calling conventions supported by the code generator }
  58. supported_calling_conventions : tproccalloptions = [
  59. pocall_internproc,
  60. pocall_stdcall,
  61. pocall_cdecl,
  62. pocall_cppdecl
  63. ];
  64. cputypestr : array[tcputype] of string[10] = ('',
  65. 'ITANIUM'
  66. );
  67. fputypestr : array[tfputype] of string[6] = ('',
  68. 'ITANIUM'
  69. );
  70. { Supported optimizations, only used for information }
  71. supported_optimizerswitches = [cs_opt_peephole,cs_opt_regvar,cs_opt_stackframe,
  72. cs_opt_asmcse,cs_opt_loopunroll,cs_opt_uncertain,
  73. cs_opt_nodecse];
  74. level1optimizerswitches = [cs_opt_level1,cs_opt_peephole];
  75. level2optimizerswitches = level1optimizerswitches +
  76. [cs_opt_level2,cs_opt_regvar,cs_opt_stackframe,cs_opt_asmcse,cs_opt_nodecse];
  77. level3optimizerswitches = level2optimizerswitches + [cs_opt_level3{,cs_opt_loopunroll}];
  78. level4optimizerswitches = genericlevel4optimizerswitches + level3optimizerswitches + [];
  79. Implementation
  80. end.