ncgmem.pas 49 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134
  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cgutils,cpuinfo,cpubase,
  23. symtype,
  24. node,nmem;
  25. type
  26. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  27. procedure pass_generate_code;override;
  28. end;
  29. tcgloadparentfpnode = class(tloadparentfpnode)
  30. procedure pass_generate_code;override;
  31. end;
  32. tcgaddrnode = class(taddrnode)
  33. procedure pass_generate_code;override;
  34. end;
  35. tcgderefnode = class(tderefnode)
  36. procedure pass_generate_code;override;
  37. end;
  38. tcgsubscriptnode = class(tsubscriptnode)
  39. procedure pass_generate_code;override;
  40. end;
  41. tcgwithnode = class(twithnode)
  42. procedure pass_generate_code;override;
  43. end;
  44. tcgvecnode = class(tvecnode)
  45. function get_mul_size : aint;
  46. private
  47. procedure rangecheck_array;
  48. procedure rangecheck_string;
  49. protected
  50. {# This routine is used to calculate the address of the reference.
  51. On entry reg contains the index in the array,
  52. and l contains the size of each element in the array.
  53. This routine should update location.reference correctly,
  54. so it points to the correct address.
  55. }
  56. procedure update_reference_reg_mul(maybe_const_reg: tregister;regsize: tdef; l: aint);virtual;
  57. procedure update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l: aint);virtual;
  58. procedure update_reference_offset(var ref: treference; index, mulsize: aint); virtual;
  59. procedure second_wideansistring;virtual;
  60. procedure second_dynamicarray;virtual;
  61. function valid_index_size(size: tcgsize): boolean;virtual;
  62. public
  63. procedure pass_generate_code;override;
  64. end;
  65. implementation
  66. uses
  67. systems,
  68. cutils,cclasses,verbose,globals,constexp,
  69. symconst,symbase,symdef,symsym,symcpu,symtable,defutil,paramgr,
  70. aasmbase,aasmtai,aasmdata,
  71. procinfo,pass_2,parabase,
  72. pass_1,nld,ncon,nadd,ncnv,nutils,
  73. cgobj,hlcgobj,
  74. tgobj,ncgutil,objcgutl,
  75. defcmp
  76. ;
  77. {*****************************************************************************
  78. TCGLOADVMTADDRNODE
  79. *****************************************************************************}
  80. procedure tcgloadvmtaddrnode.pass_generate_code;
  81. var
  82. href : treference;
  83. pool : THashSet;
  84. entry : PHashSetItem;
  85. begin
  86. location_reset(location,LOC_REGISTER,def_cgsize(voidpointertype));
  87. if (left.nodetype=typen) then
  88. begin
  89. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,voidpointertype);
  90. if not is_objcclass(left.resultdef) then
  91. begin
  92. reference_reset_symbol(href,
  93. current_asmdata.RefAsmSymbol(tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname,AT_DATA),0,
  94. voidpointertype.size);
  95. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,href,location.register);
  96. end
  97. else
  98. begin
  99. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  100. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  101. if (target_info.system in systems_objc_nfabi) then
  102. begin
  103. { find/add necessary classref/classname pool entries }
  104. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  105. end
  106. else
  107. begin
  108. { find/add necessary classref/classname pool entries }
  109. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  110. end;
  111. reference_reset_symbol(href,tasmlabel(entry^.Data),0,voidpointertype.size);
  112. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,href,location.register);
  113. end;
  114. end
  115. else
  116. begin
  117. { left contains self, load vmt from self }
  118. secondpass(left);
  119. gen_load_vmt_register(current_asmdata.CurrAsmList,tobjectdef(left.resultdef),left.location,location.register);
  120. end;
  121. end;
  122. {*****************************************************************************
  123. TCGLOADPARENTFPNODE
  124. *****************************************************************************}
  125. procedure tcgloadparentfpnode.pass_generate_code;
  126. var
  127. currpi : tprocinfo;
  128. hsym : tparavarsym;
  129. href : treference;
  130. begin
  131. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  132. begin
  133. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  134. location.register:=current_procinfo.framepointer;
  135. end
  136. else
  137. begin
  138. currpi:=current_procinfo;
  139. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  140. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,parentfpvoidpointertype);
  141. { load framepointer of current proc }
  142. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  143. if not assigned(hsym) then
  144. internalerror(200309281);
  145. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,hsym.localloc,location.register);
  146. { walk parents }
  147. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  148. begin
  149. currpi:=currpi.parent;
  150. if not assigned(currpi) then
  151. internalerror(200311201);
  152. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  153. if not assigned(hsym) then
  154. internalerror(200309282);
  155. if hsym.localloc.loc<>LOC_REFERENCE then
  156. internalerror(200309283);
  157. hlcg.reference_reset_base(href,parentfpvoidpointertype,location.register,hsym.localloc.reference.offset,sizeof(pint));
  158. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,href,location.register);
  159. end;
  160. end;
  161. end;
  162. {*****************************************************************************
  163. TCGADDRNODE
  164. *****************************************************************************}
  165. procedure tcgaddrnode.pass_generate_code;
  166. begin
  167. secondpass(left);
  168. location_reset(location,LOC_REGISTER,int_cgsize(resultdef.size));
  169. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,resultdef);
  170. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  171. { on x86_64-win64, array of chars can be returned in registers, however,
  172. when passing these arrays to other functions, the compiler wants to take
  173. the address of the array so when the addrnode has been created internally,
  174. we have to force the data into memory, see also tw14388.pp
  175. }
  176. if nf_internal in flags then
  177. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
  178. else
  179. internalerror(2006111510);
  180. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.resultdef,resultdef,left.location.reference,location.register);
  181. end;
  182. {*****************************************************************************
  183. TCGDEREFNODE
  184. *****************************************************************************}
  185. procedure tcgderefnode.pass_generate_code;
  186. var
  187. paraloc1 : tcgpara;
  188. pd : tprocdef;
  189. sym : tsym;
  190. st : tsymtable;
  191. hp : pnode;
  192. hp2 : tnode;
  193. extraoffset : tcgint;
  194. begin
  195. sym:=nil;
  196. { assume natural alignment, except for packed records }
  197. if not(resultdef.typ in [recorddef,objectdef]) or
  198. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  199. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment)
  200. else
  201. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1);
  202. { can we fold an add/sub node into the offset of the deref node? }
  203. extraoffset:=0;
  204. hp:=actualtargetnode(@left);
  205. if (hp^.nodetype=subn) and is_constintnode(taddnode(hp^).right) then
  206. begin
  207. extraoffset:=-tcgint(tordconstnode(taddnode(hp^).right).value);
  208. replacenode(hp^,taddnode(hp^).left);
  209. end
  210. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).right) then
  211. begin
  212. extraoffset:=tcgint(tordconstnode(taddnode(hp^).right).value);
  213. replacenode(hp^,taddnode(hp^).left);
  214. end
  215. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).left) then
  216. begin
  217. extraoffset:=tcgint(tordconstnode(taddnode(hp^).left).value);
  218. replacenode(hp^,taddnode(hp^).right);
  219. end;
  220. secondpass(left);
  221. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  222. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  223. case left.location.loc of
  224. LOC_CREGISTER,
  225. LOC_REGISTER:
  226. begin
  227. hlcg.maybe_change_load_node_reg(current_asmdata.CurrAsmList,left,true);
  228. {$ifdef cpu_uses_separate_address_registers}
  229. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  230. begin
  231. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  232. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  233. location.reference.base);
  234. end
  235. else
  236. {$endif}
  237. location.reference.base := left.location.register;
  238. end;
  239. LOC_CREFERENCE,
  240. LOC_REFERENCE:
  241. begin
  242. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  243. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  244. end;
  245. LOC_CONSTANT:
  246. begin
  247. location.reference.offset:=left.location.value;
  248. end;
  249. else
  250. internalerror(200507031);
  251. end;
  252. location.reference.offset:=location.reference.offset+extraoffset;
  253. if (cs_use_heaptrc in current_settings.globalswitches) and
  254. (cs_checkpointer in current_settings.localswitches) and
  255. not(cs_compilesystem in current_settings.moduleswitches) and
  256. {$ifdef x86}
  257. (tcpupointerdef(left.resultdef).x86pointertyp = tcpupointerdefclass(cpointerdef).default_x86_data_pointer_type) and
  258. {$endif x86}
  259. not(nf_no_checkpointer in flags) and
  260. { can be NR_NO in case of LOC_CONSTANT }
  261. (location.reference.base<>NR_NO) then
  262. begin
  263. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  264. (sym.typ<>procsym) then
  265. internalerror(2012010601);
  266. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  267. paraloc1.init;
  268. paramanager.getintparaloc(pd,1,paraloc1);
  269. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  270. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  271. paraloc1.done;
  272. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  273. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',nil,false);
  274. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  275. end;
  276. end;
  277. {*****************************************************************************
  278. TCGSUBSCRIPTNODE
  279. *****************************************************************************}
  280. procedure tcgsubscriptnode.pass_generate_code;
  281. var
  282. asmsym: tasmsymbol;
  283. paraloc1 : tcgpara;
  284. tmpref: treference;
  285. sref: tsubsetreference;
  286. offsetcorrection : aint;
  287. pd : tprocdef;
  288. sym : tsym;
  289. st : tsymtable;
  290. begin
  291. sym:=nil;
  292. secondpass(left);
  293. if codegenerror then
  294. exit;
  295. paraloc1.init;
  296. { several object types must be dereferenced implicitly }
  297. if is_implicit_pointer_object_type(left.resultdef) then
  298. begin
  299. if (not is_managed_type(left.resultdef)) or
  300. (target_info.system in systems_garbage_collected_managed_types) then
  301. begin
  302. { the contents of a class are aligned to a sizeof(pointer) }
  303. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),voidpointertype.size);
  304. case left.location.loc of
  305. LOC_CREGISTER,
  306. LOC_REGISTER:
  307. begin
  308. {$ifdef cpu_uses_separate_address_registers}
  309. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  310. begin
  311. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  312. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  313. left.location.register,location.reference.base);
  314. end
  315. else
  316. {$endif}
  317. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  318. end;
  319. LOC_CREFERENCE,
  320. LOC_REFERENCE,
  321. { tricky type casting of parameters can cause these locations, see tb0592.pp on x86_64-linux }
  322. LOC_SUBSETREG,
  323. LOC_CSUBSETREG,
  324. LOC_SUBSETREF,
  325. LOC_CSUBSETREF:
  326. begin
  327. hlcg.reference_reset_base(location.reference,left.resultdef,
  328. hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  329. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  330. end;
  331. LOC_CONSTANT:
  332. begin
  333. { can happen with @classtype(pointerconst).field }
  334. location.reference.offset:=left.location.value;
  335. end;
  336. else
  337. internalerror(2009092401);
  338. end;
  339. { implicit deferencing }
  340. if (cs_use_heaptrc in current_settings.globalswitches) and
  341. (cs_checkpointer in current_settings.localswitches) and
  342. not(cs_compilesystem in current_settings.moduleswitches) then
  343. begin
  344. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  345. (sym.typ<>procsym) then
  346. internalerror(2012010602);
  347. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  348. paramanager.getintparaloc(pd,1,paraloc1);
  349. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  350. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  351. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  352. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',nil,false);
  353. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  354. end;
  355. end
  356. else
  357. { reference-counted implicit pointer object types don't have
  358. fields -> cannot be subscripted (calls are handled via call
  359. nodes) }
  360. internalerror(2011011901);
  361. end
  362. else
  363. begin
  364. location_copy(location,left.location);
  365. { some abi's require that functions return (some) records in }
  366. { registers }
  367. case location.loc of
  368. LOC_REFERENCE,
  369. LOC_CREFERENCE:
  370. ;
  371. LOC_CONSTANT,
  372. LOC_REGISTER,
  373. LOC_CREGISTER,
  374. { if a floating point value is casted into a record, it
  375. can happen that we get here an fpu or mm register }
  376. LOC_MMREGISTER,
  377. LOC_FPUREGISTER,
  378. LOC_CMMREGISTER,
  379. LOC_CFPUREGISTER:
  380. begin
  381. { in case the result is not something that can be put
  382. into an integer register (e.g.
  383. function_returning_record().non_regable_field, or
  384. a function returning a value > sizeof(intreg))
  385. -> force to memory
  386. }
  387. if not tstoreddef(left.resultdef).is_intregable or
  388. not tstoreddef(resultdef).is_intregable or
  389. { if the field spans multiple registers, we must force the record into
  390. memory as well }
  391. ((left.location.size in [OS_PAIR,OS_SPAIR]) and
  392. (vs.fieldoffset div sizeof(aword)<>(vs.fieldoffset+vs.getsize-1) div sizeof(aword))) or
  393. (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER,LOC_CMMREGISTER,LOC_CFPUREGISTER,
  394. { actually, we should be able to "subscript" a constant, but this would require some code
  395. which enables dumping and reading constants from a temporary memory buffer. This
  396. must be done a CPU dependent way, so it is not easy and probably not worth the effort (FK)
  397. }
  398. LOC_CONSTANT]) then
  399. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef)
  400. else
  401. begin
  402. if (left.location.loc = LOC_REGISTER) then
  403. location.loc := LOC_SUBSETREG
  404. else
  405. location.loc := LOC_CSUBSETREG;
  406. location.size:=def_cgsize(resultdef);
  407. offsetcorrection:=0;
  408. if (left.location.size in [OS_PAIR,OS_SPAIR]) then
  409. begin
  410. if (vs.fieldoffset>=sizeof(aword)) xor (target_info.endian=endian_big) then
  411. location.sreg.subsetreg := left.location.registerhi
  412. else
  413. location.sreg.subsetreg := left.location.register;
  414. if (vs.fieldoffset>=sizeof(aword)) then
  415. offsetcorrection:=sizeof(aword)*8;
  416. location.sreg.subsetregsize := OS_INT;
  417. end
  418. else
  419. begin
  420. location.sreg.subsetreg := left.location.register;
  421. location.sreg.subsetregsize := left.location.size;
  422. end;
  423. if not is_packed_record_or_object(left.resultdef) then
  424. begin
  425. if (target_info.endian = ENDIAN_BIG) then
  426. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8+offsetcorrection
  427. else
  428. location.sreg.startbit := (vs.fieldoffset * 8)-offsetcorrection;
  429. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  430. end
  431. else
  432. begin
  433. location.sreg.bitlen := resultdef.packedbitsize;
  434. if (target_info.endian = ENDIAN_BIG) then
  435. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset+offsetcorrection
  436. else
  437. location.sreg.startbit := vs.fieldoffset-offsetcorrection;
  438. end;
  439. end;
  440. end;
  441. LOC_SUBSETREG,
  442. LOC_CSUBSETREG:
  443. begin
  444. location.size:=def_cgsize(resultdef);
  445. if not is_packed_record_or_object(left.resultdef) then
  446. begin
  447. if (target_info.endian = ENDIAN_BIG) then
  448. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  449. else
  450. inc(location.sreg.startbit, vs.fieldoffset * 8);
  451. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  452. end
  453. else
  454. begin
  455. location.sreg.bitlen := resultdef.packedbitsize;
  456. if (target_info.endian = ENDIAN_BIG) then
  457. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  458. else
  459. inc(location.sreg.startbit, vs.fieldoffset);
  460. end;
  461. end;
  462. else
  463. internalerror(2006031901);
  464. end;
  465. end;
  466. if is_objc_class_or_protocol(left.resultdef) and
  467. (target_info.system in systems_objc_nfabi) then
  468. begin
  469. if (location.loc<>LOC_REFERENCE) or
  470. (location.reference.index<>NR_NO) then
  471. internalerror(2009092402);
  472. { the actual field offset is stored in memory (to solve the
  473. "fragile base class" problem: this way the layout of base
  474. classes can be changed without breaking programs compiled against
  475. earlier versions)
  476. }
  477. asmsym:=current_asmdata.RefAsmSymbol(vs.mangledname);
  478. reference_reset_symbol(tmpref,asmsym,0,sizeof(pint));
  479. location.reference.index:=hlcg.getintregister(current_asmdata.CurrAsmList,ptruinttype);
  480. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,ptruinttype,ptruinttype,tmpref,location.reference.index);
  481. { always packrecords C -> natural alignment }
  482. location.reference.alignment:=vs.vardef.alignment;
  483. end
  484. else if is_java_class_or_interface(left.resultdef) or
  485. ((target_info.system in systems_jvm) and
  486. (left.resultdef.typ=recorddef)) then
  487. begin
  488. if (location.loc<>LOC_REFERENCE) or
  489. (location.reference.index<>NR_NO) or
  490. assigned(location.reference.symbol) then
  491. internalerror(2011011301);
  492. location.reference.symbol:=current_asmdata.RefAsmSymbol(vs.mangledname);
  493. end
  494. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  495. begin
  496. if not is_packed_record_or_object(left.resultdef) then
  497. begin
  498. inc(location.reference.offset,vs.fieldoffset);
  499. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  500. end
  501. else if (vs.fieldoffset mod 8 = 0) and
  502. (resultdef.packedbitsize mod 8 = 0) and
  503. { is different in case of e.g. packenum 2 and an enum }
  504. { which fits in 8 bits }
  505. (resultdef.size*8 = resultdef.packedbitsize) then
  506. begin
  507. inc(location.reference.offset,vs.fieldoffset div 8);
  508. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  509. end
  510. else
  511. begin
  512. sref.ref:=location.reference;
  513. sref.ref.alignment:=1;
  514. sref.bitindexreg:=NR_NO;
  515. inc(sref.ref.offset,vs.fieldoffset div 8);
  516. sref.startbit:=vs.fieldoffset mod 8;
  517. sref.bitlen:=resultdef.packedbitsize;
  518. if (left.location.loc=LOC_REFERENCE) then
  519. location.loc:=LOC_SUBSETREF
  520. else
  521. location.loc:=LOC_CSUBSETREF;
  522. location.sref:=sref;
  523. end;
  524. { also update the size of the location }
  525. location.size:=def_cgsize(resultdef);
  526. end;
  527. paraloc1.done;
  528. end;
  529. {*****************************************************************************
  530. TCGWITHNODE
  531. *****************************************************************************}
  532. procedure tcgwithnode.pass_generate_code;
  533. begin
  534. location_reset(location,LOC_VOID,OS_NO);
  535. if assigned(left) then
  536. secondpass(left);
  537. end;
  538. {*****************************************************************************
  539. TCGVECNODE
  540. *****************************************************************************}
  541. function tcgvecnode.get_mul_size : aint;
  542. begin
  543. if nf_memindex in flags then
  544. get_mul_size:=1
  545. else
  546. begin
  547. if (left.resultdef.typ=arraydef) then
  548. if not is_packed_array(left.resultdef) then
  549. get_mul_size:=tarraydef(left.resultdef).elesize
  550. else
  551. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  552. else
  553. get_mul_size:=resultdef.size;
  554. end
  555. end;
  556. { this routine must, like any other routine, not change the contents }
  557. { of base/index registers of references, as these may be regvars. }
  558. { The register allocator can coalesce one LOC_REGISTER being moved }
  559. { into another (as their live ranges won't overlap), but not a }
  560. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  561. { the live range of the LOC_CREGISTER will most likely overlap the }
  562. { the live range of the target LOC_(C)REGISTER) }
  563. { The passed register may be a LOC_CREGISTER as well. }
  564. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg: tregister; regsize: tdef; l: aint);
  565. var
  566. hreg: tregister;
  567. begin
  568. if l<>1 then
  569. begin
  570. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  571. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  572. maybe_const_reg:=hreg;
  573. end;
  574. if location.reference.base=NR_NO then
  575. location.reference.base:=maybe_const_reg
  576. else if location.reference.index=NR_NO then
  577. location.reference.index:=maybe_const_reg
  578. else
  579. begin
  580. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  581. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  582. reference_reset_base(location.reference,hreg,0,location.reference.alignment);
  583. { insert new index register }
  584. location.reference.index:=maybe_const_reg;
  585. end;
  586. { update alignment }
  587. if (location.reference.alignment=0) then
  588. internalerror(2009020704);
  589. location.reference.alignment:=newalignment(location.reference.alignment,l);
  590. end;
  591. { see remarks for tcgvecnode.update_reference_reg_mul above }
  592. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l:aint);
  593. var
  594. sref: tsubsetreference;
  595. offsetreg, hreg: tregister;
  596. alignpower: aint;
  597. temp : longint;
  598. begin
  599. { only orddefs are bitpacked. Even then we only need special code in }
  600. { case the bitpacked *byte size* is not a power of two, otherwise }
  601. { everything can be handled using the the regular array code. }
  602. if ((l mod 8) = 0) and
  603. (ispowerof2(l div 8,temp) or
  604. not is_ordinal(resultdef)
  605. {$ifndef cpu64bitalu}
  606. or is_64bitint(resultdef)
  607. {$endif not cpu64bitalu}
  608. ) then
  609. begin
  610. update_reference_reg_mul(maybe_const_reg,regsize,l div 8);
  611. exit;
  612. end;
  613. if (l > 8*sizeof(aint)) then
  614. internalerror(200608051);
  615. sref.ref := location.reference;
  616. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  617. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_INT,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  618. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_INT,l,hreg);
  619. { keep alignment for index }
  620. sref.ref.alignment := left.resultdef.alignment;
  621. if not ispowerof2(packedbitsloadsize(l),temp) then
  622. internalerror(2006081201);
  623. alignpower:=temp;
  624. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  625. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  626. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  627. if (sref.ref.base = NR_NO) then
  628. sref.ref.base := offsetreg
  629. else if (sref.ref.index = NR_NO) then
  630. sref.ref.index := offsetreg
  631. else
  632. begin
  633. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  634. sref.ref.base := offsetreg;
  635. end;
  636. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,hreg);
  637. sref.bitindexreg := hreg;
  638. sref.startbit := 0;
  639. sref.bitlen := resultdef.packedbitsize;
  640. if (left.location.loc = LOC_REFERENCE) then
  641. location.loc := LOC_SUBSETREF
  642. else
  643. location.loc := LOC_CSUBSETREF;
  644. location.sref := sref;
  645. end;
  646. procedure tcgvecnode.update_reference_offset(var ref: treference; index, mulsize: aint);
  647. begin
  648. inc(ref.offset,index*mulsize);
  649. end;
  650. procedure tcgvecnode.second_wideansistring;
  651. begin
  652. end;
  653. procedure tcgvecnode.second_dynamicarray;
  654. begin
  655. end;
  656. function tcgvecnode.valid_index_size(size: tcgsize): boolean;
  657. begin
  658. result:=
  659. tcgsize2signed[size]=tcgsize2signed[OS_ADDR];
  660. end;
  661. procedure tcgvecnode.rangecheck_array;
  662. var
  663. hightree : tnode;
  664. poslabel,
  665. neglabel : tasmlabel;
  666. hreg : tregister;
  667. paraloc1,paraloc2 : tcgpara;
  668. pd : tprocdef;
  669. begin
  670. { omit range checking when this is an array access to a pointer which has been
  671. typecasted from an array }
  672. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  673. exit;
  674. paraloc1.init;
  675. paraloc2.init;
  676. if is_open_array(left.resultdef) or
  677. is_array_of_const(left.resultdef) then
  678. begin
  679. { cdecl functions don't have high() so we can not check the range }
  680. { (can't use current_procdef, since it may be a nested procedure) }
  681. if not(tprocdef(tparasymtable(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry).owner).defowner).proccalloption in cdecl_pocalls) then
  682. begin
  683. { Get high value }
  684. hightree:=load_high_value_node(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry));
  685. { it must be available }
  686. if not assigned(hightree) then
  687. internalerror(200212201);
  688. firstpass(hightree);
  689. secondpass(hightree);
  690. { generate compares }
  691. if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  692. hreg:=cg.makeregsize(current_asmdata.CurrAsmList,right.location.register,OS_INT)
  693. else
  694. begin
  695. hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  696. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,hreg);
  697. end;
  698. current_asmdata.getjumplabel(neglabel);
  699. current_asmdata.getjumplabel(poslabel);
  700. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_LT,0,hreg,poslabel);
  701. cg.a_cmp_loc_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_BE,hightree.location,hreg,neglabel);
  702. cg.a_label(current_asmdata.CurrAsmList,poslabel);
  703. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_RANGEERROR',false);
  704. cg.a_label(current_asmdata.CurrAsmList,neglabel);
  705. { release hightree }
  706. hightree.free;
  707. end;
  708. end
  709. else
  710. if is_dynamic_array(left.resultdef) then
  711. begin
  712. pd:=search_system_proc('fpc_dynarray_rangecheck');
  713. paramanager.getintparaloc(pd,1,paraloc1);
  714. paramanager.getintparaloc(pd,2,paraloc2);
  715. if pd.is_pushleftright then
  716. begin
  717. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  718. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  719. end
  720. else
  721. begin
  722. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  723. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  724. end;
  725. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  726. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  727. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  728. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_DYNARRAY_RANGECHECK',false);
  729. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  730. end;
  731. { for regular arrays, we don't have to do anything because the index has been
  732. type converted to the index type, which already inserted a range check if
  733. necessary }
  734. paraloc1.done;
  735. paraloc2.done;
  736. end;
  737. procedure tcgvecnode.rangecheck_string;
  738. var
  739. paraloc1,
  740. paraloc2: tcgpara;
  741. helpername: TIDString;
  742. pd: tprocdef;
  743. begin
  744. paraloc1.init;
  745. paraloc2.init;
  746. case tstringdef(left.resultdef).stringtype of
  747. { it's the same for ansi- and wide strings }
  748. st_unicodestring,
  749. st_widestring,
  750. st_ansistring:
  751. begin
  752. helpername:='fpc_'+tstringdef(left.resultdef).stringtypname+'_rangecheck';
  753. pd:=search_system_proc(helpername);
  754. paramanager.getintparaloc(pd,1,paraloc1);
  755. paramanager.getintparaloc(pd,2,paraloc2);
  756. if pd.is_pushleftright then
  757. begin
  758. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  759. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  760. end
  761. else
  762. begin
  763. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  764. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  765. end;
  766. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  767. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  768. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  769. cg.a_call_name(current_asmdata.CurrAsmList,helpername,false);
  770. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  771. end;
  772. st_shortstring:
  773. begin
  774. {!!!!!!!!!!!!!!!!!}
  775. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  776. end;
  777. st_longstring:
  778. begin
  779. {!!!!!!!!!!!!!!!!!}
  780. end;
  781. end;
  782. paraloc1.done;
  783. paraloc2.done;
  784. end;
  785. procedure tcgvecnode.pass_generate_code;
  786. var
  787. offsetdec,
  788. extraoffset : aint;
  789. rightp : pnode;
  790. otl,ofl : tasmlabel;
  791. newsize : tcgsize;
  792. mulsize,
  793. bytemulsize,
  794. alignpow : aint;
  795. isjump : boolean;
  796. paraloc1,
  797. paraloc2 : tcgpara;
  798. subsetref : tsubsetreference;
  799. temp : longint;
  800. indexdef : tdef;
  801. begin
  802. paraloc1.init;
  803. paraloc2.init;
  804. mulsize:=get_mul_size;
  805. if not is_packed_array(left.resultdef) then
  806. bytemulsize:=mulsize
  807. else
  808. bytemulsize:=mulsize div 8;
  809. newsize:=def_cgsize(resultdef);
  810. secondpass(left);
  811. if left.location.loc=LOC_CREFERENCE then
  812. location_reset_ref(location,LOC_CREFERENCE,newsize,left.location.reference.alignment)
  813. else
  814. location_reset_ref(location,LOC_REFERENCE,newsize,left.location.reference.alignment);
  815. { an ansistring needs to be dereferenced }
  816. if is_ansistring(left.resultdef) or
  817. is_wide_or_unicode_string(left.resultdef) then
  818. begin
  819. if nf_callunique in flags then
  820. internalerror(200304236);
  821. {DM!!!!!}
  822. case left.location.loc of
  823. LOC_REGISTER,
  824. LOC_CREGISTER :
  825. begin
  826. {$ifdef m68k}
  827. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  828. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,location.reference.base);
  829. {$else m68k}
  830. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  831. {$endif m68k}
  832. end;
  833. LOC_CREFERENCE,
  834. LOC_REFERENCE :
  835. begin
  836. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  837. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location.reference,location.reference.base);
  838. end;
  839. LOC_CONSTANT:
  840. begin
  841. hlcg.reference_reset_base(location.reference,left.resultdef,NR_NO,left.location.value,location.reference.alignment);
  842. end;
  843. else
  844. internalerror(2002032218);
  845. end;
  846. if is_ansistring(left.resultdef) then
  847. offsetdec:=1
  848. else
  849. offsetdec:=2;
  850. location.reference.alignment:=offsetdec;
  851. { in ansistrings/widestrings S[1] is p<w>char(S)[0] }
  852. if not(cs_zerobasedstrings in current_settings.localswitches) then
  853. update_reference_offset(location.reference,-1,offsetdec);
  854. end
  855. else if is_dynamic_array(left.resultdef) then
  856. begin
  857. case left.location.loc of
  858. LOC_REGISTER,
  859. LOC_CREGISTER :
  860. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  861. LOC_REFERENCE,
  862. LOC_CREFERENCE :
  863. begin
  864. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  865. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  866. left.location.reference,location.reference.base);
  867. end;
  868. else
  869. internalerror(2002032219);
  870. end;
  871. { a dynarray points to the start of a memory block, which
  872. we assume to be always aligned to a multiple of the
  873. pointer size
  874. }
  875. location.reference.alignment:=voidpointertype.size;
  876. end
  877. else
  878. begin
  879. { may happen in case of function results }
  880. case left.location.loc of
  881. LOC_CREGISTER,
  882. LOC_CMMREGISTER,
  883. LOC_REGISTER,
  884. LOC_MMREGISTER:
  885. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  886. end;
  887. location_copy(location,left.location);
  888. end;
  889. { location must be memory }
  890. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  891. internalerror(200411013);
  892. { offset can only differ from 0 if arraydef }
  893. if (left.resultdef.typ=arraydef) and
  894. not(is_dynamic_array(left.resultdef)) and
  895. (not(is_packed_array(left.resultdef)) or
  896. ((mulsize mod 8 = 0) and
  897. ispowerof2(mulsize div 8,temp)) or
  898. { only orddefs are bitpacked }
  899. not is_ordinal(resultdef)
  900. {$ifndef cpu64bitalu}
  901. or is_64bitint(resultdef)
  902. {$endif not cpu64bitalu}
  903. ) then
  904. update_reference_offset(location.reference,-tarraydef(left.resultdef).lowrange,bytemulsize);
  905. if right.nodetype=ordconstn then
  906. begin
  907. { offset can only differ from 0 if arraydef }
  908. if cs_check_range in current_settings.localswitches then
  909. begin
  910. secondpass(right);
  911. case left.resultdef.typ of
  912. arraydef :
  913. rangecheck_array;
  914. stringdef :
  915. rangecheck_string;
  916. end;
  917. end;
  918. if not(is_packed_array(left.resultdef)) or
  919. ((mulsize mod 8 = 0) and
  920. (ispowerof2(mulsize div 8,temp) or
  921. { only orddefs are bitpacked }
  922. not is_ordinal(resultdef))) then
  923. begin
  924. extraoffset:=tordconstnode(right).value.svalue;
  925. update_reference_offset(location.reference,extraoffset,bytemulsize);
  926. { adjust alignment after this change }
  927. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset*bytemulsize);
  928. { don't do this for floats etc.; needed to properly set the }
  929. { size for bitpacked arrays (e.g. a bitpacked array of }
  930. { enums who are size 2 but fit in one byte -> in the array }
  931. { they will be one byte and have to be stored like that) }
  932. if is_packed_array(left.resultdef) and
  933. (tcgsize2size[newsize] <> bytemulsize) then
  934. newsize:=int_cgsize(bytemulsize);
  935. end
  936. else
  937. begin
  938. subsetref.ref := location.reference;
  939. subsetref.ref.alignment := left.resultdef.alignment;
  940. if not ispowerof2(packedbitsloadsize(resultdef.packedbitsize),temp) then
  941. internalerror(2006081212);
  942. alignpow:=temp;
  943. update_reference_offset(subsetref.ref,(mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow),1 shl alignpow);
  944. subsetref.bitindexreg := NR_NO;
  945. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  946. subsetref.bitlen := resultdef.packedbitsize;
  947. if (left.location.loc = LOC_REFERENCE) then
  948. location.loc := LOC_SUBSETREF
  949. else
  950. location.loc := LOC_CSUBSETREF;
  951. location.sref := subsetref;
  952. end;
  953. end
  954. else
  955. { not nodetype=ordconstn }
  956. begin
  957. if (cs_opt_level1 in current_settings.optimizerswitches) and
  958. { if we do range checking, we don't }
  959. { need that fancy code (it would be }
  960. { buggy) }
  961. not(cs_check_range in current_settings.localswitches) and
  962. (left.resultdef.typ=arraydef) and
  963. not is_packed_array(left.resultdef) then
  964. begin
  965. extraoffset:=0;
  966. rightp:=actualtargetnode(@right);
  967. if rightp^.nodetype=addn then
  968. begin
  969. if taddnode(rightp^).right.nodetype=ordconstn then
  970. begin
  971. extraoffset:=tordconstnode(taddnode(rightp^).right).value.svalue;
  972. replacenode(rightp^,taddnode(rightp^).left);
  973. end
  974. else if taddnode(rightp^).left.nodetype=ordconstn then
  975. begin
  976. extraoffset:=tordconstnode(taddnode(rightp^).left).value.svalue;
  977. replacenode(rightp^,taddnode(rightp^).right);
  978. end;
  979. end
  980. else if rightp^.nodetype=subn then
  981. begin
  982. if taddnode(rightp^).right.nodetype=ordconstn then
  983. begin
  984. extraoffset:=-tordconstnode(taddnode(rightp^).right).value.svalue;
  985. replacenode(rightp^,taddnode(rightp^).left);
  986. end;
  987. end;
  988. update_reference_offset(location.reference,extraoffset,mulsize);
  989. end;
  990. { calculate from left to right }
  991. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  992. internalerror(200304237);
  993. isjump:=(right.expectloc=LOC_JUMP);
  994. otl:=nil;
  995. ofl:=nil;
  996. if isjump then
  997. begin
  998. otl:=current_procinfo.CurrTrueLabel;
  999. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  1000. ofl:=current_procinfo.CurrFalseLabel;
  1001. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  1002. end;
  1003. secondpass(right);
  1004. { if mulsize = 1, we won't have to modify the index }
  1005. if not(right.location.loc in [LOC_CREGISTER,LOC_REGISTER]) or
  1006. not valid_index_size(right.location.size) then
  1007. begin
  1008. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,ptruinttype,true);
  1009. indexdef:=ptruinttype
  1010. end
  1011. else
  1012. indexdef:=right.resultdef;
  1013. if isjump then
  1014. begin
  1015. current_procinfo.CurrTrueLabel:=otl;
  1016. current_procinfo.CurrFalseLabel:=ofl;
  1017. end
  1018. else if (right.location.loc = LOC_JUMP) then
  1019. internalerror(2006010801);
  1020. { produce possible range check code: }
  1021. if cs_check_range in current_settings.localswitches then
  1022. begin
  1023. if left.resultdef.typ=arraydef then
  1024. rangecheck_array
  1025. else if (left.resultdef.typ=stringdef) then
  1026. rangecheck_string;
  1027. end;
  1028. { insert the register and the multiplication factor in the
  1029. reference }
  1030. if not is_packed_array(left.resultdef) then
  1031. update_reference_reg_mul(right.location.register,indexdef,mulsize)
  1032. else
  1033. update_reference_reg_packed(right.location.register,indexdef,mulsize);
  1034. end;
  1035. location.size:=newsize;
  1036. paraloc1.done;
  1037. paraloc2.done;
  1038. end;
  1039. begin
  1040. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  1041. cloadparentfpnode:=tcgloadparentfpnode;
  1042. caddrnode:=tcgaddrnode;
  1043. cderefnode:=tcgderefnode;
  1044. csubscriptnode:=tcgsubscriptnode;
  1045. cwithnode:=tcgwithnode;
  1046. cvecnode:=tcgvecnode;
  1047. end.