aoptcpu.pas 13 KB

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  1. {
  2. Copyright (c) 1998-2004 by Jonas Maebe
  3. This unit calls the optimization procedures to optimize the assembler
  4. code for sparc
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. Interface
  21. uses
  22. cgbase, cpubase, aoptobj, aoptcpub, aopt, aasmtai;
  23. Type
  24. TCpuAsmOptimizer = class(TAsmOptimizer)
  25. function GetNextInstructionUsingReg(Current: tai;
  26. var Next: tai; reg: TRegister): Boolean;
  27. function TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  28. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  29. function RegUsedAfterInstruction(reg: Tregister; p: tai;
  30. var AllUsedRegs: TAllUsedRegs): Boolean;
  31. End;
  32. Implementation
  33. uses
  34. globtype,globals,aasmcpu;
  35. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  36. begin
  37. result :=
  38. (instr.typ = ait_instruction) and
  39. (taicpu(instr).opcode = op);
  40. end;
  41. function MatchOperand(const oper: TOper; reg: TRegister): boolean;
  42. begin
  43. result:=(oper.typ=top_reg) and (oper.reg=reg);
  44. end;
  45. function IsSameReg(this,next: taicpu): boolean;
  46. begin
  47. result:=(next.ops=3) and
  48. (next.oper[2]^.typ=top_reg) and
  49. (next.oper[0]^.typ=top_reg) and
  50. (next.oper[2]^.reg=next.oper[0]^.reg) and
  51. (next.oper[2]^.reg=this.oper[2]^.reg);
  52. end;
  53. function regLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  54. var
  55. p: taicpu;
  56. begin
  57. p:=taicpu(hp);
  58. result:=false;
  59. if not ((assigned(hp)) and (hp.typ=ait_instruction)) then
  60. exit;
  61. case p.opcode of
  62. { These instructions do not write into a register at all }
  63. A_NOP,
  64. A_FCMPs,A_FCMPd,A_FCMPq,A_CMP,
  65. A_BA,A_Bxx,A_FBA,A_FBxx,
  66. A_STB,A_STH,A_ST,A_STF,A_STDF:
  67. exit;
  68. end;
  69. result:=(p.ops>0) and (p.oper[p.ops-1]^.typ=top_reg) and
  70. (p.oper[p.ops-1]^.reg=reg);
  71. end;
  72. function instructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  73. var
  74. p: taicpu;
  75. i: longint;
  76. begin
  77. result:=false;
  78. if not (assigned(hp) and (hp.typ=ait_instruction)) then
  79. exit;
  80. p:=taicpu(hp);
  81. i:=0;
  82. while(i<p.ops) do
  83. begin
  84. case p.oper[I]^.typ of
  85. top_reg:
  86. result:=(p.oper[I]^.reg=reg) and (I<2);
  87. top_ref:
  88. result:=
  89. (p.oper[I]^.ref^.base=reg) or
  90. (p.oper[I]^.ref^.index=reg);
  91. end;
  92. if result then exit; {Bailout if we found something}
  93. Inc(I);
  94. end;
  95. end;
  96. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  97. var Next: tai; reg: TRegister): Boolean;
  98. begin
  99. Next:=Current;
  100. repeat
  101. Result:=GetNextInstruction(Next,Next);
  102. until {not(cs_opt_level3 in current_settings.optimizerswitches) or} not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  103. (is_calljmp(taicpu(Next).opcode));
  104. if result and (next.typ=ait_instruction) and is_calljmp(taicpu(next).opcode) then
  105. begin
  106. result:=false;
  107. next:=nil;
  108. end;
  109. end;
  110. function TCpuAsmOptimizer.RegUsedAfterInstruction(reg: Tregister; p: tai;
  111. var AllUsedRegs: TAllUsedRegs): Boolean;
  112. begin
  113. AllUsedRegs[getregtype(reg)].Update(tai(p.Next),true);
  114. RegUsedAfterInstruction :=
  115. AllUsedRegs[getregtype(reg)].IsUsed(reg) and
  116. not(regLoadedWithNewValue(reg,p)) and
  117. (
  118. not(GetNextInstruction(p,p)) or
  119. instructionLoadsFromReg(reg,p) or
  120. not(regLoadedWithNewValue(reg,p))
  121. );
  122. end;
  123. function TCpuAsmOptimizer.TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  124. var
  125. next,hp1: tai;
  126. alloc,dealloc: tai_regalloc;
  127. begin
  128. { Fold
  129. op ...,%reg1
  130. ...
  131. opcode %reg1,%reg2
  132. dealloc %reg1
  133. into
  134. op ...,%reg2
  135. opcode may be A_MOV, A_FMOVs, A_FMOVd, etc.
  136. }
  137. result:=false;
  138. if (taicpu(p).ops=3) and
  139. { don't mess with instructions using %g0 for destination }
  140. (taicpu(p).oper[2]^.reg<>NR_G0) and
  141. GetNextInstructionUsingReg(p,next,taicpu(p).oper[2]^.reg) and
  142. MatchInstruction(next,opcode) and
  143. MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[2]^.reg) and
  144. { the destination register of mov cannot be used between p and next }
  145. (not RegUsedBetween(taicpu(next).oper[1]^.reg,p,next)) and
  146. { This is necessary so 'mov %reg1,%y' is not folded. Compiler should
  147. probably generate A_WRY opcode for this, not A_MOV. }
  148. (getregtype(taicpu(next).oper[1]^.reg)<>R_SPECIALREGISTER) then
  149. begin
  150. dealloc:=FindRegDealloc(taicpu(p).oper[2]^.reg,tai(next.Next));
  151. if assigned(dealloc) then
  152. begin
  153. { taicpu(p).oper[2]^.reg is not used anymore, try to find its allocation
  154. and remove it if possible }
  155. GetLastInstruction(p,hp1);
  156. asml.Remove(dealloc);
  157. alloc:=FindRegAlloc(taicpu(p).oper[2]^.reg,tai(hp1.Next));
  158. if assigned(alloc) then
  159. begin
  160. asml.Remove(alloc);
  161. alloc.free;
  162. dealloc.free;
  163. end
  164. else
  165. asml.InsertAfter(dealloc,p);
  166. { try to move the allocation of the target register }
  167. GetLastInstruction(next,hp1);
  168. alloc:=FindRegAlloc(taicpu(next).oper[1]^.reg,tai(hp1.Next));
  169. if assigned(alloc) then
  170. begin
  171. asml.Remove(alloc);
  172. asml.InsertBefore(alloc,p);
  173. { adjust used regs }
  174. IncludeRegInUsedRegs(taicpu(next).oper[1]^.reg,UsedRegs);
  175. end;
  176. { finally get rid of the mov }
  177. taicpu(p).loadreg(2,taicpu(next).oper[1]^.reg);
  178. asml.remove(next);
  179. next.free;
  180. end;
  181. end;
  182. end;
  183. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  184. var
  185. next,next2: tai;
  186. TmpUsedRegs: TAllUsedRegs;
  187. begin
  188. result:=false;
  189. case p.typ of
  190. ait_instruction:
  191. begin
  192. case taicpu(p).opcode of
  193. A_SLL:
  194. begin
  195. { if this is sign/zero extension... }
  196. if (taicpu(p).oper[1]^.typ=top_const) and
  197. GetNextInstruction(p,next) and
  198. (MatchInstruction(next,A_SRL) or MatchInstruction(next,A_SRA)) and
  199. IsSameReg(taicpu(p),taicpu(next)) and
  200. (taicpu(next).oper[1]^.typ=top_const) and
  201. (taicpu(next).oper[1]^.val=taicpu(p).oper[1]^.val) and
  202. (taicpu(next).oper[1]^.val=16) and
  203. { ...followed by 16-bit store (possibly with PIC simplification, etc. in between) }
  204. GetNextInstructionUsingReg(next,next2,taicpu(p).oper[2]^.reg) and
  205. MatchInstruction(next2,A_STH) and
  206. (taicpu(next2).oper[0]^.typ=top_reg) and
  207. (taicpu(next2).oper[0]^.reg=taicpu(p).oper[2]^.reg) and
  208. { the initial register may not be reused }
  209. (not RegUsedBetween(taicpu(p).oper[0]^.reg,next,next2)) then
  210. begin
  211. CopyUsedRegs(TmpUsedRegs);
  212. UpdateUsedRegs(TmpUsedRegs, tai(p.next));
  213. UpdateUsedRegs(TmpUsedRegs, tai(next.next));
  214. if not RegUsedAfterInstruction(taicpu(p).oper[2]^.reg,next2,TmpUsedRegs) then
  215. begin
  216. taicpu(next2).loadreg(0,taicpu(p).oper[0]^.reg);
  217. asml.remove(p);
  218. asml.remove(next);
  219. p.free;
  220. next.free;
  221. p:=next2;
  222. end;
  223. ReleaseUsedRegs(TmpUsedRegs);
  224. end
  225. else
  226. TryRemoveMov(p,A_MOV);
  227. end;
  228. A_SRL:
  229. begin
  230. { happens with a_load_const_ref(...,0), where %g0 is used instead of 0 }
  231. { TODO: override a_load_reg_ref_unaligned and don't generate such shifts }
  232. if (taicpu(p).oper[2]^.typ=top_reg) and
  233. (taicpu(p).oper[2]^.reg=NR_G0) then
  234. begin
  235. next:=tai(p.next);
  236. asml.remove(p);
  237. p.free;
  238. p:=next;
  239. end
  240. { kill zero extension after right shift (e.g. happens with "high(dword)")}
  241. else if (taicpu(p).oper[1]^.typ=top_const) and
  242. (taicpu(p).oper[1]^.val>=16) and
  243. GetNextInstruction(p,next) and
  244. MatchInstruction(next,A_SLL) and
  245. GetNextInstruction(next,next2) and
  246. MatchInstruction(next2,A_SRL) and
  247. IsSameReg(taicpu(p),taicpu(next)) and
  248. IsSameReg(taicpu(p),taicpu(next2)) and
  249. (taicpu(next).oper[1]^.typ=top_const) and
  250. (taicpu(next2).oper[1]^.typ=top_const) and
  251. (taicpu(next).oper[1]^.val=taicpu(next2).oper[1]^.val) and
  252. (taicpu(next).oper[1]^.val=16) then
  253. begin
  254. asml.remove(next);
  255. asml.remove(next2);
  256. next.free;
  257. next2.free;
  258. end
  259. else
  260. TryRemoveMov(p,A_MOV);
  261. end;
  262. A_AND:
  263. begin
  264. { Remove sign extension after 'and' if bit 7 of const operand is clear }
  265. if (taicpu(p).oper[1]^.typ=top_const) and
  266. GetNextInstruction(p,next) and
  267. MatchInstruction(next,A_SLL) and
  268. GetNextInstruction(next,next2) and
  269. MatchInstruction(next2,A_SRA) and
  270. IsSameReg(taicpu(p),taicpu(next)) and
  271. IsSameReg(taicpu(p),taicpu(next2)) and
  272. (taicpu(next).oper[1]^.typ=top_const) and
  273. (taicpu(next2).oper[1]^.typ=top_const) and
  274. (taicpu(next).oper[1]^.val=taicpu(next2).oper[1]^.val) and
  275. ({(
  276. (taicpu(p).oper[2]^.val<=$7fff) and
  277. (taicpu(next).oper[2]^.val=16)
  278. ) or }(
  279. (taicpu(p).oper[1]^.val<=$7f) and
  280. (taicpu(next).oper[1]^.val=24)
  281. )) then
  282. begin
  283. asml.remove(next);
  284. asml.remove(next2);
  285. next.free;
  286. next2.free;
  287. end
  288. else if (taicpu(p).oper[1]^.typ=top_const) and
  289. (taicpu(p).oper[1]^.val=255) and
  290. GetNextInstruction(p,next) and
  291. MatchInstruction(next,A_STB) and
  292. (taicpu(next).oper[0]^.typ=top_reg) and
  293. (taicpu(next).oper[0]^.reg=taicpu(p).oper[2]^.reg) then
  294. begin
  295. CopyUsedRegs(TmpUsedRegs);
  296. UpdateUsedRegs(TmpUsedRegs, tai(p.next));
  297. if not RegUsedAfterInstruction(taicpu(p).oper[2]^.reg,next,TmpUsedRegs) then
  298. begin
  299. taicpu(next).loadreg(0,taicpu(p).oper[0]^.reg);
  300. asml.remove(p);
  301. p.free;
  302. p:=next;
  303. end;
  304. ReleaseUsedRegs(TmpUsedRegs);
  305. end
  306. else
  307. TryRemoveMov(p,A_MOV);
  308. end;
  309. A_ADD,A_ADDcc,A_ADDX,
  310. A_SUB,A_SUBcc,A_SUBX,
  311. A_SRA,
  312. A_ANDcc,A_OR,A_ORcc,A_XOR,A_XORcc:
  313. TryRemoveMov(p,A_MOV);
  314. A_FADDs, A_FSUBs, A_FMULs, A_FDIVs,
  315. A_FABSs, A_FNEGs, A_FSQRTs,
  316. A_FDTOs, A_FITOs, A_FQTOs:
  317. TryRemoveMov(p,A_FMOVs);
  318. A_FADDd, A_FSUBd, A_FMULd, A_FDIVd,
  319. A_FABSd, A_FNEGd, A_FSQRTd,
  320. A_FSTOd, A_FITOd, A_FQTOd:
  321. TryRemoveMov(p,A_FMOVd);
  322. end;
  323. end;
  324. end;
  325. end;
  326. begin
  327. casmoptimizer:=TCpuAsmOptimizer;
  328. end.