cgbase.pas 24 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Some basic types and constants for the code generation
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. {# This unit exports some types which are used across the code generator }
  18. unit cgbase;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,
  23. symconst;
  24. type
  25. { Location types where value can be stored }
  26. TCGLoc=(
  27. LOC_INVALID, { added for tracking problems}
  28. LOC_VOID, { no value is available }
  29. LOC_CONSTANT, { constant value }
  30. LOC_JUMP, { boolean results only, jump to false or true label }
  31. LOC_FLAGS, { boolean results only, flags are set }
  32. LOC_REGISTER, { in a processor register }
  33. LOC_CREGISTER, { Constant register which shouldn't be modified }
  34. LOC_FPUREGISTER, { FPU stack }
  35. LOC_CFPUREGISTER, { if it is a FPU register variable on the fpu stack }
  36. LOC_MMXREGISTER, { MMX register }
  37. { MMX register variable }
  38. LOC_CMMXREGISTER,
  39. { multimedia register }
  40. LOC_MMREGISTER,
  41. { Constant multimedia reg which shouldn't be modified }
  42. LOC_CMMREGISTER,
  43. { contiguous subset of bits of an integer register }
  44. LOC_SUBSETREG,
  45. LOC_CSUBSETREG,
  46. { contiguous subset of bits in memory }
  47. LOC_SUBSETREF,
  48. LOC_CSUBSETREF,
  49. { keep these last for range checking purposes }
  50. LOC_CREFERENCE, { in memory constant value reference (cannot change) }
  51. LOC_REFERENCE { in memory value }
  52. );
  53. TCGNonRefLoc=low(TCGLoc)..pred(LOC_CREFERENCE);
  54. TCGRefLoc=LOC_CREFERENCE..LOC_REFERENCE;
  55. { since we have only 16bit offsets, we need to be able to specify the high
  56. and lower 16 bits of the address of a symbol of up to 64 bit }
  57. trefaddr = (
  58. addr_no,
  59. addr_full,
  60. addr_pic,
  61. addr_pic_no_got
  62. {$IF defined(POWERPC) or defined(POWERPC64) or defined(SPARC) or defined(MIPS)}
  63. ,
  64. addr_low, // bits 48-63
  65. addr_high, // bits 32-47
  66. {$IF defined(POWERPC64)}
  67. addr_higher, // bits 16-31
  68. addr_highest, // bits 00-15
  69. {$ENDIF}
  70. addr_higha // bits 16-31, adjusted
  71. {$IF defined(POWERPC64)}
  72. ,
  73. addr_highera, // bits 32-47, adjusted
  74. addr_highesta // bits 48-63, adjusted
  75. {$ENDIF}
  76. {$ENDIF POWERPC or POWERPC64 or SPARC or MIPS}
  77. {$IFDEF MIPS}
  78. ,
  79. addr_pic_call16, // like addr_pic, but generates call16 reloc instead of got16
  80. addr_low_pic, // for large GOT model, generate got_hi16 and got_lo16 relocs
  81. addr_high_pic,
  82. addr_low_call, // counterpart of two above, generate call_hi16 and call_lo16 relocs
  83. addr_high_call
  84. {$ENDIF}
  85. {$IFDEF AVR}
  86. ,addr_lo8
  87. ,addr_lo8_gs
  88. ,addr_hi8
  89. ,addr_hi8_gs
  90. {$ENDIF}
  91. {$IFDEF i8086}
  92. ,addr_dgroup // the data segment group
  93. ,addr_fardataseg // the far data segment of the current pascal module (unit or program)
  94. ,addr_seg // used for getting the segment of an object, e.g. 'mov ax, SEG symbol'
  95. {$ENDIF}
  96. {$IFDEF AARCH64}
  97. ,addr_page
  98. ,addr_pageoffset
  99. ,addr_gotpage
  100. ,addr_gotpageoffset
  101. {$ENDIF AARCH64}
  102. {$IFDEF SPC32}
  103. ,addr_lo16
  104. ,addr_hi16
  105. {$ENDIF}
  106. );
  107. {# Generic opcodes, which must be supported by all processors
  108. }
  109. topcg =
  110. (
  111. OP_NONE,
  112. OP_MOVE, { replaced operation with direct load }
  113. OP_ADD, { simple addition }
  114. OP_AND, { simple logical and }
  115. OP_DIV, { simple unsigned division }
  116. OP_IDIV, { simple signed division }
  117. OP_IMUL, { simple signed multiply }
  118. OP_MUL, { simple unsigned multiply }
  119. OP_NEG, { simple negate }
  120. OP_NOT, { simple logical not }
  121. OP_OR, { simple logical or }
  122. OP_SAR, { arithmetic shift-right }
  123. OP_SHL, { logical shift left }
  124. OP_SHR, { logical shift right }
  125. OP_SUB, { simple subtraction }
  126. OP_XOR, { simple exclusive or }
  127. OP_ROL, { rotate left }
  128. OP_ROR { rotate right }
  129. );
  130. {# Generic flag values - used for jump locations }
  131. TOpCmp =
  132. (
  133. OC_NONE,
  134. OC_EQ, { equality comparison }
  135. OC_GT, { greater than (signed) }
  136. OC_LT, { less than (signed) }
  137. OC_GTE, { greater or equal than (signed) }
  138. OC_LTE, { less or equal than (signed) }
  139. OC_NE, { not equal }
  140. OC_BE, { less or equal than (unsigned) }
  141. OC_B, { less than (unsigned) }
  142. OC_AE, { greater or equal than (unsigned) }
  143. OC_A { greater than (unsigned) }
  144. );
  145. { indirect symbol flags }
  146. tindsymflag = (is_data,is_weak);
  147. tindsymflags = set of tindsymflag;
  148. { OS_NO is also used memory references with large data that can
  149. not be loaded in a register directly }
  150. TCgSize = (OS_NO,
  151. { integer registers }
  152. OS_8,OS_16,OS_32,OS_64,OS_128,OS_S8,OS_S16,OS_S32,OS_S64,OS_S128,
  153. { single,double,extended,comp,float128 }
  154. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  155. { multi-media sizes: split in byte, word, dword, ... }
  156. { entities, then the signed counterparts }
  157. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,
  158. OS_MS8,OS_MS16,OS_MS32,OS_MS64,OS_MS128,OS_MS256 );
  159. { Register types }
  160. TRegisterType = (
  161. R_INVALIDREGISTER, { = 0 }
  162. R_INTREGISTER, { = 1 }
  163. R_FPUREGISTER, { = 2 }
  164. { used by Intel only }
  165. R_MMXREGISTER, { = 3 }
  166. R_MMREGISTER, { = 4 }
  167. R_SPECIALREGISTER, { = 5 }
  168. R_ADDRESSREGISTER, { = 6 }
  169. { used on llvm, every temp gets its own "base register" }
  170. R_TEMPREGISTER { = 7 }
  171. );
  172. { Sub registers }
  173. TSubRegister = (
  174. R_SUBNONE, { = 0; no sub register possible }
  175. R_SUBL, { = 1; 8 bits, Like AL }
  176. R_SUBH, { = 2; 8 bits, Like AH }
  177. R_SUBW, { = 3; 16 bits, Like AX }
  178. R_SUBD, { = 4; 32 bits, Like EAX }
  179. R_SUBQ, { = 5; 64 bits, Like RAX }
  180. { For Sparc floats that use F0:F1 to store doubles }
  181. R_SUBFS, { = 6; Float that allocates 1 FPU register }
  182. R_SUBFD, { = 7; Float that allocates 2 FPU registers }
  183. R_SUBFQ, { = 8; Float that allocates 4 FPU registers }
  184. R_SUBMMS, { = 9; single scalar in multi media register }
  185. R_SUBMMD, { = 10; double scalar in multi media register }
  186. R_SUBMMWHOLE, { = 11; complete MM register, size depends on CPU }
  187. { For Intel X86 AVX-Register }
  188. R_SUBMMX, { = 12; 128 BITS }
  189. R_SUBMMY { = 13; 256 BITS }
  190. );
  191. TSubRegisterSet = set of TSubRegister;
  192. TSuperRegister = type word;
  193. {
  194. The new register coding:
  195. SuperRegister (bits 0..15)
  196. Subregister (bits 16..23)
  197. Register type (bits 24..31)
  198. TRegister is defined as an enum to make it incompatible
  199. with TSuperRegister to avoid mixing them
  200. }
  201. TRegister = (
  202. TRegisterLowEnum := Low(longint),
  203. TRegisterHighEnum := High(longint)
  204. );
  205. TRegisterRec=packed record
  206. {$ifdef FPC_BIG_ENDIAN}
  207. regtype : Tregistertype;
  208. subreg : Tsubregister;
  209. supreg : Tsuperregister;
  210. {$else FPC_BIG_ENDIAN}
  211. supreg : Tsuperregister;
  212. subreg : Tsubregister;
  213. regtype : Tregistertype;
  214. {$endif FPC_BIG_ENDIAN}
  215. end;
  216. { A type to store register locations for 64 Bit values. }
  217. {$ifdef cpu64bitalu}
  218. tregister64 = tregister;
  219. tregister128 = record
  220. reglo,reghi : tregister;
  221. end;
  222. {$else cpu64bitalu}
  223. tregister64 = record
  224. reglo,reghi : tregister;
  225. end;
  226. {$endif cpu64bitalu}
  227. Tregistermmxset = record
  228. reg0,reg1,reg2,reg3:Tregister
  229. end;
  230. { Set type definition for registers }
  231. tsuperregisterset = array[byte] of set of byte;
  232. pmmshuffle = ^tmmshuffle;
  233. { this record describes shuffle operations for mm operations; if a pointer a shuffle record
  234. passed to an mm operation is nil, it means that the whole location is moved }
  235. tmmshuffle = record
  236. { describes how many shuffles are actually described, if len=0 then
  237. moving the scalar with index 0 to the scalar with index 0 is meant }
  238. len : byte;
  239. { lower nibble of each entry of this array describes index of the source data index while
  240. the upper nibble describes the destination index }
  241. shuffles : array[1..1] of byte;
  242. end;
  243. Tsuperregisterarray=array[0..$ffff] of Tsuperregister;
  244. Psuperregisterarray=^Tsuperregisterarray;
  245. Tsuperregisterworklist=object
  246. buflength,
  247. buflengthinc,
  248. length:word;
  249. buf:Psuperregisterarray;
  250. constructor init;
  251. constructor copyfrom(const x:Tsuperregisterworklist);
  252. destructor done;
  253. procedure clear;
  254. procedure add(s:tsuperregister);
  255. function addnodup(s:tsuperregister): boolean;
  256. function get:tsuperregister;
  257. function readidx(i:word):tsuperregister;
  258. procedure deleteidx(i:word);
  259. function delete(s:tsuperregister):boolean;
  260. end;
  261. psuperregisterworklist=^tsuperregisterworklist;
  262. const
  263. { alias for easier understanding }
  264. R_SSEREGISTER = R_MMREGISTER;
  265. { Invalid register number }
  266. RS_INVALID = high(tsuperregister);
  267. NR_INVALID = tregister($fffffffff);
  268. tcgsize2size : Array[tcgsize] of integer =
  269. { integer values }
  270. (0,1,2,4,8,16,1,2,4,8,16,
  271. { floating point values }
  272. 4,8,10,8,16,
  273. { multimedia values }
  274. 1,2,4,8,16,32,1,2,4,8,16,32);
  275. tfloat2tcgsize: array[tfloattype] of tcgsize =
  276. (OS_F32,OS_F64,OS_F80,OS_F80,OS_C64,OS_C64,OS_F128);
  277. tcgsize2tfloat: array[OS_F32..OS_C64] of tfloattype =
  278. (s32real,s64real,s80real,s64comp);
  279. tvarregable2tcgloc : array[tvarregable] of tcgloc = (LOC_VOID,
  280. LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMREGISTER,LOC_CREGISTER);
  281. {$if defined(cpu64bitalu)}
  282. { operand size describing an unsigned value in a pair of int registers }
  283. OS_PAIR = OS_128;
  284. { operand size describing an signed value in a pair of int registers }
  285. OS_SPAIR = OS_S128;
  286. {$elseif defined(cpu32bitalu)}
  287. { operand size describing an unsigned value in a pair of int registers }
  288. OS_PAIR = OS_64;
  289. { operand size describing an signed value in a pair of int registers }
  290. OS_SPAIR = OS_S64;
  291. {$elseif defined(cpu16bitalu)}
  292. { operand size describing an unsigned value in a pair of int registers }
  293. OS_PAIR = OS_32;
  294. { operand size describing an signed value in a pair of int registers }
  295. OS_SPAIR = OS_S32;
  296. {$elseif defined(cpu8bitalu)}
  297. { operand size describing an unsigned value in a pair of int registers }
  298. OS_PAIR = OS_16;
  299. { operand size describing an signed value in a pair of int registers }
  300. OS_SPAIR = OS_S16;
  301. {$endif}
  302. { Table to convert tcgsize variables to the correspondending
  303. unsigned types }
  304. tcgsize2unsigned : array[tcgsize] of tcgsize = (OS_NO,
  305. OS_8,OS_16,OS_32,OS_64,OS_128,OS_8,OS_16,OS_32,OS_64,OS_128,
  306. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  307. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,OS_M8,OS_M16,OS_M32,
  308. OS_M64,OS_M128,OS_M256);
  309. tcgsize2signed : array[tcgsize] of tcgsize = (OS_NO,
  310. OS_S8,OS_S16,OS_S32,OS_S64,OS_S128,OS_S8,OS_S16,OS_S32,OS_S64,OS_S128,
  311. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  312. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,OS_M8,OS_M16,OS_M32,
  313. OS_M64,OS_M128,OS_M256);
  314. tcgloc2str : array[TCGLoc] of string[12] = (
  315. 'LOC_INVALID',
  316. 'LOC_VOID',
  317. 'LOC_CONST',
  318. 'LOC_JUMP',
  319. 'LOC_FLAGS',
  320. 'LOC_REG',
  321. 'LOC_CREG',
  322. 'LOC_FPUREG',
  323. 'LOC_CFPUREG',
  324. 'LOC_MMXREG',
  325. 'LOC_CMMXREG',
  326. 'LOC_MMREG',
  327. 'LOC_CMMREG',
  328. 'LOC_SSETREG',
  329. 'LOC_CSSETREG',
  330. 'LOC_SSETREF',
  331. 'LOC_CSSETREF',
  332. 'LOC_CREF',
  333. 'LOC_REF'
  334. );
  335. var
  336. mms_movescalar : pmmshuffle;
  337. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  338. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  339. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  340. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  341. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  342. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  343. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  344. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  345. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  346. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  347. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  348. function generic_regname(r:tregister):string;
  349. {# From a constant numeric value, return the abstract code generator
  350. size.
  351. }
  352. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  353. function int_float_cgsize(const a: tcgint): tcgsize;
  354. function tcgsize2str(cgsize: tcgsize):string;
  355. { return the inverse condition of opcmp }
  356. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  357. { return the opcmp needed when swapping the operands }
  358. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  359. { return whether op is commutative }
  360. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  361. { returns true, if shuffle describes a real shuffle operation and not only a move }
  362. function realshuffle(shuffle : pmmshuffle) : boolean;
  363. { returns true, if the shuffle describes only a move of the scalar at index 0 }
  364. function shufflescalar(shuffle : pmmshuffle) : boolean;
  365. { removes shuffling from shuffle, this means that the destenation index of each shuffle is copied to
  366. the source }
  367. procedure removeshuffles(var shuffle : tmmshuffle);
  368. implementation
  369. uses
  370. verbose;
  371. {******************************************************************************
  372. tsuperregisterworklist
  373. ******************************************************************************}
  374. constructor tsuperregisterworklist.init;
  375. begin
  376. length:=0;
  377. buflength:=0;
  378. buflengthinc:=16;
  379. buf:=nil;
  380. end;
  381. constructor Tsuperregisterworklist.copyfrom(const x:Tsuperregisterworklist);
  382. begin
  383. self:=x;
  384. if x.buf<>nil then
  385. begin
  386. getmem(buf,buflength*sizeof(Tsuperregister));
  387. move(x.buf^,buf^,length*sizeof(Tsuperregister));
  388. end;
  389. end;
  390. destructor tsuperregisterworklist.done;
  391. begin
  392. if assigned(buf) then
  393. freemem(buf);
  394. end;
  395. procedure tsuperregisterworklist.add(s:tsuperregister);
  396. begin
  397. inc(length);
  398. { Need to increase buffer length? }
  399. if length>=buflength then
  400. begin
  401. inc(buflength,buflengthinc);
  402. buflengthinc:=buflengthinc*2;
  403. if buflengthinc>256 then
  404. buflengthinc:=256;
  405. reallocmem(buf,buflength*sizeof(Tsuperregister));
  406. end;
  407. buf^[length-1]:=s;
  408. end;
  409. function tsuperregisterworklist.addnodup(s:tsuperregister): boolean;
  410. begin
  411. addnodup := false;
  412. if indexword(buf^,length,s) = -1 then
  413. begin
  414. add(s);
  415. addnodup := true;
  416. end;
  417. end;
  418. procedure tsuperregisterworklist.clear;
  419. begin
  420. length:=0;
  421. end;
  422. procedure tsuperregisterworklist.deleteidx(i:word);
  423. begin
  424. if i>=length then
  425. internalerror(200310144);
  426. buf^[i]:=buf^[length-1];
  427. dec(length);
  428. end;
  429. function tsuperregisterworklist.readidx(i:word):tsuperregister;
  430. begin
  431. if (i >= length) then
  432. internalerror(2005010601);
  433. result := buf^[i];
  434. end;
  435. function tsuperregisterworklist.get:tsuperregister;
  436. begin
  437. if length=0 then
  438. internalerror(200310142);
  439. get:=buf^[0];
  440. buf^[0]:=buf^[length-1];
  441. dec(length);
  442. end;
  443. function tsuperregisterworklist.delete(s:tsuperregister):boolean;
  444. var
  445. i:longint;
  446. begin
  447. delete:=false;
  448. { indexword in 1.0.x and 1.9.4 is broken }
  449. i:=indexword(buf^,length,s);
  450. if i<>-1 then
  451. begin
  452. deleteidx(i);
  453. delete := true;
  454. end;
  455. end;
  456. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  457. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  458. begin
  459. fillchar(regs,(maxreg+7) shr 3,-byte(setall));
  460. end;
  461. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  462. begin
  463. include(regs[s shr 8],(s and $ff));
  464. end;
  465. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  466. begin
  467. exclude(regs[s shr 8],(s and $ff));
  468. end;
  469. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  470. begin
  471. result:=(s and $ff) in regs[s shr 8];
  472. end;
  473. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  474. begin
  475. tregisterrec(result).regtype:=rt;
  476. tregisterrec(result).supreg:=sr;
  477. tregisterrec(result).subreg:=sb;
  478. end;
  479. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  480. begin
  481. result:=tregisterrec(r).subreg;
  482. end;
  483. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  484. begin
  485. result:=tregisterrec(r).supreg;
  486. end;
  487. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  488. begin
  489. result:=tregisterrec(r).regtype;
  490. end;
  491. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  492. begin
  493. tregisterrec(r).subreg:=sr;
  494. end;
  495. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  496. begin
  497. tregisterrec(r).supreg:=sr;
  498. end;
  499. function generic_regname(r:tregister):string;
  500. var
  501. nr : string[12];
  502. begin
  503. str(getsupreg(r),nr);
  504. case getregtype(r) of
  505. R_INTREGISTER:
  506. result:='ireg'+nr;
  507. R_FPUREGISTER:
  508. result:='freg'+nr;
  509. R_MMREGISTER:
  510. result:='mreg'+nr;
  511. R_MMXREGISTER:
  512. result:='xreg'+nr;
  513. R_ADDRESSREGISTER:
  514. result:='areg'+nr;
  515. R_SPECIALREGISTER:
  516. result:='sreg'+nr;
  517. else
  518. begin
  519. result:='INVALID';
  520. exit;
  521. end;
  522. end;
  523. case getsubreg(r) of
  524. R_SUBNONE:
  525. ;
  526. R_SUBL:
  527. result:=result+'l';
  528. R_SUBH:
  529. result:=result+'h';
  530. R_SUBW:
  531. result:=result+'w';
  532. R_SUBD:
  533. result:=result+'d';
  534. R_SUBQ:
  535. result:=result+'q';
  536. R_SUBFS:
  537. result:=result+'fs';
  538. R_SUBFD:
  539. result:=result+'fd';
  540. R_SUBMMD:
  541. result:=result+'md';
  542. R_SUBMMS:
  543. result:=result+'ms';
  544. R_SUBMMWHOLE:
  545. result:=result+'ma';
  546. R_SUBMMX:
  547. result:=result+'mx';
  548. R_SUBMMY:
  549. result:=result+'my';
  550. else
  551. internalerror(200308252);
  552. end;
  553. end;
  554. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  555. const
  556. size2cgsize : array[0..8] of tcgsize = (
  557. OS_NO,OS_8,OS_16,OS_NO,OS_32,OS_NO,OS_NO,OS_NO,OS_64
  558. );
  559. begin
  560. {$ifdef cpu64bitalu}
  561. if a=16 then
  562. result:=OS_128
  563. else
  564. {$endif cpu64bitalu}
  565. if a>8 then
  566. result:=OS_NO
  567. else
  568. result:=size2cgsize[a];
  569. end;
  570. function int_float_cgsize(const a: tcgint): tcgsize;
  571. begin
  572. case a of
  573. 4 :
  574. result:=OS_F32;
  575. 8 :
  576. result:=OS_F64;
  577. 10 :
  578. result:=OS_F80;
  579. 16 :
  580. result:=OS_F128;
  581. else
  582. internalerror(200603211);
  583. end;
  584. end;
  585. function tcgsize2str(cgsize: tcgsize):string;
  586. begin
  587. Str(cgsize, Result);
  588. end;
  589. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  590. const
  591. list: array[TOpCmp] of TOpCmp =
  592. (OC_NONE,OC_NE,OC_LTE,OC_GTE,OC_LT,OC_GT,OC_EQ,OC_A,OC_AE,
  593. OC_B,OC_BE);
  594. begin
  595. inverse_opcmp := list[opcmp];
  596. end;
  597. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  598. const
  599. list: array[TOpCmp] of TOpCmp =
  600. (OC_NONE,OC_EQ,OC_LT,OC_GT,OC_LTE,OC_GTE,OC_NE,OC_AE,OC_A,
  601. OC_BE,OC_B);
  602. begin
  603. swap_opcmp := list[opcmp];
  604. end;
  605. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  606. const
  607. list: array[topcg] of boolean =
  608. (true,false,true,true,false,false,true,true,false,false,
  609. true,false,false,false,false,true,false,false);
  610. begin
  611. commutativeop := list[op];
  612. end;
  613. function realshuffle(shuffle : pmmshuffle) : boolean;
  614. var
  615. i : longint;
  616. begin
  617. realshuffle:=true;
  618. if (shuffle=nil) or (shuffle^.len=0) then
  619. realshuffle:=false
  620. else
  621. begin
  622. for i:=1 to shuffle^.len do
  623. begin
  624. if (shuffle^.shuffles[i] and $f)<>((shuffle^.shuffles[i] and $f0) shr 4) then
  625. exit;
  626. end;
  627. realshuffle:=false;
  628. end;
  629. end;
  630. function shufflescalar(shuffle : pmmshuffle) : boolean;
  631. begin
  632. result:=shuffle^.len=0;
  633. end;
  634. procedure removeshuffles(var shuffle : tmmshuffle);
  635. var
  636. i : longint;
  637. begin
  638. if shuffle.len=0 then
  639. exit;
  640. for i:=1 to shuffle.len do
  641. shuffle.shuffles[i]:=(shuffle.shuffles[i] and $f) or ((shuffle.shuffles[i] and $f0) shr 4);
  642. end;
  643. initialization
  644. new(mms_movescalar);
  645. mms_movescalar^.len:=0;
  646. finalization
  647. dispose(mms_movescalar);
  648. end.