sergei 578348817b * MIPS: some progress with linker: 9 rokov pred
..
aasmcpu.pas e23ed15634 * MIPS: reworked and fixed procedure fixup_jmps: 9 rokov pred
aoptcpu.pas 41751bc5b4 + Next portion of MIPS peephole optimizations. Get more aggressive and do more than a single pass if needed, enabling optimization of instructions that logically turn into MOVE due to register renaming. 9 rokov pred
aoptcpub.pas 93e0dd9c2f * Patch from Fuxin Zhang: other mips and mipsel CPUs changes 13 rokov pred
aoptcpud.pas 0c8546f94c * more MIPS code of David Zhang integrated 15 rokov pred
cgcpu.pas 5456960d54 * MIPS: Fixed code generation for PIC calls to local functions. Uncovered by r32803, before that the buggy branch was never taken because all functions were global. 9 rokov pred
cpubase.pas c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
cpuelf.pas 578348817b * MIPS: some progress with linker: 9 rokov pred
cpugas.pas ed2488eb03 - MIPS: removed the ugly hack of splitting LDC1/SDC1 instructions into pairs of LWC1/SWC1 at assembler writer level. It probably was there as a workaround for insufficient alignment of double-precision variables, which was present once, but fixed a long time ago. 9 rokov pred
cpuinfo.pas 3cb9be73bc Moved tcontrollerdatatype out into cpuinfo. 10 rokov pred
cpunode.pas b57c95043f + support overriding tdef/tsym methods with target-specific functionality: 11 rokov pred
cpupara.pas fa3b0ca312 * support marking defs created via the getreusable*() class methods as 9 rokov pred
cpupi.pas 96dd464bf2 * Moved fixup_jmps to target-specific classes for powerpc,powerpc64 and MIPS, cleaned out remaining $ifdef's. A slight functionality change is that fixup_jmps is now called before adding the procedure end symbol, not after, but that should not matter. 11 rokov pred
cputarg.pas b2b26f84cf * partially merged the mips-embedded branch of Michael Ring: 11 rokov pred
hlcgcpu.pas b745dcc64c * moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because 11 rokov pred
itcpugas.pas 11a9ff4a43 * Removed unused vars for mipsel compiler. 10 rokov pred
mipsreg.dat e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 11 rokov pred
ncpuadd.pas 11a9ff4a43 * Removed unused vars for mipsel compiler. 10 rokov pred
ncpucall.pas 87684e1cf1 * MIPS: clean up 11 rokov pred
ncpucnv.pas 0fc1fd6ac1 * replaced current_procinfo.currtrue/falselabel with storing the true/false 10 rokov pred
ncpuinln.pas 4065483a50 * completed thlcgobj.location_force_fpureg(), use it everywhere and removed 11 rokov pred
ncpuld.pas 4b820a1ca5 - Removed tcgloadnode.generate_picvaraccess, it is never used and is not necessary because PIC stuff is handled at lower levels. 12 rokov pred
ncpumat.pas 7949bebb8d * synchronised with r28168 of trunk 11 rokov pred
ncpuset.pas 11a9ff4a43 * Removed unused vars for mipsel compiler. 10 rokov pred
opcode.inc 4e7c908b0d + MIPS: added movn and movz instructions. 11 rokov pred
racpugas.pas cc3e09ee46 * Handle possible relocation types in assembler reader using a single AS_RELTYPE token, rather than with individual tokens for each case. Since possible relocations are target-dependent, this will allow to support any amount of them without modifying the base tattreader class. 9 rokov pred
rgcpu.pas 67b8aceaee * synchronized with privatetrunk till r30095 10 rokov pred
rmipscon.inc e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 11 rokov pred
rmipsdwf.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipsgas.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipsgri.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipsgss.inc f58fcdf401 + basic mips stuff 20 rokov pred
rmipsnor.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipsnum.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipsrni.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipssri.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipssta.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipsstd.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipssup.inc e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 11 rokov pred
strinst.inc 4e7c908b0d + MIPS: added movn and movz instructions. 11 rokov pred
symcpu.pas 7dd1d6aa77 o fixes handling of iso i/o parameters/program parameters: 10 rokov pred