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aasmcpu.pas
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406e3c4ac1
+ support xgetbv instruction, resolves issue #29958
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9 years ago |
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agx86att.pas
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1c0c944311
Added x86_64-embedded target. Patch from Benjamin Rosseaux
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9 years ago |
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agx86int.pas
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90b284e169
+ generate .debug_aranges sections for dwarf debug info: enables faster address to debug info translation
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9 years ago |
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agx86nsm.pas
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90b284e169
+ generate .debug_aranges sections for dwarf debug info: enables faster address to debug info translation
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9 years ago |
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aoptx86.pas
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c40240990e
* popt386 uses now also all routines of aoptx86
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10 years ago |
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cga.pas
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d88d644925
+ support for FMA intrinsic: if there is no hardware support, the compiler throws an error.
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11 years ago |
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cgx86.pas
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c4343c1a2d
* don't call make_simple_ref in tcgx86.g_concatcopy on i8086, because that
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9 years ago |
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cpubase.pas
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2861362780
* Reuse binary search routine from rgbase.pas to look up AT&T register names, removes need in regnumber_count_bsstart constant. Resolves #29471.
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9 years ago |
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hlcgx86.pas
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67b8aceaee
* synchronized with privatetrunk till r30095
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10 years ago |
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itcpugas.pas
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2861362780
* Reuse binary search routine from rgbase.pas to look up AT&T register names, removes need in regnumber_count_bsstart constant. Resolves #29471.
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9 years ago |
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itx86int.pas
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0e41df598e
* merge i8086 branch by Nikolay Nikolov
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12 years ago |
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ni86mem.pas
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4a79481c51
* isolated segment-related functionality of tabsolutevarsym into i386/i8086-
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11 years ago |
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nx86add.pas
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da696057ab
* converted register_maybe_adjust_setbase() to the high level code generator
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10 years ago |
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nx86cal.pas
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8046826e4e
+ also allow x86 call ref for references that contain only non-imaginary registers (no infinite spilling problems there either)
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10 years ago |
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nx86cnv.pas
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0fc1fd6ac1
* replaced current_procinfo.currtrue/falselabel with storing the true/false
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10 years ago |
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nx86con.pas
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45f60bc4b5
* small changes (copyright, typo, readability)
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13 years ago |
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nx86inl.pas
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da696057ab
* converted register_maybe_adjust_setbase() to the high level code generator
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10 years ago |
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nx86ld.pas
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c4449fc5e6
nx86ld.pas, tx86loadnode:
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9 years ago |
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nx86mat.pas
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374148b966
* fixed compilation of 8086 compiler.
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10 years ago |
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nx86mem.pas
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d6de2c03cb
* generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe
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10 years ago |
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nx86set.pas
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da696057ab
* converted register_maybe_adjust_setbase() to the high level code generator
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10 years ago |
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rax86.pas
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8d5cc3dfa4
* (extended and modified) patch by Emelyanov Roman to add suport of RDRAND, RDSEED and TSX instructions set, resolves issue #29893.
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9 years ago |
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rax86att.pas
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42d251da1c
- x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability.
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11 years ago |
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rax86int.pas
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f69f6336e9
* Replaced hacks with resetting 'c' to zero and decreasing inputpointer by boolean parameter to skipcomment and skipoldtpcomment. This parameter specifies whether first character of comment should be read.
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10 years ago |
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rgx86.pas
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7949bebb8d
* synchronised with r28168 of trunk
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11 years ago |
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symi86.pas
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4f7b4a2735
* changed {$ifdef x86} code in defcmp into virtual methods
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10 years ago |
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symx86.pas
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33d711794e
* adaptation for symx86 to r32340
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10 years ago |
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x86ins.dat
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406e3c4ac1
+ support xgetbv instruction, resolves issue #29958
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9 years ago |
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x86reg.dat
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
florian
90b284e169
+ generate .debug_aranges sections for dwarf debug info: enables faster address to debug info translation