florian 63c4bc29ba * cleanup il y a 3 semaines
..
aoptcpu.pas 63c4bc29ba * cleanup il y a 3 semaines
aoptcpub.pas 9b0ff05ee8 - get rid of MaxOps, it is redundant with max_operands il y a 7 ans
aoptcpuc.pas ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. il y a 7 ans
aoptcpud.pas ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. il y a 7 ans
cgcpu.pas 831a46eb2f + more sext.b usage il y a 7 mois
cpuinfo.pas f65994ddcb + RiscV: flags for crypotography extensions il y a 6 mois
cpunode.pas 971d97c179 + RiscV: make use of the fmv.w.x/fmv.d.x instruction to load 0.0 il y a 9 mois
cpupara.pas b7608b045b * RiscV: push_addr_param unified il y a 9 mois
cpupi.pas 281b3ad276 * fix case completeness and unreachable code warnings in compiler that would il y a 6 ans
cputarg.pas d1fb44044f * unified RiscV32 and RiscV64 GAS readers il y a 4 ans
hlcgcpu.pas d4c9e1f260 Replace outdated cgop2string function by tcgsize2str function from cgbase unit to fix EXTDEBUG cycle on powerpc64le-linux il y a 5 ans
nrv64add.pas 95c2a5a2d7 + RiscV: support ZMMUL extension il y a 8 mois
nrv64cal.pas ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. il y a 7 ans
nrv64cnv.pas f3b7e3281a * fix int to real for non-register locations il y a 7 ans
nrv64ld.pas ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. il y a 7 ans
nrv64mat.pas c4c71d362c * fix RiscV64 building il y a 3 semaines
rrv64con.inc 8d0bdf2f16 + RiscV: vector registers il y a 9 mois
rrv64dwa.inc 8d0bdf2f16 + RiscV: vector registers il y a 9 mois
rrv64nor.inc 8d0bdf2f16 + RiscV: vector registers il y a 9 mois
rrv64num.inc 8d0bdf2f16 + RiscV: vector registers il y a 9 mois
rrv64rni.inc 8d0bdf2f16 + RiscV: vector registers il y a 9 mois
rrv64sri.inc 8d0bdf2f16 + RiscV: vector registers il y a 9 mois
rrv64sta.inc 8d0bdf2f16 + RiscV: vector registers il y a 9 mois
rrv64std.inc 8d0bdf2f16 + RiscV: vector registers il y a 9 mois
rrv64sup.inc 8d0bdf2f16 + RiscV: vector registers il y a 9 mois
symcpu.pas ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk. il y a 7 ans
tripletcpu.pas 52147baa04 * correct tripletcpustr, resolves #40301 il y a 2 ans