attiny827.pp 54 KB

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  1. unit ATtiny827;
  2. interface
  3. type
  4. TAC = object //Analog Comparator
  5. CTRLA: byte; //Control A
  6. Reserved1: byte;
  7. MUXCTRLA: byte; //Mux Control A
  8. Reserved3: byte;
  9. DACREF: byte; //Referance scale control
  10. Reserved5: byte;
  11. INTCTRL: byte; //Interrupt Control
  12. STATUS: byte; //Status
  13. const
  14. // Enable
  15. ENABLEbm = $01;
  16. // AC_HYSMODE
  17. HYSMODEmask = $06;
  18. HYSMODE_OFF = $00;
  19. HYSMODE_10mV = $02;
  20. HYSMODE_25mV = $04;
  21. HYSMODE_50mV = $06;
  22. // AC_LPMODE
  23. LPMODEmask = $08;
  24. LPMODE_DIS = $00;
  25. LPMODE_EN = $08;
  26. // AC_INTMODE
  27. INTMODEmask = $30;
  28. INTMODE_BOTHEDGE = $00;
  29. INTMODE_NEGEDGE = $20;
  30. INTMODE_POSEDGE = $30;
  31. // Output Buffer Enable
  32. OUTENbm = $40;
  33. // Run in Standby Mode
  34. RUNSTDBYbm = $80;
  35. // AC_MUXNEG
  36. MUXNEGmask = $03;
  37. MUXNEG_AINN0 = $00;
  38. MUXNEG_AINN1 = $01;
  39. MUXNEG_AINN2 = $02;
  40. MUXNEG_DACREF = $03;
  41. // AC_MUXPOS
  42. MUXPOSmask = $18;
  43. MUXPOS_AINP0 = $00;
  44. MUXPOS_AINP1 = $08;
  45. MUXPOS_AINP2 = $10;
  46. MUXPOS_AINP3 = $18;
  47. // Invert AC Output
  48. INVERTbm = $80;
  49. // DACREF Data Value
  50. DACREF0bm = $01;
  51. DACREF1bm = $02;
  52. DACREF2bm = $04;
  53. DACREF3bm = $08;
  54. DACREF4bm = $10;
  55. DACREF5bm = $20;
  56. DACREF6bm = $40;
  57. DACREF7bm = $80;
  58. // Analog Comparator 0 Interrupt Enable
  59. CMPbm = $01;
  60. // Analog Comparator State
  61. STATEbm = $10;
  62. end;
  63. TADC = object //Analog to Digital Converter
  64. CTRLA: byte; //Control A
  65. CTRLB: byte; //Control B
  66. CTRLC: byte; //Control C
  67. CTRLD: byte; //Control D
  68. INTCTRL: byte; //Interrupt Control
  69. INTFLAGS: byte; //Interrupt Flags
  70. STATUS: byte; //Status register
  71. DBGCTRL: byte; //Debug Control
  72. CTRLE: byte; //Control E
  73. CTRLF: byte; //Control F
  74. COMMAND: byte; //Command register
  75. PGACTRL: byte; //PGA Control
  76. MUXPOS: byte; //Positive mux input
  77. MUXNEG: byte; //Negative mux input
  78. Reserved14: byte;
  79. Reserved15: byte;
  80. RESULT: dword; //Result
  81. SAMPLE: word; //Sample
  82. Reserved22: byte;
  83. Reserved23: byte;
  84. TEMP0: byte; //Temporary Data 0
  85. TEMP1: byte; //Temporary Data 1
  86. TEMP2: byte; //Temporary Data 2
  87. Reserved27: byte;
  88. WINLT: word; //Window Low Threshold
  89. WINHT: word; //Window High Threshold
  90. const
  91. // ADC Enable
  92. ENABLEbm = $01;
  93. // ADC Low latency mode
  94. LOWLATbm = $20;
  95. // Run standby mode
  96. RUNSTDBYbm = $80;
  97. // ADC_PRESC
  98. PRESCmask = $0F;
  99. PRESC_DIV2 = $00;
  100. PRESC_DIV4 = $01;
  101. PRESC_DIV6 = $02;
  102. PRESC_DIV8 = $03;
  103. PRESC_DIV10 = $04;
  104. PRESC_DIV12 = $05;
  105. PRESC_DIV14 = $06;
  106. PRESC_DIV16 = $07;
  107. PRESC_DIV20 = $08;
  108. PRESC_DIV24 = $09;
  109. PRESC_DIV28 = $0A;
  110. PRESC_DIV32 = $0B;
  111. PRESC_DIV40 = $0C;
  112. PRESC_DIV48 = $0D;
  113. PRESC_DIV56 = $0E;
  114. PRESC_DIV64 = $0F;
  115. // ADC_REFSEL
  116. REFSELmask = $07;
  117. REFSEL_VDD = $00;
  118. REFSEL_VREFA = $02;
  119. REFSEL_1024MV = $04;
  120. REFSEL_2048MV = $05;
  121. REFSEL_2500MV = $06;
  122. REFSEL_4096MV = $07;
  123. // Reference Selection
  124. TIMEBASE0bm = $08;
  125. TIMEBASE1bm = $10;
  126. TIMEBASE2bm = $20;
  127. TIMEBASE3bm = $40;
  128. TIMEBASE4bm = $80;
  129. // ADC_WINCM
  130. WINCMmask = $07;
  131. WINCM_NONE = $00;
  132. WINCM_BELOW = $01;
  133. WINCM_ABOVE = $02;
  134. WINCM_INSIDE = $03;
  135. WINCM_OUTSIDE = $04;
  136. // ADC_WINSRC
  137. WINSRCmask = $08;
  138. WINSRC_RESULT = $00;
  139. WINSRC_SAMPLE = $08;
  140. // Result Ready Interrupt Enable
  141. RESRDYbm = $01;
  142. // Sample Ready Interrupt Enable
  143. SAMPRDYbm = $02;
  144. // Window Comparator Interrupt Enable
  145. WCMPbm = $04;
  146. // Result Overwritten Interrupt Enable
  147. RESOVRbm = $08;
  148. // Sample Overwritten Interrupt Enable
  149. SAMPOVRbm = $10;
  150. // Trigger Overrun Interrupt Enable
  151. TRIGOVRbm = $20;
  152. // ADC Busy
  153. ADCBUSYbm = $01;
  154. // Debug run
  155. DBGRUNbm = $01;
  156. // Sampling time
  157. SAMPDUR0bm = $01;
  158. SAMPDUR1bm = $02;
  159. SAMPDUR2bm = $04;
  160. SAMPDUR3bm = $08;
  161. SAMPDUR4bm = $10;
  162. SAMPDUR5bm = $20;
  163. SAMPDUR6bm = $40;
  164. SAMPDUR7bm = $80;
  165. // ADC_SAMPNUM
  166. SAMPNUMmask = $0F;
  167. SAMPNUM_NONE = $00;
  168. SAMPNUM_ACC2 = $01;
  169. SAMPNUM_ACC4 = $02;
  170. SAMPNUM_ACC8 = $03;
  171. SAMPNUM_ACC16 = $04;
  172. SAMPNUM_ACC32 = $05;
  173. SAMPNUM_ACC64 = $06;
  174. SAMPNUM_ACC128 = $07;
  175. SAMPNUM_ACC256 = $08;
  176. SAMPNUM_ACC512 = $09;
  177. SAMPNUM_ACC1024 = $0A;
  178. // Left adjust
  179. LEFTADJbm = $10;
  180. // Free running mode
  181. FREERUNbm = $20;
  182. // ADC_START
  183. STARTmask = $07;
  184. START_STOP = $00;
  185. START_IMMEDIATE = $01;
  186. START_MUXPOS_WRITE = $02;
  187. START_MUXNEG_WRITE = $03;
  188. START_EVENT_TRIGGER = $04;
  189. // ADC_MODE
  190. MODEmask = $70;
  191. MODE_SINGLE_8BIT = $00;
  192. MODE_SINGLE_12BIT = $10;
  193. MODE_SERIES = $20;
  194. MODE_SERIES_SCALING = $30;
  195. MODE_BURST = $40;
  196. MODE_BURST_SCALING = $50;
  197. // Differential mode
  198. DIFFbm = $80;
  199. // PGA Enable
  200. PGAENbm = $01;
  201. // ADC_ADCPGASAMPDUR
  202. ADCPGASAMPDURmask = $06;
  203. ADCPGASAMPDUR_6CLK = $00;
  204. ADCPGASAMPDUR_15CLK = $02;
  205. ADCPGASAMPDUR_20CLK = $04;
  206. // ADC_PGABIASSEL
  207. PGABIASSELmask = $18;
  208. PGABIASSEL_1X = $00;
  209. PGABIASSEL_3_4X = $08;
  210. PGABIASSEL_1_2X = $10;
  211. PGABIASSEL_1_4X = $18;
  212. // ADC_GAIN
  213. GAINmask = $E0;
  214. GAIN_1X = $00;
  215. GAIN_2X = $20;
  216. GAIN_4X = $40;
  217. GAIN_8X = $60;
  218. GAIN_16X = $80;
  219. // ADC_MUXPOS
  220. MUXPOSmask = $3F;
  221. MUXPOS_AIN1 = $01;
  222. MUXPOS_AIN2 = $02;
  223. MUXPOS_AIN3 = $03;
  224. MUXPOS_AIN4 = $04;
  225. MUXPOS_AIN5 = $05;
  226. MUXPOS_AIN6 = $06;
  227. MUXPOS_AIN7 = $07;
  228. MUXPOS_AIN8 = $08;
  229. MUXPOS_AIN9 = $09;
  230. MUXPOS_AIN10 = $0A;
  231. MUXPOS_AIN11 = $0B;
  232. MUXPOS_AIN12 = $0C;
  233. MUXPOS_AIN13 = $0D;
  234. MUXPOS_AIN14 = $0E;
  235. MUXPOS_AIN15 = $0F;
  236. MUXPOS_GND = $30;
  237. MUXPOS_VDDDIV10 = $31;
  238. MUXPOS_TEMPSENSE = $32;
  239. MUXPOS_DACREF0 = $33;
  240. // ADC_VIA
  241. VIAmask = $C0;
  242. VIA_ADC = $00;
  243. VIA_PGA = $40;
  244. // ADC_MUXNEG
  245. MUXNEGmask = $3F;
  246. MUXNEG_AIN1 = $01;
  247. MUXNEG_AIN2 = $02;
  248. MUXNEG_AIN3 = $03;
  249. MUXNEG_AIN4 = $04;
  250. MUXNEG_AIN5 = $05;
  251. MUXNEG_AIN6 = $06;
  252. MUXNEG_AIN7 = $07;
  253. MUXNEG_GND = $30;
  254. MUXNEG_VDDDIV10 = $31;
  255. MUXNEG_DACREF0 = $33;
  256. // Temporary
  257. TEMP0bm = $01;
  258. TEMP1bm = $02;
  259. TEMP2bm = $04;
  260. TEMP3bm = $08;
  261. TEMP4bm = $10;
  262. TEMP5bm = $20;
  263. TEMP6bm = $40;
  264. TEMP7bm = $80;
  265. end;
  266. TBOD = object //Bod interface
  267. CTRLA: byte; //Control A
  268. CTRLB: byte; //Control B
  269. Reserved2: byte;
  270. Reserved3: byte;
  271. Reserved4: byte;
  272. Reserved5: byte;
  273. Reserved6: byte;
  274. Reserved7: byte;
  275. VLMCTRLA: byte; //Voltage level monitor Control
  276. INTCTRL: byte; //Voltage level monitor interrupt Control
  277. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  278. STATUS: byte; //Voltage level monitor status
  279. const
  280. // BOD_SLEEP
  281. SLEEPmask = $03;
  282. SLEEP_DIS = $00;
  283. SLEEP_ENABLED = $01;
  284. SLEEP_SAMPLED = $02;
  285. // BOD_ACTIVE
  286. ACTIVEmask = $0C;
  287. ACTIVE_DIS = $00;
  288. ACTIVE_ENABLED = $04;
  289. ACTIVE_SAMPLED = $08;
  290. ACTIVE_ENWAKE = $0C;
  291. // BOD_SAMPFREQ
  292. SAMPFREQmask = $10;
  293. SAMPFREQ_1KHZ = $00;
  294. SAMPFREQ_125HZ = $10;
  295. // BOD_LVL
  296. LVLmask = $07;
  297. LVL_BODLEVEL0 = $00;
  298. LVL_BODLEVEL2 = $02;
  299. LVL_BODLEVEL7 = $07;
  300. // BOD_VLMLVL
  301. VLMLVLmask = $03;
  302. VLMLVL_5ABOVE = $00;
  303. VLMLVL_15ABOVE = $01;
  304. VLMLVL_25ABOVE = $02;
  305. // voltage level monitor interrrupt enable
  306. VLMIEbm = $01;
  307. // BOD_VLMCFG
  308. VLMCFGmask = $06;
  309. VLMCFG_BELOW = $00;
  310. VLMCFG_ABOVE = $02;
  311. VLMCFG_CROSS = $04;
  312. // Voltage level monitor interrupt flag
  313. VLMIFbm = $01;
  314. // Voltage level monitor status
  315. VLMSbm = $01;
  316. end;
  317. TCCL = object //Configurable Custom Logic
  318. CTRLA: byte; //Control Register A
  319. SEQCTRL0: byte; //Sequential Control 0
  320. SEQCTRL1: byte; //Sequential Control 1
  321. Reserved3: byte;
  322. Reserved4: byte;
  323. INTCTRL0: byte; //Interrupt Control 0
  324. Reserved6: byte;
  325. INTFLAGS: byte; //Interrupt Flags
  326. LUT0CTRLA: byte; //LUT 0 Control A
  327. LUT0CTRLB: byte; //LUT 0 Control B
  328. LUT0CTRLC: byte; //LUT 0 Control C
  329. TRUTH0: byte; //Truth 0
  330. LUT1CTRLA: byte; //LUT 1 Control A
  331. LUT1CTRLB: byte; //LUT 1 Control B
  332. LUT1CTRLC: byte; //LUT 1 Control C
  333. TRUTH1: byte; //Truth 1
  334. LUT2CTRLA: byte; //LUT 2 Control A
  335. LUT2CTRLB: byte; //LUT 2 Control B
  336. LUT2CTRLC: byte; //LUT 2 Control C
  337. TRUTH2: byte; //Truth 2
  338. LUT3CTRLA: byte; //LUT 3 Control A
  339. LUT3CTRLB: byte; //LUT 3 Control B
  340. LUT3CTRLC: byte; //LUT 3 Control C
  341. TRUTH3: byte; //Truth 3
  342. const
  343. // Enable
  344. ENABLEbm = $01;
  345. // Run in Standby
  346. RUNSTDBYbm = $40;
  347. // CCL_SEQSEL
  348. SEQSELmask = $07;
  349. SEQSEL_DISABLE = $00;
  350. SEQSEL_DFF = $01;
  351. SEQSEL_JK = $02;
  352. SEQSEL_LATCH = $03;
  353. SEQSEL_RS = $04;
  354. // CCL_INTMODE0
  355. INTMODE0mask = $03;
  356. INTMODE0_INTDISABLE = $00;
  357. INTMODE0_RISING = $01;
  358. INTMODE0_FALLING = $02;
  359. INTMODE0_BOTH = $03;
  360. // CCL_INTMODE1
  361. INTMODE1mask = $0C;
  362. INTMODE1_INTDISABLE = $00;
  363. INTMODE1_RISING = $04;
  364. INTMODE1_FALLING = $08;
  365. INTMODE1_BOTH = $0C;
  366. // CCL_INTMODE2
  367. INTMODE2mask = $30;
  368. INTMODE2_INTDISABLE = $00;
  369. INTMODE2_RISING = $10;
  370. INTMODE2_FALLING = $20;
  371. INTMODE2_BOTH = $30;
  372. // CCL_INTMODE3
  373. INTMODE3mask = $C0;
  374. INTMODE3_INTDISABLE = $00;
  375. INTMODE3_RISING = $40;
  376. INTMODE3_FALLING = $80;
  377. INTMODE3_BOTH = $C0;
  378. // Interrupt Flag
  379. INT0bm = $01;
  380. INT1bm = $02;
  381. INT2bm = $04;
  382. INT3bm = $08;
  383. // CCL_CLKSRC
  384. CLKSRCmask = $0E;
  385. CLKSRC_CLKPER = $00;
  386. CLKSRC_IN2 = $02;
  387. CLKSRC_OSC20M = $08;
  388. CLKSRC_OSCULP32K = $0A;
  389. CLKSRC_OSCULP1K = $0C;
  390. // CCL_FILTSEL
  391. FILTSELmask = $30;
  392. FILTSEL_DISABLE = $00;
  393. FILTSEL_SYNCH = $10;
  394. FILTSEL_FILTER = $20;
  395. // Output Enable
  396. OUTENbm = $40;
  397. // CCL_EDGEDET
  398. EDGEDETmask = $80;
  399. EDGEDET_DIS = $00;
  400. EDGEDET_EN = $80;
  401. // CCL_INSEL0
  402. INSEL0mask = $0F;
  403. INSEL0_MASK = $00;
  404. INSEL0_FEEDBACK = $01;
  405. INSEL0_LINK = $02;
  406. INSEL0_EVENTA = $03;
  407. INSEL0_EVENTB = $04;
  408. INSEL0_IO = $05;
  409. INSEL0_AC0 = $06;
  410. INSEL0_USART0 = $08;
  411. INSEL0_SPI0 = $09;
  412. INSEL0_TCA0 = $0A;
  413. INSEL0_TCB0 = $0C;
  414. // CCL_INSEL1
  415. INSEL1mask = $F0;
  416. INSEL1_MASK = $00;
  417. INSEL1_FEEDBACK = $10;
  418. INSEL1_LINK = $20;
  419. INSEL1_EVENTA = $30;
  420. INSEL1_EVENTB = $40;
  421. INSEL1_IO = $50;
  422. INSEL1_AC0 = $60;
  423. INSEL1_USART1 = $80;
  424. INSEL1_SPI0 = $90;
  425. INSEL1_TCA0 = $A0;
  426. INSEL1_TCB1 = $C0;
  427. // CCL_INSEL2
  428. INSEL2mask = $0F;
  429. INSEL2_MASK = $00;
  430. INSEL2_FEEDBACK = $01;
  431. INSEL2_LINK = $02;
  432. INSEL2_EVENTA = $03;
  433. INSEL2_EVENTB = $04;
  434. INSEL2_IO = $05;
  435. INSEL2_AC0 = $06;
  436. INSEL2_SPI0 = $09;
  437. INSEL2_TCA0 = $0A;
  438. // Truth Table
  439. TRUTH0bm = $01;
  440. TRUTH1bm = $02;
  441. TRUTH2bm = $04;
  442. TRUTH3bm = $08;
  443. TRUTH4bm = $10;
  444. TRUTH5bm = $20;
  445. TRUTH6bm = $40;
  446. TRUTH7bm = $80;
  447. end;
  448. TCLKCTRL = object //Clock controller
  449. MCLKCTRLA: byte; //MCLK Control A
  450. MCLKCTRLB: byte; //MCLK Control B
  451. MCLKLOCK: byte; //MCLK Lock
  452. MCLKSTATUS: byte; //MCLK Status
  453. Reserved4: byte;
  454. Reserved5: byte;
  455. Reserved6: byte;
  456. Reserved7: byte;
  457. Reserved8: byte;
  458. Reserved9: byte;
  459. Reserved10: byte;
  460. Reserved11: byte;
  461. Reserved12: byte;
  462. Reserved13: byte;
  463. Reserved14: byte;
  464. Reserved15: byte;
  465. OSC20MCTRLA: byte; //OSC20M Control A
  466. OSC20MCALIBA: byte; //OSC20M Calibration A
  467. OSC20MCALIBB: byte; //OSC20M Calibration B
  468. Reserved19: byte;
  469. Reserved20: byte;
  470. Reserved21: byte;
  471. Reserved22: byte;
  472. Reserved23: byte;
  473. OSC32KCTRLA: byte; //OSC32K Control A
  474. Reserved25: byte;
  475. Reserved26: byte;
  476. Reserved27: byte;
  477. XOSC32KCTRLA: byte; //XOSC32K Control A
  478. const
  479. // CLKCTRL_CLKSEL
  480. CLKSELmask = $03;
  481. CLKSEL_OSC20M = $00;
  482. CLKSEL_OSCULP32K = $01;
  483. CLKSEL_XOSC32K = $02;
  484. CLKSEL_EXTCLK = $03;
  485. // System clock out
  486. CLKOUTbm = $80;
  487. // Prescaler enable
  488. PENbm = $01;
  489. // CLKCTRL_PDIV
  490. PDIVmask = $1E;
  491. PDIV_2X = $00;
  492. PDIV_4X = $02;
  493. PDIV_8X = $04;
  494. PDIV_16X = $06;
  495. PDIV_32X = $08;
  496. PDIV_64X = $0A;
  497. PDIV_6X = $10;
  498. PDIV_10X = $12;
  499. PDIV_12X = $14;
  500. PDIV_24X = $16;
  501. PDIV_48X = $18;
  502. // lock ebable
  503. LOCKENbm = $01;
  504. // System Oscillator changing
  505. SOSCbm = $01;
  506. // 20MHz oscillator status
  507. OSC20MSbm = $10;
  508. // 32KHz oscillator status
  509. OSC32KSbm = $20;
  510. // 32.768 kHz Crystal Oscillator status
  511. XOSC32KSbm = $40;
  512. // External Clock status
  513. EXTSbm = $80;
  514. // Run standby
  515. RUNSTDBYbm = $02;
  516. // Calibration
  517. CAL20M0bm = $01;
  518. CAL20M1bm = $02;
  519. CAL20M2bm = $04;
  520. CAL20M3bm = $08;
  521. CAL20M4bm = $10;
  522. CAL20M5bm = $20;
  523. CAL20M6bm = $40;
  524. // Oscillator temperature coefficient
  525. TEMPCAL20M0bm = $01;
  526. TEMPCAL20M1bm = $02;
  527. TEMPCAL20M2bm = $04;
  528. TEMPCAL20M3bm = $08;
  529. // Lock
  530. LOCKbm = $80;
  531. // Enable
  532. ENABLEbm = $01;
  533. // Select
  534. SELbm = $04;
  535. // CLKCTRL_CSUT
  536. CSUTmask = $30;
  537. CSUT_1K = $00;
  538. CSUT_16K = $10;
  539. CSUT_32K = $20;
  540. CSUT_64K = $30;
  541. end;
  542. TCPU = object //CPU
  543. Reserved0: byte;
  544. Reserved1: byte;
  545. Reserved2: byte;
  546. Reserved3: byte;
  547. CCP: byte; //Configuration Change Protection
  548. Reserved5: byte;
  549. Reserved6: byte;
  550. Reserved7: byte;
  551. Reserved8: byte;
  552. Reserved9: byte;
  553. Reserved10: byte;
  554. Reserved11: byte;
  555. Reserved12: byte;
  556. SP: word; //Stack Pointer
  557. SREG: byte; //Status Register
  558. const
  559. // CPU_CCP
  560. CCPmask = $FF;
  561. CCP_SPM = $9D;
  562. CCP_IOREG = $D8;
  563. // Carry Flag
  564. Cbm = $01;
  565. // Zero Flag
  566. Zbm = $02;
  567. // Negative Flag
  568. Nbm = $04;
  569. // Two's Complement Overflow Flag
  570. Vbm = $08;
  571. // N Exclusive Or V Flag
  572. Sbm = $10;
  573. // Half Carry Flag
  574. Hbm = $20;
  575. // Transfer Bit
  576. Tbm = $40;
  577. // Global Interrupt Enable Flag
  578. Ibm = $80;
  579. end;
  580. TCPUINT = object //Interrupt Controller
  581. CTRLA: byte; //Control A
  582. STATUS: byte; //Status
  583. LVL0PRI: byte; //Interrupt Level 0 Priority
  584. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  585. const
  586. // Round-robin Scheduling Enable
  587. LVL0RRbm = $01;
  588. // Compact Vector Table
  589. CVTbm = $20;
  590. // Interrupt Vector Select
  591. IVSELbm = $40;
  592. // Level 0 Interrupt Executing
  593. LVL0EXbm = $01;
  594. // Level 1 Interrupt Executing
  595. LVL1EXbm = $02;
  596. // Non-maskable Interrupt Executing
  597. NMIEXbm = $80;
  598. // Interrupt Level Priority
  599. LVL0PRI0bm = $01;
  600. LVL0PRI1bm = $02;
  601. LVL0PRI2bm = $04;
  602. LVL0PRI3bm = $08;
  603. LVL0PRI4bm = $10;
  604. LVL0PRI5bm = $20;
  605. LVL0PRI6bm = $40;
  606. LVL0PRI7bm = $80;
  607. // Interrupt Vector with High Priority
  608. LVL1VEC0bm = $01;
  609. LVL1VEC1bm = $02;
  610. LVL1VEC2bm = $04;
  611. LVL1VEC3bm = $08;
  612. LVL1VEC4bm = $10;
  613. LVL1VEC5bm = $20;
  614. LVL1VEC6bm = $40;
  615. LVL1VEC7bm = $80;
  616. end;
  617. TCRCSCAN = object //CRCSCAN
  618. CTRLA: byte; //Control A
  619. CTRLB: byte; //Control B
  620. STATUS: byte; //Status
  621. const
  622. // Enable CRC scan
  623. ENABLEbm = $01;
  624. // Enable NMI Trigger
  625. NMIENbm = $02;
  626. // Reset CRC scan
  627. RESETbm = $80;
  628. // CRCSCAN_SRC
  629. SRCmask = $03;
  630. SRC_FLASH = $00;
  631. SRC_APPLICATION = $01;
  632. SRC_BOOT = $02;
  633. // CRCSCAN_MODE
  634. MODEmask = $30;
  635. MODE_PRIORITY = $00;
  636. // CRC Busy
  637. BUSYbm = $01;
  638. // CRC Ok
  639. OKbm = $02;
  640. end;
  641. TEVSYS = object //Event System
  642. SWEVENTA: byte; //Software Event A
  643. Reserved1: byte;
  644. Reserved2: byte;
  645. Reserved3: byte;
  646. Reserved4: byte;
  647. Reserved5: byte;
  648. Reserved6: byte;
  649. Reserved7: byte;
  650. Reserved8: byte;
  651. Reserved9: byte;
  652. Reserved10: byte;
  653. Reserved11: byte;
  654. Reserved12: byte;
  655. Reserved13: byte;
  656. Reserved14: byte;
  657. Reserved15: byte;
  658. CHANNEL0: byte; //Multiplexer Channel 0
  659. CHANNEL1: byte; //Multiplexer Channel 1
  660. CHANNEL2: byte; //Multiplexer Channel 2
  661. CHANNEL3: byte; //Multiplexer Channel 3
  662. CHANNEL4: byte; //Multiplexer Channel 4
  663. CHANNEL5: byte; //Multiplexer Channel 5
  664. Reserved22: byte;
  665. Reserved23: byte;
  666. Reserved24: byte;
  667. Reserved25: byte;
  668. Reserved26: byte;
  669. Reserved27: byte;
  670. Reserved28: byte;
  671. Reserved29: byte;
  672. Reserved30: byte;
  673. Reserved31: byte;
  674. USERCCLLUT0A: byte; //User CCL LUT0 Event A
  675. USERCCLLUT0B: byte; //User CCL LUT0 Event B
  676. USERCCLLUT1A: byte; //User CCL LUT1 Event A
  677. USERCCLLUT1B: byte; //User CCL LUT1 Event B
  678. USERCCLLUT2A: byte; //User CCL LUT2 Event A
  679. USERCCLLUT2B: byte; //User CCL LUT2 Event B
  680. USERCCLLUT3A: byte; //User CCL LUT3 Event A
  681. USERCCLLUT3B: byte; //User CCL LUT3 Event B
  682. USERADC0START: byte; //User ADC0
  683. USEREVSYSEVOUTA: byte; //User EVOUT Port A
  684. USEREVSYSEVOUTB: byte; //User EVOUT Port B
  685. USEREVSYSEVOUTC: byte; //User EVOUT Port C
  686. USERUSART0IRDA: byte; //User USART0
  687. USERUSART1IRDA: byte; //User USART1
  688. USERTCA0CNTA: byte; //User TCA0 count event
  689. USERTCA0CNTB: byte; //User TCA0 Restart event
  690. USERTCB0CAPT: byte; //User TCB0 Event in A
  691. USERTCB0COUNT: byte; //User TCB0 Event in B
  692. USERTCB1CAPT: byte; //User TCB1 Event in A
  693. USERTCB1COUNT: byte; //User TCB1 Event in B
  694. const
  695. // EVSYS_SWEVENTA
  696. SWEVENTAmask = $FF;
  697. SWEVENTA_CH0 = $01;
  698. SWEVENTA_CH1 = $02;
  699. SWEVENTA_CH2 = $04;
  700. SWEVENTA_CH3 = $08;
  701. SWEVENTA_CH4 = $10;
  702. SWEVENTA_CH5 = $20;
  703. // EVSYS_CHANNEL0
  704. CHANNEL0mask = $FF;
  705. CHANNEL0_OFF = $00;
  706. CHANNEL0_UPDI = $01;
  707. CHANNEL0_RTC_OVF = $06;
  708. CHANNEL0_RTC_CMP = $07;
  709. CHANNEL0_RTC_PIT_DIV8192 = $08;
  710. CHANNEL0_RTC_PIT_DIV4096 = $09;
  711. CHANNEL0_RTC_PIT_DIV2048 = $0A;
  712. CHANNEL0_RTC_PIT_DIV1024 = $0B;
  713. CHANNEL0_CCL_LUT0 = $10;
  714. CHANNEL0_CCL_LUT1 = $11;
  715. CHANNEL0_CCL_LUT2 = $12;
  716. CHANNEL0_CCL_LUT3 = $13;
  717. CHANNEL0_AC0_OUT = $20;
  718. CHANNEL0_ADC0_RES = $24;
  719. CHANNEL0_ADC0_SAMP = $25;
  720. CHANNEL0_ADC0_WCMP = $26;
  721. CHANNEL0_PORTA_PIN0 = $40;
  722. CHANNEL0_PORTA_PIN1 = $41;
  723. CHANNEL0_PORTA_PIN2 = $42;
  724. CHANNEL0_PORTA_PIN3 = $43;
  725. CHANNEL0_PORTA_PIN4 = $44;
  726. CHANNEL0_PORTA_PIN5 = $45;
  727. CHANNEL0_PORTA_PIN6 = $46;
  728. CHANNEL0_PORTA_PIN7 = $47;
  729. CHANNEL0_PORTB_PIN0 = $48;
  730. CHANNEL0_PORTB_PIN1 = $49;
  731. CHANNEL0_PORTB_PIN2 = $4A;
  732. CHANNEL0_PORTB_PIN3 = $4B;
  733. CHANNEL0_PORTB_PIN4 = $4C;
  734. CHANNEL0_PORTB_PIN5 = $4D;
  735. CHANNEL0_PORTB_PIN6 = $4E;
  736. CHANNEL0_PORTB_PIN7 = $4F;
  737. CHANNEL0_USART0_XCK = $60;
  738. CHANNEL0_USART1_XCK = $61;
  739. CHANNEL0_SPI0_SCK = $68;
  740. CHANNEL0_TCA0_OVF_LUNF = $80;
  741. CHANNEL0_TCA0_HUNF = $81;
  742. CHANNEL0_TCA0_CMP0_LCMP0 = $84;
  743. CHANNEL0_TCA0_CMP1_LCMP1 = $85;
  744. CHANNEL0_TCA0_CMP2_LCMP2 = $86;
  745. CHANNEL0_TCB0_CAPT = $A0;
  746. CHANNEL0_TCB0_OVF = $A1;
  747. CHANNEL0_TCB1_CAPT = $A2;
  748. CHANNEL0_TCB1_OVF = $A3;
  749. // EVSYS_CHANNEL1
  750. CHANNEL1mask = $FF;
  751. CHANNEL1_OFF = $00;
  752. CHANNEL1_UPDI = $01;
  753. CHANNEL1_RTC_OVF = $06;
  754. CHANNEL1_RTC_CMP = $07;
  755. CHANNEL1_RTC_PIT_DIV512 = $08;
  756. CHANNEL1_RTC_PIT_DIV256 = $09;
  757. CHANNEL1_RTC_PIT_DIV128 = $0A;
  758. CHANNEL1_RTC_PIT_DIV64 = $0B;
  759. CHANNEL1_CCL_LUT0 = $10;
  760. CHANNEL1_CCL_LUT1 = $11;
  761. CHANNEL1_CCL_LUT2 = $12;
  762. CHANNEL1_CCL_LUT3 = $13;
  763. CHANNEL1_AC0_OUT = $20;
  764. CHANNEL1_ADC0_RES = $24;
  765. CHANNEL1_ADC0_SAMP = $25;
  766. CHANNEL1_ADC0_WCMP = $26;
  767. CHANNEL1_PORTA_PIN0 = $40;
  768. CHANNEL1_PORTA_PIN1 = $41;
  769. CHANNEL1_PORTA_PIN2 = $42;
  770. CHANNEL1_PORTA_PIN3 = $43;
  771. CHANNEL1_PORTA_PIN4 = $44;
  772. CHANNEL1_PORTA_PIN5 = $45;
  773. CHANNEL1_PORTA_PIN6 = $46;
  774. CHANNEL1_PORTA_PIN7 = $47;
  775. CHANNEL1_PORTB_PIN0 = $48;
  776. CHANNEL1_PORTB_PIN1 = $49;
  777. CHANNEL1_PORTB_PIN2 = $4A;
  778. CHANNEL1_PORTB_PIN3 = $4B;
  779. CHANNEL1_PORTB_PIN4 = $4C;
  780. CHANNEL1_PORTB_PIN5 = $4D;
  781. CHANNEL1_PORTB_PIN6 = $4E;
  782. CHANNEL1_PORTB_PIN7 = $4F;
  783. CHANNEL1_USART0_XCK = $60;
  784. CHANNEL1_USART1_XCK = $61;
  785. CHANNEL1_SPI0_SCK = $68;
  786. CHANNEL1_TCA0_OVF_LUNF = $80;
  787. CHANNEL1_TCA0_HUNF = $81;
  788. CHANNEL1_TCA0_CMP0_LCMP0 = $84;
  789. CHANNEL1_TCA0_CMP1_LCMP1 = $85;
  790. CHANNEL1_TCA0_CMP2_LCMP2 = $86;
  791. CHANNEL1_TCB0_CAPT = $A0;
  792. CHANNEL1_TCB0_OVF = $A1;
  793. CHANNEL1_TCB1_CAPT = $A2;
  794. CHANNEL1_TCB1_OVF = $A3;
  795. // EVSYS_CHANNEL2
  796. CHANNEL2mask = $FF;
  797. CHANNEL2_OFF = $00;
  798. CHANNEL2_UPDI = $01;
  799. CHANNEL2_RTC_OVF = $06;
  800. CHANNEL2_RTC_CMP = $07;
  801. CHANNEL2_RTC_PIT_DIV8192 = $08;
  802. CHANNEL2_RTC_PIT_DIV4096 = $09;
  803. CHANNEL2_RTC_PIT_DIV2048 = $0A;
  804. CHANNEL2_RTC_PIT_DIV1024 = $0B;
  805. CHANNEL2_CCL_LUT0 = $10;
  806. CHANNEL2_CCL_LUT1 = $11;
  807. CHANNEL2_CCL_LUT2 = $12;
  808. CHANNEL2_CCL_LUT3 = $13;
  809. CHANNEL2_AC0_OUT = $20;
  810. CHANNEL2_ADC0_RES = $24;
  811. CHANNEL2_ADC0_SAMP = $25;
  812. CHANNEL2_ADC0_WCMP = $26;
  813. CHANNEL2_PORTC_PIN0 = $40;
  814. CHANNEL2_PORTC_PIN1 = $41;
  815. CHANNEL2_PORTC_PIN2 = $42;
  816. CHANNEL2_PORTC_PIN3 = $43;
  817. CHANNEL2_PORTC_PIN4 = $44;
  818. CHANNEL2_PORTC_PIN5 = $45;
  819. CHANNEL2_PORTA_PIN0 = $48;
  820. CHANNEL2_PORTA_PIN1 = $49;
  821. CHANNEL2_PORTA_PIN2 = $4A;
  822. CHANNEL2_PORTA_PIN3 = $4B;
  823. CHANNEL2_PORTA_PIN4 = $4C;
  824. CHANNEL2_PORTA_PIN5 = $4D;
  825. CHANNEL2_PORTA_PIN6 = $4E;
  826. CHANNEL2_PORTA_PIN7 = $4F;
  827. CHANNEL2_USART0_XCK = $60;
  828. CHANNEL2_USART1_XCK = $61;
  829. CHANNEL2_SPI0_SCK = $68;
  830. CHANNEL2_TCA0_OVF_LUNF = $80;
  831. CHANNEL2_TCA0_HUNF = $81;
  832. CHANNEL2_TCA0_CMP0_LCMP0 = $84;
  833. CHANNEL2_TCA0_CMP1_LCMP1 = $85;
  834. CHANNEL2_TCA0_CMP2_LCMP2 = $86;
  835. CHANNEL2_TCB0_CAPT = $A0;
  836. CHANNEL2_TCB0_OVF = $A1;
  837. CHANNEL2_TCB1_CAPT = $A2;
  838. CHANNEL2_TCB1_OVF = $A3;
  839. // EVSYS_CHANNEL3
  840. CHANNEL3mask = $FF;
  841. CHANNEL3_OFF = $00;
  842. CHANNEL3_UPDI = $01;
  843. CHANNEL3_RTC_OVF = $06;
  844. CHANNEL3_RTC_CMP = $07;
  845. CHANNEL3_RTC_PIT_DIV512 = $08;
  846. CHANNEL3_RTC_PIT_DIV256 = $09;
  847. CHANNEL3_RTC_PIT_DIV128 = $0A;
  848. CHANNEL3_RTC_PIT_DIV64 = $0B;
  849. CHANNEL3_CCL_LUT0 = $10;
  850. CHANNEL3_CCL_LUT1 = $11;
  851. CHANNEL3_CCL_LUT2 = $12;
  852. CHANNEL3_CCL_LUT3 = $13;
  853. CHANNEL3_AC0_OUT = $20;
  854. CHANNEL3_ADC0_RES = $24;
  855. CHANNEL3_ADC0_SAMP = $25;
  856. CHANNEL3_ADC0_WCMP = $26;
  857. CHANNEL3_PORTC_PIN0 = $40;
  858. CHANNEL3_PORTC_PIN1 = $41;
  859. CHANNEL3_PORTC_PIN2 = $42;
  860. CHANNEL3_PORTC_PIN3 = $43;
  861. CHANNEL3_PORTC_PIN4 = $44;
  862. CHANNEL3_PORTC_PIN5 = $45;
  863. CHANNEL3_PORTA_PIN0 = $48;
  864. CHANNEL3_PORTA_PIN1 = $49;
  865. CHANNEL3_PORTA_PIN2 = $4A;
  866. CHANNEL3_PORTA_PIN3 = $4B;
  867. CHANNEL3_PORTA_PIN4 = $4C;
  868. CHANNEL3_PORTA_PIN5 = $4D;
  869. CHANNEL3_PORTA_PIN6 = $4E;
  870. CHANNEL3_PORTA_PIN7 = $4F;
  871. CHANNEL3_USART0_XCK = $60;
  872. CHANNEL3_USART1_XCK = $61;
  873. CHANNEL3_SPI0_SCK = $68;
  874. CHANNEL3_TCA0_OVF_LUNF = $80;
  875. CHANNEL3_TCA0_HUNF = $81;
  876. CHANNEL3_TCA0_CMP0_LCMP0 = $84;
  877. CHANNEL3_TCA0_CMP1_LCMP1 = $85;
  878. CHANNEL3_TCA0_CMP2_LCMP2 = $86;
  879. CHANNEL3_TCB0_CAPT = $A0;
  880. CHANNEL3_TCB0_OVF = $A1;
  881. CHANNEL3_TCB1_CAPT = $A2;
  882. CHANNEL3_TCB1_OVF = $A3;
  883. // EVSYS_CHANNEL4
  884. CHANNEL4mask = $FF;
  885. CHANNEL4_OFF = $00;
  886. CHANNEL4_UPDI = $01;
  887. CHANNEL4_RTC_OVF = $06;
  888. CHANNEL4_RTC_CMP = $07;
  889. CHANNEL4_RTC_PIT_DIV8192 = $08;
  890. CHANNEL4_RTC_PIT_DIV4096 = $09;
  891. CHANNEL4_RTC_PIT_DIV2048 = $0A;
  892. CHANNEL4_RTC_PIT_DIV1024 = $0B;
  893. CHANNEL4_CCL_LUT0 = $10;
  894. CHANNEL4_CCL_LUT1 = $11;
  895. CHANNEL4_CCL_LUT2 = $12;
  896. CHANNEL4_CCL_LUT3 = $13;
  897. CHANNEL4_AC0_OUT = $20;
  898. CHANNEL4_ADC0_RES = $24;
  899. CHANNEL4_ADC0_SAMP = $25;
  900. CHANNEL4_ADC0_WCMP = $26;
  901. CHANNEL4_PORTB_PIN0 = $40;
  902. CHANNEL4_PORTB_PIN1 = $41;
  903. CHANNEL4_PORTB_PIN2 = $42;
  904. CHANNEL4_PORTB_PIN3 = $43;
  905. CHANNEL4_PORTB_PIN4 = $44;
  906. CHANNEL4_PORTB_PIN5 = $45;
  907. CHANNEL4_PORTB_PIN6 = $46;
  908. CHANNEL4_PORTB_PIN7 = $47;
  909. CHANNEL4_PORTC_PIN0 = $48;
  910. CHANNEL4_PORTC_PIN1 = $49;
  911. CHANNEL4_PORTC_PIN2 = $4A;
  912. CHANNEL4_PORTC_PIN3 = $4B;
  913. CHANNEL4_PORTC_PIN4 = $4C;
  914. CHANNEL4_PORTC_PIN5 = $4D;
  915. CHANNEL4_USART0_XCK = $60;
  916. CHANNEL4_USART1_XCK = $61;
  917. CHANNEL4_SPI0_SCK = $68;
  918. CHANNEL4_TCA0_OVF_LUNF = $80;
  919. CHANNEL4_TCA0_HUNF = $81;
  920. CHANNEL4_TCA0_CMP0_LCMP0 = $84;
  921. CHANNEL4_TCA0_CMP1_LCMP1 = $85;
  922. CHANNEL4_TCA0_CMP2_LCMP2 = $86;
  923. CHANNEL4_TCB0_CAPT = $A0;
  924. CHANNEL4_TCB0_OVF = $A1;
  925. CHANNEL4_TCB1_CAPT = $A2;
  926. CHANNEL4_TCB1_OVF = $A3;
  927. // EVSYS_CHANNEL5
  928. CHANNEL5mask = $FF;
  929. CHANNEL5_OFF = $00;
  930. CHANNEL5_UPDI = $01;
  931. CHANNEL5_RTC_OVF = $06;
  932. CHANNEL5_RTC_CMP = $07;
  933. CHANNEL5_RTC_PIT_DIV512 = $08;
  934. CHANNEL5_RTC_PIT_DIV256 = $09;
  935. CHANNEL5_RTC_PIT_DIV128 = $0A;
  936. CHANNEL5_RTC_PIT_DIV64 = $0B;
  937. CHANNEL5_CCL_LUT0 = $10;
  938. CHANNEL5_CCL_LUT1 = $11;
  939. CHANNEL5_CCL_LUT2 = $12;
  940. CHANNEL5_CCL_LUT3 = $13;
  941. CHANNEL5_AC0_OUT = $20;
  942. CHANNEL5_ADC0_RES = $24;
  943. CHANNEL5_ADC0_SAMP = $25;
  944. CHANNEL5_ADC0_WCMP = $26;
  945. CHANNEL5_PORTB_PIN0 = $40;
  946. CHANNEL5_PORTB_PIN1 = $41;
  947. CHANNEL5_PORTB_PIN2 = $42;
  948. CHANNEL5_PORTB_PIN3 = $43;
  949. CHANNEL5_PORTB_PIN4 = $44;
  950. CHANNEL5_PORTB_PIN5 = $45;
  951. CHANNEL5_PORTB_PIN6 = $46;
  952. CHANNEL5_PORTB_PIN7 = $47;
  953. CHANNEL5_PORTC_PIN0 = $48;
  954. CHANNEL5_PORTC_PIN1 = $49;
  955. CHANNEL5_PORTC_PIN2 = $4A;
  956. CHANNEL5_PORTC_PIN3 = $4B;
  957. CHANNEL5_PORTC_PIN4 = $4C;
  958. CHANNEL5_PORTC_PIN5 = $4D;
  959. CHANNEL5_USART0_XCK = $60;
  960. CHANNEL5_USART1_XCK = $61;
  961. CHANNEL5_SPI0_SCK = $68;
  962. CHANNEL5_TCA0_OVF_LUNF = $80;
  963. CHANNEL5_TCA0_HUNF = $81;
  964. CHANNEL5_TCA0_CMP0_LCMP0 = $84;
  965. CHANNEL5_TCA0_CMP1_LCMP1 = $85;
  966. CHANNEL5_TCA0_CMP2_LCMP2 = $86;
  967. CHANNEL5_TCB0_CAPT = $A0;
  968. CHANNEL5_TCB0_OVF = $A1;
  969. CHANNEL5_TCB1_CAPT = $A2;
  970. CHANNEL5_TCB1_OVF = $A3;
  971. // EVSYS_USER
  972. USERmask = $FF;
  973. USER_OFF = $00;
  974. USER_CHANNEL0 = $01;
  975. USER_CHANNEL1 = $02;
  976. USER_CHANNEL2 = $03;
  977. USER_CHANNEL3 = $04;
  978. USER_CHANNEL4 = $05;
  979. USER_CHANNEL5 = $06;
  980. end;
  981. TFUSE = object //Fuses
  982. WDTCFG: byte; //Watchdog Configuration
  983. BODCFG: byte; //BOD Configuration
  984. OSCCFG: byte; //Oscillator Configuration
  985. Reserved3: byte;
  986. Reserved4: byte;
  987. SYSCFG0: byte; //System Configuration 0
  988. SYSCFG1: byte; //System Configuration 1
  989. APPEND: byte; //Application Code Section End
  990. BOOTEND: byte; //Boot Section End
  991. const
  992. // FUSE_PERIOD
  993. PERIODmask = $0F;
  994. PERIOD_OFF = $00;
  995. PERIOD_8CLK = $01;
  996. PERIOD_16CLK = $02;
  997. PERIOD_32CLK = $03;
  998. PERIOD_64CLK = $04;
  999. PERIOD_128CLK = $05;
  1000. PERIOD_256CLK = $06;
  1001. PERIOD_512CLK = $07;
  1002. PERIOD_1KCLK = $08;
  1003. PERIOD_2KCLK = $09;
  1004. PERIOD_4KCLK = $0A;
  1005. PERIOD_8KCLK = $0B;
  1006. // FUSE_WINDOW
  1007. WINDOWmask = $F0;
  1008. WINDOW_OFF = $00;
  1009. WINDOW_8CLK = $10;
  1010. WINDOW_16CLK = $20;
  1011. WINDOW_32CLK = $30;
  1012. WINDOW_64CLK = $40;
  1013. WINDOW_128CLK = $50;
  1014. WINDOW_256CLK = $60;
  1015. WINDOW_512CLK = $70;
  1016. WINDOW_1KCLK = $80;
  1017. WINDOW_2KCLK = $90;
  1018. WINDOW_4KCLK = $A0;
  1019. WINDOW_8KCLK = $B0;
  1020. // FUSE_SLEEP
  1021. SLEEPmask = $03;
  1022. SLEEP_DIS = $00;
  1023. SLEEP_ENABLED = $01;
  1024. SLEEP_SAMPLED = $02;
  1025. // FUSE_ACTIVE
  1026. ACTIVEmask = $0C;
  1027. ACTIVE_DIS = $00;
  1028. ACTIVE_ENABLED = $04;
  1029. ACTIVE_SAMPLED = $08;
  1030. ACTIVE_ENWAKE = $0C;
  1031. // FUSE_SAMPFREQ
  1032. SAMPFREQmask = $10;
  1033. SAMPFREQ_1KHZ = $00;
  1034. SAMPFREQ_125HZ = $10;
  1035. // FUSE_LVL
  1036. LVLmask = $E0;
  1037. LVL_BODLEVEL0 = $00;
  1038. LVL_BODLEVEL2 = $40;
  1039. LVL_BODLEVEL7 = $E0;
  1040. // FUSE_FREQSEL
  1041. FREQSELmask = $03;
  1042. FREQSEL_16MHZ = $01;
  1043. FREQSEL_20MHZ = $02;
  1044. // Oscillator Lock
  1045. OSCLOCKbm = $80;
  1046. // EEPROM Save
  1047. EESAVEbm = $01;
  1048. // FUSE_RSTPINCFG
  1049. RSTPINCFGmask = $0C;
  1050. RSTPINCFG_GPIO = $00;
  1051. RSTPINCFG_UPDI = $04;
  1052. RSTPINCFG_RST = $08;
  1053. RSTPINCFG_PDIRST = $0C;
  1054. // Time-Out Disable
  1055. TOUTDISbm = $10;
  1056. // FUSE_CRCSRC
  1057. CRCSRCmask = $C0;
  1058. CRCSRC_FLASH = $00;
  1059. CRCSRC_BOOT = $40;
  1060. CRCSRC_BOOTAPP = $80;
  1061. CRCSRC_NOCRC = $C0;
  1062. // FUSE_SUT
  1063. SUTmask = $07;
  1064. SUT_0MS = $00;
  1065. SUT_1MS = $01;
  1066. SUT_2MS = $02;
  1067. SUT_4MS = $03;
  1068. SUT_8MS = $04;
  1069. SUT_16MS = $05;
  1070. SUT_32MS = $06;
  1071. SUT_64MS = $07;
  1072. end;
  1073. TGPIO = object //General Purpose I/O Register
  1074. GPIOR0: byte; //General Purpose IO Register 0
  1075. GPIOR1: byte; //General Purpose IO Register 1
  1076. GPIOR2: byte; //General Purpose IO Register 2
  1077. GPIOR3: byte; //General Purpose IO Register 3
  1078. end;
  1079. TLOCKBIT = object //Lockbit
  1080. LOCKBIT: byte; //Lock Bits
  1081. const
  1082. // LOCKBIT_LB
  1083. LBmask = $FF;
  1084. LB_RWLOCK = $3A;
  1085. LB_NOLOCK = $C5;
  1086. end;
  1087. TNVMCTRL = object //Non-volatile Memory Controller
  1088. CTRLA: byte; //Control A
  1089. CTRLB: byte; //Control B
  1090. STATUS: byte; //Status
  1091. INTCTRL: byte; //Interrupt Control
  1092. INTFLAGS: byte; //Interrupt Flags
  1093. Reserved5: byte;
  1094. DATA: word; //Data
  1095. ADDR: word; //Address
  1096. const
  1097. // NVMCTRL_CMD
  1098. CMDmask = $07;
  1099. CMD_NONE = $00;
  1100. CMD_PAGEWRITE = $01;
  1101. CMD_PAGEERASE = $02;
  1102. CMD_PAGEERASEWRITE = $03;
  1103. CMD_PAGEBUFCLR = $04;
  1104. CMD_CHIPERASE = $05;
  1105. CMD_EEERASE = $06;
  1106. CMD_FUSEWRITE = $07;
  1107. // Application code write protect
  1108. APCWPbm = $01;
  1109. // Boot Lock
  1110. BOOTLOCKbm = $02;
  1111. // Flash busy
  1112. FBUSYbm = $01;
  1113. // EEPROM busy
  1114. EEBUSYbm = $02;
  1115. // Write error
  1116. WRERRORbm = $04;
  1117. // EEPROM Ready
  1118. EEREADYbm = $01;
  1119. end;
  1120. TPORT = object //I/O Ports
  1121. DIR: byte; //Data Direction
  1122. DIRSET: byte; //Data Direction Set
  1123. DIRCLR: byte; //Data Direction Clear
  1124. DIRTGL: byte; //Data Direction Toggle
  1125. OUT_: byte; //Output Value
  1126. OUTSET: byte; //Output Value Set
  1127. OUTCLR: byte; //Output Value Clear
  1128. OUTTGL: byte; //Output Value Toggle
  1129. IN_: byte; //Input Value
  1130. INTFLAGS: byte; //Interrupt Flags
  1131. PORTCTRL: byte; //Port Control
  1132. Reserved11: byte;
  1133. Reserved12: byte;
  1134. Reserved13: byte;
  1135. Reserved14: byte;
  1136. Reserved15: byte;
  1137. PIN0CTRL: byte; //Pin 0 Control
  1138. PIN1CTRL: byte; //Pin 1 Control
  1139. PIN2CTRL: byte; //Pin 2 Control
  1140. PIN3CTRL: byte; //Pin 3 Control
  1141. PIN4CTRL: byte; //Pin 4 Control
  1142. PIN5CTRL: byte; //Pin 5 Control
  1143. PIN6CTRL: byte; //Pin 6 Control
  1144. PIN7CTRL: byte; //Pin 7 Control
  1145. const
  1146. // Pin Interrupt
  1147. INT0bm = $01;
  1148. INT1bm = $02;
  1149. INT2bm = $04;
  1150. INT3bm = $08;
  1151. INT4bm = $10;
  1152. INT5bm = $20;
  1153. INT6bm = $40;
  1154. INT7bm = $80;
  1155. // Slew Rate Limit Enable
  1156. SRLbm = $01;
  1157. // PORT_ISC
  1158. ISCmask = $07;
  1159. ISC_INTDISABLE = $00;
  1160. ISC_BOTHEDGES = $01;
  1161. ISC_RISING = $02;
  1162. ISC_FALLING = $03;
  1163. ISC_INPUT_DISABLE = $04;
  1164. ISC_LEVEL = $05;
  1165. // Pullup enable
  1166. PULLUPENbm = $08;
  1167. // Inverted I/O Enable
  1168. INVENbm = $80;
  1169. end;
  1170. TPORTMUX = object //Port Multiplexer
  1171. EVSYSROUTEA: byte; //Port Multiplexer EVSYS
  1172. CCLROUTEA: byte; //Port Multiplexer CCL
  1173. USARTROUTEA: byte; //Port Multiplexer USART register A
  1174. SPIROUTEA: byte; //Port Multiplexer TWI and SPI
  1175. TCAROUTEA: byte; //Port Multiplexer TCA
  1176. TCBROUTEA: byte; //Port Multiplexer TCB
  1177. const
  1178. // PORTMUX_EVOUTA
  1179. EVOUTAmask = $01;
  1180. EVOUTA_DEFAULT = $00;
  1181. EVOUTA_ALT1 = $01;
  1182. // PORTMUX_EVOUTB
  1183. EVOUTBmask = $02;
  1184. EVOUTB_DEFAULT = $00;
  1185. EVOUTB_ALT1 = $02;
  1186. // PORTMUX_EVOUTC
  1187. EVOUTCmask = $04;
  1188. EVOUTC_DEFAULT = $00;
  1189. // PORTMUX_LUT0
  1190. LUT0mask = $01;
  1191. LUT0_DEFAULT = $00;
  1192. LUT0_ALT1 = $01;
  1193. // PORTMUX_LUT1
  1194. LUT1mask = $02;
  1195. LUT1_DEFAULT = $00;
  1196. LUT1_ALT1 = $02;
  1197. // PORTMUX_LUT2
  1198. LUT2mask = $04;
  1199. LUT2_DEFAULT = $00;
  1200. LUT2_ALT1 = $04;
  1201. // PORTMUX_LUT3
  1202. LUT3mask = $08;
  1203. LUT3_DEFAULT = $00;
  1204. LUT3_ALT1 = $08;
  1205. // PORTMUX_USART0
  1206. USART0mask = $03;
  1207. USART0_DEFAULT = $00;
  1208. USART0_ALT1 = $01;
  1209. USART0_NONE = $03;
  1210. // PORTMUX_USART1
  1211. USART1mask = $0C;
  1212. USART1_DEFAULT = $00;
  1213. USART1_ALT1 = $04;
  1214. USART1_NONE = $0C;
  1215. // PORTMUX_SPI0
  1216. SPI0mask = $03;
  1217. SPI0_DEFAULT = $00;
  1218. SPI0_ALT1 = $01;
  1219. SPI0_NONE = $03;
  1220. // PORTMUX_TCA00
  1221. TCA00mask = $01;
  1222. TCA00_DEFAULT = $00;
  1223. TCA00_ALT1 = $01;
  1224. // PORTMUX_TCA01
  1225. TCA01mask = $02;
  1226. TCA01_DEFAULT = $00;
  1227. TCA01_ALT1 = $02;
  1228. // PORTMUX_TCA02
  1229. TCA02mask = $04;
  1230. TCA02_DEFAULT = $00;
  1231. TCA02_ALT1 = $04;
  1232. // PORTMUX_TCA03
  1233. TCA03mask = $08;
  1234. TCA03_DEFAULT = $00;
  1235. TCA03_ALT1 = $08;
  1236. // PORTMUX_TCA04
  1237. TCA04mask = $10;
  1238. TCA04_DEFAULT = $00;
  1239. TCA04_ALT1 = $10;
  1240. // PORTMUX_TCA05
  1241. TCA05mask = $20;
  1242. TCA05_DEFAULT = $00;
  1243. TCA05_ALT1 = $20;
  1244. // PORTMUX_TCB0
  1245. TCB0mask = $01;
  1246. TCB0_DEFAULT = $00;
  1247. TCB0_ALT1 = $01;
  1248. // PORTMUX_TCB1
  1249. TCB1mask = $02;
  1250. TCB1_DEFAULT = $00;
  1251. TCB1_ALT1 = $02;
  1252. end;
  1253. TRSTCTRL = object //Reset controller
  1254. RSTFR: byte; //Reset Flags
  1255. SWRR: byte; //Software Reset
  1256. const
  1257. // Power on Reset flag
  1258. PORFbm = $01;
  1259. // Brown out detector Reset flag
  1260. BORFbm = $02;
  1261. // External Reset flag
  1262. EXTRFbm = $04;
  1263. // Watch dog Reset flag
  1264. WDRFbm = $08;
  1265. // Software Reset flag
  1266. SWRFbm = $10;
  1267. // UPDI Reset flag
  1268. UPDIRFbm = $20;
  1269. // Software reset enable
  1270. SWREbm = $01;
  1271. end;
  1272. TRTC = object //Real-Time Counter
  1273. CTRLA: byte; //Control A
  1274. STATUS: byte; //Status
  1275. INTCTRL: byte; //Interrupt Control
  1276. INTFLAGS: byte; //Interrupt Flags
  1277. TEMP: byte; //Temporary
  1278. DBGCTRL: byte; //Debug control
  1279. CALIB: byte; //Calibration
  1280. CLKSEL: byte; //Clock Select
  1281. CNT: word; //Counter
  1282. PER: word; //Period
  1283. CMP: word; //Compare
  1284. Reserved14: byte;
  1285. Reserved15: byte;
  1286. PITCTRLA: byte; //PIT Control A
  1287. PITSTATUS: byte; //PIT Status
  1288. PITINTCTRL: byte; //PIT Interrupt Control
  1289. PITINTFLAGS: byte; //PIT Interrupt Flags
  1290. Reserved20: byte;
  1291. PITDBGCTRL: byte; //PIT Debug control
  1292. const
  1293. // Enable
  1294. RTCENbm = $01;
  1295. // Correction enable
  1296. CORRENbm = $04;
  1297. // RTC_PRESCALER
  1298. PRESCALERmask = $78;
  1299. PRESCALER_DIV1 = $00;
  1300. PRESCALER_DIV2 = $08;
  1301. PRESCALER_DIV4 = $10;
  1302. PRESCALER_DIV8 = $18;
  1303. PRESCALER_DIV16 = $20;
  1304. PRESCALER_DIV32 = $28;
  1305. PRESCALER_DIV64 = $30;
  1306. PRESCALER_DIV128 = $38;
  1307. PRESCALER_DIV256 = $40;
  1308. PRESCALER_DIV512 = $48;
  1309. PRESCALER_DIV1024 = $50;
  1310. PRESCALER_DIV2048 = $58;
  1311. PRESCALER_DIV4096 = $60;
  1312. PRESCALER_DIV8192 = $68;
  1313. PRESCALER_DIV16384 = $70;
  1314. PRESCALER_DIV32768 = $78;
  1315. // Run In Standby
  1316. RUNSTDBYbm = $80;
  1317. // CTRLA Synchronization Busy Flag
  1318. CTRLABUSYbm = $01;
  1319. // Count Synchronization Busy Flag
  1320. CNTBUSYbm = $02;
  1321. // Period Synchronization Busy Flag
  1322. PERBUSYbm = $04;
  1323. // Comparator Synchronization Busy Flag
  1324. CMPBUSYbm = $08;
  1325. // Overflow Interrupt enable
  1326. OVFbm = $01;
  1327. // Compare Match Interrupt enable
  1328. CMPbm = $02;
  1329. // Run in debug
  1330. DBGRUNbm = $01;
  1331. // Error Correction Value
  1332. ERROR0bm = $01;
  1333. ERROR1bm = $02;
  1334. ERROR2bm = $04;
  1335. ERROR3bm = $08;
  1336. ERROR4bm = $10;
  1337. ERROR5bm = $20;
  1338. ERROR6bm = $40;
  1339. // Error Correction Sign Bit
  1340. SIGNbm = $80;
  1341. // RTC_CLKSEL
  1342. CLKSELmask = $03;
  1343. CLKSEL_INT32K = $00;
  1344. CLKSEL_INT1K = $01;
  1345. CLKSEL_TOSC32K = $02;
  1346. CLKSEL_EXTCLK = $03;
  1347. // Enable
  1348. PITENbm = $01;
  1349. // RTC_PERIOD
  1350. PERIODmask = $78;
  1351. PERIOD_OFF = $00;
  1352. PERIOD_CYC4 = $08;
  1353. PERIOD_CYC8 = $10;
  1354. PERIOD_CYC16 = $18;
  1355. PERIOD_CYC32 = $20;
  1356. PERIOD_CYC64 = $28;
  1357. PERIOD_CYC128 = $30;
  1358. PERIOD_CYC256 = $38;
  1359. PERIOD_CYC512 = $40;
  1360. PERIOD_CYC1024 = $48;
  1361. PERIOD_CYC2048 = $50;
  1362. PERIOD_CYC4096 = $58;
  1363. PERIOD_CYC8192 = $60;
  1364. PERIOD_CYC16384 = $68;
  1365. PERIOD_CYC32768 = $70;
  1366. // CTRLA Synchronization Busy Flag
  1367. CTRLBUSYbm = $01;
  1368. // Periodic Interrupt
  1369. PIbm = $01;
  1370. end;
  1371. TSIGROW = object //Signature row
  1372. DEVICEID0: byte; //Device ID Byte 0
  1373. DEVICEID1: byte; //Device ID Byte 1
  1374. DEVICEID2: byte; //Device ID Byte 2
  1375. SERNUM0: byte; //Serial Number Byte 0
  1376. SERNUM1: byte; //Serial Number Byte 1
  1377. SERNUM2: byte; //Serial Number Byte 2
  1378. SERNUM3: byte; //Serial Number Byte 3
  1379. SERNUM4: byte; //Serial Number Byte 4
  1380. SERNUM5: byte; //Serial Number Byte 5
  1381. SERNUM6: byte; //Serial Number Byte 6
  1382. SERNUM7: byte; //Serial Number Byte 7
  1383. SERNUM8: byte; //Serial Number Byte 8
  1384. SERNUM9: byte; //Serial Number Byte 9
  1385. Reserved13: byte;
  1386. Reserved14: byte;
  1387. Reserved15: byte;
  1388. Reserved16: byte;
  1389. Reserved17: byte;
  1390. Reserved18: byte;
  1391. Reserved19: byte;
  1392. Reserved20: byte;
  1393. Reserved21: byte;
  1394. Reserved22: byte;
  1395. Reserved23: byte;
  1396. OSCCAL16M0: byte; //Oscillator Calibration 16 MHz Byte 0
  1397. OSCCAL16M1: byte; //Oscillator Calibration 16 MHz Byte 1
  1398. OSCCAL20M0: byte; //Oscillator Calibration 20 MHz Byte 0
  1399. OSCCAL20M1: byte; //Oscillator Calibration 20 MHz Byte 1
  1400. Reserved28: byte;
  1401. Reserved29: byte;
  1402. Reserved30: byte;
  1403. Reserved31: byte;
  1404. TEMPSENSE0: byte; //Temperature Sensor Calibration Byte 0
  1405. TEMPSENSE1: byte; //Temperature Sensor Calibration Byte 1
  1406. end;
  1407. TSLPCTRL = object //Sleep Controller
  1408. CTRLA: byte; //Control
  1409. const
  1410. // Sleep enable
  1411. SENbm = $01;
  1412. // SLPCTRL_SMODE
  1413. SMODEmask = $06;
  1414. SMODE_IDLE = $00;
  1415. SMODE_STDBY = $02;
  1416. SMODE_PDOWN = $04;
  1417. end;
  1418. TSPI = object //Serial Peripheral Interface
  1419. CTRLA: byte; //Control A
  1420. CTRLB: byte; //Control B
  1421. INTCTRL: byte; //Interrupt Control
  1422. INTFLAGS: byte; //Interrupt Flags
  1423. DATA: byte; //Data
  1424. const
  1425. // Enable Module
  1426. ENABLEbm = $01;
  1427. // SPI_PRESC
  1428. PRESCmask = $06;
  1429. PRESC_DIV4 = $00;
  1430. PRESC_DIV16 = $02;
  1431. PRESC_DIV64 = $04;
  1432. PRESC_DIV128 = $06;
  1433. // Enable Double Speed
  1434. CLK2Xbm = $10;
  1435. // Host Operation Enable
  1436. MASTERbm = $20;
  1437. // Data Order Setting
  1438. DORDbm = $40;
  1439. // SPI_MODE
  1440. MODEmask = $03;
  1441. MODE_0 = $00;
  1442. MODE_1 = $01;
  1443. MODE_2 = $02;
  1444. MODE_3 = $03;
  1445. // SPI Select Disable
  1446. SSDbm = $04;
  1447. // Buffer Mode Wait for Receive
  1448. BUFWRbm = $40;
  1449. // Buffer Mode Enable
  1450. BUFENbm = $80;
  1451. // Interrupt Enable
  1452. IEbm = $01;
  1453. // SPI Select Trigger Interrupt Enable
  1454. SSIEbm = $10;
  1455. // Data Register Empty Interrupt Enable
  1456. DREIEbm = $20;
  1457. // Transfer Complete Interrupt Enable
  1458. TXCIEbm = $40;
  1459. // Receive Complete Interrupt Enable
  1460. RXCIEbm = $80;
  1461. end;
  1462. TSYSCFG = object //System Configuration Registers
  1463. Reserved0: byte;
  1464. REVID: byte; //Revision ID
  1465. end;
  1466. TTCA = object //16-bit Timer/Counter Type A
  1467. end;
  1468. TTCB = object //16-bit Timer Type B
  1469. CTRLA: byte; //Control A
  1470. CTRLB: byte; //Control Register B
  1471. Reserved2: byte;
  1472. Reserved3: byte;
  1473. EVCTRL: byte; //Event Control
  1474. INTCTRL: byte; //Interrupt Control
  1475. INTFLAGS: byte; //Interrupt Flags
  1476. STATUS: byte; //Status
  1477. DBGCTRL: byte; //Debug Control
  1478. TEMP: byte; //Temporary Value
  1479. CNT: word; //Count
  1480. CCMP: word; //Compare or Capture
  1481. const
  1482. // Enable
  1483. ENABLEbm = $01;
  1484. // TCB_CLKSEL
  1485. CLKSELmask = $0E;
  1486. CLKSEL_DIV1 = $00;
  1487. CLKSEL_DIV2 = $02;
  1488. CLKSEL_TCA0 = $04;
  1489. CLKSEL_EVENT = $0E;
  1490. // Synchronize Update
  1491. SYNCUPDbm = $10;
  1492. // Cascade two timers
  1493. CASCADEbm = $20;
  1494. // Run Standby
  1495. RUNSTDBYbm = $40;
  1496. // TCB_CNTMODE
  1497. CNTMODEmask = $07;
  1498. CNTMODE_INT = $00;
  1499. CNTMODE_TIMEOUT = $01;
  1500. CNTMODE_CAPT = $02;
  1501. CNTMODE_FRQ = $03;
  1502. CNTMODE_PW = $04;
  1503. CNTMODE_FRQPW = $05;
  1504. CNTMODE_SINGLE = $06;
  1505. CNTMODE_PWM8 = $07;
  1506. // Pin Output Enable
  1507. CCMPENbm = $10;
  1508. // Pin Initial State
  1509. CCMPINITbm = $20;
  1510. // Asynchronous Enable
  1511. ASYNCbm = $40;
  1512. // Event Input Enable
  1513. CAPTEIbm = $01;
  1514. // Event Edge
  1515. EDGEbm = $10;
  1516. // Input Capture Noise Cancellation Filter
  1517. FILTERbm = $40;
  1518. // Capture or Timeout
  1519. CAPTbm = $01;
  1520. // Overflow
  1521. OVFbm = $02;
  1522. // Run
  1523. RUNbm = $01;
  1524. // Debug Run
  1525. DBGRUNbm = $01;
  1526. end;
  1527. TTWI = object //Two-Wire Interface
  1528. CTRLA: byte; //Control A
  1529. Reserved1: byte;
  1530. DBGCTRL: byte; //Debug Control Register
  1531. MCTRLA: byte; //Host Control A
  1532. MCTRLB: byte; //Host Control B
  1533. MSTATUS: byte; //Host Status
  1534. MBAUD: byte; //Host Baud Rate Control
  1535. MADDR: byte; //Host Address
  1536. MDATA: byte; //Host Data
  1537. SCTRLA: byte; //Client Control A
  1538. SCTRLB: byte; //Client Control B
  1539. SSTATUS: byte; //Client Status
  1540. SADDR: byte; //Client Address
  1541. SDATA: byte; //Client Data
  1542. SADDRMASK: byte; //Client Address Mask
  1543. const
  1544. // Fast-mode Plus Enable
  1545. FMPENbm = $02;
  1546. // TWI_SDAHOLD
  1547. SDAHOLDmask = $0C;
  1548. SDAHOLD_OFF = $00;
  1549. SDAHOLD_50NS = $04;
  1550. SDAHOLD_300NS = $08;
  1551. SDAHOLD_500NS = $0C;
  1552. // TWI_SDASETUP
  1553. SDASETUPmask = $10;
  1554. SDASETUP_4CYC = $00;
  1555. SDASETUP_8CYC = $10;
  1556. // Debug Run
  1557. DBGRUNbm = $01;
  1558. // Enable TWI Host
  1559. ENABLEbm = $01;
  1560. // Smart Mode Enable
  1561. SMENbm = $02;
  1562. // TWI_TIMEOUT
  1563. TIMEOUTmask = $0C;
  1564. TIMEOUT_DISABLED = $00;
  1565. TIMEOUT_50US = $04;
  1566. TIMEOUT_100US = $08;
  1567. TIMEOUT_200US = $0C;
  1568. // Quick Command Enable
  1569. QCENbm = $10;
  1570. // Write Interrupt Enable
  1571. WIENbm = $40;
  1572. // Read Interrupt Enable
  1573. RIENbm = $80;
  1574. // TWI_MCMD
  1575. MCMDmask = $03;
  1576. MCMD_NOACT = $00;
  1577. MCMD_REPSTART = $01;
  1578. MCMD_RECVTRANS = $02;
  1579. MCMD_STOP = $03;
  1580. // TWI_ACKACT
  1581. ACKACTmask = $04;
  1582. ACKACT_ACK = $00;
  1583. ACKACT_NACK = $04;
  1584. // Flush
  1585. FLUSHbm = $08;
  1586. // TWI_BUSSTATE
  1587. BUSSTATEmask = $03;
  1588. BUSSTATE_UNKNOWN = $00;
  1589. BUSSTATE_IDLE = $01;
  1590. BUSSTATE_OWNER = $02;
  1591. BUSSTATE_BUSY = $03;
  1592. // Bus Error
  1593. BUSERRbm = $04;
  1594. // Arbitration Lost
  1595. ARBLOSTbm = $08;
  1596. // Received Acknowledge
  1597. RXACKbm = $10;
  1598. // Clock Hold
  1599. CLKHOLDbm = $20;
  1600. // Write Interrupt Flag
  1601. WIFbm = $40;
  1602. // Read Interrupt Flag
  1603. RIFbm = $80;
  1604. // Permissive Mode Enable
  1605. PMENbm = $04;
  1606. // Stop Interrupt Enable
  1607. PIENbm = $20;
  1608. // Address/Stop Interrupt Enable
  1609. APIENbm = $40;
  1610. // Data Interrupt Enable
  1611. DIENbm = $80;
  1612. // TWI_SCMD
  1613. SCMDmask = $03;
  1614. SCMD_NOACT = $00;
  1615. SCMD_COMPTRANS = $02;
  1616. SCMD_RESPONSE = $03;
  1617. // TWI_AP
  1618. APmask = $01;
  1619. AP_STOP = $00;
  1620. AP_ADR = $01;
  1621. // Read/Write Direction
  1622. DIRbm = $02;
  1623. // Collision
  1624. COLLbm = $08;
  1625. // Address/Stop Interrupt Flag
  1626. APIFbm = $40;
  1627. // Data Interrupt Flag
  1628. DIFbm = $80;
  1629. // Address Enable
  1630. ADDRENbm = $01;
  1631. // Address Mask
  1632. ADDRMASK0bm = $02;
  1633. ADDRMASK1bm = $04;
  1634. ADDRMASK2bm = $08;
  1635. ADDRMASK3bm = $10;
  1636. ADDRMASK4bm = $20;
  1637. ADDRMASK5bm = $40;
  1638. ADDRMASK6bm = $80;
  1639. end;
  1640. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1641. RXDATAL: byte; //Receive Data Low Byte
  1642. RXDATAH: byte; //Receive Data High Byte
  1643. TXDATAL: byte; //Transmit Data Low Byte
  1644. TXDATAH: byte; //Transmit Data High Byte
  1645. STATUS: byte; //Status
  1646. CTRLA: byte; //Control A
  1647. CTRLB: byte; //Control B
  1648. CTRLC: byte; //Control C
  1649. BAUD: word; //Baud Rate
  1650. CTRLD: byte; //Control D
  1651. DBGCTRL: byte; //Debug Control
  1652. EVCTRL: byte; //Event Control
  1653. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1654. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1655. const
  1656. // RX Data
  1657. DATA0bm = $01;
  1658. DATA1bm = $02;
  1659. DATA2bm = $04;
  1660. DATA3bm = $08;
  1661. DATA4bm = $10;
  1662. DATA5bm = $20;
  1663. DATA6bm = $40;
  1664. DATA7bm = $80;
  1665. // Receiver Data Register
  1666. DATA8bm = $01;
  1667. // Parity Error
  1668. PERRbm = $02;
  1669. // Frame Error
  1670. FERRbm = $04;
  1671. // Buffer Overflow
  1672. BUFOVFbm = $40;
  1673. // Receive Complete Interrupt Flag
  1674. RXCIFbm = $80;
  1675. // Wait For Break
  1676. WFBbm = $01;
  1677. // Break Detected Flag
  1678. BDFbm = $02;
  1679. // Inconsistent Sync Field Interrupt Flag
  1680. ISFIFbm = $08;
  1681. // Receive Start Interrupt
  1682. RXSIFbm = $10;
  1683. // Data Register Empty Flag
  1684. DREIFbm = $20;
  1685. // Transmit Interrupt Flag
  1686. TXCIFbm = $40;
  1687. // USART_RS485
  1688. RS485mask = $01;
  1689. RS485_DISABLE = $00;
  1690. RS485_ENABLE = $01;
  1691. // Auto-baud Error Interrupt Enable
  1692. ABEIEbm = $04;
  1693. // Loop-back Mode Enable
  1694. LBMEbm = $08;
  1695. // Receiver Start Frame Interrupt Enable
  1696. RXSIEbm = $10;
  1697. // Data Register Empty Interrupt Enable
  1698. DREIEbm = $20;
  1699. // Transmit Complete Interrupt Enable
  1700. TXCIEbm = $40;
  1701. // Receive Complete Interrupt Enable
  1702. RXCIEbm = $80;
  1703. // Multi-processor Communication Mode
  1704. MPCMbm = $01;
  1705. // USART_RXMODE
  1706. RXMODEmask = $06;
  1707. RXMODE_NORMAL = $00;
  1708. RXMODE_CLK2X = $02;
  1709. RXMODE_GENAUTO = $04;
  1710. RXMODE_LINAUTO = $06;
  1711. // Open Drain Mode Enable
  1712. ODMEbm = $08;
  1713. // Start Frame Detection Enable
  1714. SFDENbm = $10;
  1715. // Transmitter Enable
  1716. TXENbm = $40;
  1717. // Reciever enable
  1718. RXENbm = $80;
  1719. // USART_ABW
  1720. ABWmask = $C0;
  1721. ABW_WDW0 = $00;
  1722. ABW_WDW1 = $40;
  1723. ABW_WDW2 = $80;
  1724. ABW_WDW3 = $C0;
  1725. // Debug Run
  1726. DBGRUNbm = $01;
  1727. // IrDA Event Input Enable
  1728. IREIbm = $01;
  1729. // Transmit pulse length
  1730. TXPL0bm = $01;
  1731. TXPL1bm = $02;
  1732. TXPL2bm = $04;
  1733. TXPL3bm = $08;
  1734. TXPL4bm = $10;
  1735. TXPL5bm = $20;
  1736. TXPL6bm = $40;
  1737. TXPL7bm = $80;
  1738. // Receiver Pulse Lenght
  1739. RXPL0bm = $01;
  1740. RXPL1bm = $02;
  1741. RXPL2bm = $04;
  1742. RXPL3bm = $08;
  1743. RXPL4bm = $10;
  1744. RXPL5bm = $20;
  1745. RXPL6bm = $40;
  1746. end;
  1747. TUSERROW = object //User Row
  1748. USERROW0: byte; //User Row Byte 0
  1749. USERROW1: byte; //User Row Byte 1
  1750. USERROW2: byte; //User Row Byte 2
  1751. USERROW3: byte; //User Row Byte 3
  1752. USERROW4: byte; //User Row Byte 4
  1753. USERROW5: byte; //User Row Byte 5
  1754. USERROW6: byte; //User Row Byte 6
  1755. USERROW7: byte; //User Row Byte 7
  1756. USERROW8: byte; //User Row Byte 8
  1757. USERROW9: byte; //User Row Byte 9
  1758. USERROW10: byte; //User Row Byte 10
  1759. USERROW11: byte; //User Row Byte 11
  1760. USERROW12: byte; //User Row Byte 12
  1761. USERROW13: byte; //User Row Byte 13
  1762. USERROW14: byte; //User Row Byte 14
  1763. USERROW15: byte; //User Row Byte 15
  1764. USERROW16: byte; //User Row Byte 16
  1765. USERROW17: byte; //User Row Byte 17
  1766. USERROW18: byte; //User Row Byte 18
  1767. USERROW19: byte; //User Row Byte 19
  1768. USERROW20: byte; //User Row Byte 20
  1769. USERROW21: byte; //User Row Byte 21
  1770. USERROW22: byte; //User Row Byte 22
  1771. USERROW23: byte; //User Row Byte 23
  1772. USERROW24: byte; //User Row Byte 24
  1773. USERROW25: byte; //User Row Byte 25
  1774. USERROW26: byte; //User Row Byte 26
  1775. USERROW27: byte; //User Row Byte 27
  1776. USERROW28: byte; //User Row Byte 28
  1777. USERROW29: byte; //User Row Byte 29
  1778. USERROW30: byte; //User Row Byte 30
  1779. USERROW31: byte; //User Row Byte 31
  1780. end;
  1781. TVPORT = object //Virtual Ports
  1782. DIR: byte; //Data Direction
  1783. OUT_: byte; //Output Value
  1784. IN_: byte; //Input Value
  1785. INTFLAGS: byte; //Interrupt Flags
  1786. const
  1787. // Pin Interrupt
  1788. INT0bm = $01;
  1789. INT1bm = $02;
  1790. INT2bm = $04;
  1791. INT3bm = $08;
  1792. INT4bm = $10;
  1793. INT5bm = $20;
  1794. INT6bm = $40;
  1795. INT7bm = $80;
  1796. end;
  1797. TVREF = object //Voltage reference
  1798. CTRLA: byte; //Control A
  1799. CTRLB: byte; //Control B
  1800. const
  1801. // VREF_AC0REFSEL
  1802. AC0REFSELmask = $07;
  1803. AC0REFSEL_1V024 = $00;
  1804. AC0REFSEL_2V048 = $01;
  1805. AC0REFSEL_2V5 = $02;
  1806. AC0REFSEL_4V096 = $03;
  1807. AC0REFSEL_AVDD = $07;
  1808. // AC0 DACREF reference enable
  1809. AC0REFENbm = $01;
  1810. // ADC0 reference enable
  1811. ADC0REFENbm = $02;
  1812. // NVM reference enable
  1813. NVMREFENbm = $04;
  1814. end;
  1815. TWDT = object //Watch-Dog Timer
  1816. CTRLA: byte; //Control A
  1817. STATUS: byte; //Status
  1818. const
  1819. // WDT_PERIOD
  1820. PERIODmask = $0F;
  1821. PERIOD_OFF = $00;
  1822. PERIOD_8CLK = $01;
  1823. PERIOD_16CLK = $02;
  1824. PERIOD_32CLK = $03;
  1825. PERIOD_64CLK = $04;
  1826. PERIOD_128CLK = $05;
  1827. PERIOD_256CLK = $06;
  1828. PERIOD_512CLK = $07;
  1829. PERIOD_1KCLK = $08;
  1830. PERIOD_2KCLK = $09;
  1831. PERIOD_4KCLK = $0A;
  1832. PERIOD_8KCLK = $0B;
  1833. // WDT_WINDOW
  1834. WINDOWmask = $F0;
  1835. WINDOW_OFF = $00;
  1836. WINDOW_8CLK = $10;
  1837. WINDOW_16CLK = $20;
  1838. WINDOW_32CLK = $30;
  1839. WINDOW_64CLK = $40;
  1840. WINDOW_128CLK = $50;
  1841. WINDOW_256CLK = $60;
  1842. WINDOW_512CLK = $70;
  1843. WINDOW_1KCLK = $80;
  1844. WINDOW_2KCLK = $90;
  1845. WINDOW_4KCLK = $A0;
  1846. WINDOW_8KCLK = $B0;
  1847. // Syncronization busy
  1848. SYNCBUSYbm = $01;
  1849. // Lock enable
  1850. LOCKbm = $80;
  1851. end;
  1852. const
  1853. Pin0idx = 0; Pin0bm = 1;
  1854. Pin1idx = 1; Pin1bm = 2;
  1855. Pin2idx = 2; Pin2bm = 4;
  1856. Pin3idx = 3; Pin3bm = 8;
  1857. Pin4idx = 4; Pin4bm = 16;
  1858. Pin5idx = 5; Pin5bm = 32;
  1859. Pin6idx = 6; Pin6bm = 64;
  1860. Pin7idx = 7; Pin7bm = 128;
  1861. var
  1862. VPORTA: TVPORT absolute $0000;
  1863. VPORTB: TVPORT absolute $0004;
  1864. VPORTC: TVPORT absolute $0008;
  1865. GPIO: TGPIO absolute $001C;
  1866. CPU: TCPU absolute $0030;
  1867. RSTCTRL: TRSTCTRL absolute $0040;
  1868. SLPCTRL: TSLPCTRL absolute $0050;
  1869. CLKCTRL: TCLKCTRL absolute $0060;
  1870. BOD: TBOD absolute $0080;
  1871. VREF: TVREF absolute $00A0;
  1872. WDT: TWDT absolute $0100;
  1873. CPUINT: TCPUINT absolute $0110;
  1874. CRCSCAN: TCRCSCAN absolute $0120;
  1875. RTC: TRTC absolute $0140;
  1876. EVSYS: TEVSYS absolute $0180;
  1877. CCL: TCCL absolute $01C0;
  1878. PORTA: TPORT absolute $0400;
  1879. PORTB: TPORT absolute $0420;
  1880. PORTC: TPORT absolute $0440;
  1881. PORTMUX: TPORTMUX absolute $05E0;
  1882. ADC0: TADC absolute $0600;
  1883. AC0: TAC absolute $0680;
  1884. USART0: TUSART absolute $0800;
  1885. USART1: TUSART absolute $0820;
  1886. TWI0: TTWI absolute $08A0;
  1887. SPI0: TSPI absolute $08C0;
  1888. TCA0: TTCA absolute $0A00;
  1889. TCB0: TTCB absolute $0A80;
  1890. TCB1: TTCB absolute $0A90;
  1891. SYSCFG: TSYSCFG absolute $0F00;
  1892. NVMCTRL: TNVMCTRL absolute $1000;
  1893. SIGROW: TSIGROW absolute $1100;
  1894. FUSE: TFUSE absolute $1280;
  1895. LOCKBIT: TLOCKBIT absolute $128A;
  1896. USERROW: TUSERROW absolute $1300;
  1897. implementation
  1898. {$define RELBRANCHES}
  1899. {$i avrcommon.inc}
  1900. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  1901. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  1902. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 3
  1903. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 4
  1904. procedure CCL_CCL_ISR; external name 'CCL_CCL_ISR'; // Interrupt 5
  1905. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 6
  1906. procedure PORTB_PORT_ISR; external name 'PORTB_PORT_ISR'; // Interrupt 7
  1907. procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 8
  1908. //procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 8
  1909. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 9
  1910. procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 10
  1911. //procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 10
  1912. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 11
  1913. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 11
  1914. procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 12
  1915. //procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 12
  1916. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 13
  1917. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 14
  1918. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 15
  1919. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 16
  1920. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 17
  1921. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 18
  1922. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 19
  1923. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 20
  1924. procedure ADC0_ERROR_ISR; external name 'ADC0_ERROR_ISR'; // Interrupt 21
  1925. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 22
  1926. procedure ADC0_SAMPRDY_ISR; external name 'ADC0_SAMPRDY_ISR'; // Interrupt 23
  1927. procedure PORTC_PORT_ISR; external name 'PORTC_PORT_ISR'; // Interrupt 24
  1928. procedure TCB1_INT_ISR; external name 'TCB1_INT_ISR'; // Interrupt 25
  1929. procedure USART1_RXC_ISR; external name 'USART1_RXC_ISR'; // Interrupt 26
  1930. procedure USART1_DRE_ISR; external name 'USART1_DRE_ISR'; // Interrupt 27
  1931. procedure USART1_TXC_ISR; external name 'USART1_TXC_ISR'; // Interrupt 28
  1932. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 29
  1933. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  1934. asm
  1935. rjmp __dtors_end
  1936. rjmp CRCSCAN_NMI_ISR
  1937. rjmp BOD_VLM_ISR
  1938. rjmp RTC_CNT_ISR
  1939. rjmp RTC_PIT_ISR
  1940. rjmp CCL_CCL_ISR
  1941. rjmp PORTA_PORT_ISR
  1942. rjmp PORTB_PORT_ISR
  1943. rjmp TCA0_LUNF_ISR
  1944. // rjmp TCA0_OVF_ISR
  1945. rjmp TCA0_HUNF_ISR
  1946. rjmp TCA0_CMP0_ISR
  1947. // rjmp TCA0_LCMP0_ISR
  1948. rjmp TCA0_CMP1_ISR
  1949. // rjmp TCA0_LCMP1_ISR
  1950. rjmp TCA0_CMP2_ISR
  1951. // rjmp TCA0_LCMP2_ISR
  1952. rjmp TCB0_INT_ISR
  1953. rjmp TWI0_TWIS_ISR
  1954. rjmp TWI0_TWIM_ISR
  1955. rjmp SPI0_INT_ISR
  1956. rjmp USART0_RXC_ISR
  1957. rjmp USART0_DRE_ISR
  1958. rjmp USART0_TXC_ISR
  1959. rjmp AC0_AC_ISR
  1960. rjmp ADC0_ERROR_ISR
  1961. rjmp ADC0_RESRDY_ISR
  1962. rjmp ADC0_SAMPRDY_ISR
  1963. rjmp PORTC_PORT_ISR
  1964. rjmp TCB1_INT_ISR
  1965. rjmp USART1_RXC_ISR
  1966. rjmp USART1_DRE_ISR
  1967. rjmp USART1_TXC_ISR
  1968. rjmp NVMCTRL_EE_ISR
  1969. .weak CRCSCAN_NMI_ISR
  1970. .weak BOD_VLM_ISR
  1971. .weak RTC_CNT_ISR
  1972. .weak RTC_PIT_ISR
  1973. .weak CCL_CCL_ISR
  1974. .weak PORTA_PORT_ISR
  1975. .weak PORTB_PORT_ISR
  1976. .weak TCA0_LUNF_ISR
  1977. // .weak TCA0_OVF_ISR
  1978. .weak TCA0_HUNF_ISR
  1979. .weak TCA0_CMP0_ISR
  1980. // .weak TCA0_LCMP0_ISR
  1981. .weak TCA0_CMP1_ISR
  1982. // .weak TCA0_LCMP1_ISR
  1983. .weak TCA0_CMP2_ISR
  1984. // .weak TCA0_LCMP2_ISR
  1985. .weak TCB0_INT_ISR
  1986. .weak TWI0_TWIS_ISR
  1987. .weak TWI0_TWIM_ISR
  1988. .weak SPI0_INT_ISR
  1989. .weak USART0_RXC_ISR
  1990. .weak USART0_DRE_ISR
  1991. .weak USART0_TXC_ISR
  1992. .weak AC0_AC_ISR
  1993. .weak ADC0_ERROR_ISR
  1994. .weak ADC0_RESRDY_ISR
  1995. .weak ADC0_SAMPRDY_ISR
  1996. .weak PORTC_PORT_ISR
  1997. .weak TCB1_INT_ISR
  1998. .weak USART1_RXC_ISR
  1999. .weak USART1_DRE_ISR
  2000. .weak USART1_TXC_ISR
  2001. .weak NVMCTRL_EE_ISR
  2002. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  2003. .set BOD_VLM_ISR, Default_IRQ_handler
  2004. .set RTC_CNT_ISR, Default_IRQ_handler
  2005. .set RTC_PIT_ISR, Default_IRQ_handler
  2006. .set CCL_CCL_ISR, Default_IRQ_handler
  2007. .set PORTA_PORT_ISR, Default_IRQ_handler
  2008. .set PORTB_PORT_ISR, Default_IRQ_handler
  2009. .set TCA0_LUNF_ISR, Default_IRQ_handler
  2010. // .set TCA0_OVF_ISR, Default_IRQ_handler
  2011. .set TCA0_HUNF_ISR, Default_IRQ_handler
  2012. .set TCA0_CMP0_ISR, Default_IRQ_handler
  2013. // .set TCA0_LCMP0_ISR, Default_IRQ_handler
  2014. .set TCA0_CMP1_ISR, Default_IRQ_handler
  2015. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  2016. .set TCA0_CMP2_ISR, Default_IRQ_handler
  2017. // .set TCA0_LCMP2_ISR, Default_IRQ_handler
  2018. .set TCB0_INT_ISR, Default_IRQ_handler
  2019. .set TWI0_TWIS_ISR, Default_IRQ_handler
  2020. .set TWI0_TWIM_ISR, Default_IRQ_handler
  2021. .set SPI0_INT_ISR, Default_IRQ_handler
  2022. .set USART0_RXC_ISR, Default_IRQ_handler
  2023. .set USART0_DRE_ISR, Default_IRQ_handler
  2024. .set USART0_TXC_ISR, Default_IRQ_handler
  2025. .set AC0_AC_ISR, Default_IRQ_handler
  2026. .set ADC0_ERROR_ISR, Default_IRQ_handler
  2027. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  2028. .set ADC0_SAMPRDY_ISR, Default_IRQ_handler
  2029. .set PORTC_PORT_ISR, Default_IRQ_handler
  2030. .set TCB1_INT_ISR, Default_IRQ_handler
  2031. .set USART1_RXC_ISR, Default_IRQ_handler
  2032. .set USART1_DRE_ISR, Default_IRQ_handler
  2033. .set USART1_TXC_ISR, Default_IRQ_handler
  2034. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  2035. end;
  2036. end.