atxmega128b3.pp 78 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990
  1. unit ATxmega128B3;
  2. interface
  3. type
  4. TGPIO = object //General Purpose IO Registers
  5. GPIOR0: byte; //General Purpose IO Register 0
  6. GPIOR1: byte; //General Purpose IO Register 1
  7. GPIOR2: byte; //General Purpose IO Register 2
  8. GPIOR3: byte; //General Purpose IO Register 3
  9. end;
  10. TVPORT = object //Virtual Port
  11. DIR: byte; //I/O Port Data Direction
  12. OUT_: byte; //I/O Port Output
  13. IN_: byte; //I/O Port Input
  14. INTFLAGS: byte; //Interrupt Flag Register
  15. const
  16. // Port Interrupt 1 Flag
  17. INT1IFbm = $02;
  18. // Port Interrupt 0 Flag
  19. INT0IFbm = $01;
  20. end;
  21. TOCD = object //On-Chip Debug System
  22. OCDR0: byte; //OCD Register 0
  23. OCDR1: byte; //OCD Register 1
  24. end;
  25. TCPU = object //CPU registers
  26. Reserved0: byte;
  27. Reserved1: byte;
  28. Reserved2: byte;
  29. Reserved3: byte;
  30. CCP: byte; //Configuration Change Protection
  31. Reserved5: byte;
  32. Reserved6: byte;
  33. Reserved7: byte;
  34. RAMPD: byte; //Ramp D
  35. RAMPX: byte; //Ramp X
  36. RAMPY: byte; //Ramp Y
  37. RAMPZ: byte; //Ramp Z
  38. EIND: byte; //Extended Indirect Jump
  39. SPL: byte; //Stack Pointer Low
  40. SPH: byte; //Stack Pointer High
  41. SREG: byte; //Status Register
  42. const
  43. // CCP
  44. CCPmask = $FF;
  45. CCP_SPM = $9D;
  46. CCP_IOREG = $D8;
  47. // Global Interrupt Enable Flag
  48. Ibm = $80;
  49. // Transfer Bit
  50. Tbm = $40;
  51. // Half Carry Flag
  52. Hbm = $20;
  53. // N Exclusive Or V Flag
  54. Sbm = $10;
  55. // Two's Complement Overflow Flag
  56. Vbm = $08;
  57. // Negative Flag
  58. Nbm = $04;
  59. // Zero Flag
  60. Zbm = $02;
  61. // Carry Flag
  62. Cbm = $01;
  63. end;
  64. TCLK = object //Clock System
  65. CTRL: byte; //Control Register
  66. PSCTRL: byte; //Prescaler Control Register
  67. LOCK: byte; //Lock register
  68. RTCCTRL: byte; //RTC Control Register
  69. USBCTRL: byte; //USB Control Register
  70. const
  71. // CLK_SCLKSEL
  72. SCLKSELmask = $07;
  73. SCLKSEL_RC2M = $00;
  74. SCLKSEL_RC32M = $01;
  75. SCLKSEL_RC32K = $02;
  76. SCLKSEL_XOSC = $03;
  77. SCLKSEL_PLL = $04;
  78. // CLK_PSADIV
  79. PSADIVmask = $7C;
  80. PSADIV_1 = $00;
  81. PSADIV_2 = $04;
  82. PSADIV_4 = $0C;
  83. PSADIV_8 = $14;
  84. PSADIV_16 = $1C;
  85. PSADIV_32 = $24;
  86. PSADIV_64 = $2C;
  87. PSADIV_128 = $34;
  88. PSADIV_256 = $3C;
  89. PSADIV_512 = $44;
  90. // CLK_PSBCDIV
  91. PSBCDIVmask = $03;
  92. PSBCDIV_1_1 = $00;
  93. PSBCDIV_1_2 = $01;
  94. PSBCDIV_4_1 = $02;
  95. PSBCDIV_2_2 = $03;
  96. // Clock System Lock
  97. LOCKbm = $01;
  98. // CLK_RTCSRC
  99. RTCSRCmask = $0E;
  100. RTCSRC_ULP = $00;
  101. RTCSRC_TOSC = $02;
  102. RTCSRC_RCOSC = $04;
  103. RTCSRC_TOSC32 = $0A;
  104. RTCSRC_RCOSC32 = $0C;
  105. RTCSRC_EXTCLK = $0E;
  106. // Clock Source Enable
  107. RTCENbm = $01;
  108. // CLK_USBPSDIV
  109. USBPSDIVmask = $38;
  110. USBPSDIV_1 = $00;
  111. USBPSDIV_2 = $08;
  112. USBPSDIV_4 = $10;
  113. USBPSDIV_8 = $18;
  114. USBPSDIV_16 = $20;
  115. USBPSDIV_32 = $28;
  116. // CLK_USBSRC
  117. USBSRCmask = $06;
  118. USBSRC_PLL = $00;
  119. USBSRC_RC32M = $02;
  120. // Clock Source Enable
  121. USBSENbm = $01;
  122. end;
  123. TSLEEP = object //Sleep Controller
  124. CTRL: byte; //Control Register
  125. const
  126. // SLEEP_SMODE
  127. SMODEmask = $0E;
  128. SMODE_IDLE = $00;
  129. SMODE_PDOWN = $04;
  130. SMODE_PSAVE = $06;
  131. SMODE_STDBY = $0C;
  132. SMODE_ESTDBY = $0E;
  133. // Sleep Enable
  134. SENbm = $01;
  135. end;
  136. TOSC = object //Oscillator
  137. CTRL: byte; //Control Register
  138. STATUS: byte; //Status Register
  139. XOSCCTRL: byte; //External Oscillator Control Register
  140. XOSCFAIL: byte; //Oscillator Failure Detection Register
  141. RC32KCAL: byte; //32.768 kHz Internal Oscillator Calibration Register
  142. PLLCTRL: byte; //PLL Control Register
  143. DFLLCTRL: byte; //DFLL Control Register
  144. const
  145. // PLL Enable
  146. PLLENbm = $10;
  147. // External Oscillator Enable
  148. XOSCENbm = $08;
  149. // Internal 32.768 kHz RC Oscillator Enable
  150. RC32KENbm = $04;
  151. // Internal 32 MHz RC Oscillator Enable
  152. RC32MENbm = $02;
  153. // Internal 2 MHz RC Oscillator Enable
  154. RC2MENbm = $01;
  155. // PLL Ready
  156. PLLRDYbm = $10;
  157. // External Oscillator Ready
  158. XOSCRDYbm = $08;
  159. // Internal 32.768 kHz RC Oscillator Ready
  160. RC32KRDYbm = $04;
  161. // Internal 32 MHz RC Oscillator Ready
  162. RC32MRDYbm = $02;
  163. // Internal 2 MHz RC Oscillator Ready
  164. RC2MRDYbm = $01;
  165. // OSC_FRQRANGE
  166. FRQRANGEmask = $C0;
  167. FRQRANGE_04TO2 = $00;
  168. FRQRANGE_2TO9 = $40;
  169. FRQRANGE_9TO12 = $80;
  170. FRQRANGE_12TO16 = $C0;
  171. // 32.768 kHz XTAL OSC Low-power Mode
  172. X32KLPMbm = $20;
  173. // 16 MHz Crystal Oscillator High Power mode
  174. XOSCPWRbm = $10;
  175. // OSC_XOSCSEL
  176. XOSCSELmask = $1F;
  177. XOSCSEL_EXTCLK = $00;
  178. XOSCSEL_EXTCLK_C0 = $01;
  179. XOSCSEL_EXTCLK_C1 = $05;
  180. XOSCSEL_EXTCLK_C2 = $09;
  181. XOSCSEL_EXTCLK_C3 = $0D;
  182. XOSCSEL_EXTCLK_C4 = $11;
  183. XOSCSEL_EXTCLK_C5 = $15;
  184. XOSCSEL_EXTCLK_C6 = $19;
  185. XOSCSEL_EXTCLK_C7 = $1D;
  186. XOSCSEL_32KHz = $02;
  187. XOSCSEL_XTAL_256CLK = $03;
  188. XOSCSEL_XTAL_1KCLK = $07;
  189. XOSCSEL_XTAL_16KCLK = $0B;
  190. // PLL Failure Detection Interrupt Flag
  191. PLLFDIFbm = $08;
  192. // PLL Failure Detection Enable
  193. PLLFDENbm = $04;
  194. // XOSC Failure Detection Interrupt Flag
  195. XOSCFDIFbm = $02;
  196. // XOSC Failure Detection Enable
  197. XOSCFDENbm = $01;
  198. // OSC_PLLSRC
  199. PLLSRCmask = $C0;
  200. PLLSRC_RC2M = $00;
  201. PLLSRC_RC32M = $80;
  202. PLLSRC_XOSC = $C0;
  203. // Divide by 2
  204. PLLDIVbm = $20;
  205. // Multiplication Factor
  206. PLLFAC0bm = $01;
  207. PLLFAC1bm = $02;
  208. PLLFAC2bm = $04;
  209. PLLFAC3bm = $08;
  210. PLLFAC4bm = $10;
  211. // OSC_RC32MCREF
  212. RC32MCREFmask = $06;
  213. RC32MCREF_RC32K = $00;
  214. RC32MCREF_XOSC32K = $02;
  215. RC32MCREF_USBSOF = $04;
  216. // OSC_RC2MCREF
  217. RC2MCREFmask = $01;
  218. RC2MCREF_RC32K = $00;
  219. RC2MCREF_XOSC32K = $01;
  220. end;
  221. TDFLL = object //DFLL
  222. CTRL: byte; //Control Register
  223. Reserved1: byte;
  224. CALA: byte; //Calibration Register A
  225. CALB: byte; //Calibration Register B
  226. COMP0: byte; //Oscillator Compare Register 0
  227. COMP1: byte; //Oscillator Compare Register 1
  228. COMP2: byte; //Oscillator Compare Register 2
  229. const
  230. // DFLL Enable
  231. ENABLEbm = $01;
  232. // DFLL Calibration Value A
  233. CALL0bm = $01;
  234. CALL1bm = $02;
  235. CALL2bm = $04;
  236. CALL3bm = $08;
  237. CALL4bm = $10;
  238. CALL5bm = $20;
  239. CALL6bm = $40;
  240. // DFLL Calibration Value B
  241. CALH0bm = $01;
  242. CALH1bm = $02;
  243. CALH2bm = $04;
  244. CALH3bm = $08;
  245. CALH4bm = $10;
  246. CALH5bm = $20;
  247. end;
  248. TPR = object //Power Reduction
  249. PRGEN: byte; //General Power Reduction
  250. PRPA: byte; //Power Reduction Port A
  251. PRPB: byte; //Power Reduction Port B
  252. PRPC: byte; //Power Reduction Port C
  253. Reserved4: byte;
  254. PRPE: byte; //Power Reduction Port E
  255. const
  256. // LCD Module
  257. LCDbm = $80;
  258. // USB
  259. USBbm = $40;
  260. // AES
  261. AESbm = $10;
  262. // Real-time Counter
  263. RTCbm = $04;
  264. // Event System
  265. EVSYSbm = $02;
  266. // DMA-Controller
  267. DMAbm = $01;
  268. // Port A ADC
  269. ADCbm = $02;
  270. // Port A Analog Comparator
  271. ACbm = $01;
  272. // Port C Two-wire Interface
  273. TWIbm = $40;
  274. // Port C USART0
  275. USART0bm = $10;
  276. // Port C SPI
  277. SPIbm = $08;
  278. // Port C AWEX
  279. HIRESbm = $04;
  280. // Port C Timer/Counter1
  281. TC1bm = $02;
  282. // Port C Timer/Counter0
  283. TC0bm = $01;
  284. end;
  285. TRST = object //Reset
  286. STATUS: byte; //Status Register
  287. CTRL: byte; //Control Register
  288. const
  289. // Spike Detection Reset Flag
  290. SDRFbm = $40;
  291. // Software Reset Flag
  292. SRFbm = $20;
  293. // Programming and Debug Interface Interface Reset Flag
  294. PDIRFbm = $10;
  295. // Watchdog Reset Flag
  296. WDRFbm = $08;
  297. // Brown-out Reset Flag
  298. BORFbm = $04;
  299. // External Reset Flag
  300. EXTRFbm = $02;
  301. // Power-on Reset Flag
  302. PORFbm = $01;
  303. // Software Reset
  304. SWRSTbm = $01;
  305. end;
  306. TWDT = object //Watch-Dog Timer
  307. CTRL: byte; //Control
  308. WINCTRL: byte; //Windowed Mode Control
  309. STATUS: byte; //Status
  310. const
  311. // WDT_PER
  312. PERmask = $3C;
  313. PER_8CLK = $00;
  314. PER_16CLK = $04;
  315. PER_32CLK = $08;
  316. PER_64CLK = $0C;
  317. PER_128CLK = $10;
  318. PER_256CLK = $14;
  319. PER_512CLK = $18;
  320. PER_1KCLK = $1C;
  321. PER_2KCLK = $20;
  322. PER_4KCLK = $24;
  323. PER_8KCLK = $28;
  324. // Enable
  325. ENABLEbm = $02;
  326. // Change Enable
  327. CENbm = $01;
  328. // WDT_WPER
  329. WPERmask = $3C;
  330. WPER_8CLK = $00;
  331. WPER_16CLK = $04;
  332. WPER_32CLK = $08;
  333. WPER_64CLK = $0C;
  334. WPER_128CLK = $10;
  335. WPER_256CLK = $14;
  336. WPER_512CLK = $18;
  337. WPER_1KCLK = $1C;
  338. WPER_2KCLK = $20;
  339. WPER_4KCLK = $24;
  340. WPER_8KCLK = $28;
  341. // Windowed Mode Enable
  342. WENbm = $02;
  343. // Windowed Mode Change Enable
  344. WCENbm = $01;
  345. // Syncronization busy
  346. SYNCBUSYbm = $01;
  347. end;
  348. TMCU = object //MCU Control
  349. DEVID0: byte; //Device ID byte 0
  350. DEVID1: byte; //Device ID byte 1
  351. DEVID2: byte; //Device ID byte 2
  352. REVID: byte; //Revision ID
  353. JTAGUID: byte; //JTAG User ID
  354. Reserved5: byte;
  355. MCUCR: byte; //MCU Control
  356. ANAINIT: byte; //Analog Startup Delay
  357. EVSYSLOCK: byte; //Event System Lock
  358. AWEXLOCK: byte; //AWEX Lock
  359. const
  360. // JTAG Disable
  361. JTAGDbm = $01;
  362. // Analog startup delay Port B
  363. STARTUPDLYB0bm = $04;
  364. STARTUPDLYB1bm = $08;
  365. // Analog startup delay Port A
  366. STARTUPDLYA0bm = $01;
  367. STARTUPDLYA1bm = $02;
  368. // Event Channel 4-7 Lock
  369. EVSYS1LOCKbm = $10;
  370. // Event Channel 0-3 Lock
  371. EVSYS0LOCKbm = $01;
  372. // AWeX on T/C C0 Lock
  373. AWEXCLOCKbm = $01;
  374. end;
  375. TPMIC = object //Programmable Multi-level Interrupt Controller
  376. STATUS: byte; //Status Register
  377. INTPRI: byte; //Interrupt Priority
  378. CTRL: byte; //Control Register
  379. const
  380. // Non-maskable Interrupt Executing
  381. NMIEXbm = $80;
  382. // High Level Interrupt Executing
  383. HILVLEXbm = $04;
  384. // Medium Level Interrupt Executing
  385. MEDLVLEXbm = $02;
  386. // Low Level Interrupt Executing
  387. LOLVLEXbm = $01;
  388. // Round-Robin Priority Enable
  389. RRENbm = $80;
  390. // Interrupt Vector Select
  391. IVSELbm = $40;
  392. // High Level Enable
  393. HILVLENbm = $04;
  394. // Medium Level Enable
  395. MEDLVLENbm = $02;
  396. // Low Level Enable
  397. LOLVLENbm = $01;
  398. end;
  399. TPORTCFG = object //I/O port Configuration
  400. MPCMASK: byte; //Multi-pin Configuration Mask
  401. Reserved1: byte;
  402. VPCTRLA: byte; //Virtual Port Control Register A
  403. VPCTRLB: byte; //Virtual Port Control Register B
  404. CLKEVOUT: byte; //Clock and Event Out Register
  405. Reserved5: byte;
  406. EVOUTSEL: byte; //Event Output Select
  407. const
  408. // VP1MAP
  409. VP1MAPmask = $F0;
  410. VP1MAPPORTA = $00;
  411. VP1MAPPORTB = $10;
  412. VP1MAPPORTC = $20;
  413. VP1MAPPORTD = $30;
  414. VP1MAPPORTE = $40;
  415. VP1MAPPORTG = $60;
  416. VP1MAPPORTM = $B0;
  417. VP1MAPPORTR = $F0;
  418. // VP0MAP
  419. VP0MAPmask = $0F;
  420. VP0MAPPORTA = $00;
  421. VP0MAPPORTB = $01;
  422. VP0MAPPORTC = $02;
  423. VP0MAPPORTD = $03;
  424. VP0MAPPORTE = $04;
  425. VP0MAPPORTG = $06;
  426. VP0MAPPORTM = $0B;
  427. VP0MAPPORTR = $0F;
  428. // VP3MAP
  429. VP3MAPmask = $F0;
  430. VP3MAPPORTA = $00;
  431. VP3MAPPORTB = $10;
  432. VP3MAPPORTC = $20;
  433. VP3MAPPORTD = $30;
  434. VP3MAPPORTE = $40;
  435. VP3MAPPORTG = $60;
  436. VP3MAPPORTM = $B0;
  437. VP3MAPPORTR = $F0;
  438. // VP2MAP
  439. VP2MAPmask = $0F;
  440. VP2MAPPORTA = $00;
  441. VP2MAPPORTB = $01;
  442. VP2MAPPORTC = $02;
  443. VP2MAPPORTD = $03;
  444. VP2MAPPORTE = $04;
  445. VP2MAPPORTG = $06;
  446. VP2MAPPORTM = $0B;
  447. VP2MAPPORTR = $0F;
  448. // PORTCFG_CLKOUT
  449. CLKOUTmask = $03;
  450. CLKOUT_OFF = $00;
  451. CLKOUT_PC = $01;
  452. CLKOUT_PE = $03;
  453. // PORTCFG_CLKOUTSEL
  454. CLKOUTSELmask = $0C;
  455. CLKOUTSEL_CLK1X = $00;
  456. CLKOUTSEL_CLK2X = $04;
  457. CLKOUTSEL_CLK4X = $08;
  458. // PORTCFG_EVOUT
  459. EVOUTmask = $30;
  460. EVOUT_OFF = $00;
  461. EVOUT_PC = $10;
  462. EVOUT_PE = $30;
  463. // RTC Clock Output
  464. RTCOUTbm = $40;
  465. // PORTCFG_CLKEVPIN
  466. CLKEVPINmask = $80;
  467. CLKEVPIN_PIN7 = $00;
  468. CLKEVPIN_PIN4 = $80;
  469. // **** Inconsistency between mask and values for EVOUTSEL
  470. // PORTCFG_EVOUTSEL
  471. EVOUTSELmask = $04;
  472. EVOUTSEL_0 = $00;
  473. EVOUTSEL_1 = $04;
  474. EVOUTSEL_2 = $08;
  475. EVOUTSEL_3 = $0C;
  476. end;
  477. TAES = object //AES Module
  478. CTRL: byte; //AES Control Register
  479. STATUS: byte; //AES Status Register
  480. STATE: byte; //AES State Register
  481. KEY: byte; //AES Key Register
  482. INTCTRL: byte; //AES Interrupt Control Register
  483. const
  484. // Start/Run
  485. STARTbm = $80;
  486. // Auto Start Trigger
  487. AUTObm = $40;
  488. // AES Software Reset
  489. RESETbm = $20;
  490. // Decryption / Direction
  491. DECRYPTbm = $10;
  492. // State XOR Load Enable
  493. XORbm = $04;
  494. // AES Error
  495. ERRORbm = $80;
  496. // State Ready Interrupt Flag
  497. SRIFbm = $01;
  498. // AES_INTLVL
  499. INTLVLmask = $03;
  500. INTLVL_OFF = $00;
  501. INTLVL_LO = $01;
  502. INTLVL_MED = $02;
  503. INTLVL_HI = $03;
  504. end;
  505. TCRC = object //Cyclic Redundancy Checker
  506. CTRL: byte; //Control Register
  507. STATUS: byte; //Status Register
  508. Reserved2: byte;
  509. DATAIN: byte; //Data Input
  510. CHECKSUM0: byte; //Checksum byte 0
  511. CHECKSUM1: byte; //Checksum byte 1
  512. CHECKSUM2: byte; //Checksum byte 2
  513. CHECKSUM3: byte; //Checksum byte 3
  514. const
  515. // CRC_RESET
  516. RESETmask = $C0;
  517. RESET_NO = $00;
  518. RESET_RESET0 = $80;
  519. RESET_RESET1 = $C0;
  520. // CRC Mode
  521. CRC32bm = $20;
  522. // CRC_SOURCE
  523. SOURCEmask = $0F;
  524. SOURCE_DISABLE = $00;
  525. SOURCE_IO = $01;
  526. SOURCE_FLASH = $02;
  527. SOURCE_DMAC0 = $04;
  528. SOURCE_DMAC1 = $05;
  529. // Zero detection
  530. ZERObm = $02;
  531. // Busy
  532. BUSYbm = $01;
  533. end;
  534. TDMA_CH = object //DMA Channel
  535. CTRLA: byte; //Channel Control
  536. CTRLB: byte; //Channel Control
  537. ADDRCTRL: byte; //Address Control
  538. TRIGSRC: byte; //Channel Trigger Source
  539. TRFCNT: word; //Channel Block Transfer Count
  540. REPCNT: byte; //Channel Repeat Count
  541. Reserved7: byte;
  542. SRCADDR0: byte; //Channel Source Address 0
  543. SRCADDR1: byte; //Channel Source Address 1
  544. Reserved10: byte;
  545. Reserved11: byte;
  546. DESTADDR0: byte; //Channel Destination Address 0
  547. DESTADDR1: byte; //Channel Destination Address 1
  548. const
  549. // Channel Enable
  550. CHENbm = $80;
  551. // Channel Software Reset
  552. CHRSTbm = $40;
  553. // Channel Repeat Mode
  554. REPEATbm = $20;
  555. // Channel Transfer Request
  556. TRFREQbm = $10;
  557. // Channel Single Shot Data Transfer
  558. SINGLEbm = $04;
  559. // BURSTLEN
  560. BURSTLENmask = $03;
  561. BURSTLEN1BYTE = $00;
  562. BURSTLEN2BYTE = $01;
  563. BURSTLEN4BYTE = $02;
  564. BURSTLEN8BYTE = $03;
  565. // Block Transfer Busy
  566. CHBUSYbm = $80;
  567. // Block Transfer Pending
  568. CHPENDbm = $40;
  569. // Block Transfer Error Interrupt Flag
  570. ERRIFbm = $20;
  571. // Transaction Complete Interrupt Flag
  572. TRNIFbm = $10;
  573. // ERRINTLVL
  574. ERRINTLVLmask = $0C;
  575. ERRINTLVLOFF = $00;
  576. ERRINTLVLLO = $04;
  577. ERRINTLVLMED = $08;
  578. ERRINTLVLHI = $0C;
  579. // TRNINTLVL
  580. TRNINTLVLmask = $03;
  581. TRNINTLVLOFF = $00;
  582. TRNINTLVLLO = $01;
  583. TRNINTLVLMED = $02;
  584. TRNINTLVLHI = $03;
  585. // SRCRELOAD
  586. SRCRELOADmask = $C0;
  587. SRCRELOADNONE = $00;
  588. SRCRELOADBLOCK = $40;
  589. SRCRELOADBURST = $80;
  590. SRCRELOADTRANSACTION = $C0;
  591. // SRCDIR
  592. SRCDIRmask = $30;
  593. SRCDIRFIXED = $00;
  594. SRCDIRINC = $10;
  595. SRCDIRDEC = $20;
  596. // DESTRELOAD
  597. DESTRELOADmask = $0C;
  598. DESTRELOADNONE = $00;
  599. DESTRELOADBLOCK = $04;
  600. DESTRELOADBURST = $08;
  601. DESTRELOADTRANSACTION = $0C;
  602. // DESTDIR
  603. DESTDIRmask = $03;
  604. DESTDIRFIXED = $00;
  605. DESTDIRINC = $01;
  606. DESTDIRDEC = $02;
  607. // TRIGSRC
  608. TRIGSRCmask = $FF;
  609. TRIGSRCOFF = $00;
  610. TRIGSRCEVSYS_CH0 = $01;
  611. TRIGSRCEVSYS_CH1 = $02;
  612. TRIGSRCEVSYS_CH2 = $03;
  613. TRIGSRCAES = $04;
  614. TRIGSRCADCA_CH0 = $10;
  615. TRIGSRCADCB_CH0 = $20;
  616. TRIGSRCTCC0_OVF = $40;
  617. TRIGSRCTCC0_ERR = $41;
  618. TRIGSRCTCC0_CCA = $42;
  619. TRIGSRCTCC0_CCB = $43;
  620. TRIGSRCTCC0_CCC = $44;
  621. TRIGSRCTCC0_CCD = $45;
  622. TRIGSRCTCC1_OVF = $46;
  623. TRIGSRCTCC1_ERR = $47;
  624. TRIGSRCTCC1_CCA = $48;
  625. TRIGSRCTCC1_CCB = $49;
  626. TRIGSRCSPIC = $4A;
  627. TRIGSRCUSARTC0_RXC = $4B;
  628. TRIGSRCUSARTC0_DRE = $4C;
  629. TRIGSRCTCE0_OVF = $80;
  630. TRIGSRCTCE0_ERR = $81;
  631. TRIGSRCTCE0_CCA = $82;
  632. TRIGSRCTCE0_CCB = $83;
  633. TRIGSRCTCE0_CCC = $84;
  634. TRIGSRCTCE0_CCD = $85;
  635. TRIGSRCUSARTE0_RXC = $8B;
  636. TRIGSRCUSARTE0_DRE = $8C;
  637. end;
  638. TDMA = object //DMA Controller
  639. CTRL: byte; //Control
  640. Reserved1: byte;
  641. Reserved2: byte;
  642. INTFLAGS: byte; //Transfer Interrupt Status
  643. STATUS: byte; //Status
  644. Reserved5: byte;
  645. TEMP: word; //Temporary Register For 16-bit Access
  646. Reserved8: byte;
  647. Reserved9: byte;
  648. Reserved10: byte;
  649. Reserved11: byte;
  650. Reserved12: byte;
  651. Reserved13: byte;
  652. Reserved14: byte;
  653. Reserved15: byte;
  654. CH0: TDMA_CH; //DMA Channel 0
  655. CH1: TDMA_CH; //DMA Channel 1
  656. const
  657. // Enable
  658. ENABLEbm = $80;
  659. // Software Reset
  660. RESETbm = $40;
  661. // DMA_DBUFMODE
  662. DBUFMODEmask = $04;
  663. DBUFMODE_DISABLED = $00;
  664. DBUFMODE_CH01 = $04;
  665. // DMA_PRIMODE
  666. PRIMODEmask = $01;
  667. PRIMODE_RR01 = $00;
  668. PRIMODE_CH0RR1 = $01;
  669. // Channel 1 Block Transfer Error Interrupt Flag
  670. CH1ERRIFbm = $20;
  671. // Channel 0 Block Transfer Error Interrupt Flag
  672. CH0ERRIFbm = $10;
  673. // Channel 1 Transaction Complete Interrupt Flag
  674. CH1TRNIFbm = $02;
  675. // Channel 0 Transaction Complete Interrupt Flag
  676. CH0TRNIFbm = $01;
  677. // Channel 1 Block Transfer Busy
  678. CH1BUSYbm = $20;
  679. // Channel 0 Block Transfer Busy
  680. CH0BUSYbm = $10;
  681. // Channel 1 Block Transfer Pending
  682. CH1PENDbm = $02;
  683. // Channel 0 Block Transfer Pending
  684. CH0PENDbm = $01;
  685. end;
  686. TEVSYS = object //Event System
  687. CH0MUX: byte; //Event Channel 0 Multiplexer
  688. CH1MUX: byte; //Event Channel 1 Multiplexer
  689. CH2MUX: byte; //Event Channel 2 Multiplexer
  690. CH3MUX: byte; //Event Channel 3 Multiplexer
  691. Reserved4: byte;
  692. Reserved5: byte;
  693. Reserved6: byte;
  694. Reserved7: byte;
  695. CH0CTRL: byte; //Channel 0 Control Register
  696. CH1CTRL: byte; //Channel 1 Control Register
  697. CH2CTRL: byte; //Channel 2 Control Register
  698. CH3CTRL: byte; //Channel 3 Control Register
  699. Reserved12: byte;
  700. Reserved13: byte;
  701. Reserved14: byte;
  702. Reserved15: byte;
  703. STROBE: byte; //Event Strobe
  704. DATA: byte; //Event Data
  705. const
  706. // EVSYS_CHMUX
  707. CHMUXmask = $FF;
  708. CHMUX_OFF = $00;
  709. CHMUX_RTC_OVF = $08;
  710. CHMUX_RTC_CMP = $09;
  711. CHMUX_USB = $0A;
  712. CHMUX_ACA_CH0 = $10;
  713. CHMUX_ACA_CH1 = $11;
  714. CHMUX_ACA_WIN = $12;
  715. CHMUX_ACB_CH0 = $13;
  716. CHMUX_ACB_CH1 = $14;
  717. CHMUX_ACB_WIN = $15;
  718. CHMUX_ADCA_CH0 = $20;
  719. CHMUX_ADCB_CH0 = $24;
  720. CHMUX_PORTA_PIN0 = $50;
  721. CHMUX_PORTA_PIN1 = $51;
  722. CHMUX_PORTA_PIN2 = $52;
  723. CHMUX_PORTA_PIN3 = $53;
  724. CHMUX_PORTA_PIN4 = $54;
  725. CHMUX_PORTA_PIN5 = $55;
  726. CHMUX_PORTA_PIN6 = $56;
  727. CHMUX_PORTA_PIN7 = $57;
  728. CHMUX_PORTB_PIN0 = $58;
  729. CHMUX_PORTB_PIN1 = $59;
  730. CHMUX_PORTB_PIN2 = $5A;
  731. CHMUX_PORTB_PIN3 = $5B;
  732. CHMUX_PORTB_PIN4 = $5C;
  733. CHMUX_PORTB_PIN5 = $5D;
  734. CHMUX_PORTB_PIN6 = $5E;
  735. CHMUX_PORTB_PIN7 = $5F;
  736. CHMUX_PORTC_PIN0 = $60;
  737. CHMUX_PORTC_PIN1 = $61;
  738. CHMUX_PORTC_PIN2 = $62;
  739. CHMUX_PORTC_PIN3 = $63;
  740. CHMUX_PORTC_PIN4 = $64;
  741. CHMUX_PORTC_PIN5 = $65;
  742. CHMUX_PORTC_PIN6 = $66;
  743. CHMUX_PORTC_PIN7 = $67;
  744. CHMUX_PORTD_PIN0 = $68;
  745. CHMUX_PORTD_PIN1 = $69;
  746. CHMUX_PORTD_PIN2 = $6A;
  747. CHMUX_PORTE_PIN0 = $70;
  748. CHMUX_PORTE_PIN1 = $71;
  749. CHMUX_PORTE_PIN2 = $72;
  750. CHMUX_PORTE_PIN3 = $73;
  751. CHMUX_PORTE_PIN4 = $74;
  752. CHMUX_PORTE_PIN5 = $75;
  753. CHMUX_PORTE_PIN6 = $76;
  754. CHMUX_PORTE_PIN7 = $77;
  755. CHMUX_PRESCALER_1 = $80;
  756. CHMUX_PRESCALER_2 = $81;
  757. CHMUX_PRESCALER_4 = $82;
  758. CHMUX_PRESCALER_8 = $83;
  759. CHMUX_PRESCALER_16 = $84;
  760. CHMUX_PRESCALER_32 = $85;
  761. CHMUX_PRESCALER_64 = $86;
  762. CHMUX_PRESCALER_128 = $87;
  763. CHMUX_PRESCALER_256 = $88;
  764. CHMUX_PRESCALER_512 = $89;
  765. CHMUX_PRESCALER_1024 = $8A;
  766. CHMUX_PRESCALER_2048 = $8B;
  767. CHMUX_PRESCALER_4096 = $8C;
  768. CHMUX_PRESCALER_8192 = $8D;
  769. CHMUX_PRESCALER_16384 = $8E;
  770. CHMUX_PRESCALER_32768 = $8F;
  771. CHMUX_TCC0_OVF = $C0;
  772. CHMUX_TCC0_ERR = $C1;
  773. CHMUX_TCC0_CCA = $C4;
  774. CHMUX_TCC0_CCB = $C5;
  775. CHMUX_TCC0_CCC = $C6;
  776. CHMUX_TCC0_CCD = $C7;
  777. CHMUX_TCC1_OVF = $C8;
  778. CHMUX_TCC1_ERR = $C9;
  779. CHMUX_TCC1_CCA = $CC;
  780. CHMUX_TCC1_CCB = $CD;
  781. CHMUX_TCE0_OVF = $E0;
  782. CHMUX_TCE0_ERR = $E1;
  783. CHMUX_TCE0_CCA = $E4;
  784. CHMUX_TCE0_CCB = $E5;
  785. CHMUX_TCE0_CCC = $E6;
  786. CHMUX_TCE0_CCD = $E7;
  787. // EVSYS_QDIRM
  788. QDIRMmask = $60;
  789. QDIRM_00 = $00;
  790. QDIRM_01 = $20;
  791. QDIRM_10 = $40;
  792. QDIRM_11 = $60;
  793. // Quadrature Decoder Index Enable
  794. QDIENbm = $10;
  795. // Quadrature Decoder Enable
  796. QDENbm = $08;
  797. // EVSYS_DIGFILT
  798. DIGFILTmask = $07;
  799. DIGFILT_1SAMPLE = $00;
  800. DIGFILT_2SAMPLES = $01;
  801. DIGFILT_3SAMPLES = $02;
  802. DIGFILT_4SAMPLES = $03;
  803. DIGFILT_5SAMPLES = $04;
  804. DIGFILT_6SAMPLES = $05;
  805. DIGFILT_7SAMPLES = $06;
  806. DIGFILT_8SAMPLES = $07;
  807. end;
  808. TNVM = object //Non-volatile Memory Controller
  809. ADDR0: byte; //Address Register 0
  810. ADDR1: byte; //Address Register 1
  811. ADDR2: byte; //Address Register 2
  812. Reserved3: byte;
  813. DATA0: byte; //Data Register 0
  814. DATA1: byte; //Data Register 1
  815. DATA2: byte; //Data Register 2
  816. Reserved7: byte;
  817. Reserved8: byte;
  818. Reserved9: byte;
  819. CMD: byte; //Command
  820. CTRLA: byte; //Control Register A
  821. CTRLB: byte; //Control Register B
  822. INTCTRL: byte; //Interrupt Control
  823. Reserved14: byte;
  824. STATUS: byte; //Status
  825. LOCKBITS: byte; //Lock Bits
  826. const
  827. // NVM_CMD
  828. CMDmask = $7F;
  829. CMD_NO_OPERATION = $00;
  830. CMD_READ_USER_SIG_ROW = $01;
  831. CMD_READ_CALIB_ROW = $02;
  832. CMD_READ_EEPROM = $06;
  833. CMD_READ_FUSES = $07;
  834. CMD_WRITE_LOCK_BITS = $08;
  835. CMD_ERASE_USER_SIG_ROW = $18;
  836. CMD_WRITE_USER_SIG_ROW = $1A;
  837. CMD_ERASE_APP = $20;
  838. CMD_ERASE_APP_PAGE = $22;
  839. CMD_LOAD_FLASH_BUFFER = $23;
  840. CMD_WRITE_APP_PAGE = $24;
  841. CMD_ERASE_WRITE_APP_PAGE = $25;
  842. CMD_ERASE_FLASH_BUFFER = $26;
  843. CMD_ERASE_BOOT_PAGE = $2A;
  844. CMD_ERASE_FLASH_PAGE = $2B;
  845. CMD_WRITE_BOOT_PAGE = $2C;
  846. CMD_ERASE_WRITE_BOOT_PAGE = $2D;
  847. CMD_WRITE_FLASH_PAGE = $2E;
  848. CMD_ERASE_WRITE_FLASH_PAGE = $2F;
  849. CMD_ERASE_EEPROM = $30;
  850. CMD_ERASE_EEPROM_PAGE = $32;
  851. CMD_LOAD_EEPROM_BUFFER = $33;
  852. CMD_WRITE_EEPROM_PAGE = $34;
  853. CMD_ERASE_WRITE_EEPROM_PAGE = $35;
  854. CMD_ERASE_EEPROM_BUFFER = $36;
  855. CMD_APP_CRC = $38;
  856. CMD_BOOT_CRC = $39;
  857. CMD_FLASH_RANGE_CRC = $3A;
  858. CMD_CHIP_ERASE = $40;
  859. CMD_READ_NVM = $43;
  860. CMD_WRITE_FUSE = $4C;
  861. CMD_ERASE_BOOT = $68;
  862. CMD_FLASH_CRC = $78;
  863. // Command Execute
  864. CMDEXbm = $01;
  865. // EEPROM Mapping Enable
  866. EEMAPENbm = $08;
  867. // Flash Power Reduction Enable
  868. FPRMbm = $04;
  869. // EEPROM Power Reduction Enable
  870. EPRMbm = $02;
  871. // SPM Lock
  872. SPMLOCKbm = $01;
  873. // NVM_SPMLVL
  874. SPMLVLmask = $0C;
  875. SPMLVL_OFF = $00;
  876. SPMLVL_LO = $04;
  877. SPMLVL_MED = $08;
  878. SPMLVL_HI = $0C;
  879. // NVM_EELVL
  880. EELVLmask = $03;
  881. EELVL_OFF = $00;
  882. EELVL_LO = $01;
  883. EELVL_MED = $02;
  884. EELVL_HI = $03;
  885. // Non-volatile Memory Busy
  886. NVMBUSYbm = $80;
  887. // Flash Memory Busy
  888. FBUSYbm = $40;
  889. // EEPROM Page Buffer Active Loading
  890. EELOADbm = $02;
  891. // Flash Page Buffer Active Loading
  892. FLOADbm = $01;
  893. // NVM_BLBB
  894. BLBBmask = $C0;
  895. BLBB_RWLOCK = $00;
  896. BLBB_RLOCK = $40;
  897. BLBB_WLOCK = $80;
  898. BLBB_NOLOCK = $C0;
  899. // NVM_BLBA
  900. BLBAmask = $30;
  901. BLBA_RWLOCK = $00;
  902. BLBA_RLOCK = $10;
  903. BLBA_WLOCK = $20;
  904. BLBA_NOLOCK = $30;
  905. // NVM_BLBAT
  906. BLBATmask = $0C;
  907. BLBAT_RWLOCK = $00;
  908. BLBAT_RLOCK = $04;
  909. BLBAT_WLOCK = $08;
  910. BLBAT_NOLOCK = $0C;
  911. // NVM_LB
  912. LBmask = $03;
  913. LB_RWLOCK = $00;
  914. LB_WLOCK = $02;
  915. LB_NOLOCK = $03;
  916. end;
  917. TADC_CH = object //ADC Channel
  918. CTRL: byte; //Control Register
  919. MUXCTRL: byte; //MUX Control
  920. INTCTRL: byte; //Channel Interrupt Control Register
  921. INTFLAGS: byte; //Interrupt Flags
  922. RES: word; //Channel Result
  923. SCAN: byte; //Input Channel Scan
  924. const
  925. // Channel Start Conversion
  926. STARTbm = $80;
  927. // GAIN
  928. GAINmask = $1C;
  929. GAIN1X = $00;
  930. GAIN2X = $04;
  931. GAIN4X = $08;
  932. GAIN8X = $0C;
  933. GAIN16X = $10;
  934. GAIN32X = $14;
  935. GAIN64X = $18;
  936. GAINDIV2 = $1C;
  937. // INPUTMODE
  938. INPUTMODEmask = $03;
  939. INPUTMODEINTERNAL = $00;
  940. INPUTMODESINGLEENDED = $01;
  941. INPUTMODEDIFF = $02;
  942. INPUTMODEDIFFWGAIN = $03;
  943. // MUXPOS
  944. MUXPOSmask = $78;
  945. MUXPOSPIN0 = $00;
  946. MUXPOSPIN1 = $08;
  947. MUXPOSPIN2 = $10;
  948. MUXPOSPIN3 = $18;
  949. MUXPOSPIN4 = $20;
  950. MUXPOSPIN5 = $28;
  951. MUXPOSPIN6 = $30;
  952. MUXPOSPIN7 = $38;
  953. MUXPOSPIN8 = $40;
  954. MUXPOSPIN9 = $48;
  955. MUXPOSPIN10 = $50;
  956. MUXPOSPIN11 = $58;
  957. MUXPOSPIN12 = $60;
  958. MUXPOSPIN13 = $68;
  959. MUXPOSPIN14 = $70;
  960. MUXPOSPIN15 = $78;
  961. // MUXINT
  962. MUXINTmask = $78;
  963. MUXINTTEMP = $00;
  964. MUXINTBANDGAP = $08;
  965. MUXINTSCALEDVCC = $10;
  966. // MUXNEG
  967. MUXNEGmask = $07;
  968. MUXNEGPIN0 = $00;
  969. MUXNEGPIN1 = $01;
  970. MUXNEGPIN2 = $02;
  971. MUXNEGPIN3 = $03;
  972. MUXNEGPIN4 = $00;
  973. MUXNEGPIN5 = $01;
  974. MUXNEGPIN6 = $02;
  975. MUXNEGPIN7 = $03;
  976. MUXNEGGND_MODE3 = $05;
  977. MUXNEGINTGND_MODE3 = $07;
  978. MUXNEGINTGND_MODE4 = $04;
  979. MUXNEGGND_MODE4 = $07;
  980. // MUXNEGL
  981. MUXNEGLmask = $07;
  982. MUXNEGLPIN0 = $00;
  983. MUXNEGLPIN1 = $01;
  984. MUXNEGLPIN2 = $02;
  985. MUXNEGLPIN3 = $03;
  986. MUXNEGLGND = $05;
  987. MUXNEGLINTGND = $07;
  988. // MUXNEGH
  989. MUXNEGHmask = $07;
  990. MUXNEGHPIN4 = $00;
  991. MUXNEGHPIN5 = $01;
  992. MUXNEGHPIN6 = $02;
  993. MUXNEGHPIN7 = $03;
  994. MUXNEGHINTGND = $04;
  995. MUXNEGHGND = $07;
  996. // INTMODE
  997. INTMODEmask = $0C;
  998. INTMODECOMPLETE = $00;
  999. INTMODEBELOW = $04;
  1000. INTMODEABOVE = $0C;
  1001. // INTLVL
  1002. INTLVLmask = $03;
  1003. INTLVLOFF = $00;
  1004. INTLVLLO = $01;
  1005. INTLVLMED = $02;
  1006. INTLVLHI = $03;
  1007. // Channel Interrupt Flag
  1008. CHIFbm = $01;
  1009. // Positive MUX setting offset
  1010. OFFSET0bm = $10;
  1011. OFFSET1bm = $20;
  1012. OFFSET2bm = $40;
  1013. OFFSET3bm = $80;
  1014. // Number of Channels included in scan
  1015. COUNT0bm = $01;
  1016. COUNT1bm = $02;
  1017. COUNT2bm = $04;
  1018. COUNT3bm = $08;
  1019. end;
  1020. TADC = object //Analog-to-Digital Converter
  1021. CTRLA: byte; //Control Register A
  1022. CTRLB: byte; //Control Register B
  1023. REFCTRL: byte; //Reference Control
  1024. EVCTRL: byte; //Event Control
  1025. PRESCALER: byte; //Clock Prescaler
  1026. Reserved5: byte;
  1027. INTFLAGS: byte; //Interrupt Flags
  1028. TEMP: byte; //Temporary Register
  1029. SAMPCTRL: byte; //ADC Sampling Time Control Register
  1030. Reserved9: byte;
  1031. Reserved10: byte;
  1032. Reserved11: byte;
  1033. CAL: word; //Calibration Value
  1034. Reserved14: byte;
  1035. Reserved15: byte;
  1036. CH0RES: word; //Channel 0 Result
  1037. Reserved18: byte;
  1038. Reserved19: byte;
  1039. Reserved20: byte;
  1040. Reserved21: byte;
  1041. Reserved22: byte;
  1042. Reserved23: byte;
  1043. CMP: word; //Compare Value
  1044. Reserved26: byte;
  1045. Reserved27: byte;
  1046. Reserved28: byte;
  1047. Reserved29: byte;
  1048. Reserved30: byte;
  1049. Reserved31: byte;
  1050. CH0: TADC_CH; //ADC Channel 0
  1051. const
  1052. // Channel 0 Start Conversion
  1053. CH0STARTbm = $04;
  1054. // ADC Flush
  1055. FLUSHbm = $02;
  1056. // Enable ADC
  1057. ENABLEbm = $01;
  1058. // ADC_CURRLIMIT
  1059. CURRLIMITmask = $60;
  1060. CURRLIMIT_NO = $00;
  1061. CURRLIMIT_LOW = $20;
  1062. CURRLIMIT_MED = $40;
  1063. CURRLIMIT_HIGH = $60;
  1064. // Conversion Mode
  1065. CONMODEbm = $10;
  1066. // Free Running Mode Enable
  1067. FREERUNbm = $08;
  1068. // ADC_RESOLUTION
  1069. RESOLUTIONmask = $06;
  1070. RESOLUTION_12BIT = $00;
  1071. RESOLUTION_8BIT = $04;
  1072. RESOLUTION_LEFT12BIT = $06;
  1073. // ADC_REFSEL
  1074. REFSELmask = $70;
  1075. REFSEL_INT1V = $00;
  1076. REFSEL_INTVCC = $10;
  1077. REFSEL_AREFA = $20;
  1078. REFSEL_AREFB = $30;
  1079. REFSEL_INTVCC2 = $40;
  1080. // Bandgap enable
  1081. BANDGAPbm = $02;
  1082. // Temperature Reference Enable
  1083. TEMPREFbm = $01;
  1084. // ADC_EVSEL
  1085. EVSELmask = $18;
  1086. EVSEL_0 = $00;
  1087. EVSEL_1 = $08;
  1088. EVSEL_2 = $10;
  1089. EVSEL_3 = $18;
  1090. // ADC_EVACT
  1091. EVACTmask = $07;
  1092. EVACT_NONE = $00;
  1093. EVACT_CH0 = $01;
  1094. EVACT_SYNCSWEEP = $06;
  1095. // ADC_PRESCALER
  1096. PRESCALERmask = $07;
  1097. PRESCALER_DIV4 = $00;
  1098. PRESCALER_DIV8 = $01;
  1099. PRESCALER_DIV16 = $02;
  1100. PRESCALER_DIV32 = $03;
  1101. PRESCALER_DIV64 = $04;
  1102. PRESCALER_DIV128 = $05;
  1103. PRESCALER_DIV256 = $06;
  1104. PRESCALER_DIV512 = $07;
  1105. // Channel 0 Interrupt Flag
  1106. CH0IFbm = $01;
  1107. // Sampling time control register
  1108. SAMPVAL0bm = $01;
  1109. SAMPVAL1bm = $02;
  1110. SAMPVAL2bm = $04;
  1111. SAMPVAL3bm = $08;
  1112. SAMPVAL4bm = $10;
  1113. SAMPVAL5bm = $20;
  1114. end;
  1115. TAC = object //Analog Comparator
  1116. AC0CTRL: byte; //Analog Comparator 0 Control
  1117. AC1CTRL: byte; //Analog Comparator 1 Control
  1118. AC0MUXCTRL: byte; //Analog Comparator 0 MUX Control
  1119. AC1MUXCTRL: byte; //Analog Comparator 1 MUX Control
  1120. CTRLA: byte; //Control Register A
  1121. CTRLB: byte; //Control Register B
  1122. WINCTRL: byte; //Window Mode Control
  1123. STATUS: byte; //Status
  1124. CURRCTRL: byte; //Current Source Control Register
  1125. CURRCALIB: byte; //Current Source Calibration Register
  1126. const
  1127. // AC_INTMODE
  1128. INTMODEmask = $C0;
  1129. INTMODE_BOTHEDGES = $00;
  1130. INTMODE_FALLING = $80;
  1131. INTMODE_RISING = $C0;
  1132. // AC_INTLVL
  1133. INTLVLmask = $30;
  1134. INTLVL_OFF = $00;
  1135. INTLVL_LO = $10;
  1136. INTLVL_MED = $20;
  1137. INTLVL_HI = $30;
  1138. // AC_HYSMODE
  1139. HYSMODEmask = $06;
  1140. HYSMODE_NO = $00;
  1141. HYSMODE_SMALL = $02;
  1142. HYSMODE_LARGE = $04;
  1143. // Enable
  1144. ENABLEbm = $01;
  1145. // AC_MUXPOS
  1146. MUXPOSmask = $38;
  1147. MUXPOS_PIN0 = $00;
  1148. MUXPOS_PIN1 = $08;
  1149. MUXPOS_PIN2 = $10;
  1150. MUXPOS_PIN3 = $18;
  1151. MUXPOS_PIN4 = $20;
  1152. MUXPOS_PIN5 = $28;
  1153. MUXPOS_PIN6 = $30;
  1154. // AC_MUXNEG
  1155. MUXNEGmask = $07;
  1156. MUXNEG_PIN0 = $00;
  1157. MUXNEG_PIN1 = $01;
  1158. MUXNEG_PIN3 = $02;
  1159. MUXNEG_PIN5 = $03;
  1160. MUXNEG_PIN7 = $04;
  1161. MUXNEG_BANDGAP = $06;
  1162. MUXNEG_SCALER = $07;
  1163. // Analog Comparator 1 Output Enable
  1164. AC1OUTbm = $02;
  1165. // Analog Comparator 0 Output Enable
  1166. AC0OUTbm = $01;
  1167. // VCC Voltage Scaler Factor
  1168. SCALEFAC0bm = $01;
  1169. SCALEFAC1bm = $02;
  1170. SCALEFAC2bm = $04;
  1171. SCALEFAC3bm = $08;
  1172. SCALEFAC4bm = $10;
  1173. SCALEFAC5bm = $20;
  1174. // Window Mode Enable
  1175. WENbm = $10;
  1176. // AC_WINTMODE
  1177. WINTMODEmask = $0C;
  1178. WINTMODE_ABOVE = $00;
  1179. WINTMODE_INSIDE = $04;
  1180. WINTMODE_BELOW = $08;
  1181. WINTMODE_OUTSIDE = $0C;
  1182. // AC_WINTLVL
  1183. WINTLVLmask = $03;
  1184. WINTLVL_OFF = $00;
  1185. WINTLVL_LO = $01;
  1186. WINTLVL_MED = $02;
  1187. WINTLVL_HI = $03;
  1188. // AC_WSTATE
  1189. WSTATEmask = $C0;
  1190. WSTATE_ABOVE = $00;
  1191. WSTATE_INSIDE = $40;
  1192. WSTATE_BELOW = $80;
  1193. // Analog Comparator 1 State
  1194. AC1STATEbm = $20;
  1195. // Analog Comparator 0 State
  1196. AC0STATEbm = $10;
  1197. // Window Mode Interrupt Flag
  1198. WIFbm = $04;
  1199. // Analog Comparator 1 Interrupt Flag
  1200. AC1IFbm = $02;
  1201. // Analog Comparator 0 Interrupt Flag
  1202. AC0IFbm = $01;
  1203. // Current Source Enable
  1204. CURRENbm = $80;
  1205. // Current Mode
  1206. CURRMODEbm = $40;
  1207. // Analog Comparator 1 current source output
  1208. AC1CURRbm = $02;
  1209. // Analog Comparator 0 current source output
  1210. AC0CURRbm = $01;
  1211. // Current Source Calibration
  1212. CALIB0bm = $01;
  1213. CALIB1bm = $02;
  1214. CALIB2bm = $04;
  1215. CALIB3bm = $08;
  1216. end;
  1217. TRTC = object //Real-Time Counter
  1218. CTRL: byte; //Control Register
  1219. STATUS: byte; //Status Register
  1220. INTCTRL: byte; //Interrupt Control Register
  1221. INTFLAGS: byte; //Interrupt Flags
  1222. TEMP: byte; //Temporary register
  1223. Reserved5: byte;
  1224. Reserved6: byte;
  1225. Reserved7: byte;
  1226. CNT: word; //Count Register
  1227. PER: word; //Period Register
  1228. COMP: word; //Compare Register
  1229. const
  1230. // RTC_PRESCALER
  1231. PRESCALERmask = $07;
  1232. PRESCALER_OFF = $00;
  1233. PRESCALER_DIV1 = $01;
  1234. PRESCALER_DIV2 = $02;
  1235. PRESCALER_DIV8 = $03;
  1236. PRESCALER_DIV16 = $04;
  1237. PRESCALER_DIV64 = $05;
  1238. PRESCALER_DIV256 = $06;
  1239. PRESCALER_DIV1024 = $07;
  1240. // Synchronization Busy Flag
  1241. SYNCBUSYbm = $01;
  1242. // RTC_COMPINTLVL
  1243. COMPINTLVLmask = $0C;
  1244. COMPINTLVL_OFF = $00;
  1245. COMPINTLVL_LO = $04;
  1246. COMPINTLVL_MED = $08;
  1247. COMPINTLVL_HI = $0C;
  1248. // RTC_OVFINTLVL
  1249. OVFINTLVLmask = $03;
  1250. OVFINTLVL_OFF = $00;
  1251. OVFINTLVL_LO = $01;
  1252. OVFINTLVL_MED = $02;
  1253. OVFINTLVL_HI = $03;
  1254. // Compare Match Interrupt Flag
  1255. COMPIFbm = $02;
  1256. // Overflow Interrupt Flag
  1257. OVFIFbm = $01;
  1258. end;
  1259. TTWI_MASTER = object //
  1260. CTRLA: byte; //Control Register A
  1261. CTRLB: byte; //Control Register B
  1262. CTRLC: byte; //Control Register C
  1263. STATUS: byte; //Status Register
  1264. BAUD: byte; //Baud Rate Control Register
  1265. ADDR: byte; //Address Register
  1266. DATA: byte; //Data Register
  1267. const
  1268. // INTLVL
  1269. INTLVLmask = $C0;
  1270. INTLVLOFF = $00;
  1271. INTLVLLO = $40;
  1272. INTLVLMED = $80;
  1273. INTLVLHI = $C0;
  1274. // Read Interrupt Enable
  1275. RIENbm = $20;
  1276. // Write Interrupt Enable
  1277. WIENbm = $10;
  1278. // Enable TWI Master
  1279. ENABLEbm = $08;
  1280. // TIMEOUT
  1281. TIMEOUTmask = $0C;
  1282. TIMEOUTDISABLED = $00;
  1283. TIMEOUT50US = $04;
  1284. TIMEOUT100US = $08;
  1285. TIMEOUT200US = $0C;
  1286. // Quick Command Enable
  1287. QCENbm = $02;
  1288. // Smart Mode Enable
  1289. SMENbm = $01;
  1290. // Acknowledge Action
  1291. ACKACTbm = $04;
  1292. // CMD
  1293. CMDmask = $03;
  1294. CMDNOACT = $00;
  1295. CMDREPSTART = $01;
  1296. CMDRECVTRANS = $02;
  1297. CMDSTOP = $03;
  1298. // Read Interrupt Flag
  1299. RIFbm = $80;
  1300. // Write Interrupt Flag
  1301. WIFbm = $40;
  1302. // Clock Hold
  1303. CLKHOLDbm = $20;
  1304. // Received Acknowledge
  1305. RXACKbm = $10;
  1306. // Arbitration Lost
  1307. ARBLOSTbm = $08;
  1308. // Bus Error
  1309. BUSERRbm = $04;
  1310. // BUSSTATE
  1311. BUSSTATEmask = $03;
  1312. BUSSTATEUNKNOWN = $00;
  1313. BUSSTATEIDLE = $01;
  1314. BUSSTATEOWNER = $02;
  1315. BUSSTATEBUSY = $03;
  1316. end;
  1317. TTWI_SLAVE = object //
  1318. CTRLA: byte; //Control Register A
  1319. CTRLB: byte; //Control Register B
  1320. STATUS: byte; //Status Register
  1321. ADDR: byte; //Address Register
  1322. DATA: byte; //Data Register
  1323. ADDRMASK: byte; //Address Mask Register
  1324. const
  1325. // INTLVL
  1326. INTLVLmask = $C0;
  1327. INTLVLOFF = $00;
  1328. INTLVLLO = $40;
  1329. INTLVLMED = $80;
  1330. INTLVLHI = $C0;
  1331. // Data Interrupt Enable
  1332. DIENbm = $20;
  1333. // Address/Stop Interrupt Enable
  1334. APIENbm = $10;
  1335. // Enable TWI Slave
  1336. ENABLEbm = $08;
  1337. // Stop Interrupt Enable
  1338. PIENbm = $04;
  1339. // Promiscuous Mode Enable
  1340. PMENbm = $02;
  1341. // Smart Mode Enable
  1342. SMENbm = $01;
  1343. // Acknowledge Action
  1344. ACKACTbm = $04;
  1345. // CMD
  1346. CMDmask = $03;
  1347. CMDNOACT = $00;
  1348. CMDCOMPTRANS = $02;
  1349. CMDRESPONSE = $03;
  1350. // Data Interrupt Flag
  1351. DIFbm = $80;
  1352. // Address/Stop Interrupt Flag
  1353. APIFbm = $40;
  1354. // Clock Hold
  1355. CLKHOLDbm = $20;
  1356. // Received Acknowledge
  1357. RXACKbm = $10;
  1358. // Collision
  1359. COLLbm = $08;
  1360. // Bus Error
  1361. BUSERRbm = $04;
  1362. // Read/Write Direction
  1363. DIRbm = $02;
  1364. // Slave Address or Stop
  1365. APbm = $01;
  1366. // Address Mask
  1367. ADDRMASK0bm = $02;
  1368. ADDRMASK1bm = $04;
  1369. ADDRMASK2bm = $08;
  1370. ADDRMASK3bm = $10;
  1371. ADDRMASK4bm = $20;
  1372. ADDRMASK5bm = $40;
  1373. ADDRMASK6bm = $80;
  1374. // Address Enable
  1375. ADDRENbm = $01;
  1376. end;
  1377. TTWI = object //Two-Wire Interface
  1378. CTRL: byte; //TWI Common Control Register
  1379. MASTER: TTWI_MASTER; //TWI master module
  1380. SLAVE: TTWI_SLAVE; //TWI slave module
  1381. const
  1382. // TWI_SDAHOLD
  1383. SDAHOLDmask = $06;
  1384. SDAHOLD_OFF = $00;
  1385. SDAHOLD_50NS = $02;
  1386. SDAHOLD_300NS = $04;
  1387. SDAHOLD_400NS = $06;
  1388. // External Driver Interface Enable
  1389. EDIENbm = $01;
  1390. end;
  1391. TUSB_EP = object //USB Endpoint
  1392. STATUS: byte; //Endpoint Status
  1393. CTRL: byte; //Endpoint Control
  1394. CNT: word; //USB Endpoint Counter
  1395. DATAPTR: word; //Data Pointer
  1396. AUXDATA: word; //Auxiliary Data
  1397. const
  1398. // Endpoint Stall Flag
  1399. STALLFbm = $80;
  1400. // CRC Error Flag
  1401. CRCbm = $80;
  1402. // Underflow Enpoint FLag
  1403. UNFbm = $40;
  1404. // Overflow Enpoint Flag for Output Endpoints
  1405. OVFbm = $40;
  1406. // Transaction Complete 0 Flag
  1407. TRNCOMPL0bm = $20;
  1408. // Transaction Complete 1 Flag
  1409. TRNCOMPL1bm = $10;
  1410. // SETUP Transaction Complete Flag
  1411. SETUPbm = $10;
  1412. // Bank Select
  1413. BANKbm = $08;
  1414. // Data Buffer 1 Not Acknowledge
  1415. BUSNACK1bm = $04;
  1416. // Data Buffer 0 Not Acknowledge
  1417. BUSNACK0bm = $02;
  1418. // Data Toggle
  1419. TOGGLEbm = $01;
  1420. // TYPE
  1421. TYPEmask = $C0;
  1422. TYPEDISABLE = $00;
  1423. TYPECONTROL = $40;
  1424. TYPEBULK = $80;
  1425. TYPEISOCHRONOUS = $C0;
  1426. // Multi Packet Transfer Enable
  1427. MULTIPKTbm = $20;
  1428. // Ping-Pong Enable
  1429. PINGPONGbm = $10;
  1430. // Interrupt Disable
  1431. INTDSBLbm = $08;
  1432. // Data Stall
  1433. STALLbm = $04;
  1434. // BUFSIZE
  1435. BUFSIZEmask = $07;
  1436. BUFSIZE8 = $00;
  1437. BUFSIZE16 = $01;
  1438. BUFSIZE32 = $02;
  1439. BUFSIZE64 = $03;
  1440. BUFSIZE128 = $04;
  1441. BUFSIZE256 = $05;
  1442. BUFSIZE512 = $06;
  1443. BUFSIZE1023 = $07;
  1444. end;
  1445. TUSB = object //Universal Serial Bus
  1446. CTRLA: byte; //Control Register A
  1447. CTRLB: byte; //Control Register B
  1448. STATUS: byte; //Status Register
  1449. ADDR: byte; //Address Register
  1450. FIFOWP: byte; //FIFO Write Pointer Register
  1451. FIFORP: byte; //FIFO Read Pointer Register
  1452. EPPTR: word; //Endpoint Configuration Table Pointer
  1453. INTCTRLA: byte; //Interrupt Control Register A
  1454. INTCTRLB: byte; //Interrupt Control Register B
  1455. INTFLAGSACLR: byte; //Clear Interrupt Flag Register A
  1456. INTFLAGSASET: byte; //Set Interrupt Flag Register A
  1457. INTFLAGSBCLR: byte; //Clear Interrupt Flag Register B
  1458. INTFLAGSBSET: byte; //Set Interrupt Flag Register B
  1459. Reserved14: byte;
  1460. Reserved15: byte;
  1461. Reserved16: byte;
  1462. Reserved17: byte;
  1463. Reserved18: byte;
  1464. Reserved19: byte;
  1465. Reserved20: byte;
  1466. Reserved21: byte;
  1467. Reserved22: byte;
  1468. Reserved23: byte;
  1469. Reserved24: byte;
  1470. Reserved25: byte;
  1471. Reserved26: byte;
  1472. Reserved27: byte;
  1473. Reserved28: byte;
  1474. Reserved29: byte;
  1475. Reserved30: byte;
  1476. Reserved31: byte;
  1477. Reserved32: byte;
  1478. Reserved33: byte;
  1479. Reserved34: byte;
  1480. Reserved35: byte;
  1481. Reserved36: byte;
  1482. Reserved37: byte;
  1483. Reserved38: byte;
  1484. Reserved39: byte;
  1485. Reserved40: byte;
  1486. Reserved41: byte;
  1487. Reserved42: byte;
  1488. Reserved43: byte;
  1489. Reserved44: byte;
  1490. Reserved45: byte;
  1491. Reserved46: byte;
  1492. Reserved47: byte;
  1493. Reserved48: byte;
  1494. Reserved49: byte;
  1495. Reserved50: byte;
  1496. Reserved51: byte;
  1497. Reserved52: byte;
  1498. Reserved53: byte;
  1499. Reserved54: byte;
  1500. Reserved55: byte;
  1501. Reserved56: byte;
  1502. Reserved57: byte;
  1503. CAL0: byte; //Calibration Byte 0
  1504. CAL1: byte; //Calibration Byte 1
  1505. const
  1506. // USB Enable
  1507. ENABLEbm = $80;
  1508. // Speed Select
  1509. SPEEDbm = $40;
  1510. // USB FIFO Enable
  1511. FIFOENbm = $20;
  1512. // Store Frame Number Enable
  1513. STFRNUMbm = $10;
  1514. // Maximum Endpoint Addresses
  1515. MAXEP0bm = $01;
  1516. MAXEP1bm = $02;
  1517. MAXEP2bm = $04;
  1518. MAXEP3bm = $08;
  1519. // Pull during Reset
  1520. PULLRSTbm = $10;
  1521. // Remote Wake-up
  1522. RWAKEUPbm = $04;
  1523. // Global NACK
  1524. GNACKbm = $02;
  1525. // Attach
  1526. ATTACHbm = $01;
  1527. // Upstream Resume
  1528. URESUMEbm = $08;
  1529. // Resume
  1530. RESUMEbm = $04;
  1531. // Bus Suspended
  1532. SUSPENDbm = $02;
  1533. // Bus Reset
  1534. BUSRSTbm = $01;
  1535. // Device Address
  1536. ADDR0bm = $01;
  1537. ADDR1bm = $02;
  1538. ADDR2bm = $04;
  1539. ADDR3bm = $08;
  1540. ADDR4bm = $10;
  1541. ADDR5bm = $20;
  1542. ADDR6bm = $40;
  1543. // FIFO Write Pointer
  1544. FIFOWP0bm = $01;
  1545. FIFOWP1bm = $02;
  1546. FIFOWP2bm = $04;
  1547. FIFOWP3bm = $08;
  1548. FIFOWP4bm = $10;
  1549. // FIFO Read Pointer
  1550. FIFORP0bm = $01;
  1551. FIFORP1bm = $02;
  1552. FIFORP2bm = $04;
  1553. FIFORP3bm = $08;
  1554. FIFORP4bm = $10;
  1555. // Start Of Frame Interrupt Enable
  1556. SOFIEbm = $80;
  1557. // Bus Event Interrupt Enable
  1558. BUSEVIEbm = $40;
  1559. // Bus Error Interrupt Enable
  1560. BUSERRIEbm = $20;
  1561. // STALL Interrupt Enable
  1562. STALLIEbm = $10;
  1563. // USB_INTLVL
  1564. INTLVLmask = $03;
  1565. INTLVL_OFF = $00;
  1566. INTLVL_LO = $01;
  1567. INTLVL_MED = $02;
  1568. INTLVL_HI = $03;
  1569. // Transaction Complete Interrupt Enable
  1570. TRNIEbm = $02;
  1571. // SETUP Transaction Complete Interrupt Enable
  1572. SETUPIEbm = $01;
  1573. // Start Of Frame Interrupt Flag
  1574. SOFIFbm = $80;
  1575. // Suspend Interrupt Flag
  1576. SUSPENDIFbm = $40;
  1577. // Resume Interrupt Flag
  1578. RESUMEIFbm = $20;
  1579. // Reset Interrupt Flag
  1580. RSTIFbm = $10;
  1581. // Isochronous CRC Error Interrupt Flag
  1582. CRCIFbm = $08;
  1583. // Underflow Interrupt Flag
  1584. UNFIFbm = $04;
  1585. // Overflow Interrupt Flag
  1586. OVFIFbm = $02;
  1587. // STALL Interrupt Flag
  1588. STALLIFbm = $01;
  1589. // Transaction Complete Interrupt Flag
  1590. TRNIFbm = $02;
  1591. // SETUP Transaction Complete Interrupt Flag
  1592. SETUPIFbm = $01;
  1593. end;
  1594. TUSB_EP_TABLE = object //USB Endpoint Table
  1595. EP0OUT: TUSB_EP; //Endpoint 0
  1596. EP0IN: TUSB_EP; //Endpoint 0
  1597. EP1OUT: TUSB_EP; //Endpoint 1
  1598. EP1IN: TUSB_EP; //Endpoint 1
  1599. EP2OUT: TUSB_EP; //Endpoint 2
  1600. EP2IN: TUSB_EP; //Endpoint 2
  1601. EP3OUT: TUSB_EP; //Endpoint 3
  1602. EP3IN: TUSB_EP; //Endpoint 3
  1603. EP4OUT: TUSB_EP; //Endpoint 4
  1604. EP4IN: TUSB_EP; //Endpoint 4
  1605. EP5OUT: TUSB_EP; //Endpoint 5
  1606. EP5IN: TUSB_EP; //Endpoint 5
  1607. EP6OUT: TUSB_EP; //Endpoint 6
  1608. EP6IN: TUSB_EP; //Endpoint 6
  1609. EP7OUT: TUSB_EP; //Endpoint 7
  1610. EP7IN: TUSB_EP; //Endpoint 7
  1611. EP8OUT: TUSB_EP; //Endpoint 8
  1612. EP8IN: TUSB_EP; //Endpoint 8
  1613. EP9OUT: TUSB_EP; //Endpoint 9
  1614. EP9IN: TUSB_EP; //Endpoint 9
  1615. EP10OUT: TUSB_EP; //Endpoint 10
  1616. EP10IN: TUSB_EP; //Endpoint 10
  1617. EP11OUT: TUSB_EP; //Endpoint 11
  1618. EP11IN: TUSB_EP; //Endpoint 11
  1619. EP12OUT: TUSB_EP; //Endpoint 12
  1620. EP12IN: TUSB_EP; //Endpoint 12
  1621. EP13OUT: TUSB_EP; //Endpoint 13
  1622. EP13IN: TUSB_EP; //Endpoint 13
  1623. EP14OUT: TUSB_EP; //Endpoint 14
  1624. EP14IN: TUSB_EP; //Endpoint 14
  1625. EP15OUT: TUSB_EP; //Endpoint 15
  1626. EP15IN: TUSB_EP; //Endpoint 15
  1627. Reserved256: byte;
  1628. Reserved257: byte;
  1629. Reserved258: byte;
  1630. Reserved259: byte;
  1631. Reserved260: byte;
  1632. Reserved261: byte;
  1633. Reserved262: byte;
  1634. Reserved263: byte;
  1635. Reserved264: byte;
  1636. Reserved265: byte;
  1637. Reserved266: byte;
  1638. Reserved267: byte;
  1639. Reserved268: byte;
  1640. Reserved269: byte;
  1641. Reserved270: byte;
  1642. Reserved271: byte;
  1643. FRAMENUML: byte; //Frame Number Low Byte
  1644. FRAMENUMH: byte; //Frame Number High Byte
  1645. end;
  1646. TPORT = object //I/O Ports
  1647. DIR: byte; //I/O Port Data Direction
  1648. DIRSET: byte; //I/O Port Data Direction Set
  1649. DIRCLR: byte; //I/O Port Data Direction Clear
  1650. DIRTGL: byte; //I/O Port Data Direction Toggle
  1651. OUT_: byte; //I/O Port Output
  1652. OUTSET: byte; //I/O Port Output Set
  1653. OUTCLR: byte; //I/O Port Output Clear
  1654. OUTTGL: byte; //I/O Port Output Toggle
  1655. IN_: byte; //I/O port Input
  1656. INTCTRL: byte; //Interrupt Control Register
  1657. INT0MASK: byte; //Port Interrupt 0 Mask
  1658. INT1MASK: byte; //Port Interrupt 1 Mask
  1659. INTFLAGS: byte; //Interrupt Flag Register
  1660. Reserved13: byte;
  1661. REMAP: byte; //I/O Port Pin Remap Register
  1662. Reserved15: byte;
  1663. PIN0CTRL: byte; //Pin 0 Control Register
  1664. PIN1CTRL: byte; //Pin 1 Control Register
  1665. PIN2CTRL: byte; //Pin 2 Control Register
  1666. PIN3CTRL: byte; //Pin 3 Control Register
  1667. PIN4CTRL: byte; //Pin 4 Control Register
  1668. PIN5CTRL: byte; //Pin 5 Control Register
  1669. PIN6CTRL: byte; //Pin 6 Control Register
  1670. PIN7CTRL: byte; //Pin 7 Control Register
  1671. const
  1672. // PORT_INT1LVL
  1673. INT1LVLmask = $0C;
  1674. INT1LVL_OFF = $00;
  1675. INT1LVL_LO = $04;
  1676. INT1LVL_MED = $08;
  1677. INT1LVL_HI = $0C;
  1678. // PORT_INT0LVL
  1679. INT0LVLmask = $03;
  1680. INT0LVL_OFF = $00;
  1681. INT0LVL_LO = $01;
  1682. INT0LVL_MED = $02;
  1683. INT0LVL_HI = $03;
  1684. // Port Interrupt 1 Flag
  1685. INT1IFbm = $02;
  1686. // Port Interrupt 0 Flag
  1687. INT0IFbm = $01;
  1688. // SPI
  1689. SPIbm = $20;
  1690. // USART0
  1691. USART0bm = $10;
  1692. // Timer/Counter 0 Output Compare D
  1693. TC0Dbm = $08;
  1694. // Timer/Counter 0 Output Compare C
  1695. TC0Cbm = $04;
  1696. // Timer/Counter 0 Output Compare B
  1697. TC0Bbm = $02;
  1698. // Timer/Counter 0 Output Compare A
  1699. TC0Abm = $01;
  1700. // Slew Rate Enable
  1701. SRLENbm = $80;
  1702. // Inverted I/O Enable
  1703. INVENbm = $40;
  1704. // PORT_OPC
  1705. OPCmask = $38;
  1706. OPC_TOTEM = $00;
  1707. OPC_BUSKEEPER = $08;
  1708. OPC_PULLDOWN = $10;
  1709. OPC_PULLUP = $18;
  1710. OPC_WIREDOR = $20;
  1711. OPC_WIREDAND = $28;
  1712. OPC_WIREDORPULL = $30;
  1713. OPC_WIREDANDPULL = $38;
  1714. // PORT_ISC
  1715. ISCmask = $07;
  1716. ISC_BOTHEDGES = $00;
  1717. ISC_RISING = $01;
  1718. ISC_FALLING = $02;
  1719. ISC_LEVEL = $03;
  1720. ISC_INPUT_DISABLE = $07;
  1721. end;
  1722. TTC0 = object //16-bit Timer/Counter 0
  1723. CTRLA: byte; //Control Register A
  1724. CTRLB: byte; //Control Register B
  1725. CTRLC: byte; //Control register C
  1726. CTRLD: byte; //Control Register D
  1727. CTRLE: byte; //Control Register E
  1728. Reserved5: byte;
  1729. INTCTRLA: byte; //Interrupt Control Register A
  1730. INTCTRLB: byte; //Interrupt Control Register B
  1731. CTRLFCLR: byte; //Control Register F Clear
  1732. CTRLFSET: byte; //Control Register F Set
  1733. CTRLGCLR: byte; //Control Register G Clear
  1734. CTRLGSET: byte; //Control Register G Set
  1735. INTFLAGS: byte; //Interrupt Flag Register
  1736. Reserved13: byte;
  1737. Reserved14: byte;
  1738. TEMP: byte; //Temporary Register For 16-bit Access
  1739. Reserved16: byte;
  1740. Reserved17: byte;
  1741. Reserved18: byte;
  1742. Reserved19: byte;
  1743. Reserved20: byte;
  1744. Reserved21: byte;
  1745. Reserved22: byte;
  1746. Reserved23: byte;
  1747. Reserved24: byte;
  1748. Reserved25: byte;
  1749. Reserved26: byte;
  1750. Reserved27: byte;
  1751. Reserved28: byte;
  1752. Reserved29: byte;
  1753. Reserved30: byte;
  1754. Reserved31: byte;
  1755. CNT: word; //Count
  1756. Reserved34: byte;
  1757. Reserved35: byte;
  1758. Reserved36: byte;
  1759. Reserved37: byte;
  1760. PER: word; //Period
  1761. CCA: word; //Compare or Capture A
  1762. CCB: word; //Compare or Capture B
  1763. CCC: word; //Compare or Capture C
  1764. CCD: word; //Compare or Capture D
  1765. Reserved48: byte;
  1766. Reserved49: byte;
  1767. Reserved50: byte;
  1768. Reserved51: byte;
  1769. Reserved52: byte;
  1770. Reserved53: byte;
  1771. PERBUF: word; //Period Buffer
  1772. CCABUF: word; //Compare Or Capture A Buffer
  1773. CCBBUF: word; //Compare Or Capture B Buffer
  1774. CCCBUF: word; //Compare Or Capture C Buffer
  1775. CCDBUF: word; //Compare Or Capture D Buffer
  1776. const
  1777. // TC_CLKSEL
  1778. CLKSELmask = $0F;
  1779. CLKSEL_OFF = $00;
  1780. CLKSEL_DIV1 = $01;
  1781. CLKSEL_DIV2 = $02;
  1782. CLKSEL_DIV4 = $03;
  1783. CLKSEL_DIV8 = $04;
  1784. CLKSEL_DIV64 = $05;
  1785. CLKSEL_DIV256 = $06;
  1786. CLKSEL_DIV1024 = $07;
  1787. CLKSEL_EVCH0 = $08;
  1788. CLKSEL_EVCH1 = $09;
  1789. CLKSEL_EVCH2 = $0A;
  1790. CLKSEL_EVCH3 = $0B;
  1791. // Compare or Capture D Enable
  1792. CCDENbm = $80;
  1793. // Compare or Capture C Enable
  1794. CCCENbm = $40;
  1795. // Compare or Capture B Enable
  1796. CCBENbm = $20;
  1797. // Compare or Capture A Enable
  1798. CCAENbm = $10;
  1799. // TC_WGMODE
  1800. WGMODEmask = $07;
  1801. WGMODE_NORMAL = $00;
  1802. WGMODE_FRQ = $01;
  1803. WGMODE_SINGLESLOPE = $03;
  1804. WGMODE_SS = $03;
  1805. WGMODE_DSTOP = $05;
  1806. WGMODE_DS_T = $05;
  1807. WGMODE_DSBOTH = $06;
  1808. WGMODE_DS_TB = $06;
  1809. WGMODE_DSBOTTOM = $07;
  1810. WGMODE_DS_B = $07;
  1811. // Compare D Output Value
  1812. CMPDbm = $08;
  1813. // Compare C Output Value
  1814. CMPCbm = $04;
  1815. // Compare B Output Value
  1816. CMPBbm = $02;
  1817. // Compare A Output Value
  1818. CMPAbm = $01;
  1819. // TC_EVACT
  1820. EVACTmask = $E0;
  1821. EVACT_OFF = $00;
  1822. EVACT_CAPT = $20;
  1823. EVACT_UPDOWN = $40;
  1824. EVACT_QDEC = $60;
  1825. EVACT_RESTART = $80;
  1826. EVACT_FRQ = $A0;
  1827. EVACT_PW = $C0;
  1828. // Event Delay
  1829. EVDLYbm = $10;
  1830. // TC_EVSEL
  1831. EVSELmask = $0F;
  1832. EVSEL_OFF = $00;
  1833. EVSEL_CH0 = $08;
  1834. EVSEL_CH1 = $09;
  1835. EVSEL_CH2 = $0A;
  1836. EVSEL_CH3 = $0B;
  1837. // TC_BYTEM
  1838. BYTEMmask = $03;
  1839. BYTEM_NORMAL = $00;
  1840. BYTEM_BYTEMODE = $01;
  1841. BYTEM_SPLITMODE = $02;
  1842. // TC_ERRINTLVL
  1843. ERRINTLVLmask = $0C;
  1844. ERRINTLVL_OFF = $00;
  1845. ERRINTLVL_LO = $04;
  1846. ERRINTLVL_MED = $08;
  1847. ERRINTLVL_HI = $0C;
  1848. // TC_OVFINTLVL
  1849. OVFINTLVLmask = $03;
  1850. OVFINTLVL_OFF = $00;
  1851. OVFINTLVL_LO = $01;
  1852. OVFINTLVL_MED = $02;
  1853. OVFINTLVL_HI = $03;
  1854. // TC_CCDINTLVL
  1855. CCDINTLVLmask = $C0;
  1856. CCDINTLVL_OFF = $00;
  1857. CCDINTLVL_LO = $40;
  1858. CCDINTLVL_MED = $80;
  1859. CCDINTLVL_HI = $C0;
  1860. // TC_CCCINTLVL
  1861. CCCINTLVLmask = $30;
  1862. CCCINTLVL_OFF = $00;
  1863. CCCINTLVL_LO = $10;
  1864. CCCINTLVL_MED = $20;
  1865. CCCINTLVL_HI = $30;
  1866. // TC_CCBINTLVL
  1867. CCBINTLVLmask = $0C;
  1868. CCBINTLVL_OFF = $00;
  1869. CCBINTLVL_LO = $04;
  1870. CCBINTLVL_MED = $08;
  1871. CCBINTLVL_HI = $0C;
  1872. // TC_CCAINTLVL
  1873. CCAINTLVLmask = $03;
  1874. CCAINTLVL_OFF = $00;
  1875. CCAINTLVL_LO = $01;
  1876. CCAINTLVL_MED = $02;
  1877. CCAINTLVL_HI = $03;
  1878. // Command
  1879. CMD0bm = $04;
  1880. CMD1bm = $08;
  1881. // Lock Update
  1882. LUPDbm = $02;
  1883. // Direction
  1884. DIRbm = $01;
  1885. // Compare or Capture D Buffer Valid
  1886. CCDBVbm = $10;
  1887. // Compare or Capture C Buffer Valid
  1888. CCCBVbm = $08;
  1889. // Compare or Capture B Buffer Valid
  1890. CCBBVbm = $04;
  1891. // Compare or Capture A Buffer Valid
  1892. CCABVbm = $02;
  1893. // Period Buffer Valid
  1894. PERBVbm = $01;
  1895. // Compare or Capture D Interrupt Flag
  1896. CCDIFbm = $80;
  1897. // Compare or Capture C Interrupt Flag
  1898. CCCIFbm = $40;
  1899. // Compare or Capture B Interrupt Flag
  1900. CCBIFbm = $20;
  1901. // Compare or Capture A Interrupt Flag
  1902. CCAIFbm = $10;
  1903. // Error Interrupt Flag
  1904. ERRIFbm = $02;
  1905. // Overflow Interrupt Flag
  1906. OVFIFbm = $01;
  1907. end;
  1908. TTC1 = object //16-bit Timer/Counter 1
  1909. CTRLA: byte; //Control Register A
  1910. CTRLB: byte; //Control Register B
  1911. CTRLC: byte; //Control register C
  1912. CTRLD: byte; //Control Register D
  1913. CTRLE: byte; //Control Register E
  1914. Reserved5: byte;
  1915. INTCTRLA: byte; //Interrupt Control Register A
  1916. INTCTRLB: byte; //Interrupt Control Register B
  1917. CTRLFCLR: byte; //Control Register F Clear
  1918. CTRLFSET: byte; //Control Register F Set
  1919. CTRLGCLR: byte; //Control Register G Clear
  1920. CTRLGSET: byte; //Control Register G Set
  1921. INTFLAGS: byte; //Interrupt Flag Register
  1922. Reserved13: byte;
  1923. Reserved14: byte;
  1924. TEMP: byte; //Temporary Register For 16-bit Access
  1925. Reserved16: byte;
  1926. Reserved17: byte;
  1927. Reserved18: byte;
  1928. Reserved19: byte;
  1929. Reserved20: byte;
  1930. Reserved21: byte;
  1931. Reserved22: byte;
  1932. Reserved23: byte;
  1933. Reserved24: byte;
  1934. Reserved25: byte;
  1935. Reserved26: byte;
  1936. Reserved27: byte;
  1937. Reserved28: byte;
  1938. Reserved29: byte;
  1939. Reserved30: byte;
  1940. Reserved31: byte;
  1941. CNT: word; //Count
  1942. Reserved34: byte;
  1943. Reserved35: byte;
  1944. Reserved36: byte;
  1945. Reserved37: byte;
  1946. PER: word; //Period
  1947. CCA: word; //Compare or Capture A
  1948. CCB: word; //Compare or Capture B
  1949. Reserved44: byte;
  1950. Reserved45: byte;
  1951. Reserved46: byte;
  1952. Reserved47: byte;
  1953. Reserved48: byte;
  1954. Reserved49: byte;
  1955. Reserved50: byte;
  1956. Reserved51: byte;
  1957. Reserved52: byte;
  1958. Reserved53: byte;
  1959. PERBUF: word; //Period Buffer
  1960. CCABUF: word; //Compare Or Capture A Buffer
  1961. CCBBUF: word; //Compare Or Capture B Buffer
  1962. const
  1963. // TC_CLKSEL
  1964. CLKSELmask = $0F;
  1965. CLKSEL_OFF = $00;
  1966. CLKSEL_DIV1 = $01;
  1967. CLKSEL_DIV2 = $02;
  1968. CLKSEL_DIV4 = $03;
  1969. CLKSEL_DIV8 = $04;
  1970. CLKSEL_DIV64 = $05;
  1971. CLKSEL_DIV256 = $06;
  1972. CLKSEL_DIV1024 = $07;
  1973. CLKSEL_EVCH0 = $08;
  1974. CLKSEL_EVCH1 = $09;
  1975. CLKSEL_EVCH2 = $0A;
  1976. CLKSEL_EVCH3 = $0B;
  1977. // Compare or Capture B Enable
  1978. CCBENbm = $20;
  1979. // Compare or Capture A Enable
  1980. CCAENbm = $10;
  1981. // TC_WGMODE
  1982. WGMODEmask = $07;
  1983. WGMODE_NORMAL = $00;
  1984. WGMODE_FRQ = $01;
  1985. WGMODE_SINGLESLOPE = $03;
  1986. WGMODE_SS = $03;
  1987. WGMODE_DSTOP = $05;
  1988. WGMODE_DS_T = $05;
  1989. WGMODE_DSBOTH = $06;
  1990. WGMODE_DS_TB = $06;
  1991. WGMODE_DSBOTTOM = $07;
  1992. WGMODE_DS_B = $07;
  1993. // Compare B Output Value
  1994. CMPBbm = $02;
  1995. // Compare A Output Value
  1996. CMPAbm = $01;
  1997. // TC_EVACT
  1998. EVACTmask = $E0;
  1999. EVACT_OFF = $00;
  2000. EVACT_CAPT = $20;
  2001. EVACT_UPDOWN = $40;
  2002. EVACT_QDEC = $60;
  2003. EVACT_RESTART = $80;
  2004. EVACT_FRQ = $A0;
  2005. EVACT_PW = $C0;
  2006. // Event Delay
  2007. EVDLYbm = $10;
  2008. // TC_EVSEL
  2009. EVSELmask = $0F;
  2010. EVSEL_OFF = $00;
  2011. EVSEL_CH0 = $08;
  2012. EVSEL_CH1 = $09;
  2013. EVSEL_CH2 = $0A;
  2014. EVSEL_CH3 = $0B;
  2015. // Byte Mode
  2016. BYTEMbm = $01;
  2017. // TC_ERRINTLVL
  2018. ERRINTLVLmask = $0C;
  2019. ERRINTLVL_OFF = $00;
  2020. ERRINTLVL_LO = $04;
  2021. ERRINTLVL_MED = $08;
  2022. ERRINTLVL_HI = $0C;
  2023. // TC_OVFINTLVL
  2024. OVFINTLVLmask = $03;
  2025. OVFINTLVL_OFF = $00;
  2026. OVFINTLVL_LO = $01;
  2027. OVFINTLVL_MED = $02;
  2028. OVFINTLVL_HI = $03;
  2029. // TC_CCBINTLVL
  2030. CCBINTLVLmask = $0C;
  2031. CCBINTLVL_OFF = $00;
  2032. CCBINTLVL_LO = $04;
  2033. CCBINTLVL_MED = $08;
  2034. CCBINTLVL_HI = $0C;
  2035. // TC_CCAINTLVL
  2036. CCAINTLVLmask = $03;
  2037. CCAINTLVL_OFF = $00;
  2038. CCAINTLVL_LO = $01;
  2039. CCAINTLVL_MED = $02;
  2040. CCAINTLVL_HI = $03;
  2041. // Command
  2042. CMD0bm = $04;
  2043. CMD1bm = $08;
  2044. // Lock Update
  2045. LUPDbm = $02;
  2046. // Direction
  2047. DIRbm = $01;
  2048. // Compare or Capture B Buffer Valid
  2049. CCBBVbm = $04;
  2050. // Compare or Capture A Buffer Valid
  2051. CCABVbm = $02;
  2052. // Period Buffer Valid
  2053. PERBVbm = $01;
  2054. // Compare or Capture B Interrupt Flag
  2055. CCBIFbm = $20;
  2056. // Compare or Capture A Interrupt Flag
  2057. CCAIFbm = $10;
  2058. // Error Interrupt Flag
  2059. ERRIFbm = $02;
  2060. // Overflow Interrupt Flag
  2061. OVFIFbm = $01;
  2062. end;
  2063. TTC2 = object //16-bit Timer/Counter type 2
  2064. CTRLA: byte; //Control Register A
  2065. CTRLB: byte; //Control Register B
  2066. CTRLC: byte; //Control register C
  2067. Reserved3: byte;
  2068. CTRLE: byte; //Control Register E
  2069. Reserved5: byte;
  2070. INTCTRLA: byte; //Interrupt Control Register A
  2071. INTCTRLB: byte; //Interrupt Control Register B
  2072. Reserved8: byte;
  2073. CTRLF: byte; //Control Register F
  2074. Reserved10: byte;
  2075. Reserved11: byte;
  2076. INTFLAGS: byte; //Interrupt Flag Register
  2077. Reserved13: byte;
  2078. Reserved14: byte;
  2079. Reserved15: byte;
  2080. Reserved16: byte;
  2081. Reserved17: byte;
  2082. Reserved18: byte;
  2083. Reserved19: byte;
  2084. Reserved20: byte;
  2085. Reserved21: byte;
  2086. Reserved22: byte;
  2087. Reserved23: byte;
  2088. Reserved24: byte;
  2089. Reserved25: byte;
  2090. Reserved26: byte;
  2091. Reserved27: byte;
  2092. Reserved28: byte;
  2093. Reserved29: byte;
  2094. Reserved30: byte;
  2095. Reserved31: byte;
  2096. LCNT: byte; //Low Byte Count
  2097. HCNT: byte; //High Byte Count
  2098. Reserved34: byte;
  2099. Reserved35: byte;
  2100. Reserved36: byte;
  2101. Reserved37: byte;
  2102. LPER: byte; //Low Byte Period
  2103. HPER: byte; //High Byte Period
  2104. LCMPA: byte; //Low Byte Compare A
  2105. HCMPA: byte; //High Byte Compare A
  2106. LCMPB: byte; //Low Byte Compare B
  2107. HCMPB: byte; //High Byte Compare B
  2108. LCMPC: byte; //Low Byte Compare C
  2109. HCMPC: byte; //High Byte Compare C
  2110. LCMPD: byte; //Low Byte Compare D
  2111. HCMPD: byte; //High Byte Compare D
  2112. const
  2113. // TC2_CLKSEL
  2114. CLKSELmask = $0F;
  2115. CLKSEL_OFF = $00;
  2116. CLKSEL_DIV1 = $01;
  2117. CLKSEL_DIV2 = $02;
  2118. CLKSEL_DIV4 = $03;
  2119. CLKSEL_DIV8 = $04;
  2120. CLKSEL_DIV64 = $05;
  2121. CLKSEL_DIV256 = $06;
  2122. CLKSEL_DIV1024 = $07;
  2123. CLKSEL_EVCH0 = $08;
  2124. CLKSEL_EVCH1 = $09;
  2125. CLKSEL_EVCH2 = $0A;
  2126. CLKSEL_EVCH3 = $0B;
  2127. // High Byte Compare D Enable
  2128. HCMPDENbm = $80;
  2129. // High Byte Compare C Enable
  2130. HCMPCENbm = $40;
  2131. // High Byte Compare B Enable
  2132. HCMPBENbm = $20;
  2133. // High Byte Compare A Enable
  2134. HCMPAENbm = $10;
  2135. // Low Byte Compare D Enable
  2136. LCMPDENbm = $08;
  2137. // Low Byte Compare C Enable
  2138. LCMPCENbm = $04;
  2139. // Low Byte Compare B Enable
  2140. LCMPBENbm = $02;
  2141. // Low Byte Compare A Enable
  2142. LCMPAENbm = $01;
  2143. // High Byte Compare D Output Value
  2144. HCMPDbm = $80;
  2145. // High Byte Compare C Output Value
  2146. HCMPCbm = $40;
  2147. // High Byte Compare B Output Value
  2148. HCMPBbm = $20;
  2149. // High Byte Compare A Output Value
  2150. HCMPAbm = $10;
  2151. // Low Byte Compare D Output Value
  2152. LCMPDbm = $08;
  2153. // Low Byte Compare C Output Value
  2154. LCMPCbm = $04;
  2155. // Low Byte Compare B Output Value
  2156. LCMPBbm = $02;
  2157. // Low Byte Compare A Output Value
  2158. LCMPAbm = $01;
  2159. // TC2_BYTEM
  2160. BYTEMmask = $03;
  2161. BYTEM_NORMAL = $00;
  2162. BYTEM_BYTEMODE = $01;
  2163. BYTEM_SPLITMODE = $02;
  2164. // TC2_HUNFINTLVL
  2165. HUNFINTLVLmask = $0C;
  2166. HUNFINTLVL_OFF = $00;
  2167. HUNFINTLVL_LO = $04;
  2168. HUNFINTLVL_MED = $08;
  2169. HUNFINTLVL_HI = $0C;
  2170. // TC2_LUNFINTLVL
  2171. LUNFINTLVLmask = $03;
  2172. LUNFINTLVL_OFF = $00;
  2173. LUNFINTLVL_LO = $01;
  2174. LUNFINTLVL_MED = $02;
  2175. LUNFINTLVL_HI = $03;
  2176. // TC2_LCMPDINTLVL
  2177. LCMPDINTLVLmask = $C0;
  2178. LCMPDINTLVL_OFF = $00;
  2179. LCMPDINTLVL_LO = $40;
  2180. LCMPDINTLVL_MED = $80;
  2181. LCMPDINTLVL_HI = $C0;
  2182. // TC2_LCMPCINTLVL
  2183. LCMPCINTLVLmask = $30;
  2184. LCMPCINTLVL_OFF = $00;
  2185. LCMPCINTLVL_LO = $10;
  2186. LCMPCINTLVL_MED = $20;
  2187. LCMPCINTLVL_HI = $30;
  2188. // TC2_LCMPBINTLVL
  2189. LCMPBINTLVLmask = $0C;
  2190. LCMPBINTLVL_OFF = $00;
  2191. LCMPBINTLVL_LO = $04;
  2192. LCMPBINTLVL_MED = $08;
  2193. LCMPBINTLVL_HI = $0C;
  2194. // TC2_LCMPAINTLVL
  2195. LCMPAINTLVLmask = $03;
  2196. LCMPAINTLVL_OFF = $00;
  2197. LCMPAINTLVL_LO = $01;
  2198. LCMPAINTLVL_MED = $02;
  2199. LCMPAINTLVL_HI = $03;
  2200. // TC2_CMD
  2201. CMDmask = $0C;
  2202. CMD_NONE = $00;
  2203. CMD_RESTART = $08;
  2204. CMD_RESET = $0C;
  2205. // TC2_CMDEN
  2206. CMDENmask = $03;
  2207. CMDEN_LOW = $01;
  2208. CMDEN_HIGH = $02;
  2209. CMDEN_BOTH = $03;
  2210. // Low Byte Compare D Interrupt Flag
  2211. LCMPDIFbm = $80;
  2212. // Low Byte Compare C Interrupt Flag
  2213. LCMPCIFbm = $40;
  2214. // Low Byte Compare B Interrupt Flag
  2215. LCMPBIFbm = $20;
  2216. // Low Byte Compare A Interrupt Flag
  2217. LCMPAIFbm = $10;
  2218. // High Byte Underflow Interrupt Flag
  2219. HUNFIFbm = $02;
  2220. // Low Byte Underflow Interrupt Flag
  2221. LUNFIFbm = $01;
  2222. end;
  2223. TAWEX = object //Advanced Waveform Extension
  2224. CTRL: byte; //Control Register
  2225. Reserved1: byte;
  2226. FDEMASK: byte; //Fault Detection Event Mask
  2227. FDCTRL: byte; //Fault Detection Control Register
  2228. STATUS: byte; //Status Register
  2229. STATUSSET: byte; //Status Set Register
  2230. DTBOTH: byte; //Dead Time Both Sides
  2231. DTBOTHBUF: byte; //Dead Time Both Sides Buffer
  2232. DTLS: byte; //Dead Time Low Side
  2233. DTHS: byte; //Dead Time High Side
  2234. DTLSBUF: byte; //Dead Time Low Side Buffer
  2235. DTHSBUF: byte; //Dead Time High Side Buffer
  2236. OUTOVEN: byte; //Output Override Enable
  2237. const
  2238. // Pattern Generation Mode
  2239. PGMbm = $20;
  2240. // Common Waveform Channel Mode
  2241. CWCMbm = $10;
  2242. // Dead Time Insertion Compare Channel D Enable
  2243. DTICCDENbm = $08;
  2244. // Dead Time Insertion Compare Channel C Enable
  2245. DTICCCENbm = $04;
  2246. // Dead Time Insertion Compare Channel B Enable
  2247. DTICCBENbm = $02;
  2248. // Dead Time Insertion Compare Channel A Enable
  2249. DTICCAENbm = $01;
  2250. // Fault Detect on Disable Break Disable
  2251. FDDBDbm = $10;
  2252. // Fault Detect Mode
  2253. FDMODEbm = $04;
  2254. // AWEX_FDACT
  2255. FDACTmask = $03;
  2256. FDACT_NONE = $00;
  2257. FDACT_CLEAROE = $01;
  2258. FDACT_CLEARDIR = $03;
  2259. // Fault Detect Flag
  2260. FDFbm = $04;
  2261. // Dead Time High Side Buffer Valid
  2262. DTHSBUFVbm = $02;
  2263. // Dead Time Low Side Buffer Valid
  2264. DTLSBUFVbm = $01;
  2265. end;
  2266. THIRES = object //High-Resolution Extension
  2267. CTRLA: byte; //Control Register
  2268. const
  2269. // High Resolution Plus
  2270. HRPLUSbm = $04;
  2271. // HIRES_HREN
  2272. HRENmask = $03;
  2273. HREN_NONE = $00;
  2274. HREN_TC0 = $01;
  2275. HREN_TC1 = $02;
  2276. HREN_BOTH = $03;
  2277. end;
  2278. TUSART = object //Universal Synchronous/Asynchronous Receiver/Transmitter
  2279. DATA: byte; //Data Register
  2280. STATUS: byte; //Status Register
  2281. Reserved2: byte;
  2282. CTRLA: byte; //Control Register A
  2283. CTRLB: byte; //Control Register B
  2284. CTRLC: byte; //Control Register C
  2285. BAUDCTRLA: byte; //Baud Rate Control Register A
  2286. BAUDCTRLB: byte; //Baud Rate Control Register B
  2287. const
  2288. // Receive Interrupt Flag
  2289. RXCIFbm = $80;
  2290. // Transmit Interrupt Flag
  2291. TXCIFbm = $40;
  2292. // Data Register Empty Flag
  2293. DREIFbm = $20;
  2294. // Frame Error
  2295. FERRbm = $10;
  2296. // Buffer Overflow
  2297. BUFOVFbm = $08;
  2298. // Parity Error
  2299. PERRbm = $04;
  2300. // Receive Bit 8
  2301. RXB8bm = $01;
  2302. // USART_RXCINTLVL
  2303. RXCINTLVLmask = $30;
  2304. RXCINTLVL_OFF = $00;
  2305. RXCINTLVL_LO = $10;
  2306. RXCINTLVL_MED = $20;
  2307. RXCINTLVL_HI = $30;
  2308. // USART_TXCINTLVL
  2309. TXCINTLVLmask = $0C;
  2310. TXCINTLVL_OFF = $00;
  2311. TXCINTLVL_LO = $04;
  2312. TXCINTLVL_MED = $08;
  2313. TXCINTLVL_HI = $0C;
  2314. // USART_DREINTLVL
  2315. DREINTLVLmask = $03;
  2316. DREINTLVL_OFF = $00;
  2317. DREINTLVL_LO = $01;
  2318. DREINTLVL_MED = $02;
  2319. DREINTLVL_HI = $03;
  2320. // Receiver Enable
  2321. RXENbm = $10;
  2322. // Transmitter Enable
  2323. TXENbm = $08;
  2324. // Double transmission speed
  2325. CLK2Xbm = $04;
  2326. // Multi-processor Communication Mode
  2327. MPCMbm = $02;
  2328. // Transmit bit 8
  2329. TXB8bm = $01;
  2330. // USART_CMODE
  2331. CMODEmask = $C0;
  2332. CMODE_ASYNCHRONOUS = $00;
  2333. CMODE_SYNCHRONOUS = $40;
  2334. CMODE_IRDA = $80;
  2335. CMODE_MSPI = $C0;
  2336. // USART_PMODE
  2337. PMODEmask = $30;
  2338. PMODE_DISABLED = $00;
  2339. PMODE_EVEN = $20;
  2340. PMODE_ODD = $30;
  2341. // Stop Bit Mode
  2342. SBMODEbm = $08;
  2343. // USART_CHSIZE
  2344. CHSIZEmask = $07;
  2345. CHSIZE_5BIT = $00;
  2346. CHSIZE_6BIT = $01;
  2347. CHSIZE_7BIT = $02;
  2348. CHSIZE_8BIT = $03;
  2349. CHSIZE_9BIT = $07;
  2350. // Baud Rate Scale
  2351. BSCALE0bm = $10;
  2352. BSCALE1bm = $20;
  2353. BSCALE2bm = $40;
  2354. BSCALE3bm = $80;
  2355. end;
  2356. TSPI = object //Serial Peripheral Interface
  2357. CTRL: byte; //Control Register
  2358. INTCTRL: byte; //Interrupt Control Register
  2359. STATUS: byte; //Status Register
  2360. DATA: byte; //Data Register
  2361. const
  2362. // Enable Double Speed
  2363. CLK2Xbm = $80;
  2364. // Enable Module
  2365. ENABLEbm = $40;
  2366. // Data Order Setting
  2367. DORDbm = $20;
  2368. // Master Operation Enable
  2369. MASTERbm = $10;
  2370. // SPI_MODE
  2371. MODEmask = $0C;
  2372. MODE_0 = $00;
  2373. MODE_1 = $04;
  2374. MODE_2 = $08;
  2375. MODE_3 = $0C;
  2376. // SPI_PRESCALER
  2377. PRESCALERmask = $03;
  2378. PRESCALER_DIV4 = $00;
  2379. PRESCALER_DIV16 = $01;
  2380. PRESCALER_DIV64 = $02;
  2381. PRESCALER_DIV128 = $03;
  2382. // SPI_INTLVL
  2383. INTLVLmask = $03;
  2384. INTLVL_OFF = $00;
  2385. INTLVL_LO = $01;
  2386. INTLVL_MED = $02;
  2387. INTLVL_HI = $03;
  2388. // Interrupt Flag
  2389. IFbm = $80;
  2390. // Write Collision
  2391. WRCOLbm = $40;
  2392. end;
  2393. TIRCOM = object //IR Communication Module
  2394. CTRL: byte; //Control Register
  2395. TXPLCTRL: byte; //IrDA Transmitter Pulse Length Control Register
  2396. RXPLCTRL: byte; //IrDA Receiver Pulse Length Control Register
  2397. const
  2398. // IRDA_EVSEL
  2399. EVSELmask = $0F;
  2400. EVSEL_OFF = $00;
  2401. EVSEL_0 = $08;
  2402. EVSEL_1 = $09;
  2403. EVSEL_2 = $0A;
  2404. EVSEL_3 = $0B;
  2405. end;
  2406. TLCD = object //LCD Controller
  2407. CTRLA: byte; //Control Register A
  2408. CTRLB: byte; //Control Register B
  2409. CTRLC: byte; //Control Register C
  2410. INTCTRL: byte; //Interrupt Enable Register
  2411. INTFLAG: byte; //Interrupt Flag Register
  2412. CTRLD: byte; //Control Register D
  2413. CTRLE: byte; //Control Register E
  2414. CTRLF: byte; //Control Register F
  2415. CTRLG: byte; //Control Register G
  2416. CTRLH: byte; //Control Register H
  2417. Reserved10: byte;
  2418. Reserved11: byte;
  2419. Reserved12: byte;
  2420. Reserved13: byte;
  2421. Reserved14: byte;
  2422. Reserved15: byte;
  2423. DATA0: byte; //LCD Data Register 0
  2424. DATA1: byte; //LCD Data Register 1
  2425. DATA2: byte; //LCD Data Register 2
  2426. DATA3: byte; //LCD Data Register 3
  2427. DATA4: byte; //LCD Data Register 4
  2428. DATA5: byte; //LCD Data Register 5
  2429. DATA6: byte; //LCD Data Register 6
  2430. DATA7: byte; //LCD Data Register 7
  2431. DATA8: byte; //LCD Data Register 8
  2432. DATA9: byte; //LCD Data Register 9
  2433. DATA10: byte; //LCD Data Register 10
  2434. DATA11: byte; //LCD Data Register 11
  2435. DATA12: byte; //LCD Data Register 12
  2436. DATA13: byte; //LCD Data Register 13
  2437. DATA14: byte; //LCD Data Register 14
  2438. DATA15: byte; //LCD Data Register 15
  2439. DATA16: byte; //LCD Data Register 16
  2440. DATA17: byte; //LCD Data Register 17
  2441. DATA18: byte; //LCD Data Register 18
  2442. DATA19: byte; //LCD Data Register 19
  2443. const
  2444. // LCD Enable
  2445. ENABLEbm = $80;
  2446. // External Register Bias Generation
  2447. XBIASbm = $40;
  2448. // Data Register Lock
  2449. DATCLKbm = $20;
  2450. // Common Bus Swap
  2451. COMSWPbm = $10;
  2452. // Segment Bus Swap
  2453. SEGSWPbm = $08;
  2454. // Clear Data Register
  2455. CLRDTbm = $04;
  2456. // Segments On
  2457. SEGONbm = $02;
  2458. // Blanking Display Mode
  2459. BLANKbm = $01;
  2460. // LCD_PRESC
  2461. PRESCmask = $80;
  2462. PRESC_8 = $00;
  2463. PRESC_16 = $80;
  2464. // LCD_CLKDIV
  2465. CLKDIVmask = $70;
  2466. CLKDIV_DivBy1 = $00;
  2467. CLKDIV_DivBy2 = $10;
  2468. CLKDIV_DivBy3 = $20;
  2469. CLKDIV_DivBy4 = $30;
  2470. CLKDIV_DivBy5 = $40;
  2471. CLKDIV_DivBy6 = $50;
  2472. CLKDIV_DivBy7 = $60;
  2473. CLKDIV_DivBy8 = $70;
  2474. // Low Power Waveform
  2475. LPWAVbm = $08;
  2476. // LCD_DUTY
  2477. DUTYmask = $03;
  2478. DUTY_1_4 = $00;
  2479. DUTY_Static = $01;
  2480. DUTY_1_2 = $02;
  2481. DUTY_1_3 = $03;
  2482. // LCD Port Mask
  2483. PMSK0bm = $01;
  2484. PMSK1bm = $02;
  2485. PMSK2bm = $04;
  2486. PMSK3bm = $08;
  2487. PMSK4bm = $10;
  2488. PMSK5bm = $20;
  2489. // eXtended Interrupt Mode Enable
  2490. XIME0bm = $08;
  2491. XIME1bm = $10;
  2492. XIME2bm = $20;
  2493. XIME3bm = $40;
  2494. XIME4bm = $80;
  2495. // FCINTLVL
  2496. FCINTLVLmask = $03;
  2497. FCINTLVLOFF = $00;
  2498. FCINTLVLLO = $01;
  2499. FCINTLVLMED = $02;
  2500. FCINTLVLHI = $03;
  2501. // LCD Frame Completed Interrupt Flag
  2502. FCIFbm = $01;
  2503. // Blink Enable
  2504. BLINKENbm = $08;
  2505. // LCD_BLINKRATE
  2506. BLINKRATEmask = $03;
  2507. BLINKRATE_4Hz = $00;
  2508. BLINKRATE_2Hz = $01;
  2509. BLINKRATE_1Hz = $02;
  2510. BLINKRATE_0Hz5 = $03;
  2511. // Blink Pixel Selection 1
  2512. BPS10bm = $10;
  2513. BPS11bm = $20;
  2514. BPS12bm = $40;
  2515. BPS13bm = $80;
  2516. // Blink Pixel Selection 0
  2517. BPS00bm = $01;
  2518. BPS01bm = $02;
  2519. BPS02bm = $04;
  2520. BPS03bm = $08;
  2521. // Fine Contrast
  2522. FCONT0bm = $01;
  2523. FCONT1bm = $02;
  2524. FCONT2bm = $04;
  2525. FCONT3bm = $08;
  2526. FCONT4bm = $10;
  2527. FCONT5bm = $20;
  2528. // LCD_TDG
  2529. TDGmask = $C0;
  2530. TDG_7S_3C = $00;
  2531. TDG_7S_4C = $40;
  2532. TDG_14S_4C = $80;
  2533. TDG_16S_3C = $C0;
  2534. // Start Segment
  2535. STSEG0bm = $01;
  2536. STSEG1bm = $02;
  2537. STSEG2bm = $04;
  2538. STSEG3bm = $08;
  2539. STSEG4bm = $10;
  2540. STSEG5bm = $20;
  2541. // Decrement of Start Segment
  2542. DECbm = $80;
  2543. // Display Code
  2544. DCODE0bm = $01;
  2545. DCODE1bm = $02;
  2546. DCODE2bm = $04;
  2547. DCODE3bm = $08;
  2548. DCODE4bm = $10;
  2549. DCODE5bm = $20;
  2550. DCODE6bm = $40;
  2551. end;
  2552. TNVM_FUSES = object //Fuses
  2553. FUSEBYTE0: byte; //JTAG User ID
  2554. FUSEBYTE1: byte; //Watchdog Configuration
  2555. FUSEBYTE2: byte; //Reset Configuration
  2556. Reserved3: byte;
  2557. FUSEBYTE4: byte; //Start-up Configuration
  2558. FUSEBYTE5: byte; //EESAVE and BOD Level
  2559. const
  2560. // WDWPER
  2561. WDWPERmask = $F0;
  2562. WDWPER_8CLK = $00;
  2563. WDWPER_16CLK = $10;
  2564. WDWPER_32CLK = $20;
  2565. WDWPER_64CLK = $30;
  2566. WDWPER_128CLK = $40;
  2567. WDWPER_256CLK = $50;
  2568. WDWPER_512CLK = $60;
  2569. WDWPER_1KCLK = $70;
  2570. WDWPER_2KCLK = $80;
  2571. WDWPER_4KCLK = $90;
  2572. WDWPER_8KCLK = $A0;
  2573. // WDPER
  2574. WDPERmask = $0F;
  2575. WDPER_8CLK = $00;
  2576. WDPER_16CLK = $01;
  2577. WDPER_32CLK = $02;
  2578. WDPER_64CLK = $03;
  2579. WDPER_128CLK = $04;
  2580. WDPER_256CLK = $05;
  2581. WDPER_512CLK = $06;
  2582. WDPER_1KCLK = $07;
  2583. WDPER_2KCLK = $08;
  2584. WDPER_4KCLK = $09;
  2585. WDPER_8KCLK = $0A;
  2586. // BOOTRST
  2587. BOOTRSTmask = $40;
  2588. BOOTRST_BOOTLDR = $00;
  2589. BOOTRST_APPLICATION = $40;
  2590. // TOSCSEL
  2591. TOSCSELmask = $20;
  2592. TOSCSEL_ALTERNATE = $00;
  2593. TOSCSEL_XTAL = $20;
  2594. // BODPD
  2595. BODPDmask = $03;
  2596. BODPD_SAMPLED = $01;
  2597. BODPD_CONTINUOUS = $02;
  2598. BODPD_DISABLED = $03;
  2599. // External Reset Disable
  2600. RSTDISBLbm = $10;
  2601. // STARTUPTIME
  2602. STARTUPTIMEmask = $0C;
  2603. STARTUPTIME0MS = $0C;
  2604. STARTUPTIME4MS = $04;
  2605. STARTUPTIME64MS = $00;
  2606. // Watchdog Timer Lock
  2607. WDLOCKbm = $02;
  2608. // JTAG Interface Enable
  2609. JTAGENbm = $01;
  2610. // BODACT
  2611. BODACTmask = $30;
  2612. BODACT_SAMPLED = $10;
  2613. BODACT_CONTINUOUS = $20;
  2614. BODACT_DISABLED = $30;
  2615. // Preserve EEPROM Through Chip Erase
  2616. EESAVEbm = $08;
  2617. // BODLEVEL
  2618. BODLEVELmask = $07;
  2619. BODLEVEL1V6 = $07;
  2620. BODLEVEL1V8 = $06;
  2621. BODLEVEL2V0 = $05;
  2622. BODLEVEL2V2 = $04;
  2623. BODLEVEL2V4 = $03;
  2624. BODLEVEL2V6 = $02;
  2625. BODLEVEL2V8 = $01;
  2626. BODLEVEL3V0 = $00;
  2627. end;
  2628. TNVM_LOCKBITS = object //Lock Bits
  2629. LOCKBITS: byte; //Lock Bits
  2630. const
  2631. // FUSE_BLBB
  2632. BLBBmask = $C0;
  2633. BLBB_RWLOCK = $00;
  2634. BLBB_RLOCK = $40;
  2635. BLBB_WLOCK = $80;
  2636. BLBB_NOLOCK = $C0;
  2637. // FUSE_BLBA
  2638. BLBAmask = $30;
  2639. BLBA_RWLOCK = $00;
  2640. BLBA_RLOCK = $10;
  2641. BLBA_WLOCK = $20;
  2642. BLBA_NOLOCK = $30;
  2643. // FUSE_BLBAT
  2644. BLBATmask = $0C;
  2645. BLBAT_RWLOCK = $00;
  2646. BLBAT_RLOCK = $04;
  2647. BLBAT_WLOCK = $08;
  2648. BLBAT_NOLOCK = $0C;
  2649. // FUSE_LB
  2650. LBmask = $03;
  2651. LB_RWLOCK = $00;
  2652. LB_WLOCK = $02;
  2653. LB_NOLOCK = $03;
  2654. end;
  2655. TNVM_PROD_SIGNATURES = object //Production Signatures
  2656. RCOSC2M: byte; //RCOSC 2 MHz Calibration Value B
  2657. RCOSC2MA: byte; //RCOSC 2 MHz Calibration Value A
  2658. RCOSC32K: byte; //RCOSC 32.768 kHz Calibration Value
  2659. RCOSC32M: byte; //RCOSC 32 MHz Calibration Value B
  2660. RCOSC32MA: byte; //RCOSC 32 MHz Calibration Value A
  2661. Reserved5: byte;
  2662. Reserved6: byte;
  2663. Reserved7: byte;
  2664. LOTNUM0: byte; //Lot Number Byte 0, ASCII
  2665. LOTNUM1: byte; //Lot Number Byte 1, ASCII
  2666. LOTNUM2: byte; //Lot Number Byte 2, ASCII
  2667. LOTNUM3: byte; //Lot Number Byte 3, ASCII
  2668. LOTNUM4: byte; //Lot Number Byte 4, ASCII
  2669. LOTNUM5: byte; //Lot Number Byte 5, ASCII
  2670. Reserved14: byte;
  2671. Reserved15: byte;
  2672. WAFNUM: byte; //Wafer Number
  2673. Reserved17: byte;
  2674. COORDX0: byte; //Wafer Coordinate X Byte 0
  2675. COORDX1: byte; //Wafer Coordinate X Byte 1
  2676. COORDY0: byte; //Wafer Coordinate Y Byte 0
  2677. COORDY1: byte; //Wafer Coordinate Y Byte 1
  2678. Reserved22: byte;
  2679. Reserved23: byte;
  2680. Reserved24: byte;
  2681. Reserved25: byte;
  2682. USBCAL0: byte; //USB Calibration Byte 0
  2683. USBCAL1: byte; //USB Calibration Byte 1
  2684. USBRCOSC: byte; //USB RCOSC Calibration Value B
  2685. USBRCOSCA: byte; //USB RCOSC Calibration Value A
  2686. Reserved30: byte;
  2687. Reserved31: byte;
  2688. ADCACAL0: byte; //ADCA Calibration Byte 0
  2689. ADCACAL1: byte; //ADCA Calibration Byte 1
  2690. Reserved34: byte;
  2691. Reserved35: byte;
  2692. ADCBCAL0: byte; //ADCB Calibration Byte 0
  2693. ADCBCAL1: byte; //ADCB Calibration Byte 1
  2694. Reserved38: byte;
  2695. Reserved39: byte;
  2696. Reserved40: byte;
  2697. Reserved41: byte;
  2698. Reserved42: byte;
  2699. Reserved43: byte;
  2700. Reserved44: byte;
  2701. Reserved45: byte;
  2702. TEMPSENSE0: byte; //Temperature Sensor Calibration Byte 0
  2703. TEMPSENSE1: byte; //Temperature Sensor Calibration Byte 1
  2704. end;
  2705. const
  2706. Pin0idx = 0; Pin0bm = 1;
  2707. Pin1idx = 1; Pin1bm = 2;
  2708. Pin2idx = 2; Pin2bm = 4;
  2709. Pin3idx = 3; Pin3bm = 8;
  2710. Pin4idx = 4; Pin4bm = 16;
  2711. Pin5idx = 5; Pin5bm = 32;
  2712. Pin6idx = 6; Pin6bm = 64;
  2713. Pin7idx = 7; Pin7bm = 128;
  2714. var
  2715. GPIO: TGPIO absolute $0000;
  2716. VPORT0: TVPORT absolute $0010;
  2717. VPORT1: TVPORT absolute $0014;
  2718. VPORT2: TVPORT absolute $0018;
  2719. VPORT3: TVPORT absolute $001C;
  2720. OCD: TOCD absolute $002E;
  2721. CPU: TCPU absolute $0030;
  2722. CLK: TCLK absolute $0040;
  2723. SLEEP: TSLEEP absolute $0048;
  2724. OSC: TOSC absolute $0050;
  2725. DFLLRC32M: TDFLL absolute $0060;
  2726. DFLLRC2M: TDFLL absolute $0068;
  2727. PR: TPR absolute $0070;
  2728. RST: TRST absolute $0078;
  2729. WDT: TWDT absolute $0080;
  2730. MCU: TMCU absolute $0090;
  2731. PMIC: TPMIC absolute $00A0;
  2732. PORTCFG: TPORTCFG absolute $00B0;
  2733. AES: TAES absolute $00C0;
  2734. CRC: TCRC absolute $00D0;
  2735. DMA: TDMA absolute $0100;
  2736. EVSYS: TEVSYS absolute $0180;
  2737. NVM: TNVM absolute $01C0;
  2738. ADCB: TADC absolute $0240;
  2739. ACB: TAC absolute $0390;
  2740. RTC: TRTC absolute $0400;
  2741. TWIC: TTWI absolute $0480;
  2742. USB: TUSB absolute $04C0;
  2743. PORTB: TPORT absolute $0620;
  2744. PORTC: TPORT absolute $0640;
  2745. PORTD: TPORT absolute $0660;
  2746. PORTG: TPORT absolute $06C0;
  2747. PORTM: TPORT absolute $0760;
  2748. PORTR: TPORT absolute $07E0;
  2749. TCC0: TTC0 absolute $0800;
  2750. TCC2: TTC2 absolute $0800;
  2751. TCC1: TTC1 absolute $0840;
  2752. AWEXC: TAWEX absolute $0880;
  2753. HIRESC: THIRES absolute $0890;
  2754. USARTC0: TUSART absolute $08A0;
  2755. SPIC: TSPI absolute $08C0;
  2756. IRCOM: TIRCOM absolute $08F8;
  2757. LCD: TLCD absolute $0D00;
  2758. implementation
  2759. {$i avrcommon.inc}
  2760. procedure OSC_OSCF_ISR; external name 'OSC_OSCF_ISR'; // Interrupt 1 Oscillator Failure Interrupt (NMI)
  2761. procedure PORTC_INT0_ISR; external name 'PORTC_INT0_ISR'; // Interrupt 2 External Interrupt 0
  2762. procedure PORTC_INT1_ISR; external name 'PORTC_INT1_ISR'; // Interrupt 3 External Interrupt 1
  2763. procedure PORTR_INT0_ISR; external name 'PORTR_INT0_ISR'; // Interrupt 4 External Interrupt 0
  2764. procedure PORTR_INT1_ISR; external name 'PORTR_INT1_ISR'; // Interrupt 5 External Interrupt 1
  2765. procedure DMA_CH0_ISR; external name 'DMA_CH0_ISR'; // Interrupt 6 Channel 0 Interrupt
  2766. procedure DMA_CH1_ISR; external name 'DMA_CH1_ISR'; // Interrupt 7 Channel 1 Interrupt
  2767. procedure RTC_OVF_ISR; external name 'RTC_OVF_ISR'; // Interrupt 10 Overflow Interrupt
  2768. procedure RTC_COMP_ISR; external name 'RTC_COMP_ISR'; // Interrupt 11 Compare Interrupt
  2769. procedure TWIC_TWIS_ISR; external name 'TWIC_TWIS_ISR'; // Interrupt 12 TWI Slave Interrupt
  2770. procedure TWIC_TWIM_ISR; external name 'TWIC_TWIM_ISR'; // Interrupt 13 TWI Master Interrupt
  2771. procedure TCC2_LUNF_ISR; external name 'TCC2_LUNF_ISR'; // Interrupt 14 Low Byte Underflow Interrupt
  2772. procedure TCC2_HUNF_ISR; external name 'TCC2_HUNF_ISR'; // Interrupt 15 High Byte Underflow Interrupt
  2773. procedure TCC2_LCMPA_ISR; external name 'TCC2_LCMPA_ISR'; // Interrupt 16 Low Byte Compare A Interrupt
  2774. procedure TCC2_LCMPB_ISR; external name 'TCC2_LCMPB_ISR'; // Interrupt 17 Low Byte Compare B Interrupt
  2775. procedure TCC2_LCMPC_ISR; external name 'TCC2_LCMPC_ISR'; // Interrupt 18 Low Byte Compare C Interrupt
  2776. procedure TCC2_LCMPD_ISR; external name 'TCC2_LCMPD_ISR'; // Interrupt 19 Low Byte Compare D Interrupt
  2777. procedure TCC1_OVF_ISR; external name 'TCC1_OVF_ISR'; // Interrupt 20 Overflow Interrupt
  2778. procedure TCC1_ERR_ISR; external name 'TCC1_ERR_ISR'; // Interrupt 21 Error Interrupt
  2779. procedure TCC1_CCA_ISR; external name 'TCC1_CCA_ISR'; // Interrupt 22 Compare or Capture A Interrupt
  2780. procedure TCC1_CCB_ISR; external name 'TCC1_CCB_ISR'; // Interrupt 23 Compare or Capture B Interrupt
  2781. procedure SPIC_INT_ISR; external name 'SPIC_INT_ISR'; // Interrupt 24 SPI Interrupt
  2782. procedure USARTC0_RXC_ISR; external name 'USARTC0_RXC_ISR'; // Interrupt 25 Reception Complete Interrupt
  2783. procedure USARTC0_DRE_ISR; external name 'USARTC0_DRE_ISR'; // Interrupt 26 Data Register Empty Interrupt
  2784. procedure USARTC0_TXC_ISR; external name 'USARTC0_TXC_ISR'; // Interrupt 27 Transmission Complete Interrupt
  2785. procedure USB_BUSEVENT_ISR; external name 'USB_BUSEVENT_ISR'; // Interrupt 31 SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts
  2786. procedure USB_TRNCOMPL_ISR; external name 'USB_TRNCOMPL_ISR'; // Interrupt 32 Transaction complete interrupt
  2787. procedure LCD_INT_ISR; external name 'LCD_INT_ISR'; // Interrupt 35 LCD Interrupt
  2788. procedure AES_INT_ISR; external name 'AES_INT_ISR'; // Interrupt 36 AES Interrupt
  2789. procedure NVM_EE_ISR; external name 'NVM_EE_ISR'; // Interrupt 37 EE Interrupt
  2790. procedure NVM_SPM_ISR; external name 'NVM_SPM_ISR'; // Interrupt 38 SPM Interrupt
  2791. procedure PORTB_INT0_ISR; external name 'PORTB_INT0_ISR'; // Interrupt 39 External Interrupt 0
  2792. procedure PORTB_INT1_ISR; external name 'PORTB_INT1_ISR'; // Interrupt 40 External Interrupt 1
  2793. procedure ACB_AC0_ISR; external name 'ACB_AC0_ISR'; // Interrupt 41 AC0 Interrupt
  2794. procedure ACB_AC1_ISR; external name 'ACB_AC1_ISR'; // Interrupt 42 AC1 Interrupt
  2795. procedure ACB_ACW_ISR; external name 'ACB_ACW_ISR'; // Interrupt 43 ACW Window Mode Interrupt
  2796. procedure ADCB_CH0_ISR; external name 'ADCB_CH0_ISR'; // Interrupt 44 Interrupt 0
  2797. procedure PORTD_INT0_ISR; external name 'PORTD_INT0_ISR'; // Interrupt 48 External Interrupt 0
  2798. procedure PORTD_INT1_ISR; external name 'PORTD_INT1_ISR'; // Interrupt 49 External Interrupt 1
  2799. procedure PORTG_INT0_ISR; external name 'PORTG_INT0_ISR'; // Interrupt 50 External Interrupt 0
  2800. procedure PORTG_INT1_ISR; external name 'PORTG_INT1_ISR'; // Interrupt 51 External Interrupt 1
  2801. procedure PORTM_INT0_ISR; external name 'PORTM_INT0_ISR'; // Interrupt 52 External Interrupt 0
  2802. procedure PORTM_INT1_ISR; external name 'PORTM_INT1_ISR'; // Interrupt 53 External Interrupt 1
  2803. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  2804. asm
  2805. jmp __dtors_end
  2806. jmp OSC_OSCF_ISR
  2807. jmp PORTC_INT0_ISR
  2808. jmp PORTC_INT1_ISR
  2809. jmp PORTR_INT0_ISR
  2810. jmp PORTR_INT1_ISR
  2811. jmp DMA_CH0_ISR
  2812. jmp DMA_CH1_ISR
  2813. jmp RTC_OVF_ISR
  2814. jmp RTC_COMP_ISR
  2815. jmp TWIC_TWIS_ISR
  2816. jmp TWIC_TWIM_ISR
  2817. jmp TCC2_LUNF_ISR
  2818. jmp TCC2_HUNF_ISR
  2819. jmp TCC2_LCMPA_ISR
  2820. jmp TCC2_LCMPB_ISR
  2821. jmp TCC2_LCMPC_ISR
  2822. jmp TCC2_LCMPD_ISR
  2823. jmp TCC1_OVF_ISR
  2824. jmp TCC1_ERR_ISR
  2825. jmp TCC1_CCA_ISR
  2826. jmp TCC1_CCB_ISR
  2827. jmp SPIC_INT_ISR
  2828. jmp USARTC0_RXC_ISR
  2829. jmp USARTC0_DRE_ISR
  2830. jmp USARTC0_TXC_ISR
  2831. jmp USB_BUSEVENT_ISR
  2832. jmp USB_TRNCOMPL_ISR
  2833. jmp LCD_INT_ISR
  2834. jmp AES_INT_ISR
  2835. jmp NVM_EE_ISR
  2836. jmp NVM_SPM_ISR
  2837. jmp PORTB_INT0_ISR
  2838. jmp PORTB_INT1_ISR
  2839. jmp ACB_AC0_ISR
  2840. jmp ACB_AC1_ISR
  2841. jmp ACB_ACW_ISR
  2842. jmp ADCB_CH0_ISR
  2843. jmp PORTD_INT0_ISR
  2844. jmp PORTD_INT1_ISR
  2845. jmp PORTG_INT0_ISR
  2846. jmp PORTG_INT1_ISR
  2847. jmp PORTM_INT0_ISR
  2848. jmp PORTM_INT1_ISR
  2849. .weak OSC_OSCF_ISR
  2850. .weak PORTC_INT0_ISR
  2851. .weak PORTC_INT1_ISR
  2852. .weak PORTR_INT0_ISR
  2853. .weak PORTR_INT1_ISR
  2854. .weak DMA_CH0_ISR
  2855. .weak DMA_CH1_ISR
  2856. .weak RTC_OVF_ISR
  2857. .weak RTC_COMP_ISR
  2858. .weak TWIC_TWIS_ISR
  2859. .weak TWIC_TWIM_ISR
  2860. .weak TCC2_LUNF_ISR
  2861. .weak TCC2_HUNF_ISR
  2862. .weak TCC2_LCMPA_ISR
  2863. .weak TCC2_LCMPB_ISR
  2864. .weak TCC2_LCMPC_ISR
  2865. .weak TCC2_LCMPD_ISR
  2866. .weak TCC1_OVF_ISR
  2867. .weak TCC1_ERR_ISR
  2868. .weak TCC1_CCA_ISR
  2869. .weak TCC1_CCB_ISR
  2870. .weak SPIC_INT_ISR
  2871. .weak USARTC0_RXC_ISR
  2872. .weak USARTC0_DRE_ISR
  2873. .weak USARTC0_TXC_ISR
  2874. .weak USB_BUSEVENT_ISR
  2875. .weak USB_TRNCOMPL_ISR
  2876. .weak LCD_INT_ISR
  2877. .weak AES_INT_ISR
  2878. .weak NVM_EE_ISR
  2879. .weak NVM_SPM_ISR
  2880. .weak PORTB_INT0_ISR
  2881. .weak PORTB_INT1_ISR
  2882. .weak ACB_AC0_ISR
  2883. .weak ACB_AC1_ISR
  2884. .weak ACB_ACW_ISR
  2885. .weak ADCB_CH0_ISR
  2886. .weak PORTD_INT0_ISR
  2887. .weak PORTD_INT1_ISR
  2888. .weak PORTG_INT0_ISR
  2889. .weak PORTG_INT1_ISR
  2890. .weak PORTM_INT0_ISR
  2891. .weak PORTM_INT1_ISR
  2892. .set OSC_OSCF_ISR, Default_IRQ_handler
  2893. .set PORTC_INT0_ISR, Default_IRQ_handler
  2894. .set PORTC_INT1_ISR, Default_IRQ_handler
  2895. .set PORTR_INT0_ISR, Default_IRQ_handler
  2896. .set PORTR_INT1_ISR, Default_IRQ_handler
  2897. .set DMA_CH0_ISR, Default_IRQ_handler
  2898. .set DMA_CH1_ISR, Default_IRQ_handler
  2899. .set RTC_OVF_ISR, Default_IRQ_handler
  2900. .set RTC_COMP_ISR, Default_IRQ_handler
  2901. .set TWIC_TWIS_ISR, Default_IRQ_handler
  2902. .set TWIC_TWIM_ISR, Default_IRQ_handler
  2903. .set TCC2_LUNF_ISR, Default_IRQ_handler
  2904. .set TCC2_HUNF_ISR, Default_IRQ_handler
  2905. .set TCC2_LCMPA_ISR, Default_IRQ_handler
  2906. .set TCC2_LCMPB_ISR, Default_IRQ_handler
  2907. .set TCC2_LCMPC_ISR, Default_IRQ_handler
  2908. .set TCC2_LCMPD_ISR, Default_IRQ_handler
  2909. .set TCC1_OVF_ISR, Default_IRQ_handler
  2910. .set TCC1_ERR_ISR, Default_IRQ_handler
  2911. .set TCC1_CCA_ISR, Default_IRQ_handler
  2912. .set TCC1_CCB_ISR, Default_IRQ_handler
  2913. .set SPIC_INT_ISR, Default_IRQ_handler
  2914. .set USARTC0_RXC_ISR, Default_IRQ_handler
  2915. .set USARTC0_DRE_ISR, Default_IRQ_handler
  2916. .set USARTC0_TXC_ISR, Default_IRQ_handler
  2917. .set USB_BUSEVENT_ISR, Default_IRQ_handler
  2918. .set USB_TRNCOMPL_ISR, Default_IRQ_handler
  2919. .set LCD_INT_ISR, Default_IRQ_handler
  2920. .set AES_INT_ISR, Default_IRQ_handler
  2921. .set NVM_EE_ISR, Default_IRQ_handler
  2922. .set NVM_SPM_ISR, Default_IRQ_handler
  2923. .set PORTB_INT0_ISR, Default_IRQ_handler
  2924. .set PORTB_INT1_ISR, Default_IRQ_handler
  2925. .set ACB_AC0_ISR, Default_IRQ_handler
  2926. .set ACB_AC1_ISR, Default_IRQ_handler
  2927. .set ACB_ACW_ISR, Default_IRQ_handler
  2928. .set ADCB_CH0_ISR, Default_IRQ_handler
  2929. .set PORTD_INT0_ISR, Default_IRQ_handler
  2930. .set PORTD_INT1_ISR, Default_IRQ_handler
  2931. .set PORTG_INT0_ISR, Default_IRQ_handler
  2932. .set PORTG_INT1_ISR, Default_IRQ_handler
  2933. .set PORTM_INT0_ISR, Default_IRQ_handler
  2934. .set PORTM_INT1_ISR, Default_IRQ_handler
  2935. end;
  2936. end.