atxmega32c3.pp 75 KB

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  1. unit ATxmega32C3;
  2. interface
  3. type
  4. TGPIO = object //General Purpose IO Registers
  5. GPIOR0: byte; //General Purpose IO Register 0
  6. GPIOR1: byte; //General Purpose IO Register 1
  7. GPIOR2: byte; //General Purpose IO Register 2
  8. GPIOR3: byte; //General Purpose IO Register 3
  9. end;
  10. TVPORT = object //Virtual Port
  11. DIR: byte; //I/O Port Data Direction
  12. OUT_: byte; //I/O Port Output
  13. IN_: byte; //I/O Port Input
  14. INTFLAGS: byte; //Interrupt Flag Register
  15. const
  16. // Port Interrupt 1 Flag
  17. INT1IFbm = $02;
  18. // Port Interrupt 0 Flag
  19. INT0IFbm = $01;
  20. end;
  21. TOCD = object //On-Chip Debug System
  22. OCDR0: byte; //OCD Register 0
  23. OCDR1: byte; //OCD Register 1
  24. end;
  25. TCPU = object //CPU registers
  26. Reserved0: byte;
  27. Reserved1: byte;
  28. Reserved2: byte;
  29. Reserved3: byte;
  30. CCP: byte; //Configuration Change Protection
  31. Reserved5: byte;
  32. Reserved6: byte;
  33. Reserved7: byte;
  34. RAMPD: byte; //Ramp D
  35. RAMPX: byte; //Ramp X
  36. RAMPY: byte; //Ramp Y
  37. RAMPZ: byte; //Ramp Z
  38. EIND: byte; //Extended Indirect Jump
  39. SPL: byte; //Stack Pointer Low
  40. SPH: byte; //Stack Pointer High
  41. SREG: byte; //Status Register
  42. const
  43. // CCP
  44. CCPmask = $FF;
  45. CCP_SPM = $9D;
  46. CCP_IOREG = $D8;
  47. // Global Interrupt Enable Flag
  48. Ibm = $80;
  49. // Transfer Bit
  50. Tbm = $40;
  51. // Half Carry Flag
  52. Hbm = $20;
  53. // N Exclusive Or V Flag
  54. Sbm = $10;
  55. // Two's Complement Overflow Flag
  56. Vbm = $08;
  57. // Negative Flag
  58. Nbm = $04;
  59. // Zero Flag
  60. Zbm = $02;
  61. // Carry Flag
  62. Cbm = $01;
  63. end;
  64. TCLK = object //Clock System
  65. CTRL: byte; //Control Register
  66. PSCTRL: byte; //Prescaler Control Register
  67. LOCK: byte; //Lock register
  68. RTCCTRL: byte; //RTC Control Register
  69. USBCTRL: byte; //USB Control Register
  70. const
  71. // CLK_SCLKSEL
  72. SCLKSELmask = $07;
  73. SCLKSEL_RC2M = $00;
  74. SCLKSEL_RC32M = $01;
  75. SCLKSEL_RC32K = $02;
  76. SCLKSEL_XOSC = $03;
  77. SCLKSEL_PLL = $04;
  78. // CLK_PSADIV
  79. PSADIVmask = $7C;
  80. PSADIV_1 = $00;
  81. PSADIV_2 = $04;
  82. PSADIV_4 = $0C;
  83. PSADIV_8 = $14;
  84. PSADIV_16 = $1C;
  85. PSADIV_32 = $24;
  86. PSADIV_64 = $2C;
  87. PSADIV_128 = $34;
  88. PSADIV_256 = $3C;
  89. PSADIV_512 = $44;
  90. // CLK_PSBCDIV
  91. PSBCDIVmask = $03;
  92. PSBCDIV_1_1 = $00;
  93. PSBCDIV_1_2 = $01;
  94. PSBCDIV_4_1 = $02;
  95. PSBCDIV_2_2 = $03;
  96. // Clock System Lock
  97. LOCKbm = $01;
  98. // CLK_RTCSRC
  99. RTCSRCmask = $0E;
  100. RTCSRC_ULP = $00;
  101. RTCSRC_TOSC = $02;
  102. RTCSRC_RCOSC = $04;
  103. RTCSRC_TOSC32 = $0A;
  104. RTCSRC_RCOSC32 = $0C;
  105. RTCSRC_EXTCLK = $0E;
  106. // Clock Source Enable
  107. RTCENbm = $01;
  108. // CLK_USBPSDIV
  109. USBPSDIVmask = $38;
  110. USBPSDIV_1 = $00;
  111. USBPSDIV_2 = $08;
  112. USBPSDIV_4 = $10;
  113. USBPSDIV_8 = $18;
  114. USBPSDIV_16 = $20;
  115. USBPSDIV_32 = $28;
  116. // CLK_USBSRC
  117. USBSRCmask = $06;
  118. USBSRC_PLL = $00;
  119. USBSRC_RC32M = $02;
  120. // Clock Source Enable
  121. USBSENbm = $01;
  122. end;
  123. TPR = object //Power Reduction
  124. PRGEN: byte; //General Power Reduction
  125. PRPA: byte; //Power Reduction Port A
  126. Reserved2: byte;
  127. PRPC: byte; //Power Reduction Port C
  128. PRPD: byte; //Power Reduction Port D
  129. PRPE: byte; //Power Reduction Port E
  130. PRPF: byte; //Power Reduction Port F
  131. const
  132. // USB
  133. USBbm = $40;
  134. // AES
  135. AESbm = $10;
  136. // Real-time Counter
  137. RTCbm = $04;
  138. // Event System
  139. EVSYSbm = $02;
  140. // DMA-Controller
  141. DMAbm = $01;
  142. // Port A ADC
  143. ADCbm = $02;
  144. // Port A Analog Comparator
  145. ACbm = $01;
  146. // Port C Two-wire Interface
  147. TWIbm = $40;
  148. // Port C USART1
  149. USART1bm = $20;
  150. // Port C USART0
  151. USART0bm = $10;
  152. // Port C SPI
  153. SPIbm = $08;
  154. // Port C AWEX
  155. HIRESbm = $04;
  156. // Port C Timer/Counter1
  157. TC1bm = $02;
  158. // Port C Timer/Counter0
  159. TC0bm = $01;
  160. end;
  161. TSLEEP = object //Sleep Controller
  162. CTRL: byte; //Control Register
  163. const
  164. // SLEEP_SMODE
  165. SMODEmask = $0E;
  166. SMODE_IDLE = $00;
  167. SMODE_PDOWN = $04;
  168. SMODE_PSAVE = $06;
  169. SMODE_STDBY = $0C;
  170. SMODE_ESTDBY = $0E;
  171. // Sleep Enable
  172. SENbm = $01;
  173. end;
  174. TOSC = object //Oscillator
  175. CTRL: byte; //Control Register
  176. STATUS: byte; //Status Register
  177. XOSCCTRL: byte; //External Oscillator Control Register
  178. XOSCFAIL: byte; //Oscillator Failure Detection Register
  179. RC32KCAL: byte; //32.768 kHz Internal Oscillator Calibration Register
  180. PLLCTRL: byte; //PLL Control Register
  181. DFLLCTRL: byte; //DFLL Control Register
  182. const
  183. // PLL Enable
  184. PLLENbm = $10;
  185. // External Oscillator Enable
  186. XOSCENbm = $08;
  187. // Internal 32.768 kHz RC Oscillator Enable
  188. RC32KENbm = $04;
  189. // Internal 32 MHz RC Oscillator Enable
  190. RC32MENbm = $02;
  191. // Internal 2 MHz RC Oscillator Enable
  192. RC2MENbm = $01;
  193. // PLL Ready
  194. PLLRDYbm = $10;
  195. // External Oscillator Ready
  196. XOSCRDYbm = $08;
  197. // Internal 32.768 kHz RC Oscillator Ready
  198. RC32KRDYbm = $04;
  199. // Internal 32 MHz RC Oscillator Ready
  200. RC32MRDYbm = $02;
  201. // Internal 2 MHz RC Oscillator Ready
  202. RC2MRDYbm = $01;
  203. // OSC_FRQRANGE
  204. FRQRANGEmask = $C0;
  205. FRQRANGE_04TO2 = $00;
  206. FRQRANGE_2TO9 = $40;
  207. FRQRANGE_9TO12 = $80;
  208. FRQRANGE_12TO16 = $C0;
  209. // 32.768 kHz XTAL OSC Low-power Mode
  210. X32KLPMbm = $20;
  211. // 16 MHz Crystal Oscillator High Power mode
  212. XOSCPWRbm = $10;
  213. // OSC_XOSCSEL
  214. XOSCSELmask = $0F;
  215. XOSCSEL_EXTCLK = $00;
  216. XOSCSEL_32KHz = $02;
  217. XOSCSEL_XTAL_256CLK = $03;
  218. XOSCSEL_XTAL_1KCLK = $07;
  219. XOSCSEL_XTAL_16KCLK = $0B;
  220. // PLL Failure Detection Interrupt Flag
  221. PLLFDIFbm = $08;
  222. // PLL Failure Detection Enable
  223. PLLFDENbm = $04;
  224. // XOSC Failure Detection Interrupt Flag
  225. XOSCFDIFbm = $02;
  226. // XOSC Failure Detection Enable
  227. XOSCFDENbm = $01;
  228. // OSC_PLLSRC
  229. PLLSRCmask = $C0;
  230. PLLSRC_RC2M = $00;
  231. PLLSRC_RC32M = $80;
  232. PLLSRC_XOSC = $C0;
  233. // Divide by 2
  234. PLLDIVbm = $20;
  235. // Multiplication Factor
  236. PLLFAC0bm = $01;
  237. PLLFAC1bm = $02;
  238. PLLFAC2bm = $04;
  239. PLLFAC3bm = $08;
  240. PLLFAC4bm = $10;
  241. // OSC_RC32MCREF
  242. RC32MCREFmask = $06;
  243. RC32MCREF_RC32K = $00;
  244. RC32MCREF_XOSC32K = $02;
  245. RC32MCREF_USBSOF = $04;
  246. // OSC_RC2MCREF
  247. RC2MCREFmask = $01;
  248. RC2MCREF_RC32K = $00;
  249. RC2MCREF_XOSC32K = $01;
  250. end;
  251. TDFLL = object //DFLL
  252. CTRL: byte; //Control Register
  253. Reserved1: byte;
  254. CALA: byte; //Calibration Register A
  255. CALB: byte; //Calibration Register B
  256. COMP0: byte; //Oscillator Compare Register 0
  257. COMP1: byte; //Oscillator Compare Register 1
  258. COMP2: byte; //Oscillator Compare Register 2
  259. const
  260. // DFLL Enable
  261. ENABLEbm = $01;
  262. // DFLL Calibration Value A
  263. CALL0bm = $01;
  264. CALL1bm = $02;
  265. CALL2bm = $04;
  266. CALL3bm = $08;
  267. CALL4bm = $10;
  268. CALL5bm = $20;
  269. CALL6bm = $40;
  270. // DFLL Calibration Value B
  271. CALH0bm = $01;
  272. CALH1bm = $02;
  273. CALH2bm = $04;
  274. CALH3bm = $08;
  275. CALH4bm = $10;
  276. CALH5bm = $20;
  277. end;
  278. TRST = object //Reset
  279. STATUS: byte; //Status Register
  280. CTRL: byte; //Control Register
  281. const
  282. // Spike Detection Reset Flag
  283. SDRFbm = $40;
  284. // Software Reset Flag
  285. SRFbm = $20;
  286. // Programming and Debug Interface Interface Reset Flag
  287. PDIRFbm = $10;
  288. // Watchdog Reset Flag
  289. WDRFbm = $08;
  290. // Brown-out Reset Flag
  291. BORFbm = $04;
  292. // External Reset Flag
  293. EXTRFbm = $02;
  294. // Power-on Reset Flag
  295. PORFbm = $01;
  296. // Software Reset
  297. SWRSTbm = $01;
  298. end;
  299. TWDT = object //Watch-Dog Timer
  300. CTRL: byte; //Control
  301. WINCTRL: byte; //Windowed Mode Control
  302. STATUS: byte; //Status
  303. const
  304. // WDT_PER
  305. PERmask = $3C;
  306. PER_8CLK = $00;
  307. PER_16CLK = $04;
  308. PER_32CLK = $08;
  309. PER_64CLK = $0C;
  310. PER_128CLK = $10;
  311. PER_256CLK = $14;
  312. PER_512CLK = $18;
  313. PER_1KCLK = $1C;
  314. PER_2KCLK = $20;
  315. PER_4KCLK = $24;
  316. PER_8KCLK = $28;
  317. // Enable
  318. ENABLEbm = $02;
  319. // Change Enable
  320. CENbm = $01;
  321. // WDT_WPER
  322. WPERmask = $3C;
  323. WPER_8CLK = $00;
  324. WPER_16CLK = $04;
  325. WPER_32CLK = $08;
  326. WPER_64CLK = $0C;
  327. WPER_128CLK = $10;
  328. WPER_256CLK = $14;
  329. WPER_512CLK = $18;
  330. WPER_1KCLK = $1C;
  331. WPER_2KCLK = $20;
  332. WPER_4KCLK = $24;
  333. WPER_8KCLK = $28;
  334. // Windowed Mode Enable
  335. WENbm = $02;
  336. // Windowed Mode Change Enable
  337. WCENbm = $01;
  338. // Synchronization busy
  339. SYNCBUSYbm = $01;
  340. end;
  341. TMCU = object //MCU Control
  342. DEVID0: byte; //Device ID byte 0
  343. DEVID1: byte; //Device ID byte 1
  344. DEVID2: byte; //Device ID byte 2
  345. REVID: byte; //Revision ID
  346. Reserved4: byte;
  347. Reserved5: byte;
  348. Reserved6: byte;
  349. ANAINIT: byte; //Analog Startup Delay
  350. EVSYSLOCK: byte; //Event System Lock
  351. AWEXLOCK: byte; //AWEX Lock
  352. const
  353. // Analog startup delay Port A
  354. STARTUPDLYA0bm = $01;
  355. STARTUPDLYA1bm = $02;
  356. // Event Channel 0-3 Lock
  357. EVSYS0LOCKbm = $01;
  358. // AWeX on T/C C0 Lock
  359. AWEXCLOCKbm = $01;
  360. end;
  361. TPMIC = object //Programmable Multi-level Interrupt Controller
  362. STATUS: byte; //Status Register
  363. INTPRI: byte; //Interrupt Priority
  364. CTRL: byte; //Control Register
  365. const
  366. // Non-maskable Interrupt Executing
  367. NMIEXbm = $80;
  368. // High Level Interrupt Executing
  369. HILVLEXbm = $04;
  370. // Medium Level Interrupt Executing
  371. MEDLVLEXbm = $02;
  372. // Low Level Interrupt Executing
  373. LOLVLEXbm = $01;
  374. // Round-Robin Priority Enable
  375. RRENbm = $80;
  376. // Interrupt Vector Select
  377. IVSELbm = $40;
  378. // High Level Enable
  379. HILVLENbm = $04;
  380. // Medium Level Enable
  381. MEDLVLENbm = $02;
  382. // Low Level Enable
  383. LOLVLENbm = $01;
  384. end;
  385. TPORTCFG = object //I/O port Configuration
  386. MPCMASK: byte; //Multi-pin Configuration Mask
  387. Reserved1: byte;
  388. VPCTRLA: byte; //Virtual Port Control Register A
  389. VPCTRLB: byte; //Virtual Port Control Register B
  390. CLKEVOUT: byte; //Clock and Event Out Register
  391. Reserved5: byte;
  392. EVOUTSEL: byte; //Event Output Select
  393. const
  394. // VP1MAP
  395. VP1MAPmask = $F0;
  396. VP1MAPPORTA = $00;
  397. VP1MAPPORTB = $10;
  398. VP1MAPPORTC = $20;
  399. VP1MAPPORTD = $30;
  400. VP1MAPPORTE = $40;
  401. VP1MAPPORTF = $50;
  402. VP1MAPPORTG = $60;
  403. VP1MAPPORTH = $70;
  404. VP1MAPPORTJ = $80;
  405. VP1MAPPORTK = $90;
  406. VP1MAPPORTL = $A0;
  407. VP1MAPPORTM = $B0;
  408. VP1MAPPORTN = $C0;
  409. VP1MAPPORTP = $D0;
  410. VP1MAPPORTQ = $E0;
  411. VP1MAPPORTR = $F0;
  412. // VP0MAP
  413. VP0MAPmask = $0F;
  414. VP0MAPPORTA = $00;
  415. VP0MAPPORTB = $01;
  416. VP0MAPPORTC = $02;
  417. VP0MAPPORTD = $03;
  418. VP0MAPPORTE = $04;
  419. VP0MAPPORTF = $05;
  420. VP0MAPPORTG = $06;
  421. VP0MAPPORTH = $07;
  422. VP0MAPPORTJ = $08;
  423. VP0MAPPORTK = $09;
  424. VP0MAPPORTL = $0A;
  425. VP0MAPPORTM = $0B;
  426. VP0MAPPORTN = $0C;
  427. VP0MAPPORTP = $0D;
  428. VP0MAPPORTQ = $0E;
  429. VP0MAPPORTR = $0F;
  430. // VP3MAP
  431. VP3MAPmask = $F0;
  432. VP3MAPPORTA = $00;
  433. VP3MAPPORTB = $10;
  434. VP3MAPPORTC = $20;
  435. VP3MAPPORTD = $30;
  436. VP3MAPPORTE = $40;
  437. VP3MAPPORTF = $50;
  438. VP3MAPPORTG = $60;
  439. VP3MAPPORTH = $70;
  440. VP3MAPPORTJ = $80;
  441. VP3MAPPORTK = $90;
  442. VP3MAPPORTL = $A0;
  443. VP3MAPPORTM = $B0;
  444. VP3MAPPORTN = $C0;
  445. VP3MAPPORTP = $D0;
  446. VP3MAPPORTQ = $E0;
  447. VP3MAPPORTR = $F0;
  448. // VP2MAP
  449. VP2MAPmask = $0F;
  450. VP2MAPPORTA = $00;
  451. VP2MAPPORTB = $01;
  452. VP2MAPPORTC = $02;
  453. VP2MAPPORTD = $03;
  454. VP2MAPPORTE = $04;
  455. VP2MAPPORTF = $05;
  456. VP2MAPPORTG = $06;
  457. VP2MAPPORTH = $07;
  458. VP2MAPPORTJ = $08;
  459. VP2MAPPORTK = $09;
  460. VP2MAPPORTL = $0A;
  461. VP2MAPPORTM = $0B;
  462. VP2MAPPORTN = $0C;
  463. VP2MAPPORTP = $0D;
  464. VP2MAPPORTQ = $0E;
  465. VP2MAPPORTR = $0F;
  466. // PORTCFG_CLKOUT
  467. CLKOUTmask = $03;
  468. CLKOUT_OFF = $00;
  469. CLKOUT_PC7 = $01;
  470. CLKOUT_PD7 = $02;
  471. CLKOUT_PE7 = $03;
  472. // PORTCFG_CLKOUTSEL
  473. CLKOUTSELmask = $0C;
  474. CLKOUTSEL_CLK1X = $00;
  475. CLKOUTSEL_CLK2X = $04;
  476. CLKOUTSEL_CLK4X = $08;
  477. // PORTCFG_EVOUT
  478. EVOUTmask = $30;
  479. EVOUT_OFF = $00;
  480. EVOUT_PC7 = $10;
  481. EVOUT_PD7 = $20;
  482. EVOUT_PE7 = $30;
  483. // RTC Clock Output
  484. RTCOUTbm = $40;
  485. // Peripheral Clock and Event Output pin Select
  486. CLKEVPINbm = $80;
  487. // PORTCFG_EVOUTSEL
  488. EVOUTSELmask = $07;
  489. EVOUTSEL_0 = $00;
  490. EVOUTSEL_1 = $01;
  491. EVOUTSEL_2 = $02;
  492. EVOUTSEL_3 = $03;
  493. end;
  494. TCRC = object //Cyclic Redundancy Checker
  495. CTRL: byte; //Control Register
  496. STATUS: byte; //Status Register
  497. Reserved2: byte;
  498. DATAIN: byte; //Data Input
  499. CHECKSUM0: byte; //Checksum byte 0
  500. CHECKSUM1: byte; //Checksum byte 1
  501. CHECKSUM2: byte; //Checksum byte 2
  502. CHECKSUM3: byte; //Checksum byte 3
  503. const
  504. // CRC_RESET
  505. RESETmask = $C0;
  506. RESET_NO = $00;
  507. RESET_RESET0 = $80;
  508. RESET_RESET1 = $C0;
  509. // CRC Mode
  510. CRC32bm = $20;
  511. // CRC_SOURCE
  512. SOURCEmask = $0F;
  513. SOURCE_DISABLE = $00;
  514. SOURCE_IO = $01;
  515. SOURCE_FLASH = $02;
  516. // Zero detection
  517. ZERObm = $02;
  518. // Busy
  519. BUSYbm = $01;
  520. end;
  521. TEVSYS = object //Event System
  522. CH0MUX: byte; //Event Channel 0 Multiplexer
  523. CH1MUX: byte; //Event Channel 1 Multiplexer
  524. CH2MUX: byte; //Event Channel 2 Multiplexer
  525. CH3MUX: byte; //Event Channel 3 Multiplexer
  526. Reserved4: byte;
  527. Reserved5: byte;
  528. Reserved6: byte;
  529. Reserved7: byte;
  530. CH0CTRL: byte; //Channel 0 Control Register
  531. CH1CTRL: byte; //Channel 1 Control Register
  532. CH2CTRL: byte; //Channel 2 Control Register
  533. CH3CTRL: byte; //Channel 3 Control Register
  534. Reserved12: byte;
  535. Reserved13: byte;
  536. Reserved14: byte;
  537. Reserved15: byte;
  538. STROBE: byte; //Event Strobe
  539. DATA: byte; //Event Data
  540. const
  541. // EVSYS_CHMUX
  542. CHMUXmask = $FF;
  543. CHMUX_OFF = $00;
  544. CHMUX_RTC_OVF = $08;
  545. CHMUX_RTC_CMP = $09;
  546. CHMUX_USB = $0A;
  547. CHMUX_ACA_CH0 = $10;
  548. CHMUX_ACA_CH1 = $11;
  549. CHMUX_ACA_WIN = $12;
  550. CHMUX_ADCA_CH0 = $20;
  551. CHMUX_PORTA_PIN0 = $50;
  552. CHMUX_PORTA_PIN1 = $51;
  553. CHMUX_PORTA_PIN2 = $52;
  554. CHMUX_PORTA_PIN3 = $53;
  555. CHMUX_PORTA_PIN4 = $54;
  556. CHMUX_PORTA_PIN5 = $55;
  557. CHMUX_PORTA_PIN6 = $56;
  558. CHMUX_PORTA_PIN7 = $57;
  559. CHMUX_PORTB_PIN0 = $58;
  560. CHMUX_PORTB_PIN1 = $59;
  561. CHMUX_PORTB_PIN2 = $5A;
  562. CHMUX_PORTB_PIN3 = $5B;
  563. CHMUX_PORTB_PIN4 = $5C;
  564. CHMUX_PORTB_PIN5 = $5D;
  565. CHMUX_PORTB_PIN6 = $5E;
  566. CHMUX_PORTB_PIN7 = $5F;
  567. CHMUX_PORTC_PIN0 = $60;
  568. CHMUX_PORTC_PIN1 = $61;
  569. CHMUX_PORTC_PIN2 = $62;
  570. CHMUX_PORTC_PIN3 = $63;
  571. CHMUX_PORTC_PIN4 = $64;
  572. CHMUX_PORTC_PIN5 = $65;
  573. CHMUX_PORTC_PIN6 = $66;
  574. CHMUX_PORTC_PIN7 = $67;
  575. CHMUX_PORTD_PIN0 = $68;
  576. CHMUX_PORTD_PIN1 = $69;
  577. CHMUX_PORTD_PIN2 = $6A;
  578. CHMUX_PORTD_PIN3 = $6B;
  579. CHMUX_PORTD_PIN4 = $6C;
  580. CHMUX_PORTD_PIN5 = $6D;
  581. CHMUX_PORTD_PIN6 = $6E;
  582. CHMUX_PORTD_PIN7 = $6F;
  583. CHMUX_PORTE_PIN0 = $70;
  584. CHMUX_PORTE_PIN1 = $71;
  585. CHMUX_PORTE_PIN2 = $72;
  586. CHMUX_PORTE_PIN3 = $73;
  587. CHMUX_PORTE_PIN4 = $74;
  588. CHMUX_PORTE_PIN5 = $75;
  589. CHMUX_PORTE_PIN6 = $76;
  590. CHMUX_PORTE_PIN7 = $77;
  591. CHMUX_PORTF_PIN0 = $78;
  592. CHMUX_PORTF_PIN1 = $79;
  593. CHMUX_PORTF_PIN2 = $7A;
  594. CHMUX_PORTF_PIN3 = $7B;
  595. CHMUX_PORTF_PIN4 = $7C;
  596. CHMUX_PORTF_PIN5 = $7D;
  597. CHMUX_PORTF_PIN6 = $7E;
  598. CHMUX_PORTF_PIN7 = $7F;
  599. CHMUX_PRESCALER_1 = $80;
  600. CHMUX_PRESCALER_2 = $81;
  601. CHMUX_PRESCALER_4 = $82;
  602. CHMUX_PRESCALER_8 = $83;
  603. CHMUX_PRESCALER_16 = $84;
  604. CHMUX_PRESCALER_32 = $85;
  605. CHMUX_PRESCALER_64 = $86;
  606. CHMUX_PRESCALER_128 = $87;
  607. CHMUX_PRESCALER_256 = $88;
  608. CHMUX_PRESCALER_512 = $89;
  609. CHMUX_PRESCALER_1024 = $8A;
  610. CHMUX_PRESCALER_2048 = $8B;
  611. CHMUX_PRESCALER_4096 = $8C;
  612. CHMUX_PRESCALER_8192 = $8D;
  613. CHMUX_PRESCALER_16384 = $8E;
  614. CHMUX_PRESCALER_32768 = $8F;
  615. CHMUX_TCC0_OVF = $C0;
  616. CHMUX_TCC0_ERR = $C1;
  617. CHMUX_TCC0_CCA = $C4;
  618. CHMUX_TCC0_CCB = $C5;
  619. CHMUX_TCC0_CCC = $C6;
  620. CHMUX_TCC0_CCD = $C7;
  621. CHMUX_TCC1_OVF = $C8;
  622. CHMUX_TCC1_ERR = $C9;
  623. CHMUX_TCC1_CCA = $CC;
  624. CHMUX_TCC1_CCB = $CD;
  625. CHMUX_TCD0_OVF = $D0;
  626. CHMUX_TCD0_ERR = $D1;
  627. CHMUX_TCD0_CCA = $D4;
  628. CHMUX_TCD0_CCB = $D5;
  629. CHMUX_TCD0_CCC = $D6;
  630. CHMUX_TCD0_CCD = $D7;
  631. CHMUX_TCE0_OVF = $E0;
  632. CHMUX_TCE0_ERR = $E1;
  633. CHMUX_TCE0_CCA = $E4;
  634. CHMUX_TCE0_CCB = $E5;
  635. CHMUX_TCE0_CCC = $E6;
  636. CHMUX_TCE0_CCD = $E7;
  637. CHMUX_TCF0_OVF = $F0;
  638. CHMUX_TCF0_ERR = $F1;
  639. CHMUX_TCF0_CCA = $F4;
  640. CHMUX_TCF0_CCB = $F5;
  641. CHMUX_TCF0_CCC = $F6;
  642. CHMUX_TCF0_CCD = $F7;
  643. // EVSYS_QDIRM
  644. QDIRMmask = $60;
  645. QDIRM_00 = $00;
  646. QDIRM_01 = $20;
  647. QDIRM_10 = $40;
  648. QDIRM_11 = $60;
  649. // Quadrature Decoder Index Enable
  650. QDIENbm = $10;
  651. // Quadrature Decoder Enable
  652. QDENbm = $08;
  653. // EVSYS_DIGFILT
  654. DIGFILTmask = $07;
  655. DIGFILT_1SAMPLE = $00;
  656. DIGFILT_2SAMPLES = $01;
  657. DIGFILT_3SAMPLES = $02;
  658. DIGFILT_4SAMPLES = $03;
  659. DIGFILT_5SAMPLES = $04;
  660. DIGFILT_6SAMPLES = $05;
  661. DIGFILT_7SAMPLES = $06;
  662. DIGFILT_8SAMPLES = $07;
  663. end;
  664. TNVM = object //Non-volatile Memory Controller
  665. ADDR0: byte; //Address Register 0
  666. ADDR1: byte; //Address Register 1
  667. ADDR2: byte; //Address Register 2
  668. Reserved3: byte;
  669. DATA0: byte; //Data Register 0
  670. DATA1: byte; //Data Register 1
  671. DATA2: byte; //Data Register 2
  672. Reserved7: byte;
  673. Reserved8: byte;
  674. Reserved9: byte;
  675. CMD: byte; //Command
  676. CTRLA: byte; //Control Register A
  677. CTRLB: byte; //Control Register B
  678. INTCTRL: byte; //Interrupt Control
  679. Reserved14: byte;
  680. STATUS: byte; //Status
  681. LOCKBITS: byte; //Lock Bits
  682. const
  683. // NVM_CMD
  684. CMDmask = $7F;
  685. CMD_NO_OPERATION = $00;
  686. CMD_READ_USER_SIG_ROW = $01;
  687. CMD_READ_CALIB_ROW = $02;
  688. CMD_READ_EEPROM = $06;
  689. CMD_READ_FUSES = $07;
  690. CMD_WRITE_LOCK_BITS = $08;
  691. CMD_ERASE_USER_SIG_ROW = $18;
  692. CMD_WRITE_USER_SIG_ROW = $1A;
  693. CMD_ERASE_APP = $20;
  694. CMD_ERASE_APP_PAGE = $22;
  695. CMD_LOAD_FLASH_BUFFER = $23;
  696. CMD_WRITE_APP_PAGE = $24;
  697. CMD_ERASE_WRITE_APP_PAGE = $25;
  698. CMD_ERASE_FLASH_BUFFER = $26;
  699. CMD_ERASE_BOOT_PAGE = $2A;
  700. CMD_ERASE_FLASH_PAGE = $2B;
  701. CMD_WRITE_BOOT_PAGE = $2C;
  702. CMD_ERASE_WRITE_BOOT_PAGE = $2D;
  703. CMD_WRITE_FLASH_PAGE = $2E;
  704. CMD_ERASE_WRITE_FLASH_PAGE = $2F;
  705. CMD_ERASE_EEPROM = $30;
  706. CMD_ERASE_EEPROM_PAGE = $32;
  707. CMD_LOAD_EEPROM_BUFFER = $33;
  708. CMD_WRITE_EEPROM_PAGE = $34;
  709. CMD_ERASE_WRITE_EEPROM_PAGE = $35;
  710. CMD_ERASE_EEPROM_BUFFER = $36;
  711. CMD_APP_CRC = $38;
  712. CMD_BOOT_CRC = $39;
  713. CMD_FLASH_RANGE_CRC = $3A;
  714. CMD_CHIP_ERASE = $40;
  715. CMD_READ_NVM = $43;
  716. CMD_WRITE_FUSE = $4C;
  717. CMD_ERASE_BOOT = $68;
  718. CMD_FLASH_CRC = $78;
  719. // Command Execute
  720. CMDEXbm = $01;
  721. // EEPROM Mapping Enable
  722. EEMAPENbm = $08;
  723. // Flash Power Reduction Enable
  724. FPRMbm = $04;
  725. // EEPROM Power Reduction Enable
  726. EPRMbm = $02;
  727. // SPM Lock
  728. SPMLOCKbm = $01;
  729. // NVM_SPMLVL
  730. SPMLVLmask = $0C;
  731. SPMLVL_OFF = $00;
  732. SPMLVL_LO = $04;
  733. SPMLVL_MED = $08;
  734. SPMLVL_HI = $0C;
  735. // NVM_EELVL
  736. EELVLmask = $03;
  737. EELVL_OFF = $00;
  738. EELVL_LO = $01;
  739. EELVL_MED = $02;
  740. EELVL_HI = $03;
  741. // Non-volatile Memory Busy
  742. NVMBUSYbm = $80;
  743. // Flash Memory Busy
  744. FBUSYbm = $40;
  745. // EEPROM Page Buffer Active Loading
  746. EELOADbm = $02;
  747. // Flash Page Buffer Active Loading
  748. FLOADbm = $01;
  749. // NVM_BLBB
  750. BLBBmask = $C0;
  751. BLBB_RWLOCK = $00;
  752. BLBB_RLOCK = $40;
  753. BLBB_WLOCK = $80;
  754. BLBB_NOLOCK = $C0;
  755. // NVM_BLBA
  756. BLBAmask = $30;
  757. BLBA_RWLOCK = $00;
  758. BLBA_RLOCK = $10;
  759. BLBA_WLOCK = $20;
  760. BLBA_NOLOCK = $30;
  761. // NVM_BLBAT
  762. BLBATmask = $0C;
  763. BLBAT_RWLOCK = $00;
  764. BLBAT_RLOCK = $04;
  765. BLBAT_WLOCK = $08;
  766. BLBAT_NOLOCK = $0C;
  767. // NVM_LB
  768. LBmask = $03;
  769. LB_RWLOCK = $00;
  770. LB_WLOCK = $02;
  771. LB_NOLOCK = $03;
  772. end;
  773. TADC_CH = object //ADC Channel
  774. CTRL: byte; //Control Register
  775. MUXCTRL: byte; //MUX Control
  776. INTCTRL: byte; //Channel Interrupt Control Register
  777. INTFLAGS: byte; //Interrupt Flags
  778. RES: word; //Channel Result
  779. SCAN: byte; //Input Channel Scan
  780. const
  781. // Channel Start Conversion
  782. STARTbm = $80;
  783. // GAIN
  784. GAINmask = $1C;
  785. GAIN1X = $00;
  786. GAIN2X = $04;
  787. GAIN4X = $08;
  788. GAIN8X = $0C;
  789. GAIN16X = $10;
  790. GAIN32X = $14;
  791. GAIN64X = $18;
  792. GAINDIV2 = $1C;
  793. // INPUTMODE
  794. INPUTMODEmask = $03;
  795. INPUTMODEINTERNAL = $00;
  796. INPUTMODESINGLEENDED = $01;
  797. INPUTMODEDIFF = $02;
  798. INPUTMODEDIFFWGAIN = $03;
  799. // MUXPOS
  800. MUXPOSmask = $78;
  801. MUXPOSPIN0 = $00;
  802. MUXPOSPIN1 = $08;
  803. MUXPOSPIN2 = $10;
  804. MUXPOSPIN3 = $18;
  805. MUXPOSPIN4 = $20;
  806. MUXPOSPIN5 = $28;
  807. MUXPOSPIN6 = $30;
  808. MUXPOSPIN7 = $38;
  809. MUXPOSPIN8 = $40;
  810. MUXPOSPIN9 = $48;
  811. MUXPOSPIN10 = $50;
  812. MUXPOSPIN11 = $58;
  813. MUXPOSPIN12 = $60;
  814. MUXPOSPIN13 = $68;
  815. MUXPOSPIN14 = $70;
  816. MUXPOSPIN15 = $78;
  817. // MUXINT
  818. MUXINTmask = $78;
  819. MUXINTTEMP = $00;
  820. MUXINTBANDGAP = $08;
  821. MUXINTSCALEDVCC = $10;
  822. // MUXNEG
  823. MUXNEGmask = $07;
  824. MUXNEGPIN0 = $00;
  825. MUXNEGPIN1 = $01;
  826. MUXNEGPIN2 = $02;
  827. MUXNEGPIN3 = $03;
  828. MUXNEGPIN4 = $00;
  829. MUXNEGPIN5 = $01;
  830. MUXNEGPIN6 = $02;
  831. MUXNEGPIN7 = $03;
  832. MUXNEGGND_MODE3 = $05;
  833. MUXNEGINTGND_MODE3 = $07;
  834. MUXNEGINTGND_MODE4 = $04;
  835. MUXNEGGND_MODE4 = $07;
  836. // INTMODE
  837. INTMODEmask = $0C;
  838. INTMODECOMPLETE = $00;
  839. INTMODEBELOW = $04;
  840. INTMODEABOVE = $0C;
  841. // INTLVL
  842. INTLVLmask = $03;
  843. INTLVLOFF = $00;
  844. INTLVLLO = $01;
  845. INTLVLMED = $02;
  846. INTLVLHI = $03;
  847. // Channel Interrupt Flag
  848. CHIFbm = $01;
  849. // Positive MUX setting offset
  850. OFFSET0bm = $10;
  851. OFFSET1bm = $20;
  852. OFFSET2bm = $40;
  853. OFFSET3bm = $80;
  854. // Number of Channels included in scan
  855. SCANNUM0bm = $01;
  856. SCANNUM1bm = $02;
  857. SCANNUM2bm = $04;
  858. SCANNUM3bm = $08;
  859. // Number of Channels included in scan
  860. COUNT0bm = $01;
  861. COUNT1bm = $02;
  862. COUNT2bm = $04;
  863. COUNT3bm = $08;
  864. end;
  865. TADC = object //Analog-to-Digital Converter
  866. CTRLA: byte; //Control Register A
  867. CTRLB: byte; //Control Register B
  868. REFCTRL: byte; //Reference Control
  869. EVCTRL: byte; //Event Control
  870. PRESCALER: byte; //Clock Prescaler
  871. Reserved5: byte;
  872. INTFLAGS: byte; //Interrupt Flags
  873. TEMP: byte; //Temporary Register
  874. SAMPCTRL: byte; //Sampling Time Control Register
  875. Reserved9: byte;
  876. Reserved10: byte;
  877. Reserved11: byte;
  878. CAL: word; //Calibration Value
  879. Reserved14: byte;
  880. Reserved15: byte;
  881. CH0RES: word; //Channel 0 Result
  882. Reserved18: byte;
  883. Reserved19: byte;
  884. Reserved20: byte;
  885. Reserved21: byte;
  886. Reserved22: byte;
  887. Reserved23: byte;
  888. CMP: word; //Compare Value
  889. Reserved26: byte;
  890. Reserved27: byte;
  891. Reserved28: byte;
  892. Reserved29: byte;
  893. Reserved30: byte;
  894. Reserved31: byte;
  895. CH0: TADC_CH; //ADC Channel 0
  896. const
  897. // Channel 0 Start Conversion
  898. CH0STARTbm = $04;
  899. // ADC Flush
  900. FLUSHbm = $02;
  901. // Enable ADC
  902. ENABLEbm = $01;
  903. // ADC_CURRLIMIT
  904. CURRLIMITmask = $60;
  905. CURRLIMIT_NO = $00;
  906. CURRLIMIT_LOW = $20;
  907. CURRLIMIT_MED = $40;
  908. CURRLIMIT_HIGH = $60;
  909. // Conversion Mode
  910. CONMODEbm = $10;
  911. // Free Running Mode Enable
  912. FREERUNbm = $08;
  913. // ADC_RESOLUTION
  914. RESOLUTIONmask = $06;
  915. RESOLUTION_12BIT = $00;
  916. RESOLUTION_8BIT = $04;
  917. RESOLUTION_LEFT12BIT = $06;
  918. // ADC_REFSEL
  919. REFSELmask = $70;
  920. REFSEL_INT1V = $00;
  921. REFSEL_INTVCC = $10;
  922. REFSEL_AREFA = $20;
  923. REFSEL_AREFB = $30;
  924. REFSEL_INTVCC2 = $40;
  925. // Bandgap enable
  926. BANDGAPbm = $02;
  927. // Temperature Reference Enable
  928. TEMPREFbm = $01;
  929. // ADC_EVSEL
  930. EVSELmask = $18;
  931. EVSEL_0 = $00;
  932. EVSEL_1 = $08;
  933. EVSEL_2 = $10;
  934. EVSEL_3 = $18;
  935. // ADC_EVACT
  936. EVACTmask = $07;
  937. EVACT_NONE = $00;
  938. EVACT_CH0 = $01;
  939. EVACT_SYNCSWEEP = $06;
  940. // ADC_PRESCALER
  941. PRESCALERmask = $07;
  942. PRESCALER_DIV4 = $00;
  943. PRESCALER_DIV8 = $01;
  944. PRESCALER_DIV16 = $02;
  945. PRESCALER_DIV32 = $03;
  946. PRESCALER_DIV64 = $04;
  947. PRESCALER_DIV128 = $05;
  948. PRESCALER_DIV256 = $06;
  949. PRESCALER_DIV512 = $07;
  950. // Channel 0 Interrupt Flag
  951. CH0IFbm = $01;
  952. // Sampling Time Control
  953. SAMPVAL0bm = $01;
  954. SAMPVAL1bm = $02;
  955. SAMPVAL2bm = $04;
  956. SAMPVAL3bm = $08;
  957. SAMPVAL4bm = $10;
  958. SAMPVAL5bm = $20;
  959. end;
  960. TAC = object //Analog Comparator
  961. AC0CTRL: byte; //Analog Comparator 0 Control
  962. AC1CTRL: byte; //Analog Comparator 1 Control
  963. AC0MUXCTRL: byte; //Analog Comparator 0 MUX Control
  964. AC1MUXCTRL: byte; //Analog Comparator 1 MUX Control
  965. CTRLA: byte; //Control Register A
  966. CTRLB: byte; //Control Register B
  967. WINCTRL: byte; //Window Mode Control
  968. STATUS: byte; //Status
  969. const
  970. // AC_INTMODE
  971. INTMODEmask = $C0;
  972. INTMODE_BOTHEDGES = $00;
  973. INTMODE_FALLING = $80;
  974. INTMODE_RISING = $C0;
  975. // AC_INTLVL
  976. INTLVLmask = $30;
  977. INTLVL_OFF = $00;
  978. INTLVL_LO = $10;
  979. INTLVL_MED = $20;
  980. INTLVL_HI = $30;
  981. // AC_HYSMODE
  982. HYSMODEmask = $06;
  983. HYSMODE_NO = $00;
  984. HYSMODE_SMALL = $02;
  985. HYSMODE_LARGE = $04;
  986. // Enable
  987. ENABLEbm = $01;
  988. // AC_MUXPOS
  989. MUXPOSmask = $38;
  990. MUXPOS_PIN0 = $00;
  991. MUXPOS_PIN1 = $08;
  992. MUXPOS_PIN2 = $10;
  993. MUXPOS_PIN3 = $18;
  994. MUXPOS_PIN4 = $20;
  995. MUXPOS_PIN5 = $28;
  996. MUXPOS_PIN6 = $30;
  997. // AC_MUXNEG
  998. MUXNEGmask = $07;
  999. MUXNEG_PIN0 = $00;
  1000. MUXNEG_PIN1 = $01;
  1001. MUXNEG_PIN3 = $02;
  1002. MUXNEG_PIN5 = $03;
  1003. MUXNEG_PIN7 = $04;
  1004. MUXNEG_BANDGAP = $06;
  1005. MUXNEG_SCALER = $07;
  1006. // Analog Comparator 1 Output Enable
  1007. AC1OUTbm = $02;
  1008. // Analog Comparator 0 Output Enable
  1009. AC0OUTbm = $01;
  1010. // VCC Voltage Scaler Factor
  1011. SCALEFAC0bm = $01;
  1012. SCALEFAC1bm = $02;
  1013. SCALEFAC2bm = $04;
  1014. SCALEFAC3bm = $08;
  1015. SCALEFAC4bm = $10;
  1016. SCALEFAC5bm = $20;
  1017. // Window Mode Enable
  1018. WENbm = $10;
  1019. // AC_WINTMODE
  1020. WINTMODEmask = $0C;
  1021. WINTMODE_ABOVE = $00;
  1022. WINTMODE_INSIDE = $04;
  1023. WINTMODE_BELOW = $08;
  1024. WINTMODE_OUTSIDE = $0C;
  1025. // AC_WINTLVL
  1026. WINTLVLmask = $03;
  1027. WINTLVL_OFF = $00;
  1028. WINTLVL_LO = $01;
  1029. WINTLVL_MED = $02;
  1030. WINTLVL_HI = $03;
  1031. // AC_WSTATE
  1032. WSTATEmask = $C0;
  1033. WSTATE_ABOVE = $00;
  1034. WSTATE_INSIDE = $40;
  1035. WSTATE_BELOW = $80;
  1036. // Analog Comparator 1 State
  1037. AC1STATEbm = $20;
  1038. // Analog Comparator 0 State
  1039. AC0STATEbm = $10;
  1040. // Window Mode Interrupt Flag
  1041. WIFbm = $04;
  1042. // Analog Comparator 1 Interrupt Flag
  1043. AC1IFbm = $02;
  1044. // Analog Comparator 0 Interrupt Flag
  1045. AC0IFbm = $01;
  1046. end;
  1047. TRTC = object //Real-Time Counter
  1048. CTRL: byte; //Control Register
  1049. STATUS: byte; //Status Register
  1050. INTCTRL: byte; //Interrupt Control Register
  1051. INTFLAGS: byte; //Interrupt Flags
  1052. TEMP: byte; //Temporary register
  1053. Reserved5: byte;
  1054. Reserved6: byte;
  1055. Reserved7: byte;
  1056. CNT: word; //Count Register
  1057. PER: word; //Period Register
  1058. COMP: word; //Compare Register
  1059. const
  1060. // RTC_PRESCALER
  1061. PRESCALERmask = $07;
  1062. PRESCALER_OFF = $00;
  1063. PRESCALER_DIV1 = $01;
  1064. PRESCALER_DIV2 = $02;
  1065. PRESCALER_DIV8 = $03;
  1066. PRESCALER_DIV16 = $04;
  1067. PRESCALER_DIV64 = $05;
  1068. PRESCALER_DIV256 = $06;
  1069. PRESCALER_DIV1024 = $07;
  1070. // Synchronization Busy Flag
  1071. SYNCBUSYbm = $01;
  1072. // RTC_COMPINTLVL
  1073. COMPINTLVLmask = $0C;
  1074. COMPINTLVL_OFF = $00;
  1075. COMPINTLVL_LO = $04;
  1076. COMPINTLVL_MED = $08;
  1077. COMPINTLVL_HI = $0C;
  1078. // RTC_OVFINTLVL
  1079. OVFINTLVLmask = $03;
  1080. OVFINTLVL_OFF = $00;
  1081. OVFINTLVL_LO = $01;
  1082. OVFINTLVL_MED = $02;
  1083. OVFINTLVL_HI = $03;
  1084. // Compare Match Interrupt Flag
  1085. COMPIFbm = $02;
  1086. // Overflow Interrupt Flag
  1087. OVFIFbm = $01;
  1088. end;
  1089. TTWI_MASTER = object //
  1090. CTRLA: byte; //Control Register A
  1091. CTRLB: byte; //Control Register B
  1092. CTRLC: byte; //Control Register C
  1093. STATUS: byte; //Status Register
  1094. BAUD: byte; //Baud Rate Control Register
  1095. ADDR: byte; //Address Register
  1096. DATA: byte; //Data Register
  1097. const
  1098. // INTLVL
  1099. INTLVLmask = $C0;
  1100. INTLVLOFF = $00;
  1101. INTLVLLO = $40;
  1102. INTLVLMED = $80;
  1103. INTLVLHI = $C0;
  1104. // Read Interrupt Enable
  1105. RIENbm = $20;
  1106. // Write Interrupt Enable
  1107. WIENbm = $10;
  1108. // Enable TWI Master
  1109. ENABLEbm = $08;
  1110. // TIMEOUT
  1111. TIMEOUTmask = $0C;
  1112. TIMEOUTDISABLED = $00;
  1113. TIMEOUT50US = $04;
  1114. TIMEOUT100US = $08;
  1115. TIMEOUT200US = $0C;
  1116. // Quick Command Enable
  1117. QCENbm = $02;
  1118. // Smart Mode Enable
  1119. SMENbm = $01;
  1120. // Acknowledge Action
  1121. ACKACTbm = $04;
  1122. // CMD
  1123. CMDmask = $03;
  1124. CMDNOACT = $00;
  1125. CMDREPSTART = $01;
  1126. CMDRECVTRANS = $02;
  1127. CMDSTOP = $03;
  1128. // Read Interrupt Flag
  1129. RIFbm = $80;
  1130. // Write Interrupt Flag
  1131. WIFbm = $40;
  1132. // Clock Hold
  1133. CLKHOLDbm = $20;
  1134. // Received Acknowledge
  1135. RXACKbm = $10;
  1136. // Arbitration Lost
  1137. ARBLOSTbm = $08;
  1138. // Bus Error
  1139. BUSERRbm = $04;
  1140. // BUSSTATE
  1141. BUSSTATEmask = $03;
  1142. BUSSTATEUNKNOWN = $00;
  1143. BUSSTATEIDLE = $01;
  1144. BUSSTATEOWNER = $02;
  1145. BUSSTATEBUSY = $03;
  1146. end;
  1147. TTWI_SLAVE = object //
  1148. CTRLA: byte; //Control Register A
  1149. CTRLB: byte; //Control Register B
  1150. STATUS: byte; //Status Register
  1151. ADDR: byte; //Address Register
  1152. DATA: byte; //Data Register
  1153. ADDRMASK: byte; //Address Mask Register
  1154. const
  1155. // INTLVL
  1156. INTLVLmask = $C0;
  1157. INTLVLOFF = $00;
  1158. INTLVLLO = $40;
  1159. INTLVLMED = $80;
  1160. INTLVLHI = $C0;
  1161. // Data Interrupt Enable
  1162. DIENbm = $20;
  1163. // Address/Stop Interrupt Enable
  1164. APIENbm = $10;
  1165. // Enable TWI Slave
  1166. ENABLEbm = $08;
  1167. // Stop Interrupt Enable
  1168. PIENbm = $04;
  1169. // Promiscuous Mode Enable
  1170. PMENbm = $02;
  1171. // Smart Mode Enable
  1172. SMENbm = $01;
  1173. // Acknowledge Action
  1174. ACKACTbm = $04;
  1175. // CMD
  1176. CMDmask = $03;
  1177. CMDNOACT = $00;
  1178. CMDCOMPTRANS = $02;
  1179. CMDRESPONSE = $03;
  1180. // Data Interrupt Flag
  1181. DIFbm = $80;
  1182. // Address/Stop Interrupt Flag
  1183. APIFbm = $40;
  1184. // Clock Hold
  1185. CLKHOLDbm = $20;
  1186. // Received Acknowledge
  1187. RXACKbm = $10;
  1188. // Collision
  1189. COLLbm = $08;
  1190. // Bus Error
  1191. BUSERRbm = $04;
  1192. // Read/Write Direction
  1193. DIRbm = $02;
  1194. // Slave Address or Stop
  1195. APbm = $01;
  1196. // Address Mask
  1197. ADDRMASK0bm = $02;
  1198. ADDRMASK1bm = $04;
  1199. ADDRMASK2bm = $08;
  1200. ADDRMASK3bm = $10;
  1201. ADDRMASK4bm = $20;
  1202. ADDRMASK5bm = $40;
  1203. ADDRMASK6bm = $80;
  1204. // Address Enable
  1205. ADDRENbm = $01;
  1206. end;
  1207. TTWI = object //Two-Wire Interface
  1208. CTRL: byte; //TWI Common Control Register
  1209. MASTER: TTWI_MASTER; //TWI master module
  1210. SLAVE: TTWI_SLAVE; //TWI slave module
  1211. const
  1212. // TWI_SDAHOLD
  1213. SDAHOLDmask = $06;
  1214. SDAHOLD_OFF = $00;
  1215. SDAHOLD_50NS = $02;
  1216. SDAHOLD_300NS = $04;
  1217. SDAHOLD_400NS = $06;
  1218. // External Driver Interface Enable
  1219. EDIENbm = $01;
  1220. end;
  1221. TUSB_EP = object //USB Endpoint
  1222. STATUS: byte; //Endpoint Status
  1223. CTRL: byte; //Endpoint Control
  1224. CNT: word; //USB Endpoint Counter
  1225. DATAPTR: word; //Data Pointer
  1226. AUXDATA: word; //Auxiliary Data
  1227. const
  1228. // Endpoint Stall Flag
  1229. STALLFbm = $80;
  1230. // CRC Error Flag
  1231. CRCbm = $80;
  1232. // Underflow Endpoint FLag
  1233. UNFbm = $40;
  1234. // Overflow Endpoint Flag for Output Endpoints
  1235. OVFbm = $40;
  1236. // Transaction Complete 0 Flag
  1237. TRNCOMPL0bm = $20;
  1238. // Transaction Complete 1 Flag
  1239. TRNCOMPL1bm = $10;
  1240. // SETUP Transaction Complete Flag
  1241. SETUPbm = $10;
  1242. // Bank Select
  1243. BANKbm = $08;
  1244. // Data Buffer 1 Not Acknowledge
  1245. BUSNACK1bm = $04;
  1246. // Data Buffer 0 Not Acknowledge
  1247. BUSNACK0bm = $02;
  1248. // Data Toggle
  1249. TOGGLEbm = $01;
  1250. // TYPE
  1251. TYPEmask = $C0;
  1252. TYPEDISABLE = $00;
  1253. TYPECONTROL = $40;
  1254. TYPEBULK = $80;
  1255. TYPEISOCHRONOUS = $C0;
  1256. // Multi Packet Transfer Enable
  1257. MULTIPKTbm = $20;
  1258. // Ping-Pong Enable
  1259. PINGPONGbm = $10;
  1260. // Interrupt Disable
  1261. INTDSBLbm = $08;
  1262. // Data Stall
  1263. STALLbm = $04;
  1264. // BUFSIZE
  1265. BUFSIZEmask = $07;
  1266. BUFSIZE8 = $00;
  1267. BUFSIZE16 = $01;
  1268. BUFSIZE32 = $02;
  1269. BUFSIZE64 = $03;
  1270. BUFSIZE128 = $04;
  1271. BUFSIZE256 = $05;
  1272. BUFSIZE512 = $06;
  1273. BUFSIZE1023 = $07;
  1274. end;
  1275. TUSB = object //Universal Serial Bus
  1276. CTRLA: byte; //Control Register A
  1277. CTRLB: byte; //Control Register B
  1278. STATUS: byte; //Status Register
  1279. ADDR: byte; //Address Register
  1280. FIFOWP: byte; //FIFO Write Pointer Register
  1281. FIFORP: byte; //FIFO Read Pointer Register
  1282. EPPTR: word; //Endpoint Configuration Table Pointer
  1283. INTCTRLA: byte; //Interrupt Control Register A
  1284. INTCTRLB: byte; //Interrupt Control Register B
  1285. INTFLAGSACLR: byte; //Clear Interrupt Flag Register A
  1286. INTFLAGSASET: byte; //Set Interrupt Flag Register A
  1287. INTFLAGSBCLR: byte; //Clear Interrupt Flag Register B
  1288. INTFLAGSBSET: byte; //Set Interrupt Flag Register B
  1289. Reserved14: byte;
  1290. Reserved15: byte;
  1291. Reserved16: byte;
  1292. Reserved17: byte;
  1293. Reserved18: byte;
  1294. Reserved19: byte;
  1295. Reserved20: byte;
  1296. Reserved21: byte;
  1297. Reserved22: byte;
  1298. Reserved23: byte;
  1299. Reserved24: byte;
  1300. Reserved25: byte;
  1301. Reserved26: byte;
  1302. Reserved27: byte;
  1303. Reserved28: byte;
  1304. Reserved29: byte;
  1305. Reserved30: byte;
  1306. Reserved31: byte;
  1307. Reserved32: byte;
  1308. Reserved33: byte;
  1309. Reserved34: byte;
  1310. Reserved35: byte;
  1311. Reserved36: byte;
  1312. Reserved37: byte;
  1313. Reserved38: byte;
  1314. Reserved39: byte;
  1315. Reserved40: byte;
  1316. Reserved41: byte;
  1317. Reserved42: byte;
  1318. Reserved43: byte;
  1319. Reserved44: byte;
  1320. Reserved45: byte;
  1321. Reserved46: byte;
  1322. Reserved47: byte;
  1323. Reserved48: byte;
  1324. Reserved49: byte;
  1325. Reserved50: byte;
  1326. Reserved51: byte;
  1327. Reserved52: byte;
  1328. Reserved53: byte;
  1329. Reserved54: byte;
  1330. Reserved55: byte;
  1331. Reserved56: byte;
  1332. Reserved57: byte;
  1333. CAL0: byte; //Calibration Byte 0
  1334. CAL1: byte; //Calibration Byte 1
  1335. const
  1336. // USB Enable
  1337. ENABLEbm = $80;
  1338. // Speed Select
  1339. SPEEDbm = $40;
  1340. // USB FIFO Enable
  1341. FIFOENbm = $20;
  1342. // Store Frame Number Enable
  1343. STFRNUMbm = $10;
  1344. // Maximum Endpoint Addresses
  1345. MAXEP0bm = $01;
  1346. MAXEP1bm = $02;
  1347. MAXEP2bm = $04;
  1348. MAXEP3bm = $08;
  1349. // Pull during Reset
  1350. PULLRSTbm = $10;
  1351. // Remote Wake-up
  1352. RWAKEUPbm = $04;
  1353. // Global NACK
  1354. GNACKbm = $02;
  1355. // Attach
  1356. ATTACHbm = $01;
  1357. // Upstream Resume
  1358. URESUMEbm = $08;
  1359. // Resume
  1360. RESUMEbm = $04;
  1361. // Bus Suspended
  1362. SUSPENDbm = $02;
  1363. // Bus Reset
  1364. BUSRSTbm = $01;
  1365. // Device Address
  1366. ADDR0bm = $01;
  1367. ADDR1bm = $02;
  1368. ADDR2bm = $04;
  1369. ADDR3bm = $08;
  1370. ADDR4bm = $10;
  1371. ADDR5bm = $20;
  1372. ADDR6bm = $40;
  1373. // FIFO Write Pointer
  1374. FIFOWP0bm = $01;
  1375. FIFOWP1bm = $02;
  1376. FIFOWP2bm = $04;
  1377. FIFOWP3bm = $08;
  1378. FIFOWP4bm = $10;
  1379. // FIFO Read Pointer
  1380. FIFORP0bm = $01;
  1381. FIFORP1bm = $02;
  1382. FIFORP2bm = $04;
  1383. FIFORP3bm = $08;
  1384. FIFORP4bm = $10;
  1385. // Start Of Frame Interrupt Enable
  1386. SOFIEbm = $80;
  1387. // Bus Event Interrupt Enable
  1388. BUSEVIEbm = $40;
  1389. // Bus Error Interrupt Enable
  1390. BUSERRIEbm = $20;
  1391. // STALL Interrupt Enable
  1392. STALLIEbm = $10;
  1393. // USB_INTLVL
  1394. INTLVLmask = $03;
  1395. INTLVL_OFF = $00;
  1396. INTLVL_LO = $01;
  1397. INTLVL_MED = $02;
  1398. INTLVL_HI = $03;
  1399. // Transaction Complete Interrupt Enable
  1400. TRNIEbm = $02;
  1401. // SETUP Transaction Complete Interrupt Enable
  1402. SETUPIEbm = $01;
  1403. // Start Of Frame Interrupt Flag
  1404. SOFIFbm = $80;
  1405. // Suspend Interrupt Flag
  1406. SUSPENDIFbm = $40;
  1407. // Resume Interrupt Flag
  1408. RESUMEIFbm = $20;
  1409. // Reset Interrupt Flag
  1410. RSTIFbm = $10;
  1411. // Isochronous CRC Error Interrupt Flag
  1412. CRCIFbm = $08;
  1413. // Underflow Interrupt Flag
  1414. UNFIFbm = $04;
  1415. // Overflow Interrupt Flag
  1416. OVFIFbm = $02;
  1417. // STALL Interrupt Flag
  1418. STALLIFbm = $01;
  1419. // Transaction Complete Interrupt Flag
  1420. TRNIFbm = $02;
  1421. // SETUP Transaction Complete Interrupt Flag
  1422. SETUPIFbm = $01;
  1423. end;
  1424. TUSB_EP_TABLE = object //USB Endpoint Table
  1425. EP0OUT: TUSB_EP; //Endpoint 0
  1426. EP0IN: TUSB_EP; //Endpoint 0
  1427. EP1OUT: TUSB_EP; //Endpoint 1
  1428. EP1IN: TUSB_EP; //Endpoint 1
  1429. EP2OUT: TUSB_EP; //Endpoint 2
  1430. EP2IN: TUSB_EP; //Endpoint 2
  1431. EP3OUT: TUSB_EP; //Endpoint 3
  1432. EP3IN: TUSB_EP; //Endpoint 3
  1433. EP4OUT: TUSB_EP; //Endpoint 4
  1434. EP4IN: TUSB_EP; //Endpoint 4
  1435. EP5OUT: TUSB_EP; //Endpoint 5
  1436. EP5IN: TUSB_EP; //Endpoint 5
  1437. EP6OUT: TUSB_EP; //Endpoint 6
  1438. EP6IN: TUSB_EP; //Endpoint 6
  1439. EP7OUT: TUSB_EP; //Endpoint 7
  1440. EP7IN: TUSB_EP; //Endpoint 7
  1441. EP8OUT: TUSB_EP; //Endpoint 8
  1442. EP8IN: TUSB_EP; //Endpoint 8
  1443. EP9OUT: TUSB_EP; //Endpoint 9
  1444. EP9IN: TUSB_EP; //Endpoint 9
  1445. EP10OUT: TUSB_EP; //Endpoint 10
  1446. EP10IN: TUSB_EP; //Endpoint 10
  1447. EP11OUT: TUSB_EP; //Endpoint 11
  1448. EP11IN: TUSB_EP; //Endpoint 11
  1449. EP12OUT: TUSB_EP; //Endpoint 12
  1450. EP12IN: TUSB_EP; //Endpoint 12
  1451. EP13OUT: TUSB_EP; //Endpoint 13
  1452. EP13IN: TUSB_EP; //Endpoint 13
  1453. EP14OUT: TUSB_EP; //Endpoint 14
  1454. EP14IN: TUSB_EP; //Endpoint 14
  1455. EP15OUT: TUSB_EP; //Endpoint 15
  1456. EP15IN: TUSB_EP; //Endpoint 15
  1457. Reserved256: byte;
  1458. Reserved257: byte;
  1459. Reserved258: byte;
  1460. Reserved259: byte;
  1461. Reserved260: byte;
  1462. Reserved261: byte;
  1463. Reserved262: byte;
  1464. Reserved263: byte;
  1465. Reserved264: byte;
  1466. Reserved265: byte;
  1467. Reserved266: byte;
  1468. Reserved267: byte;
  1469. Reserved268: byte;
  1470. Reserved269: byte;
  1471. Reserved270: byte;
  1472. Reserved271: byte;
  1473. FRAMENUML: byte; //Frame Number Low Byte
  1474. FRAMENUMH: byte; //Frame Number High Byte
  1475. end;
  1476. TPORT = object //I/O Ports
  1477. DIR: byte; //I/O Port Data Direction
  1478. DIRSET: byte; //I/O Port Data Direction Set
  1479. DIRCLR: byte; //I/O Port Data Direction Clear
  1480. DIRTGL: byte; //I/O Port Data Direction Toggle
  1481. OUT_: byte; //I/O Port Output
  1482. OUTSET: byte; //I/O Port Output Set
  1483. OUTCLR: byte; //I/O Port Output Clear
  1484. OUTTGL: byte; //I/O Port Output Toggle
  1485. IN_: byte; //I/O port Input
  1486. INTCTRL: byte; //Interrupt Control Register
  1487. INT0MASK: byte; //Port Interrupt 0 Mask
  1488. INT1MASK: byte; //Port Interrupt 1 Mask
  1489. INTFLAGS: byte; //Interrupt Flag Register
  1490. Reserved13: byte;
  1491. REMAP: byte; //I/O Port Pin Remap Register
  1492. Reserved15: byte;
  1493. PIN0CTRL: byte; //Pin 0 Control Register
  1494. PIN1CTRL: byte; //Pin 1 Control Register
  1495. PIN2CTRL: byte; //Pin 2 Control Register
  1496. PIN3CTRL: byte; //Pin 3 Control Register
  1497. PIN4CTRL: byte; //Pin 4 Control Register
  1498. PIN5CTRL: byte; //Pin 5 Control Register
  1499. PIN6CTRL: byte; //Pin 6 Control Register
  1500. PIN7CTRL: byte; //Pin 7 Control Register
  1501. const
  1502. // PORT_INT1LVL
  1503. INT1LVLmask = $0C;
  1504. INT1LVL_OFF = $00;
  1505. INT1LVL_LO = $04;
  1506. INT1LVL_MED = $08;
  1507. INT1LVL_HI = $0C;
  1508. // PORT_INT0LVL
  1509. INT0LVLmask = $03;
  1510. INT0LVL_OFF = $00;
  1511. INT0LVL_LO = $01;
  1512. INT0LVL_MED = $02;
  1513. INT0LVL_HI = $03;
  1514. // Port Interrupt 1 Flag
  1515. INT1IFbm = $02;
  1516. // Port Interrupt 0 Flag
  1517. INT0IFbm = $01;
  1518. // SPI
  1519. SPIbm = $20;
  1520. // USART0
  1521. USART0bm = $10;
  1522. // Timer/Counter 0 Output Compare D
  1523. TC0Dbm = $08;
  1524. // Timer/Counter 0 Output Compare C
  1525. TC0Cbm = $04;
  1526. // Timer/Counter 0 Output Compare B
  1527. TC0Bbm = $02;
  1528. // Timer/Counter 0 Output Compare A
  1529. TC0Abm = $01;
  1530. // Slew Rate Enable
  1531. SRLENbm = $80;
  1532. // Inverted I/O Enable
  1533. INVENbm = $40;
  1534. // PORT_OPC
  1535. OPCmask = $38;
  1536. OPC_TOTEM = $00;
  1537. OPC_BUSKEEPER = $08;
  1538. OPC_PULLDOWN = $10;
  1539. OPC_PULLUP = $18;
  1540. OPC_WIREDOR = $20;
  1541. OPC_WIREDAND = $28;
  1542. OPC_WIREDORPULL = $30;
  1543. OPC_WIREDANDPULL = $38;
  1544. // PORT_ISC
  1545. ISCmask = $07;
  1546. ISC_BOTHEDGES = $00;
  1547. ISC_RISING = $01;
  1548. ISC_FALLING = $02;
  1549. ISC_LEVEL = $03;
  1550. ISC_INPUT_DISABLE = $07;
  1551. end;
  1552. TTC0 = object //16-bit Timer/Counter 0
  1553. CTRLA: byte; //Control Register A
  1554. CTRLB: byte; //Control Register B
  1555. CTRLC: byte; //Control register C
  1556. CTRLD: byte; //Control Register D
  1557. CTRLE: byte; //Control Register E
  1558. Reserved5: byte;
  1559. INTCTRLA: byte; //Interrupt Control Register A
  1560. INTCTRLB: byte; //Interrupt Control Register B
  1561. CTRLFCLR: byte; //Control Register F Clear
  1562. CTRLFSET: byte; //Control Register F Set
  1563. CTRLGCLR: byte; //Control Register G Clear
  1564. CTRLGSET: byte; //Control Register G Set
  1565. INTFLAGS: byte; //Interrupt Flag Register
  1566. Reserved13: byte;
  1567. Reserved14: byte;
  1568. TEMP: byte; //Temporary Register For 16-bit Access
  1569. Reserved16: byte;
  1570. Reserved17: byte;
  1571. Reserved18: byte;
  1572. Reserved19: byte;
  1573. Reserved20: byte;
  1574. Reserved21: byte;
  1575. Reserved22: byte;
  1576. Reserved23: byte;
  1577. Reserved24: byte;
  1578. Reserved25: byte;
  1579. Reserved26: byte;
  1580. Reserved27: byte;
  1581. Reserved28: byte;
  1582. Reserved29: byte;
  1583. Reserved30: byte;
  1584. Reserved31: byte;
  1585. CNT: word; //Count
  1586. Reserved34: byte;
  1587. Reserved35: byte;
  1588. Reserved36: byte;
  1589. Reserved37: byte;
  1590. PER: word; //Period
  1591. CCA: word; //Compare or Capture A
  1592. CCB: word; //Compare or Capture B
  1593. CCC: word; //Compare or Capture C
  1594. CCD: word; //Compare or Capture D
  1595. Reserved48: byte;
  1596. Reserved49: byte;
  1597. Reserved50: byte;
  1598. Reserved51: byte;
  1599. Reserved52: byte;
  1600. Reserved53: byte;
  1601. PERBUF: word; //Period Buffer
  1602. CCABUF: word; //Compare Or Capture A Buffer
  1603. CCBBUF: word; //Compare Or Capture B Buffer
  1604. CCCBUF: word; //Compare Or Capture C Buffer
  1605. CCDBUF: word; //Compare Or Capture D Buffer
  1606. const
  1607. // TC_CLKSEL
  1608. CLKSELmask = $0F;
  1609. CLKSEL_OFF = $00;
  1610. CLKSEL_DIV1 = $01;
  1611. CLKSEL_DIV2 = $02;
  1612. CLKSEL_DIV4 = $03;
  1613. CLKSEL_DIV8 = $04;
  1614. CLKSEL_DIV64 = $05;
  1615. CLKSEL_DIV256 = $06;
  1616. CLKSEL_DIV1024 = $07;
  1617. CLKSEL_EVCH0 = $08;
  1618. CLKSEL_EVCH1 = $09;
  1619. CLKSEL_EVCH2 = $0A;
  1620. CLKSEL_EVCH3 = $0B;
  1621. // Compare or Capture D Enable
  1622. CCDENbm = $80;
  1623. // Compare or Capture C Enable
  1624. CCCENbm = $40;
  1625. // Compare or Capture B Enable
  1626. CCBENbm = $20;
  1627. // Compare or Capture A Enable
  1628. CCAENbm = $10;
  1629. // TC_WGMODE
  1630. WGMODEmask = $07;
  1631. WGMODE_NORMAL = $00;
  1632. WGMODE_FRQ = $01;
  1633. WGMODE_SINGLESLOPE = $03;
  1634. WGMODE_SS = $03;
  1635. WGMODE_DSTOP = $05;
  1636. WGMODE_DS_T = $05;
  1637. WGMODE_DSBOTH = $06;
  1638. WGMODE_DS_TB = $06;
  1639. WGMODE_DSBOTTOM = $07;
  1640. WGMODE_DS_B = $07;
  1641. // Compare D Output Value
  1642. CMPDbm = $08;
  1643. // Compare C Output Value
  1644. CMPCbm = $04;
  1645. // Compare B Output Value
  1646. CMPBbm = $02;
  1647. // Compare A Output Value
  1648. CMPAbm = $01;
  1649. // TC_EVACT
  1650. EVACTmask = $E0;
  1651. EVACT_OFF = $00;
  1652. EVACT_CAPT = $20;
  1653. EVACT_UPDOWN = $40;
  1654. EVACT_QDEC = $60;
  1655. EVACT_RESTART = $80;
  1656. EVACT_FRQ = $A0;
  1657. EVACT_PW = $C0;
  1658. // Event Delay
  1659. EVDLYbm = $10;
  1660. // TC_EVSEL
  1661. EVSELmask = $0F;
  1662. EVSEL_OFF = $00;
  1663. EVSEL_CH0 = $08;
  1664. EVSEL_CH1 = $09;
  1665. EVSEL_CH2 = $0A;
  1666. EVSEL_CH3 = $0B;
  1667. // TC_BYTEM
  1668. BYTEMmask = $03;
  1669. BYTEM_NORMAL = $00;
  1670. BYTEM_BYTEMODE = $01;
  1671. BYTEM_SPLITMODE = $02;
  1672. // TC_ERRINTLVL
  1673. ERRINTLVLmask = $0C;
  1674. ERRINTLVL_OFF = $00;
  1675. ERRINTLVL_LO = $04;
  1676. ERRINTLVL_MED = $08;
  1677. ERRINTLVL_HI = $0C;
  1678. // TC_OVFINTLVL
  1679. OVFINTLVLmask = $03;
  1680. OVFINTLVL_OFF = $00;
  1681. OVFINTLVL_LO = $01;
  1682. OVFINTLVL_MED = $02;
  1683. OVFINTLVL_HI = $03;
  1684. // TC_CCDINTLVL
  1685. CCDINTLVLmask = $C0;
  1686. CCDINTLVL_OFF = $00;
  1687. CCDINTLVL_LO = $40;
  1688. CCDINTLVL_MED = $80;
  1689. CCDINTLVL_HI = $C0;
  1690. // TC_CCCINTLVL
  1691. CCCINTLVLmask = $30;
  1692. CCCINTLVL_OFF = $00;
  1693. CCCINTLVL_LO = $10;
  1694. CCCINTLVL_MED = $20;
  1695. CCCINTLVL_HI = $30;
  1696. // TC_CCBINTLVL
  1697. CCBINTLVLmask = $0C;
  1698. CCBINTLVL_OFF = $00;
  1699. CCBINTLVL_LO = $04;
  1700. CCBINTLVL_MED = $08;
  1701. CCBINTLVL_HI = $0C;
  1702. // TC_CCAINTLVL
  1703. CCAINTLVLmask = $03;
  1704. CCAINTLVL_OFF = $00;
  1705. CCAINTLVL_LO = $01;
  1706. CCAINTLVL_MED = $02;
  1707. CCAINTLVL_HI = $03;
  1708. // Command
  1709. CMD0bm = $04;
  1710. CMD1bm = $08;
  1711. // Lock Update
  1712. LUPDbm = $02;
  1713. // Direction
  1714. DIRbm = $01;
  1715. // Compare or Capture D Buffer Valid
  1716. CCDBVbm = $10;
  1717. // Compare or Capture C Buffer Valid
  1718. CCCBVbm = $08;
  1719. // Compare or Capture B Buffer Valid
  1720. CCBBVbm = $04;
  1721. // Compare or Capture A Buffer Valid
  1722. CCABVbm = $02;
  1723. // Period Buffer Valid
  1724. PERBVbm = $01;
  1725. // Compare or Capture D Interrupt Flag
  1726. CCDIFbm = $80;
  1727. // Compare or Capture C Interrupt Flag
  1728. CCCIFbm = $40;
  1729. // Compare or Capture B Interrupt Flag
  1730. CCBIFbm = $20;
  1731. // Compare or Capture A Interrupt Flag
  1732. CCAIFbm = $10;
  1733. // Error Interrupt Flag
  1734. ERRIFbm = $02;
  1735. // Overflow Interrupt Flag
  1736. OVFIFbm = $01;
  1737. end;
  1738. TTC1 = object //16-bit Timer/Counter 1
  1739. CTRLA: byte; //Control Register A
  1740. CTRLB: byte; //Control Register B
  1741. CTRLC: byte; //Control register C
  1742. CTRLD: byte; //Control Register D
  1743. CTRLE: byte; //Control Register E
  1744. Reserved5: byte;
  1745. INTCTRLA: byte; //Interrupt Control Register A
  1746. INTCTRLB: byte; //Interrupt Control Register B
  1747. CTRLFCLR: byte; //Control Register F Clear
  1748. CTRLFSET: byte; //Control Register F Set
  1749. CTRLGCLR: byte; //Control Register G Clear
  1750. CTRLGSET: byte; //Control Register G Set
  1751. INTFLAGS: byte; //Interrupt Flag Register
  1752. Reserved13: byte;
  1753. Reserved14: byte;
  1754. TEMP: byte; //Temporary Register For 16-bit Access
  1755. Reserved16: byte;
  1756. Reserved17: byte;
  1757. Reserved18: byte;
  1758. Reserved19: byte;
  1759. Reserved20: byte;
  1760. Reserved21: byte;
  1761. Reserved22: byte;
  1762. Reserved23: byte;
  1763. Reserved24: byte;
  1764. Reserved25: byte;
  1765. Reserved26: byte;
  1766. Reserved27: byte;
  1767. Reserved28: byte;
  1768. Reserved29: byte;
  1769. Reserved30: byte;
  1770. Reserved31: byte;
  1771. CNT: word; //Count
  1772. Reserved34: byte;
  1773. Reserved35: byte;
  1774. Reserved36: byte;
  1775. Reserved37: byte;
  1776. PER: word; //Period
  1777. CCA: word; //Compare or Capture A
  1778. CCB: word; //Compare or Capture B
  1779. Reserved44: byte;
  1780. Reserved45: byte;
  1781. Reserved46: byte;
  1782. Reserved47: byte;
  1783. Reserved48: byte;
  1784. Reserved49: byte;
  1785. Reserved50: byte;
  1786. Reserved51: byte;
  1787. Reserved52: byte;
  1788. Reserved53: byte;
  1789. PERBUF: word; //Period Buffer
  1790. CCABUF: word; //Compare Or Capture A Buffer
  1791. CCBBUF: word; //Compare Or Capture B Buffer
  1792. const
  1793. // TC_CLKSEL
  1794. CLKSELmask = $0F;
  1795. CLKSEL_OFF = $00;
  1796. CLKSEL_DIV1 = $01;
  1797. CLKSEL_DIV2 = $02;
  1798. CLKSEL_DIV4 = $03;
  1799. CLKSEL_DIV8 = $04;
  1800. CLKSEL_DIV64 = $05;
  1801. CLKSEL_DIV256 = $06;
  1802. CLKSEL_DIV1024 = $07;
  1803. CLKSEL_EVCH0 = $08;
  1804. CLKSEL_EVCH1 = $09;
  1805. CLKSEL_EVCH2 = $0A;
  1806. CLKSEL_EVCH3 = $0B;
  1807. // Compare or Capture B Enable
  1808. CCBENbm = $20;
  1809. // Compare or Capture A Enable
  1810. CCAENbm = $10;
  1811. // TC_WGMODE
  1812. WGMODEmask = $07;
  1813. WGMODE_NORMAL = $00;
  1814. WGMODE_FRQ = $01;
  1815. WGMODE_SINGLESLOPE = $03;
  1816. WGMODE_SS = $03;
  1817. WGMODE_DSTOP = $05;
  1818. WGMODE_DS_T = $05;
  1819. WGMODE_DSBOTH = $06;
  1820. WGMODE_DS_TB = $06;
  1821. WGMODE_DSBOTTOM = $07;
  1822. WGMODE_DS_B = $07;
  1823. // Compare B Output Value
  1824. CMPBbm = $02;
  1825. // Compare A Output Value
  1826. CMPAbm = $01;
  1827. // TC_EVACT
  1828. EVACTmask = $E0;
  1829. EVACT_OFF = $00;
  1830. EVACT_CAPT = $20;
  1831. EVACT_UPDOWN = $40;
  1832. EVACT_QDEC = $60;
  1833. EVACT_RESTART = $80;
  1834. EVACT_FRQ = $A0;
  1835. EVACT_PW = $C0;
  1836. // Event Delay
  1837. EVDLYbm = $10;
  1838. // TC_EVSEL
  1839. EVSELmask = $0F;
  1840. EVSEL_OFF = $00;
  1841. EVSEL_CH0 = $08;
  1842. EVSEL_CH1 = $09;
  1843. EVSEL_CH2 = $0A;
  1844. EVSEL_CH3 = $0B;
  1845. // Byte Mode
  1846. BYTEMbm = $01;
  1847. // TC_ERRINTLVL
  1848. ERRINTLVLmask = $0C;
  1849. ERRINTLVL_OFF = $00;
  1850. ERRINTLVL_LO = $04;
  1851. ERRINTLVL_MED = $08;
  1852. ERRINTLVL_HI = $0C;
  1853. // TC_OVFINTLVL
  1854. OVFINTLVLmask = $03;
  1855. OVFINTLVL_OFF = $00;
  1856. OVFINTLVL_LO = $01;
  1857. OVFINTLVL_MED = $02;
  1858. OVFINTLVL_HI = $03;
  1859. // TC_CCBINTLVL
  1860. CCBINTLVLmask = $0C;
  1861. CCBINTLVL_OFF = $00;
  1862. CCBINTLVL_LO = $04;
  1863. CCBINTLVL_MED = $08;
  1864. CCBINTLVL_HI = $0C;
  1865. // TC_CCAINTLVL
  1866. CCAINTLVLmask = $03;
  1867. CCAINTLVL_OFF = $00;
  1868. CCAINTLVL_LO = $01;
  1869. CCAINTLVL_MED = $02;
  1870. CCAINTLVL_HI = $03;
  1871. // Command
  1872. CMD0bm = $04;
  1873. CMD1bm = $08;
  1874. // Lock Update
  1875. LUPDbm = $02;
  1876. // Direction
  1877. DIRbm = $01;
  1878. // Compare or Capture B Buffer Valid
  1879. CCBBVbm = $04;
  1880. // Compare or Capture A Buffer Valid
  1881. CCABVbm = $02;
  1882. // Period Buffer Valid
  1883. PERBVbm = $01;
  1884. // Compare or Capture B Interrupt Flag
  1885. CCBIFbm = $20;
  1886. // Compare or Capture A Interrupt Flag
  1887. CCAIFbm = $10;
  1888. // Error Interrupt Flag
  1889. ERRIFbm = $02;
  1890. // Overflow Interrupt Flag
  1891. OVFIFbm = $01;
  1892. end;
  1893. TTC2 = object //16-bit Timer/Counter type 2
  1894. CTRLA: byte; //Control Register A
  1895. CTRLB: byte; //Control Register B
  1896. CTRLC: byte; //Control register C
  1897. Reserved3: byte;
  1898. CTRLE: byte; //Control Register E
  1899. Reserved5: byte;
  1900. INTCTRLA: byte; //Interrupt Control Register A
  1901. INTCTRLB: byte; //Interrupt Control Register B
  1902. Reserved8: byte;
  1903. CTRLF: byte; //Control Register F
  1904. Reserved10: byte;
  1905. Reserved11: byte;
  1906. INTFLAGS: byte; //Interrupt Flag Register
  1907. Reserved13: byte;
  1908. Reserved14: byte;
  1909. Reserved15: byte;
  1910. Reserved16: byte;
  1911. Reserved17: byte;
  1912. Reserved18: byte;
  1913. Reserved19: byte;
  1914. Reserved20: byte;
  1915. Reserved21: byte;
  1916. Reserved22: byte;
  1917. Reserved23: byte;
  1918. Reserved24: byte;
  1919. Reserved25: byte;
  1920. Reserved26: byte;
  1921. Reserved27: byte;
  1922. Reserved28: byte;
  1923. Reserved29: byte;
  1924. Reserved30: byte;
  1925. Reserved31: byte;
  1926. LCNT: byte; //Low Byte Count
  1927. HCNT: byte; //High Byte Count
  1928. Reserved34: byte;
  1929. Reserved35: byte;
  1930. Reserved36: byte;
  1931. Reserved37: byte;
  1932. LPER: byte; //Low Byte Period
  1933. HPER: byte; //High Byte Period
  1934. LCMPA: byte; //Low Byte Compare A
  1935. HCMPA: byte; //High Byte Compare A
  1936. LCMPB: byte; //Low Byte Compare B
  1937. HCMPB: byte; //High Byte Compare B
  1938. LCMPC: byte; //Low Byte Compare C
  1939. HCMPC: byte; //High Byte Compare C
  1940. LCMPD: byte; //Low Byte Compare D
  1941. HCMPD: byte; //High Byte Compare D
  1942. const
  1943. // TC2_CLKSEL
  1944. CLKSELmask = $0F;
  1945. CLKSEL_OFF = $00;
  1946. CLKSEL_DIV1 = $01;
  1947. CLKSEL_DIV2 = $02;
  1948. CLKSEL_DIV4 = $03;
  1949. CLKSEL_DIV8 = $04;
  1950. CLKSEL_DIV64 = $05;
  1951. CLKSEL_DIV256 = $06;
  1952. CLKSEL_DIV1024 = $07;
  1953. CLKSEL_EVCH0 = $08;
  1954. CLKSEL_EVCH1 = $09;
  1955. CLKSEL_EVCH2 = $0A;
  1956. CLKSEL_EVCH3 = $0B;
  1957. // High Byte Compare D Enable
  1958. HCMPDENbm = $80;
  1959. // High Byte Compare C Enable
  1960. HCMPCENbm = $40;
  1961. // High Byte Compare B Enable
  1962. HCMPBENbm = $20;
  1963. // High Byte Compare A Enable
  1964. HCMPAENbm = $10;
  1965. // Low Byte Compare D Enable
  1966. LCMPDENbm = $08;
  1967. // Low Byte Compare C Enable
  1968. LCMPCENbm = $04;
  1969. // Low Byte Compare B Enable
  1970. LCMPBENbm = $02;
  1971. // Low Byte Compare A Enable
  1972. LCMPAENbm = $01;
  1973. // High Byte Compare D Output Value
  1974. HCMPDbm = $80;
  1975. // High Byte Compare C Output Value
  1976. HCMPCbm = $40;
  1977. // High Byte Compare B Output Value
  1978. HCMPBbm = $20;
  1979. // High Byte Compare A Output Value
  1980. HCMPAbm = $10;
  1981. // Low Byte Compare D Output Value
  1982. LCMPDbm = $08;
  1983. // Low Byte Compare C Output Value
  1984. LCMPCbm = $04;
  1985. // Low Byte Compare B Output Value
  1986. LCMPBbm = $02;
  1987. // Low Byte Compare A Output Value
  1988. LCMPAbm = $01;
  1989. // TC2_BYTEM
  1990. BYTEMmask = $03;
  1991. BYTEM_NORMAL = $00;
  1992. BYTEM_BYTEMODE = $01;
  1993. BYTEM_SPLITMODE = $02;
  1994. // TC2_HUNFINTLVL
  1995. HUNFINTLVLmask = $0C;
  1996. HUNFINTLVL_OFF = $00;
  1997. HUNFINTLVL_LO = $04;
  1998. HUNFINTLVL_MED = $08;
  1999. HUNFINTLVL_HI = $0C;
  2000. // TC2_LUNFINTLVL
  2001. LUNFINTLVLmask = $03;
  2002. LUNFINTLVL_OFF = $00;
  2003. LUNFINTLVL_LO = $01;
  2004. LUNFINTLVL_MED = $02;
  2005. LUNFINTLVL_HI = $03;
  2006. // TC2_LCMPDINTLVL
  2007. LCMPDINTLVLmask = $C0;
  2008. LCMPDINTLVL_OFF = $00;
  2009. LCMPDINTLVL_LO = $40;
  2010. LCMPDINTLVL_MED = $80;
  2011. LCMPDINTLVL_HI = $C0;
  2012. // TC2_LCMPCINTLVL
  2013. LCMPCINTLVLmask = $30;
  2014. LCMPCINTLVL_OFF = $00;
  2015. LCMPCINTLVL_LO = $10;
  2016. LCMPCINTLVL_MED = $20;
  2017. LCMPCINTLVL_HI = $30;
  2018. // TC2_LCMPBINTLVL
  2019. LCMPBINTLVLmask = $0C;
  2020. LCMPBINTLVL_OFF = $00;
  2021. LCMPBINTLVL_LO = $04;
  2022. LCMPBINTLVL_MED = $08;
  2023. LCMPBINTLVL_HI = $0C;
  2024. // TC2_LCMPAINTLVL
  2025. LCMPAINTLVLmask = $03;
  2026. LCMPAINTLVL_OFF = $00;
  2027. LCMPAINTLVL_LO = $01;
  2028. LCMPAINTLVL_MED = $02;
  2029. LCMPAINTLVL_HI = $03;
  2030. // TC2_CMD
  2031. CMDmask = $0C;
  2032. CMD_NONE = $00;
  2033. CMD_RESTART = $08;
  2034. CMD_RESET = $0C;
  2035. // TC2_CMDEN
  2036. CMDENmask = $03;
  2037. CMDEN_LOW = $01;
  2038. CMDEN_HIGH = $02;
  2039. CMDEN_BOTH = $03;
  2040. // Low Byte Compare D Interrupt Flag
  2041. LCMPDIFbm = $80;
  2042. // Low Byte Compare C Interrupt Flag
  2043. LCMPCIFbm = $40;
  2044. // Low Byte Compare B Interrupt Flag
  2045. LCMPBIFbm = $20;
  2046. // Low Byte Compare A Interrupt Flag
  2047. LCMPAIFbm = $10;
  2048. // High Byte Underflow Interrupt Flag
  2049. HUNFIFbm = $02;
  2050. // Low Byte Underflow Interrupt Flag
  2051. LUNFIFbm = $01;
  2052. end;
  2053. TAWEX = object //Advanced Waveform Extension
  2054. CTRL: byte; //Control Register
  2055. Reserved1: byte;
  2056. FDEMASK: byte; //Fault Detection Event Mask
  2057. FDCTRL: byte; //Fault Detection Control Register
  2058. STATUS: byte; //Status Register
  2059. STATUSSET: byte; //Status Set Register
  2060. DTBOTH: byte; //Dead Time Both Sides
  2061. DTBOTHBUF: byte; //Dead Time Both Sides Buffer
  2062. DTLS: byte; //Dead Time Low Side
  2063. DTHS: byte; //Dead Time High Side
  2064. DTLSBUF: byte; //Dead Time Low Side Buffer
  2065. DTHSBUF: byte; //Dead Time High Side Buffer
  2066. OUTOVEN: byte; //Output Override Enable
  2067. const
  2068. // Pattern Generation Mode
  2069. PGMbm = $20;
  2070. // Common Waveform Channel Mode
  2071. CWCMbm = $10;
  2072. // Dead Time Insertion Compare Channel D Enable
  2073. DTICCDENbm = $08;
  2074. // Dead Time Insertion Compare Channel C Enable
  2075. DTICCCENbm = $04;
  2076. // Dead Time Insertion Compare Channel B Enable
  2077. DTICCBENbm = $02;
  2078. // Dead Time Insertion Compare Channel A Enable
  2079. DTICCAENbm = $01;
  2080. // Fault Detect on Disable Break Disable
  2081. FDDBDbm = $10;
  2082. // Fault Detect Mode
  2083. FDMODEbm = $04;
  2084. // AWEX_FDACT
  2085. FDACTmask = $03;
  2086. FDACT_NONE = $00;
  2087. FDACT_CLEAROE = $01;
  2088. FDACT_CLEARDIR = $03;
  2089. // Fault Detect Flag
  2090. FDFbm = $04;
  2091. // Dead Time High Side Buffer Valid
  2092. DTHSBUFVbm = $02;
  2093. // Dead Time Low Side Buffer Valid
  2094. DTLSBUFVbm = $01;
  2095. end;
  2096. THIRES = object //High-Resolution Extension
  2097. CTRLA: byte; //Control Register
  2098. const
  2099. // High Resolution Plus
  2100. HRPLUSbm = $04;
  2101. // HIRES_HREN
  2102. HRENmask = $03;
  2103. HREN_NONE = $00;
  2104. HREN_TC0 = $01;
  2105. HREN_TC1 = $02;
  2106. HREN_BOTH = $03;
  2107. end;
  2108. TUSART = object //Universal Synchronous/Asynchronous Receiver/Transmitter
  2109. DATA: byte; //Data Register
  2110. STATUS: byte; //Status Register
  2111. Reserved2: byte;
  2112. CTRLA: byte; //Control Register A
  2113. CTRLB: byte; //Control Register B
  2114. CTRLC: byte; //Control Register C
  2115. BAUDCTRLA: byte; //Baud Rate Control Register A
  2116. BAUDCTRLB: byte; //Baud Rate Control Register B
  2117. const
  2118. // Receive Interrupt Flag
  2119. RXCIFbm = $80;
  2120. // Transmit Interrupt Flag
  2121. TXCIFbm = $40;
  2122. // Data Register Empty Flag
  2123. DREIFbm = $20;
  2124. // Frame Error
  2125. FERRbm = $10;
  2126. // Buffer Overflow
  2127. BUFOVFbm = $08;
  2128. // Parity Error
  2129. PERRbm = $04;
  2130. // Receive Bit 8
  2131. RXB8bm = $01;
  2132. // USART_RXCINTLVL
  2133. RXCINTLVLmask = $30;
  2134. RXCINTLVL_OFF = $00;
  2135. RXCINTLVL_LO = $10;
  2136. RXCINTLVL_MED = $20;
  2137. RXCINTLVL_HI = $30;
  2138. // USART_TXCINTLVL
  2139. TXCINTLVLmask = $0C;
  2140. TXCINTLVL_OFF = $00;
  2141. TXCINTLVL_LO = $04;
  2142. TXCINTLVL_MED = $08;
  2143. TXCINTLVL_HI = $0C;
  2144. // USART_DREINTLVL
  2145. DREINTLVLmask = $03;
  2146. DREINTLVL_OFF = $00;
  2147. DREINTLVL_LO = $01;
  2148. DREINTLVL_MED = $02;
  2149. DREINTLVL_HI = $03;
  2150. // Receiver Enable
  2151. RXENbm = $10;
  2152. // Transmitter Enable
  2153. TXENbm = $08;
  2154. // Double transmission speed
  2155. CLK2Xbm = $04;
  2156. // Multi-processor Communication Mode
  2157. MPCMbm = $02;
  2158. // Transmit bit 8
  2159. TXB8bm = $01;
  2160. // USART_CMODE
  2161. CMODEmask = $C0;
  2162. CMODE_ASYNCHRONOUS = $00;
  2163. CMODE_SYNCHRONOUS = $40;
  2164. CMODE_IRDA = $80;
  2165. CMODE_MSPI = $C0;
  2166. // USART_PMODE
  2167. PMODEmask = $30;
  2168. PMODE_DISABLED = $00;
  2169. PMODE_EVEN = $20;
  2170. PMODE_ODD = $30;
  2171. // Stop Bit Mode
  2172. SBMODEbm = $08;
  2173. // USART_CHSIZE
  2174. CHSIZEmask = $07;
  2175. CHSIZE_5BIT = $00;
  2176. CHSIZE_6BIT = $01;
  2177. CHSIZE_7BIT = $02;
  2178. CHSIZE_8BIT = $03;
  2179. CHSIZE_9BIT = $07;
  2180. // Baud Rate Scale
  2181. BSCALE0bm = $10;
  2182. BSCALE1bm = $20;
  2183. BSCALE2bm = $40;
  2184. BSCALE3bm = $80;
  2185. end;
  2186. TSPI = object //Serial Peripheral Interface
  2187. CTRL: byte; //Control Register
  2188. INTCTRL: byte; //Interrupt Control Register
  2189. STATUS: byte; //Status Register
  2190. DATA: byte; //Data Register
  2191. const
  2192. // Enable Double Speed
  2193. CLK2Xbm = $80;
  2194. // Enable Module
  2195. ENABLEbm = $40;
  2196. // Data Order Setting
  2197. DORDbm = $20;
  2198. // Master Operation Enable
  2199. MASTERbm = $10;
  2200. // SPI_MODE
  2201. MODEmask = $0C;
  2202. MODE_0 = $00;
  2203. MODE_1 = $04;
  2204. MODE_2 = $08;
  2205. MODE_3 = $0C;
  2206. // SPI_PRESCALER
  2207. PRESCALERmask = $03;
  2208. PRESCALER_DIV4 = $00;
  2209. PRESCALER_DIV16 = $01;
  2210. PRESCALER_DIV64 = $02;
  2211. PRESCALER_DIV128 = $03;
  2212. // SPI_INTLVL
  2213. INTLVLmask = $03;
  2214. INTLVL_OFF = $00;
  2215. INTLVL_LO = $01;
  2216. INTLVL_MED = $02;
  2217. INTLVL_HI = $03;
  2218. // Interrupt Flag
  2219. IFbm = $80;
  2220. // Write Collision
  2221. WRCOLbm = $40;
  2222. end;
  2223. TIRCOM = object //IR Communication Module
  2224. CTRL: byte; //Control Register
  2225. TXPLCTRL: byte; //IrDA Transmitter Pulse Length Control Register
  2226. RXPLCTRL: byte; //IrDA Receiver Pulse Length Control Register
  2227. const
  2228. // IRDA_EVSEL
  2229. EVSELmask = $0F;
  2230. EVSEL_OFF = $00;
  2231. EVSEL_0 = $08;
  2232. EVSEL_1 = $09;
  2233. EVSEL_2 = $0A;
  2234. EVSEL_3 = $0B;
  2235. end;
  2236. TNVM_FUSES = object //Fuses
  2237. Reserved0: byte;
  2238. FUSEBYTE1: byte; //Watchdog Configuration
  2239. FUSEBYTE2: byte; //Reset Configuration
  2240. Reserved3: byte;
  2241. FUSEBYTE4: byte; //Start-up Configuration
  2242. FUSEBYTE5: byte; //EESAVE and BOD Level
  2243. const
  2244. // WDWPER
  2245. WDWPERmask = $F0;
  2246. WDWPER_8CLK = $00;
  2247. WDWPER_16CLK = $10;
  2248. WDWPER_32CLK = $20;
  2249. WDWPER_64CLK = $30;
  2250. WDWPER_128CLK = $40;
  2251. WDWPER_256CLK = $50;
  2252. WDWPER_512CLK = $60;
  2253. WDWPER_1KCLK = $70;
  2254. WDWPER_2KCLK = $80;
  2255. WDWPER_4KCLK = $90;
  2256. WDWPER_8KCLK = $A0;
  2257. // WDPER
  2258. WDPERmask = $0F;
  2259. WDPER_8CLK = $00;
  2260. WDPER_16CLK = $01;
  2261. WDPER_32CLK = $02;
  2262. WDPER_64CLK = $03;
  2263. WDPER_128CLK = $04;
  2264. WDPER_256CLK = $05;
  2265. WDPER_512CLK = $06;
  2266. WDPER_1KCLK = $07;
  2267. WDPER_2KCLK = $08;
  2268. WDPER_4KCLK = $09;
  2269. WDPER_8KCLK = $0A;
  2270. // BOOTRST
  2271. BOOTRSTmask = $40;
  2272. BOOTRST_BOOTLDR = $00;
  2273. BOOTRST_APPLICATION = $40;
  2274. // TOSCSEL
  2275. TOSCSELmask = $20;
  2276. TOSCSEL_ALTERNATE = $00;
  2277. TOSCSEL_XTAL = $20;
  2278. // BODPD
  2279. BODPDmask = $03;
  2280. BODPD_SAMPLED = $01;
  2281. BODPD_CONTINUOUS = $02;
  2282. BODPD_DISABLED = $03;
  2283. // External Reset Disable
  2284. RSTDISBLbm = $10;
  2285. // STARTUPTIME
  2286. STARTUPTIMEmask = $0C;
  2287. STARTUPTIME0MS = $0C;
  2288. STARTUPTIME4MS = $04;
  2289. STARTUPTIME64MS = $00;
  2290. // Watchdog Timer Lock
  2291. WDLOCKbm = $02;
  2292. // BODACT
  2293. BODACTmask = $30;
  2294. BODACT_SAMPLED = $10;
  2295. BODACT_CONTINUOUS = $20;
  2296. BODACT_DISABLED = $30;
  2297. // Preserve EEPROM Through Chip Erase
  2298. EESAVEbm = $08;
  2299. // BODLEVEL
  2300. BODLEVELmask = $07;
  2301. BODLEVEL1V6 = $07;
  2302. BODLEVEL1V8 = $06;
  2303. BODLEVEL2V0 = $05;
  2304. BODLEVEL2V2 = $04;
  2305. BODLEVEL2V4 = $03;
  2306. BODLEVEL2V6 = $02;
  2307. BODLEVEL2V8 = $01;
  2308. BODLEVEL3V0 = $00;
  2309. end;
  2310. TNVM_LOCKBITS = object //Lock Bits
  2311. LOCKBITS: byte; //Lock Bits
  2312. const
  2313. // FUSE_BLBB
  2314. BLBBmask = $C0;
  2315. BLBB_RWLOCK = $00;
  2316. BLBB_RLOCK = $40;
  2317. BLBB_WLOCK = $80;
  2318. BLBB_NOLOCK = $C0;
  2319. // FUSE_BLBA
  2320. BLBAmask = $30;
  2321. BLBA_RWLOCK = $00;
  2322. BLBA_RLOCK = $10;
  2323. BLBA_WLOCK = $20;
  2324. BLBA_NOLOCK = $30;
  2325. // FUSE_BLBAT
  2326. BLBATmask = $0C;
  2327. BLBAT_RWLOCK = $00;
  2328. BLBAT_RLOCK = $04;
  2329. BLBAT_WLOCK = $08;
  2330. BLBAT_NOLOCK = $0C;
  2331. // FUSE_LB
  2332. LBmask = $03;
  2333. LB_RWLOCK = $00;
  2334. LB_WLOCK = $02;
  2335. LB_NOLOCK = $03;
  2336. end;
  2337. TNVM_PROD_SIGNATURES = object //Production Signatures
  2338. RCOSC2M: byte; //RCOSC 2 MHz Calibration Value B
  2339. RCOSC2MA: byte; //RCOSC 2 MHz Calibration Value A
  2340. RCOSC32K: byte; //RCOSC 32.768 kHz Calibration Value
  2341. RCOSC32M: byte; //RCOSC 32 MHz Calibration Value B
  2342. RCOSC32MA: byte; //RCOSC 32 MHz Calibration Value A
  2343. Reserved5: byte;
  2344. Reserved6: byte;
  2345. Reserved7: byte;
  2346. LOTNUM0: byte; //Lot Number Byte 0, ASCII
  2347. LOTNUM1: byte; //Lot Number Byte 1, ASCII
  2348. LOTNUM2: byte; //Lot Number Byte 2, ASCII
  2349. LOTNUM3: byte; //Lot Number Byte 3, ASCII
  2350. LOTNUM4: byte; //Lot Number Byte 4, ASCII
  2351. LOTNUM5: byte; //Lot Number Byte 5, ASCII
  2352. Reserved14: byte;
  2353. Reserved15: byte;
  2354. WAFNUM: byte; //Wafer Number
  2355. Reserved17: byte;
  2356. COORDX0: byte; //Wafer Coordinate X Byte 0
  2357. COORDX1: byte; //Wafer Coordinate X Byte 1
  2358. COORDY0: byte; //Wafer Coordinate Y Byte 0
  2359. COORDY1: byte; //Wafer Coordinate Y Byte 1
  2360. Reserved22: byte;
  2361. Reserved23: byte;
  2362. Reserved24: byte;
  2363. Reserved25: byte;
  2364. USBCAL0: byte; //USB Calibration Byte 0
  2365. USBCAL1: byte; //USB Calibration Byte 1
  2366. USBRCOSC: byte; //USB RCOSC Calibration Value B
  2367. USBRCOSCA: byte; //USB RCOSC Calibration Value A
  2368. Reserved30: byte;
  2369. Reserved31: byte;
  2370. ADCACAL0: byte; //ADCA Calibration Byte 0
  2371. ADCACAL1: byte; //ADCA Calibration Byte 1
  2372. Reserved34: byte;
  2373. Reserved35: byte;
  2374. Reserved36: byte;
  2375. Reserved37: byte;
  2376. Reserved38: byte;
  2377. Reserved39: byte;
  2378. Reserved40: byte;
  2379. Reserved41: byte;
  2380. Reserved42: byte;
  2381. Reserved43: byte;
  2382. Reserved44: byte;
  2383. Reserved45: byte;
  2384. TEMPSENSE0: byte; //Temperature Sensor Calibration Byte 0
  2385. TEMPSENSE1: byte; //Temperature Sensor Calibration Byte 1
  2386. end;
  2387. const
  2388. Pin0idx = 0; Pin0bm = 1;
  2389. Pin1idx = 1; Pin1bm = 2;
  2390. Pin2idx = 2; Pin2bm = 4;
  2391. Pin3idx = 3; Pin3bm = 8;
  2392. Pin4idx = 4; Pin4bm = 16;
  2393. Pin5idx = 5; Pin5bm = 32;
  2394. Pin6idx = 6; Pin6bm = 64;
  2395. Pin7idx = 7; Pin7bm = 128;
  2396. var
  2397. GPIO: TGPIO absolute $0000;
  2398. VPORT0: TVPORT absolute $0010;
  2399. VPORT1: TVPORT absolute $0014;
  2400. VPORT2: TVPORT absolute $0018;
  2401. VPORT3: TVPORT absolute $001C;
  2402. OCD: TOCD absolute $002E;
  2403. CPU: TCPU absolute $0030;
  2404. CLK: TCLK absolute $0040;
  2405. SLEEP: TSLEEP absolute $0048;
  2406. OSC: TOSC absolute $0050;
  2407. DFLLRC32M: TDFLL absolute $0060;
  2408. DFLLRC2M: TDFLL absolute $0068;
  2409. PR: TPR absolute $0070;
  2410. RST: TRST absolute $0078;
  2411. WDT: TWDT absolute $0080;
  2412. MCU: TMCU absolute $0090;
  2413. PMIC: TPMIC absolute $00A0;
  2414. PORTCFG: TPORTCFG absolute $00B0;
  2415. CRC: TCRC absolute $00D0;
  2416. EVSYS: TEVSYS absolute $0180;
  2417. NVM: TNVM absolute $01C0;
  2418. ADCA: TADC absolute $0200;
  2419. ACA: TAC absolute $0380;
  2420. RTC: TRTC absolute $0400;
  2421. TWIC: TTWI absolute $0480;
  2422. TWIE: TTWI absolute $04A0;
  2423. USB: TUSB absolute $04C0;
  2424. PORTA: TPORT absolute $0600;
  2425. PORTB: TPORT absolute $0620;
  2426. PORTC: TPORT absolute $0640;
  2427. PORTD: TPORT absolute $0660;
  2428. PORTE: TPORT absolute $0680;
  2429. PORTF: TPORT absolute $06A0;
  2430. PORTR: TPORT absolute $07E0;
  2431. TCC0: TTC0 absolute $0800;
  2432. TCC2: TTC2 absolute $0800;
  2433. TCC1: TTC1 absolute $0840;
  2434. AWEXC: TAWEX absolute $0880;
  2435. HIRESC: THIRES absolute $0890;
  2436. USARTC0: TUSART absolute $08A0;
  2437. SPIC: TSPI absolute $08C0;
  2438. IRCOM: TIRCOM absolute $08F8;
  2439. TCD0: TTC0 absolute $0900;
  2440. TCD2: TTC2 absolute $0900;
  2441. USARTD0: TUSART absolute $09A0;
  2442. SPID: TSPI absolute $09C0;
  2443. TCE0: TTC0 absolute $0A00;
  2444. TCE2: TTC2 absolute $0A00;
  2445. USARTE0: TUSART absolute $0AA0;
  2446. TCF0: TTC0 absolute $0B00;
  2447. TCF2: TTC2 absolute $0B00;
  2448. implementation
  2449. {$i avrcommon.inc}
  2450. procedure OSC_OSCF_ISR; external name 'OSC_OSCF_ISR'; // Interrupt 1 Oscillator Failure Interrupt (NMI)
  2451. procedure PORTC_INT0_ISR; external name 'PORTC_INT0_ISR'; // Interrupt 2 External Interrupt 0
  2452. procedure PORTC_INT1_ISR; external name 'PORTC_INT1_ISR'; // Interrupt 3 External Interrupt 1
  2453. procedure PORTR_INT0_ISR; external name 'PORTR_INT0_ISR'; // Interrupt 4 External Interrupt 0
  2454. procedure PORTR_INT1_ISR; external name 'PORTR_INT1_ISR'; // Interrupt 5 External Interrupt 1
  2455. procedure RTC_OVF_ISR; external name 'RTC_OVF_ISR'; // Interrupt 10 Overflow Interrupt
  2456. procedure RTC_COMP_ISR; external name 'RTC_COMP_ISR'; // Interrupt 11 Compare Interrupt
  2457. procedure TWIC_TWIS_ISR; external name 'TWIC_TWIS_ISR'; // Interrupt 12 TWI Slave Interrupt
  2458. procedure TWIC_TWIM_ISR; external name 'TWIC_TWIM_ISR'; // Interrupt 13 TWI Master Interrupt
  2459. procedure TCC2_LUNF_ISR; external name 'TCC2_LUNF_ISR'; // Interrupt 14 Low Byte Underflow Interrupt
  2460. procedure TCC2_HUNF_ISR; external name 'TCC2_HUNF_ISR'; // Interrupt 15 High Byte Underflow Interrupt
  2461. procedure TCC2_LCMPA_ISR; external name 'TCC2_LCMPA_ISR'; // Interrupt 16 Low Byte Compare A Interrupt
  2462. procedure TCC2_LCMPB_ISR; external name 'TCC2_LCMPB_ISR'; // Interrupt 17 Low Byte Compare B Interrupt
  2463. procedure TCC2_LCMPC_ISR; external name 'TCC2_LCMPC_ISR'; // Interrupt 18 Low Byte Compare C Interrupt
  2464. procedure TCC2_LCMPD_ISR; external name 'TCC2_LCMPD_ISR'; // Interrupt 19 Low Byte Compare D Interrupt
  2465. procedure TCC1_OVF_ISR; external name 'TCC1_OVF_ISR'; // Interrupt 20 Overflow Interrupt
  2466. procedure TCC1_ERR_ISR; external name 'TCC1_ERR_ISR'; // Interrupt 21 Error Interrupt
  2467. procedure TCC1_CCA_ISR; external name 'TCC1_CCA_ISR'; // Interrupt 22 Compare or Capture A Interrupt
  2468. procedure TCC1_CCB_ISR; external name 'TCC1_CCB_ISR'; // Interrupt 23 Compare or Capture B Interrupt
  2469. procedure SPIC_INT_ISR; external name 'SPIC_INT_ISR'; // Interrupt 24 SPI Interrupt
  2470. procedure USARTC0_RXC_ISR; external name 'USARTC0_RXC_ISR'; // Interrupt 25 Reception Complete Interrupt
  2471. procedure USARTC0_DRE_ISR; external name 'USARTC0_DRE_ISR'; // Interrupt 26 Data Register Empty Interrupt
  2472. procedure USARTC0_TXC_ISR; external name 'USARTC0_TXC_ISR'; // Interrupt 27 Transmission Complete Interrupt
  2473. procedure NVM_EE_ISR; external name 'NVM_EE_ISR'; // Interrupt 32 EE Interrupt
  2474. procedure NVM_SPM_ISR; external name 'NVM_SPM_ISR'; // Interrupt 33 SPM Interrupt
  2475. procedure PORTB_INT0_ISR; external name 'PORTB_INT0_ISR'; // Interrupt 34 External Interrupt 0
  2476. procedure PORTB_INT1_ISR; external name 'PORTB_INT1_ISR'; // Interrupt 35 External Interrupt 1
  2477. procedure PORTE_INT0_ISR; external name 'PORTE_INT0_ISR'; // Interrupt 43 External Interrupt 0
  2478. procedure PORTE_INT1_ISR; external name 'PORTE_INT1_ISR'; // Interrupt 44 External Interrupt 1
  2479. procedure TWIE_TWIS_ISR; external name 'TWIE_TWIS_ISR'; // Interrupt 45 TWI Slave Interrupt
  2480. procedure TWIE_TWIM_ISR; external name 'TWIE_TWIM_ISR'; // Interrupt 46 TWI Master Interrupt
  2481. procedure TCE2_LUNF_ISR; external name 'TCE2_LUNF_ISR'; // Interrupt 47 Low Byte Underflow Interrupt
  2482. procedure TCE2_HUNF_ISR; external name 'TCE2_HUNF_ISR'; // Interrupt 48 High Byte Underflow Interrupt
  2483. procedure TCE2_LCMPA_ISR; external name 'TCE2_LCMPA_ISR'; // Interrupt 49 Low Byte Compare A Interrupt
  2484. procedure TCE2_LCMPB_ISR; external name 'TCE2_LCMPB_ISR'; // Interrupt 50 Low Byte Compare B Interrupt
  2485. procedure TCE2_LCMPC_ISR; external name 'TCE2_LCMPC_ISR'; // Interrupt 51 Low Byte Compare C Interrupt
  2486. procedure TCE2_LCMPD_ISR; external name 'TCE2_LCMPD_ISR'; // Interrupt 52 Low Byte Compare D Interrupt
  2487. procedure USARTE0_RXC_ISR; external name 'USARTE0_RXC_ISR'; // Interrupt 58 Reception Complete Interrupt
  2488. procedure USARTE0_DRE_ISR; external name 'USARTE0_DRE_ISR'; // Interrupt 59 Data Register Empty Interrupt
  2489. procedure USARTE0_TXC_ISR; external name 'USARTE0_TXC_ISR'; // Interrupt 60 Transmission Complete Interrupt
  2490. procedure PORTD_INT0_ISR; external name 'PORTD_INT0_ISR'; // Interrupt 64 External Interrupt 0
  2491. procedure PORTD_INT1_ISR; external name 'PORTD_INT1_ISR'; // Interrupt 65 External Interrupt 1
  2492. procedure PORTA_INT0_ISR; external name 'PORTA_INT0_ISR'; // Interrupt 66 External Interrupt 0
  2493. procedure PORTA_INT1_ISR; external name 'PORTA_INT1_ISR'; // Interrupt 67 External Interrupt 1
  2494. procedure ACA_AC0_ISR; external name 'ACA_AC0_ISR'; // Interrupt 68 AC0 Interrupt
  2495. procedure ACA_AC1_ISR; external name 'ACA_AC1_ISR'; // Interrupt 69 AC1 Interrupt
  2496. procedure ACA_ACW_ISR; external name 'ACA_ACW_ISR'; // Interrupt 70 ACW Window Mode Interrupt
  2497. procedure ADCA_CH0_ISR; external name 'ADCA_CH0_ISR'; // Interrupt 71 Interrupt 0
  2498. procedure TCD2_LUNF_ISR; external name 'TCD2_LUNF_ISR'; // Interrupt 77 Low Byte Underflow Interrupt
  2499. procedure TCD2_HUNF_ISR; external name 'TCD2_HUNF_ISR'; // Interrupt 78 High Byte Underflow Interrupt
  2500. procedure TCD2_LCMPA_ISR; external name 'TCD2_LCMPA_ISR'; // Interrupt 79 Low Byte Compare A Interrupt
  2501. procedure TCD2_LCMPB_ISR; external name 'TCD2_LCMPB_ISR'; // Interrupt 80 Low Byte Compare B Interrupt
  2502. procedure TCD2_LCMPC_ISR; external name 'TCD2_LCMPC_ISR'; // Interrupt 81 Low Byte Compare C Interrupt
  2503. procedure TCD2_LCMPD_ISR; external name 'TCD2_LCMPD_ISR'; // Interrupt 82 Low Byte Compare D Interrupt
  2504. procedure SPID_INT_ISR; external name 'SPID_INT_ISR'; // Interrupt 87 SPI Interrupt
  2505. procedure USARTD0_RXC_ISR; external name 'USARTD0_RXC_ISR'; // Interrupt 88 Reception Complete Interrupt
  2506. procedure USARTD0_DRE_ISR; external name 'USARTD0_DRE_ISR'; // Interrupt 89 Data Register Empty Interrupt
  2507. procedure USARTD0_TXC_ISR; external name 'USARTD0_TXC_ISR'; // Interrupt 90 Transmission Complete Interrupt
  2508. procedure PORTF_INT0_ISR; external name 'PORTF_INT0_ISR'; // Interrupt 104 External Interrupt 0
  2509. procedure PORTF_INT1_ISR; external name 'PORTF_INT1_ISR'; // Interrupt 105 External Interrupt 1
  2510. procedure TCF2_LUNF_ISR; external name 'TCF2_LUNF_ISR'; // Interrupt 108 Low Byte Underflow Interrupt
  2511. procedure TCF2_HUNF_ISR; external name 'TCF2_HUNF_ISR'; // Interrupt 109 High Byte Underflow Interrupt
  2512. procedure TCF2_LCMPA_ISR; external name 'TCF2_LCMPA_ISR'; // Interrupt 110 Low Byte Compare A Interrupt
  2513. procedure TCF2_LCMPB_ISR; external name 'TCF2_LCMPB_ISR'; // Interrupt 111 Low Byte Compare B Interrupt
  2514. procedure TCF2_LCMPC_ISR; external name 'TCF2_LCMPC_ISR'; // Interrupt 112 Low Byte Compare C Interrupt
  2515. procedure TCF2_LCMPD_ISR; external name 'TCF2_LCMPD_ISR'; // Interrupt 113 Low Byte Compare D Interrupt
  2516. procedure USB_BUSEVENT_ISR; external name 'USB_BUSEVENT_ISR'; // Interrupt 125 SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts
  2517. procedure USB_TRNCOMPL_ISR; external name 'USB_TRNCOMPL_ISR'; // Interrupt 126 Transaction complete interrupt
  2518. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  2519. asm
  2520. jmp __dtors_end
  2521. jmp OSC_OSCF_ISR
  2522. jmp PORTC_INT0_ISR
  2523. jmp PORTC_INT1_ISR
  2524. jmp PORTR_INT0_ISR
  2525. jmp PORTR_INT1_ISR
  2526. jmp RTC_OVF_ISR
  2527. jmp RTC_COMP_ISR
  2528. jmp TWIC_TWIS_ISR
  2529. jmp TWIC_TWIM_ISR
  2530. jmp TCC2_LUNF_ISR
  2531. jmp TCC2_HUNF_ISR
  2532. jmp TCC2_LCMPA_ISR
  2533. jmp TCC2_LCMPB_ISR
  2534. jmp TCC2_LCMPC_ISR
  2535. jmp TCC2_LCMPD_ISR
  2536. jmp TCC1_OVF_ISR
  2537. jmp TCC1_ERR_ISR
  2538. jmp TCC1_CCA_ISR
  2539. jmp TCC1_CCB_ISR
  2540. jmp SPIC_INT_ISR
  2541. jmp USARTC0_RXC_ISR
  2542. jmp USARTC0_DRE_ISR
  2543. jmp USARTC0_TXC_ISR
  2544. jmp NVM_EE_ISR
  2545. jmp NVM_SPM_ISR
  2546. jmp PORTB_INT0_ISR
  2547. jmp PORTB_INT1_ISR
  2548. jmp PORTE_INT0_ISR
  2549. jmp PORTE_INT1_ISR
  2550. jmp TWIE_TWIS_ISR
  2551. jmp TWIE_TWIM_ISR
  2552. jmp TCE2_LUNF_ISR
  2553. jmp TCE2_HUNF_ISR
  2554. jmp TCE2_LCMPA_ISR
  2555. jmp TCE2_LCMPB_ISR
  2556. jmp TCE2_LCMPC_ISR
  2557. jmp TCE2_LCMPD_ISR
  2558. jmp USARTE0_RXC_ISR
  2559. jmp USARTE0_DRE_ISR
  2560. jmp USARTE0_TXC_ISR
  2561. jmp PORTD_INT0_ISR
  2562. jmp PORTD_INT1_ISR
  2563. jmp PORTA_INT0_ISR
  2564. jmp PORTA_INT1_ISR
  2565. jmp ACA_AC0_ISR
  2566. jmp ACA_AC1_ISR
  2567. jmp ACA_ACW_ISR
  2568. jmp ADCA_CH0_ISR
  2569. jmp TCD2_LUNF_ISR
  2570. jmp TCD2_HUNF_ISR
  2571. jmp TCD2_LCMPA_ISR
  2572. jmp TCD2_LCMPB_ISR
  2573. jmp TCD2_LCMPC_ISR
  2574. jmp TCD2_LCMPD_ISR
  2575. jmp SPID_INT_ISR
  2576. jmp USARTD0_RXC_ISR
  2577. jmp USARTD0_DRE_ISR
  2578. jmp USARTD0_TXC_ISR
  2579. jmp PORTF_INT0_ISR
  2580. jmp PORTF_INT1_ISR
  2581. jmp TCF2_LUNF_ISR
  2582. jmp TCF2_HUNF_ISR
  2583. jmp TCF2_LCMPA_ISR
  2584. jmp TCF2_LCMPB_ISR
  2585. jmp TCF2_LCMPC_ISR
  2586. jmp TCF2_LCMPD_ISR
  2587. jmp USB_BUSEVENT_ISR
  2588. jmp USB_TRNCOMPL_ISR
  2589. .weak OSC_OSCF_ISR
  2590. .weak PORTC_INT0_ISR
  2591. .weak PORTC_INT1_ISR
  2592. .weak PORTR_INT0_ISR
  2593. .weak PORTR_INT1_ISR
  2594. .weak RTC_OVF_ISR
  2595. .weak RTC_COMP_ISR
  2596. .weak TWIC_TWIS_ISR
  2597. .weak TWIC_TWIM_ISR
  2598. .weak TCC2_LUNF_ISR
  2599. .weak TCC2_HUNF_ISR
  2600. .weak TCC2_LCMPA_ISR
  2601. .weak TCC2_LCMPB_ISR
  2602. .weak TCC2_LCMPC_ISR
  2603. .weak TCC2_LCMPD_ISR
  2604. .weak TCC1_OVF_ISR
  2605. .weak TCC1_ERR_ISR
  2606. .weak TCC1_CCA_ISR
  2607. .weak TCC1_CCB_ISR
  2608. .weak SPIC_INT_ISR
  2609. .weak USARTC0_RXC_ISR
  2610. .weak USARTC0_DRE_ISR
  2611. .weak USARTC0_TXC_ISR
  2612. .weak NVM_EE_ISR
  2613. .weak NVM_SPM_ISR
  2614. .weak PORTB_INT0_ISR
  2615. .weak PORTB_INT1_ISR
  2616. .weak PORTE_INT0_ISR
  2617. .weak PORTE_INT1_ISR
  2618. .weak TWIE_TWIS_ISR
  2619. .weak TWIE_TWIM_ISR
  2620. .weak TCE2_LUNF_ISR
  2621. .weak TCE2_HUNF_ISR
  2622. .weak TCE2_LCMPA_ISR
  2623. .weak TCE2_LCMPB_ISR
  2624. .weak TCE2_LCMPC_ISR
  2625. .weak TCE2_LCMPD_ISR
  2626. .weak USARTE0_RXC_ISR
  2627. .weak USARTE0_DRE_ISR
  2628. .weak USARTE0_TXC_ISR
  2629. .weak PORTD_INT0_ISR
  2630. .weak PORTD_INT1_ISR
  2631. .weak PORTA_INT0_ISR
  2632. .weak PORTA_INT1_ISR
  2633. .weak ACA_AC0_ISR
  2634. .weak ACA_AC1_ISR
  2635. .weak ACA_ACW_ISR
  2636. .weak ADCA_CH0_ISR
  2637. .weak TCD2_LUNF_ISR
  2638. .weak TCD2_HUNF_ISR
  2639. .weak TCD2_LCMPA_ISR
  2640. .weak TCD2_LCMPB_ISR
  2641. .weak TCD2_LCMPC_ISR
  2642. .weak TCD2_LCMPD_ISR
  2643. .weak SPID_INT_ISR
  2644. .weak USARTD0_RXC_ISR
  2645. .weak USARTD0_DRE_ISR
  2646. .weak USARTD0_TXC_ISR
  2647. .weak PORTF_INT0_ISR
  2648. .weak PORTF_INT1_ISR
  2649. .weak TCF2_LUNF_ISR
  2650. .weak TCF2_HUNF_ISR
  2651. .weak TCF2_LCMPA_ISR
  2652. .weak TCF2_LCMPB_ISR
  2653. .weak TCF2_LCMPC_ISR
  2654. .weak TCF2_LCMPD_ISR
  2655. .weak USB_BUSEVENT_ISR
  2656. .weak USB_TRNCOMPL_ISR
  2657. .set OSC_OSCF_ISR, Default_IRQ_handler
  2658. .set PORTC_INT0_ISR, Default_IRQ_handler
  2659. .set PORTC_INT1_ISR, Default_IRQ_handler
  2660. .set PORTR_INT0_ISR, Default_IRQ_handler
  2661. .set PORTR_INT1_ISR, Default_IRQ_handler
  2662. .set RTC_OVF_ISR, Default_IRQ_handler
  2663. .set RTC_COMP_ISR, Default_IRQ_handler
  2664. .set TWIC_TWIS_ISR, Default_IRQ_handler
  2665. .set TWIC_TWIM_ISR, Default_IRQ_handler
  2666. .set TCC2_LUNF_ISR, Default_IRQ_handler
  2667. .set TCC2_HUNF_ISR, Default_IRQ_handler
  2668. .set TCC2_LCMPA_ISR, Default_IRQ_handler
  2669. .set TCC2_LCMPB_ISR, Default_IRQ_handler
  2670. .set TCC2_LCMPC_ISR, Default_IRQ_handler
  2671. .set TCC2_LCMPD_ISR, Default_IRQ_handler
  2672. .set TCC1_OVF_ISR, Default_IRQ_handler
  2673. .set TCC1_ERR_ISR, Default_IRQ_handler
  2674. .set TCC1_CCA_ISR, Default_IRQ_handler
  2675. .set TCC1_CCB_ISR, Default_IRQ_handler
  2676. .set SPIC_INT_ISR, Default_IRQ_handler
  2677. .set USARTC0_RXC_ISR, Default_IRQ_handler
  2678. .set USARTC0_DRE_ISR, Default_IRQ_handler
  2679. .set USARTC0_TXC_ISR, Default_IRQ_handler
  2680. .set NVM_EE_ISR, Default_IRQ_handler
  2681. .set NVM_SPM_ISR, Default_IRQ_handler
  2682. .set PORTB_INT0_ISR, Default_IRQ_handler
  2683. .set PORTB_INT1_ISR, Default_IRQ_handler
  2684. .set PORTE_INT0_ISR, Default_IRQ_handler
  2685. .set PORTE_INT1_ISR, Default_IRQ_handler
  2686. .set TWIE_TWIS_ISR, Default_IRQ_handler
  2687. .set TWIE_TWIM_ISR, Default_IRQ_handler
  2688. .set TCE2_LUNF_ISR, Default_IRQ_handler
  2689. .set TCE2_HUNF_ISR, Default_IRQ_handler
  2690. .set TCE2_LCMPA_ISR, Default_IRQ_handler
  2691. .set TCE2_LCMPB_ISR, Default_IRQ_handler
  2692. .set TCE2_LCMPC_ISR, Default_IRQ_handler
  2693. .set TCE2_LCMPD_ISR, Default_IRQ_handler
  2694. .set USARTE0_RXC_ISR, Default_IRQ_handler
  2695. .set USARTE0_DRE_ISR, Default_IRQ_handler
  2696. .set USARTE0_TXC_ISR, Default_IRQ_handler
  2697. .set PORTD_INT0_ISR, Default_IRQ_handler
  2698. .set PORTD_INT1_ISR, Default_IRQ_handler
  2699. .set PORTA_INT0_ISR, Default_IRQ_handler
  2700. .set PORTA_INT1_ISR, Default_IRQ_handler
  2701. .set ACA_AC0_ISR, Default_IRQ_handler
  2702. .set ACA_AC1_ISR, Default_IRQ_handler
  2703. .set ACA_ACW_ISR, Default_IRQ_handler
  2704. .set ADCA_CH0_ISR, Default_IRQ_handler
  2705. .set TCD2_LUNF_ISR, Default_IRQ_handler
  2706. .set TCD2_HUNF_ISR, Default_IRQ_handler
  2707. .set TCD2_LCMPA_ISR, Default_IRQ_handler
  2708. .set TCD2_LCMPB_ISR, Default_IRQ_handler
  2709. .set TCD2_LCMPC_ISR, Default_IRQ_handler
  2710. .set TCD2_LCMPD_ISR, Default_IRQ_handler
  2711. .set SPID_INT_ISR, Default_IRQ_handler
  2712. .set USARTD0_RXC_ISR, Default_IRQ_handler
  2713. .set USARTD0_DRE_ISR, Default_IRQ_handler
  2714. .set USARTD0_TXC_ISR, Default_IRQ_handler
  2715. .set PORTF_INT0_ISR, Default_IRQ_handler
  2716. .set PORTF_INT1_ISR, Default_IRQ_handler
  2717. .set TCF2_LUNF_ISR, Default_IRQ_handler
  2718. .set TCF2_HUNF_ISR, Default_IRQ_handler
  2719. .set TCF2_LCMPA_ISR, Default_IRQ_handler
  2720. .set TCF2_LCMPB_ISR, Default_IRQ_handler
  2721. .set TCF2_LCMPC_ISR, Default_IRQ_handler
  2722. .set TCF2_LCMPD_ISR, Default_IRQ_handler
  2723. .set USB_BUSEVENT_ISR, Default_IRQ_handler
  2724. .set USB_TRNCOMPL_ISR, Default_IRQ_handler
  2725. end;
  2726. end.