atxmega32c4.pp 73 KB

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  1. unit ATxmega32C4;
  2. interface
  3. type
  4. TGPIO = object //General Purpose IO Registers
  5. GPIOR0: byte; //General Purpose IO Register 0
  6. GPIOR1: byte; //General Purpose IO Register 1
  7. GPIOR2: byte; //General Purpose IO Register 2
  8. GPIOR3: byte; //General Purpose IO Register 3
  9. end;
  10. TVPORT = object //Virtual Port
  11. DIR: byte; //I/O Port Data Direction
  12. OUT_: byte; //I/O Port Output
  13. IN_: byte; //I/O Port Input
  14. INTFLAGS: byte; //Interrupt Flag Register
  15. const
  16. // Port Interrupt 1 Flag
  17. INT1IFbm = $02;
  18. // Port Interrupt 0 Flag
  19. INT0IFbm = $01;
  20. end;
  21. TOCD = object //On-Chip Debug System
  22. OCDR0: byte; //OCD Register 0
  23. OCDR1: byte; //OCD Register 1
  24. end;
  25. TCPU = object //CPU registers
  26. Reserved0: byte;
  27. Reserved1: byte;
  28. Reserved2: byte;
  29. Reserved3: byte;
  30. CCP: byte; //Configuration Change Protection
  31. Reserved5: byte;
  32. Reserved6: byte;
  33. Reserved7: byte;
  34. RAMPD: byte; //Ramp D
  35. RAMPX: byte; //Ramp X
  36. RAMPY: byte; //Ramp Y
  37. RAMPZ: byte; //Ramp Z
  38. EIND: byte; //Extended Indirect Jump
  39. SPL: byte; //Stack Pointer Low
  40. SPH: byte; //Stack Pointer High
  41. SREG: byte; //Status Register
  42. const
  43. // CCP
  44. CCPmask = $FF;
  45. CCP_SPM = $9D;
  46. CCP_IOREG = $D8;
  47. // Global Interrupt Enable Flag
  48. Ibm = $80;
  49. // Transfer Bit
  50. Tbm = $40;
  51. // Half Carry Flag
  52. Hbm = $20;
  53. // N Exclusive Or V Flag
  54. Sbm = $10;
  55. // Two's Complement Overflow Flag
  56. Vbm = $08;
  57. // Negative Flag
  58. Nbm = $04;
  59. // Zero Flag
  60. Zbm = $02;
  61. // Carry Flag
  62. Cbm = $01;
  63. end;
  64. TCLK = object //Clock System
  65. CTRL: byte; //Control Register
  66. PSCTRL: byte; //Prescaler Control Register
  67. LOCK: byte; //Lock register
  68. RTCCTRL: byte; //RTC Control Register
  69. USBCTRL: byte; //USB Control Register
  70. const
  71. // CLK_SCLKSEL
  72. SCLKSELmask = $07;
  73. SCLKSEL_RC2M = $00;
  74. SCLKSEL_RC32M = $01;
  75. SCLKSEL_RC32K = $02;
  76. SCLKSEL_XOSC = $03;
  77. SCLKSEL_PLL = $04;
  78. // CLK_PSADIV
  79. PSADIVmask = $7C;
  80. PSADIV_1 = $00;
  81. PSADIV_2 = $04;
  82. PSADIV_4 = $0C;
  83. PSADIV_8 = $14;
  84. PSADIV_16 = $1C;
  85. PSADIV_32 = $24;
  86. PSADIV_64 = $2C;
  87. PSADIV_128 = $34;
  88. PSADIV_256 = $3C;
  89. PSADIV_512 = $44;
  90. // CLK_PSBCDIV
  91. PSBCDIVmask = $03;
  92. PSBCDIV_1_1 = $00;
  93. PSBCDIV_1_2 = $01;
  94. PSBCDIV_4_1 = $02;
  95. PSBCDIV_2_2 = $03;
  96. // Clock System Lock
  97. LOCKbm = $01;
  98. // CLK_RTCSRC
  99. RTCSRCmask = $0E;
  100. RTCSRC_ULP = $00;
  101. RTCSRC_TOSC = $02;
  102. RTCSRC_RCOSC = $04;
  103. RTCSRC_TOSC32 = $0A;
  104. RTCSRC_RCOSC32 = $0C;
  105. RTCSRC_EXTCLK = $0E;
  106. // Clock Source Enable
  107. RTCENbm = $01;
  108. // CLK_USBPSDIV
  109. USBPSDIVmask = $38;
  110. USBPSDIV_1 = $00;
  111. USBPSDIV_2 = $08;
  112. USBPSDIV_4 = $10;
  113. USBPSDIV_8 = $18;
  114. USBPSDIV_16 = $20;
  115. USBPSDIV_32 = $28;
  116. // CLK_USBSRC
  117. USBSRCmask = $06;
  118. USBSRC_PLL = $00;
  119. USBSRC_RC32M = $02;
  120. // Clock Source Enable
  121. USBSENbm = $01;
  122. end;
  123. TPR = object //Power Reduction
  124. PRGEN: byte; //General Power Reduction
  125. PRPA: byte; //Power Reduction Port A
  126. Reserved2: byte;
  127. PRPC: byte; //Power Reduction Port C
  128. PRPD: byte; //Power Reduction Port D
  129. PRPE: byte; //Power Reduction Port E
  130. PRPF: byte; //Power Reduction Port F
  131. const
  132. // USB
  133. USBbm = $40;
  134. // AES
  135. AESbm = $10;
  136. // Real-time Counter
  137. RTCbm = $04;
  138. // Event System
  139. EVSYSbm = $02;
  140. // DMA-Controller
  141. DMAbm = $01;
  142. // Port A ADC
  143. ADCbm = $02;
  144. // Port A Analog Comparator
  145. ACbm = $01;
  146. // Port C Two-wire Interface
  147. TWIbm = $40;
  148. // Port C USART1
  149. USART1bm = $20;
  150. // Port C USART0
  151. USART0bm = $10;
  152. // Port C SPI
  153. SPIbm = $08;
  154. // Port C AWEX
  155. HIRESbm = $04;
  156. // Port C Timer/Counter1
  157. TC1bm = $02;
  158. // Port C Timer/Counter0
  159. TC0bm = $01;
  160. end;
  161. TSLEEP = object //Sleep Controller
  162. CTRL: byte; //Control Register
  163. const
  164. // SLEEP_SMODE
  165. SMODEmask = $0E;
  166. SMODE_IDLE = $00;
  167. SMODE_PDOWN = $04;
  168. SMODE_PSAVE = $06;
  169. SMODE_STDBY = $0C;
  170. SMODE_ESTDBY = $0E;
  171. // Sleep Enable
  172. SENbm = $01;
  173. end;
  174. TOSC = object //Oscillator
  175. CTRL: byte; //Control Register
  176. STATUS: byte; //Status Register
  177. XOSCCTRL: byte; //External Oscillator Control Register
  178. XOSCFAIL: byte; //Oscillator Failure Detection Register
  179. RC32KCAL: byte; //32.768 kHz Internal Oscillator Calibration Register
  180. PLLCTRL: byte; //PLL Control Register
  181. DFLLCTRL: byte; //DFLL Control Register
  182. const
  183. // PLL Enable
  184. PLLENbm = $10;
  185. // External Oscillator Enable
  186. XOSCENbm = $08;
  187. // Internal 32.768 kHz RC Oscillator Enable
  188. RC32KENbm = $04;
  189. // Internal 32 MHz RC Oscillator Enable
  190. RC32MENbm = $02;
  191. // Internal 2 MHz RC Oscillator Enable
  192. RC2MENbm = $01;
  193. // PLL Ready
  194. PLLRDYbm = $10;
  195. // External Oscillator Ready
  196. XOSCRDYbm = $08;
  197. // Internal 32.768 kHz RC Oscillator Ready
  198. RC32KRDYbm = $04;
  199. // Internal 32 MHz RC Oscillator Ready
  200. RC32MRDYbm = $02;
  201. // Internal 2 MHz RC Oscillator Ready
  202. RC2MRDYbm = $01;
  203. // OSC_FRQRANGE
  204. FRQRANGEmask = $C0;
  205. FRQRANGE_04TO2 = $00;
  206. FRQRANGE_2TO9 = $40;
  207. FRQRANGE_9TO12 = $80;
  208. FRQRANGE_12TO16 = $C0;
  209. // 32.768 kHz XTAL OSC Low-power Mode
  210. X32KLPMbm = $20;
  211. // 16 MHz Crystal Oscillator High Power mode
  212. XOSCPWRbm = $10;
  213. // OSC_XOSCSEL
  214. XOSCSELmask = $0F;
  215. XOSCSEL_EXTCLK = $00;
  216. XOSCSEL_32KHz = $02;
  217. XOSCSEL_XTAL_256CLK = $03;
  218. XOSCSEL_XTAL_1KCLK = $07;
  219. XOSCSEL_XTAL_16KCLK = $0B;
  220. // PLL Failure Detection Interrupt Flag
  221. PLLFDIFbm = $08;
  222. // PLL Failure Detection Enable
  223. PLLFDENbm = $04;
  224. // XOSC Failure Detection Interrupt Flag
  225. XOSCFDIFbm = $02;
  226. // XOSC Failure Detection Enable
  227. XOSCFDENbm = $01;
  228. // OSC_PLLSRC
  229. PLLSRCmask = $C0;
  230. PLLSRC_RC2M = $00;
  231. PLLSRC_RC32M = $80;
  232. PLLSRC_XOSC = $C0;
  233. // Divide by 2
  234. PLLDIVbm = $20;
  235. // Multiplication Factor
  236. PLLFAC0bm = $01;
  237. PLLFAC1bm = $02;
  238. PLLFAC2bm = $04;
  239. PLLFAC3bm = $08;
  240. PLLFAC4bm = $10;
  241. // OSC_RC32MCREF
  242. RC32MCREFmask = $06;
  243. RC32MCREF_RC32K = $00;
  244. RC32MCREF_XOSC32K = $02;
  245. RC32MCREF_USBSOF = $04;
  246. // OSC_RC2MCREF
  247. RC2MCREFmask = $01;
  248. RC2MCREF_RC32K = $00;
  249. RC2MCREF_XOSC32K = $01;
  250. end;
  251. TDFLL = object //DFLL
  252. CTRL: byte; //Control Register
  253. Reserved1: byte;
  254. CALA: byte; //Calibration Register A
  255. CALB: byte; //Calibration Register B
  256. COMP0: byte; //Oscillator Compare Register 0
  257. COMP1: byte; //Oscillator Compare Register 1
  258. COMP2: byte; //Oscillator Compare Register 2
  259. const
  260. // DFLL Enable
  261. ENABLEbm = $01;
  262. // DFLL Calibration Value A
  263. CALL0bm = $01;
  264. CALL1bm = $02;
  265. CALL2bm = $04;
  266. CALL3bm = $08;
  267. CALL4bm = $10;
  268. CALL5bm = $20;
  269. CALL6bm = $40;
  270. // DFLL Calibration Value B
  271. CALH0bm = $01;
  272. CALH1bm = $02;
  273. CALH2bm = $04;
  274. CALH3bm = $08;
  275. CALH4bm = $10;
  276. CALH5bm = $20;
  277. end;
  278. TRST = object //Reset
  279. STATUS: byte; //Status Register
  280. CTRL: byte; //Control Register
  281. const
  282. // Spike Detection Reset Flag
  283. SDRFbm = $40;
  284. // Software Reset Flag
  285. SRFbm = $20;
  286. // Programming and Debug Interface Interface Reset Flag
  287. PDIRFbm = $10;
  288. // Watchdog Reset Flag
  289. WDRFbm = $08;
  290. // Brown-out Reset Flag
  291. BORFbm = $04;
  292. // External Reset Flag
  293. EXTRFbm = $02;
  294. // Power-on Reset Flag
  295. PORFbm = $01;
  296. // Software Reset
  297. SWRSTbm = $01;
  298. end;
  299. TWDT = object //Watch-Dog Timer
  300. CTRL: byte; //Control
  301. WINCTRL: byte; //Windowed Mode Control
  302. STATUS: byte; //Status
  303. const
  304. // WDT_PER
  305. PERmask = $3C;
  306. PER_8CLK = $00;
  307. PER_16CLK = $04;
  308. PER_32CLK = $08;
  309. PER_64CLK = $0C;
  310. PER_128CLK = $10;
  311. PER_256CLK = $14;
  312. PER_512CLK = $18;
  313. PER_1KCLK = $1C;
  314. PER_2KCLK = $20;
  315. PER_4KCLK = $24;
  316. PER_8KCLK = $28;
  317. // Enable
  318. ENABLEbm = $02;
  319. // Change Enable
  320. CENbm = $01;
  321. // WDT_WPER
  322. WPERmask = $3C;
  323. WPER_8CLK = $00;
  324. WPER_16CLK = $04;
  325. WPER_32CLK = $08;
  326. WPER_64CLK = $0C;
  327. WPER_128CLK = $10;
  328. WPER_256CLK = $14;
  329. WPER_512CLK = $18;
  330. WPER_1KCLK = $1C;
  331. WPER_2KCLK = $20;
  332. WPER_4KCLK = $24;
  333. WPER_8KCLK = $28;
  334. // Windowed Mode Enable
  335. WENbm = $02;
  336. // Windowed Mode Change Enable
  337. WCENbm = $01;
  338. // Synchronization busy
  339. SYNCBUSYbm = $01;
  340. end;
  341. TMCU = object //MCU Control
  342. DEVID0: byte; //Device ID byte 0
  343. DEVID1: byte; //Device ID byte 1
  344. DEVID2: byte; //Device ID byte 2
  345. REVID: byte; //Revision ID
  346. Reserved4: byte;
  347. Reserved5: byte;
  348. Reserved6: byte;
  349. ANAINIT: byte; //Analog Startup Delay
  350. EVSYSLOCK: byte; //Event System Lock
  351. AWEXLOCK: byte; //AWEX Lock
  352. const
  353. // Analog startup delay Port A
  354. STARTUPDLYA0bm = $01;
  355. STARTUPDLYA1bm = $02;
  356. // Event Channel 0-3 Lock
  357. EVSYS0LOCKbm = $01;
  358. // AWeX on T/C C0 Lock
  359. AWEXCLOCKbm = $01;
  360. end;
  361. TPMIC = object //Programmable Multi-level Interrupt Controller
  362. STATUS: byte; //Status Register
  363. INTPRI: byte; //Interrupt Priority
  364. CTRL: byte; //Control Register
  365. const
  366. // Non-maskable Interrupt Executing
  367. NMIEXbm = $80;
  368. // High Level Interrupt Executing
  369. HILVLEXbm = $04;
  370. // Medium Level Interrupt Executing
  371. MEDLVLEXbm = $02;
  372. // Low Level Interrupt Executing
  373. LOLVLEXbm = $01;
  374. // Round-Robin Priority Enable
  375. RRENbm = $80;
  376. // Interrupt Vector Select
  377. IVSELbm = $40;
  378. // High Level Enable
  379. HILVLENbm = $04;
  380. // Medium Level Enable
  381. MEDLVLENbm = $02;
  382. // Low Level Enable
  383. LOLVLENbm = $01;
  384. end;
  385. TPORTCFG = object //I/O port Configuration
  386. MPCMASK: byte; //Multi-pin Configuration Mask
  387. Reserved1: byte;
  388. VPCTRLA: byte; //Virtual Port Control Register A
  389. VPCTRLB: byte; //Virtual Port Control Register B
  390. CLKEVOUT: byte; //Clock and Event Out Register
  391. Reserved5: byte;
  392. EVOUTSEL: byte; //Event Output Select
  393. const
  394. // VP1MAP
  395. VP1MAPmask = $F0;
  396. VP1MAPPORTA = $00;
  397. VP1MAPPORTB = $10;
  398. VP1MAPPORTC = $20;
  399. VP1MAPPORTD = $30;
  400. VP1MAPPORTE = $40;
  401. VP1MAPPORTF = $50;
  402. VP1MAPPORTG = $60;
  403. VP1MAPPORTH = $70;
  404. VP1MAPPORTJ = $80;
  405. VP1MAPPORTK = $90;
  406. VP1MAPPORTL = $A0;
  407. VP1MAPPORTM = $B0;
  408. VP1MAPPORTN = $C0;
  409. VP1MAPPORTP = $D0;
  410. VP1MAPPORTQ = $E0;
  411. VP1MAPPORTR = $F0;
  412. // VP0MAP
  413. VP0MAPmask = $0F;
  414. VP0MAPPORTA = $00;
  415. VP0MAPPORTB = $01;
  416. VP0MAPPORTC = $02;
  417. VP0MAPPORTD = $03;
  418. VP0MAPPORTE = $04;
  419. VP0MAPPORTF = $05;
  420. VP0MAPPORTG = $06;
  421. VP0MAPPORTH = $07;
  422. VP0MAPPORTJ = $08;
  423. VP0MAPPORTK = $09;
  424. VP0MAPPORTL = $0A;
  425. VP0MAPPORTM = $0B;
  426. VP0MAPPORTN = $0C;
  427. VP0MAPPORTP = $0D;
  428. VP0MAPPORTQ = $0E;
  429. VP0MAPPORTR = $0F;
  430. // VP3MAP
  431. VP3MAPmask = $F0;
  432. VP3MAPPORTA = $00;
  433. VP3MAPPORTB = $10;
  434. VP3MAPPORTC = $20;
  435. VP3MAPPORTD = $30;
  436. VP3MAPPORTE = $40;
  437. VP3MAPPORTF = $50;
  438. VP3MAPPORTG = $60;
  439. VP3MAPPORTH = $70;
  440. VP3MAPPORTJ = $80;
  441. VP3MAPPORTK = $90;
  442. VP3MAPPORTL = $A0;
  443. VP3MAPPORTM = $B0;
  444. VP3MAPPORTN = $C0;
  445. VP3MAPPORTP = $D0;
  446. VP3MAPPORTQ = $E0;
  447. VP3MAPPORTR = $F0;
  448. // VP2MAP
  449. VP2MAPmask = $0F;
  450. VP2MAPPORTA = $00;
  451. VP2MAPPORTB = $01;
  452. VP2MAPPORTC = $02;
  453. VP2MAPPORTD = $03;
  454. VP2MAPPORTE = $04;
  455. VP2MAPPORTF = $05;
  456. VP2MAPPORTG = $06;
  457. VP2MAPPORTH = $07;
  458. VP2MAPPORTJ = $08;
  459. VP2MAPPORTK = $09;
  460. VP2MAPPORTL = $0A;
  461. VP2MAPPORTM = $0B;
  462. VP2MAPPORTN = $0C;
  463. VP2MAPPORTP = $0D;
  464. VP2MAPPORTQ = $0E;
  465. VP2MAPPORTR = $0F;
  466. // PORTCFG_CLKOUT
  467. CLKOUTmask = $03;
  468. CLKOUT_OFF = $00;
  469. CLKOUT_PC7 = $01;
  470. CLKOUT_PD7 = $02;
  471. CLKOUT_PE7 = $03;
  472. // PORTCFG_CLKOUTSEL
  473. CLKOUTSELmask = $0C;
  474. CLKOUTSEL_CLK1X = $00;
  475. CLKOUTSEL_CLK2X = $04;
  476. CLKOUTSEL_CLK4X = $08;
  477. // PORTCFG_EVOUT
  478. EVOUTmask = $30;
  479. EVOUT_OFF = $00;
  480. EVOUT_PC7 = $10;
  481. EVOUT_PD7 = $20;
  482. EVOUT_PE7 = $30;
  483. // RTC Clock Output
  484. RTCOUTbm = $40;
  485. // Peripheral Clock and Event Output pin Select
  486. CLKEVPINbm = $80;
  487. // PORTCFG_EVOUTSEL
  488. EVOUTSELmask = $07;
  489. EVOUTSEL_0 = $00;
  490. EVOUTSEL_1 = $01;
  491. EVOUTSEL_2 = $02;
  492. EVOUTSEL_3 = $03;
  493. end;
  494. TCRC = object //Cyclic Redundancy Checker
  495. CTRL: byte; //Control Register
  496. STATUS: byte; //Status Register
  497. Reserved2: byte;
  498. DATAIN: byte; //Data Input
  499. CHECKSUM0: byte; //Checksum byte 0
  500. CHECKSUM1: byte; //Checksum byte 1
  501. CHECKSUM2: byte; //Checksum byte 2
  502. CHECKSUM3: byte; //Checksum byte 3
  503. const
  504. // CRC_RESET
  505. RESETmask = $C0;
  506. RESET_NO = $00;
  507. RESET_RESET0 = $80;
  508. RESET_RESET1 = $C0;
  509. // CRC Mode
  510. CRC32bm = $20;
  511. // CRC_SOURCE
  512. SOURCEmask = $0F;
  513. SOURCE_DISABLE = $00;
  514. SOURCE_IO = $01;
  515. SOURCE_FLASH = $02;
  516. // Zero detection
  517. ZERObm = $02;
  518. // Busy
  519. BUSYbm = $01;
  520. end;
  521. TEVSYS = object //Event System
  522. CH0MUX: byte; //Event Channel 0 Multiplexer
  523. CH1MUX: byte; //Event Channel 1 Multiplexer
  524. CH2MUX: byte; //Event Channel 2 Multiplexer
  525. CH3MUX: byte; //Event Channel 3 Multiplexer
  526. Reserved4: byte;
  527. Reserved5: byte;
  528. Reserved6: byte;
  529. Reserved7: byte;
  530. CH0CTRL: byte; //Channel 0 Control Register
  531. CH1CTRL: byte; //Channel 1 Control Register
  532. CH2CTRL: byte; //Channel 2 Control Register
  533. CH3CTRL: byte; //Channel 3 Control Register
  534. Reserved12: byte;
  535. Reserved13: byte;
  536. Reserved14: byte;
  537. Reserved15: byte;
  538. STROBE: byte; //Event Strobe
  539. DATA: byte; //Event Data
  540. const
  541. // EVSYS_CHMUX
  542. CHMUXmask = $FF;
  543. CHMUX_OFF = $00;
  544. CHMUX_RTC_OVF = $08;
  545. CHMUX_RTC_CMP = $09;
  546. CHMUX_USB = $0A;
  547. CHMUX_ACA_CH0 = $10;
  548. CHMUX_ACA_CH1 = $11;
  549. CHMUX_ACA_WIN = $12;
  550. CHMUX_ADCA_CH0 = $20;
  551. CHMUX_PORTA_PIN0 = $50;
  552. CHMUX_PORTA_PIN1 = $51;
  553. CHMUX_PORTA_PIN2 = $52;
  554. CHMUX_PORTA_PIN3 = $53;
  555. CHMUX_PORTA_PIN4 = $54;
  556. CHMUX_PORTA_PIN5 = $55;
  557. CHMUX_PORTA_PIN6 = $56;
  558. CHMUX_PORTA_PIN7 = $57;
  559. CHMUX_PORTB_PIN0 = $58;
  560. CHMUX_PORTB_PIN1 = $59;
  561. CHMUX_PORTB_PIN2 = $5A;
  562. CHMUX_PORTB_PIN3 = $5B;
  563. CHMUX_PORTB_PIN4 = $5C;
  564. CHMUX_PORTB_PIN5 = $5D;
  565. CHMUX_PORTB_PIN6 = $5E;
  566. CHMUX_PORTB_PIN7 = $5F;
  567. CHMUX_PORTC_PIN0 = $60;
  568. CHMUX_PORTC_PIN1 = $61;
  569. CHMUX_PORTC_PIN2 = $62;
  570. CHMUX_PORTC_PIN3 = $63;
  571. CHMUX_PORTC_PIN4 = $64;
  572. CHMUX_PORTC_PIN5 = $65;
  573. CHMUX_PORTC_PIN6 = $66;
  574. CHMUX_PORTC_PIN7 = $67;
  575. CHMUX_PORTD_PIN0 = $68;
  576. CHMUX_PORTD_PIN1 = $69;
  577. CHMUX_PORTD_PIN2 = $6A;
  578. CHMUX_PORTD_PIN3 = $6B;
  579. CHMUX_PORTD_PIN4 = $6C;
  580. CHMUX_PORTD_PIN5 = $6D;
  581. CHMUX_PORTD_PIN6 = $6E;
  582. CHMUX_PORTD_PIN7 = $6F;
  583. CHMUX_PORTE_PIN0 = $70;
  584. CHMUX_PORTE_PIN1 = $71;
  585. CHMUX_PORTE_PIN2 = $72;
  586. CHMUX_PORTE_PIN3 = $73;
  587. CHMUX_PORTE_PIN4 = $74;
  588. CHMUX_PORTE_PIN5 = $75;
  589. CHMUX_PORTE_PIN6 = $76;
  590. CHMUX_PORTE_PIN7 = $77;
  591. CHMUX_PORTF_PIN0 = $78;
  592. CHMUX_PORTF_PIN1 = $79;
  593. CHMUX_PORTF_PIN2 = $7A;
  594. CHMUX_PORTF_PIN3 = $7B;
  595. CHMUX_PORTF_PIN4 = $7C;
  596. CHMUX_PORTF_PIN5 = $7D;
  597. CHMUX_PORTF_PIN6 = $7E;
  598. CHMUX_PORTF_PIN7 = $7F;
  599. CHMUX_PRESCALER_1 = $80;
  600. CHMUX_PRESCALER_2 = $81;
  601. CHMUX_PRESCALER_4 = $82;
  602. CHMUX_PRESCALER_8 = $83;
  603. CHMUX_PRESCALER_16 = $84;
  604. CHMUX_PRESCALER_32 = $85;
  605. CHMUX_PRESCALER_64 = $86;
  606. CHMUX_PRESCALER_128 = $87;
  607. CHMUX_PRESCALER_256 = $88;
  608. CHMUX_PRESCALER_512 = $89;
  609. CHMUX_PRESCALER_1024 = $8A;
  610. CHMUX_PRESCALER_2048 = $8B;
  611. CHMUX_PRESCALER_4096 = $8C;
  612. CHMUX_PRESCALER_8192 = $8D;
  613. CHMUX_PRESCALER_16384 = $8E;
  614. CHMUX_PRESCALER_32768 = $8F;
  615. CHMUX_TCC0_OVF = $C0;
  616. CHMUX_TCC0_ERR = $C1;
  617. CHMUX_TCC0_CCA = $C4;
  618. CHMUX_TCC0_CCB = $C5;
  619. CHMUX_TCC0_CCC = $C6;
  620. CHMUX_TCC0_CCD = $C7;
  621. CHMUX_TCC1_OVF = $C8;
  622. CHMUX_TCC1_ERR = $C9;
  623. CHMUX_TCC1_CCA = $CC;
  624. CHMUX_TCC1_CCB = $CD;
  625. CHMUX_TCD0_OVF = $D0;
  626. CHMUX_TCD0_ERR = $D1;
  627. CHMUX_TCD0_CCA = $D4;
  628. CHMUX_TCD0_CCB = $D5;
  629. CHMUX_TCD0_CCC = $D6;
  630. CHMUX_TCD0_CCD = $D7;
  631. CHMUX_TCE0_OVF = $E0;
  632. CHMUX_TCE0_ERR = $E1;
  633. CHMUX_TCE0_CCA = $E4;
  634. CHMUX_TCE0_CCB = $E5;
  635. CHMUX_TCE0_CCC = $E6;
  636. CHMUX_TCE0_CCD = $E7;
  637. CHMUX_TCF0_OVF = $F0;
  638. CHMUX_TCF0_ERR = $F1;
  639. CHMUX_TCF0_CCA = $F4;
  640. CHMUX_TCF0_CCB = $F5;
  641. CHMUX_TCF0_CCC = $F6;
  642. CHMUX_TCF0_CCD = $F7;
  643. // EVSYS_QDIRM
  644. QDIRMmask = $60;
  645. QDIRM_00 = $00;
  646. QDIRM_01 = $20;
  647. QDIRM_10 = $40;
  648. QDIRM_11 = $60;
  649. // Quadrature Decoder Index Enable
  650. QDIENbm = $10;
  651. // Quadrature Decoder Enable
  652. QDENbm = $08;
  653. // EVSYS_DIGFILT
  654. DIGFILTmask = $07;
  655. DIGFILT_1SAMPLE = $00;
  656. DIGFILT_2SAMPLES = $01;
  657. DIGFILT_3SAMPLES = $02;
  658. DIGFILT_4SAMPLES = $03;
  659. DIGFILT_5SAMPLES = $04;
  660. DIGFILT_6SAMPLES = $05;
  661. DIGFILT_7SAMPLES = $06;
  662. DIGFILT_8SAMPLES = $07;
  663. end;
  664. TNVM = object //Non-volatile Memory Controller
  665. ADDR0: byte; //Address Register 0
  666. ADDR1: byte; //Address Register 1
  667. ADDR2: byte; //Address Register 2
  668. Reserved3: byte;
  669. DATA0: byte; //Data Register 0
  670. DATA1: byte; //Data Register 1
  671. DATA2: byte; //Data Register 2
  672. Reserved7: byte;
  673. Reserved8: byte;
  674. Reserved9: byte;
  675. CMD: byte; //Command
  676. CTRLA: byte; //Control Register A
  677. CTRLB: byte; //Control Register B
  678. INTCTRL: byte; //Interrupt Control
  679. Reserved14: byte;
  680. STATUS: byte; //Status
  681. LOCKBITS: byte; //Lock Bits
  682. const
  683. // NVM_CMD
  684. CMDmask = $7F;
  685. CMD_NO_OPERATION = $00;
  686. CMD_READ_USER_SIG_ROW = $01;
  687. CMD_READ_CALIB_ROW = $02;
  688. CMD_READ_EEPROM = $06;
  689. CMD_READ_FUSES = $07;
  690. CMD_WRITE_LOCK_BITS = $08;
  691. CMD_ERASE_USER_SIG_ROW = $18;
  692. CMD_WRITE_USER_SIG_ROW = $1A;
  693. CMD_ERASE_APP = $20;
  694. CMD_ERASE_APP_PAGE = $22;
  695. CMD_LOAD_FLASH_BUFFER = $23;
  696. CMD_WRITE_APP_PAGE = $24;
  697. CMD_ERASE_WRITE_APP_PAGE = $25;
  698. CMD_ERASE_FLASH_BUFFER = $26;
  699. CMD_ERASE_BOOT_PAGE = $2A;
  700. CMD_ERASE_FLASH_PAGE = $2B;
  701. CMD_WRITE_BOOT_PAGE = $2C;
  702. CMD_ERASE_WRITE_BOOT_PAGE = $2D;
  703. CMD_WRITE_FLASH_PAGE = $2E;
  704. CMD_ERASE_WRITE_FLASH_PAGE = $2F;
  705. CMD_ERASE_EEPROM = $30;
  706. CMD_ERASE_EEPROM_PAGE = $32;
  707. CMD_LOAD_EEPROM_BUFFER = $33;
  708. CMD_WRITE_EEPROM_PAGE = $34;
  709. CMD_ERASE_WRITE_EEPROM_PAGE = $35;
  710. CMD_ERASE_EEPROM_BUFFER = $36;
  711. CMD_APP_CRC = $38;
  712. CMD_BOOT_CRC = $39;
  713. CMD_FLASH_RANGE_CRC = $3A;
  714. CMD_CHIP_ERASE = $40;
  715. CMD_READ_NVM = $43;
  716. CMD_WRITE_FUSE = $4C;
  717. CMD_ERASE_BOOT = $68;
  718. CMD_FLASH_CRC = $78;
  719. // Command Execute
  720. CMDEXbm = $01;
  721. // EEPROM Mapping Enable
  722. EEMAPENbm = $08;
  723. // Flash Power Reduction Enable
  724. FPRMbm = $04;
  725. // EEPROM Power Reduction Enable
  726. EPRMbm = $02;
  727. // SPM Lock
  728. SPMLOCKbm = $01;
  729. // NVM_SPMLVL
  730. SPMLVLmask = $0C;
  731. SPMLVL_OFF = $00;
  732. SPMLVL_LO = $04;
  733. SPMLVL_MED = $08;
  734. SPMLVL_HI = $0C;
  735. // NVM_EELVL
  736. EELVLmask = $03;
  737. EELVL_OFF = $00;
  738. EELVL_LO = $01;
  739. EELVL_MED = $02;
  740. EELVL_HI = $03;
  741. // Non-volatile Memory Busy
  742. NVMBUSYbm = $80;
  743. // Flash Memory Busy
  744. FBUSYbm = $40;
  745. // EEPROM Page Buffer Active Loading
  746. EELOADbm = $02;
  747. // Flash Page Buffer Active Loading
  748. FLOADbm = $01;
  749. // NVM_BLBB
  750. BLBBmask = $C0;
  751. BLBB_RWLOCK = $00;
  752. BLBB_RLOCK = $40;
  753. BLBB_WLOCK = $80;
  754. BLBB_NOLOCK = $C0;
  755. // NVM_BLBA
  756. BLBAmask = $30;
  757. BLBA_RWLOCK = $00;
  758. BLBA_RLOCK = $10;
  759. BLBA_WLOCK = $20;
  760. BLBA_NOLOCK = $30;
  761. // NVM_BLBAT
  762. BLBATmask = $0C;
  763. BLBAT_RWLOCK = $00;
  764. BLBAT_RLOCK = $04;
  765. BLBAT_WLOCK = $08;
  766. BLBAT_NOLOCK = $0C;
  767. // NVM_LB
  768. LBmask = $03;
  769. LB_RWLOCK = $00;
  770. LB_WLOCK = $02;
  771. LB_NOLOCK = $03;
  772. end;
  773. TADC_CH = object //ADC Channel
  774. CTRL: byte; //Control Register
  775. MUXCTRL: byte; //MUX Control
  776. INTCTRL: byte; //Channel Interrupt Control Register
  777. INTFLAGS: byte; //Interrupt Flags
  778. RES: word; //Channel Result
  779. SCAN: byte; //Input Channel Scan
  780. const
  781. // Channel Start Conversion
  782. STARTbm = $80;
  783. // GAIN
  784. GAINmask = $1C;
  785. GAIN1X = $00;
  786. GAIN2X = $04;
  787. GAIN4X = $08;
  788. GAIN8X = $0C;
  789. GAIN16X = $10;
  790. GAIN32X = $14;
  791. GAIN64X = $18;
  792. GAINDIV2 = $1C;
  793. // INPUTMODE
  794. INPUTMODEmask = $03;
  795. INPUTMODEINTERNAL = $00;
  796. INPUTMODESINGLEENDED = $01;
  797. INPUTMODEDIFF = $02;
  798. INPUTMODEDIFFWGAIN = $03;
  799. // MUXPOS
  800. MUXPOSmask = $78;
  801. MUXPOSPIN0 = $00;
  802. MUXPOSPIN1 = $08;
  803. MUXPOSPIN2 = $10;
  804. MUXPOSPIN3 = $18;
  805. MUXPOSPIN4 = $20;
  806. MUXPOSPIN5 = $28;
  807. MUXPOSPIN6 = $30;
  808. MUXPOSPIN7 = $38;
  809. MUXPOSPIN8 = $40;
  810. MUXPOSPIN9 = $48;
  811. MUXPOSPIN10 = $50;
  812. MUXPOSPIN11 = $58;
  813. MUXPOSPIN12 = $60;
  814. MUXPOSPIN13 = $68;
  815. MUXPOSPIN14 = $70;
  816. MUXPOSPIN15 = $78;
  817. // MUXINT
  818. MUXINTmask = $78;
  819. MUXINTTEMP = $00;
  820. MUXINTBANDGAP = $08;
  821. MUXINTSCALEDVCC = $10;
  822. // MUXNEG
  823. MUXNEGmask = $07;
  824. MUXNEGPIN0 = $00;
  825. MUXNEGPIN1 = $01;
  826. MUXNEGPIN2 = $02;
  827. MUXNEGPIN3 = $03;
  828. MUXNEGPIN4 = $00;
  829. MUXNEGPIN5 = $01;
  830. MUXNEGPIN6 = $02;
  831. MUXNEGPIN7 = $03;
  832. MUXNEGGND_MODE3 = $05;
  833. MUXNEGINTGND_MODE3 = $07;
  834. MUXNEGINTGND_MODE4 = $04;
  835. MUXNEGGND_MODE4 = $07;
  836. // MUXNEGL
  837. MUXNEGLmask = $07;
  838. MUXNEGLPIN0 = $00;
  839. MUXNEGLPIN1 = $01;
  840. MUXNEGLPIN2 = $02;
  841. MUXNEGLPIN3 = $03;
  842. MUXNEGLGND = $05;
  843. MUXNEGLINTGND = $07;
  844. // MUXNEGH
  845. MUXNEGHmask = $07;
  846. MUXNEGHPIN4 = $00;
  847. MUXNEGHPIN5 = $01;
  848. MUXNEGHPIN6 = $02;
  849. MUXNEGHPIN7 = $03;
  850. MUXNEGHINTGND = $04;
  851. MUXNEGHGND = $07;
  852. // INTMODE
  853. INTMODEmask = $0C;
  854. INTMODECOMPLETE = $00;
  855. INTMODEBELOW = $04;
  856. INTMODEABOVE = $0C;
  857. // INTLVL
  858. INTLVLmask = $03;
  859. INTLVLOFF = $00;
  860. INTLVLLO = $01;
  861. INTLVLMED = $02;
  862. INTLVLHI = $03;
  863. // Channel Interrupt Flag
  864. CHIFbm = $01;
  865. // Positive MUX setting offset
  866. OFFSET0bm = $10;
  867. OFFSET1bm = $20;
  868. OFFSET2bm = $40;
  869. OFFSET3bm = $80;
  870. // Number of Channels included in scan
  871. SCANNUM0bm = $01;
  872. SCANNUM1bm = $02;
  873. SCANNUM2bm = $04;
  874. SCANNUM3bm = $08;
  875. // Number of Channels included in scan
  876. COUNT0bm = $01;
  877. COUNT1bm = $02;
  878. COUNT2bm = $04;
  879. COUNT3bm = $08;
  880. end;
  881. TADC = object //Analog-to-Digital Converter
  882. CTRLA: byte; //Control Register A
  883. CTRLB: byte; //Control Register B
  884. REFCTRL: byte; //Reference Control
  885. EVCTRL: byte; //Event Control
  886. PRESCALER: byte; //Clock Prescaler
  887. Reserved5: byte;
  888. INTFLAGS: byte; //Interrupt Flags
  889. TEMP: byte; //Temporary Register
  890. Reserved8: byte;
  891. Reserved9: byte;
  892. Reserved10: byte;
  893. Reserved11: byte;
  894. CAL: word; //Calibration Value
  895. Reserved14: byte;
  896. Reserved15: byte;
  897. CH0RES: word; //Channel 0 Result
  898. Reserved18: byte;
  899. Reserved19: byte;
  900. Reserved20: byte;
  901. Reserved21: byte;
  902. Reserved22: byte;
  903. Reserved23: byte;
  904. CMP: word; //Compare Value
  905. Reserved26: byte;
  906. Reserved27: byte;
  907. Reserved28: byte;
  908. Reserved29: byte;
  909. Reserved30: byte;
  910. Reserved31: byte;
  911. CH0: TADC_CH; //ADC Channel 0
  912. const
  913. // Channel 0 Start Conversion
  914. CH0STARTbm = $04;
  915. // ADC Flush
  916. FLUSHbm = $02;
  917. // Enable ADC
  918. ENABLEbm = $01;
  919. // ADC_CURRLIMIT
  920. CURRLIMITmask = $60;
  921. CURRLIMIT_NO = $00;
  922. CURRLIMIT_LOW = $20;
  923. CURRLIMIT_MED = $40;
  924. CURRLIMIT_HIGH = $60;
  925. // Conversion Mode
  926. CONMODEbm = $10;
  927. // Free Running Mode Enable
  928. FREERUNbm = $08;
  929. // ADC_RESOLUTION
  930. RESOLUTIONmask = $06;
  931. RESOLUTION_12BIT = $00;
  932. RESOLUTION_8BIT = $04;
  933. RESOLUTION_LEFT12BIT = $06;
  934. // ADC_REFSEL
  935. REFSELmask = $70;
  936. REFSEL_INT1V = $00;
  937. REFSEL_INTVCC = $10;
  938. REFSEL_AREFA = $20;
  939. REFSEL_AREFB = $30;
  940. REFSEL_INTVCC2 = $40;
  941. // Bandgap enable
  942. BANDGAPbm = $02;
  943. // Temperature Reference Enable
  944. TEMPREFbm = $01;
  945. // ADC_EVSEL
  946. EVSELmask = $18;
  947. EVSEL_0 = $00;
  948. EVSEL_1 = $08;
  949. EVSEL_2 = $10;
  950. EVSEL_3 = $18;
  951. // ADC_EVACT
  952. EVACTmask = $07;
  953. EVACT_NONE = $00;
  954. EVACT_CH0 = $01;
  955. EVACT_SYNCSWEEP = $06;
  956. // ADC_PRESCALER
  957. PRESCALERmask = $07;
  958. PRESCALER_DIV4 = $00;
  959. PRESCALER_DIV8 = $01;
  960. PRESCALER_DIV16 = $02;
  961. PRESCALER_DIV32 = $03;
  962. PRESCALER_DIV64 = $04;
  963. PRESCALER_DIV128 = $05;
  964. PRESCALER_DIV256 = $06;
  965. PRESCALER_DIV512 = $07;
  966. // Channel 0 Interrupt Flag
  967. CH0IFbm = $01;
  968. end;
  969. TAC = object //Analog Comparator
  970. AC0CTRL: byte; //Analog Comparator 0 Control
  971. AC1CTRL: byte; //Analog Comparator 1 Control
  972. AC0MUXCTRL: byte; //Analog Comparator 0 MUX Control
  973. AC1MUXCTRL: byte; //Analog Comparator 1 MUX Control
  974. CTRLA: byte; //Control Register A
  975. CTRLB: byte; //Control Register B
  976. WINCTRL: byte; //Window Mode Control
  977. STATUS: byte; //Status
  978. const
  979. // AC_INTMODE
  980. INTMODEmask = $C0;
  981. INTMODE_BOTHEDGES = $00;
  982. INTMODE_FALLING = $80;
  983. INTMODE_RISING = $C0;
  984. // AC_INTLVL
  985. INTLVLmask = $30;
  986. INTLVL_OFF = $00;
  987. INTLVL_LO = $10;
  988. INTLVL_MED = $20;
  989. INTLVL_HI = $30;
  990. // AC_HYSMODE
  991. HYSMODEmask = $06;
  992. HYSMODE_NO = $00;
  993. HYSMODE_SMALL = $02;
  994. HYSMODE_LARGE = $04;
  995. // Enable
  996. ENABLEbm = $01;
  997. // AC_MUXPOS
  998. MUXPOSmask = $38;
  999. MUXPOS_PIN0 = $00;
  1000. MUXPOS_PIN1 = $08;
  1001. MUXPOS_PIN2 = $10;
  1002. MUXPOS_PIN3 = $18;
  1003. MUXPOS_PIN4 = $20;
  1004. MUXPOS_PIN5 = $28;
  1005. MUXPOS_PIN6 = $30;
  1006. // AC_MUXNEG
  1007. MUXNEGmask = $07;
  1008. MUXNEG_PIN0 = $00;
  1009. MUXNEG_PIN1 = $01;
  1010. MUXNEG_PIN3 = $02;
  1011. MUXNEG_PIN5 = $03;
  1012. MUXNEG_PIN7 = $04;
  1013. MUXNEG_BANDGAP = $06;
  1014. MUXNEG_SCALER = $07;
  1015. // Analog Comparator 1 Output Enable
  1016. AC1OUTbm = $02;
  1017. // Analog Comparator 0 Output Enable
  1018. AC0OUTbm = $01;
  1019. // VCC Voltage Scaler Factor
  1020. SCALEFAC0bm = $01;
  1021. SCALEFAC1bm = $02;
  1022. SCALEFAC2bm = $04;
  1023. SCALEFAC3bm = $08;
  1024. SCALEFAC4bm = $10;
  1025. SCALEFAC5bm = $20;
  1026. // Window Mode Enable
  1027. WENbm = $10;
  1028. // AC_WINTMODE
  1029. WINTMODEmask = $0C;
  1030. WINTMODE_ABOVE = $00;
  1031. WINTMODE_INSIDE = $04;
  1032. WINTMODE_BELOW = $08;
  1033. WINTMODE_OUTSIDE = $0C;
  1034. // AC_WINTLVL
  1035. WINTLVLmask = $03;
  1036. WINTLVL_OFF = $00;
  1037. WINTLVL_LO = $01;
  1038. WINTLVL_MED = $02;
  1039. WINTLVL_HI = $03;
  1040. // AC_WSTATE
  1041. WSTATEmask = $C0;
  1042. WSTATE_ABOVE = $00;
  1043. WSTATE_INSIDE = $40;
  1044. WSTATE_BELOW = $80;
  1045. // Analog Comparator 1 State
  1046. AC1STATEbm = $20;
  1047. // Analog Comparator 0 State
  1048. AC0STATEbm = $10;
  1049. // Window Mode Interrupt Flag
  1050. WIFbm = $04;
  1051. // Analog Comparator 1 Interrupt Flag
  1052. AC1IFbm = $02;
  1053. // Analog Comparator 0 Interrupt Flag
  1054. AC0IFbm = $01;
  1055. end;
  1056. TRTC = object //Real-Time Counter
  1057. CTRL: byte; //Control Register
  1058. STATUS: byte; //Status Register
  1059. INTCTRL: byte; //Interrupt Control Register
  1060. INTFLAGS: byte; //Interrupt Flags
  1061. TEMP: byte; //Temporary register
  1062. Reserved5: byte;
  1063. Reserved6: byte;
  1064. Reserved7: byte;
  1065. CNT: word; //Count Register
  1066. PER: word; //Period Register
  1067. COMP: word; //Compare Register
  1068. const
  1069. // RTC_PRESCALER
  1070. PRESCALERmask = $07;
  1071. PRESCALER_OFF = $00;
  1072. PRESCALER_DIV1 = $01;
  1073. PRESCALER_DIV2 = $02;
  1074. PRESCALER_DIV8 = $03;
  1075. PRESCALER_DIV16 = $04;
  1076. PRESCALER_DIV64 = $05;
  1077. PRESCALER_DIV256 = $06;
  1078. PRESCALER_DIV1024 = $07;
  1079. // Synchronization Busy Flag
  1080. SYNCBUSYbm = $01;
  1081. // RTC_COMPINTLVL
  1082. COMPINTLVLmask = $0C;
  1083. COMPINTLVL_OFF = $00;
  1084. COMPINTLVL_LO = $04;
  1085. COMPINTLVL_MED = $08;
  1086. COMPINTLVL_HI = $0C;
  1087. // RTC_OVFINTLVL
  1088. OVFINTLVLmask = $03;
  1089. OVFINTLVL_OFF = $00;
  1090. OVFINTLVL_LO = $01;
  1091. OVFINTLVL_MED = $02;
  1092. OVFINTLVL_HI = $03;
  1093. // Compare Match Interrupt Flag
  1094. COMPIFbm = $02;
  1095. // Overflow Interrupt Flag
  1096. OVFIFbm = $01;
  1097. end;
  1098. TTWI_MASTER = object //
  1099. CTRLA: byte; //Control Register A
  1100. CTRLB: byte; //Control Register B
  1101. CTRLC: byte; //Control Register C
  1102. STATUS: byte; //Status Register
  1103. BAUD: byte; //Baud Rate Control Register
  1104. ADDR: byte; //Address Register
  1105. DATA: byte; //Data Register
  1106. const
  1107. // INTLVL
  1108. INTLVLmask = $C0;
  1109. INTLVLOFF = $00;
  1110. INTLVLLO = $40;
  1111. INTLVLMED = $80;
  1112. INTLVLHI = $C0;
  1113. // Read Interrupt Enable
  1114. RIENbm = $20;
  1115. // Write Interrupt Enable
  1116. WIENbm = $10;
  1117. // Enable TWI Master
  1118. ENABLEbm = $08;
  1119. // TIMEOUT
  1120. TIMEOUTmask = $0C;
  1121. TIMEOUTDISABLED = $00;
  1122. TIMEOUT50US = $04;
  1123. TIMEOUT100US = $08;
  1124. TIMEOUT200US = $0C;
  1125. // Quick Command Enable
  1126. QCENbm = $02;
  1127. // Smart Mode Enable
  1128. SMENbm = $01;
  1129. // Acknowledge Action
  1130. ACKACTbm = $04;
  1131. // CMD
  1132. CMDmask = $03;
  1133. CMDNOACT = $00;
  1134. CMDREPSTART = $01;
  1135. CMDRECVTRANS = $02;
  1136. CMDSTOP = $03;
  1137. // Read Interrupt Flag
  1138. RIFbm = $80;
  1139. // Write Interrupt Flag
  1140. WIFbm = $40;
  1141. // Clock Hold
  1142. CLKHOLDbm = $20;
  1143. // Received Acknowledge
  1144. RXACKbm = $10;
  1145. // Arbitration Lost
  1146. ARBLOSTbm = $08;
  1147. // Bus Error
  1148. BUSERRbm = $04;
  1149. // BUSSTATE
  1150. BUSSTATEmask = $03;
  1151. BUSSTATEUNKNOWN = $00;
  1152. BUSSTATEIDLE = $01;
  1153. BUSSTATEOWNER = $02;
  1154. BUSSTATEBUSY = $03;
  1155. end;
  1156. TTWI_SLAVE = object //
  1157. CTRLA: byte; //Control Register A
  1158. CTRLB: byte; //Control Register B
  1159. STATUS: byte; //Status Register
  1160. ADDR: byte; //Address Register
  1161. DATA: byte; //Data Register
  1162. ADDRMASK: byte; //Address Mask Register
  1163. const
  1164. // INTLVL
  1165. INTLVLmask = $C0;
  1166. INTLVLOFF = $00;
  1167. INTLVLLO = $40;
  1168. INTLVLMED = $80;
  1169. INTLVLHI = $C0;
  1170. // Data Interrupt Enable
  1171. DIENbm = $20;
  1172. // Address/Stop Interrupt Enable
  1173. APIENbm = $10;
  1174. // Enable TWI Slave
  1175. ENABLEbm = $08;
  1176. // Stop Interrupt Enable
  1177. PIENbm = $04;
  1178. // Promiscuous Mode Enable
  1179. PMENbm = $02;
  1180. // Smart Mode Enable
  1181. SMENbm = $01;
  1182. // Acknowledge Action
  1183. ACKACTbm = $04;
  1184. // CMD
  1185. CMDmask = $03;
  1186. CMDNOACT = $00;
  1187. CMDCOMPTRANS = $02;
  1188. CMDRESPONSE = $03;
  1189. // Data Interrupt Flag
  1190. DIFbm = $80;
  1191. // Address/Stop Interrupt Flag
  1192. APIFbm = $40;
  1193. // Clock Hold
  1194. CLKHOLDbm = $20;
  1195. // Received Acknowledge
  1196. RXACKbm = $10;
  1197. // Collision
  1198. COLLbm = $08;
  1199. // Bus Error
  1200. BUSERRbm = $04;
  1201. // Read/Write Direction
  1202. DIRbm = $02;
  1203. // Slave Address or Stop
  1204. APbm = $01;
  1205. // Address Mask
  1206. ADDRMASK0bm = $02;
  1207. ADDRMASK1bm = $04;
  1208. ADDRMASK2bm = $08;
  1209. ADDRMASK3bm = $10;
  1210. ADDRMASK4bm = $20;
  1211. ADDRMASK5bm = $40;
  1212. ADDRMASK6bm = $80;
  1213. // Address Enable
  1214. ADDRENbm = $01;
  1215. end;
  1216. TTWI = object //Two-Wire Interface
  1217. CTRL: byte; //TWI Common Control Register
  1218. MASTER: TTWI_MASTER; //TWI master module
  1219. SLAVE: TTWI_SLAVE; //TWI slave module
  1220. const
  1221. // TWI_SDAHOLD
  1222. SDAHOLDmask = $06;
  1223. SDAHOLD_OFF = $00;
  1224. SDAHOLD_50NS = $02;
  1225. SDAHOLD_300NS = $04;
  1226. SDAHOLD_400NS = $06;
  1227. // External Driver Interface Enable
  1228. EDIENbm = $01;
  1229. end;
  1230. TUSB_EP = object //USB Endpoint
  1231. STATUS: byte; //Endpoint Status
  1232. CTRL: byte; //Endpoint Control
  1233. CNT: word; //USB Endpoint Counter
  1234. DATAPTR: word; //Data Pointer
  1235. AUXDATA: word; //Auxiliary Data
  1236. const
  1237. // Endpoint Stall Flag
  1238. STALLFbm = $80;
  1239. // CRC Error Flag
  1240. CRCbm = $80;
  1241. // Underflow Endpoint FLag
  1242. UNFbm = $40;
  1243. // Overflow Endpoint Flag for Output Endpoints
  1244. OVFbm = $40;
  1245. // Transaction Complete 0 Flag
  1246. TRNCOMPL0bm = $20;
  1247. // Transaction Complete 1 Flag
  1248. TRNCOMPL1bm = $10;
  1249. // SETUP Transaction Complete Flag
  1250. SETUPbm = $10;
  1251. // Bank Select
  1252. BANKbm = $08;
  1253. // Data Buffer 1 Not Acknowledge
  1254. BUSNACK1bm = $04;
  1255. // Data Buffer 0 Not Acknowledge
  1256. BUSNACK0bm = $02;
  1257. // Data Toggle
  1258. TOGGLEbm = $01;
  1259. // TYPE
  1260. TYPEmask = $C0;
  1261. TYPEDISABLE = $00;
  1262. TYPECONTROL = $40;
  1263. TYPEBULK = $80;
  1264. TYPEISOCHRONOUS = $C0;
  1265. // Multi Packet Transfer Enable
  1266. MULTIPKTbm = $20;
  1267. // Ping-Pong Enable
  1268. PINGPONGbm = $10;
  1269. // Interrupt Disable
  1270. INTDSBLbm = $08;
  1271. // Data Stall
  1272. STALLbm = $04;
  1273. // BUFSIZE
  1274. BUFSIZEmask = $07;
  1275. BUFSIZE8 = $00;
  1276. BUFSIZE16 = $01;
  1277. BUFSIZE32 = $02;
  1278. BUFSIZE64 = $03;
  1279. BUFSIZE128 = $04;
  1280. BUFSIZE256 = $05;
  1281. BUFSIZE512 = $06;
  1282. BUFSIZE1023 = $07;
  1283. end;
  1284. TUSB = object //Universal Serial Bus
  1285. CTRLA: byte; //Control Register A
  1286. CTRLB: byte; //Control Register B
  1287. STATUS: byte; //Status Register
  1288. ADDR: byte; //Address Register
  1289. FIFOWP: byte; //FIFO Write Pointer Register
  1290. FIFORP: byte; //FIFO Read Pointer Register
  1291. EPPTR: word; //Endpoint Configuration Table Pointer
  1292. INTCTRLA: byte; //Interrupt Control Register A
  1293. INTCTRLB: byte; //Interrupt Control Register B
  1294. INTFLAGSACLR: byte; //Clear Interrupt Flag Register A
  1295. INTFLAGSASET: byte; //Set Interrupt Flag Register A
  1296. INTFLAGSBCLR: byte; //Clear Interrupt Flag Register B
  1297. INTFLAGSBSET: byte; //Set Interrupt Flag Register B
  1298. Reserved14: byte;
  1299. Reserved15: byte;
  1300. Reserved16: byte;
  1301. Reserved17: byte;
  1302. Reserved18: byte;
  1303. Reserved19: byte;
  1304. Reserved20: byte;
  1305. Reserved21: byte;
  1306. Reserved22: byte;
  1307. Reserved23: byte;
  1308. Reserved24: byte;
  1309. Reserved25: byte;
  1310. Reserved26: byte;
  1311. Reserved27: byte;
  1312. Reserved28: byte;
  1313. Reserved29: byte;
  1314. Reserved30: byte;
  1315. Reserved31: byte;
  1316. Reserved32: byte;
  1317. Reserved33: byte;
  1318. Reserved34: byte;
  1319. Reserved35: byte;
  1320. Reserved36: byte;
  1321. Reserved37: byte;
  1322. Reserved38: byte;
  1323. Reserved39: byte;
  1324. Reserved40: byte;
  1325. Reserved41: byte;
  1326. Reserved42: byte;
  1327. Reserved43: byte;
  1328. Reserved44: byte;
  1329. Reserved45: byte;
  1330. Reserved46: byte;
  1331. Reserved47: byte;
  1332. Reserved48: byte;
  1333. Reserved49: byte;
  1334. Reserved50: byte;
  1335. Reserved51: byte;
  1336. Reserved52: byte;
  1337. Reserved53: byte;
  1338. Reserved54: byte;
  1339. Reserved55: byte;
  1340. Reserved56: byte;
  1341. Reserved57: byte;
  1342. CAL0: byte; //Calibration Byte 0
  1343. CAL1: byte; //Calibration Byte 1
  1344. const
  1345. // USB Enable
  1346. ENABLEbm = $80;
  1347. // Speed Select
  1348. SPEEDbm = $40;
  1349. // USB FIFO Enable
  1350. FIFOENbm = $20;
  1351. // Store Frame Number Enable
  1352. STFRNUMbm = $10;
  1353. // Maximum Endpoint Addresses
  1354. MAXEP0bm = $01;
  1355. MAXEP1bm = $02;
  1356. MAXEP2bm = $04;
  1357. MAXEP3bm = $08;
  1358. // Pull during Reset
  1359. PULLRSTbm = $10;
  1360. // Remote Wake-up
  1361. RWAKEUPbm = $04;
  1362. // Global NACK
  1363. GNACKbm = $02;
  1364. // Attach
  1365. ATTACHbm = $01;
  1366. // Upstream Resume
  1367. URESUMEbm = $08;
  1368. // Resume
  1369. RESUMEbm = $04;
  1370. // Bus Suspended
  1371. SUSPENDbm = $02;
  1372. // Bus Reset
  1373. BUSRSTbm = $01;
  1374. // Device Address
  1375. ADDR0bm = $01;
  1376. ADDR1bm = $02;
  1377. ADDR2bm = $04;
  1378. ADDR3bm = $08;
  1379. ADDR4bm = $10;
  1380. ADDR5bm = $20;
  1381. ADDR6bm = $40;
  1382. // FIFO Write Pointer
  1383. FIFOWP0bm = $01;
  1384. FIFOWP1bm = $02;
  1385. FIFOWP2bm = $04;
  1386. FIFOWP3bm = $08;
  1387. FIFOWP4bm = $10;
  1388. // FIFO Read Pointer
  1389. FIFORP0bm = $01;
  1390. FIFORP1bm = $02;
  1391. FIFORP2bm = $04;
  1392. FIFORP3bm = $08;
  1393. FIFORP4bm = $10;
  1394. // Start Of Frame Interrupt Enable
  1395. SOFIEbm = $80;
  1396. // Bus Event Interrupt Enable
  1397. BUSEVIEbm = $40;
  1398. // Bus Error Interrupt Enable
  1399. BUSERRIEbm = $20;
  1400. // STALL Interrupt Enable
  1401. STALLIEbm = $10;
  1402. // USB_INTLVL
  1403. INTLVLmask = $03;
  1404. INTLVL_OFF = $00;
  1405. INTLVL_LO = $01;
  1406. INTLVL_MED = $02;
  1407. INTLVL_HI = $03;
  1408. // Transaction Complete Interrupt Enable
  1409. TRNIEbm = $02;
  1410. // SETUP Transaction Complete Interrupt Enable
  1411. SETUPIEbm = $01;
  1412. // Start Of Frame Interrupt Flag
  1413. SOFIFbm = $80;
  1414. // Suspend Interrupt Flag
  1415. SUSPENDIFbm = $40;
  1416. // Resume Interrupt Flag
  1417. RESUMEIFbm = $20;
  1418. // Reset Interrupt Flag
  1419. RSTIFbm = $10;
  1420. // Isochronous CRC Error Interrupt Flag
  1421. CRCIFbm = $08;
  1422. // Underflow Interrupt Flag
  1423. UNFIFbm = $04;
  1424. // Overflow Interrupt Flag
  1425. OVFIFbm = $02;
  1426. // STALL Interrupt Flag
  1427. STALLIFbm = $01;
  1428. // Transaction Complete Interrupt Flag
  1429. TRNIFbm = $02;
  1430. // SETUP Transaction Complete Interrupt Flag
  1431. SETUPIFbm = $01;
  1432. end;
  1433. TUSB_EP_TABLE = object //USB Endpoint Table
  1434. EP0OUT: TUSB_EP; //Endpoint 0
  1435. EP0IN: TUSB_EP; //Endpoint 0
  1436. EP1OUT: TUSB_EP; //Endpoint 1
  1437. EP1IN: TUSB_EP; //Endpoint 1
  1438. EP2OUT: TUSB_EP; //Endpoint 2
  1439. EP2IN: TUSB_EP; //Endpoint 2
  1440. EP3OUT: TUSB_EP; //Endpoint 3
  1441. EP3IN: TUSB_EP; //Endpoint 3
  1442. EP4OUT: TUSB_EP; //Endpoint 4
  1443. EP4IN: TUSB_EP; //Endpoint 4
  1444. EP5OUT: TUSB_EP; //Endpoint 5
  1445. EP5IN: TUSB_EP; //Endpoint 5
  1446. EP6OUT: TUSB_EP; //Endpoint 6
  1447. EP6IN: TUSB_EP; //Endpoint 6
  1448. EP7OUT: TUSB_EP; //Endpoint 7
  1449. EP7IN: TUSB_EP; //Endpoint 7
  1450. EP8OUT: TUSB_EP; //Endpoint 8
  1451. EP8IN: TUSB_EP; //Endpoint 8
  1452. EP9OUT: TUSB_EP; //Endpoint 9
  1453. EP9IN: TUSB_EP; //Endpoint 9
  1454. EP10OUT: TUSB_EP; //Endpoint 10
  1455. EP10IN: TUSB_EP; //Endpoint 10
  1456. EP11OUT: TUSB_EP; //Endpoint 11
  1457. EP11IN: TUSB_EP; //Endpoint 11
  1458. EP12OUT: TUSB_EP; //Endpoint 12
  1459. EP12IN: TUSB_EP; //Endpoint 12
  1460. EP13OUT: TUSB_EP; //Endpoint 13
  1461. EP13IN: TUSB_EP; //Endpoint 13
  1462. EP14OUT: TUSB_EP; //Endpoint 14
  1463. EP14IN: TUSB_EP; //Endpoint 14
  1464. EP15OUT: TUSB_EP; //Endpoint 15
  1465. EP15IN: TUSB_EP; //Endpoint 15
  1466. Reserved256: byte;
  1467. Reserved257: byte;
  1468. Reserved258: byte;
  1469. Reserved259: byte;
  1470. Reserved260: byte;
  1471. Reserved261: byte;
  1472. Reserved262: byte;
  1473. Reserved263: byte;
  1474. Reserved264: byte;
  1475. Reserved265: byte;
  1476. Reserved266: byte;
  1477. Reserved267: byte;
  1478. Reserved268: byte;
  1479. Reserved269: byte;
  1480. Reserved270: byte;
  1481. Reserved271: byte;
  1482. FRAMENUML: byte; //Frame Number Low Byte
  1483. FRAMENUMH: byte; //Frame Number High Byte
  1484. end;
  1485. TPORT = object //I/O Ports
  1486. DIR: byte; //I/O Port Data Direction
  1487. DIRSET: byte; //I/O Port Data Direction Set
  1488. DIRCLR: byte; //I/O Port Data Direction Clear
  1489. DIRTGL: byte; //I/O Port Data Direction Toggle
  1490. OUT_: byte; //I/O Port Output
  1491. OUTSET: byte; //I/O Port Output Set
  1492. OUTCLR: byte; //I/O Port Output Clear
  1493. OUTTGL: byte; //I/O Port Output Toggle
  1494. IN_: byte; //I/O port Input
  1495. INTCTRL: byte; //Interrupt Control Register
  1496. INT0MASK: byte; //Port Interrupt 0 Mask
  1497. INT1MASK: byte; //Port Interrupt 1 Mask
  1498. INTFLAGS: byte; //Interrupt Flag Register
  1499. Reserved13: byte;
  1500. REMAP: byte; //I/O Port Pin Remap Register
  1501. Reserved15: byte;
  1502. PIN0CTRL: byte; //Pin 0 Control Register
  1503. PIN1CTRL: byte; //Pin 1 Control Register
  1504. PIN2CTRL: byte; //Pin 2 Control Register
  1505. PIN3CTRL: byte; //Pin 3 Control Register
  1506. PIN4CTRL: byte; //Pin 4 Control Register
  1507. PIN5CTRL: byte; //Pin 5 Control Register
  1508. PIN6CTRL: byte; //Pin 6 Control Register
  1509. PIN7CTRL: byte; //Pin 7 Control Register
  1510. const
  1511. // PORT_INT1LVL
  1512. INT1LVLmask = $0C;
  1513. INT1LVL_OFF = $00;
  1514. INT1LVL_LO = $04;
  1515. INT1LVL_MED = $08;
  1516. INT1LVL_HI = $0C;
  1517. // PORT_INT0LVL
  1518. INT0LVLmask = $03;
  1519. INT0LVL_OFF = $00;
  1520. INT0LVL_LO = $01;
  1521. INT0LVL_MED = $02;
  1522. INT0LVL_HI = $03;
  1523. // Port Interrupt 1 Flag
  1524. INT1IFbm = $02;
  1525. // Port Interrupt 0 Flag
  1526. INT0IFbm = $01;
  1527. // SPI
  1528. SPIbm = $20;
  1529. // USART0
  1530. USART0bm = $10;
  1531. // Timer/Counter 0 Output Compare D
  1532. TC0Dbm = $08;
  1533. // Timer/Counter 0 Output Compare C
  1534. TC0Cbm = $04;
  1535. // Timer/Counter 0 Output Compare B
  1536. TC0Bbm = $02;
  1537. // Timer/Counter 0 Output Compare A
  1538. TC0Abm = $01;
  1539. // Slew Rate Enable
  1540. SRLENbm = $80;
  1541. // Inverted I/O Enable
  1542. INVENbm = $40;
  1543. // PORT_OPC
  1544. OPCmask = $38;
  1545. OPC_TOTEM = $00;
  1546. OPC_BUSKEEPER = $08;
  1547. OPC_PULLDOWN = $10;
  1548. OPC_PULLUP = $18;
  1549. OPC_WIREDOR = $20;
  1550. OPC_WIREDAND = $28;
  1551. OPC_WIREDORPULL = $30;
  1552. OPC_WIREDANDPULL = $38;
  1553. // PORT_ISC
  1554. ISCmask = $07;
  1555. ISC_BOTHEDGES = $00;
  1556. ISC_RISING = $01;
  1557. ISC_FALLING = $02;
  1558. ISC_LEVEL = $03;
  1559. ISC_INPUT_DISABLE = $07;
  1560. end;
  1561. TTC0 = object //16-bit Timer/Counter 0
  1562. CTRLA: byte; //Control Register A
  1563. CTRLB: byte; //Control Register B
  1564. CTRLC: byte; //Control register C
  1565. CTRLD: byte; //Control Register D
  1566. CTRLE: byte; //Control Register E
  1567. Reserved5: byte;
  1568. INTCTRLA: byte; //Interrupt Control Register A
  1569. INTCTRLB: byte; //Interrupt Control Register B
  1570. CTRLFCLR: byte; //Control Register F Clear
  1571. CTRLFSET: byte; //Control Register F Set
  1572. CTRLGCLR: byte; //Control Register G Clear
  1573. CTRLGSET: byte; //Control Register G Set
  1574. INTFLAGS: byte; //Interrupt Flag Register
  1575. Reserved13: byte;
  1576. Reserved14: byte;
  1577. TEMP: byte; //Temporary Register For 16-bit Access
  1578. Reserved16: byte;
  1579. Reserved17: byte;
  1580. Reserved18: byte;
  1581. Reserved19: byte;
  1582. Reserved20: byte;
  1583. Reserved21: byte;
  1584. Reserved22: byte;
  1585. Reserved23: byte;
  1586. Reserved24: byte;
  1587. Reserved25: byte;
  1588. Reserved26: byte;
  1589. Reserved27: byte;
  1590. Reserved28: byte;
  1591. Reserved29: byte;
  1592. Reserved30: byte;
  1593. Reserved31: byte;
  1594. CNT: word; //Count
  1595. Reserved34: byte;
  1596. Reserved35: byte;
  1597. Reserved36: byte;
  1598. Reserved37: byte;
  1599. PER: word; //Period
  1600. CCA: word; //Compare or Capture A
  1601. CCB: word; //Compare or Capture B
  1602. CCC: word; //Compare or Capture C
  1603. CCD: word; //Compare or Capture D
  1604. Reserved48: byte;
  1605. Reserved49: byte;
  1606. Reserved50: byte;
  1607. Reserved51: byte;
  1608. Reserved52: byte;
  1609. Reserved53: byte;
  1610. PERBUF: word; //Period Buffer
  1611. CCABUF: word; //Compare Or Capture A Buffer
  1612. CCBBUF: word; //Compare Or Capture B Buffer
  1613. CCCBUF: word; //Compare Or Capture C Buffer
  1614. CCDBUF: word; //Compare Or Capture D Buffer
  1615. const
  1616. // TC_CLKSEL
  1617. CLKSELmask = $0F;
  1618. CLKSEL_OFF = $00;
  1619. CLKSEL_DIV1 = $01;
  1620. CLKSEL_DIV2 = $02;
  1621. CLKSEL_DIV4 = $03;
  1622. CLKSEL_DIV8 = $04;
  1623. CLKSEL_DIV64 = $05;
  1624. CLKSEL_DIV256 = $06;
  1625. CLKSEL_DIV1024 = $07;
  1626. CLKSEL_EVCH0 = $08;
  1627. CLKSEL_EVCH1 = $09;
  1628. CLKSEL_EVCH2 = $0A;
  1629. CLKSEL_EVCH3 = $0B;
  1630. // Compare or Capture D Enable
  1631. CCDENbm = $80;
  1632. // Compare or Capture C Enable
  1633. CCCENbm = $40;
  1634. // Compare or Capture B Enable
  1635. CCBENbm = $20;
  1636. // Compare or Capture A Enable
  1637. CCAENbm = $10;
  1638. // TC_WGMODE
  1639. WGMODEmask = $07;
  1640. WGMODE_NORMAL = $00;
  1641. WGMODE_FRQ = $01;
  1642. WGMODE_SINGLESLOPE = $03;
  1643. WGMODE_SS = $03;
  1644. WGMODE_DSTOP = $05;
  1645. WGMODE_DS_T = $05;
  1646. WGMODE_DSBOTH = $06;
  1647. WGMODE_DS_TB = $06;
  1648. WGMODE_DSBOTTOM = $07;
  1649. WGMODE_DS_B = $07;
  1650. // Compare D Output Value
  1651. CMPDbm = $08;
  1652. // Compare C Output Value
  1653. CMPCbm = $04;
  1654. // Compare B Output Value
  1655. CMPBbm = $02;
  1656. // Compare A Output Value
  1657. CMPAbm = $01;
  1658. // TC_EVACT
  1659. EVACTmask = $E0;
  1660. EVACT_OFF = $00;
  1661. EVACT_CAPT = $20;
  1662. EVACT_UPDOWN = $40;
  1663. EVACT_QDEC = $60;
  1664. EVACT_RESTART = $80;
  1665. EVACT_FRQ = $A0;
  1666. EVACT_PW = $C0;
  1667. // Event Delay
  1668. EVDLYbm = $10;
  1669. // TC_EVSEL
  1670. EVSELmask = $0F;
  1671. EVSEL_OFF = $00;
  1672. EVSEL_CH0 = $08;
  1673. EVSEL_CH1 = $09;
  1674. EVSEL_CH2 = $0A;
  1675. EVSEL_CH3 = $0B;
  1676. // TC_BYTEM
  1677. BYTEMmask = $03;
  1678. BYTEM_NORMAL = $00;
  1679. BYTEM_BYTEMODE = $01;
  1680. BYTEM_SPLITMODE = $02;
  1681. // TC_ERRINTLVL
  1682. ERRINTLVLmask = $0C;
  1683. ERRINTLVL_OFF = $00;
  1684. ERRINTLVL_LO = $04;
  1685. ERRINTLVL_MED = $08;
  1686. ERRINTLVL_HI = $0C;
  1687. // TC_OVFINTLVL
  1688. OVFINTLVLmask = $03;
  1689. OVFINTLVL_OFF = $00;
  1690. OVFINTLVL_LO = $01;
  1691. OVFINTLVL_MED = $02;
  1692. OVFINTLVL_HI = $03;
  1693. // TC_CCDINTLVL
  1694. CCDINTLVLmask = $C0;
  1695. CCDINTLVL_OFF = $00;
  1696. CCDINTLVL_LO = $40;
  1697. CCDINTLVL_MED = $80;
  1698. CCDINTLVL_HI = $C0;
  1699. // TC_CCCINTLVL
  1700. CCCINTLVLmask = $30;
  1701. CCCINTLVL_OFF = $00;
  1702. CCCINTLVL_LO = $10;
  1703. CCCINTLVL_MED = $20;
  1704. CCCINTLVL_HI = $30;
  1705. // TC_CCBINTLVL
  1706. CCBINTLVLmask = $0C;
  1707. CCBINTLVL_OFF = $00;
  1708. CCBINTLVL_LO = $04;
  1709. CCBINTLVL_MED = $08;
  1710. CCBINTLVL_HI = $0C;
  1711. // TC_CCAINTLVL
  1712. CCAINTLVLmask = $03;
  1713. CCAINTLVL_OFF = $00;
  1714. CCAINTLVL_LO = $01;
  1715. CCAINTLVL_MED = $02;
  1716. CCAINTLVL_HI = $03;
  1717. // Command
  1718. CMD0bm = $04;
  1719. CMD1bm = $08;
  1720. // Lock Update
  1721. LUPDbm = $02;
  1722. // Direction
  1723. DIRbm = $01;
  1724. // Compare or Capture D Buffer Valid
  1725. CCDBVbm = $10;
  1726. // Compare or Capture C Buffer Valid
  1727. CCCBVbm = $08;
  1728. // Compare or Capture B Buffer Valid
  1729. CCBBVbm = $04;
  1730. // Compare or Capture A Buffer Valid
  1731. CCABVbm = $02;
  1732. // Period Buffer Valid
  1733. PERBVbm = $01;
  1734. // Compare or Capture D Interrupt Flag
  1735. CCDIFbm = $80;
  1736. // Compare or Capture C Interrupt Flag
  1737. CCCIFbm = $40;
  1738. // Compare or Capture B Interrupt Flag
  1739. CCBIFbm = $20;
  1740. // Compare or Capture A Interrupt Flag
  1741. CCAIFbm = $10;
  1742. // Error Interrupt Flag
  1743. ERRIFbm = $02;
  1744. // Overflow Interrupt Flag
  1745. OVFIFbm = $01;
  1746. end;
  1747. TTC1 = object //16-bit Timer/Counter 1
  1748. CTRLA: byte; //Control Register A
  1749. CTRLB: byte; //Control Register B
  1750. CTRLC: byte; //Control register C
  1751. CTRLD: byte; //Control Register D
  1752. CTRLE: byte; //Control Register E
  1753. Reserved5: byte;
  1754. INTCTRLA: byte; //Interrupt Control Register A
  1755. INTCTRLB: byte; //Interrupt Control Register B
  1756. CTRLFCLR: byte; //Control Register F Clear
  1757. CTRLFSET: byte; //Control Register F Set
  1758. CTRLGCLR: byte; //Control Register G Clear
  1759. CTRLGSET: byte; //Control Register G Set
  1760. INTFLAGS: byte; //Interrupt Flag Register
  1761. Reserved13: byte;
  1762. Reserved14: byte;
  1763. TEMP: byte; //Temporary Register For 16-bit Access
  1764. Reserved16: byte;
  1765. Reserved17: byte;
  1766. Reserved18: byte;
  1767. Reserved19: byte;
  1768. Reserved20: byte;
  1769. Reserved21: byte;
  1770. Reserved22: byte;
  1771. Reserved23: byte;
  1772. Reserved24: byte;
  1773. Reserved25: byte;
  1774. Reserved26: byte;
  1775. Reserved27: byte;
  1776. Reserved28: byte;
  1777. Reserved29: byte;
  1778. Reserved30: byte;
  1779. Reserved31: byte;
  1780. CNT: word; //Count
  1781. Reserved34: byte;
  1782. Reserved35: byte;
  1783. Reserved36: byte;
  1784. Reserved37: byte;
  1785. PER: word; //Period
  1786. CCA: word; //Compare or Capture A
  1787. CCB: word; //Compare or Capture B
  1788. Reserved44: byte;
  1789. Reserved45: byte;
  1790. Reserved46: byte;
  1791. Reserved47: byte;
  1792. Reserved48: byte;
  1793. Reserved49: byte;
  1794. Reserved50: byte;
  1795. Reserved51: byte;
  1796. Reserved52: byte;
  1797. Reserved53: byte;
  1798. PERBUF: word; //Period Buffer
  1799. CCABUF: word; //Compare Or Capture A Buffer
  1800. CCBBUF: word; //Compare Or Capture B Buffer
  1801. const
  1802. // TC_CLKSEL
  1803. CLKSELmask = $0F;
  1804. CLKSEL_OFF = $00;
  1805. CLKSEL_DIV1 = $01;
  1806. CLKSEL_DIV2 = $02;
  1807. CLKSEL_DIV4 = $03;
  1808. CLKSEL_DIV8 = $04;
  1809. CLKSEL_DIV64 = $05;
  1810. CLKSEL_DIV256 = $06;
  1811. CLKSEL_DIV1024 = $07;
  1812. CLKSEL_EVCH0 = $08;
  1813. CLKSEL_EVCH1 = $09;
  1814. CLKSEL_EVCH2 = $0A;
  1815. CLKSEL_EVCH3 = $0B;
  1816. // Compare or Capture B Enable
  1817. CCBENbm = $20;
  1818. // Compare or Capture A Enable
  1819. CCAENbm = $10;
  1820. // TC_WGMODE
  1821. WGMODEmask = $07;
  1822. WGMODE_NORMAL = $00;
  1823. WGMODE_FRQ = $01;
  1824. WGMODE_SINGLESLOPE = $03;
  1825. WGMODE_SS = $03;
  1826. WGMODE_DSTOP = $05;
  1827. WGMODE_DS_T = $05;
  1828. WGMODE_DSBOTH = $06;
  1829. WGMODE_DS_TB = $06;
  1830. WGMODE_DSBOTTOM = $07;
  1831. WGMODE_DS_B = $07;
  1832. // Compare B Output Value
  1833. CMPBbm = $02;
  1834. // Compare A Output Value
  1835. CMPAbm = $01;
  1836. // TC_EVACT
  1837. EVACTmask = $E0;
  1838. EVACT_OFF = $00;
  1839. EVACT_CAPT = $20;
  1840. EVACT_UPDOWN = $40;
  1841. EVACT_QDEC = $60;
  1842. EVACT_RESTART = $80;
  1843. EVACT_FRQ = $A0;
  1844. EVACT_PW = $C0;
  1845. // Event Delay
  1846. EVDLYbm = $10;
  1847. // TC_EVSEL
  1848. EVSELmask = $0F;
  1849. EVSEL_OFF = $00;
  1850. EVSEL_CH0 = $08;
  1851. EVSEL_CH1 = $09;
  1852. EVSEL_CH2 = $0A;
  1853. EVSEL_CH3 = $0B;
  1854. // Byte Mode
  1855. BYTEMbm = $01;
  1856. // TC_ERRINTLVL
  1857. ERRINTLVLmask = $0C;
  1858. ERRINTLVL_OFF = $00;
  1859. ERRINTLVL_LO = $04;
  1860. ERRINTLVL_MED = $08;
  1861. ERRINTLVL_HI = $0C;
  1862. // TC_OVFINTLVL
  1863. OVFINTLVLmask = $03;
  1864. OVFINTLVL_OFF = $00;
  1865. OVFINTLVL_LO = $01;
  1866. OVFINTLVL_MED = $02;
  1867. OVFINTLVL_HI = $03;
  1868. // TC_CCBINTLVL
  1869. CCBINTLVLmask = $0C;
  1870. CCBINTLVL_OFF = $00;
  1871. CCBINTLVL_LO = $04;
  1872. CCBINTLVL_MED = $08;
  1873. CCBINTLVL_HI = $0C;
  1874. // TC_CCAINTLVL
  1875. CCAINTLVLmask = $03;
  1876. CCAINTLVL_OFF = $00;
  1877. CCAINTLVL_LO = $01;
  1878. CCAINTLVL_MED = $02;
  1879. CCAINTLVL_HI = $03;
  1880. // Command
  1881. CMD0bm = $04;
  1882. CMD1bm = $08;
  1883. // Lock Update
  1884. LUPDbm = $02;
  1885. // Direction
  1886. DIRbm = $01;
  1887. // Compare or Capture B Buffer Valid
  1888. CCBBVbm = $04;
  1889. // Compare or Capture A Buffer Valid
  1890. CCABVbm = $02;
  1891. // Period Buffer Valid
  1892. PERBVbm = $01;
  1893. // Compare or Capture B Interrupt Flag
  1894. CCBIFbm = $20;
  1895. // Compare or Capture A Interrupt Flag
  1896. CCAIFbm = $10;
  1897. // Error Interrupt Flag
  1898. ERRIFbm = $02;
  1899. // Overflow Interrupt Flag
  1900. OVFIFbm = $01;
  1901. end;
  1902. TTC2 = object //16-bit Timer/Counter type 2
  1903. CTRLA: byte; //Control Register A
  1904. CTRLB: byte; //Control Register B
  1905. CTRLC: byte; //Control register C
  1906. Reserved3: byte;
  1907. CTRLE: byte; //Control Register E
  1908. Reserved5: byte;
  1909. INTCTRLA: byte; //Interrupt Control Register A
  1910. INTCTRLB: byte; //Interrupt Control Register B
  1911. Reserved8: byte;
  1912. CTRLF: byte; //Control Register F
  1913. Reserved10: byte;
  1914. Reserved11: byte;
  1915. INTFLAGS: byte; //Interrupt Flag Register
  1916. Reserved13: byte;
  1917. Reserved14: byte;
  1918. Reserved15: byte;
  1919. Reserved16: byte;
  1920. Reserved17: byte;
  1921. Reserved18: byte;
  1922. Reserved19: byte;
  1923. Reserved20: byte;
  1924. Reserved21: byte;
  1925. Reserved22: byte;
  1926. Reserved23: byte;
  1927. Reserved24: byte;
  1928. Reserved25: byte;
  1929. Reserved26: byte;
  1930. Reserved27: byte;
  1931. Reserved28: byte;
  1932. Reserved29: byte;
  1933. Reserved30: byte;
  1934. Reserved31: byte;
  1935. LCNT: byte; //Low Byte Count
  1936. HCNT: byte; //High Byte Count
  1937. Reserved34: byte;
  1938. Reserved35: byte;
  1939. Reserved36: byte;
  1940. Reserved37: byte;
  1941. LPER: byte; //Low Byte Period
  1942. HPER: byte; //High Byte Period
  1943. LCMPA: byte; //Low Byte Compare A
  1944. HCMPA: byte; //High Byte Compare A
  1945. LCMPB: byte; //Low Byte Compare B
  1946. HCMPB: byte; //High Byte Compare B
  1947. LCMPC: byte; //Low Byte Compare C
  1948. HCMPC: byte; //High Byte Compare C
  1949. LCMPD: byte; //Low Byte Compare D
  1950. HCMPD: byte; //High Byte Compare D
  1951. const
  1952. // TC2_CLKSEL
  1953. CLKSELmask = $0F;
  1954. CLKSEL_OFF = $00;
  1955. CLKSEL_DIV1 = $01;
  1956. CLKSEL_DIV2 = $02;
  1957. CLKSEL_DIV4 = $03;
  1958. CLKSEL_DIV8 = $04;
  1959. CLKSEL_DIV64 = $05;
  1960. CLKSEL_DIV256 = $06;
  1961. CLKSEL_DIV1024 = $07;
  1962. CLKSEL_EVCH0 = $08;
  1963. CLKSEL_EVCH1 = $09;
  1964. CLKSEL_EVCH2 = $0A;
  1965. CLKSEL_EVCH3 = $0B;
  1966. // High Byte Compare D Enable
  1967. HCMPDENbm = $80;
  1968. // High Byte Compare C Enable
  1969. HCMPCENbm = $40;
  1970. // High Byte Compare B Enable
  1971. HCMPBENbm = $20;
  1972. // High Byte Compare A Enable
  1973. HCMPAENbm = $10;
  1974. // Low Byte Compare D Enable
  1975. LCMPDENbm = $08;
  1976. // Low Byte Compare C Enable
  1977. LCMPCENbm = $04;
  1978. // Low Byte Compare B Enable
  1979. LCMPBENbm = $02;
  1980. // Low Byte Compare A Enable
  1981. LCMPAENbm = $01;
  1982. // High Byte Compare D Output Value
  1983. HCMPDbm = $80;
  1984. // High Byte Compare C Output Value
  1985. HCMPCbm = $40;
  1986. // High Byte Compare B Output Value
  1987. HCMPBbm = $20;
  1988. // High Byte Compare A Output Value
  1989. HCMPAbm = $10;
  1990. // Low Byte Compare D Output Value
  1991. LCMPDbm = $08;
  1992. // Low Byte Compare C Output Value
  1993. LCMPCbm = $04;
  1994. // Low Byte Compare B Output Value
  1995. LCMPBbm = $02;
  1996. // Low Byte Compare A Output Value
  1997. LCMPAbm = $01;
  1998. // TC2_BYTEM
  1999. BYTEMmask = $03;
  2000. BYTEM_NORMAL = $00;
  2001. BYTEM_BYTEMODE = $01;
  2002. BYTEM_SPLITMODE = $02;
  2003. // TC2_HUNFINTLVL
  2004. HUNFINTLVLmask = $0C;
  2005. HUNFINTLVL_OFF = $00;
  2006. HUNFINTLVL_LO = $04;
  2007. HUNFINTLVL_MED = $08;
  2008. HUNFINTLVL_HI = $0C;
  2009. // TC2_LUNFINTLVL
  2010. LUNFINTLVLmask = $03;
  2011. LUNFINTLVL_OFF = $00;
  2012. LUNFINTLVL_LO = $01;
  2013. LUNFINTLVL_MED = $02;
  2014. LUNFINTLVL_HI = $03;
  2015. // TC2_LCMPDINTLVL
  2016. LCMPDINTLVLmask = $C0;
  2017. LCMPDINTLVL_OFF = $00;
  2018. LCMPDINTLVL_LO = $40;
  2019. LCMPDINTLVL_MED = $80;
  2020. LCMPDINTLVL_HI = $C0;
  2021. // TC2_LCMPCINTLVL
  2022. LCMPCINTLVLmask = $30;
  2023. LCMPCINTLVL_OFF = $00;
  2024. LCMPCINTLVL_LO = $10;
  2025. LCMPCINTLVL_MED = $20;
  2026. LCMPCINTLVL_HI = $30;
  2027. // TC2_LCMPBINTLVL
  2028. LCMPBINTLVLmask = $0C;
  2029. LCMPBINTLVL_OFF = $00;
  2030. LCMPBINTLVL_LO = $04;
  2031. LCMPBINTLVL_MED = $08;
  2032. LCMPBINTLVL_HI = $0C;
  2033. // TC2_LCMPAINTLVL
  2034. LCMPAINTLVLmask = $03;
  2035. LCMPAINTLVL_OFF = $00;
  2036. LCMPAINTLVL_LO = $01;
  2037. LCMPAINTLVL_MED = $02;
  2038. LCMPAINTLVL_HI = $03;
  2039. // TC2_CMD
  2040. CMDmask = $0C;
  2041. CMD_NONE = $00;
  2042. CMD_RESTART = $08;
  2043. CMD_RESET = $0C;
  2044. // TC2_CMDEN
  2045. CMDENmask = $03;
  2046. CMDEN_LOW = $01;
  2047. CMDEN_HIGH = $02;
  2048. CMDEN_BOTH = $03;
  2049. // Low Byte Compare D Interrupt Flag
  2050. LCMPDIFbm = $80;
  2051. // Low Byte Compare C Interrupt Flag
  2052. LCMPCIFbm = $40;
  2053. // Low Byte Compare B Interrupt Flag
  2054. LCMPBIFbm = $20;
  2055. // Low Byte Compare A Interrupt Flag
  2056. LCMPAIFbm = $10;
  2057. // High Byte Underflow Interrupt Flag
  2058. HUNFIFbm = $02;
  2059. // Low Byte Underflow Interrupt Flag
  2060. LUNFIFbm = $01;
  2061. end;
  2062. TAWEX = object //Advanced Waveform Extension
  2063. CTRL: byte; //Control Register
  2064. Reserved1: byte;
  2065. FDEMASK: byte; //Fault Detection Event Mask
  2066. FDCTRL: byte; //Fault Detection Control Register
  2067. STATUS: byte; //Status Register
  2068. STATUSSET: byte; //Status Set Register
  2069. DTBOTH: byte; //Dead Time Both Sides
  2070. DTBOTHBUF: byte; //Dead Time Both Sides Buffer
  2071. DTLS: byte; //Dead Time Low Side
  2072. DTHS: byte; //Dead Time High Side
  2073. DTLSBUF: byte; //Dead Time Low Side Buffer
  2074. DTHSBUF: byte; //Dead Time High Side Buffer
  2075. OUTOVEN: byte; //Output Override Enable
  2076. const
  2077. // Pattern Generation Mode
  2078. PGMbm = $20;
  2079. // Common Waveform Channel Mode
  2080. CWCMbm = $10;
  2081. // Dead Time Insertion Compare Channel D Enable
  2082. DTICCDENbm = $08;
  2083. // Dead Time Insertion Compare Channel C Enable
  2084. DTICCCENbm = $04;
  2085. // Dead Time Insertion Compare Channel B Enable
  2086. DTICCBENbm = $02;
  2087. // Dead Time Insertion Compare Channel A Enable
  2088. DTICCAENbm = $01;
  2089. // Fault Detect on Disable Break Disable
  2090. FDDBDbm = $10;
  2091. // Fault Detect Mode
  2092. FDMODEbm = $04;
  2093. // AWEX_FDACT
  2094. FDACTmask = $03;
  2095. FDACT_NONE = $00;
  2096. FDACT_CLEAROE = $01;
  2097. FDACT_CLEARDIR = $03;
  2098. // Fault Detect Flag
  2099. FDFbm = $04;
  2100. // Dead Time High Side Buffer Valid
  2101. DTHSBUFVbm = $02;
  2102. // Dead Time Low Side Buffer Valid
  2103. DTLSBUFVbm = $01;
  2104. end;
  2105. THIRES = object //High-Resolution Extension
  2106. CTRLA: byte; //Control Register
  2107. const
  2108. // High Resolution Plus
  2109. HRPLUSbm = $04;
  2110. // HIRES_HREN
  2111. HRENmask = $03;
  2112. HREN_NONE = $00;
  2113. HREN_TC0 = $01;
  2114. HREN_TC1 = $02;
  2115. HREN_BOTH = $03;
  2116. end;
  2117. TUSART = object //Universal Synchronous/Asynchronous Receiver/Transmitter
  2118. DATA: byte; //Data Register
  2119. STATUS: byte; //Status Register
  2120. Reserved2: byte;
  2121. CTRLA: byte; //Control Register A
  2122. CTRLB: byte; //Control Register B
  2123. CTRLC: byte; //Control Register C
  2124. BAUDCTRLA: byte; //Baud Rate Control Register A
  2125. BAUDCTRLB: byte; //Baud Rate Control Register B
  2126. const
  2127. // Receive Interrupt Flag
  2128. RXCIFbm = $80;
  2129. // Transmit Interrupt Flag
  2130. TXCIFbm = $40;
  2131. // Data Register Empty Flag
  2132. DREIFbm = $20;
  2133. // Frame Error
  2134. FERRbm = $10;
  2135. // Buffer Overflow
  2136. BUFOVFbm = $08;
  2137. // Parity Error
  2138. PERRbm = $04;
  2139. // Receive Bit 8
  2140. RXB8bm = $01;
  2141. // USART_RXCINTLVL
  2142. RXCINTLVLmask = $30;
  2143. RXCINTLVL_OFF = $00;
  2144. RXCINTLVL_LO = $10;
  2145. RXCINTLVL_MED = $20;
  2146. RXCINTLVL_HI = $30;
  2147. // USART_TXCINTLVL
  2148. TXCINTLVLmask = $0C;
  2149. TXCINTLVL_OFF = $00;
  2150. TXCINTLVL_LO = $04;
  2151. TXCINTLVL_MED = $08;
  2152. TXCINTLVL_HI = $0C;
  2153. // USART_DREINTLVL
  2154. DREINTLVLmask = $03;
  2155. DREINTLVL_OFF = $00;
  2156. DREINTLVL_LO = $01;
  2157. DREINTLVL_MED = $02;
  2158. DREINTLVL_HI = $03;
  2159. // Receiver Enable
  2160. RXENbm = $10;
  2161. // Transmitter Enable
  2162. TXENbm = $08;
  2163. // Double transmission speed
  2164. CLK2Xbm = $04;
  2165. // Multi-processor Communication Mode
  2166. MPCMbm = $02;
  2167. // Transmit bit 8
  2168. TXB8bm = $01;
  2169. // USART_CMODE
  2170. CMODEmask = $C0;
  2171. CMODE_ASYNCHRONOUS = $00;
  2172. CMODE_SYNCHRONOUS = $40;
  2173. CMODE_IRDA = $80;
  2174. CMODE_MSPI = $C0;
  2175. // USART_PMODE
  2176. PMODEmask = $30;
  2177. PMODE_DISABLED = $00;
  2178. PMODE_EVEN = $20;
  2179. PMODE_ODD = $30;
  2180. // Stop Bit Mode
  2181. SBMODEbm = $08;
  2182. // USART_CHSIZE
  2183. CHSIZEmask = $07;
  2184. CHSIZE_5BIT = $00;
  2185. CHSIZE_6BIT = $01;
  2186. CHSIZE_7BIT = $02;
  2187. CHSIZE_8BIT = $03;
  2188. CHSIZE_9BIT = $07;
  2189. // Baud Rate Scale
  2190. BSCALE0bm = $10;
  2191. BSCALE1bm = $20;
  2192. BSCALE2bm = $40;
  2193. BSCALE3bm = $80;
  2194. end;
  2195. TSPI = object //Serial Peripheral Interface
  2196. CTRL: byte; //Control Register
  2197. INTCTRL: byte; //Interrupt Control Register
  2198. STATUS: byte; //Status Register
  2199. DATA: byte; //Data Register
  2200. const
  2201. // Enable Double Speed
  2202. CLK2Xbm = $80;
  2203. // Enable Module
  2204. ENABLEbm = $40;
  2205. // Data Order Setting
  2206. DORDbm = $20;
  2207. // Master Operation Enable
  2208. MASTERbm = $10;
  2209. // SPI_MODE
  2210. MODEmask = $0C;
  2211. MODE_0 = $00;
  2212. MODE_1 = $04;
  2213. MODE_2 = $08;
  2214. MODE_3 = $0C;
  2215. // SPI_PRESCALER
  2216. PRESCALERmask = $03;
  2217. PRESCALER_DIV4 = $00;
  2218. PRESCALER_DIV16 = $01;
  2219. PRESCALER_DIV64 = $02;
  2220. PRESCALER_DIV128 = $03;
  2221. // SPI_INTLVL
  2222. INTLVLmask = $03;
  2223. INTLVL_OFF = $00;
  2224. INTLVL_LO = $01;
  2225. INTLVL_MED = $02;
  2226. INTLVL_HI = $03;
  2227. // Interrupt Flag
  2228. IFbm = $80;
  2229. // Write Collision
  2230. WRCOLbm = $40;
  2231. end;
  2232. TIRCOM = object //IR Communication Module
  2233. CTRL: byte; //Control Register
  2234. TXPLCTRL: byte; //IrDA Transmitter Pulse Length Control Register
  2235. RXPLCTRL: byte; //IrDA Receiver Pulse Length Control Register
  2236. const
  2237. // IRDA_EVSEL
  2238. EVSELmask = $0F;
  2239. EVSEL_OFF = $00;
  2240. EVSEL_0 = $08;
  2241. EVSEL_1 = $09;
  2242. EVSEL_2 = $0A;
  2243. EVSEL_3 = $0B;
  2244. end;
  2245. TNVM_FUSES = object //Fuses
  2246. Reserved0: byte;
  2247. FUSEBYTE1: byte; //Watchdog Configuration
  2248. FUSEBYTE2: byte; //Reset Configuration
  2249. Reserved3: byte;
  2250. FUSEBYTE4: byte; //Start-up Configuration
  2251. FUSEBYTE5: byte; //EESAVE and BOD Level
  2252. const
  2253. // WDWPER
  2254. WDWPERmask = $F0;
  2255. WDWPER_8CLK = $00;
  2256. WDWPER_16CLK = $10;
  2257. WDWPER_32CLK = $20;
  2258. WDWPER_64CLK = $30;
  2259. WDWPER_128CLK = $40;
  2260. WDWPER_256CLK = $50;
  2261. WDWPER_512CLK = $60;
  2262. WDWPER_1KCLK = $70;
  2263. WDWPER_2KCLK = $80;
  2264. WDWPER_4KCLK = $90;
  2265. WDWPER_8KCLK = $A0;
  2266. // WDPER
  2267. WDPERmask = $0F;
  2268. WDPER_8CLK = $00;
  2269. WDPER_16CLK = $01;
  2270. WDPER_32CLK = $02;
  2271. WDPER_64CLK = $03;
  2272. WDPER_128CLK = $04;
  2273. WDPER_256CLK = $05;
  2274. WDPER_512CLK = $06;
  2275. WDPER_1KCLK = $07;
  2276. WDPER_2KCLK = $08;
  2277. WDPER_4KCLK = $09;
  2278. WDPER_8KCLK = $0A;
  2279. // BOOTRST
  2280. BOOTRSTmask = $40;
  2281. BOOTRST_BOOTLDR = $00;
  2282. BOOTRST_APPLICATION = $40;
  2283. // TOSCSEL
  2284. TOSCSELmask = $20;
  2285. TOSCSEL_ALTERNATE = $00;
  2286. TOSCSEL_XTAL = $20;
  2287. // BODPD
  2288. BODPDmask = $03;
  2289. BODPD_SAMPLED = $01;
  2290. BODPD_CONTINUOUS = $02;
  2291. BODPD_DISABLED = $03;
  2292. // External Reset Disable
  2293. RSTDISBLbm = $10;
  2294. // STARTUPTIME
  2295. STARTUPTIMEmask = $0C;
  2296. STARTUPTIME0MS = $0C;
  2297. STARTUPTIME4MS = $04;
  2298. STARTUPTIME64MS = $00;
  2299. // Watchdog Timer Lock
  2300. WDLOCKbm = $02;
  2301. // BODACT
  2302. BODACTmask = $30;
  2303. BODACT_SAMPLED = $10;
  2304. BODACT_CONTINUOUS = $20;
  2305. BODACT_DISABLED = $30;
  2306. // Preserve EEPROM Through Chip Erase
  2307. EESAVEbm = $08;
  2308. // BODLEVEL
  2309. BODLEVELmask = $07;
  2310. BODLEVEL1V6 = $07;
  2311. BODLEVEL1V8 = $06;
  2312. BODLEVEL2V0 = $05;
  2313. BODLEVEL2V2 = $04;
  2314. BODLEVEL2V4 = $03;
  2315. BODLEVEL2V6 = $02;
  2316. BODLEVEL2V8 = $01;
  2317. BODLEVEL3V0 = $00;
  2318. end;
  2319. TNVM_LOCKBITS = object //Lock Bits
  2320. LOCKBITS: byte; //Lock Bits
  2321. const
  2322. // FUSE_BLBB
  2323. BLBBmask = $C0;
  2324. BLBB_RWLOCK = $00;
  2325. BLBB_RLOCK = $40;
  2326. BLBB_WLOCK = $80;
  2327. BLBB_NOLOCK = $C0;
  2328. // FUSE_BLBA
  2329. BLBAmask = $30;
  2330. BLBA_RWLOCK = $00;
  2331. BLBA_RLOCK = $10;
  2332. BLBA_WLOCK = $20;
  2333. BLBA_NOLOCK = $30;
  2334. // FUSE_BLBAT
  2335. BLBATmask = $0C;
  2336. BLBAT_RWLOCK = $00;
  2337. BLBAT_RLOCK = $04;
  2338. BLBAT_WLOCK = $08;
  2339. BLBAT_NOLOCK = $0C;
  2340. // FUSE_LB
  2341. LBmask = $03;
  2342. LB_RWLOCK = $00;
  2343. LB_WLOCK = $02;
  2344. LB_NOLOCK = $03;
  2345. end;
  2346. TNVM_PROD_SIGNATURES = object //Production Signatures
  2347. RCOSC2M: byte; //RCOSC 2 MHz Calibration Value B
  2348. RCOSC2MA: byte; //RCOSC 2 MHz Calibration Value A
  2349. RCOSC32K: byte; //RCOSC 32.768 kHz Calibration Value
  2350. RCOSC32M: byte; //RCOSC 32 MHz Calibration Value B
  2351. RCOSC32MA: byte; //RCOSC 32 MHz Calibration Value A
  2352. Reserved5: byte;
  2353. Reserved6: byte;
  2354. Reserved7: byte;
  2355. LOTNUM0: byte; //Lot Number Byte 0, ASCII
  2356. LOTNUM1: byte; //Lot Number Byte 1, ASCII
  2357. LOTNUM2: byte; //Lot Number Byte 2, ASCII
  2358. LOTNUM3: byte; //Lot Number Byte 3, ASCII
  2359. LOTNUM4: byte; //Lot Number Byte 4, ASCII
  2360. LOTNUM5: byte; //Lot Number Byte 5, ASCII
  2361. Reserved14: byte;
  2362. Reserved15: byte;
  2363. WAFNUM: byte; //Wafer Number
  2364. Reserved17: byte;
  2365. COORDX0: byte; //Wafer Coordinate X Byte 0
  2366. COORDX1: byte; //Wafer Coordinate X Byte 1
  2367. COORDY0: byte; //Wafer Coordinate Y Byte 0
  2368. COORDY1: byte; //Wafer Coordinate Y Byte 1
  2369. Reserved22: byte;
  2370. Reserved23: byte;
  2371. Reserved24: byte;
  2372. Reserved25: byte;
  2373. USBCAL0: byte; //USB Calibration Byte 0
  2374. USBCAL1: byte; //USB Calibration Byte 1
  2375. USBRCOSC: byte; //USB RCOSC Calibration Value B
  2376. USBRCOSCA: byte; //USB RCOSC Calibration Value A
  2377. Reserved30: byte;
  2378. Reserved31: byte;
  2379. ADCACAL0: byte; //ADCA Calibration Byte 0
  2380. ADCACAL1: byte; //ADCA Calibration Byte 1
  2381. Reserved34: byte;
  2382. Reserved35: byte;
  2383. Reserved36: byte;
  2384. Reserved37: byte;
  2385. Reserved38: byte;
  2386. Reserved39: byte;
  2387. Reserved40: byte;
  2388. Reserved41: byte;
  2389. Reserved42: byte;
  2390. Reserved43: byte;
  2391. Reserved44: byte;
  2392. Reserved45: byte;
  2393. TEMPSENSE0: byte; //Temperature Sensor Calibration Byte 0
  2394. TEMPSENSE1: byte; //Temperature Sensor Calibration Byte 1
  2395. end;
  2396. const
  2397. Pin0idx = 0; Pin0bm = 1;
  2398. Pin1idx = 1; Pin1bm = 2;
  2399. Pin2idx = 2; Pin2bm = 4;
  2400. Pin3idx = 3; Pin3bm = 8;
  2401. Pin4idx = 4; Pin4bm = 16;
  2402. Pin5idx = 5; Pin5bm = 32;
  2403. Pin6idx = 6; Pin6bm = 64;
  2404. Pin7idx = 7; Pin7bm = 128;
  2405. var
  2406. GPIO: TGPIO absolute $0000;
  2407. VPORT0: TVPORT absolute $0010;
  2408. VPORT1: TVPORT absolute $0014;
  2409. VPORT2: TVPORT absolute $0018;
  2410. VPORT3: TVPORT absolute $001C;
  2411. OCD: TOCD absolute $002E;
  2412. CPU: TCPU absolute $0030;
  2413. CLK: TCLK absolute $0040;
  2414. SLEEP: TSLEEP absolute $0048;
  2415. OSC: TOSC absolute $0050;
  2416. DFLLRC32M: TDFLL absolute $0060;
  2417. DFLLRC2M: TDFLL absolute $0068;
  2418. PR: TPR absolute $0070;
  2419. RST: TRST absolute $0078;
  2420. WDT: TWDT absolute $0080;
  2421. MCU: TMCU absolute $0090;
  2422. PMIC: TPMIC absolute $00A0;
  2423. PORTCFG: TPORTCFG absolute $00B0;
  2424. CRC: TCRC absolute $00D0;
  2425. EVSYS: TEVSYS absolute $0180;
  2426. NVM: TNVM absolute $01C0;
  2427. ADCA: TADC absolute $0200;
  2428. ACA: TAC absolute $0380;
  2429. RTC: TRTC absolute $0400;
  2430. TWIC: TTWI absolute $0480;
  2431. TWIE: TTWI absolute $04A0;
  2432. USB: TUSB absolute $04C0;
  2433. PORTA: TPORT absolute $0600;
  2434. PORTB: TPORT absolute $0620;
  2435. PORTC: TPORT absolute $0640;
  2436. PORTD: TPORT absolute $0660;
  2437. PORTE: TPORT absolute $0680;
  2438. PORTR: TPORT absolute $07E0;
  2439. TCC0: TTC0 absolute $0800;
  2440. TCC2: TTC2 absolute $0800;
  2441. TCC1: TTC1 absolute $0840;
  2442. AWEXC: TAWEX absolute $0880;
  2443. HIRESC: THIRES absolute $0890;
  2444. USARTC0: TUSART absolute $08A0;
  2445. USARTC1: TUSART absolute $08B0;
  2446. SPIC: TSPI absolute $08C0;
  2447. IRCOM: TIRCOM absolute $08F8;
  2448. TCD0: TTC0 absolute $0900;
  2449. TCD2: TTC2 absolute $0900;
  2450. USARTD0: TUSART absolute $09A0;
  2451. SPID: TSPI absolute $09C0;
  2452. TCE0: TTC0 absolute $0A00;
  2453. implementation
  2454. {$i avrcommon.inc}
  2455. procedure OSC_OSCF_ISR; external name 'OSC_OSCF_ISR'; // Interrupt 1 Oscillator Failure Interrupt (NMI)
  2456. procedure PORTC_INT0_ISR; external name 'PORTC_INT0_ISR'; // Interrupt 2 External Interrupt 0
  2457. procedure PORTC_INT1_ISR; external name 'PORTC_INT1_ISR'; // Interrupt 3 External Interrupt 1
  2458. procedure PORTR_INT0_ISR; external name 'PORTR_INT0_ISR'; // Interrupt 4 External Interrupt 0
  2459. procedure PORTR_INT1_ISR; external name 'PORTR_INT1_ISR'; // Interrupt 5 External Interrupt 1
  2460. procedure RTC_OVF_ISR; external name 'RTC_OVF_ISR'; // Interrupt 10 Overflow Interrupt
  2461. procedure RTC_COMP_ISR; external name 'RTC_COMP_ISR'; // Interrupt 11 Compare Interrupt
  2462. procedure TWIC_TWIS_ISR; external name 'TWIC_TWIS_ISR'; // Interrupt 12 TWI Slave Interrupt
  2463. procedure TWIC_TWIM_ISR; external name 'TWIC_TWIM_ISR'; // Interrupt 13 TWI Master Interrupt
  2464. procedure TCC2_LUNF_ISR; external name 'TCC2_LUNF_ISR'; // Interrupt 14 Low Byte Underflow Interrupt
  2465. procedure TCC2_HUNF_ISR; external name 'TCC2_HUNF_ISR'; // Interrupt 15 High Byte Underflow Interrupt
  2466. procedure TCC2_LCMPA_ISR; external name 'TCC2_LCMPA_ISR'; // Interrupt 16 Low Byte Compare A Interrupt
  2467. procedure TCC2_LCMPB_ISR; external name 'TCC2_LCMPB_ISR'; // Interrupt 17 Low Byte Compare B Interrupt
  2468. procedure TCC2_LCMPC_ISR; external name 'TCC2_LCMPC_ISR'; // Interrupt 18 Low Byte Compare C Interrupt
  2469. procedure TCC2_LCMPD_ISR; external name 'TCC2_LCMPD_ISR'; // Interrupt 19 Low Byte Compare D Interrupt
  2470. procedure TCC1_OVF_ISR; external name 'TCC1_OVF_ISR'; // Interrupt 20 Overflow Interrupt
  2471. procedure TCC1_ERR_ISR; external name 'TCC1_ERR_ISR'; // Interrupt 21 Error Interrupt
  2472. procedure TCC1_CCA_ISR; external name 'TCC1_CCA_ISR'; // Interrupt 22 Compare or Capture A Interrupt
  2473. procedure TCC1_CCB_ISR; external name 'TCC1_CCB_ISR'; // Interrupt 23 Compare or Capture B Interrupt
  2474. procedure SPIC_INT_ISR; external name 'SPIC_INT_ISR'; // Interrupt 24 SPI Interrupt
  2475. procedure USARTC0_RXC_ISR; external name 'USARTC0_RXC_ISR'; // Interrupt 25 Reception Complete Interrupt
  2476. procedure USARTC0_DRE_ISR; external name 'USARTC0_DRE_ISR'; // Interrupt 26 Data Register Empty Interrupt
  2477. procedure USARTC0_TXC_ISR; external name 'USARTC0_TXC_ISR'; // Interrupt 27 Transmission Complete Interrupt
  2478. procedure USARTC1_RXC_ISR; external name 'USARTC1_RXC_ISR'; // Interrupt 28 Reception Complete Interrupt
  2479. procedure USARTC1_DRE_ISR; external name 'USARTC1_DRE_ISR'; // Interrupt 29 Data Register Empty Interrupt
  2480. procedure USARTC1_TXC_ISR; external name 'USARTC1_TXC_ISR'; // Interrupt 30 Transmission Complete Interrupt
  2481. procedure NVM_EE_ISR; external name 'NVM_EE_ISR'; // Interrupt 32 EE Interrupt
  2482. procedure NVM_SPM_ISR; external name 'NVM_SPM_ISR'; // Interrupt 33 SPM Interrupt
  2483. procedure PORTB_INT0_ISR; external name 'PORTB_INT0_ISR'; // Interrupt 34 External Interrupt 0
  2484. procedure PORTB_INT1_ISR; external name 'PORTB_INT1_ISR'; // Interrupt 35 External Interrupt 1
  2485. procedure PORTE_INT0_ISR; external name 'PORTE_INT0_ISR'; // Interrupt 43 External Interrupt 0
  2486. procedure PORTE_INT1_ISR; external name 'PORTE_INT1_ISR'; // Interrupt 44 External Interrupt 1
  2487. procedure TWIE_TWIS_ISR; external name 'TWIE_TWIS_ISR'; // Interrupt 45 TWI Slave Interrupt
  2488. procedure TWIE_TWIM_ISR; external name 'TWIE_TWIM_ISR'; // Interrupt 46 TWI Master Interrupt
  2489. procedure TCE0_OVF_ISR; external name 'TCE0_OVF_ISR'; // Interrupt 47 Overflow Interrupt
  2490. procedure TCE0_ERR_ISR; external name 'TCE0_ERR_ISR'; // Interrupt 48 Error Interrupt
  2491. procedure TCE0_CCA_ISR; external name 'TCE0_CCA_ISR'; // Interrupt 49 Compare or Capture A Interrupt
  2492. procedure TCE0_CCB_ISR; external name 'TCE0_CCB_ISR'; // Interrupt 50 Compare or Capture B Interrupt
  2493. procedure TCE0_CCC_ISR; external name 'TCE0_CCC_ISR'; // Interrupt 51 Compare or Capture C Interrupt
  2494. procedure TCE0_CCD_ISR; external name 'TCE0_CCD_ISR'; // Interrupt 52 Compare or Capture D Interrupt
  2495. procedure PORTD_INT0_ISR; external name 'PORTD_INT0_ISR'; // Interrupt 64 External Interrupt 0
  2496. procedure PORTD_INT1_ISR; external name 'PORTD_INT1_ISR'; // Interrupt 65 External Interrupt 1
  2497. procedure PORTA_INT0_ISR; external name 'PORTA_INT0_ISR'; // Interrupt 66 External Interrupt 0
  2498. procedure PORTA_INT1_ISR; external name 'PORTA_INT1_ISR'; // Interrupt 67 External Interrupt 1
  2499. procedure ACA_AC0_ISR; external name 'ACA_AC0_ISR'; // Interrupt 68 AC0 Interrupt
  2500. procedure ACA_AC1_ISR; external name 'ACA_AC1_ISR'; // Interrupt 69 AC1 Interrupt
  2501. procedure ACA_ACW_ISR; external name 'ACA_ACW_ISR'; // Interrupt 70 ACW Window Mode Interrupt
  2502. procedure ADCA_CH0_ISR; external name 'ADCA_CH0_ISR'; // Interrupt 71 Interrupt 0
  2503. procedure TCD2_LUNF_ISR; external name 'TCD2_LUNF_ISR'; // Interrupt 77 Low Byte Underflow Interrupt
  2504. procedure TCD2_HUNF_ISR; external name 'TCD2_HUNF_ISR'; // Interrupt 78 High Byte Underflow Interrupt
  2505. procedure TCD2_LCMPA_ISR; external name 'TCD2_LCMPA_ISR'; // Interrupt 79 Low Byte Compare A Interrupt
  2506. procedure TCD2_LCMPB_ISR; external name 'TCD2_LCMPB_ISR'; // Interrupt 80 Low Byte Compare B Interrupt
  2507. procedure TCD2_LCMPC_ISR; external name 'TCD2_LCMPC_ISR'; // Interrupt 81 Low Byte Compare C Interrupt
  2508. procedure TCD2_LCMPD_ISR; external name 'TCD2_LCMPD_ISR'; // Interrupt 82 Low Byte Compare D Interrupt
  2509. procedure SPID_INT_ISR; external name 'SPID_INT_ISR'; // Interrupt 87 SPI Interrupt
  2510. procedure USARTD0_RXC_ISR; external name 'USARTD0_RXC_ISR'; // Interrupt 88 Reception Complete Interrupt
  2511. procedure USARTD0_DRE_ISR; external name 'USARTD0_DRE_ISR'; // Interrupt 89 Data Register Empty Interrupt
  2512. procedure USARTD0_TXC_ISR; external name 'USARTD0_TXC_ISR'; // Interrupt 90 Transmission Complete Interrupt
  2513. procedure USB_BUSEVENT_ISR; external name 'USB_BUSEVENT_ISR'; // Interrupt 125 SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts
  2514. procedure USB_TRNCOMPL_ISR; external name 'USB_TRNCOMPL_ISR'; // Interrupt 126 Transaction complete interrupt
  2515. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  2516. asm
  2517. jmp __dtors_end
  2518. jmp OSC_OSCF_ISR
  2519. jmp PORTC_INT0_ISR
  2520. jmp PORTC_INT1_ISR
  2521. jmp PORTR_INT0_ISR
  2522. jmp PORTR_INT1_ISR
  2523. jmp RTC_OVF_ISR
  2524. jmp RTC_COMP_ISR
  2525. jmp TWIC_TWIS_ISR
  2526. jmp TWIC_TWIM_ISR
  2527. jmp TCC2_LUNF_ISR
  2528. jmp TCC2_HUNF_ISR
  2529. jmp TCC2_LCMPA_ISR
  2530. jmp TCC2_LCMPB_ISR
  2531. jmp TCC2_LCMPC_ISR
  2532. jmp TCC2_LCMPD_ISR
  2533. jmp TCC1_OVF_ISR
  2534. jmp TCC1_ERR_ISR
  2535. jmp TCC1_CCA_ISR
  2536. jmp TCC1_CCB_ISR
  2537. jmp SPIC_INT_ISR
  2538. jmp USARTC0_RXC_ISR
  2539. jmp USARTC0_DRE_ISR
  2540. jmp USARTC0_TXC_ISR
  2541. jmp USARTC1_RXC_ISR
  2542. jmp USARTC1_DRE_ISR
  2543. jmp USARTC1_TXC_ISR
  2544. jmp NVM_EE_ISR
  2545. jmp NVM_SPM_ISR
  2546. jmp PORTB_INT0_ISR
  2547. jmp PORTB_INT1_ISR
  2548. jmp PORTE_INT0_ISR
  2549. jmp PORTE_INT1_ISR
  2550. jmp TWIE_TWIS_ISR
  2551. jmp TWIE_TWIM_ISR
  2552. jmp TCE0_OVF_ISR
  2553. jmp TCE0_ERR_ISR
  2554. jmp TCE0_CCA_ISR
  2555. jmp TCE0_CCB_ISR
  2556. jmp TCE0_CCC_ISR
  2557. jmp TCE0_CCD_ISR
  2558. jmp PORTD_INT0_ISR
  2559. jmp PORTD_INT1_ISR
  2560. jmp PORTA_INT0_ISR
  2561. jmp PORTA_INT1_ISR
  2562. jmp ACA_AC0_ISR
  2563. jmp ACA_AC1_ISR
  2564. jmp ACA_ACW_ISR
  2565. jmp ADCA_CH0_ISR
  2566. jmp TCD2_LUNF_ISR
  2567. jmp TCD2_HUNF_ISR
  2568. jmp TCD2_LCMPA_ISR
  2569. jmp TCD2_LCMPB_ISR
  2570. jmp TCD2_LCMPC_ISR
  2571. jmp TCD2_LCMPD_ISR
  2572. jmp SPID_INT_ISR
  2573. jmp USARTD0_RXC_ISR
  2574. jmp USARTD0_DRE_ISR
  2575. jmp USARTD0_TXC_ISR
  2576. jmp USB_BUSEVENT_ISR
  2577. jmp USB_TRNCOMPL_ISR
  2578. .weak OSC_OSCF_ISR
  2579. .weak PORTC_INT0_ISR
  2580. .weak PORTC_INT1_ISR
  2581. .weak PORTR_INT0_ISR
  2582. .weak PORTR_INT1_ISR
  2583. .weak RTC_OVF_ISR
  2584. .weak RTC_COMP_ISR
  2585. .weak TWIC_TWIS_ISR
  2586. .weak TWIC_TWIM_ISR
  2587. .weak TCC2_LUNF_ISR
  2588. .weak TCC2_HUNF_ISR
  2589. .weak TCC2_LCMPA_ISR
  2590. .weak TCC2_LCMPB_ISR
  2591. .weak TCC2_LCMPC_ISR
  2592. .weak TCC2_LCMPD_ISR
  2593. .weak TCC1_OVF_ISR
  2594. .weak TCC1_ERR_ISR
  2595. .weak TCC1_CCA_ISR
  2596. .weak TCC1_CCB_ISR
  2597. .weak SPIC_INT_ISR
  2598. .weak USARTC0_RXC_ISR
  2599. .weak USARTC0_DRE_ISR
  2600. .weak USARTC0_TXC_ISR
  2601. .weak USARTC1_RXC_ISR
  2602. .weak USARTC1_DRE_ISR
  2603. .weak USARTC1_TXC_ISR
  2604. .weak NVM_EE_ISR
  2605. .weak NVM_SPM_ISR
  2606. .weak PORTB_INT0_ISR
  2607. .weak PORTB_INT1_ISR
  2608. .weak PORTE_INT0_ISR
  2609. .weak PORTE_INT1_ISR
  2610. .weak TWIE_TWIS_ISR
  2611. .weak TWIE_TWIM_ISR
  2612. .weak TCE0_OVF_ISR
  2613. .weak TCE0_ERR_ISR
  2614. .weak TCE0_CCA_ISR
  2615. .weak TCE0_CCB_ISR
  2616. .weak TCE0_CCC_ISR
  2617. .weak TCE0_CCD_ISR
  2618. .weak PORTD_INT0_ISR
  2619. .weak PORTD_INT1_ISR
  2620. .weak PORTA_INT0_ISR
  2621. .weak PORTA_INT1_ISR
  2622. .weak ACA_AC0_ISR
  2623. .weak ACA_AC1_ISR
  2624. .weak ACA_ACW_ISR
  2625. .weak ADCA_CH0_ISR
  2626. .weak TCD2_LUNF_ISR
  2627. .weak TCD2_HUNF_ISR
  2628. .weak TCD2_LCMPA_ISR
  2629. .weak TCD2_LCMPB_ISR
  2630. .weak TCD2_LCMPC_ISR
  2631. .weak TCD2_LCMPD_ISR
  2632. .weak SPID_INT_ISR
  2633. .weak USARTD0_RXC_ISR
  2634. .weak USARTD0_DRE_ISR
  2635. .weak USARTD0_TXC_ISR
  2636. .weak USB_BUSEVENT_ISR
  2637. .weak USB_TRNCOMPL_ISR
  2638. .set OSC_OSCF_ISR, Default_IRQ_handler
  2639. .set PORTC_INT0_ISR, Default_IRQ_handler
  2640. .set PORTC_INT1_ISR, Default_IRQ_handler
  2641. .set PORTR_INT0_ISR, Default_IRQ_handler
  2642. .set PORTR_INT1_ISR, Default_IRQ_handler
  2643. .set RTC_OVF_ISR, Default_IRQ_handler
  2644. .set RTC_COMP_ISR, Default_IRQ_handler
  2645. .set TWIC_TWIS_ISR, Default_IRQ_handler
  2646. .set TWIC_TWIM_ISR, Default_IRQ_handler
  2647. .set TCC2_LUNF_ISR, Default_IRQ_handler
  2648. .set TCC2_HUNF_ISR, Default_IRQ_handler
  2649. .set TCC2_LCMPA_ISR, Default_IRQ_handler
  2650. .set TCC2_LCMPB_ISR, Default_IRQ_handler
  2651. .set TCC2_LCMPC_ISR, Default_IRQ_handler
  2652. .set TCC2_LCMPD_ISR, Default_IRQ_handler
  2653. .set TCC1_OVF_ISR, Default_IRQ_handler
  2654. .set TCC1_ERR_ISR, Default_IRQ_handler
  2655. .set TCC1_CCA_ISR, Default_IRQ_handler
  2656. .set TCC1_CCB_ISR, Default_IRQ_handler
  2657. .set SPIC_INT_ISR, Default_IRQ_handler
  2658. .set USARTC0_RXC_ISR, Default_IRQ_handler
  2659. .set USARTC0_DRE_ISR, Default_IRQ_handler
  2660. .set USARTC0_TXC_ISR, Default_IRQ_handler
  2661. .set USARTC1_RXC_ISR, Default_IRQ_handler
  2662. .set USARTC1_DRE_ISR, Default_IRQ_handler
  2663. .set USARTC1_TXC_ISR, Default_IRQ_handler
  2664. .set NVM_EE_ISR, Default_IRQ_handler
  2665. .set NVM_SPM_ISR, Default_IRQ_handler
  2666. .set PORTB_INT0_ISR, Default_IRQ_handler
  2667. .set PORTB_INT1_ISR, Default_IRQ_handler
  2668. .set PORTE_INT0_ISR, Default_IRQ_handler
  2669. .set PORTE_INT1_ISR, Default_IRQ_handler
  2670. .set TWIE_TWIS_ISR, Default_IRQ_handler
  2671. .set TWIE_TWIM_ISR, Default_IRQ_handler
  2672. .set TCE0_OVF_ISR, Default_IRQ_handler
  2673. .set TCE0_ERR_ISR, Default_IRQ_handler
  2674. .set TCE0_CCA_ISR, Default_IRQ_handler
  2675. .set TCE0_CCB_ISR, Default_IRQ_handler
  2676. .set TCE0_CCC_ISR, Default_IRQ_handler
  2677. .set TCE0_CCD_ISR, Default_IRQ_handler
  2678. .set PORTD_INT0_ISR, Default_IRQ_handler
  2679. .set PORTD_INT1_ISR, Default_IRQ_handler
  2680. .set PORTA_INT0_ISR, Default_IRQ_handler
  2681. .set PORTA_INT1_ISR, Default_IRQ_handler
  2682. .set ACA_AC0_ISR, Default_IRQ_handler
  2683. .set ACA_AC1_ISR, Default_IRQ_handler
  2684. .set ACA_ACW_ISR, Default_IRQ_handler
  2685. .set ADCA_CH0_ISR, Default_IRQ_handler
  2686. .set TCD2_LUNF_ISR, Default_IRQ_handler
  2687. .set TCD2_HUNF_ISR, Default_IRQ_handler
  2688. .set TCD2_LCMPA_ISR, Default_IRQ_handler
  2689. .set TCD2_LCMPB_ISR, Default_IRQ_handler
  2690. .set TCD2_LCMPC_ISR, Default_IRQ_handler
  2691. .set TCD2_LCMPD_ISR, Default_IRQ_handler
  2692. .set SPID_INT_ISR, Default_IRQ_handler
  2693. .set USARTD0_RXC_ISR, Default_IRQ_handler
  2694. .set USARTD0_DRE_ISR, Default_IRQ_handler
  2695. .set USARTD0_TXC_ISR, Default_IRQ_handler
  2696. .set USB_BUSEVENT_ISR, Default_IRQ_handler
  2697. .set USB_TRNCOMPL_ISR, Default_IRQ_handler
  2698. end;
  2699. end.