avr128db28.pp 70 KB

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  1. unit AVR128DB28;
  2. interface
  3. type
  4. TAC = object //Analog Comparator
  5. CTRLA: byte; //Control A
  6. CTRLB: byte; //Control B
  7. MUXCTRL: byte; //Mux Control A
  8. Reserved3: byte;
  9. Reserved4: byte;
  10. DACREF: byte; //DAC Voltage Reference
  11. INTCTRL: byte; //Interrupt Control
  12. STATUS: byte; //Status
  13. const
  14. // Enable
  15. ENABLEbm = $01;
  16. // AC_HYSMODE
  17. HYSMODEmask = $06;
  18. HYSMODE_NONE = $00;
  19. HYSMODE_SMALL = $02;
  20. HYSMODE_MEDIUM = $04;
  21. HYSMODE_LARGE = $06;
  22. // AC_POWER
  23. POWERmask = $18;
  24. POWER_PROFILE0 = $00;
  25. POWER_PROFILE1 = $08;
  26. POWER_PROFILE2 = $10;
  27. // Output Pad Enable
  28. OUTENbm = $40;
  29. // Run in Standby Mode
  30. RUNSTDBYbm = $80;
  31. // AC_WINSEL
  32. WINSELmask = $03;
  33. WINSEL_DISABLED = $00;
  34. WINSEL_UPSEL1 = $01;
  35. WINSEL_UPSEL2 = $02;
  36. // AC_MUXNEG
  37. MUXNEGmask = $07;
  38. MUXNEG_AINN0 = $00;
  39. MUXNEG_AINN1 = $01;
  40. MUXNEG_AINN2 = $02;
  41. MUXNEG_DACREF = $03;
  42. // AC_MUXPOS
  43. MUXPOSmask = $38;
  44. MUXPOS_AINP0 = $00;
  45. MUXPOS_AINP1 = $08;
  46. MUXPOS_AINP2 = $10;
  47. MUXPOS_AINP3 = $18;
  48. // AC_INITVAL
  49. INITVALmask = $40;
  50. INITVAL_LOW = $00;
  51. INITVAL_HIGH = $40;
  52. // Invert AC Output
  53. INVERTbm = $80;
  54. // Analog Comparator Interrupt Flag
  55. CMPIFbm = $01;
  56. // Analog Comparator State
  57. CMPSTATEbm = $10;
  58. // AC_WINSTATE
  59. WINSTATEmask = $C0;
  60. WINSTATE_ABOVE = $00;
  61. WINSTATE_INSIDE = $40;
  62. WINSTATE_BELOW = $80;
  63. end;
  64. TADC = object //Analog to Digital Converter
  65. CTRLA: byte; //Control A
  66. CTRLB: byte; //Control B
  67. CTRLC: byte; //Control C
  68. CTRLD: byte; //Control D
  69. CTRLE: byte; //Control E
  70. SAMPCTRL: byte; //Sample Control
  71. Reserved6: byte;
  72. Reserved7: byte;
  73. MUXPOS: byte; //Positive mux input
  74. MUXNEG: byte; //Negative mux input
  75. COMMAND: byte; //Command
  76. EVCTRL: byte; //Event Control
  77. INTCTRL: byte; //Interrupt Control
  78. INTFLAGS: byte; //Interrupt Flags
  79. DBGCTRL: byte; //Debug Control
  80. TEMP: byte; //Temporary Data
  81. RES: word; //ADC Accumulator Result
  82. WINLT: word; //Window comparator low threshold
  83. WINHT: word; //Window comparator high threshold
  84. const
  85. // ADC Enable
  86. ENABLEbm = $01;
  87. // Free running mode
  88. FREERUNbm = $02;
  89. // ADC_RESSEL
  90. RESSELmask = $0C;
  91. RESSEL_12BIT = $00;
  92. RESSEL_10BIT = $04;
  93. // Left adjust result
  94. LEFTADJbm = $10;
  95. // ADC_CONVMODE
  96. CONVMODEmask = $20;
  97. CONVMODE_SINGLEENDED = $00;
  98. CONVMODE_DIFF = $20;
  99. // Run standby mode
  100. RUNSTBYbm = $80;
  101. // ADC_SAMPNUM
  102. SAMPNUMmask = $07;
  103. SAMPNUM_NONE = $00;
  104. SAMPNUM_ACC2 = $01;
  105. SAMPNUM_ACC4 = $02;
  106. SAMPNUM_ACC8 = $03;
  107. SAMPNUM_ACC16 = $04;
  108. SAMPNUM_ACC32 = $05;
  109. SAMPNUM_ACC64 = $06;
  110. SAMPNUM_ACC128 = $07;
  111. // ADC_PRESC
  112. PRESCmask = $0F;
  113. PRESC_DIV2 = $00;
  114. PRESC_DIV4 = $01;
  115. PRESC_DIV8 = $02;
  116. PRESC_DIV12 = $03;
  117. PRESC_DIV16 = $04;
  118. PRESC_DIV20 = $05;
  119. PRESC_DIV24 = $06;
  120. PRESC_DIV28 = $07;
  121. PRESC_DIV32 = $08;
  122. PRESC_DIV48 = $09;
  123. PRESC_DIV64 = $0A;
  124. PRESC_DIV96 = $0B;
  125. PRESC_DIV128 = $0C;
  126. PRESC_DIV256 = $0D;
  127. // ADC_SAMPDLY
  128. SAMPDLYmask = $0F;
  129. SAMPDLY_DLY0 = $00;
  130. SAMPDLY_DLY1 = $01;
  131. SAMPDLY_DLY2 = $02;
  132. SAMPDLY_DLY3 = $03;
  133. SAMPDLY_DLY4 = $04;
  134. SAMPDLY_DLY5 = $05;
  135. SAMPDLY_DLY6 = $06;
  136. SAMPDLY_DLY7 = $07;
  137. SAMPDLY_DLY8 = $08;
  138. SAMPDLY_DLY9 = $09;
  139. SAMPDLY_DLY10 = $0A;
  140. SAMPDLY_DLY11 = $0B;
  141. SAMPDLY_DLY12 = $0C;
  142. SAMPDLY_DLY13 = $0D;
  143. SAMPDLY_DLY14 = $0E;
  144. SAMPDLY_DLY15 = $0F;
  145. // ADC_INITDLY
  146. INITDLYmask = $E0;
  147. INITDLY_DLY0 = $00;
  148. INITDLY_DLY16 = $20;
  149. INITDLY_DLY32 = $40;
  150. INITDLY_DLY64 = $60;
  151. INITDLY_DLY128 = $80;
  152. INITDLY_DLY256 = $A0;
  153. // ADC_WINCM
  154. WINCMmask = $07;
  155. WINCM_NONE = $00;
  156. WINCM_BELOW = $01;
  157. WINCM_ABOVE = $02;
  158. WINCM_INSIDE = $03;
  159. WINCM_OUTSIDE = $04;
  160. // ADC_MUXPOS
  161. MUXPOSmask = $7F;
  162. MUXPOS_AIN0 = $00;
  163. MUXPOS_AIN1 = $01;
  164. MUXPOS_AIN2 = $02;
  165. MUXPOS_AIN3 = $03;
  166. MUXPOS_AIN4 = $04;
  167. MUXPOS_AIN5 = $05;
  168. MUXPOS_AIN6 = $06;
  169. MUXPOS_AIN7 = $07;
  170. MUXPOS_AIN8 = $08;
  171. MUXPOS_AIN9 = $09;
  172. MUXPOS_AIN10 = $0A;
  173. MUXPOS_AIN11 = $0B;
  174. MUXPOS_AIN12 = $0C;
  175. MUXPOS_AIN13 = $0D;
  176. MUXPOS_AIN14 = $0E;
  177. MUXPOS_AIN15 = $0F;
  178. MUXPOS_AIN16 = $10;
  179. MUXPOS_AIN17 = $11;
  180. MUXPOS_AIN18 = $12;
  181. MUXPOS_AIN19 = $13;
  182. MUXPOS_AIN20 = $14;
  183. MUXPOS_AIN21 = $15;
  184. MUXPOS_GND = $40;
  185. MUXPOS_TEMPSENSE = $42;
  186. MUXPOS_VDDDIV10 = $44;
  187. MUXPOS_VDDIO2DIV10 = $45;
  188. MUXPOS_DAC0 = $48;
  189. MUXPOS_DACREF0 = $49;
  190. MUXPOS_DACREF1 = $4A;
  191. MUXPOS_DACREF2 = $4B;
  192. // ADC_MUXNEG
  193. MUXNEGmask = $7F;
  194. MUXNEG_AIN0 = $00;
  195. MUXNEG_AIN1 = $01;
  196. MUXNEG_AIN2 = $02;
  197. MUXNEG_AIN3 = $03;
  198. MUXNEG_AIN4 = $04;
  199. MUXNEG_AIN5 = $05;
  200. MUXNEG_AIN6 = $06;
  201. MUXNEG_AIN7 = $07;
  202. MUXNEG_AIN8 = $08;
  203. MUXNEG_AIN9 = $09;
  204. MUXNEG_AIN10 = $0A;
  205. MUXNEG_AIN11 = $0B;
  206. MUXNEG_AIN12 = $0C;
  207. MUXNEG_AIN13 = $0D;
  208. MUXNEG_AIN14 = $0E;
  209. MUXNEG_AIN15 = $0F;
  210. MUXNEG_GND = $40;
  211. MUXNEG_DAC0 = $48;
  212. // Start Conversion
  213. STCONVbm = $01;
  214. // Stop Conversion
  215. SPCONVbm = $02;
  216. // Start Event Input Enable
  217. STARTEIbm = $01;
  218. // Result Ready Interrupt Enable
  219. RESRDYbm = $01;
  220. // Window Comparator Interrupt Enable
  221. WCMPbm = $02;
  222. // Debug run
  223. DBGRUNbm = $01;
  224. end;
  225. TBOD = object //Bod interface
  226. CTRLA: byte; //Control A
  227. CTRLB: byte; //Control B
  228. Reserved2: byte;
  229. Reserved3: byte;
  230. Reserved4: byte;
  231. Reserved5: byte;
  232. Reserved6: byte;
  233. Reserved7: byte;
  234. VLMCTRLA: byte; //Voltage level monitor Control
  235. INTCTRL: byte; //Voltage level monitor interrupt Control
  236. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  237. STATUS: byte; //Voltage level monitor status
  238. const
  239. // BOD_SLEEP
  240. SLEEPmask = $03;
  241. SLEEP_DIS = $00;
  242. SLEEP_ENABLED = $01;
  243. SLEEP_SAMPLED = $02;
  244. // BOD_ACTIVE
  245. ACTIVEmask = $0C;
  246. ACTIVE_DIS = $00;
  247. ACTIVE_ENABLED = $04;
  248. ACTIVE_SAMPLED = $08;
  249. ACTIVE_ENWAKE = $0C;
  250. // BOD_SAMPFREQ
  251. SAMPFREQmask = $10;
  252. SAMPFREQ_128HZ = $00;
  253. SAMPFREQ_32HZ = $10;
  254. // BOD_LVL
  255. LVLmask = $07;
  256. LVL_BODLEVEL0 = $00;
  257. LVL_BODLEVEL1 = $01;
  258. LVL_BODLEVEL2 = $02;
  259. LVL_BODLEVEL3 = $03;
  260. // BOD_VLMLVL
  261. VLMLVLmask = $03;
  262. VLMLVL_OFF = $00;
  263. VLMLVL_5ABOVE = $01;
  264. VLMLVL_15ABOVE = $02;
  265. VLMLVL_25ABOVE = $03;
  266. // voltage level monitor interrrupt enable
  267. VLMIEbm = $01;
  268. // BOD_VLMCFG
  269. VLMCFGmask = $06;
  270. VLMCFG_FALLING = $00;
  271. VLMCFG_RISING = $02;
  272. VLMCFG_BOTH = $04;
  273. // Voltage level monitor interrupt flag
  274. VLMIFbm = $01;
  275. // BOD_VLMS
  276. VLMSmask = $01;
  277. VLMS_ABOVE = $00;
  278. VLMS_BELOW = $01;
  279. end;
  280. TCCL = object //Configurable Custom Logic
  281. CTRLA: byte; //Control Register A
  282. SEQCTRL0: byte; //Sequential Control 0
  283. SEQCTRL1: byte; //Sequential Control 1
  284. Reserved3: byte;
  285. Reserved4: byte;
  286. INTCTRL0: byte; //Interrupt Control 0
  287. Reserved6: byte;
  288. INTFLAGS: byte; //Interrupt Flags
  289. LUT0CTRLA: byte; //LUT 0 Control A
  290. LUT0CTRLB: byte; //LUT 0 Control B
  291. LUT0CTRLC: byte; //LUT 0 Control C
  292. TRUTH0: byte; //Truth 0
  293. LUT1CTRLA: byte; //LUT 1 Control A
  294. LUT1CTRLB: byte; //LUT 1 Control B
  295. LUT1CTRLC: byte; //LUT 1 Control C
  296. TRUTH1: byte; //Truth 1
  297. LUT2CTRLA: byte; //LUT 2 Control A
  298. LUT2CTRLB: byte; //LUT 2 Control B
  299. LUT2CTRLC: byte; //LUT 2 Control C
  300. TRUTH2: byte; //Truth 2
  301. LUT3CTRLA: byte; //LUT 3 Control A
  302. LUT3CTRLB: byte; //LUT 3 Control B
  303. LUT3CTRLC: byte; //LUT 3 Control C
  304. TRUTH3: byte; //Truth 3
  305. const
  306. // Enable
  307. ENABLEbm = $01;
  308. // Run in Standby
  309. RUNSTDBYbm = $40;
  310. // CCL_SEQSEL
  311. SEQSELmask = $0F;
  312. SEQSEL_DISABLE = $00;
  313. SEQSEL_DFF = $01;
  314. SEQSEL_JK = $02;
  315. SEQSEL_LATCH = $03;
  316. SEQSEL_RS = $04;
  317. // CCL_INTMODE0
  318. INTMODE0mask = $03;
  319. INTMODE0_INTDISABLE = $00;
  320. INTMODE0_RISING = $01;
  321. INTMODE0_FALLING = $02;
  322. INTMODE0_BOTH = $03;
  323. // CCL_INTMODE1
  324. INTMODE1mask = $0C;
  325. INTMODE1_INTDISABLE = $00;
  326. INTMODE1_RISING = $04;
  327. INTMODE1_FALLING = $08;
  328. INTMODE1_BOTH = $0C;
  329. // CCL_INTMODE2
  330. INTMODE2mask = $30;
  331. INTMODE2_INTDISABLE = $00;
  332. INTMODE2_RISING = $10;
  333. INTMODE2_FALLING = $20;
  334. INTMODE2_BOTH = $30;
  335. // CCL_INTMODE3
  336. INTMODE3mask = $C0;
  337. INTMODE3_INTDISABLE = $00;
  338. INTMODE3_RISING = $40;
  339. INTMODE3_FALLING = $80;
  340. INTMODE3_BOTH = $C0;
  341. // Interrupt Flag
  342. INT0bm = $01;
  343. INT1bm = $02;
  344. INT2bm = $04;
  345. INT3bm = $08;
  346. // CCL_CLKSRC
  347. CLKSRCmask = $0E;
  348. CLKSRC_CLKPER = $00;
  349. CLKSRC_IN2 = $02;
  350. CLKSRC_OSCHF = $08;
  351. CLKSRC_OSC32K = $0A;
  352. CLKSRC_OSC1K = $0C;
  353. // CCL_FILTSEL
  354. FILTSELmask = $30;
  355. FILTSEL_DISABLE = $00;
  356. FILTSEL_SYNCH = $10;
  357. FILTSEL_FILTER = $20;
  358. // Output Enable
  359. OUTENbm = $40;
  360. // CCL_EDGEDET
  361. EDGEDETmask = $80;
  362. EDGEDET_DIS = $00;
  363. EDGEDET_EN = $80;
  364. // CCL_INSEL0
  365. INSEL0mask = $0F;
  366. INSEL0_MASK = $00;
  367. INSEL0_FEEDBACK = $01;
  368. INSEL0_LINK = $02;
  369. INSEL0_EVENTA = $03;
  370. INSEL0_EVENTB = $04;
  371. INSEL0_IN0 = $05;
  372. INSEL0_AC0 = $06;
  373. INSEL0_ZCD0 = $07;
  374. INSEL0_USART0 = $08;
  375. INSEL0_SPI0 = $09;
  376. INSEL0_TCA0 = $0A;
  377. INSEL0_TCB0 = $0C;
  378. INSEL0_TCD0 = $0D;
  379. // CCL_INSEL1
  380. INSEL1mask = $F0;
  381. INSEL1_MASK = $00;
  382. INSEL1_FEEDBACK = $10;
  383. INSEL1_LINK = $20;
  384. INSEL1_EVENTA = $30;
  385. INSEL1_EVENTB = $40;
  386. INSEL1_IN1 = $50;
  387. INSEL1_AC1 = $60;
  388. INSEL1_USART1 = $80;
  389. INSEL1_SPI0 = $90;
  390. INSEL1_TCA0 = $A0;
  391. INSEL1_TCB1 = $C0;
  392. INSEL1_TCD0 = $D0;
  393. // CCL_INSEL2
  394. INSEL2mask = $0F;
  395. INSEL2_MASK = $00;
  396. INSEL2_FEEDBACK = $01;
  397. INSEL2_LINK = $02;
  398. INSEL2_EVENTA = $03;
  399. INSEL2_EVENTB = $04;
  400. INSEL2_IN2 = $05;
  401. INSEL2_AC2 = $06;
  402. INSEL2_USART2 = $08;
  403. INSEL2_SPI0 = $09;
  404. INSEL2_TCA0 = $0A;
  405. INSEL2_TCB2 = $0C;
  406. INSEL2_TCD0 = $0D;
  407. end;
  408. TCLKCTRL = object //Clock controller
  409. MCLKCTRLA: byte; //MCLK Control A
  410. MCLKCTRLB: byte; //MCLK Control B
  411. MCLKCTRLC: byte; //MCLK Control C
  412. MCLKINTCTRL: byte; //MCLK Interrupt Control
  413. MCLKINTFLAGS: byte; //MCLK Interrupt Flags
  414. MCLKSTATUS: byte; //MCLK Status
  415. Reserved6: byte;
  416. Reserved7: byte;
  417. OSCHFCTRLA: byte; //OSCHF Control A
  418. OSCHFTUNE: byte; //OSCHF Tune
  419. Reserved10: byte;
  420. Reserved11: byte;
  421. Reserved12: byte;
  422. Reserved13: byte;
  423. Reserved14: byte;
  424. Reserved15: byte;
  425. PLLCTRLA: byte; //PLL Control A
  426. Reserved17: byte;
  427. Reserved18: byte;
  428. Reserved19: byte;
  429. Reserved20: byte;
  430. Reserved21: byte;
  431. Reserved22: byte;
  432. Reserved23: byte;
  433. OSC32KCTRLA: byte; //OSC32K Control A
  434. Reserved25: byte;
  435. Reserved26: byte;
  436. Reserved27: byte;
  437. XOSC32KCTRLA: byte; //XOSC32K Control A
  438. Reserved29: byte;
  439. Reserved30: byte;
  440. Reserved31: byte;
  441. XOSCHFCTRLA: byte; //XOSC High-Frequency Control A
  442. const
  443. // CLKCTRL_CLKSEL
  444. CLKSELmask = $07;
  445. CLKSEL_OSCHF = $00;
  446. CLKSEL_OSC32K = $01;
  447. CLKSEL_XOSC32K = $02;
  448. CLKSEL_EXTCLK = $03;
  449. // System clock out
  450. CLKOUTbm = $80;
  451. // Prescaler enable
  452. PENbm = $01;
  453. // CLKCTRL_PDIV
  454. PDIVmask = $1E;
  455. PDIV_2X = $00;
  456. PDIV_4X = $02;
  457. PDIV_8X = $04;
  458. PDIV_16X = $06;
  459. PDIV_32X = $08;
  460. PDIV_64X = $0A;
  461. PDIV_6X = $10;
  462. PDIV_10X = $12;
  463. PDIV_12X = $14;
  464. PDIV_24X = $16;
  465. PDIV_48X = $18;
  466. // Clock Failure Detect Enable
  467. CFDENbm = $01;
  468. // Clock Failure Detect Test
  469. CFDTSTbm = $02;
  470. // CLKCTRL_CFDSRC
  471. CFDSRCmask = $0C;
  472. CFDSRC_CLKMAIN = $00;
  473. CFDSRC_XOSCHF = $04;
  474. CFDSRC_XOSC32K = $08;
  475. // Clock Failure Detect Interrupt Enable
  476. CFDbm = $01;
  477. // CLKCTRL_INTTYPE
  478. INTTYPEmask = $80;
  479. INTTYPE_INT = $00;
  480. INTTYPE_NMI = $80;
  481. // System Oscillator changing
  482. SOSCbm = $01;
  483. // High frequency oscillator status
  484. OSCHFSbm = $02;
  485. // 32KHz oscillator status
  486. OSC32KSbm = $04;
  487. // 32.768 kHz Crystal Oscillator status
  488. XOSC32KSbm = $08;
  489. // External Clock status
  490. EXTSbm = $10;
  491. // PLL oscillator status
  492. PLLSbm = $20;
  493. // Autotune
  494. AUTOTUNEbm = $01;
  495. // CLKCTRL_FRQSEL
  496. FRQSELmask = $3C;
  497. FRQSEL_1M = $00;
  498. FRQSEL_2M = $04;
  499. FRQSEL_3M = $08;
  500. FRQSEL_4M = $0C;
  501. FRQSEL_8M = $14;
  502. FRQSEL_12M = $18;
  503. FRQSEL_16M = $1C;
  504. FRQSEL_20M = $20;
  505. FRQSEL_24M = $24;
  506. // Run standby
  507. RUNSTDBYbm = $80;
  508. // CLKCTRL_MULFAC
  509. MULFACmask = $03;
  510. MULFAC_DISABLE = $00;
  511. MULFAC_2x = $01;
  512. MULFAC_3x = $02;
  513. // CLKCTRL_SOURCE
  514. SOURCEmask = $40;
  515. SOURCE_OSCHF = $00;
  516. SOURCE_XOSCHF = $40;
  517. // Enable
  518. ENABLEbm = $01;
  519. // Low power mode
  520. LPMODEbm = $02;
  521. // Select
  522. SELbm = $04;
  523. // CLKCTRL_CSUT
  524. CSUTmask = $30;
  525. CSUT_1K = $00;
  526. CSUT_16K = $10;
  527. CSUT_32K = $20;
  528. CSUT_64K = $30;
  529. // CLKCTRL_SELHF
  530. SELHFmask = $02;
  531. SELHF_XTAL = $00;
  532. SELHF_EXTCLOCK = $02;
  533. // CLKCTRL_FRQRANGE
  534. FRQRANGEmask = $0C;
  535. FRQRANGE_8M = $00;
  536. FRQRANGE_16M = $04;
  537. FRQRANGE_24M = $08;
  538. FRQRANGE_32M = $0C;
  539. // CLKCTRL_CSUTHF
  540. CSUTHFmask = $30;
  541. CSUTHF_256 = $00;
  542. CSUTHF_1K = $10;
  543. CSUTHF_4K = $20;
  544. // Run Standby
  545. RUNSTBYbm = $80;
  546. end;
  547. TCPU = object //CPU
  548. Reserved0: byte;
  549. Reserved1: byte;
  550. Reserved2: byte;
  551. Reserved3: byte;
  552. CCP: byte; //Configuration Change Protection
  553. Reserved5: byte;
  554. Reserved6: byte;
  555. Reserved7: byte;
  556. Reserved8: byte;
  557. Reserved9: byte;
  558. Reserved10: byte;
  559. RAMPZ: byte; //Extended Z-pointer Register
  560. Reserved12: byte;
  561. SP: word; //Stack Pointer
  562. SREG: byte; //Status Register
  563. const
  564. // CPU_CCP
  565. CCPmask = $FF;
  566. CCP_SPM = $9D;
  567. CCP_IOREG = $D8;
  568. // Extended Z-Pointer Address bits
  569. RAMPZbm = $01;
  570. // Carry Flag
  571. Cbm = $01;
  572. // Zero Flag
  573. Zbm = $02;
  574. // Negative Flag
  575. Nbm = $04;
  576. // Two's Complement Overflow Flag
  577. Vbm = $08;
  578. // N Exclusive Or V Flag
  579. Sbm = $10;
  580. // Half Carry Flag
  581. Hbm = $20;
  582. // Transfer Bit
  583. Tbm = $40;
  584. // Global Interrupt Enable Flag
  585. Ibm = $80;
  586. end;
  587. TCPUINT = object //Interrupt Controller
  588. CTRLA: byte; //Control A
  589. STATUS: byte; //Status
  590. LVL0PRI: byte; //Interrupt Level 0 Priority
  591. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  592. const
  593. // Round-robin Scheduling Enable
  594. LVL0RRbm = $01;
  595. // Compact Vector Table
  596. CVTbm = $20;
  597. // Interrupt Vector Select
  598. IVSELbm = $40;
  599. // Level 0 Interrupt Executing
  600. LVL0EXbm = $01;
  601. // Level 1 Interrupt Executing
  602. LVL1EXbm = $02;
  603. // Non-maskable Interrupt Executing
  604. NMIEXbm = $80;
  605. end;
  606. TCRCSCAN = object //CRCSCAN
  607. CTRLA: byte; //Control A
  608. CTRLB: byte; //Control B
  609. STATUS: byte; //Status
  610. const
  611. // Enable CRC scan
  612. ENABLEbm = $01;
  613. // Enable NMI Trigger
  614. NMIENbm = $02;
  615. // Reset CRC scan
  616. RESETbm = $80;
  617. // CRCSCAN_SRC
  618. SRCmask = $03;
  619. SRC_FLASH = $00;
  620. SRC_APPLICATION = $01;
  621. SRC_BOOT = $02;
  622. // CRC Busy
  623. BUSYbm = $01;
  624. // CRC Ok
  625. OKbm = $02;
  626. end;
  627. TDAC = object //Digital to Analog Converter
  628. CTRLA: byte; //Control Register A
  629. Reserved1: byte;
  630. DATA: word; //DATA Register
  631. const
  632. // DAC Enable
  633. ENABLEbm = $01;
  634. // Output Buffer Enable
  635. OUTENbm = $40;
  636. // Run in Standby Mode
  637. RUNSTDBYbm = $80;
  638. end;
  639. TEVSYS = object //Event System
  640. SWEVENTA: byte; //Software Event A
  641. Reserved1: byte;
  642. Reserved2: byte;
  643. Reserved3: byte;
  644. Reserved4: byte;
  645. Reserved5: byte;
  646. Reserved6: byte;
  647. Reserved7: byte;
  648. Reserved8: byte;
  649. Reserved9: byte;
  650. Reserved10: byte;
  651. Reserved11: byte;
  652. Reserved12: byte;
  653. Reserved13: byte;
  654. Reserved14: byte;
  655. Reserved15: byte;
  656. CHANNEL0: byte; //Multiplexer Channel 0
  657. CHANNEL1: byte; //Multiplexer Channel 1
  658. CHANNEL2: byte; //Multiplexer Channel 2
  659. CHANNEL3: byte; //Multiplexer Channel 3
  660. CHANNEL4: byte; //Multiplexer Channel 4
  661. CHANNEL5: byte; //Multiplexer Channel 5
  662. CHANNEL6: byte; //Multiplexer Channel 6
  663. CHANNEL7: byte; //Multiplexer Channel 7
  664. Reserved24: byte;
  665. Reserved25: byte;
  666. Reserved26: byte;
  667. Reserved27: byte;
  668. Reserved28: byte;
  669. Reserved29: byte;
  670. Reserved30: byte;
  671. Reserved31: byte;
  672. USERCCLLUT0A: byte; //User 0 - CCL0 Event A
  673. USERCCLLUT0B: byte; //User 1 - CCL0 Event B
  674. USERCCLLUT1A: byte; //User 2 - CCL1 Event A
  675. USERCCLLUT1B: byte; //User 3 - CCL1 Event B
  676. USERCCLLUT2A: byte; //User 4 - CCL2 Event A
  677. USERCCLLUT2B: byte; //User 5 - CCL2 Event B
  678. USERCCLLUT3A: byte; //User 6 - CCL3 Event A
  679. USERCCLLUT3B: byte; //User 7 - CCL3 Event B
  680. Reserved40: byte;
  681. Reserved41: byte;
  682. Reserved42: byte;
  683. Reserved43: byte;
  684. USERADC0START: byte; //User 12 - ADC0
  685. USEREVSYSEVOUTA: byte; //User 13 - EVOUTA
  686. Reserved46: byte;
  687. USEREVSYSEVOUTC: byte; //User 15 - EVOUTC
  688. USEREVSYSEVOUTD: byte; //User 16 - EVOUTD
  689. Reserved49: byte;
  690. USEREVSYSEVOUTF: byte; //User 18 - EVOUTF
  691. Reserved51: byte;
  692. USERUSART0IRDA: byte; //User 20 - USART0
  693. USERUSART1IRDA: byte; //User 21 - USART1
  694. USERUSART2IRDA: byte; //User 22 - USART2
  695. Reserved55: byte;
  696. Reserved56: byte;
  697. Reserved57: byte;
  698. USERTCA0CNTA: byte; //User 26 - TCA0 Event A
  699. USERTCA0CNTB: byte; //User 27 - TCA0 Event B
  700. Reserved60: byte;
  701. Reserved61: byte;
  702. USERTCB0CAPT: byte; //User 30 - TCB0 Event A
  703. USERTCB0COUNT: byte; //User 31 - TCB0 Event B
  704. USERTCB1CAPT: byte; //User 32 - TCB1 Event A
  705. USERTCB1COUNT: byte; //User 33 - TCB1 Event B
  706. USERTCB2CAPT: byte; //User 34 - TCB2 Event A
  707. USERTCB2COUNT: byte; //User 35 - TCB2 Event B
  708. Reserved68: byte;
  709. Reserved69: byte;
  710. Reserved70: byte;
  711. Reserved71: byte;
  712. USERTCD0INPUTA: byte; //User 40 - TCD0 Event A
  713. USERTCD0INPUTB: byte; //User 41 - TCD0 Event B
  714. USEROPAMP0ENABLE: byte; //User 42 - OPAMP0 Enable
  715. USEROPAMP0DISABLE: byte; //User 43 - OPAMP0 Disable
  716. USEROPAMP0DUMP: byte; //User 44 - OPAMP0 Dump
  717. USEROPAMP0DRIVE: byte; //User 45 - OPAMP0 Drive
  718. USEROPAMP1ENABLE: byte; //User 46 - OPAMP1 Enable
  719. USEROPAMP1DISABLE: byte; //User 47 - OPAMP1 Disable
  720. USEROPAMP1DUMP: byte; //User 48 - OPAMP1 Dump
  721. USEROPAMP1DRIVE: byte; //User 49 - OPAMP1 Drive
  722. const
  723. // EVSYS_SWEVENTA
  724. SWEVENTAmask = $FF;
  725. SWEVENTA_CH0 = $01;
  726. SWEVENTA_CH1 = $02;
  727. SWEVENTA_CH2 = $04;
  728. SWEVENTA_CH3 = $08;
  729. SWEVENTA_CH4 = $10;
  730. SWEVENTA_CH5 = $20;
  731. SWEVENTA_CH6 = $40;
  732. SWEVENTA_CH7 = $80;
  733. // EVSYS_CHANNEL0
  734. CHANNEL0mask = $FF;
  735. CHANNEL0_OFF = $00;
  736. CHANNEL0_UPDI_SYNCH = $01;
  737. CHANNEL0_MVIO = $05;
  738. CHANNEL0_RTC_OVF = $06;
  739. CHANNEL0_RTC_CMP = $07;
  740. CHANNEL0_RTC_PIT_DIV8192 = $08;
  741. CHANNEL0_RTC_PIT_DIV4096 = $09;
  742. CHANNEL0_RTC_PIT_DIV2048 = $0A;
  743. CHANNEL0_RTC_PIT_DIV1024 = $0B;
  744. CHANNEL0_CCL_LUT0 = $10;
  745. CHANNEL0_CCL_LUT1 = $11;
  746. CHANNEL0_CCL_LUT2 = $12;
  747. CHANNEL0_CCL_LUT3 = $13;
  748. CHANNEL0_AC0_OUT = $20;
  749. CHANNEL0_AC1_OUT = $21;
  750. CHANNEL0_AC2_OUT = $22;
  751. CHANNEL0_ADC0_RESRDY = $24;
  752. CHANNEL0_ZCD0 = $30;
  753. CHANNEL0_OPAMP0_READY = $34;
  754. CHANNEL0_OPAMP1_READY = $35;
  755. CHANNEL0_PORTA_PIN0 = $40;
  756. CHANNEL0_PORTA_PIN1 = $41;
  757. CHANNEL0_PORTA_PIN2 = $42;
  758. CHANNEL0_PORTA_PIN3 = $43;
  759. CHANNEL0_PORTA_PIN4 = $44;
  760. CHANNEL0_PORTA_PIN5 = $45;
  761. CHANNEL0_PORTA_PIN6 = $46;
  762. CHANNEL0_PORTA_PIN7 = $47;
  763. CHANNEL0_USART0_XCK = $60;
  764. CHANNEL0_USART1_XCK = $61;
  765. CHANNEL0_USART2_XCK = $62;
  766. CHANNEL0_SPI0_SCK = $68;
  767. CHANNEL0_SPI1_SCK = $69;
  768. CHANNEL0_TCA0_OVF_LUNF = $80;
  769. CHANNEL0_TCA0_HUNF = $81;
  770. CHANNEL0_TCA0_CMP0_LCMP0 = $84;
  771. CHANNEL0_TCA0_CMP1_LCMP1 = $85;
  772. CHANNEL0_TCA0_CMP2_LCMP2 = $86;
  773. CHANNEL0_TCB0_CAPT = $A0;
  774. CHANNEL0_TCB0_OVF = $A1;
  775. CHANNEL0_TCB1_CAPT = $A2;
  776. CHANNEL0_TCB1_OVF = $A3;
  777. CHANNEL0_TCB2_CAPT = $A4;
  778. CHANNEL0_TCB2_OVF = $A5;
  779. CHANNEL0_TCD0_CMPBCLR = $B0;
  780. CHANNEL0_TCD0_CMPASET = $B1;
  781. CHANNEL0_TCD0_CMPBSET = $B2;
  782. CHANNEL0_TCD0_PROGEV = $B3;
  783. // EVSYS_CHANNEL1
  784. CHANNEL1mask = $FF;
  785. CHANNEL1_OFF = $00;
  786. CHANNEL1_UPDI_SYNCH = $01;
  787. CHANNEL1_MVIO = $05;
  788. CHANNEL1_RTC_OVF = $06;
  789. CHANNEL1_RTC_CMP = $07;
  790. CHANNEL1_RTC_PIT_DIV512 = $08;
  791. CHANNEL1_RTC_PIT_DIV256 = $09;
  792. CHANNEL1_RTC_PIT_DIV128 = $0A;
  793. CHANNEL1_RTC_PIT_DIV64 = $0B;
  794. CHANNEL1_CCL_LUT0 = $10;
  795. CHANNEL1_CCL_LUT1 = $11;
  796. CHANNEL1_CCL_LUT2 = $12;
  797. CHANNEL1_CCL_LUT3 = $13;
  798. CHANNEL1_AC0_OUT = $20;
  799. CHANNEL1_AC1_OUT = $21;
  800. CHANNEL1_AC2_OUT = $22;
  801. CHANNEL1_ADC0_RESRDY = $24;
  802. CHANNEL1_ZCD0 = $30;
  803. CHANNEL1_OPAMP0_READY = $34;
  804. CHANNEL1_OPAMP1_READY = $35;
  805. CHANNEL1_PORTA_PIN0 = $40;
  806. CHANNEL1_PORTA_PIN1 = $41;
  807. CHANNEL1_PORTA_PIN2 = $42;
  808. CHANNEL1_PORTA_PIN3 = $43;
  809. CHANNEL1_PORTA_PIN4 = $44;
  810. CHANNEL1_PORTA_PIN5 = $45;
  811. CHANNEL1_PORTA_PIN6 = $46;
  812. CHANNEL1_PORTA_PIN7 = $47;
  813. CHANNEL1_USART0_XCK = $60;
  814. CHANNEL1_USART1_XCK = $61;
  815. CHANNEL1_USART2_XCK = $62;
  816. CHANNEL1_SPI0_SCK = $68;
  817. CHANNEL1_SPI1_SCK = $69;
  818. CHANNEL1_TCA0_OVF_LUNF = $80;
  819. CHANNEL1_TCA0_HUNF = $81;
  820. CHANNEL1_TCA0_CMP0_LCMP0 = $84;
  821. CHANNEL1_TCA0_CMP1_LCMP1 = $85;
  822. CHANNEL1_TCA0_CMP2_LCMP2 = $86;
  823. CHANNEL1_TCB0_CAPT = $A0;
  824. CHANNEL1_TCB0_OVF = $A1;
  825. CHANNEL1_TCB1_CAPT = $A2;
  826. CHANNEL1_TCB1_OVF = $A3;
  827. CHANNEL1_TCB2_CAPT = $A4;
  828. CHANNEL1_TCB2_OVF = $A5;
  829. CHANNEL1_TCD0_CMPBCLR = $B0;
  830. CHANNEL1_TCD0_CMPASET = $B1;
  831. CHANNEL1_TCD0_CMPBSET = $B2;
  832. CHANNEL1_TCD0_PROGEV = $B3;
  833. // EVSYS_CHANNEL2
  834. CHANNEL2mask = $FF;
  835. CHANNEL2_OFF = $00;
  836. CHANNEL2_UPDI_SYNCH = $01;
  837. CHANNEL2_MVIO = $05;
  838. CHANNEL2_RTC_OVF = $06;
  839. CHANNEL2_RTC_CMP = $07;
  840. CHANNEL2_RTC_PIT_DIV8192 = $08;
  841. CHANNEL2_RTC_PIT_DIV4096 = $09;
  842. CHANNEL2_RTC_PIT_DIV2048 = $0A;
  843. CHANNEL2_RTC_PIT_DIV1024 = $0B;
  844. CHANNEL2_CCL_LUT0 = $10;
  845. CHANNEL2_CCL_LUT1 = $11;
  846. CHANNEL2_CCL_LUT2 = $12;
  847. CHANNEL2_CCL_LUT3 = $13;
  848. CHANNEL2_AC0_OUT = $20;
  849. CHANNEL2_AC1_OUT = $21;
  850. CHANNEL2_AC2_OUT = $22;
  851. CHANNEL2_ADC0_RESRDY = $24;
  852. CHANNEL2_ZCD0 = $30;
  853. CHANNEL2_OPAMP0_READY = $34;
  854. CHANNEL2_OPAMP1_READY = $35;
  855. CHANNEL2_PORTC_PIN0 = $40;
  856. CHANNEL2_PORTC_PIN1 = $41;
  857. CHANNEL2_PORTC_PIN2 = $42;
  858. CHANNEL2_PORTC_PIN3 = $43;
  859. CHANNEL2_PORTD_PIN1 = $49;
  860. CHANNEL2_PORTD_PIN2 = $4A;
  861. CHANNEL2_PORTD_PIN3 = $4B;
  862. CHANNEL2_PORTD_PIN4 = $4C;
  863. CHANNEL2_PORTD_PIN5 = $4D;
  864. CHANNEL2_PORTD_PIN6 = $4E;
  865. CHANNEL2_PORTD_PIN7 = $4F;
  866. CHANNEL2_USART0_XCK = $60;
  867. CHANNEL2_USART1_XCK = $61;
  868. CHANNEL2_USART2_XCK = $62;
  869. CHANNEL2_SPI0_SCK = $68;
  870. CHANNEL2_SPI1_SCK = $69;
  871. CHANNEL2_TCA0_OVF_LUNF = $80;
  872. CHANNEL2_TCA0_HUNF = $81;
  873. CHANNEL2_TCA0_CMP0_LCMP0 = $84;
  874. CHANNEL2_TCA0_CMP1_LCMP1 = $85;
  875. CHANNEL2_TCA0_CMP2_LCMP2 = $86;
  876. CHANNEL2_TCB0_CAPT = $A0;
  877. CHANNEL2_TCB0_OVF = $A1;
  878. CHANNEL2_TCB1_CAPT = $A2;
  879. CHANNEL2_TCB1_OVF = $A3;
  880. CHANNEL2_TCB2_CAPT = $A4;
  881. CHANNEL2_TCB2_OVF = $A5;
  882. CHANNEL2_TCD0_CMPBCLR = $B0;
  883. CHANNEL2_TCD0_CMPASET = $B1;
  884. CHANNEL2_TCD0_CMPBSET = $B2;
  885. CHANNEL2_TCD0_PROGEV = $B3;
  886. // EVSYS_CHANNEL3
  887. CHANNEL3mask = $FF;
  888. CHANNEL3_OFF = $00;
  889. CHANNEL3_UPDI_SYNCH = $01;
  890. CHANNEL3_MVIO = $05;
  891. CHANNEL3_RTC_OVF = $06;
  892. CHANNEL3_RTC_CMP = $07;
  893. CHANNEL3_RTC_PIT_DIV512 = $08;
  894. CHANNEL3_RTC_PIT_DIV256 = $09;
  895. CHANNEL3_RTC_PIT_DIV128 = $0A;
  896. CHANNEL3_RTC_PIT_DIV64 = $0B;
  897. CHANNEL3_CCL_LUT0 = $10;
  898. CHANNEL3_CCL_LUT1 = $11;
  899. CHANNEL3_CCL_LUT2 = $12;
  900. CHANNEL3_CCL_LUT3 = $13;
  901. CHANNEL3_AC0_OUT = $20;
  902. CHANNEL3_AC1_OUT = $21;
  903. CHANNEL3_AC2_OUT = $22;
  904. CHANNEL3_ADC0_RESRDY = $24;
  905. CHANNEL3_ZCD0 = $30;
  906. CHANNEL3_OPAMP0_READY = $34;
  907. CHANNEL3_OPAMP1_READY = $35;
  908. CHANNEL3_PORTC_PIN0 = $40;
  909. CHANNEL3_PORTC_PIN1 = $41;
  910. CHANNEL3_PORTC_PIN2 = $42;
  911. CHANNEL3_PORTC_PIN3 = $43;
  912. CHANNEL3_PORTD_PIN1 = $49;
  913. CHANNEL3_PORTD_PIN2 = $4A;
  914. CHANNEL3_PORTD_PIN3 = $4B;
  915. CHANNEL3_PORTD_PIN4 = $4C;
  916. CHANNEL3_PORTD_PIN5 = $4D;
  917. CHANNEL3_PORTD_PIN6 = $4E;
  918. CHANNEL3_PORTD_PIN7 = $4F;
  919. CHANNEL3_USART0_XCK = $60;
  920. CHANNEL3_USART1_XCK = $61;
  921. CHANNEL3_USART2_XCK = $62;
  922. CHANNEL3_SPI0_SCK = $68;
  923. CHANNEL3_SPI1_SCK = $69;
  924. CHANNEL3_TCA0_OVF_LUNF = $80;
  925. CHANNEL3_TCA0_HUNF = $81;
  926. CHANNEL3_TCA0_CMP0_LCMP0 = $84;
  927. CHANNEL3_TCA0_CMP1_LCMP1 = $85;
  928. CHANNEL3_TCA0_CMP2_LCMP2 = $86;
  929. CHANNEL3_TCB0_CAPT = $A0;
  930. CHANNEL3_TCB0_OVF = $A1;
  931. CHANNEL3_TCB1_CAPT = $A2;
  932. CHANNEL3_TCB1_OVF = $A3;
  933. CHANNEL3_TCB2_CAPT = $A4;
  934. CHANNEL3_TCB2_OVF = $A5;
  935. CHANNEL3_TCD0_CMPBCLR = $B0;
  936. CHANNEL3_TCD0_CMPASET = $B1;
  937. CHANNEL3_TCD0_CMPBSET = $B2;
  938. CHANNEL3_TCD0_PROGEV = $B3;
  939. // EVSYS_CHANNEL4
  940. CHANNEL4mask = $FF;
  941. CHANNEL4_OFF = $00;
  942. CHANNEL4_UPDI_SYNCH = $01;
  943. CHANNEL4_MVIO = $05;
  944. CHANNEL4_RTC_OVF = $06;
  945. CHANNEL4_RTC_CMP = $07;
  946. CHANNEL4_RTC_PIT_DIV8192 = $08;
  947. CHANNEL4_RTC_PIT_DIV4096 = $09;
  948. CHANNEL4_RTC_PIT_DIV2048 = $0A;
  949. CHANNEL4_RTC_PIT_DIV1024 = $0B;
  950. CHANNEL4_CCL_LUT0 = $10;
  951. CHANNEL4_CCL_LUT1 = $11;
  952. CHANNEL4_CCL_LUT2 = $12;
  953. CHANNEL4_CCL_LUT3 = $13;
  954. CHANNEL4_AC0_OUT = $20;
  955. CHANNEL4_AC1_OUT = $21;
  956. CHANNEL4_AC2_OUT = $22;
  957. CHANNEL4_ADC0_RESRDY = $24;
  958. CHANNEL4_ZCD0 = $30;
  959. CHANNEL4_OPAMP0_READY = $34;
  960. CHANNEL4_OPAMP1_READY = $35;
  961. CHANNEL4_PORTF_PIN0 = $48;
  962. CHANNEL4_PORTF_PIN1 = $49;
  963. CHANNEL4_PORTF_PIN6 = $4E;
  964. CHANNEL4_USART0_XCK = $60;
  965. CHANNEL4_USART1_XCK = $61;
  966. CHANNEL4_USART2_XCK = $62;
  967. CHANNEL4_SPI0_SCK = $68;
  968. CHANNEL4_SPI1_SCK = $69;
  969. CHANNEL4_TCA0_OVF_LUNF = $80;
  970. CHANNEL4_TCA0_HUNF = $81;
  971. CHANNEL4_TCA0_CMP0_LCMP0 = $84;
  972. CHANNEL4_TCA0_CMP1_LCMP1 = $85;
  973. CHANNEL4_TCA0_CMP2_LCMP2 = $86;
  974. CHANNEL4_TCB0_CAPT = $A0;
  975. CHANNEL4_TCB0_OVF = $A1;
  976. CHANNEL4_TCB1_CAPT = $A2;
  977. CHANNEL4_TCB1_OVF = $A3;
  978. CHANNEL4_TCB2_CAPT = $A4;
  979. CHANNEL4_TCB2_OVF = $A5;
  980. CHANNEL4_TCD0_CMPBCLR = $B0;
  981. CHANNEL4_TCD0_CMPASET = $B1;
  982. CHANNEL4_TCD0_CMPBSET = $B2;
  983. CHANNEL4_TCD0_PROGEV = $B3;
  984. // EVSYS_CHANNEL5
  985. CHANNEL5mask = $FF;
  986. CHANNEL5_OFF = $00;
  987. CHANNEL5_UPDI_SYNCH = $01;
  988. CHANNEL5_MVIO = $05;
  989. CHANNEL5_RTC_OVF = $06;
  990. CHANNEL5_RTC_CMP = $07;
  991. CHANNEL5_RTC_PIT_DIV512 = $08;
  992. CHANNEL5_RTC_PIT_DIV256 = $09;
  993. CHANNEL5_RTC_PIT_DIV128 = $0A;
  994. CHANNEL5_RTC_PIT_DIV64 = $0B;
  995. CHANNEL5_CCL_LUT0 = $10;
  996. CHANNEL5_CCL_LUT1 = $11;
  997. CHANNEL5_CCL_LUT2 = $12;
  998. CHANNEL5_CCL_LUT3 = $13;
  999. CHANNEL5_AC0_OUT = $20;
  1000. CHANNEL5_AC1_OUT = $21;
  1001. CHANNEL5_AC2_OUT = $22;
  1002. CHANNEL5_ADC0_RESRDY = $24;
  1003. CHANNEL5_ZCD0 = $30;
  1004. CHANNEL5_OPAMP0_READY = $34;
  1005. CHANNEL5_OPAMP1_READY = $35;
  1006. CHANNEL5_PORTF_PIN0 = $48;
  1007. CHANNEL5_PORTF_PIN1 = $49;
  1008. CHANNEL5_PORTF_PIN6 = $4E;
  1009. CHANNEL5_USART0_XCK = $60;
  1010. CHANNEL5_USART1_XCK = $61;
  1011. CHANNEL5_USART2_XCK = $62;
  1012. CHANNEL5_SPI0_SCK = $68;
  1013. CHANNEL5_SPI1_SCK = $69;
  1014. CHANNEL5_TCA0_OVF_LUNF = $80;
  1015. CHANNEL5_TCA0_HUNF = $81;
  1016. CHANNEL5_TCA0_CMP0_LCMP0 = $84;
  1017. CHANNEL5_TCA0_CMP1_LCMP1 = $85;
  1018. CHANNEL5_TCA0_CMP2_LCMP2 = $86;
  1019. CHANNEL5_TCB0_CAPT = $A0;
  1020. CHANNEL5_TCB0_OVF = $A1;
  1021. CHANNEL5_TCB1_CAPT = $A2;
  1022. CHANNEL5_TCB1_OVF = $A3;
  1023. CHANNEL5_TCB2_CAPT = $A4;
  1024. CHANNEL5_TCB2_OVF = $A5;
  1025. CHANNEL5_TCD0_CMPBCLR = $B0;
  1026. CHANNEL5_TCD0_CMPASET = $B1;
  1027. CHANNEL5_TCD0_CMPBSET = $B2;
  1028. CHANNEL5_TCD0_PROGEV = $B3;
  1029. // EVSYS_CHANNEL6
  1030. CHANNEL6mask = $FF;
  1031. CHANNEL6_OFF = $00;
  1032. CHANNEL6_UPDI_SYNCH = $01;
  1033. CHANNEL6_MVIO = $05;
  1034. CHANNEL6_RTC_OVF = $06;
  1035. CHANNEL6_RTC_CMP = $07;
  1036. CHANNEL6_RTC_PIT_DIV8192 = $08;
  1037. CHANNEL6_RTC_PIT_DIV4096 = $09;
  1038. CHANNEL6_RTC_PIT_DIV2048 = $0A;
  1039. CHANNEL6_RTC_PIT_DIV1024 = $0B;
  1040. CHANNEL6_CCL_LUT0 = $10;
  1041. CHANNEL6_CCL_LUT1 = $11;
  1042. CHANNEL6_CCL_LUT2 = $12;
  1043. CHANNEL6_CCL_LUT3 = $13;
  1044. CHANNEL6_AC0_OUT = $20;
  1045. CHANNEL6_AC1_OUT = $21;
  1046. CHANNEL6_AC2_OUT = $22;
  1047. CHANNEL6_ADC0_RESRDY = $24;
  1048. CHANNEL6_ZCD0 = $30;
  1049. CHANNEL6_OPAMP0_READY = $34;
  1050. CHANNEL6_OPAMP1_READY = $35;
  1051. CHANNEL6_USART0_XCK = $60;
  1052. CHANNEL6_USART1_XCK = $61;
  1053. CHANNEL6_USART2_XCK = $62;
  1054. CHANNEL6_SPI0_SCK = $68;
  1055. CHANNEL6_SPI1_SCK = $69;
  1056. CHANNEL6_TCA0_OVF_LUNF = $80;
  1057. CHANNEL6_TCA0_HUNF = $81;
  1058. CHANNEL6_TCA0_CMP0_LCMP0 = $84;
  1059. CHANNEL6_TCA0_CMP1_LCMP1 = $85;
  1060. CHANNEL6_TCA0_CMP2_LCMP2 = $86;
  1061. CHANNEL6_TCB0_CAPT = $A0;
  1062. CHANNEL6_TCB0_OVF = $A1;
  1063. CHANNEL6_TCB1_CAPT = $A2;
  1064. CHANNEL6_TCB1_OVF = $A3;
  1065. CHANNEL6_TCB2_CAPT = $A4;
  1066. CHANNEL6_TCB2_OVF = $A5;
  1067. CHANNEL6_TCD0_CMPBCLR = $B0;
  1068. CHANNEL6_TCD0_CMPASET = $B1;
  1069. CHANNEL6_TCD0_CMPBSET = $B2;
  1070. CHANNEL6_TCD0_PROGEV = $B3;
  1071. // EVSYS_CHANNEL7
  1072. CHANNEL7mask = $FF;
  1073. CHANNEL7_OFF = $00;
  1074. CHANNEL7_UPDI_SYNCH = $01;
  1075. CHANNEL7_MVIO = $05;
  1076. CHANNEL7_RTC_OVF = $06;
  1077. CHANNEL7_RTC_CMP = $07;
  1078. CHANNEL7_RTC_PIT_DIV512 = $08;
  1079. CHANNEL7_RTC_PIT_DIV256 = $09;
  1080. CHANNEL7_RTC_PIT_DIV128 = $0A;
  1081. CHANNEL7_RTC_PIT_DIV64 = $0B;
  1082. CHANNEL7_CCL_LUT0 = $10;
  1083. CHANNEL7_CCL_LUT1 = $11;
  1084. CHANNEL7_CCL_LUT2 = $12;
  1085. CHANNEL7_CCL_LUT3 = $13;
  1086. CHANNEL7_AC0_OUT = $20;
  1087. CHANNEL7_AC1_OUT = $21;
  1088. CHANNEL7_AC2_OUT = $22;
  1089. CHANNEL7_ADC0_RESRDY = $24;
  1090. CHANNEL7_ZCD0 = $30;
  1091. CHANNEL7_OPAMP0_READY = $34;
  1092. CHANNEL7_OPAMP1_READY = $35;
  1093. CHANNEL7_USART0_XCK = $60;
  1094. CHANNEL7_USART1_XCK = $61;
  1095. CHANNEL7_USART2_XCK = $62;
  1096. CHANNEL7_SPI0_SCK = $68;
  1097. CHANNEL7_SPI1_SCK = $69;
  1098. CHANNEL7_TCA0_OVF_LUNF = $80;
  1099. CHANNEL7_TCA0_HUNF = $81;
  1100. CHANNEL7_TCA0_CMP0_LCMP0 = $84;
  1101. CHANNEL7_TCA0_CMP1_LCMP1 = $85;
  1102. CHANNEL7_TCA0_CMP2_LCMP2 = $86;
  1103. CHANNEL7_TCB0_CAPT = $A0;
  1104. CHANNEL7_TCB0_OVF = $A1;
  1105. CHANNEL7_TCB1_CAPT = $A2;
  1106. CHANNEL7_TCB1_OVF = $A3;
  1107. CHANNEL7_TCB2_CAPT = $A4;
  1108. CHANNEL7_TCB2_OVF = $A5;
  1109. CHANNEL7_TCD0_CMPBCLR = $B0;
  1110. CHANNEL7_TCD0_CMPASET = $B1;
  1111. CHANNEL7_TCD0_CMPBSET = $B2;
  1112. CHANNEL7_TCD0_PROGEV = $B3;
  1113. // EVSYS_USER
  1114. USERmask = $FF;
  1115. USER_OFF = $00;
  1116. USER_CHANNEL0 = $01;
  1117. USER_CHANNEL1 = $02;
  1118. USER_CHANNEL2 = $03;
  1119. USER_CHANNEL3 = $04;
  1120. USER_CHANNEL4 = $05;
  1121. USER_CHANNEL5 = $06;
  1122. USER_CHANNEL6 = $07;
  1123. USER_CHANNEL7 = $08;
  1124. end;
  1125. TFUSE = object //Fuses
  1126. WDTCFG: byte; //Watchdog Configuration
  1127. BODCFG: byte; //BOD Configuration
  1128. OSCCFG: byte; //Oscillator Configuration
  1129. Reserved3: byte;
  1130. Reserved4: byte;
  1131. SYSCFG0: byte; //System Configuration 0
  1132. SYSCFG1: byte; //System Configuration 1
  1133. CODESIZE: byte; //Code Section Size
  1134. BOOTSIZE: byte; //Boot Section Size
  1135. const
  1136. // FUSE_PERIOD
  1137. PERIODmask = $0F;
  1138. PERIOD_OFF = $00;
  1139. PERIOD_8CLK = $01;
  1140. PERIOD_16CLK = $02;
  1141. PERIOD_32CLK = $03;
  1142. PERIOD_64CLK = $04;
  1143. PERIOD_128CLK = $05;
  1144. PERIOD_256CLK = $06;
  1145. PERIOD_512CLK = $07;
  1146. PERIOD_1KCLK = $08;
  1147. PERIOD_2KCLK = $09;
  1148. PERIOD_4KCLK = $0A;
  1149. PERIOD_8KCLK = $0B;
  1150. // FUSE_WINDOW
  1151. WINDOWmask = $F0;
  1152. WINDOW_OFF = $00;
  1153. WINDOW_8CLK = $10;
  1154. WINDOW_16CLK = $20;
  1155. WINDOW_32CLK = $30;
  1156. WINDOW_64CLK = $40;
  1157. WINDOW_128CLK = $50;
  1158. WINDOW_256CLK = $60;
  1159. WINDOW_512CLK = $70;
  1160. WINDOW_1KCLK = $80;
  1161. WINDOW_2KCLK = $90;
  1162. WINDOW_4KCLK = $A0;
  1163. WINDOW_8KCLK = $B0;
  1164. // FUSE_SLEEP
  1165. SLEEPmask = $03;
  1166. SLEEP_DISABLE = $00;
  1167. SLEEP_ENABLE = $01;
  1168. SLEEP_SAMPLE = $02;
  1169. // FUSE_ACTIVE
  1170. ACTIVEmask = $0C;
  1171. ACTIVE_DISABLE = $00;
  1172. ACTIVE_ENABLE = $04;
  1173. ACTIVE_SAMPLE = $08;
  1174. ACTIVE_ENABLEWAIT = $0C;
  1175. // FUSE_SAMPFREQ
  1176. SAMPFREQmask = $10;
  1177. SAMPFREQ_128Hz = $00;
  1178. SAMPFREQ_32Hz = $10;
  1179. // FUSE_LVL
  1180. LVLmask = $E0;
  1181. LVL_BODLEVEL0 = $00;
  1182. LVL_BODLEVEL1 = $20;
  1183. LVL_BODLEVEL2 = $40;
  1184. LVL_BODLEVEL3 = $60;
  1185. // FUSE_CLKSEL
  1186. CLKSELmask = $07;
  1187. CLKSEL_OSCHF = $00;
  1188. CLKSEL_OSC32K = $01;
  1189. // EEPROM Save
  1190. EESAVEbm = $01;
  1191. // FUSE_RSTPINCFG
  1192. RSTPINCFGmask = $0C;
  1193. RSTPINCFG_GPIO = $00;
  1194. RSTPINCFG_RST = $08;
  1195. // FUSE_CRCSEL
  1196. CRCSELmask = $20;
  1197. CRCSEL_CRC16 = $00;
  1198. CRCSEL_CRC32 = $20;
  1199. // FUSE_CRCSRC
  1200. CRCSRCmask = $C0;
  1201. CRCSRC_FLASH = $00;
  1202. CRCSRC_BOOT = $40;
  1203. CRCSRC_BOOTAPP = $80;
  1204. CRCSRC_NOCRC = $C0;
  1205. // FUSE_SUT
  1206. SUTmask = $07;
  1207. SUT_0MS = $00;
  1208. SUT_1MS = $01;
  1209. SUT_2MS = $02;
  1210. SUT_4MS = $03;
  1211. SUT_8MS = $04;
  1212. SUT_16MS = $05;
  1213. SUT_32MS = $06;
  1214. SUT_64MS = $07;
  1215. // FUSE_MVSYSCFG
  1216. MVSYSCFGmask = $18;
  1217. MVSYSCFG_DUAL = $08;
  1218. MVSYSCFG_SINGLE = $10;
  1219. end;
  1220. TGPR = object //General Purpose Registers
  1221. GPR0: byte; //General Purpose Register 0
  1222. GPR1: byte; //General Purpose Register 1
  1223. GPR2: byte; //General Purpose Register 2
  1224. GPR3: byte; //General Purpose Register 3
  1225. end;
  1226. TLOCK = object //Lockbits
  1227. KEY: dword; //Lock Key Bits
  1228. const
  1229. // LOCK_KEY
  1230. KEYmask = $FFFFFFFF;
  1231. KEY_NOLOCK = $5CC5C55C;
  1232. KEY_RWLOCK = $A33A3AA3;
  1233. end;
  1234. TMVIO = object //Multi-Voltage I/O
  1235. INTCTRL: byte; //Interrupt Control
  1236. INTFLAGS: byte; //Interrupt Flags
  1237. STATUS: byte; //Status
  1238. const
  1239. // VDDIO2 Interrupt Enable
  1240. VDDIO2IEbm = $01;
  1241. // VDDIO2 Interrupt Flag
  1242. VDDIO2IFbm = $01;
  1243. // VDDIO2 Status
  1244. VDDIO2Sbm = $01;
  1245. end;
  1246. TNVMCTRL = object //Non-volatile Memory Controller
  1247. CTRLA: byte; //Control A
  1248. CTRLB: byte; //Control B
  1249. STATUS: byte; //Status
  1250. INTCTRL: byte; //Interrupt Control
  1251. INTFLAGS: byte; //Interrupt Flags
  1252. Reserved5: byte;
  1253. DATA: word; //Data
  1254. ADDR: dword; //Address
  1255. const
  1256. // NVMCTRL_CMD
  1257. CMDmask = $7F;
  1258. CMD_NONE = $00;
  1259. CMD_NOOP = $01;
  1260. CMD_FLWR = $02;
  1261. CMD_FLPER = $08;
  1262. CMD_FLMPER2 = $09;
  1263. CMD_FLMPER4 = $0A;
  1264. CMD_FLMPER8 = $0B;
  1265. CMD_FLMPER16 = $0C;
  1266. CMD_FLMPER32 = $0D;
  1267. CMD_EEWR = $12;
  1268. CMD_EEERWR = $13;
  1269. CMD_EEBER = $18;
  1270. CMD_EEMBER2 = $19;
  1271. CMD_EEMBER4 = $1A;
  1272. CMD_EEMBER8 = $1B;
  1273. CMD_EEMBER16 = $1C;
  1274. CMD_EEMBER32 = $1D;
  1275. CMD_CHER = $20;
  1276. CMD_EECHER = $30;
  1277. // Application Code Write Protect
  1278. APPCODEWPbm = $01;
  1279. // Boot Read Protect
  1280. BOOTRPbm = $02;
  1281. // Application Data Write Protect
  1282. APPDATAWPbm = $04;
  1283. // NVMCTRL_FLMAP
  1284. FLMAPmask = $30;
  1285. FLMAP_SECTION0 = $00;
  1286. FLMAP_SECTION1 = $10;
  1287. FLMAP_SECTION2 = $20;
  1288. FLMAP_SECTION3 = $30;
  1289. // Flash Mapping Lock
  1290. FLMAPLOCKbm = $80;
  1291. // Flash busy
  1292. FBUSYbm = $01;
  1293. // EEPROM busy
  1294. EEBUSYbm = $02;
  1295. // NVMCTRL_ERROR
  1296. ERRORmask = $70;
  1297. ERROR_NOERROR = $00;
  1298. ERROR_ILLEGALCMD = $10;
  1299. ERROR_ILLEGALSADDR = $20;
  1300. ERROR_DOUBLESELECT = $30;
  1301. ERROR_ONGOINGPROG = $40;
  1302. // EEPROM Ready
  1303. EEREADYbm = $01;
  1304. end;
  1305. TOPAMP = object //Operational Amplifier System
  1306. CTRLA: byte; //Control A
  1307. DBGCTRL: byte; //Debug Control
  1308. TIMEBASE: byte; //Timebase Value
  1309. Reserved3: byte;
  1310. Reserved4: byte;
  1311. Reserved5: byte;
  1312. Reserved6: byte;
  1313. Reserved7: byte;
  1314. Reserved8: byte;
  1315. Reserved9: byte;
  1316. Reserved10: byte;
  1317. Reserved11: byte;
  1318. Reserved12: byte;
  1319. Reserved13: byte;
  1320. Reserved14: byte;
  1321. PWRCTRL: byte; //Power Control
  1322. OP0CTRLA: byte; //Op Amp 0 Control A
  1323. OP0STATUS: byte; //Op Amp 0 Status
  1324. OP0RESMUX: byte; //Op Amp 0 Resistor Ladder Multiplexer
  1325. OP0INMUX: byte; //Op Amp 0 Input Multiplexer
  1326. OP0SETTLE: byte; //Op Amp 0 Settle
  1327. OP0CAL: byte; //Op Amp 0 Calibration
  1328. Reserved22: byte;
  1329. Reserved23: byte;
  1330. OP1CTRLA: byte; //Op Amp 1 Control A
  1331. OP1STATUS: byte; //Op Amp 1 Status
  1332. OP1RESMUX: byte; //Op Amp 1 Resistor Ladder Multiplexer
  1333. OP1INMUX: byte; //Op Amp 1 Input Multiplexer
  1334. OP1SETTLE: byte; //Op Amp 1 Settle
  1335. OP1CAL: byte; //Op Amp 1 Calibration
  1336. const
  1337. // Op Amp System Enable
  1338. ENABLEbm = $01;
  1339. // Run in Debug Mode
  1340. DBGRUNbm = $01;
  1341. // Timebase Value
  1342. TIMEBASE0bm = $01;
  1343. TIMEBASE1bm = $02;
  1344. TIMEBASE2bm = $04;
  1345. TIMEBASE3bm = $08;
  1346. TIMEBASE4bm = $10;
  1347. TIMEBASE5bm = $20;
  1348. TIMEBASE6bm = $40;
  1349. // OPAMP_IRSEL
  1350. IRSELmask = $01;
  1351. IRSEL_FULL = $00;
  1352. IRSEL_REDUCED = $01;
  1353. // Always On
  1354. ALWAYSONbm = $01;
  1355. // Enable Events
  1356. EVENTENbm = $02;
  1357. // OPAMP_OUTMODE
  1358. OUTMODEmask = $0C;
  1359. OUTMODE_OFF = $00;
  1360. OUTMODE_NORMAL = $04;
  1361. // Run in Standby Mode
  1362. RUNSTBYbm = $80;
  1363. // Settled
  1364. SETTLEDbm = $01;
  1365. // OPAMP_MUXTOP
  1366. MUXTOPmask = $03;
  1367. MUXTOP_OFF = $00;
  1368. MUXTOP_OUT = $01;
  1369. MUXTOP_VDD = $02;
  1370. // OPAMP_MUXBOT
  1371. MUXBOTmask = $1C;
  1372. MUXBOT_OFF = $00;
  1373. MUXBOT_INP = $04;
  1374. MUXBOT_INN = $08;
  1375. MUXBOT_DAC = $0C;
  1376. MUXBOT_LINKOUT = $10;
  1377. MUXBOT_GND = $14;
  1378. // OPAMP_MUXWIP
  1379. MUXWIPmask = $E0;
  1380. MUXWIP_WIP0 = $00;
  1381. MUXWIP_WIP1 = $20;
  1382. MUXWIP_WIP2 = $40;
  1383. MUXWIP_WIP3 = $60;
  1384. MUXWIP_WIP4 = $80;
  1385. MUXWIP_WIP5 = $A0;
  1386. MUXWIP_WIP6 = $C0;
  1387. MUXWIP_WIP7 = $E0;
  1388. // MUXPOS
  1389. MUXPOSmask = $07;
  1390. MUXPOSINP = $00;
  1391. MUXPOSWIP = $01;
  1392. MUXPOSDAC = $02;
  1393. MUXPOSGND = $03;
  1394. MUXPOSVDDDIV2 = $04;
  1395. // OPAMP_MUXNEG
  1396. MUXNEGmask = $70;
  1397. MUXNEG_INN = $00;
  1398. MUXNEG_WIP = $10;
  1399. MUXNEG_OUT = $20;
  1400. MUXNEG_DAC = $30;
  1401. // Settle Time
  1402. SETTLE0bm = $01;
  1403. SETTLE1bm = $02;
  1404. SETTLE2bm = $04;
  1405. SETTLE3bm = $08;
  1406. SETTLE4bm = $10;
  1407. SETTLE5bm = $20;
  1408. SETTLE6bm = $40;
  1409. end;
  1410. TPORT = object //I/O Ports
  1411. DIR: byte; //Data Direction
  1412. DIRSET: byte; //Data Direction Set
  1413. DIRCLR: byte; //Data Direction Clear
  1414. DIRTGL: byte; //Data Direction Toggle
  1415. OUT_: byte; //Output Value
  1416. OUTSET: byte; //Output Value Set
  1417. OUTCLR: byte; //Output Value Clear
  1418. OUTTGL: byte; //Output Value Toggle
  1419. IN_: byte; //Input Value
  1420. INTFLAGS: byte; //Interrupt Flags
  1421. PORTCTRL: byte; //Port Control
  1422. PINCONFIG: byte; //Pin Control Config
  1423. PINCTRLUPD: byte; //Pin Control Update
  1424. PINCTRLSET: byte; //Pin Control Set
  1425. PINCTRLCLR: byte; //Pin Control Clear
  1426. Reserved15: byte;
  1427. PIN0CTRL: byte; //Pin 0 Control
  1428. PIN1CTRL: byte; //Pin 1 Control
  1429. PIN2CTRL: byte; //Pin 2 Control
  1430. PIN3CTRL: byte; //Pin 3 Control
  1431. PIN4CTRL: byte; //Pin 4 Control
  1432. PIN5CTRL: byte; //Pin 5 Control
  1433. PIN6CTRL: byte; //Pin 6 Control
  1434. PIN7CTRL: byte; //Pin 7 Control
  1435. const
  1436. // Slew Rate Limit Enable
  1437. SRLbm = $01;
  1438. // PORT_ISC
  1439. ISCmask = $07;
  1440. ISC_INTDISABLE = $00;
  1441. ISC_BOTHEDGES = $01;
  1442. ISC_RISING = $02;
  1443. ISC_FALLING = $03;
  1444. ISC_INPUT_DISABLE = $04;
  1445. ISC_LEVEL = $05;
  1446. // Pullup enable
  1447. PULLUPENbm = $08;
  1448. // Input level select
  1449. INLVLbm = $40;
  1450. // Inverted I/O Enable
  1451. INVENbm = $80;
  1452. end;
  1453. TPORTMUX = object //Port Multiplexer
  1454. EVSYSROUTEA: byte; //EVSYS route A
  1455. CCLROUTEA: byte; //CCL route A
  1456. USARTROUTEA: byte; //USART route A
  1457. Reserved3: byte;
  1458. SPIROUTEA: byte; //SPI route A
  1459. TWIROUTEA: byte; //TWI route A
  1460. TCAROUTEA: byte; //TCA route A
  1461. TCBROUTEA: byte; //TCB route A
  1462. TCDROUTEA: byte; //TCD route A
  1463. ACROUTEA: byte; //AC route A
  1464. ZCDROUTEA: byte; //ZCD route A
  1465. const
  1466. // PORTMUX_EVOUTA
  1467. EVOUTAmask = $01;
  1468. EVOUTA_DEFAULT = $00;
  1469. EVOUTA_ALT1 = $01;
  1470. // PORTMUX_EVOUTC
  1471. EVOUTCmask = $04;
  1472. EVOUTC_DEFAULT = $00;
  1473. // PORTMUX_EVOUTD
  1474. EVOUTDmask = $08;
  1475. EVOUTD_DEFAULT = $00;
  1476. EVOUTD_ALT1 = $08;
  1477. // PORTMUX_LUT0
  1478. LUT0mask = $01;
  1479. LUT0_DEFAULT = $00;
  1480. LUT0_ALT1 = $01;
  1481. // PORTMUX_LUT1
  1482. LUT1mask = $02;
  1483. LUT1_DEFAULT = $00;
  1484. LUT1_ALT1 = $02;
  1485. // PORTMUX_LUT2
  1486. LUT2mask = $04;
  1487. LUT2_DEFAULT = $00;
  1488. LUT2_ALT1 = $04;
  1489. // PORTMUX_LUT3
  1490. LUT3mask = $08;
  1491. LUT3_DEFAULT = $00;
  1492. // PORTMUX_USART0
  1493. USART0mask = $03;
  1494. USART0_DEFAULT = $00;
  1495. USART0_ALT1 = $01;
  1496. USART0_NONE = $03;
  1497. // PORTMUX_USART1
  1498. USART1mask = $0C;
  1499. USART1_DEFAULT = $00;
  1500. USART1_NONE = $0C;
  1501. // PORTMUX_USART2
  1502. USART2mask = $30;
  1503. USART2_DEFAULT = $00;
  1504. USART2_NONE = $30;
  1505. // PORTMUX_SPI0
  1506. SPI0mask = $03;
  1507. SPI0_DEFAULT = $00;
  1508. SPI0_NONE = $03;
  1509. // PORTMUX_SPI1
  1510. SPI1mask = $0C;
  1511. SPI1_DEFAULT = $00;
  1512. SPI1_NONE = $0C;
  1513. // PORTMUX_TWI0
  1514. TWI0mask = $03;
  1515. TWI0_DEFAULT = $00;
  1516. TWI0_ALT1 = $01;
  1517. TWI0_ALT2 = $02;
  1518. // PORTMUX_TCA0
  1519. TCA0mask = $07;
  1520. TCA0_PORTA = $00;
  1521. TCA0_PORTC = $02;
  1522. TCA0_PORTD = $03;
  1523. TCA0_PORTF = $05;
  1524. // PORTMUX_TCB0
  1525. TCB0mask = $01;
  1526. TCB0_DEFAULT = $00;
  1527. // PORTMUX_TCB1
  1528. TCB1mask = $02;
  1529. TCB1_DEFAULT = $00;
  1530. // PORTMUX_TCB2
  1531. TCB2mask = $04;
  1532. TCB2_DEFAULT = $00;
  1533. // PORTMUX_TCD0
  1534. TCD0mask = $07;
  1535. TCD0_DEFAULT = $00;
  1536. TCD0_ALT2 = $02;
  1537. // PORTMUX_AC0
  1538. AC0mask = $01;
  1539. AC0_DEFAULT = $00;
  1540. // PORTMUX_AC1
  1541. AC1mask = $02;
  1542. AC1_DEFAULT = $00;
  1543. // PORTMUX_AC2
  1544. AC2mask = $04;
  1545. AC2_DEFAULT = $00;
  1546. // PORTMUX_ZCD0
  1547. ZCD0mask = $01;
  1548. ZCD0_DEFAULT = $00;
  1549. end;
  1550. TRSTCTRL = object //Reset controller
  1551. RSTFR: byte; //Reset Flags
  1552. SWRR: byte; //Software Reset
  1553. const
  1554. // Power on Reset flag
  1555. PORFbm = $01;
  1556. // Brown out detector Reset flag
  1557. BORFbm = $02;
  1558. // External Reset flag
  1559. EXTRFbm = $04;
  1560. // Watch dog Reset flag
  1561. WDRFbm = $08;
  1562. // Software Reset flag
  1563. SWRFbm = $10;
  1564. // UPDI Reset flag
  1565. UPDIRFbm = $20;
  1566. // Software reset enable
  1567. SWRSTbm = $01;
  1568. end;
  1569. TRTC = object //Real-Time Counter
  1570. CTRLA: byte; //Control A
  1571. STATUS: byte; //Status
  1572. INTCTRL: byte; //Interrupt Control
  1573. INTFLAGS: byte; //Interrupt Flags
  1574. TEMP: byte; //Temporary
  1575. DBGCTRL: byte; //Debug control
  1576. CALIB: byte; //Calibration
  1577. CLKSEL: byte; //Clock Select
  1578. CNT: word; //Counter
  1579. PER: word; //Period
  1580. CMP: word; //Compare
  1581. Reserved14: byte;
  1582. Reserved15: byte;
  1583. PITCTRLA: byte; //PIT Control A
  1584. PITSTATUS: byte; //PIT Status
  1585. PITINTCTRL: byte; //PIT Interrupt Control
  1586. PITINTFLAGS: byte; //PIT Interrupt Flags
  1587. Reserved20: byte;
  1588. PITDBGCTRL: byte; //PIT Debug control
  1589. const
  1590. // Enable
  1591. RTCENbm = $01;
  1592. // Correction enable
  1593. CORRENbm = $04;
  1594. // RTC_PRESCALER
  1595. PRESCALERmask = $78;
  1596. PRESCALER_DIV1 = $00;
  1597. PRESCALER_DIV2 = $08;
  1598. PRESCALER_DIV4 = $10;
  1599. PRESCALER_DIV8 = $18;
  1600. PRESCALER_DIV16 = $20;
  1601. PRESCALER_DIV32 = $28;
  1602. PRESCALER_DIV64 = $30;
  1603. PRESCALER_DIV128 = $38;
  1604. PRESCALER_DIV256 = $40;
  1605. PRESCALER_DIV512 = $48;
  1606. PRESCALER_DIV1024 = $50;
  1607. PRESCALER_DIV2048 = $58;
  1608. PRESCALER_DIV4096 = $60;
  1609. PRESCALER_DIV8192 = $68;
  1610. PRESCALER_DIV16384 = $70;
  1611. PRESCALER_DIV32768 = $78;
  1612. // Run In Standby
  1613. RUNSTDBYbm = $80;
  1614. // CTRLA Synchronization Busy Flag
  1615. CTRLABUSYbm = $01;
  1616. // Count Synchronization Busy Flag
  1617. CNTBUSYbm = $02;
  1618. // Period Synchronization Busy Flag
  1619. PERBUSYbm = $04;
  1620. // Comparator Synchronization Busy Flag
  1621. CMPBUSYbm = $08;
  1622. // Overflow Interrupt enable
  1623. OVFbm = $01;
  1624. // Compare Match Interrupt enable
  1625. CMPbm = $02;
  1626. // Run in debug
  1627. DBGRUNbm = $01;
  1628. // Error Correction Value
  1629. ERROR0bm = $01;
  1630. ERROR1bm = $02;
  1631. ERROR2bm = $04;
  1632. ERROR3bm = $08;
  1633. ERROR4bm = $10;
  1634. ERROR5bm = $20;
  1635. ERROR6bm = $40;
  1636. // Error Correction Sign Bit
  1637. SIGNbm = $80;
  1638. // RTC_CLKSEL
  1639. CLKSELmask = $03;
  1640. CLKSEL_OSC32K = $00;
  1641. CLKSEL_OSC1K = $01;
  1642. CLKSEL_XOSC32K = $02;
  1643. CLKSEL_EXTCLK = $03;
  1644. // Enable
  1645. PITENbm = $01;
  1646. // RTC_PERIOD
  1647. PERIODmask = $78;
  1648. PERIOD_OFF = $00;
  1649. PERIOD_CYC4 = $08;
  1650. PERIOD_CYC8 = $10;
  1651. PERIOD_CYC16 = $18;
  1652. PERIOD_CYC32 = $20;
  1653. PERIOD_CYC64 = $28;
  1654. PERIOD_CYC128 = $30;
  1655. PERIOD_CYC256 = $38;
  1656. PERIOD_CYC512 = $40;
  1657. PERIOD_CYC1024 = $48;
  1658. PERIOD_CYC2048 = $50;
  1659. PERIOD_CYC4096 = $58;
  1660. PERIOD_CYC8192 = $60;
  1661. PERIOD_CYC16384 = $68;
  1662. PERIOD_CYC32768 = $70;
  1663. // CTRLA Synchronization Busy Flag
  1664. CTRLBUSYbm = $01;
  1665. // Periodic Interrupt
  1666. PIbm = $01;
  1667. end;
  1668. TSIGROW = object //Signature row
  1669. DEVICEID0: byte; //Device ID Byte 0
  1670. DEVICEID1: byte; //Device ID Byte 1
  1671. DEVICEID2: byte; //Device ID Byte 2
  1672. Reserved3: byte;
  1673. TEMPSENSE0: word; //Temperature Calibration 0
  1674. TEMPSENSE1: word; //Temperature Calibration 1
  1675. Reserved8: byte;
  1676. Reserved9: byte;
  1677. Reserved10: byte;
  1678. Reserved11: byte;
  1679. Reserved12: byte;
  1680. Reserved13: byte;
  1681. Reserved14: byte;
  1682. Reserved15: byte;
  1683. SERNUM0: byte; //LOTNUM0
  1684. SERNUM1: byte; //LOTNUM1
  1685. SERNUM2: byte; //LOTNUM2
  1686. SERNUM3: byte; //LOTNUM3
  1687. SERNUM4: byte; //LOTNUM4
  1688. SERNUM5: byte; //LOTNUM5
  1689. SERNUM6: byte; //RANDOM
  1690. SERNUM7: byte; //SCRIBE
  1691. SERNUM8: byte; //XPOS0
  1692. SERNUM9: byte; //XPOS1
  1693. SERNUM10: byte; //YPOS0
  1694. SERNUM11: byte; //YPOS1
  1695. SERNUM12: byte; //RES0
  1696. SERNUM13: byte; //RES1
  1697. SERNUM14: byte; //RES2
  1698. SERNUM15: byte; //RES3
  1699. end;
  1700. TSLPCTRL = object //Sleep Controller
  1701. CTRLA: byte; //Control A
  1702. VREGCTRL: byte; //Control B
  1703. const
  1704. // Sleep enable
  1705. SENbm = $01;
  1706. // SLPCTRL_SMODE
  1707. SMODEmask = $06;
  1708. SMODE_IDLE = $00;
  1709. SMODE_STDBY = $02;
  1710. SMODE_PDOWN = $04;
  1711. // SLPCTRL_PMODE
  1712. PMODEmask = $07;
  1713. PMODE_AUTO = $00;
  1714. PMODE_FULL = $01;
  1715. // SLPCTRL_HTLLEN
  1716. HTLLENmask = $10;
  1717. HTLLEN_OFF = $00;
  1718. HTLLEN_ON = $10;
  1719. end;
  1720. TSPI = object //Serial Peripheral Interface
  1721. CTRLA: byte; //Control A
  1722. CTRLB: byte; //Control B
  1723. INTCTRL: byte; //Interrupt Control
  1724. INTFLAGS: byte; //Interrupt Flags
  1725. DATA: byte; //Data
  1726. const
  1727. // Enable Module
  1728. ENABLEbm = $01;
  1729. // SPI_PRESC
  1730. PRESCmask = $06;
  1731. PRESC_DIV4 = $00;
  1732. PRESC_DIV16 = $02;
  1733. PRESC_DIV64 = $04;
  1734. PRESC_DIV128 = $06;
  1735. // Enable Double Speed
  1736. CLK2Xbm = $10;
  1737. // Host Operation Enable
  1738. MASTERbm = $20;
  1739. // Data Order Setting
  1740. DORDbm = $40;
  1741. // SPI_MODE
  1742. MODEmask = $03;
  1743. MODE_0 = $00;
  1744. MODE_1 = $01;
  1745. MODE_2 = $02;
  1746. MODE_3 = $03;
  1747. // SPI Select Disable
  1748. SSDbm = $04;
  1749. // Buffer Mode Wait for Receive
  1750. BUFWRbm = $40;
  1751. // Buffer Mode Enable
  1752. BUFENbm = $80;
  1753. // Interrupt Enable
  1754. IEbm = $01;
  1755. // SPI Select Trigger Interrupt Enable
  1756. SSIEbm = $10;
  1757. // Data Register Empty Interrupt Enable
  1758. DREIEbm = $20;
  1759. // Transfer Complete Interrupt Enable
  1760. TXCIEbm = $40;
  1761. // Receive Complete Interrupt Enable
  1762. RXCIEbm = $80;
  1763. end;
  1764. TSYSCFG = object //System Configuration Registers
  1765. Reserved0: byte;
  1766. REVID: byte; //Revision ID
  1767. Reserved2: byte;
  1768. Reserved3: byte;
  1769. Reserved4: byte;
  1770. Reserved5: byte;
  1771. Reserved6: byte;
  1772. Reserved7: byte;
  1773. Reserved8: byte;
  1774. Reserved9: byte;
  1775. Reserved10: byte;
  1776. Reserved11: byte;
  1777. Reserved12: byte;
  1778. Reserved13: byte;
  1779. Reserved14: byte;
  1780. Reserved15: byte;
  1781. Reserved16: byte;
  1782. Reserved17: byte;
  1783. Reserved18: byte;
  1784. Reserved19: byte;
  1785. Reserved20: byte;
  1786. Reserved21: byte;
  1787. Reserved22: byte;
  1788. Reserved23: byte;
  1789. OCDMCTRL: byte; //OCD Message Control
  1790. OCDMSTATUS: byte; //OCD Message Status
  1791. const
  1792. // OCD Message Read
  1793. OCDMRbm = $01;
  1794. end;
  1795. TTCA = object //16-bit Timer/Counter Type A
  1796. end;
  1797. TTCB = object //16-bit Timer Type B
  1798. CTRLA: byte; //Control A
  1799. CTRLB: byte; //Control Register B
  1800. Reserved2: byte;
  1801. Reserved3: byte;
  1802. EVCTRL: byte; //Event Control
  1803. INTCTRL: byte; //Interrupt Control
  1804. INTFLAGS: byte; //Interrupt Flags
  1805. STATUS: byte; //Status
  1806. DBGCTRL: byte; //Debug Control
  1807. TEMP: byte; //Temporary Value
  1808. CNT: word; //Count
  1809. CCMP: word; //Compare or Capture
  1810. const
  1811. // Enable
  1812. ENABLEbm = $01;
  1813. // TCB_CLKSEL
  1814. CLKSELmask = $0E;
  1815. CLKSEL_DIV1 = $00;
  1816. CLKSEL_DIV2 = $02;
  1817. CLKSEL_TCA0 = $04;
  1818. CLKSEL_EVENT = $0E;
  1819. // Synchronize Update
  1820. SYNCUPDbm = $10;
  1821. // Cascade two timers
  1822. CASCADEbm = $20;
  1823. // Run Standby
  1824. RUNSTDBYbm = $40;
  1825. // TCB_CNTMODE
  1826. CNTMODEmask = $07;
  1827. CNTMODE_INT = $00;
  1828. CNTMODE_TIMEOUT = $01;
  1829. CNTMODE_CAPT = $02;
  1830. CNTMODE_FRQ = $03;
  1831. CNTMODE_PW = $04;
  1832. CNTMODE_FRQPW = $05;
  1833. CNTMODE_SINGLE = $06;
  1834. CNTMODE_PWM8 = $07;
  1835. // Pin Output Enable
  1836. CCMPENbm = $10;
  1837. // Pin Initial State
  1838. CCMPINITbm = $20;
  1839. // Asynchronous Enable
  1840. ASYNCbm = $40;
  1841. // Event Input Enable
  1842. CAPTEIbm = $01;
  1843. // Event Edge
  1844. EDGEbm = $10;
  1845. // Input Capture Noise Cancellation Filter
  1846. FILTERbm = $40;
  1847. // Capture or Timeout
  1848. CAPTbm = $01;
  1849. // Overflow
  1850. OVFbm = $02;
  1851. // Run
  1852. RUNbm = $01;
  1853. // Debug Run
  1854. DBGRUNbm = $01;
  1855. end;
  1856. TTCD = object //Timer Counter D
  1857. CTRLA: byte; //Control A
  1858. CTRLB: byte; //Control B
  1859. CTRLC: byte; //Control C
  1860. CTRLD: byte; //Control D
  1861. CTRLE: byte; //Control E
  1862. Reserved5: byte;
  1863. Reserved6: byte;
  1864. Reserved7: byte;
  1865. EVCTRLA: byte; //EVCTRLA
  1866. EVCTRLB: byte; //EVCTRLB
  1867. Reserved10: byte;
  1868. Reserved11: byte;
  1869. INTCTRL: byte; //Interrupt Control
  1870. INTFLAGS: byte; //Interrupt Flags
  1871. STATUS: byte; //Status
  1872. Reserved15: byte;
  1873. INPUTCTRLA: byte; //Input Control A
  1874. INPUTCTRLB: byte; //Input Control B
  1875. FAULTCTRL: byte; //Fault Control
  1876. Reserved19: byte;
  1877. DLYCTRL: byte; //Delay Control
  1878. DLYVAL: byte; //Delay value
  1879. Reserved22: byte;
  1880. Reserved23: byte;
  1881. DITCTRL: byte; //Dither Control A
  1882. DITVAL: byte; //Dither value
  1883. Reserved26: byte;
  1884. Reserved27: byte;
  1885. Reserved28: byte;
  1886. Reserved29: byte;
  1887. DBGCTRL: byte; //Debug Control
  1888. Reserved31: byte;
  1889. Reserved32: byte;
  1890. Reserved33: byte;
  1891. CAPTUREA: word; //Capture A
  1892. CAPTUREB: word; //Capture B
  1893. Reserved38: byte;
  1894. Reserved39: byte;
  1895. CMPASET: word; //Compare A Set
  1896. CMPACLR: word; //Compare A Clear
  1897. CMPBSET: word; //Compare B Set
  1898. CMPBCLR: word; //Compare B Clear
  1899. const
  1900. // Enable
  1901. ENABLEbm = $01;
  1902. // TCD_SYNCPRES
  1903. SYNCPRESmask = $06;
  1904. SYNCPRES_DIV1 = $00;
  1905. SYNCPRES_DIV2 = $02;
  1906. SYNCPRES_DIV4 = $04;
  1907. SYNCPRES_DIV8 = $06;
  1908. // TCD_CNTPRES
  1909. CNTPRESmask = $18;
  1910. CNTPRES_DIV1 = $00;
  1911. CNTPRES_DIV4 = $08;
  1912. CNTPRES_DIV32 = $10;
  1913. // TCD_CLKSEL
  1914. CLKSELmask = $60;
  1915. CLKSEL_OSCHF = $00;
  1916. CLKSEL_PLL = $20;
  1917. CLKSEL_EXTCLK = $40;
  1918. CLKSEL_CLKPER = $60;
  1919. // TCD_WGMODE
  1920. WGMODEmask = $03;
  1921. WGMODE_ONERAMP = $00;
  1922. WGMODE_TWORAMP = $01;
  1923. WGMODE_FOURRAMP = $02;
  1924. WGMODE_DS = $03;
  1925. // Compare output value override
  1926. CMPOVRbm = $01;
  1927. // Auto update
  1928. AUPDATEbm = $02;
  1929. // Fifty percent waveform
  1930. FIFTYbm = $08;
  1931. // TCD_CMPCSEL
  1932. CMPCSELmask = $40;
  1933. CMPCSEL_PWMA = $00;
  1934. CMPCSEL_PWMB = $40;
  1935. // TCD_CMPDSEL
  1936. CMPDSELmask = $80;
  1937. CMPDSEL_PWMA = $00;
  1938. CMPDSEL_PWMB = $80;
  1939. // Compare A value
  1940. CMPAVAL0bm = $01;
  1941. CMPAVAL1bm = $02;
  1942. CMPAVAL2bm = $04;
  1943. CMPAVAL3bm = $08;
  1944. // Compare B value
  1945. CMPBVAL0bm = $10;
  1946. CMPBVAL1bm = $20;
  1947. CMPBVAL2bm = $40;
  1948. CMPBVAL3bm = $80;
  1949. // Synchronize end of cycle strobe
  1950. SYNCEOCbm = $01;
  1951. // synchronize strobe
  1952. SYNCbm = $02;
  1953. // Restart strobe
  1954. RESTARTbm = $04;
  1955. // Software Capture A Strobe
  1956. SCAPTUREAbm = $08;
  1957. // Software Capture B Strobe
  1958. SCAPTUREBbm = $10;
  1959. // Disable at end of cycle
  1960. DISEOCbm = $80;
  1961. // Trigger event enable
  1962. TRIGEIbm = $01;
  1963. // TCD_ACTION
  1964. ACTIONmask = $04;
  1965. ACTION_FAULT = $00;
  1966. ACTION_CAPTURE = $04;
  1967. // TCD_EDGE
  1968. EDGEmask = $10;
  1969. EDGE_FALL_LOW = $00;
  1970. EDGE_RISE_HIGH = $10;
  1971. // TCD_CFG
  1972. CFGmask = $C0;
  1973. CFG_NEITHER = $00;
  1974. CFG_FILTER = $40;
  1975. CFG_ASYNC = $80;
  1976. // Overflow interrupt enable
  1977. OVFbm = $01;
  1978. // Trigger A interrupt enable
  1979. TRIGAbm = $04;
  1980. // Trigger B interrupt enable
  1981. TRIGBbm = $08;
  1982. // Enable ready
  1983. ENRDYbm = $01;
  1984. // Command ready
  1985. CMDRDYbm = $02;
  1986. // PWM activity on A
  1987. PWMACTAbm = $40;
  1988. // PWM activity on B
  1989. PWMACTBbm = $80;
  1990. // TCD_INPUTMODE
  1991. INPUTMODEmask = $0F;
  1992. INPUTMODE_NONE = $00;
  1993. INPUTMODE_JMPWAIT = $01;
  1994. INPUTMODE_EXECWAIT = $02;
  1995. INPUTMODE_EXECFAULT = $03;
  1996. INPUTMODE_FREQ = $04;
  1997. INPUTMODE_EXECDT = $05;
  1998. INPUTMODE_WAIT = $06;
  1999. INPUTMODE_WAITSW = $07;
  2000. INPUTMODE_EDGETRIG = $08;
  2001. INPUTMODE_EDGETRIGFREQ = $09;
  2002. INPUTMODE_LVLTRIGFREQ = $0A;
  2003. // Compare A value
  2004. CMPAbm = $01;
  2005. // Compare B value
  2006. CMPBbm = $02;
  2007. // Compare C value
  2008. CMPCbm = $04;
  2009. // Compare D vaule
  2010. CMPDbm = $08;
  2011. // Compare A enable
  2012. CMPAENbm = $10;
  2013. // Compare B enable
  2014. CMPBENbm = $20;
  2015. // Compare C enable
  2016. CMPCENbm = $40;
  2017. // Compare D enable
  2018. CMPDENbm = $80;
  2019. // TCD_DLYSEL
  2020. DLYSELmask = $03;
  2021. DLYSEL_OFF = $00;
  2022. DLYSEL_INBLANK = $01;
  2023. DLYSEL_EVENT = $02;
  2024. // TCD_DLYTRIG
  2025. DLYTRIGmask = $0C;
  2026. DLYTRIG_CMPASET = $00;
  2027. DLYTRIG_CMPACLR = $04;
  2028. DLYTRIG_CMPBSET = $08;
  2029. DLYTRIG_CMPBCLR = $0C;
  2030. // TCD_DLYPRESC
  2031. DLYPRESCmask = $30;
  2032. DLYPRESC_DIV1 = $00;
  2033. DLYPRESC_DIV2 = $10;
  2034. DLYPRESC_DIV4 = $20;
  2035. DLYPRESC_DIV8 = $30;
  2036. // TCD_DITHERSEL
  2037. DITHERSELmask = $03;
  2038. DITHERSEL_ONTIMEB = $00;
  2039. DITHERSEL_ONTIMEAB = $01;
  2040. DITHERSEL_DEADTIMEB = $02;
  2041. DITHERSEL_DEADTIMEAB = $03;
  2042. // Dither value
  2043. DITHER0bm = $01;
  2044. DITHER1bm = $02;
  2045. DITHER2bm = $04;
  2046. DITHER3bm = $08;
  2047. // Debug run
  2048. DBGRUNbm = $01;
  2049. // Fault detection
  2050. FAULTDETbm = $04;
  2051. end;
  2052. TTWI = object //Two-Wire Interface
  2053. CTRLA: byte; //Control A
  2054. DUALCTRL: byte; //Dual Control
  2055. DBGCTRL: byte; //Debug Control Register
  2056. MCTRLA: byte; //Host Control A
  2057. MCTRLB: byte; //Host Control B
  2058. MSTATUS: byte; //Host Status
  2059. MBAUD: byte; //Host Baud Rate Control
  2060. MADDR: byte; //Host Address
  2061. MDATA: byte; //Host Data
  2062. SCTRLA: byte; //Client Control A
  2063. SCTRLB: byte; //Client Control B
  2064. SSTATUS: byte; //Client Status
  2065. SADDR: byte; //Client Address
  2066. SDATA: byte; //Client Data
  2067. SADDRMASK: byte; //Client Address Mask
  2068. const
  2069. // TWI_FMPEN
  2070. FMPENmask = $02;
  2071. FMPEN_OFF = $00;
  2072. FMPEN_ON = $02;
  2073. // TWI_SDAHOLD
  2074. SDAHOLDmask = $0C;
  2075. SDAHOLD_OFF = $00;
  2076. SDAHOLD_50NS = $04;
  2077. SDAHOLD_300NS = $08;
  2078. SDAHOLD_500NS = $0C;
  2079. // TWI_SDASETUP
  2080. SDASETUPmask = $10;
  2081. SDASETUP_4CYC = $00;
  2082. SDASETUP_8CYC = $10;
  2083. // TWI_INPUTLVL
  2084. INPUTLVLmask = $40;
  2085. INPUTLVL_I2C = $00;
  2086. INPUTLVL_SMBUS = $40;
  2087. // Dual Control Enable
  2088. ENABLEbm = $01;
  2089. // Debug Run
  2090. DBGRUNbm = $01;
  2091. // Smart Mode Enable
  2092. SMENbm = $02;
  2093. // TWI_TIMEOUT
  2094. TIMEOUTmask = $0C;
  2095. TIMEOUT_DISABLED = $00;
  2096. TIMEOUT_50US = $04;
  2097. TIMEOUT_100US = $08;
  2098. TIMEOUT_200US = $0C;
  2099. // Quick Command Enable
  2100. QCENbm = $10;
  2101. // Write Interrupt Enable
  2102. WIENbm = $40;
  2103. // Read Interrupt Enable
  2104. RIENbm = $80;
  2105. // TWI_MCMD
  2106. MCMDmask = $03;
  2107. MCMD_NOACT = $00;
  2108. MCMD_REPSTART = $01;
  2109. MCMD_RECVTRANS = $02;
  2110. MCMD_STOP = $03;
  2111. // TWI_ACKACT
  2112. ACKACTmask = $04;
  2113. ACKACT_ACK = $00;
  2114. ACKACT_NACK = $04;
  2115. // Flush
  2116. FLUSHbm = $08;
  2117. // TWI_BUSSTATE
  2118. BUSSTATEmask = $03;
  2119. BUSSTATE_UNKNOWN = $00;
  2120. BUSSTATE_IDLE = $01;
  2121. BUSSTATE_OWNER = $02;
  2122. BUSSTATE_BUSY = $03;
  2123. // Bus Error
  2124. BUSERRbm = $04;
  2125. // Arbitration Lost
  2126. ARBLOSTbm = $08;
  2127. // Received Acknowledge
  2128. RXACKbm = $10;
  2129. // Clock Hold
  2130. CLKHOLDbm = $20;
  2131. // Write Interrupt Flag
  2132. WIFbm = $40;
  2133. // Read Interrupt Flag
  2134. RIFbm = $80;
  2135. // Promiscuous Mode Enable
  2136. PMENbm = $04;
  2137. // Stop Interrupt Enable
  2138. PIENbm = $20;
  2139. // Address/Stop Interrupt Enable
  2140. APIENbm = $40;
  2141. // Data Interrupt Enable
  2142. DIENbm = $80;
  2143. // TWI_SCMD
  2144. SCMDmask = $03;
  2145. SCMD_NOACT = $00;
  2146. SCMD_COMPTRANS = $02;
  2147. SCMD_RESPONSE = $03;
  2148. // TWI_AP
  2149. APmask = $01;
  2150. AP_STOP = $00;
  2151. AP_ADR = $01;
  2152. // Read/Write Direction
  2153. DIRbm = $02;
  2154. // Collision
  2155. COLLbm = $08;
  2156. // Address/Stop Interrupt Flag
  2157. APIFbm = $40;
  2158. // Data Interrupt Flag
  2159. DIFbm = $80;
  2160. // Address Enable
  2161. ADDRENbm = $01;
  2162. // Address Mask
  2163. ADDRMASK0bm = $02;
  2164. ADDRMASK1bm = $04;
  2165. ADDRMASK2bm = $08;
  2166. ADDRMASK3bm = $10;
  2167. ADDRMASK4bm = $20;
  2168. ADDRMASK5bm = $40;
  2169. ADDRMASK6bm = $80;
  2170. end;
  2171. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  2172. RXDATAL: byte; //Receive Data Low Byte
  2173. RXDATAH: byte; //Receive Data High Byte
  2174. TXDATAL: byte; //Transmit Data Low Byte
  2175. TXDATAH: byte; //Transmit Data High Byte
  2176. STATUS: byte; //Status
  2177. CTRLA: byte; //Control A
  2178. CTRLB: byte; //Control B
  2179. CTRLC: byte; //Control C
  2180. BAUD: word; //Baud Rate
  2181. CTRLD: byte; //Control D
  2182. DBGCTRL: byte; //Debug Control
  2183. EVCTRL: byte; //Event Control
  2184. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  2185. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  2186. const
  2187. // Receiver Data Register
  2188. DATA8bm = $01;
  2189. // Parity Error
  2190. PERRbm = $02;
  2191. // Frame Error
  2192. FERRbm = $04;
  2193. // Buffer Overflow
  2194. BUFOVFbm = $40;
  2195. // Receive Complete Interrupt Flag
  2196. RXCIFbm = $80;
  2197. // Wait For Break
  2198. WFBbm = $01;
  2199. // Break Detected Flag
  2200. BDFbm = $02;
  2201. // Inconsistent Sync Field Interrupt Flag
  2202. ISFIFbm = $08;
  2203. // Receive Start Interrupt
  2204. RXSIFbm = $10;
  2205. // Data Register Empty Flag
  2206. DREIFbm = $20;
  2207. // Transmit Interrupt Flag
  2208. TXCIFbm = $40;
  2209. // USART_RS485
  2210. RS485mask = $01;
  2211. RS485_DISABLE = $00;
  2212. RS485_ENABLE = $01;
  2213. // Auto-baud Error Interrupt Enable
  2214. ABEIEbm = $04;
  2215. // Loop-back Mode Enable
  2216. LBMEbm = $08;
  2217. // Receiver Start Frame Interrupt Enable
  2218. RXSIEbm = $10;
  2219. // Data Register Empty Interrupt Enable
  2220. DREIEbm = $20;
  2221. // Transmit Complete Interrupt Enable
  2222. TXCIEbm = $40;
  2223. // Receive Complete Interrupt Enable
  2224. RXCIEbm = $80;
  2225. // Multi-processor Communication Mode
  2226. MPCMbm = $01;
  2227. // USART_RXMODE
  2228. RXMODEmask = $06;
  2229. RXMODE_NORMAL = $00;
  2230. RXMODE_CLK2X = $02;
  2231. RXMODE_GENAUTO = $04;
  2232. RXMODE_LINAUTO = $06;
  2233. // Open Drain Mode Enable
  2234. ODMEbm = $08;
  2235. // Start Frame Detection Enable
  2236. SFDENbm = $10;
  2237. // Transmitter Enable
  2238. TXENbm = $40;
  2239. // Reciever enable
  2240. RXENbm = $80;
  2241. // USART_ABW
  2242. ABWmask = $C0;
  2243. ABW_WDW0 = $00;
  2244. ABW_WDW1 = $40;
  2245. ABW_WDW2 = $80;
  2246. ABW_WDW3 = $C0;
  2247. // Debug Run
  2248. DBGRUNbm = $01;
  2249. // IrDA Event Input Enable
  2250. IREIbm = $01;
  2251. // Receiver Pulse Lenght
  2252. RXPL0bm = $01;
  2253. RXPL1bm = $02;
  2254. RXPL2bm = $04;
  2255. RXPL3bm = $08;
  2256. RXPL4bm = $10;
  2257. RXPL5bm = $20;
  2258. RXPL6bm = $40;
  2259. end;
  2260. TUSERROW = object //User Row
  2261. USERROW0: byte; //User Row Byte 0
  2262. USERROW1: byte; //User Row Byte 1
  2263. USERROW2: byte; //User Row Byte 2
  2264. USERROW3: byte; //User Row Byte 3
  2265. USERROW4: byte; //User Row Byte 4
  2266. USERROW5: byte; //User Row Byte 5
  2267. USERROW6: byte; //User Row Byte 6
  2268. USERROW7: byte; //User Row Byte 7
  2269. USERROW8: byte; //User Row Byte 8
  2270. USERROW9: byte; //User Row Byte 9
  2271. USERROW10: byte; //User Row Byte 10
  2272. USERROW11: byte; //User Row Byte 11
  2273. USERROW12: byte; //User Row Byte 12
  2274. USERROW13: byte; //User Row Byte 13
  2275. USERROW14: byte; //User Row Byte 14
  2276. USERROW15: byte; //User Row Byte 15
  2277. USERROW16: byte; //User Row Byte 16
  2278. USERROW17: byte; //User Row Byte 17
  2279. USERROW18: byte; //User Row Byte 18
  2280. USERROW19: byte; //User Row Byte 19
  2281. USERROW20: byte; //User Row Byte 20
  2282. USERROW21: byte; //User Row Byte 21
  2283. USERROW22: byte; //User Row Byte 22
  2284. USERROW23: byte; //User Row Byte 23
  2285. USERROW24: byte; //User Row Byte 24
  2286. USERROW25: byte; //User Row Byte 25
  2287. USERROW26: byte; //User Row Byte 26
  2288. USERROW27: byte; //User Row Byte 27
  2289. USERROW28: byte; //User Row Byte 28
  2290. USERROW29: byte; //User Row Byte 29
  2291. USERROW30: byte; //User Row Byte 30
  2292. USERROW31: byte; //User Row Byte 31
  2293. end;
  2294. TVPORT = object //Virtual Ports
  2295. DIR: byte; //Data Direction
  2296. OUT_: byte; //Output Value
  2297. IN_: byte; //Input Value
  2298. INTFLAGS: byte; //Interrupt Flags
  2299. end;
  2300. TVREF = object //Voltage reference
  2301. ADC0REF: byte; //ADC0 Reference
  2302. Reserved1: byte;
  2303. DAC0REF: byte; //DAC0 Reference
  2304. Reserved3: byte;
  2305. ACREF: byte; //AC Reference
  2306. const
  2307. // VREF_REFSEL
  2308. REFSELmask = $07;
  2309. REFSEL_1V024 = $00;
  2310. REFSEL_2V048 = $01;
  2311. REFSEL_4V096 = $02;
  2312. REFSEL_2V500 = $03;
  2313. REFSEL_VDD = $05;
  2314. REFSEL_VREFA = $06;
  2315. // Always on
  2316. ALWAYSONbm = $80;
  2317. end;
  2318. TWDT = object //Watch-Dog Timer
  2319. CTRLA: byte; //Control A
  2320. STATUS: byte; //Status
  2321. const
  2322. // WDT_PERIOD
  2323. PERIODmask = $0F;
  2324. PERIOD_OFF = $00;
  2325. PERIOD_8CLK = $01;
  2326. PERIOD_16CLK = $02;
  2327. PERIOD_32CLK = $03;
  2328. PERIOD_64CLK = $04;
  2329. PERIOD_128CLK = $05;
  2330. PERIOD_256CLK = $06;
  2331. PERIOD_512CLK = $07;
  2332. PERIOD_1KCLK = $08;
  2333. PERIOD_2KCLK = $09;
  2334. PERIOD_4KCLK = $0A;
  2335. PERIOD_8KCLK = $0B;
  2336. // WDT_WINDOW
  2337. WINDOWmask = $F0;
  2338. WINDOW_OFF = $00;
  2339. WINDOW_8CLK = $10;
  2340. WINDOW_16CLK = $20;
  2341. WINDOW_32CLK = $30;
  2342. WINDOW_64CLK = $40;
  2343. WINDOW_128CLK = $50;
  2344. WINDOW_256CLK = $60;
  2345. WINDOW_512CLK = $70;
  2346. WINDOW_1KCLK = $80;
  2347. WINDOW_2KCLK = $90;
  2348. WINDOW_4KCLK = $A0;
  2349. WINDOW_8KCLK = $B0;
  2350. // Syncronization busy
  2351. SYNCBUSYbm = $01;
  2352. // Lock enable
  2353. LOCKbm = $80;
  2354. end;
  2355. TZCD = object //Zero Cross Detect
  2356. CTRLA: byte; //Control A
  2357. Reserved1: byte;
  2358. INTCTRL: byte; //Interrupt Control
  2359. STATUS: byte; //Status
  2360. const
  2361. // Enable
  2362. ENABLEbm = $01;
  2363. // Invert signal from pin
  2364. INVERTbm = $08;
  2365. // Output Pad Enable
  2366. OUTENbm = $40;
  2367. // Run in Standby Mode
  2368. RUNSTDBYbm = $80;
  2369. // ZCD_INTMODE
  2370. INTMODEmask = $03;
  2371. INTMODE_NONE = $00;
  2372. INTMODE_RISING = $01;
  2373. INTMODE_FALLING = $02;
  2374. INTMODE_BOTH = $03;
  2375. // ZCD Interrupt Flag
  2376. CROSSIFbm = $01;
  2377. // ZCD_STATE
  2378. STATEmask = $10;
  2379. STATE_LOW = $00;
  2380. STATE_HIGH = $10;
  2381. end;
  2382. const
  2383. Pin0idx = 0; Pin0bm = 1;
  2384. Pin1idx = 1; Pin1bm = 2;
  2385. Pin2idx = 2; Pin2bm = 4;
  2386. Pin3idx = 3; Pin3bm = 8;
  2387. Pin4idx = 4; Pin4bm = 16;
  2388. Pin5idx = 5; Pin5bm = 32;
  2389. Pin6idx = 6; Pin6bm = 64;
  2390. Pin7idx = 7; Pin7bm = 128;
  2391. var
  2392. VPORTA: TVPORT absolute $0000;
  2393. VPORTC: TVPORT absolute $0008;
  2394. VPORTD: TVPORT absolute $000C;
  2395. VPORTF: TVPORT absolute $0014;
  2396. GPR: TGPR absolute $001C;
  2397. CPU: TCPU absolute $0030;
  2398. RSTCTRL: TRSTCTRL absolute $0040;
  2399. SLPCTRL: TSLPCTRL absolute $0050;
  2400. CLKCTRL: TCLKCTRL absolute $0060;
  2401. BOD: TBOD absolute $00A0;
  2402. VREF: TVREF absolute $00B0;
  2403. MVIO: TMVIO absolute $00C0;
  2404. WDT: TWDT absolute $0100;
  2405. CPUINT: TCPUINT absolute $0110;
  2406. CRCSCAN: TCRCSCAN absolute $0120;
  2407. RTC: TRTC absolute $0140;
  2408. CCL: TCCL absolute $01C0;
  2409. EVSYS: TEVSYS absolute $0200;
  2410. PORTA: TPORT absolute $0400;
  2411. PORTC: TPORT absolute $0440;
  2412. PORTD: TPORT absolute $0460;
  2413. PORTF: TPORT absolute $04A0;
  2414. PORTMUX: TPORTMUX absolute $05E0;
  2415. ADC0: TADC absolute $0600;
  2416. AC0: TAC absolute $0680;
  2417. AC1: TAC absolute $0688;
  2418. AC2: TAC absolute $0690;
  2419. DAC0: TDAC absolute $06A0;
  2420. ZCD0: TZCD absolute $06C0;
  2421. OPAMP: TOPAMP absolute $0700;
  2422. USART0: TUSART absolute $0800;
  2423. USART1: TUSART absolute $0820;
  2424. USART2: TUSART absolute $0840;
  2425. TWI0: TTWI absolute $0900;
  2426. SPI0: TSPI absolute $0940;
  2427. SPI1: TSPI absolute $0960;
  2428. TCA0: TTCA absolute $0A00;
  2429. TCB0: TTCB absolute $0B00;
  2430. TCB1: TTCB absolute $0B10;
  2431. TCB2: TTCB absolute $0B20;
  2432. TCD0: TTCD absolute $0B80;
  2433. SYSCFG: TSYSCFG absolute $0F00;
  2434. NVMCTRL: TNVMCTRL absolute $1000;
  2435. LOCK: TLOCK absolute $1040;
  2436. FUSE: TFUSE absolute $1050;
  2437. USERROW: TUSERROW absolute $1080;
  2438. SIGROW: TSIGROW absolute $1100;
  2439. implementation
  2440. {$i avrcommon.inc}
  2441. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  2442. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  2443. procedure CLKCTRL_CFD_ISR; external name 'CLKCTRL_CFD_ISR'; // Interrupt 3
  2444. procedure MVIO_MVIO_ISR; external name 'MVIO_MVIO_ISR'; // Interrupt 4
  2445. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 5
  2446. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 6
  2447. procedure CCL_CCL_ISR; external name 'CCL_CCL_ISR'; // Interrupt 7
  2448. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 8
  2449. procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 9
  2450. //procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 9
  2451. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 10
  2452. procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 11
  2453. //procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 11
  2454. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 12
  2455. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 12
  2456. procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 13
  2457. //procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 13
  2458. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 14
  2459. procedure TCB1_INT_ISR; external name 'TCB1_INT_ISR'; // Interrupt 15
  2460. procedure TCD0_OVF_ISR; external name 'TCD0_OVF_ISR'; // Interrupt 16
  2461. procedure TCD0_TRIG_ISR; external name 'TCD0_TRIG_ISR'; // Interrupt 17
  2462. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 18
  2463. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 19
  2464. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 20
  2465. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 21
  2466. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 22
  2467. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 23
  2468. procedure PORTD_PORT_ISR; external name 'PORTD_PORT_ISR'; // Interrupt 24
  2469. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 25
  2470. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 26
  2471. procedure ADC0_WCMP_ISR; external name 'ADC0_WCMP_ISR'; // Interrupt 27
  2472. procedure ZCD0_ZCD_ISR; external name 'ZCD0_ZCD_ISR'; // Interrupt 28
  2473. procedure AC1_AC_ISR; external name 'AC1_AC_ISR'; // Interrupt 29
  2474. procedure PORTC_PORT_ISR; external name 'PORTC_PORT_ISR'; // Interrupt 30
  2475. procedure TCB2_INT_ISR; external name 'TCB2_INT_ISR'; // Interrupt 31
  2476. procedure USART1_RXC_ISR; external name 'USART1_RXC_ISR'; // Interrupt 32
  2477. procedure USART1_DRE_ISR; external name 'USART1_DRE_ISR'; // Interrupt 33
  2478. procedure USART1_TXC_ISR; external name 'USART1_TXC_ISR'; // Interrupt 34
  2479. procedure PORTF_PORT_ISR; external name 'PORTF_PORT_ISR'; // Interrupt 35
  2480. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 36
  2481. procedure SPI1_INT_ISR; external name 'SPI1_INT_ISR'; // Interrupt 37
  2482. procedure USART2_RXC_ISR; external name 'USART2_RXC_ISR'; // Interrupt 38
  2483. procedure USART2_DRE_ISR; external name 'USART2_DRE_ISR'; // Interrupt 39
  2484. procedure USART2_TXC_ISR; external name 'USART2_TXC_ISR'; // Interrupt 40
  2485. procedure AC2_AC_ISR; external name 'AC2_AC_ISR'; // Interrupt 41
  2486. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  2487. asm
  2488. jmp __dtors_end
  2489. jmp CRCSCAN_NMI_ISR
  2490. jmp BOD_VLM_ISR
  2491. jmp CLKCTRL_CFD_ISR
  2492. jmp MVIO_MVIO_ISR
  2493. jmp RTC_CNT_ISR
  2494. jmp RTC_PIT_ISR
  2495. jmp CCL_CCL_ISR
  2496. jmp PORTA_PORT_ISR
  2497. jmp TCA0_LUNF_ISR
  2498. // jmp TCA0_OVF_ISR
  2499. jmp TCA0_HUNF_ISR
  2500. jmp TCA0_CMP0_ISR
  2501. // jmp TCA0_LCMP0_ISR
  2502. jmp TCA0_CMP1_ISR
  2503. // jmp TCA0_LCMP1_ISR
  2504. jmp TCA0_CMP2_ISR
  2505. // jmp TCA0_LCMP2_ISR
  2506. jmp TCB0_INT_ISR
  2507. jmp TCB1_INT_ISR
  2508. jmp TCD0_OVF_ISR
  2509. jmp TCD0_TRIG_ISR
  2510. jmp TWI0_TWIS_ISR
  2511. jmp TWI0_TWIM_ISR
  2512. jmp SPI0_INT_ISR
  2513. jmp USART0_RXC_ISR
  2514. jmp USART0_DRE_ISR
  2515. jmp USART0_TXC_ISR
  2516. jmp PORTD_PORT_ISR
  2517. jmp AC0_AC_ISR
  2518. jmp ADC0_RESRDY_ISR
  2519. jmp ADC0_WCMP_ISR
  2520. jmp ZCD0_ZCD_ISR
  2521. jmp AC1_AC_ISR
  2522. jmp PORTC_PORT_ISR
  2523. jmp TCB2_INT_ISR
  2524. jmp USART1_RXC_ISR
  2525. jmp USART1_DRE_ISR
  2526. jmp USART1_TXC_ISR
  2527. jmp PORTF_PORT_ISR
  2528. jmp NVMCTRL_EE_ISR
  2529. jmp SPI1_INT_ISR
  2530. jmp USART2_RXC_ISR
  2531. jmp USART2_DRE_ISR
  2532. jmp USART2_TXC_ISR
  2533. jmp AC2_AC_ISR
  2534. .weak CRCSCAN_NMI_ISR
  2535. .weak BOD_VLM_ISR
  2536. .weak CLKCTRL_CFD_ISR
  2537. .weak MVIO_MVIO_ISR
  2538. .weak RTC_CNT_ISR
  2539. .weak RTC_PIT_ISR
  2540. .weak CCL_CCL_ISR
  2541. .weak PORTA_PORT_ISR
  2542. .weak TCA0_LUNF_ISR
  2543. // .weak TCA0_OVF_ISR
  2544. .weak TCA0_HUNF_ISR
  2545. .weak TCA0_CMP0_ISR
  2546. // .weak TCA0_LCMP0_ISR
  2547. .weak TCA0_CMP1_ISR
  2548. // .weak TCA0_LCMP1_ISR
  2549. .weak TCA0_CMP2_ISR
  2550. // .weak TCA0_LCMP2_ISR
  2551. .weak TCB0_INT_ISR
  2552. .weak TCB1_INT_ISR
  2553. .weak TCD0_OVF_ISR
  2554. .weak TCD0_TRIG_ISR
  2555. .weak TWI0_TWIS_ISR
  2556. .weak TWI0_TWIM_ISR
  2557. .weak SPI0_INT_ISR
  2558. .weak USART0_RXC_ISR
  2559. .weak USART0_DRE_ISR
  2560. .weak USART0_TXC_ISR
  2561. .weak PORTD_PORT_ISR
  2562. .weak AC0_AC_ISR
  2563. .weak ADC0_RESRDY_ISR
  2564. .weak ADC0_WCMP_ISR
  2565. .weak ZCD0_ZCD_ISR
  2566. .weak AC1_AC_ISR
  2567. .weak PORTC_PORT_ISR
  2568. .weak TCB2_INT_ISR
  2569. .weak USART1_RXC_ISR
  2570. .weak USART1_DRE_ISR
  2571. .weak USART1_TXC_ISR
  2572. .weak PORTF_PORT_ISR
  2573. .weak NVMCTRL_EE_ISR
  2574. .weak SPI1_INT_ISR
  2575. .weak USART2_RXC_ISR
  2576. .weak USART2_DRE_ISR
  2577. .weak USART2_TXC_ISR
  2578. .weak AC2_AC_ISR
  2579. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  2580. .set BOD_VLM_ISR, Default_IRQ_handler
  2581. .set CLKCTRL_CFD_ISR, Default_IRQ_handler
  2582. .set MVIO_MVIO_ISR, Default_IRQ_handler
  2583. .set RTC_CNT_ISR, Default_IRQ_handler
  2584. .set RTC_PIT_ISR, Default_IRQ_handler
  2585. .set CCL_CCL_ISR, Default_IRQ_handler
  2586. .set PORTA_PORT_ISR, Default_IRQ_handler
  2587. .set TCA0_LUNF_ISR, Default_IRQ_handler
  2588. // .set TCA0_OVF_ISR, Default_IRQ_handler
  2589. .set TCA0_HUNF_ISR, Default_IRQ_handler
  2590. .set TCA0_CMP0_ISR, Default_IRQ_handler
  2591. // .set TCA0_LCMP0_ISR, Default_IRQ_handler
  2592. .set TCA0_CMP1_ISR, Default_IRQ_handler
  2593. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  2594. .set TCA0_CMP2_ISR, Default_IRQ_handler
  2595. // .set TCA0_LCMP2_ISR, Default_IRQ_handler
  2596. .set TCB0_INT_ISR, Default_IRQ_handler
  2597. .set TCB1_INT_ISR, Default_IRQ_handler
  2598. .set TCD0_OVF_ISR, Default_IRQ_handler
  2599. .set TCD0_TRIG_ISR, Default_IRQ_handler
  2600. .set TWI0_TWIS_ISR, Default_IRQ_handler
  2601. .set TWI0_TWIM_ISR, Default_IRQ_handler
  2602. .set SPI0_INT_ISR, Default_IRQ_handler
  2603. .set USART0_RXC_ISR, Default_IRQ_handler
  2604. .set USART0_DRE_ISR, Default_IRQ_handler
  2605. .set USART0_TXC_ISR, Default_IRQ_handler
  2606. .set PORTD_PORT_ISR, Default_IRQ_handler
  2607. .set AC0_AC_ISR, Default_IRQ_handler
  2608. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  2609. .set ADC0_WCMP_ISR, Default_IRQ_handler
  2610. .set ZCD0_ZCD_ISR, Default_IRQ_handler
  2611. .set AC1_AC_ISR, Default_IRQ_handler
  2612. .set PORTC_PORT_ISR, Default_IRQ_handler
  2613. .set TCB2_INT_ISR, Default_IRQ_handler
  2614. .set USART1_RXC_ISR, Default_IRQ_handler
  2615. .set USART1_DRE_ISR, Default_IRQ_handler
  2616. .set USART1_TXC_ISR, Default_IRQ_handler
  2617. .set PORTF_PORT_ISR, Default_IRQ_handler
  2618. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  2619. .set SPI1_INT_ISR, Default_IRQ_handler
  2620. .set USART2_RXC_ISR, Default_IRQ_handler
  2621. .set USART2_DRE_ISR, Default_IRQ_handler
  2622. .set USART2_TXC_ISR, Default_IRQ_handler
  2623. .set AC2_AC_ISR, Default_IRQ_handler
  2624. end;
  2625. end.