avr32da32.pp 65 KB

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  1. unit AVR32DA32;
  2. interface
  3. type
  4. TAC = object //Analog Comparator
  5. CTRLA: byte; //Control A
  6. CTRLB: byte; //Control B
  7. MUXCTRL: byte; //Mux Control A
  8. Reserved3: byte;
  9. Reserved4: byte;
  10. DACREF: byte; //DAC Voltage Reference
  11. INTCTRL: byte; //Interrupt Control
  12. STATUS: byte; //Status
  13. const
  14. // Enable
  15. ENABLEbm = $01;
  16. // AC_HYSMODE
  17. HYSMODEmask = $06;
  18. HYSMODE_NONE = $00;
  19. HYSMODE_SMALL = $02;
  20. HYSMODE_MEDIUM = $04;
  21. HYSMODE_LARGE = $06;
  22. // AC_POWER
  23. POWERmask = $18;
  24. POWER_PROFILE0 = $00;
  25. POWER_PROFILE1 = $08;
  26. POWER_PROFILE2 = $10;
  27. // Output Pad Enable
  28. OUTENbm = $40;
  29. // Run in Standby Mode
  30. RUNSTDBYbm = $80;
  31. // AC_WINSEL
  32. WINSELmask = $03;
  33. WINSEL_DISABLED = $00;
  34. WINSEL_UPSEL1 = $01;
  35. WINSEL_UPSEL2 = $02;
  36. // AC_MUXNEG
  37. MUXNEGmask = $07;
  38. MUXNEG_AINN0 = $00;
  39. MUXNEG_AINN1 = $01;
  40. MUXNEG_AINN2 = $02;
  41. MUXNEG_DACREF = $03;
  42. // AC_MUXPOS
  43. MUXPOSmask = $38;
  44. MUXPOS_AINP0 = $00;
  45. MUXPOS_AINP1 = $08;
  46. MUXPOS_AINP2 = $10;
  47. MUXPOS_AINP3 = $18;
  48. // AC_INITVAL
  49. INITVALmask = $40;
  50. INITVAL_LOW = $00;
  51. INITVAL_HIGH = $40;
  52. // Invert AC Output
  53. INVERTbm = $80;
  54. // Analog Comparator Interrupt Flag
  55. CMPIFbm = $01;
  56. // Analog Comparator State
  57. CMPSTATEbm = $10;
  58. // AC_WINSTATE
  59. WINSTATEmask = $C0;
  60. WINSTATE_ABOVE = $00;
  61. WINSTATE_INSIDE = $40;
  62. WINSTATE_BELOW = $80;
  63. end;
  64. TADC = object //Analog to Digital Converter
  65. CTRLA: byte; //Control A
  66. CTRLB: byte; //Control B
  67. CTRLC: byte; //Control C
  68. CTRLD: byte; //Control D
  69. CTRLE: byte; //Control E
  70. SAMPCTRL: byte; //Sample Control
  71. Reserved6: byte;
  72. Reserved7: byte;
  73. MUXPOS: byte; //Positive mux input
  74. MUXNEG: byte; //Negative mux input
  75. COMMAND: byte; //Command
  76. EVCTRL: byte; //Event Control
  77. INTCTRL: byte; //Interrupt Control
  78. INTFLAGS: byte; //Interrupt Flags
  79. DBGCTRL: byte; //Debug Control
  80. TEMP: byte; //Temporary Data
  81. RES: word; //ADC Accumulator Result
  82. WINLT: word; //Window comparator low threshold
  83. WINHT: word; //Window comparator high threshold
  84. const
  85. // ADC Enable
  86. ENABLEbm = $01;
  87. // Free running mode
  88. FREERUNbm = $02;
  89. // ADC_RESSEL
  90. RESSELmask = $0C;
  91. RESSEL_12BIT = $00;
  92. RESSEL_10BIT = $04;
  93. // Left adjust result
  94. LEFTADJbm = $10;
  95. // ADC_CONVMODE
  96. CONVMODEmask = $20;
  97. CONVMODE_SINGLEENDED = $00;
  98. CONVMODE_DIFF = $20;
  99. // Run standby mode
  100. RUNSTBYbm = $80;
  101. // ADC_SAMPNUM
  102. SAMPNUMmask = $07;
  103. SAMPNUM_NONE = $00;
  104. SAMPNUM_ACC2 = $01;
  105. SAMPNUM_ACC4 = $02;
  106. SAMPNUM_ACC8 = $03;
  107. SAMPNUM_ACC16 = $04;
  108. SAMPNUM_ACC32 = $05;
  109. SAMPNUM_ACC64 = $06;
  110. SAMPNUM_ACC128 = $07;
  111. // ADC_PRESC
  112. PRESCmask = $0F;
  113. PRESC_DIV2 = $00;
  114. PRESC_DIV4 = $01;
  115. PRESC_DIV8 = $02;
  116. PRESC_DIV12 = $03;
  117. PRESC_DIV16 = $04;
  118. PRESC_DIV20 = $05;
  119. PRESC_DIV24 = $06;
  120. PRESC_DIV28 = $07;
  121. PRESC_DIV32 = $08;
  122. PRESC_DIV48 = $09;
  123. PRESC_DIV64 = $0A;
  124. PRESC_DIV96 = $0B;
  125. PRESC_DIV128 = $0C;
  126. PRESC_DIV256 = $0D;
  127. // ADC_SAMPDLY
  128. SAMPDLYmask = $0F;
  129. SAMPDLY_DLY0 = $00;
  130. SAMPDLY_DLY1 = $01;
  131. SAMPDLY_DLY2 = $02;
  132. SAMPDLY_DLY3 = $03;
  133. SAMPDLY_DLY4 = $04;
  134. SAMPDLY_DLY5 = $05;
  135. SAMPDLY_DLY6 = $06;
  136. SAMPDLY_DLY7 = $07;
  137. SAMPDLY_DLY8 = $08;
  138. SAMPDLY_DLY9 = $09;
  139. SAMPDLY_DLY10 = $0A;
  140. SAMPDLY_DLY11 = $0B;
  141. SAMPDLY_DLY12 = $0C;
  142. SAMPDLY_DLY13 = $0D;
  143. SAMPDLY_DLY14 = $0E;
  144. SAMPDLY_DLY15 = $0F;
  145. // ADC_INITDLY
  146. INITDLYmask = $E0;
  147. INITDLY_DLY0 = $00;
  148. INITDLY_DLY16 = $20;
  149. INITDLY_DLY32 = $40;
  150. INITDLY_DLY64 = $60;
  151. INITDLY_DLY128 = $80;
  152. INITDLY_DLY256 = $A0;
  153. // ADC_WINCM
  154. WINCMmask = $07;
  155. WINCM_NONE = $00;
  156. WINCM_BELOW = $01;
  157. WINCM_ABOVE = $02;
  158. WINCM_INSIDE = $03;
  159. WINCM_OUTSIDE = $04;
  160. // ADC_MUXPOS
  161. MUXPOSmask = $7F;
  162. MUXPOS_AIN0 = $00;
  163. MUXPOS_AIN1 = $01;
  164. MUXPOS_AIN2 = $02;
  165. MUXPOS_AIN3 = $03;
  166. MUXPOS_AIN4 = $04;
  167. MUXPOS_AIN5 = $05;
  168. MUXPOS_AIN6 = $06;
  169. MUXPOS_AIN7 = $07;
  170. MUXPOS_AIN16 = $10;
  171. MUXPOS_AIN17 = $11;
  172. MUXPOS_AIN18 = $12;
  173. MUXPOS_AIN19 = $13;
  174. MUXPOS_AIN20 = $14;
  175. MUXPOS_AIN21 = $15;
  176. MUXPOS_GND = $40;
  177. MUXPOS_TEMPSENSE = $42;
  178. MUXPOS_DAC0 = $48;
  179. // ADC_MUXNEG
  180. MUXNEGmask = $7F;
  181. MUXNEG_AIN0 = $00;
  182. MUXNEG_AIN1 = $01;
  183. MUXNEG_AIN2 = $02;
  184. MUXNEG_AIN3 = $03;
  185. MUXNEG_AIN4 = $04;
  186. MUXNEG_AIN5 = $05;
  187. MUXNEG_AIN6 = $06;
  188. MUXNEG_AIN7 = $07;
  189. MUXNEG_GND = $40;
  190. MUXNEG_DAC0 = $48;
  191. // Start Conversion
  192. STCONVbm = $01;
  193. // Stop Conversion
  194. SPCONVbm = $02;
  195. // Start Event Input Enable
  196. STARTEIbm = $01;
  197. // Result Ready Interrupt Enable
  198. RESRDYbm = $01;
  199. // Window Comparator Interrupt Enable
  200. WCMPbm = $02;
  201. // Debug run
  202. DBGRUNbm = $01;
  203. end;
  204. TBOD = object //Bod interface
  205. CTRLA: byte; //Control A
  206. CTRLB: byte; //Control B
  207. Reserved2: byte;
  208. Reserved3: byte;
  209. Reserved4: byte;
  210. Reserved5: byte;
  211. Reserved6: byte;
  212. Reserved7: byte;
  213. VLMCTRLA: byte; //Voltage level monitor Control
  214. INTCTRL: byte; //Voltage level monitor interrupt Control
  215. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  216. STATUS: byte; //Voltage level monitor status
  217. const
  218. // BOD_SLEEP
  219. SLEEPmask = $03;
  220. SLEEP_DIS = $00;
  221. SLEEP_ENABLED = $01;
  222. SLEEP_SAMPLED = $02;
  223. // BOD_ACTIVE
  224. ACTIVEmask = $0C;
  225. ACTIVE_DIS = $00;
  226. ACTIVE_ENABLED = $04;
  227. ACTIVE_SAMPLED = $08;
  228. ACTIVE_ENWAKE = $0C;
  229. // BOD_SAMPFREQ
  230. SAMPFREQmask = $10;
  231. SAMPFREQ_128HZ = $00;
  232. SAMPFREQ_32HZ = $10;
  233. // BOD_LVL
  234. LVLmask = $07;
  235. LVL_BODLEVEL0 = $00;
  236. LVL_BODLEVEL1 = $01;
  237. LVL_BODLEVEL2 = $02;
  238. LVL_BODLEVEL3 = $03;
  239. // BOD_VLMLVL
  240. VLMLVLmask = $03;
  241. VLMLVL_OFF = $00;
  242. VLMLVL_5ABOVE = $01;
  243. VLMLVL_15ABOVE = $02;
  244. VLMLVL_25ABOVE = $03;
  245. // voltage level monitor interrrupt enable
  246. VLMIEbm = $01;
  247. // BOD_VLMCFG
  248. VLMCFGmask = $06;
  249. VLMCFG_FALLING = $00;
  250. VLMCFG_RISING = $02;
  251. VLMCFG_BOTH = $04;
  252. // Voltage level monitor interrupt flag
  253. VLMIFbm = $01;
  254. // BOD_VLMS
  255. VLMSmask = $01;
  256. VLMS_ABOVE = $00;
  257. VLMS_BELOW = $01;
  258. end;
  259. TCCL = object //Configurable Custom Logic
  260. CTRLA: byte; //Control Register A
  261. SEQCTRL0: byte; //Sequential Control 0
  262. SEQCTRL1: byte; //Sequential Control 1
  263. Reserved3: byte;
  264. Reserved4: byte;
  265. INTCTRL0: byte; //Interrupt Control 0
  266. Reserved6: byte;
  267. INTFLAGS: byte; //Interrupt Flags
  268. LUT0CTRLA: byte; //LUT 0 Control A
  269. LUT0CTRLB: byte; //LUT 0 Control B
  270. LUT0CTRLC: byte; //LUT 0 Control C
  271. TRUTH0: byte; //Truth 0
  272. LUT1CTRLA: byte; //LUT 1 Control A
  273. LUT1CTRLB: byte; //LUT 1 Control B
  274. LUT1CTRLC: byte; //LUT 1 Control C
  275. TRUTH1: byte; //Truth 1
  276. LUT2CTRLA: byte; //LUT 2 Control A
  277. LUT2CTRLB: byte; //LUT 2 Control B
  278. LUT2CTRLC: byte; //LUT 2 Control C
  279. TRUTH2: byte; //Truth 2
  280. LUT3CTRLA: byte; //LUT 3 Control A
  281. LUT3CTRLB: byte; //LUT 3 Control B
  282. LUT3CTRLC: byte; //LUT 3 Control C
  283. TRUTH3: byte; //Truth 3
  284. const
  285. // Enable
  286. ENABLEbm = $01;
  287. // Run in Standby
  288. RUNSTDBYbm = $40;
  289. // CCL_SEQSEL
  290. SEQSELmask = $0F;
  291. SEQSEL_DISABLE = $00;
  292. SEQSEL_DFF = $01;
  293. SEQSEL_JK = $02;
  294. SEQSEL_LATCH = $03;
  295. SEQSEL_RS = $04;
  296. // CCL_INTMODE0
  297. INTMODE0mask = $03;
  298. INTMODE0_INTDISABLE = $00;
  299. INTMODE0_RISING = $01;
  300. INTMODE0_FALLING = $02;
  301. INTMODE0_BOTH = $03;
  302. // CCL_INTMODE1
  303. INTMODE1mask = $0C;
  304. INTMODE1_INTDISABLE = $00;
  305. INTMODE1_RISING = $04;
  306. INTMODE1_FALLING = $08;
  307. INTMODE1_BOTH = $0C;
  308. // CCL_INTMODE2
  309. INTMODE2mask = $30;
  310. INTMODE2_INTDISABLE = $00;
  311. INTMODE2_RISING = $10;
  312. INTMODE2_FALLING = $20;
  313. INTMODE2_BOTH = $30;
  314. // CCL_INTMODE3
  315. INTMODE3mask = $C0;
  316. INTMODE3_INTDISABLE = $00;
  317. INTMODE3_RISING = $40;
  318. INTMODE3_FALLING = $80;
  319. INTMODE3_BOTH = $C0;
  320. // Interrupt Flag
  321. INT0bm = $01;
  322. INT1bm = $02;
  323. INT2bm = $04;
  324. INT3bm = $08;
  325. // CCL_CLKSRC
  326. CLKSRCmask = $0E;
  327. CLKSRC_CLKPER = $00;
  328. CLKSRC_IN2 = $02;
  329. CLKSRC_OSCHF = $08;
  330. CLKSRC_OSC32K = $0A;
  331. CLKSRC_OSC1K = $0C;
  332. // CCL_FILTSEL
  333. FILTSELmask = $30;
  334. FILTSEL_DISABLE = $00;
  335. FILTSEL_SYNCH = $10;
  336. FILTSEL_FILTER = $20;
  337. // Output Enable
  338. OUTENbm = $40;
  339. // CCL_EDGEDET
  340. EDGEDETmask = $80;
  341. EDGEDET_DIS = $00;
  342. EDGEDET_EN = $80;
  343. // CCL_INSEL0
  344. INSEL0mask = $0F;
  345. INSEL0_MASK = $00;
  346. INSEL0_FEEDBACK = $01;
  347. INSEL0_LINK = $02;
  348. INSEL0_EVENTA = $03;
  349. INSEL0_EVENTB = $04;
  350. INSEL0_IN0 = $05;
  351. INSEL0_AC0 = $06;
  352. INSEL0_ZCD0 = $07;
  353. INSEL0_USART0 = $08;
  354. INSEL0_SPI0 = $09;
  355. INSEL0_TCA0 = $0A;
  356. INSEL0_TCB0 = $0C;
  357. INSEL0_TCD0 = $0D;
  358. // CCL_INSEL1
  359. INSEL1mask = $F0;
  360. INSEL1_MASK = $00;
  361. INSEL1_FEEDBACK = $10;
  362. INSEL1_LINK = $20;
  363. INSEL1_EVENTA = $30;
  364. INSEL1_EVENTB = $40;
  365. INSEL1_IN1 = $50;
  366. INSEL1_AC1 = $60;
  367. INSEL1_USART1 = $80;
  368. INSEL1_SPI0 = $90;
  369. INSEL1_TCA0 = $A0;
  370. INSEL1_TCB1 = $C0;
  371. INSEL1_TCD0 = $D0;
  372. // CCL_INSEL2
  373. INSEL2mask = $0F;
  374. INSEL2_MASK = $00;
  375. INSEL2_FEEDBACK = $01;
  376. INSEL2_LINK = $02;
  377. INSEL2_EVENTA = $03;
  378. INSEL2_EVENTB = $04;
  379. INSEL2_IN2 = $05;
  380. INSEL2_AC2 = $06;
  381. INSEL2_USART2 = $08;
  382. INSEL2_SPI0 = $09;
  383. INSEL2_TCA0 = $0A;
  384. INSEL2_TCB2 = $0C;
  385. INSEL2_TCD0 = $0D;
  386. end;
  387. TCLKCTRL = object //Clock controller
  388. MCLKCTRLA: byte; //MCLK Control A
  389. MCLKCTRLB: byte; //MCLK Control B
  390. MCLKLOCK: byte; //MCLK Lock
  391. MCLKSTATUS: byte; //MCLK Status
  392. Reserved4: byte;
  393. Reserved5: byte;
  394. Reserved6: byte;
  395. Reserved7: byte;
  396. OSCHFCTRLA: byte; //OSCHF Control A
  397. OSCHFTUNE: byte; //OSCHF Tune
  398. Reserved10: byte;
  399. Reserved11: byte;
  400. Reserved12: byte;
  401. Reserved13: byte;
  402. Reserved14: byte;
  403. Reserved15: byte;
  404. PLLCTRLA: byte; //PLL Control A
  405. Reserved17: byte;
  406. Reserved18: byte;
  407. Reserved19: byte;
  408. Reserved20: byte;
  409. Reserved21: byte;
  410. Reserved22: byte;
  411. Reserved23: byte;
  412. OSC32KCTRLA: byte; //OSC32K Control A
  413. Reserved25: byte;
  414. Reserved26: byte;
  415. Reserved27: byte;
  416. XOSC32KCTRLA: byte; //XOSC32K Control A
  417. const
  418. // CLKCTRL_CLKSEL
  419. CLKSELmask = $07;
  420. CLKSEL_OSCHF = $00;
  421. CLKSEL_OSC32K = $01;
  422. CLKSEL_XOSC32K = $02;
  423. CLKSEL_EXTCLK = $03;
  424. // System clock out
  425. CLKOUTbm = $80;
  426. // Prescaler enable
  427. PENbm = $01;
  428. // CLKCTRL_PDIV
  429. PDIVmask = $1E;
  430. PDIV_2X = $00;
  431. PDIV_4X = $02;
  432. PDIV_8X = $04;
  433. PDIV_16X = $06;
  434. PDIV_32X = $08;
  435. PDIV_64X = $0A;
  436. PDIV_6X = $10;
  437. PDIV_10X = $12;
  438. PDIV_12X = $14;
  439. PDIV_24X = $16;
  440. PDIV_48X = $18;
  441. // lock ebable
  442. LOCKENbm = $01;
  443. // System Oscillator changing
  444. SOSCbm = $01;
  445. // High frequency oscillator status
  446. OSCHFSbm = $02;
  447. // 32KHz oscillator status
  448. OSC32KSbm = $04;
  449. // 32.768 kHz Crystal Oscillator status
  450. XOSC32KSbm = $08;
  451. // External Clock status
  452. EXTSbm = $10;
  453. // PLL oscillator status
  454. PLLSbm = $20;
  455. // Autotune
  456. AUTOTUNEbm = $01;
  457. // CLKCTRL_FRQSEL
  458. FRQSELmask = $3C;
  459. FRQSEL_1M = $00;
  460. FRQSEL_2M = $04;
  461. FRQSEL_3M = $08;
  462. FRQSEL_4M = $0C;
  463. FRQSEL_8M = $14;
  464. FRQSEL_12M = $18;
  465. FRQSEL_16M = $1C;
  466. FRQSEL_20M = $20;
  467. FRQSEL_24M = $24;
  468. // Run standby
  469. RUNSTDBYbm = $80;
  470. // CLKCTRL_MULFAC
  471. MULFACmask = $03;
  472. MULFAC_DISABLE = $00;
  473. MULFAC_2x = $01;
  474. MULFAC_3x = $02;
  475. // Source
  476. SOURCEbm = $40;
  477. // Enable
  478. ENABLEbm = $01;
  479. // Low power mode
  480. LPMODEbm = $02;
  481. // Select
  482. SELbm = $04;
  483. // CLKCTRL_CSUT
  484. CSUTmask = $30;
  485. CSUT_1K = $00;
  486. CSUT_16K = $10;
  487. CSUT_32K = $20;
  488. CSUT_64K = $30;
  489. end;
  490. TCPU = object //CPU
  491. Reserved0: byte;
  492. Reserved1: byte;
  493. Reserved2: byte;
  494. Reserved3: byte;
  495. CCP: byte; //Configuration Change Protection
  496. Reserved5: byte;
  497. Reserved6: byte;
  498. Reserved7: byte;
  499. Reserved8: byte;
  500. Reserved9: byte;
  501. Reserved10: byte;
  502. Reserved11: byte;
  503. Reserved12: byte;
  504. SP: word; //Stack Pointer
  505. SREG: byte; //Status Register
  506. const
  507. // CPU_CCP
  508. CCPmask = $FF;
  509. CCP_SPM = $9D;
  510. CCP_IOREG = $D8;
  511. // Carry Flag
  512. Cbm = $01;
  513. // Zero Flag
  514. Zbm = $02;
  515. // Negative Flag
  516. Nbm = $04;
  517. // Two's Complement Overflow Flag
  518. Vbm = $08;
  519. // N Exclusive Or V Flag
  520. Sbm = $10;
  521. // Half Carry Flag
  522. Hbm = $20;
  523. // Transfer Bit
  524. Tbm = $40;
  525. // Global Interrupt Enable Flag
  526. Ibm = $80;
  527. end;
  528. TCPUINT = object //Interrupt Controller
  529. CTRLA: byte; //Control A
  530. STATUS: byte; //Status
  531. LVL0PRI: byte; //Interrupt Level 0 Priority
  532. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  533. const
  534. // Round-robin Scheduling Enable
  535. LVL0RRbm = $01;
  536. // Compact Vector Table
  537. CVTbm = $20;
  538. // Interrupt Vector Select
  539. IVSELbm = $40;
  540. // Level 0 Interrupt Executing
  541. LVL0EXbm = $01;
  542. // Level 1 Interrupt Executing
  543. LVL1EXbm = $02;
  544. // Non-maskable Interrupt Executing
  545. NMIEXbm = $80;
  546. end;
  547. TCRCSCAN = object //CRCSCAN
  548. CTRLA: byte; //Control A
  549. CTRLB: byte; //Control B
  550. STATUS: byte; //Status
  551. const
  552. // Enable CRC scan
  553. ENABLEbm = $01;
  554. // Enable NMI Trigger
  555. NMIENbm = $02;
  556. // Reset CRC scan
  557. RESETbm = $80;
  558. // CRCSCAN_SRC
  559. SRCmask = $03;
  560. SRC_FLASH = $00;
  561. SRC_APPLICATION = $01;
  562. SRC_BOOT = $02;
  563. // CRC Busy
  564. BUSYbm = $01;
  565. // CRC Ok
  566. OKbm = $02;
  567. end;
  568. TDAC = object //Digital to Analog Converter
  569. CTRLA: byte; //Control Register A
  570. Reserved1: byte;
  571. DATA: word; //DATA Register
  572. const
  573. // DAC Enable
  574. ENABLEbm = $01;
  575. // Output Buffer Enable
  576. OUTENbm = $40;
  577. // Run in Standby Mode
  578. RUNSTDBYbm = $80;
  579. end;
  580. TEVSYS = object //Event System
  581. SWEVENTA: byte; //Software Event A
  582. Reserved1: byte;
  583. Reserved2: byte;
  584. Reserved3: byte;
  585. Reserved4: byte;
  586. Reserved5: byte;
  587. Reserved6: byte;
  588. Reserved7: byte;
  589. Reserved8: byte;
  590. Reserved9: byte;
  591. Reserved10: byte;
  592. Reserved11: byte;
  593. Reserved12: byte;
  594. Reserved13: byte;
  595. Reserved14: byte;
  596. Reserved15: byte;
  597. CHANNEL0: byte; //Multiplexer Channel 0
  598. CHANNEL1: byte; //Multiplexer Channel 1
  599. CHANNEL2: byte; //Multiplexer Channel 2
  600. CHANNEL3: byte; //Multiplexer Channel 3
  601. CHANNEL4: byte; //Multiplexer Channel 4
  602. CHANNEL5: byte; //Multiplexer Channel 5
  603. CHANNEL6: byte; //Multiplexer Channel 6
  604. CHANNEL7: byte; //Multiplexer Channel 7
  605. Reserved24: byte;
  606. Reserved25: byte;
  607. Reserved26: byte;
  608. Reserved27: byte;
  609. Reserved28: byte;
  610. Reserved29: byte;
  611. Reserved30: byte;
  612. Reserved31: byte;
  613. USERCCLLUT0A: byte; //User 0 - CCL0 Event A
  614. USERCCLLUT0B: byte; //User 1 - CCL0 Event B
  615. USERCCLLUT1A: byte; //User 2 - CCL1 Event A
  616. USERCCLLUT1B: byte; //User 3 - CCL1 Event B
  617. USERCCLLUT2A: byte; //User 4 - CCL2 Event A
  618. USERCCLLUT2B: byte; //User 5 - CCL2 Event B
  619. USERCCLLUT3A: byte; //User 6 - CCL3 Event A
  620. USERCCLLUT3B: byte; //User 7 - CCL3 Event B
  621. Reserved40: byte;
  622. Reserved41: byte;
  623. Reserved42: byte;
  624. Reserved43: byte;
  625. USERADC0START: byte; //User 12 - ADC0
  626. USERPTCSTART: byte; //User 13 - PTC
  627. USEREVSYSEVOUTA: byte; //User 14 - EVOUTA
  628. Reserved47: byte;
  629. USEREVSYSEVOUTC: byte; //User 16 - EVOUTC
  630. USEREVSYSEVOUTD: byte; //User 17 - EVOUTD
  631. Reserved50: byte;
  632. USEREVSYSEVOUTF: byte; //User 19 - EVOUTF
  633. Reserved52: byte;
  634. USERUSART0IRDA: byte; //User 21 - USART0
  635. USERUSART1IRDA: byte; //User 22 - USART1
  636. USERUSART2IRDA: byte; //User 23 - USART2
  637. Reserved56: byte;
  638. Reserved57: byte;
  639. Reserved58: byte;
  640. USERTCA0CNTA: byte; //User 27 - TCA0 Event A
  641. USERTCA0CNTB: byte; //User 28 - TCA0 Event B
  642. Reserved61: byte;
  643. Reserved62: byte;
  644. USERTCB0CAPT: byte; //User 31 - TCB0 Event A
  645. USERTCB0COUNT: byte; //User 32 - TCB0 Event B
  646. USERTCB1CAPT: byte; //User 33 - TCB1 Event A
  647. USERTCB1COUNT: byte; //User 34 - TCB1 Event B
  648. USERTCB2CAPT: byte; //User 35 - TCB2 Event A
  649. USERTCB2COUNT: byte; //User 36 - TCB2 Event B
  650. Reserved69: byte;
  651. Reserved70: byte;
  652. Reserved71: byte;
  653. Reserved72: byte;
  654. USERTCD0INPUTA: byte; //User 41 - TCD0 Event A
  655. USERTCD0INPUTB: byte; //User 42 - TCD0 Event B
  656. const
  657. // EVSYS_SWEVENTA
  658. SWEVENTAmask = $FF;
  659. SWEVENTA_CH0 = $01;
  660. SWEVENTA_CH1 = $02;
  661. SWEVENTA_CH2 = $04;
  662. SWEVENTA_CH3 = $08;
  663. SWEVENTA_CH4 = $10;
  664. SWEVENTA_CH5 = $20;
  665. SWEVENTA_CH6 = $40;
  666. SWEVENTA_CH7 = $80;
  667. // EVSYS_CHANNEL0
  668. CHANNEL0mask = $FF;
  669. CHANNEL0_OFF = $00;
  670. CHANNEL0_UPDI_SYNCH = $01;
  671. CHANNEL0_RTC_OVF = $06;
  672. CHANNEL0_RTC_CMP = $07;
  673. CHANNEL0_RTC_PIT_DIV8192 = $08;
  674. CHANNEL0_RTC_PIT_DIV4096 = $09;
  675. CHANNEL0_RTC_PIT_DIV2048 = $0A;
  676. CHANNEL0_RTC_PIT_DIV1024 = $0B;
  677. CHANNEL0_CCL_LUT0 = $10;
  678. CHANNEL0_CCL_LUT1 = $11;
  679. CHANNEL0_CCL_LUT2 = $12;
  680. CHANNEL0_CCL_LUT3 = $13;
  681. CHANNEL0_AC0_OUT = $20;
  682. CHANNEL0_AC1_OUT = $21;
  683. CHANNEL0_AC2_OUT = $22;
  684. CHANNEL0_ADC0_RESRDY = $24;
  685. CHANNEL0_PTC_RESRDY = $28;
  686. CHANNEL0_ZCD0 = $30;
  687. CHANNEL0_PORTA_PIN0 = $40;
  688. CHANNEL0_PORTA_PIN1 = $41;
  689. CHANNEL0_PORTA_PIN2 = $42;
  690. CHANNEL0_PORTA_PIN3 = $43;
  691. CHANNEL0_PORTA_PIN4 = $44;
  692. CHANNEL0_PORTA_PIN5 = $45;
  693. CHANNEL0_PORTA_PIN6 = $46;
  694. CHANNEL0_PORTA_PIN7 = $47;
  695. CHANNEL0_USART0_XCK = $60;
  696. CHANNEL0_USART1_XCK = $61;
  697. CHANNEL0_USART2_XCK = $62;
  698. CHANNEL0_SPI0_SCK = $68;
  699. CHANNEL0_SPI1_SCK = $69;
  700. CHANNEL0_TCA0_OVF_LUNF = $80;
  701. CHANNEL0_TCA0_HUNF = $81;
  702. CHANNEL0_TCA0_CMP0_LCMP0 = $84;
  703. CHANNEL0_TCA0_CMP1_LCMP1 = $85;
  704. CHANNEL0_TCA0_CMP2_LCMP2 = $86;
  705. CHANNEL0_TCA1_OVF_LUNF = $88;
  706. CHANNEL0_TCB0_CAPT = $A0;
  707. CHANNEL0_TCB0_OVF = $A1;
  708. CHANNEL0_TCB1_CAPT = $A2;
  709. CHANNEL0_TCB1_OVF = $A3;
  710. CHANNEL0_TCB2_CAPT = $A4;
  711. CHANNEL0_TCB2_OVF = $A5;
  712. CHANNEL0_TCD0_CMPBCLR = $B0;
  713. CHANNEL0_TCD0_CMPASET = $B1;
  714. CHANNEL0_TCD0_CMPBSET = $B2;
  715. CHANNEL0_TCD0_PROGEV = $B3;
  716. // EVSYS_CHANNEL1
  717. CHANNEL1mask = $FF;
  718. CHANNEL1_OFF = $00;
  719. CHANNEL1_UPDI_SYNCH = $01;
  720. CHANNEL1_RTC_OVF = $06;
  721. CHANNEL1_RTC_CMP = $07;
  722. CHANNEL1_RTC_PIT_DIV512 = $08;
  723. CHANNEL1_RTC_PIT_DIV256 = $09;
  724. CHANNEL1_RTC_PIT_DIV128 = $0A;
  725. CHANNEL1_RTC_PIT_DIV64 = $0B;
  726. CHANNEL1_CCL_LUT0 = $10;
  727. CHANNEL1_CCL_LUT1 = $11;
  728. CHANNEL1_CCL_LUT2 = $12;
  729. CHANNEL1_CCL_LUT3 = $13;
  730. CHANNEL1_AC0_OUT = $20;
  731. CHANNEL1_AC1_OUT = $21;
  732. CHANNEL1_AC2_OUT = $22;
  733. CHANNEL1_ADC0_RESRDY = $24;
  734. CHANNEL1_PTC_RESRDY = $28;
  735. CHANNEL1_ZCD0 = $30;
  736. CHANNEL1_PORTA_PIN0 = $40;
  737. CHANNEL1_PORTA_PIN1 = $41;
  738. CHANNEL1_PORTA_PIN2 = $42;
  739. CHANNEL1_PORTA_PIN3 = $43;
  740. CHANNEL1_PORTA_PIN4 = $44;
  741. CHANNEL1_PORTA_PIN5 = $45;
  742. CHANNEL1_PORTA_PIN6 = $46;
  743. CHANNEL1_PORTA_PIN7 = $47;
  744. CHANNEL1_USART0_XCK = $60;
  745. CHANNEL1_USART1_XCK = $61;
  746. CHANNEL1_USART2_XCK = $62;
  747. CHANNEL1_SPI0_SCK = $68;
  748. CHANNEL1_SPI1_SCK = $69;
  749. CHANNEL1_TCA0_OVF_LUNF = $80;
  750. CHANNEL1_TCA0_HUNF = $81;
  751. CHANNEL1_TCA0_CMP0_LCMP0 = $84;
  752. CHANNEL1_TCA0_CMP1_LCMP1 = $85;
  753. CHANNEL1_TCA0_CMP2_LCMP2 = $86;
  754. CHANNEL1_TCB0_CAPT = $A0;
  755. CHANNEL1_TCB0_OVF = $A1;
  756. CHANNEL1_TCB1_CAPT = $A2;
  757. CHANNEL1_TCB1_OVF = $A3;
  758. CHANNEL1_TCB2_CAPT = $A4;
  759. CHANNEL1_TCB2_OVF = $A5;
  760. CHANNEL1_TCD0_CMPBCLR = $B0;
  761. CHANNEL1_TCD0_CMPASET = $B1;
  762. CHANNEL1_TCD0_CMPBSET = $B2;
  763. CHANNEL1_TCD0_PROGEV = $B3;
  764. // EVSYS_CHANNEL2
  765. CHANNEL2mask = $FF;
  766. CHANNEL2_OFF = $00;
  767. CHANNEL2_UPDI_SYNCH = $01;
  768. CHANNEL2_RTC_OVF = $06;
  769. CHANNEL2_RTC_CMP = $07;
  770. CHANNEL2_RTC_PIT_DIV8192 = $08;
  771. CHANNEL2_RTC_PIT_DIV4096 = $09;
  772. CHANNEL2_RTC_PIT_DIV2048 = $0A;
  773. CHANNEL2_RTC_PIT_DIV1024 = $0B;
  774. CHANNEL2_CCL_LUT0 = $10;
  775. CHANNEL2_CCL_LUT1 = $11;
  776. CHANNEL2_CCL_LUT2 = $12;
  777. CHANNEL2_CCL_LUT3 = $13;
  778. CHANNEL2_AC0_OUT = $20;
  779. CHANNEL2_AC1_OUT = $21;
  780. CHANNEL2_AC2_OUT = $22;
  781. CHANNEL2_ADC0_RESRDY = $24;
  782. CHANNEL2_PTC_RESRDY = $28;
  783. CHANNEL2_ZCD0 = $30;
  784. CHANNEL2_PORTC_PIN0 = $40;
  785. CHANNEL2_PORTC_PIN1 = $41;
  786. CHANNEL2_PORTC_PIN2 = $42;
  787. CHANNEL2_PORTC_PIN3 = $43;
  788. CHANNEL2_PORTD_PIN0 = $48;
  789. CHANNEL2_PORTD_PIN1 = $49;
  790. CHANNEL2_PORTD_PIN2 = $4A;
  791. CHANNEL2_PORTD_PIN3 = $4B;
  792. CHANNEL2_PORTD_PIN4 = $4C;
  793. CHANNEL2_PORTD_PIN5 = $4D;
  794. CHANNEL2_PORTD_PIN6 = $4E;
  795. CHANNEL2_PORTD_PIN7 = $4F;
  796. CHANNEL2_USART0_XCK = $60;
  797. CHANNEL2_USART1_XCK = $61;
  798. CHANNEL2_USART2_XCK = $62;
  799. CHANNEL2_SPI0_SCK = $68;
  800. CHANNEL2_SPI1_SCK = $69;
  801. CHANNEL2_TCA0_OVF_LUNF = $80;
  802. CHANNEL2_TCA0_HUNF = $81;
  803. CHANNEL2_TCA0_CMP0_LCMP0 = $84;
  804. CHANNEL2_TCA0_CMP1_LCMP1 = $85;
  805. CHANNEL2_TCA0_CMP2_LCMP2 = $86;
  806. CHANNEL2_TCB0_CAPT = $A0;
  807. CHANNEL2_TCB0_OVF = $A1;
  808. CHANNEL2_TCB1_CAPT = $A2;
  809. CHANNEL2_TCB1_OVF = $A3;
  810. CHANNEL2_TCB2_CAPT = $A4;
  811. CHANNEL2_TCB2_OVF = $A5;
  812. CHANNEL2_TCD0_CMPBCLR = $B0;
  813. CHANNEL2_TCD0_CMPASET = $B1;
  814. CHANNEL2_TCD0_CMPBSET = $B2;
  815. CHANNEL2_TCD0_PROGEV = $B3;
  816. // EVSYS_CHANNEL3
  817. CHANNEL3mask = $FF;
  818. CHANNEL3_OFF = $00;
  819. CHANNEL3_UPDI_SYNCH = $01;
  820. CHANNEL3_RTC_OVF = $06;
  821. CHANNEL3_RTC_CMP = $07;
  822. CHANNEL3_RTC_PIT_DIV512 = $08;
  823. CHANNEL3_RTC_PIT_DIV256 = $09;
  824. CHANNEL3_RTC_PIT_DIV128 = $0A;
  825. CHANNEL3_RTC_PIT_DIV64 = $0B;
  826. CHANNEL3_CCL_LUT0 = $10;
  827. CHANNEL3_CCL_LUT1 = $11;
  828. CHANNEL3_CCL_LUT2 = $12;
  829. CHANNEL3_CCL_LUT3 = $13;
  830. CHANNEL3_AC0_OUT = $20;
  831. CHANNEL3_AC1_OUT = $21;
  832. CHANNEL3_AC2_OUT = $22;
  833. CHANNEL3_ADC0_RESRDY = $24;
  834. CHANNEL3_PTC_RESRDY = $28;
  835. CHANNEL3_ZCD0 = $30;
  836. CHANNEL3_PORTC_PIN0 = $40;
  837. CHANNEL3_PORTC_PIN1 = $41;
  838. CHANNEL3_PORTC_PIN2 = $42;
  839. CHANNEL3_PORTC_PIN3 = $43;
  840. CHANNEL3_PORTD_PIN0 = $48;
  841. CHANNEL3_PORTD_PIN1 = $49;
  842. CHANNEL3_PORTD_PIN2 = $4A;
  843. CHANNEL3_PORTD_PIN3 = $4B;
  844. CHANNEL3_PORTD_PIN4 = $4C;
  845. CHANNEL3_PORTD_PIN5 = $4D;
  846. CHANNEL3_PORTD_PIN6 = $4E;
  847. CHANNEL3_PORTD_PIN7 = $4F;
  848. CHANNEL3_USART0_XCK = $60;
  849. CHANNEL3_USART1_XCK = $61;
  850. CHANNEL3_USART2_XCK = $62;
  851. CHANNEL3_SPI0_SCK = $68;
  852. CHANNEL3_SPI1_SCK = $69;
  853. CHANNEL3_TCA0_OVF_LUNF = $80;
  854. CHANNEL3_TCA0_HUNF = $81;
  855. CHANNEL3_TCA0_CMP0_LCMP0 = $84;
  856. CHANNEL3_TCA0_CMP1_LCMP1 = $85;
  857. CHANNEL3_TCA0_CMP2_LCMP2 = $86;
  858. CHANNEL3_TCB0_CAPT = $A0;
  859. CHANNEL3_TCB0_OVF = $A1;
  860. CHANNEL3_TCB1_CAPT = $A2;
  861. CHANNEL3_TCB1_OVF = $A3;
  862. CHANNEL3_TCB2_CAPT = $A4;
  863. CHANNEL3_TCB2_OVF = $A5;
  864. CHANNEL3_TCD0_CMPBCLR = $B0;
  865. CHANNEL3_TCD0_CMPASET = $B1;
  866. CHANNEL3_TCD0_CMPBSET = $B2;
  867. CHANNEL3_TCD0_PROGEV = $B3;
  868. // EVSYS_CHANNEL4
  869. CHANNEL4mask = $FF;
  870. CHANNEL4_OFF = $00;
  871. CHANNEL4_UPDI_SYNCH = $01;
  872. CHANNEL4_RTC_OVF = $06;
  873. CHANNEL4_RTC_CMP = $07;
  874. CHANNEL4_RTC_PIT_DIV8192 = $08;
  875. CHANNEL4_RTC_PIT_DIV4096 = $09;
  876. CHANNEL4_RTC_PIT_DIV2048 = $0A;
  877. CHANNEL4_RTC_PIT_DIV1024 = $0B;
  878. CHANNEL4_CCL_LUT0 = $10;
  879. CHANNEL4_CCL_LUT1 = $11;
  880. CHANNEL4_CCL_LUT2 = $12;
  881. CHANNEL4_CCL_LUT3 = $13;
  882. CHANNEL4_AC0_OUT = $20;
  883. CHANNEL4_AC1_OUT = $21;
  884. CHANNEL4_AC2_OUT = $22;
  885. CHANNEL4_ADC0_RESRDY = $24;
  886. CHANNEL4_PTC_RESRDY = $28;
  887. CHANNEL4_ZCD0 = $30;
  888. CHANNEL4_PORTF_PIN0 = $48;
  889. CHANNEL4_PORTF_PIN1 = $49;
  890. CHANNEL4_PORTF_PIN2 = $4A;
  891. CHANNEL4_PORTF_PIN3 = $4B;
  892. CHANNEL4_PORTF_PIN4 = $4C;
  893. CHANNEL4_PORTF_PIN5 = $4D;
  894. CHANNEL4_PORTF_PIN6 = $4E;
  895. CHANNEL4_USART0_XCK = $60;
  896. CHANNEL4_USART1_XCK = $61;
  897. CHANNEL4_USART2_XCK = $62;
  898. CHANNEL4_SPI0_SCK = $68;
  899. CHANNEL4_SPI1_SCK = $69;
  900. CHANNEL4_TCA0_OVF_LUNF = $80;
  901. CHANNEL4_TCA0_HUNF = $81;
  902. CHANNEL4_TCA0_CMP0_LCMP0 = $84;
  903. CHANNEL4_TCA0_CMP1_LCMP1 = $85;
  904. CHANNEL4_TCA0_CMP2_LCMP2 = $86;
  905. CHANNEL4_TCB0_CAPT = $A0;
  906. CHANNEL4_TCB0_OVF = $A1;
  907. CHANNEL4_TCB1_CAPT = $A2;
  908. CHANNEL4_TCB1_OVF = $A3;
  909. CHANNEL4_TCB2_CAPT = $A4;
  910. CHANNEL4_TCB2_OVF = $A5;
  911. CHANNEL4_TCD0_CMPBCLR = $B0;
  912. CHANNEL4_TCD0_CMPASET = $B1;
  913. CHANNEL4_TCD0_CMPBSET = $B2;
  914. CHANNEL4_TCD0_PROGEV = $B3;
  915. // EVSYS_CHANNEL5
  916. CHANNEL5mask = $FF;
  917. CHANNEL5_OFF = $00;
  918. CHANNEL5_UPDI_SYNCH = $01;
  919. CHANNEL5_RTC_OVF = $06;
  920. CHANNEL5_RTC_CMP = $07;
  921. CHANNEL5_RTC_PIT_DIV512 = $08;
  922. CHANNEL5_RTC_PIT_DIV256 = $09;
  923. CHANNEL5_RTC_PIT_DIV128 = $0A;
  924. CHANNEL5_RTC_PIT_DIV64 = $0B;
  925. CHANNEL5_CCL_LUT0 = $10;
  926. CHANNEL5_CCL_LUT1 = $11;
  927. CHANNEL5_CCL_LUT2 = $12;
  928. CHANNEL5_CCL_LUT3 = $13;
  929. CHANNEL5_AC0_OUT = $20;
  930. CHANNEL5_AC1_OUT = $21;
  931. CHANNEL5_AC2_OUT = $22;
  932. CHANNEL5_ADC0_RESRDY = $24;
  933. CHANNEL5_PTC_RESRDY = $28;
  934. CHANNEL5_ZCD0 = $30;
  935. CHANNEL5_PORTF_PIN0 = $48;
  936. CHANNEL5_PORTF_PIN1 = $49;
  937. CHANNEL5_PORTF_PIN2 = $4A;
  938. CHANNEL5_PORTF_PIN3 = $4B;
  939. CHANNEL5_PORTF_PIN4 = $4C;
  940. CHANNEL5_PORTF_PIN5 = $4D;
  941. CHANNEL5_PORTF_PIN6 = $4E;
  942. CHANNEL5_USART0_XCK = $60;
  943. CHANNEL5_USART1_XCK = $61;
  944. CHANNEL5_USART2_XCK = $62;
  945. CHANNEL5_SPI0_SCK = $68;
  946. CHANNEL5_SPI1_SCK = $69;
  947. CHANNEL5_TCA0_OVF_LUNF = $80;
  948. CHANNEL5_TCA0_HUNF = $81;
  949. CHANNEL5_TCA0_CMP0_LCMP0 = $84;
  950. CHANNEL5_TCA0_CMP1_LCMP1 = $85;
  951. CHANNEL5_TCA0_CMP2_LCMP2 = $86;
  952. CHANNEL5_TCB0_CAPT = $A0;
  953. CHANNEL5_TCB0_OVF = $A1;
  954. CHANNEL5_TCB1_CAPT = $A2;
  955. CHANNEL5_TCB1_OVF = $A3;
  956. CHANNEL5_TCB2_CAPT = $A4;
  957. CHANNEL5_TCB2_OVF = $A5;
  958. CHANNEL5_TCD0_CMPBCLR = $B0;
  959. CHANNEL5_TCD0_CMPASET = $B1;
  960. CHANNEL5_TCD0_CMPBSET = $B2;
  961. CHANNEL5_TCD0_PROGEV = $B3;
  962. // EVSYS_CHANNEL6
  963. CHANNEL6mask = $FF;
  964. CHANNEL6_OFF = $00;
  965. CHANNEL6_UPDI_SYNCH = $01;
  966. CHANNEL6_RTC_OVF = $06;
  967. CHANNEL6_RTC_CMP = $07;
  968. CHANNEL6_RTC_PIT_DIV8192 = $08;
  969. CHANNEL6_RTC_PIT_DIV4096 = $09;
  970. CHANNEL6_RTC_PIT_DIV2048 = $0A;
  971. CHANNEL6_RTC_PIT_DIV1024 = $0B;
  972. CHANNEL6_CCL_LUT0 = $10;
  973. CHANNEL6_CCL_LUT1 = $11;
  974. CHANNEL6_CCL_LUT2 = $12;
  975. CHANNEL6_CCL_LUT3 = $13;
  976. CHANNEL6_AC0_OUT = $20;
  977. CHANNEL6_AC1_OUT = $21;
  978. CHANNEL6_AC2_OUT = $22;
  979. CHANNEL6_ADC0_RESRDY = $24;
  980. CHANNEL6_PTC_RESRDY = $28;
  981. CHANNEL6_ZCD0 = $30;
  982. CHANNEL6_USART0_XCK = $60;
  983. CHANNEL6_USART1_XCK = $61;
  984. CHANNEL6_USART2_XCK = $62;
  985. CHANNEL6_SPI0_SCK = $68;
  986. CHANNEL6_SPI1_SCK = $69;
  987. CHANNEL6_TCA0_OVF_LUNF = $80;
  988. CHANNEL6_TCA0_HUNF = $81;
  989. CHANNEL6_TCA0_CMP0_LCMP0 = $84;
  990. CHANNEL6_TCA0_CMP1_LCMP1 = $85;
  991. CHANNEL6_TCA0_CMP2_LCMP2 = $86;
  992. CHANNEL6_TCB0_CAPT = $A0;
  993. CHANNEL6_TCB0_OVF = $A1;
  994. CHANNEL6_TCB1_CAPT = $A2;
  995. CHANNEL6_TCB1_OVF = $A3;
  996. CHANNEL6_TCB2_CAPT = $A4;
  997. CHANNEL6_TCB2_OVF = $A5;
  998. CHANNEL6_TCD0_CMPBCLR = $B0;
  999. CHANNEL6_TCD0_CMPASET = $B1;
  1000. CHANNEL6_TCD0_CMPBSET = $B2;
  1001. CHANNEL6_TCD0_PROGEV = $B3;
  1002. // EVSYS_CHANNEL7
  1003. CHANNEL7mask = $FF;
  1004. CHANNEL7_OFF = $00;
  1005. CHANNEL7_UPDI_SYNCH = $01;
  1006. CHANNEL7_RTC_OVF = $06;
  1007. CHANNEL7_RTC_CMP = $07;
  1008. CHANNEL7_RTC_PIT_DIV512 = $08;
  1009. CHANNEL7_RTC_PIT_DIV256 = $09;
  1010. CHANNEL7_RTC_PIT_DIV128 = $0A;
  1011. CHANNEL7_RTC_PIT_DIV64 = $0B;
  1012. CHANNEL7_CCL_LUT0 = $10;
  1013. CHANNEL7_CCL_LUT1 = $11;
  1014. CHANNEL7_CCL_LUT2 = $12;
  1015. CHANNEL7_CCL_LUT3 = $13;
  1016. CHANNEL7_AC0_OUT = $20;
  1017. CHANNEL7_AC1_OUT = $21;
  1018. CHANNEL7_AC2_OUT = $22;
  1019. CHANNEL7_ADC0_RESRDY = $24;
  1020. CHANNEL7_PTC_RESRDY = $28;
  1021. CHANNEL7_ZCD0 = $30;
  1022. CHANNEL7_USART0_XCK = $60;
  1023. CHANNEL7_USART1_XCK = $61;
  1024. CHANNEL7_USART2_XCK = $62;
  1025. CHANNEL7_SPI0_SCK = $68;
  1026. CHANNEL7_SPI1_SCK = $69;
  1027. CHANNEL7_TCA0_OVF_LUNF = $80;
  1028. CHANNEL7_TCA0_HUNF = $81;
  1029. CHANNEL7_TCA0_CMP0_LCMP0 = $84;
  1030. CHANNEL7_TCA0_CMP1_LCMP1 = $85;
  1031. CHANNEL7_TCA0_CMP2_LCMP2 = $86;
  1032. CHANNEL7_TCB0_CAPT = $A0;
  1033. CHANNEL7_TCB0_OVF = $A1;
  1034. CHANNEL7_TCB1_CAPT = $A2;
  1035. CHANNEL7_TCB1_OVF = $A3;
  1036. CHANNEL7_TCB2_CAPT = $A4;
  1037. CHANNEL7_TCB2_OVF = $A5;
  1038. CHANNEL7_TCD0_CMPBCLR = $B0;
  1039. CHANNEL7_TCD0_CMPASET = $B1;
  1040. CHANNEL7_TCD0_CMPBSET = $B2;
  1041. CHANNEL7_TCD0_PROGEV = $B3;
  1042. // EVSYS_USER
  1043. USERmask = $FF;
  1044. USER_OFF = $00;
  1045. USER_CHANNEL0 = $01;
  1046. USER_CHANNEL1 = $02;
  1047. USER_CHANNEL2 = $03;
  1048. USER_CHANNEL3 = $04;
  1049. USER_CHANNEL4 = $05;
  1050. USER_CHANNEL5 = $06;
  1051. USER_CHANNEL6 = $07;
  1052. USER_CHANNEL7 = $08;
  1053. end;
  1054. TFUSE = object //Fuses
  1055. WDTCFG: byte; //Watchdog Configuration
  1056. BODCFG: byte; //BOD Configuration
  1057. OSCCFG: byte; //Oscillator Configuration
  1058. Reserved3: byte;
  1059. Reserved4: byte;
  1060. SYSCFG0: byte; //System Configuration 0
  1061. SYSCFG1: byte; //System Configuration 1
  1062. CODESIZE: byte; //Code Section Size
  1063. BOOTSIZE: byte; //Boot Section Size
  1064. const
  1065. // FUSE_PERIOD
  1066. PERIODmask = $0F;
  1067. PERIOD_OFF = $00;
  1068. PERIOD_8CLK = $01;
  1069. PERIOD_16CLK = $02;
  1070. PERIOD_32CLK = $03;
  1071. PERIOD_64CLK = $04;
  1072. PERIOD_128CLK = $05;
  1073. PERIOD_256CLK = $06;
  1074. PERIOD_512CLK = $07;
  1075. PERIOD_1KCLK = $08;
  1076. PERIOD_2KCLK = $09;
  1077. PERIOD_4KCLK = $0A;
  1078. PERIOD_8KCLK = $0B;
  1079. // FUSE_WINDOW
  1080. WINDOWmask = $F0;
  1081. WINDOW_OFF = $00;
  1082. WINDOW_8CLK = $10;
  1083. WINDOW_16CLK = $20;
  1084. WINDOW_32CLK = $30;
  1085. WINDOW_64CLK = $40;
  1086. WINDOW_128CLK = $50;
  1087. WINDOW_256CLK = $60;
  1088. WINDOW_512CLK = $70;
  1089. WINDOW_1KCLK = $80;
  1090. WINDOW_2KCLK = $90;
  1091. WINDOW_4KCLK = $A0;
  1092. WINDOW_8KCLK = $B0;
  1093. // FUSE_SLEEP
  1094. SLEEPmask = $03;
  1095. SLEEP_DISABLE = $00;
  1096. SLEEP_ENABLE = $01;
  1097. SLEEP_SAMPLE = $02;
  1098. // FUSE_ACTIVE
  1099. ACTIVEmask = $0C;
  1100. ACTIVE_DISABLE = $00;
  1101. ACTIVE_ENABLE = $04;
  1102. ACTIVE_SAMPLE = $08;
  1103. ACTIVE_ENABLEWAIT = $0C;
  1104. // FUSE_SAMPFREQ
  1105. SAMPFREQmask = $10;
  1106. SAMPFREQ_128Hz = $00;
  1107. SAMPFREQ_32Hz = $10;
  1108. // FUSE_LVL
  1109. LVLmask = $E0;
  1110. LVL_BODLEVEL0 = $00;
  1111. LVL_BODLEVEL1 = $20;
  1112. LVL_BODLEVEL2 = $40;
  1113. LVL_BODLEVEL3 = $60;
  1114. // FUSE_CLKSEL
  1115. CLKSELmask = $07;
  1116. CLKSEL_OSCHF = $00;
  1117. CLKSEL_OSC32K = $01;
  1118. // EEPROM Save
  1119. EESAVEbm = $01;
  1120. // FUSE_RSTPINCFG
  1121. RSTPINCFGmask = $0C;
  1122. RSTPINCFG_GPIO = $00;
  1123. RSTPINCFG_RST = $08;
  1124. // FUSE_CRCSEL
  1125. CRCSELmask = $20;
  1126. CRCSEL_CRC16 = $00;
  1127. CRCSEL_CRC32 = $20;
  1128. // FUSE_CRCSRC
  1129. CRCSRCmask = $C0;
  1130. CRCSRC_FLASH = $00;
  1131. CRCSRC_BOOT = $40;
  1132. CRCSRC_BOOTAPP = $80;
  1133. CRCSRC_NOCRC = $C0;
  1134. // FUSE_SUT
  1135. SUTmask = $07;
  1136. SUT_0MS = $00;
  1137. SUT_1MS = $01;
  1138. SUT_2MS = $02;
  1139. SUT_4MS = $03;
  1140. SUT_8MS = $04;
  1141. SUT_16MS = $05;
  1142. SUT_32MS = $06;
  1143. SUT_64MS = $07;
  1144. end;
  1145. TGPR = object //General Purpose Registers
  1146. GPR0: byte; //General Purpose Register 0
  1147. GPR1: byte; //General Purpose Register 1
  1148. GPR2: byte; //General Purpose Register 2
  1149. GPR3: byte; //General Purpose Register 3
  1150. end;
  1151. TLOCK = object //Lockbits
  1152. KEY: dword; //Lock Key Bits
  1153. const
  1154. // LOCK_KEY
  1155. KEYmask = $FFFFFFFF;
  1156. KEY_NOLOCK = $5CC5C55C;
  1157. KEY_RWLOCK = $A33A3AA3;
  1158. end;
  1159. TNVMCTRL = object //Non-volatile Memory Controller
  1160. CTRLA: byte; //Control A
  1161. CTRLB: byte; //Control B
  1162. STATUS: byte; //Status
  1163. INTCTRL: byte; //Interrupt Control
  1164. INTFLAGS: byte; //Interrupt Flags
  1165. Reserved5: byte;
  1166. DATA: word; //Data
  1167. ADDR: dword; //Address
  1168. const
  1169. // NVMCTRL_CMD
  1170. CMDmask = $7F;
  1171. CMD_NONE = $00;
  1172. CMD_NOOP = $01;
  1173. CMD_FLWR = $02;
  1174. CMD_FLPER = $08;
  1175. CMD_FLMPER2 = $09;
  1176. CMD_FLMPER4 = $0A;
  1177. CMD_FLMPER8 = $0B;
  1178. CMD_FLMPER16 = $0C;
  1179. CMD_FLMPER32 = $0D;
  1180. CMD_EEWR = $12;
  1181. CMD_EEERWR = $13;
  1182. CMD_EEBER = $18;
  1183. CMD_EEMBER2 = $19;
  1184. CMD_EEMBER4 = $1A;
  1185. CMD_EEMBER8 = $1B;
  1186. CMD_EEMBER16 = $1C;
  1187. CMD_EEMBER32 = $1D;
  1188. CMD_CHER = $20;
  1189. CMD_EECHER = $30;
  1190. // Application Code Write Protect
  1191. APPCODEWPbm = $01;
  1192. // Boot Read Protect
  1193. BOOTRPbm = $02;
  1194. // Application Data Write Protect
  1195. APPDATAWPbm = $04;
  1196. // NVMCTRL_FLMAP
  1197. FLMAPmask = $30;
  1198. FLMAP_SECTION0 = $00;
  1199. FLMAP_SECTION1 = $10;
  1200. FLMAP_SECTION2 = $20;
  1201. FLMAP_SECTION3 = $30;
  1202. // Flash Mapping Lock
  1203. FLMAPLOCKbm = $80;
  1204. // Flash busy
  1205. FBUSYbm = $01;
  1206. // EEPROM busy
  1207. EEBUSYbm = $02;
  1208. // NVMCTRL_ERROR
  1209. ERRORmask = $70;
  1210. ERROR_NOERROR = $00;
  1211. ERROR_ILLEGALCMD = $10;
  1212. ERROR_ILLEGALSADDR = $20;
  1213. ERROR_DOUBLESELECT = $30;
  1214. ERROR_ONGOINGPROG = $40;
  1215. // EEPROM Ready
  1216. EEREADYbm = $01;
  1217. end;
  1218. TPORT = object //I/O Ports
  1219. DIR: byte; //Data Direction
  1220. DIRSET: byte; //Data Direction Set
  1221. DIRCLR: byte; //Data Direction Clear
  1222. DIRTGL: byte; //Data Direction Toggle
  1223. OUT_: byte; //Output Value
  1224. OUTSET: byte; //Output Value Set
  1225. OUTCLR: byte; //Output Value Clear
  1226. OUTTGL: byte; //Output Value Toggle
  1227. IN_: byte; //Input Value
  1228. INTFLAGS: byte; //Interrupt Flags
  1229. PORTCTRL: byte; //Port Control
  1230. PINCONFIG: byte; //Pin Control Config
  1231. PINCTRLUPD: byte; //Pin Control Update
  1232. PINCTRLSET: byte; //Pin Control Set
  1233. PINCTRLCLR: byte; //Pin Control Clear
  1234. Reserved15: byte;
  1235. PIN0CTRL: byte; //Pin 0 Control
  1236. PIN1CTRL: byte; //Pin 1 Control
  1237. PIN2CTRL: byte; //Pin 2 Control
  1238. PIN3CTRL: byte; //Pin 3 Control
  1239. PIN4CTRL: byte; //Pin 4 Control
  1240. PIN5CTRL: byte; //Pin 5 Control
  1241. PIN6CTRL: byte; //Pin 6 Control
  1242. PIN7CTRL: byte; //Pin 7 Control
  1243. const
  1244. // Slew Rate Limit Enable
  1245. SRLbm = $01;
  1246. // PORT_ISC
  1247. ISCmask = $07;
  1248. ISC_INTDISABLE = $00;
  1249. ISC_BOTHEDGES = $01;
  1250. ISC_RISING = $02;
  1251. ISC_FALLING = $03;
  1252. ISC_INPUT_DISABLE = $04;
  1253. ISC_LEVEL = $05;
  1254. // Pullup enable
  1255. PULLUPENbm = $08;
  1256. // Inverted I/O Enable
  1257. INVENbm = $80;
  1258. end;
  1259. TPORTMUX = object //Port Multiplexer
  1260. EVSYSROUTEA: byte; //EVSYS route A
  1261. CCLROUTEA: byte; //CCL route A
  1262. USARTROUTEA: byte; //USART route A
  1263. Reserved3: byte;
  1264. SPIROUTEA: byte; //SPI route A
  1265. TWIROUTEA: byte; //TWI route A
  1266. TCAROUTEA: byte; //TCA route A
  1267. TCBROUTEA: byte; //TCB route A
  1268. TCDROUTEA: byte; //TCD route A
  1269. ACROUTEA: byte; //AC route A
  1270. ZCDROUTEA: byte; //ZCD route A
  1271. const
  1272. // PORTMUX_EVOUTA
  1273. EVOUTAmask = $01;
  1274. EVOUTA_DEFAULT = $00;
  1275. EVOUTA_ALT1 = $01;
  1276. // PORTMUX_EVOUTC
  1277. EVOUTCmask = $04;
  1278. EVOUTC_DEFAULT = $00;
  1279. // PORTMUX_EVOUTD
  1280. EVOUTDmask = $08;
  1281. EVOUTD_DEFAULT = $00;
  1282. EVOUTD_ALT1 = $08;
  1283. // PORTMUX_EVOUTF
  1284. EVOUTFmask = $20;
  1285. EVOUTF_DEFAULT = $00;
  1286. // PORTMUX_LUT0
  1287. LUT0mask = $01;
  1288. LUT0_DEFAULT = $00;
  1289. LUT0_ALT1 = $01;
  1290. // PORTMUX_LUT1
  1291. LUT1mask = $02;
  1292. LUT1_DEFAULT = $00;
  1293. LUT1_ALT1 = $02;
  1294. // PORTMUX_LUT2
  1295. LUT2mask = $04;
  1296. LUT2_DEFAULT = $00;
  1297. LUT2_ALT1 = $04;
  1298. // PORTMUX_LUT3
  1299. LUT3mask = $08;
  1300. LUT3_DEFAULT = $00;
  1301. // PORTMUX_USART0
  1302. USART0mask = $03;
  1303. USART0_DEFAULT = $00;
  1304. USART0_ALT1 = $01;
  1305. USART0_NONE = $03;
  1306. // PORTMUX_USART1
  1307. USART1mask = $0C;
  1308. USART1_DEFAULT = $00;
  1309. USART1_NONE = $0C;
  1310. // PORTMUX_USART2
  1311. USART2mask = $30;
  1312. USART2_DEFAULT = $00;
  1313. USART2_ALT1 = $10;
  1314. USART2_NONE = $30;
  1315. // PORTMUX_SPI0
  1316. SPI0mask = $03;
  1317. SPI0_DEFAULT = $00;
  1318. SPI0_NONE = $03;
  1319. // PORTMUX_SPI1
  1320. SPI1mask = $0C;
  1321. SPI1_DEFAULT = $00;
  1322. SPI1_NONE = $0C;
  1323. // PORTMUX_TWI0
  1324. TWI0mask = $03;
  1325. TWI0_DEFAULT = $00;
  1326. TWI0_ALT1 = $01;
  1327. TWI0_ALT2 = $02;
  1328. // PORTMUX_TWI1
  1329. TWI1mask = $0C;
  1330. TWI1_DEFAULT = $00;
  1331. TWI1_ALT1 = $04;
  1332. // PORTMUX_TCA0
  1333. TCA0mask = $07;
  1334. TCA0_PORTA = $00;
  1335. TCA0_PORTC = $02;
  1336. TCA0_PORTD = $03;
  1337. TCA0_PORTF = $05;
  1338. // PORTMUX_TCB0
  1339. TCB0mask = $01;
  1340. TCB0_DEFAULT = $00;
  1341. TCB0_ALT1 = $01;
  1342. // PORTMUX_TCB1
  1343. TCB1mask = $02;
  1344. TCB1_DEFAULT = $00;
  1345. TCB1_ALT1 = $02;
  1346. // PORTMUX_TCB2
  1347. TCB2mask = $04;
  1348. TCB2_DEFAULT = $00;
  1349. // PORTMUX_TCD0
  1350. TCD0mask = $07;
  1351. TCD0_DEFAULT = $00;
  1352. TCD0_ALT2 = $02;
  1353. // PORTMUX_AC0
  1354. AC0mask = $01;
  1355. AC0_DEFAULT = $00;
  1356. // PORTMUX_AC1
  1357. AC1mask = $02;
  1358. AC1_DEFAULT = $00;
  1359. // PORTMUX_AC2
  1360. AC2mask = $04;
  1361. AC2_DEFAULT = $00;
  1362. // PORTMUX_ZCD0
  1363. ZCD0mask = $01;
  1364. ZCD0_DEFAULT = $00;
  1365. end;
  1366. TRSTCTRL = object //Reset controller
  1367. RSTFR: byte; //Reset Flags
  1368. SWRR: byte; //Software Reset
  1369. const
  1370. // Power on Reset flag
  1371. PORFbm = $01;
  1372. // Brown out detector Reset flag
  1373. BORFbm = $02;
  1374. // External Reset flag
  1375. EXTRFbm = $04;
  1376. // Watch dog Reset flag
  1377. WDRFbm = $08;
  1378. // Software Reset flag
  1379. SWRFbm = $10;
  1380. // UPDI Reset flag
  1381. UPDIRFbm = $20;
  1382. // Software reset enable
  1383. SWRSTbm = $01;
  1384. end;
  1385. TRTC = object //Real-Time Counter
  1386. CTRLA: byte; //Control A
  1387. STATUS: byte; //Status
  1388. INTCTRL: byte; //Interrupt Control
  1389. INTFLAGS: byte; //Interrupt Flags
  1390. TEMP: byte; //Temporary
  1391. DBGCTRL: byte; //Debug control
  1392. CALIB: byte; //Calibration
  1393. CLKSEL: byte; //Clock Select
  1394. CNT: word; //Counter
  1395. PER: word; //Period
  1396. CMP: word; //Compare
  1397. Reserved14: byte;
  1398. Reserved15: byte;
  1399. PITCTRLA: byte; //PIT Control A
  1400. PITSTATUS: byte; //PIT Status
  1401. PITINTCTRL: byte; //PIT Interrupt Control
  1402. PITINTFLAGS: byte; //PIT Interrupt Flags
  1403. Reserved20: byte;
  1404. PITDBGCTRL: byte; //PIT Debug control
  1405. const
  1406. // Enable
  1407. RTCENbm = $01;
  1408. // Correction enable
  1409. CORRENbm = $04;
  1410. // RTC_PRESCALER
  1411. PRESCALERmask = $78;
  1412. PRESCALER_DIV1 = $00;
  1413. PRESCALER_DIV2 = $08;
  1414. PRESCALER_DIV4 = $10;
  1415. PRESCALER_DIV8 = $18;
  1416. PRESCALER_DIV16 = $20;
  1417. PRESCALER_DIV32 = $28;
  1418. PRESCALER_DIV64 = $30;
  1419. PRESCALER_DIV128 = $38;
  1420. PRESCALER_DIV256 = $40;
  1421. PRESCALER_DIV512 = $48;
  1422. PRESCALER_DIV1024 = $50;
  1423. PRESCALER_DIV2048 = $58;
  1424. PRESCALER_DIV4096 = $60;
  1425. PRESCALER_DIV8192 = $68;
  1426. PRESCALER_DIV16384 = $70;
  1427. PRESCALER_DIV32768 = $78;
  1428. // Run In Standby
  1429. RUNSTDBYbm = $80;
  1430. // CTRLA Synchronization Busy Flag
  1431. CTRLABUSYbm = $01;
  1432. // Count Synchronization Busy Flag
  1433. CNTBUSYbm = $02;
  1434. // Period Synchronization Busy Flag
  1435. PERBUSYbm = $04;
  1436. // Comparator Synchronization Busy Flag
  1437. CMPBUSYbm = $08;
  1438. // Overflow Interrupt enable
  1439. OVFbm = $01;
  1440. // Compare Match Interrupt enable
  1441. CMPbm = $02;
  1442. // Run in debug
  1443. DBGRUNbm = $01;
  1444. // Error Correction Value
  1445. ERROR0bm = $01;
  1446. ERROR1bm = $02;
  1447. ERROR2bm = $04;
  1448. ERROR3bm = $08;
  1449. ERROR4bm = $10;
  1450. ERROR5bm = $20;
  1451. ERROR6bm = $40;
  1452. // Error Correction Sign Bit
  1453. SIGNbm = $80;
  1454. // RTC_CLKSEL
  1455. CLKSELmask = $03;
  1456. CLKSEL_OSC32K = $00;
  1457. CLKSEL_OSC1K = $01;
  1458. CLKSEL_XOSC32K = $02;
  1459. CLKSEL_EXTCLK = $03;
  1460. // Enable
  1461. PITENbm = $01;
  1462. // RTC_PERIOD
  1463. PERIODmask = $78;
  1464. PERIOD_OFF = $00;
  1465. PERIOD_CYC4 = $08;
  1466. PERIOD_CYC8 = $10;
  1467. PERIOD_CYC16 = $18;
  1468. PERIOD_CYC32 = $20;
  1469. PERIOD_CYC64 = $28;
  1470. PERIOD_CYC128 = $30;
  1471. PERIOD_CYC256 = $38;
  1472. PERIOD_CYC512 = $40;
  1473. PERIOD_CYC1024 = $48;
  1474. PERIOD_CYC2048 = $50;
  1475. PERIOD_CYC4096 = $58;
  1476. PERIOD_CYC8192 = $60;
  1477. PERIOD_CYC16384 = $68;
  1478. PERIOD_CYC32768 = $70;
  1479. // CTRLA Synchronization Busy Flag
  1480. CTRLBUSYbm = $01;
  1481. // Periodic Interrupt
  1482. PIbm = $01;
  1483. end;
  1484. TSIGROW = object //Signature row
  1485. DEVICEID0: byte; //Device ID Byte 0
  1486. DEVICEID1: byte; //Device ID Byte 1
  1487. DEVICEID2: byte; //Device ID Byte 2
  1488. Reserved3: byte;
  1489. TEMPSENSE0: word; //Temperature Calibration 0
  1490. TEMPSENSE1: word; //Temperature Calibration 1
  1491. Reserved8: byte;
  1492. Reserved9: byte;
  1493. Reserved10: byte;
  1494. Reserved11: byte;
  1495. Reserved12: byte;
  1496. Reserved13: byte;
  1497. Reserved14: byte;
  1498. Reserved15: byte;
  1499. SERNUM0: byte; //LOTNUM0
  1500. SERNUM1: byte; //LOTNUM1
  1501. SERNUM2: byte; //LOTNUM2
  1502. SERNUM3: byte; //LOTNUM3
  1503. SERNUM4: byte; //LOTNUM4
  1504. SERNUM5: byte; //LOTNUM5
  1505. SERNUM6: byte; //RANDOM
  1506. SERNUM7: byte; //SCRIBE
  1507. SERNUM8: byte; //XPOS0
  1508. SERNUM9: byte; //XPOS1
  1509. SERNUM10: byte; //YPOS0
  1510. SERNUM11: byte; //YPOS1
  1511. SERNUM12: byte; //RES0
  1512. SERNUM13: byte; //RES1
  1513. SERNUM14: byte; //RES2
  1514. SERNUM15: byte; //RES3
  1515. end;
  1516. TSLPCTRL = object //Sleep Controller
  1517. CTRLA: byte; //Control A
  1518. VREGCTRL: byte; //Control B
  1519. const
  1520. // Sleep enable
  1521. SENbm = $01;
  1522. // SLPCTRL_SMODE
  1523. SMODEmask = $06;
  1524. SMODE_IDLE = $00;
  1525. SMODE_STDBY = $02;
  1526. SMODE_PDOWN = $04;
  1527. // SLPCTRL_PMODE
  1528. PMODEmask = $07;
  1529. PMODE_AUTO = $00;
  1530. PMODE_FULL = $01;
  1531. // SLPCTRL_HTLLEN
  1532. HTLLENmask = $10;
  1533. HTLLEN_OFF = $00;
  1534. HTLLEN_ON = $10;
  1535. end;
  1536. TSPI = object //Serial Peripheral Interface
  1537. CTRLA: byte; //Control A
  1538. CTRLB: byte; //Control B
  1539. INTCTRL: byte; //Interrupt Control
  1540. INTFLAGS: byte; //Interrupt Flags
  1541. DATA: byte; //Data
  1542. const
  1543. // Enable Module
  1544. ENABLEbm = $01;
  1545. // SPI_PRESC
  1546. PRESCmask = $06;
  1547. PRESC_DIV4 = $00;
  1548. PRESC_DIV16 = $02;
  1549. PRESC_DIV64 = $04;
  1550. PRESC_DIV128 = $06;
  1551. // Enable Double Speed
  1552. CLK2Xbm = $10;
  1553. // Host Operation Enable
  1554. MASTERbm = $20;
  1555. // Data Order Setting
  1556. DORDbm = $40;
  1557. // SPI_MODE
  1558. MODEmask = $03;
  1559. MODE_0 = $00;
  1560. MODE_1 = $01;
  1561. MODE_2 = $02;
  1562. MODE_3 = $03;
  1563. // SPI Select Disable
  1564. SSDbm = $04;
  1565. // Buffer Mode Wait for Receive
  1566. BUFWRbm = $40;
  1567. // Buffer Mode Enable
  1568. BUFENbm = $80;
  1569. // Interrupt Enable
  1570. IEbm = $01;
  1571. // SPI Select Trigger Interrupt Enable
  1572. SSIEbm = $10;
  1573. // Data Register Empty Interrupt Enable
  1574. DREIEbm = $20;
  1575. // Transfer Complete Interrupt Enable
  1576. TXCIEbm = $40;
  1577. // Receive Complete Interrupt Enable
  1578. RXCIEbm = $80;
  1579. end;
  1580. TSYSCFG = object //System Configuration Registers
  1581. Reserved0: byte;
  1582. REVID: byte; //Revision ID
  1583. Reserved2: byte;
  1584. Reserved3: byte;
  1585. Reserved4: byte;
  1586. Reserved5: byte;
  1587. Reserved6: byte;
  1588. Reserved7: byte;
  1589. Reserved8: byte;
  1590. Reserved9: byte;
  1591. Reserved10: byte;
  1592. Reserved11: byte;
  1593. Reserved12: byte;
  1594. Reserved13: byte;
  1595. Reserved14: byte;
  1596. Reserved15: byte;
  1597. Reserved16: byte;
  1598. Reserved17: byte;
  1599. Reserved18: byte;
  1600. Reserved19: byte;
  1601. Reserved20: byte;
  1602. Reserved21: byte;
  1603. Reserved22: byte;
  1604. Reserved23: byte;
  1605. OCDMCTRL: byte; //OCD Message Control
  1606. OCDMSTATUS: byte; //OCD Message Status
  1607. const
  1608. // OCD Message Read
  1609. OCDMRbm = $01;
  1610. end;
  1611. TTCA = object //16-bit Timer/Counter Type A
  1612. end;
  1613. TTCB = object //16-bit Timer Type B
  1614. CTRLA: byte; //Control A
  1615. CTRLB: byte; //Control Register B
  1616. Reserved2: byte;
  1617. Reserved3: byte;
  1618. EVCTRL: byte; //Event Control
  1619. INTCTRL: byte; //Interrupt Control
  1620. INTFLAGS: byte; //Interrupt Flags
  1621. STATUS: byte; //Status
  1622. DBGCTRL: byte; //Debug Control
  1623. TEMP: byte; //Temporary Value
  1624. CNT: word; //Count
  1625. CCMP: word; //Compare or Capture
  1626. const
  1627. // Enable
  1628. ENABLEbm = $01;
  1629. // TCB_CLKSEL
  1630. CLKSELmask = $0E;
  1631. CLKSEL_DIV1 = $00;
  1632. CLKSEL_DIV2 = $02;
  1633. CLKSEL_TCA0 = $04;
  1634. CLKSEL_EVENT = $0E;
  1635. // Synchronize Update
  1636. SYNCUPDbm = $10;
  1637. // Cascade two timers
  1638. CASCADEbm = $20;
  1639. // Run Standby
  1640. RUNSTDBYbm = $40;
  1641. // TCB_CNTMODE
  1642. CNTMODEmask = $07;
  1643. CNTMODE_INT = $00;
  1644. CNTMODE_TIMEOUT = $01;
  1645. CNTMODE_CAPT = $02;
  1646. CNTMODE_FRQ = $03;
  1647. CNTMODE_PW = $04;
  1648. CNTMODE_FRQPW = $05;
  1649. CNTMODE_SINGLE = $06;
  1650. CNTMODE_PWM8 = $07;
  1651. // Pin Output Enable
  1652. CCMPENbm = $10;
  1653. // Pin Initial State
  1654. CCMPINITbm = $20;
  1655. // Asynchronous Enable
  1656. ASYNCbm = $40;
  1657. // Event Input Enable
  1658. CAPTEIbm = $01;
  1659. // Event Edge
  1660. EDGEbm = $10;
  1661. // Input Capture Noise Cancellation Filter
  1662. FILTERbm = $40;
  1663. // Capture or Timeout
  1664. CAPTbm = $01;
  1665. // Overflow
  1666. OVFbm = $02;
  1667. // Run
  1668. RUNbm = $01;
  1669. // Debug Run
  1670. DBGRUNbm = $01;
  1671. end;
  1672. TTCD = object //Timer Counter D
  1673. CTRLA: byte; //Control A
  1674. CTRLB: byte; //Control B
  1675. CTRLC: byte; //Control C
  1676. CTRLD: byte; //Control D
  1677. CTRLE: byte; //Control E
  1678. Reserved5: byte;
  1679. Reserved6: byte;
  1680. Reserved7: byte;
  1681. EVCTRLA: byte; //EVCTRLA
  1682. EVCTRLB: byte; //EVCTRLB
  1683. Reserved10: byte;
  1684. Reserved11: byte;
  1685. INTCTRL: byte; //Interrupt Control
  1686. INTFLAGS: byte; //Interrupt Flags
  1687. STATUS: byte; //Status
  1688. Reserved15: byte;
  1689. INPUTCTRLA: byte; //Input Control A
  1690. INPUTCTRLB: byte; //Input Control B
  1691. FAULTCTRL: byte; //Fault Control
  1692. Reserved19: byte;
  1693. DLYCTRL: byte; //Delay Control
  1694. DLYVAL: byte; //Delay value
  1695. Reserved22: byte;
  1696. Reserved23: byte;
  1697. DITCTRL: byte; //Dither Control A
  1698. DITVAL: byte; //Dither value
  1699. Reserved26: byte;
  1700. Reserved27: byte;
  1701. Reserved28: byte;
  1702. Reserved29: byte;
  1703. DBGCTRL: byte; //Debug Control
  1704. Reserved31: byte;
  1705. Reserved32: byte;
  1706. Reserved33: byte;
  1707. CAPTUREA: word; //Capture A
  1708. CAPTUREB: word; //Capture B
  1709. Reserved38: byte;
  1710. Reserved39: byte;
  1711. CMPASET: word; //Compare A Set
  1712. CMPACLR: word; //Compare A Clear
  1713. CMPBSET: word; //Compare B Set
  1714. CMPBCLR: word; //Compare B Clear
  1715. const
  1716. // Enable
  1717. ENABLEbm = $01;
  1718. // TCD_SYNCPRES
  1719. SYNCPRESmask = $06;
  1720. SYNCPRES_DIV1 = $00;
  1721. SYNCPRES_DIV2 = $02;
  1722. SYNCPRES_DIV4 = $04;
  1723. SYNCPRES_DIV8 = $06;
  1724. // TCD_CNTPRES
  1725. CNTPRESmask = $18;
  1726. CNTPRES_DIV1 = $00;
  1727. CNTPRES_DIV4 = $08;
  1728. CNTPRES_DIV32 = $10;
  1729. // TCD_CLKSEL
  1730. CLKSELmask = $60;
  1731. CLKSEL_OSCHF = $00;
  1732. CLKSEL_PLL = $20;
  1733. CLKSEL_EXTCLK = $40;
  1734. CLKSEL_CLKPER = $60;
  1735. // TCD_WGMODE
  1736. WGMODEmask = $03;
  1737. WGMODE_ONERAMP = $00;
  1738. WGMODE_TWORAMP = $01;
  1739. WGMODE_FOURRAMP = $02;
  1740. WGMODE_DS = $03;
  1741. // Compare output value override
  1742. CMPOVRbm = $01;
  1743. // Auto update
  1744. AUPDATEbm = $02;
  1745. // Fifty percent waveform
  1746. FIFTYbm = $08;
  1747. // TCD_CMPCSEL
  1748. CMPCSELmask = $40;
  1749. CMPCSEL_PWMA = $00;
  1750. CMPCSEL_PWMB = $40;
  1751. // TCD_CMPDSEL
  1752. CMPDSELmask = $80;
  1753. CMPDSEL_PWMA = $00;
  1754. CMPDSEL_PWMB = $80;
  1755. // Compare A value
  1756. CMPAVAL0bm = $01;
  1757. CMPAVAL1bm = $02;
  1758. CMPAVAL2bm = $04;
  1759. CMPAVAL3bm = $08;
  1760. // Compare B value
  1761. CMPBVAL0bm = $10;
  1762. CMPBVAL1bm = $20;
  1763. CMPBVAL2bm = $40;
  1764. CMPBVAL3bm = $80;
  1765. // Synchronize end of cycle strobe
  1766. SYNCEOCbm = $01;
  1767. // synchronize strobe
  1768. SYNCbm = $02;
  1769. // Restart strobe
  1770. RESTARTbm = $04;
  1771. // Software Capture A Strobe
  1772. SCAPTUREAbm = $08;
  1773. // Software Capture B Strobe
  1774. SCAPTUREBbm = $10;
  1775. // Disable at end of cycle
  1776. DISEOCbm = $80;
  1777. // Trigger event enable
  1778. TRIGEIbm = $01;
  1779. // TCD_ACTION
  1780. ACTIONmask = $04;
  1781. ACTION_FAULT = $00;
  1782. ACTION_CAPTURE = $04;
  1783. // TCD_EDGE
  1784. EDGEmask = $10;
  1785. EDGE_FALL_LOW = $00;
  1786. EDGE_RISE_HIGH = $10;
  1787. // TCD_CFG
  1788. CFGmask = $C0;
  1789. CFG_NEITHER = $00;
  1790. CFG_FILTER = $40;
  1791. CFG_ASYNC = $80;
  1792. // Overflow interrupt enable
  1793. OVFbm = $01;
  1794. // Trigger A interrupt enable
  1795. TRIGAbm = $04;
  1796. // Trigger B interrupt enable
  1797. TRIGBbm = $08;
  1798. // Enable ready
  1799. ENRDYbm = $01;
  1800. // Command ready
  1801. CMDRDYbm = $02;
  1802. // PWM activity on A
  1803. PWMACTAbm = $40;
  1804. // PWM activity on B
  1805. PWMACTBbm = $80;
  1806. // TCD_INPUTMODE
  1807. INPUTMODEmask = $0F;
  1808. INPUTMODE_NONE = $00;
  1809. INPUTMODE_JMPWAIT = $01;
  1810. INPUTMODE_EXECWAIT = $02;
  1811. INPUTMODE_EXECFAULT = $03;
  1812. INPUTMODE_FREQ = $04;
  1813. INPUTMODE_EXECDT = $05;
  1814. INPUTMODE_WAIT = $06;
  1815. INPUTMODE_WAITSW = $07;
  1816. INPUTMODE_EDGETRIG = $08;
  1817. INPUTMODE_EDGETRIGFREQ = $09;
  1818. INPUTMODE_LVLTRIGFREQ = $0A;
  1819. // Compare A value
  1820. CMPAbm = $01;
  1821. // Compare B value
  1822. CMPBbm = $02;
  1823. // Compare C value
  1824. CMPCbm = $04;
  1825. // Compare D vaule
  1826. CMPDbm = $08;
  1827. // Compare A enable
  1828. CMPAENbm = $10;
  1829. // Compare B enable
  1830. CMPBENbm = $20;
  1831. // Compare C enable
  1832. CMPCENbm = $40;
  1833. // Compare D enable
  1834. CMPDENbm = $80;
  1835. // TCD_DLYSEL
  1836. DLYSELmask = $03;
  1837. DLYSEL_OFF = $00;
  1838. DLYSEL_INBLANK = $01;
  1839. DLYSEL_EVENT = $02;
  1840. // TCD_DLYTRIG
  1841. DLYTRIGmask = $0C;
  1842. DLYTRIG_CMPASET = $00;
  1843. DLYTRIG_CMPACLR = $04;
  1844. DLYTRIG_CMPBSET = $08;
  1845. DLYTRIG_CMPBCLR = $0C;
  1846. // TCD_DLYPRESC
  1847. DLYPRESCmask = $30;
  1848. DLYPRESC_DIV1 = $00;
  1849. DLYPRESC_DIV2 = $10;
  1850. DLYPRESC_DIV4 = $20;
  1851. DLYPRESC_DIV8 = $30;
  1852. // TCD_DITHERSEL
  1853. DITHERSELmask = $03;
  1854. DITHERSEL_ONTIMEB = $00;
  1855. DITHERSEL_ONTIMEAB = $01;
  1856. DITHERSEL_DEADTIMEB = $02;
  1857. DITHERSEL_DEADTIMEAB = $03;
  1858. // Dither value
  1859. DITHER0bm = $01;
  1860. DITHER1bm = $02;
  1861. DITHER2bm = $04;
  1862. DITHER3bm = $08;
  1863. // Debug run
  1864. DBGRUNbm = $01;
  1865. // Fault detection
  1866. FAULTDETbm = $04;
  1867. end;
  1868. TTWI = object //Two-Wire Interface
  1869. CTRLA: byte; //Control A
  1870. DUALCTRL: byte; //Dual Control
  1871. DBGCTRL: byte; //Debug Control Register
  1872. MCTRLA: byte; //Host Control A
  1873. MCTRLB: byte; //Host Control B
  1874. MSTATUS: byte; //Host Status
  1875. MBAUD: byte; //Host Baud Rate Control
  1876. MADDR: byte; //Host Address
  1877. MDATA: byte; //Host Data
  1878. SCTRLA: byte; //Client Control A
  1879. SCTRLB: byte; //Client Control B
  1880. SSTATUS: byte; //Client Status
  1881. SADDR: byte; //Client Address
  1882. SDATA: byte; //Client Data
  1883. SADDRMASK: byte; //Client Address Mask
  1884. const
  1885. // TWI_FMPEN
  1886. FMPENmask = $02;
  1887. FMPEN_OFF = $00;
  1888. FMPEN_ON = $02;
  1889. // TWI_SDAHOLD
  1890. SDAHOLDmask = $0C;
  1891. SDAHOLD_OFF = $00;
  1892. SDAHOLD_50NS = $04;
  1893. SDAHOLD_300NS = $08;
  1894. SDAHOLD_500NS = $0C;
  1895. // TWI_SDASETUP
  1896. SDASETUPmask = $10;
  1897. SDASETUP_4CYC = $00;
  1898. SDASETUP_8CYC = $10;
  1899. // TWI_INPUTLVL
  1900. INPUTLVLmask = $40;
  1901. INPUTLVL_I2C = $00;
  1902. INPUTLVL_SMBUS = $40;
  1903. // Dual Control Enable
  1904. ENABLEbm = $01;
  1905. // Debug Run
  1906. DBGRUNbm = $01;
  1907. // Smart Mode Enable
  1908. SMENbm = $02;
  1909. // TWI_TIMEOUT
  1910. TIMEOUTmask = $0C;
  1911. TIMEOUT_DISABLED = $00;
  1912. TIMEOUT_50US = $04;
  1913. TIMEOUT_100US = $08;
  1914. TIMEOUT_200US = $0C;
  1915. // Quick Command Enable
  1916. QCENbm = $10;
  1917. // Write Interrupt Enable
  1918. WIENbm = $40;
  1919. // Read Interrupt Enable
  1920. RIENbm = $80;
  1921. // TWI_MCMD
  1922. MCMDmask = $03;
  1923. MCMD_NOACT = $00;
  1924. MCMD_REPSTART = $01;
  1925. MCMD_RECVTRANS = $02;
  1926. MCMD_STOP = $03;
  1927. // TWI_ACKACT
  1928. ACKACTmask = $04;
  1929. ACKACT_ACK = $00;
  1930. ACKACT_NACK = $04;
  1931. // Flush
  1932. FLUSHbm = $08;
  1933. // TWI_BUSSTATE
  1934. BUSSTATEmask = $03;
  1935. BUSSTATE_UNKNOWN = $00;
  1936. BUSSTATE_IDLE = $01;
  1937. BUSSTATE_OWNER = $02;
  1938. BUSSTATE_BUSY = $03;
  1939. // Bus Error
  1940. BUSERRbm = $04;
  1941. // Arbitration Lost
  1942. ARBLOSTbm = $08;
  1943. // Received Acknowledge
  1944. RXACKbm = $10;
  1945. // Clock Hold
  1946. CLKHOLDbm = $20;
  1947. // Write Interrupt Flag
  1948. WIFbm = $40;
  1949. // Read Interrupt Flag
  1950. RIFbm = $80;
  1951. // Promiscuous Mode Enable
  1952. PMENbm = $04;
  1953. // Stop Interrupt Enable
  1954. PIENbm = $20;
  1955. // Address/Stop Interrupt Enable
  1956. APIENbm = $40;
  1957. // Data Interrupt Enable
  1958. DIENbm = $80;
  1959. // TWI_SCMD
  1960. SCMDmask = $03;
  1961. SCMD_NOACT = $00;
  1962. SCMD_COMPTRANS = $02;
  1963. SCMD_RESPONSE = $03;
  1964. // TWI_AP
  1965. APmask = $01;
  1966. AP_STOP = $00;
  1967. AP_ADR = $01;
  1968. // Read/Write Direction
  1969. DIRbm = $02;
  1970. // Collision
  1971. COLLbm = $08;
  1972. // Address/Stop Interrupt Flag
  1973. APIFbm = $40;
  1974. // Data Interrupt Flag
  1975. DIFbm = $80;
  1976. // Address Enable
  1977. ADDRENbm = $01;
  1978. // Address Mask
  1979. ADDRMASK0bm = $02;
  1980. ADDRMASK1bm = $04;
  1981. ADDRMASK2bm = $08;
  1982. ADDRMASK3bm = $10;
  1983. ADDRMASK4bm = $20;
  1984. ADDRMASK5bm = $40;
  1985. ADDRMASK6bm = $80;
  1986. end;
  1987. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1988. RXDATAL: byte; //Receive Data Low Byte
  1989. RXDATAH: byte; //Receive Data High Byte
  1990. TXDATAL: byte; //Transmit Data Low Byte
  1991. TXDATAH: byte; //Transmit Data High Byte
  1992. STATUS: byte; //Status
  1993. CTRLA: byte; //Control A
  1994. CTRLB: byte; //Control B
  1995. CTRLC: byte; //Control C
  1996. BAUD: word; //Baud Rate
  1997. CTRLD: byte; //Control D
  1998. DBGCTRL: byte; //Debug Control
  1999. EVCTRL: byte; //Event Control
  2000. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  2001. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  2002. const
  2003. // Receiver Data Register
  2004. DATA8bm = $01;
  2005. // Parity Error
  2006. PERRbm = $02;
  2007. // Frame Error
  2008. FERRbm = $04;
  2009. // Buffer Overflow
  2010. BUFOVFbm = $40;
  2011. // Receive Complete Interrupt Flag
  2012. RXCIFbm = $80;
  2013. // Wait For Break
  2014. WFBbm = $01;
  2015. // Break Detected Flag
  2016. BDFbm = $02;
  2017. // Inconsistent Sync Field Interrupt Flag
  2018. ISFIFbm = $08;
  2019. // Receive Start Interrupt
  2020. RXSIFbm = $10;
  2021. // Data Register Empty Flag
  2022. DREIFbm = $20;
  2023. // Transmit Interrupt Flag
  2024. TXCIFbm = $40;
  2025. // USART_RS485
  2026. RS485mask = $01;
  2027. RS485_DISABLE = $00;
  2028. RS485_ENABLE = $01;
  2029. // Auto-baud Error Interrupt Enable
  2030. ABEIEbm = $04;
  2031. // Loop-back Mode Enable
  2032. LBMEbm = $08;
  2033. // Receiver Start Frame Interrupt Enable
  2034. RXSIEbm = $10;
  2035. // Data Register Empty Interrupt Enable
  2036. DREIEbm = $20;
  2037. // Transmit Complete Interrupt Enable
  2038. TXCIEbm = $40;
  2039. // Receive Complete Interrupt Enable
  2040. RXCIEbm = $80;
  2041. // Multi-processor Communication Mode
  2042. MPCMbm = $01;
  2043. // USART_RXMODE
  2044. RXMODEmask = $06;
  2045. RXMODE_NORMAL = $00;
  2046. RXMODE_CLK2X = $02;
  2047. RXMODE_GENAUTO = $04;
  2048. RXMODE_LINAUTO = $06;
  2049. // Open Drain Mode Enable
  2050. ODMEbm = $08;
  2051. // Start Frame Detection Enable
  2052. SFDENbm = $10;
  2053. // Transmitter Enable
  2054. TXENbm = $40;
  2055. // Reciever enable
  2056. RXENbm = $80;
  2057. // USART_ABW
  2058. ABWmask = $C0;
  2059. ABW_WDW0 = $00;
  2060. ABW_WDW1 = $40;
  2061. ABW_WDW2 = $80;
  2062. ABW_WDW3 = $C0;
  2063. // Debug Run
  2064. DBGRUNbm = $01;
  2065. // IrDA Event Input Enable
  2066. IREIbm = $01;
  2067. // Receiver Pulse Lenght
  2068. RXPL0bm = $01;
  2069. RXPL1bm = $02;
  2070. RXPL2bm = $04;
  2071. RXPL3bm = $08;
  2072. RXPL4bm = $10;
  2073. RXPL5bm = $20;
  2074. RXPL6bm = $40;
  2075. end;
  2076. TUSERROW = object //User Row
  2077. USERROW0: byte; //User Row Byte 0
  2078. USERROW1: byte; //User Row Byte 1
  2079. USERROW2: byte; //User Row Byte 2
  2080. USERROW3: byte; //User Row Byte 3
  2081. USERROW4: byte; //User Row Byte 4
  2082. USERROW5: byte; //User Row Byte 5
  2083. USERROW6: byte; //User Row Byte 6
  2084. USERROW7: byte; //User Row Byte 7
  2085. USERROW8: byte; //User Row Byte 8
  2086. USERROW9: byte; //User Row Byte 9
  2087. USERROW10: byte; //User Row Byte 10
  2088. USERROW11: byte; //User Row Byte 11
  2089. USERROW12: byte; //User Row Byte 12
  2090. USERROW13: byte; //User Row Byte 13
  2091. USERROW14: byte; //User Row Byte 14
  2092. USERROW15: byte; //User Row Byte 15
  2093. USERROW16: byte; //User Row Byte 16
  2094. USERROW17: byte; //User Row Byte 17
  2095. USERROW18: byte; //User Row Byte 18
  2096. USERROW19: byte; //User Row Byte 19
  2097. USERROW20: byte; //User Row Byte 20
  2098. USERROW21: byte; //User Row Byte 21
  2099. USERROW22: byte; //User Row Byte 22
  2100. USERROW23: byte; //User Row Byte 23
  2101. USERROW24: byte; //User Row Byte 24
  2102. USERROW25: byte; //User Row Byte 25
  2103. USERROW26: byte; //User Row Byte 26
  2104. USERROW27: byte; //User Row Byte 27
  2105. USERROW28: byte; //User Row Byte 28
  2106. USERROW29: byte; //User Row Byte 29
  2107. USERROW30: byte; //User Row Byte 30
  2108. USERROW31: byte; //User Row Byte 31
  2109. end;
  2110. TVPORT = object //Virtual Ports
  2111. DIR: byte; //Data Direction
  2112. OUT_: byte; //Output Value
  2113. IN_: byte; //Input Value
  2114. INTFLAGS: byte; //Interrupt Flags
  2115. end;
  2116. TVREF = object //Voltage reference
  2117. ADC0REF: byte; //ADC0 Reference
  2118. Reserved1: byte;
  2119. DAC0REF: byte; //DAC0 Reference
  2120. Reserved3: byte;
  2121. ACREF: byte; //AC Reference
  2122. const
  2123. // VREF_REFSEL
  2124. REFSELmask = $07;
  2125. REFSEL_1V024 = $00;
  2126. REFSEL_2V048 = $01;
  2127. REFSEL_4V096 = $02;
  2128. REFSEL_2V500 = $03;
  2129. REFSEL_VDD = $05;
  2130. REFSEL_VREFA = $06;
  2131. // Always on
  2132. ALWAYSONbm = $80;
  2133. end;
  2134. TWDT = object //Watch-Dog Timer
  2135. CTRLA: byte; //Control A
  2136. STATUS: byte; //Status
  2137. const
  2138. // WDT_PERIOD
  2139. PERIODmask = $0F;
  2140. PERIOD_OFF = $00;
  2141. PERIOD_8CLK = $01;
  2142. PERIOD_16CLK = $02;
  2143. PERIOD_32CLK = $03;
  2144. PERIOD_64CLK = $04;
  2145. PERIOD_128CLK = $05;
  2146. PERIOD_256CLK = $06;
  2147. PERIOD_512CLK = $07;
  2148. PERIOD_1KCLK = $08;
  2149. PERIOD_2KCLK = $09;
  2150. PERIOD_4KCLK = $0A;
  2151. PERIOD_8KCLK = $0B;
  2152. // WDT_WINDOW
  2153. WINDOWmask = $F0;
  2154. WINDOW_OFF = $00;
  2155. WINDOW_8CLK = $10;
  2156. WINDOW_16CLK = $20;
  2157. WINDOW_32CLK = $30;
  2158. WINDOW_64CLK = $40;
  2159. WINDOW_128CLK = $50;
  2160. WINDOW_256CLK = $60;
  2161. WINDOW_512CLK = $70;
  2162. WINDOW_1KCLK = $80;
  2163. WINDOW_2KCLK = $90;
  2164. WINDOW_4KCLK = $A0;
  2165. WINDOW_8KCLK = $B0;
  2166. // Syncronization busy
  2167. SYNCBUSYbm = $01;
  2168. // Lock enable
  2169. LOCKbm = $80;
  2170. end;
  2171. TZCD = object //Zero Cross Detect
  2172. CTRLA: byte; //Control A
  2173. Reserved1: byte;
  2174. INTCTRL: byte; //Interrupt Control
  2175. STATUS: byte; //Status
  2176. const
  2177. // Enable
  2178. ENABLEbm = $01;
  2179. // Invert signal from pin
  2180. INVERTbm = $08;
  2181. // Output Pad Enable
  2182. OUTENbm = $40;
  2183. // Run in Standby Mode
  2184. RUNSTDBYbm = $80;
  2185. // ZCD_INTMODE
  2186. INTMODEmask = $03;
  2187. INTMODE_NONE = $00;
  2188. INTMODE_RISING = $01;
  2189. INTMODE_FALLING = $02;
  2190. INTMODE_BOTH = $03;
  2191. // ZCD Interrupt Flag
  2192. CROSSIFbm = $01;
  2193. // ZCD_STATE
  2194. STATEmask = $10;
  2195. STATE_LOW = $00;
  2196. STATE_HIGH = $10;
  2197. end;
  2198. const
  2199. Pin0idx = 0; Pin0bm = 1;
  2200. Pin1idx = 1; Pin1bm = 2;
  2201. Pin2idx = 2; Pin2bm = 4;
  2202. Pin3idx = 3; Pin3bm = 8;
  2203. Pin4idx = 4; Pin4bm = 16;
  2204. Pin5idx = 5; Pin5bm = 32;
  2205. Pin6idx = 6; Pin6bm = 64;
  2206. Pin7idx = 7; Pin7bm = 128;
  2207. var
  2208. VPORTA: TVPORT absolute $0000;
  2209. VPORTC: TVPORT absolute $0008;
  2210. VPORTD: TVPORT absolute $000C;
  2211. VPORTF: TVPORT absolute $0014;
  2212. GPR: TGPR absolute $001C;
  2213. CPU: TCPU absolute $0030;
  2214. RSTCTRL: TRSTCTRL absolute $0040;
  2215. SLPCTRL: TSLPCTRL absolute $0050;
  2216. CLKCTRL: TCLKCTRL absolute $0060;
  2217. BOD: TBOD absolute $0080;
  2218. VREF: TVREF absolute $00A0;
  2219. WDT: TWDT absolute $0100;
  2220. CPUINT: TCPUINT absolute $0110;
  2221. CRCSCAN: TCRCSCAN absolute $0120;
  2222. RTC: TRTC absolute $0140;
  2223. CCL: TCCL absolute $01C0;
  2224. EVSYS: TEVSYS absolute $0200;
  2225. PORTA: TPORT absolute $0400;
  2226. PORTC: TPORT absolute $0440;
  2227. PORTD: TPORT absolute $0460;
  2228. PORTF: TPORT absolute $04A0;
  2229. PORTMUX: TPORTMUX absolute $05E0;
  2230. ADC0: TADC absolute $0600;
  2231. AC0: TAC absolute $0680;
  2232. AC1: TAC absolute $0688;
  2233. AC2: TAC absolute $0690;
  2234. DAC0: TDAC absolute $06A0;
  2235. ZCD0: TZCD absolute $06C0;
  2236. USART0: TUSART absolute $0800;
  2237. USART1: TUSART absolute $0820;
  2238. USART2: TUSART absolute $0840;
  2239. TWI0: TTWI absolute $0900;
  2240. TWI1: TTWI absolute $0920;
  2241. SPI0: TSPI absolute $0940;
  2242. SPI1: TSPI absolute $0960;
  2243. TCA0: TTCA absolute $0A00;
  2244. TCB0: TTCB absolute $0B00;
  2245. TCB1: TTCB absolute $0B10;
  2246. TCB2: TTCB absolute $0B20;
  2247. TCD0: TTCD absolute $0B80;
  2248. SYSCFG: TSYSCFG absolute $0F00;
  2249. NVMCTRL: TNVMCTRL absolute $1000;
  2250. LOCK: TLOCK absolute $1040;
  2251. FUSE: TFUSE absolute $1050;
  2252. USERROW: TUSERROW absolute $1080;
  2253. SIGROW: TSIGROW absolute $1100;
  2254. implementation
  2255. {$i avrcommon.inc}
  2256. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  2257. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  2258. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 3
  2259. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 4
  2260. procedure CCL_CCL_ISR; external name 'CCL_CCL_ISR'; // Interrupt 5
  2261. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 6
  2262. procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 7
  2263. //procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 7
  2264. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 8
  2265. procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 9
  2266. //procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 9
  2267. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 10
  2268. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 10
  2269. procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 11
  2270. //procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 11
  2271. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 12
  2272. procedure TCB1_INT_ISR; external name 'TCB1_INT_ISR'; // Interrupt 13
  2273. procedure TCD0_OVF_ISR; external name 'TCD0_OVF_ISR'; // Interrupt 14
  2274. procedure TCD0_TRIG_ISR; external name 'TCD0_TRIG_ISR'; // Interrupt 15
  2275. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 16
  2276. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 17
  2277. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 18
  2278. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 19
  2279. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 20
  2280. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 21
  2281. procedure PORTD_PORT_ISR; external name 'PORTD_PORT_ISR'; // Interrupt 22
  2282. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 23
  2283. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 24
  2284. procedure ADC0_WCMP_ISR; external name 'ADC0_WCMP_ISR'; // Interrupt 25
  2285. procedure ZCD0_ZCD_ISR; external name 'ZCD0_ZCD_ISR'; // Interrupt 26
  2286. procedure PTC_PTC_ISR; external name 'PTC_PTC_ISR'; // Interrupt 27
  2287. procedure AC1_AC_ISR; external name 'AC1_AC_ISR'; // Interrupt 28
  2288. procedure PORTC_PORT_ISR; external name 'PORTC_PORT_ISR'; // Interrupt 29
  2289. procedure TCB2_INT_ISR; external name 'TCB2_INT_ISR'; // Interrupt 30
  2290. procedure USART1_RXC_ISR; external name 'USART1_RXC_ISR'; // Interrupt 31
  2291. procedure USART1_DRE_ISR; external name 'USART1_DRE_ISR'; // Interrupt 32
  2292. procedure USART1_TXC_ISR; external name 'USART1_TXC_ISR'; // Interrupt 33
  2293. procedure PORTF_PORT_ISR; external name 'PORTF_PORT_ISR'; // Interrupt 34
  2294. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 35
  2295. procedure SPI1_INT_ISR; external name 'SPI1_INT_ISR'; // Interrupt 36
  2296. procedure USART2_RXC_ISR; external name 'USART2_RXC_ISR'; // Interrupt 37
  2297. procedure USART2_DRE_ISR; external name 'USART2_DRE_ISR'; // Interrupt 38
  2298. procedure USART2_TXC_ISR; external name 'USART2_TXC_ISR'; // Interrupt 39
  2299. procedure AC2_AC_ISR; external name 'AC2_AC_ISR'; // Interrupt 40
  2300. procedure TWI1_TWIS_ISR; external name 'TWI1_TWIS_ISR'; // Interrupt 42
  2301. procedure TWI1_TWIM_ISR; external name 'TWI1_TWIM_ISR'; // Interrupt 43
  2302. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  2303. asm
  2304. jmp __dtors_end
  2305. jmp CRCSCAN_NMI_ISR
  2306. jmp BOD_VLM_ISR
  2307. jmp RTC_CNT_ISR
  2308. jmp RTC_PIT_ISR
  2309. jmp CCL_CCL_ISR
  2310. jmp PORTA_PORT_ISR
  2311. jmp TCA0_LUNF_ISR
  2312. // jmp TCA0_OVF_ISR
  2313. jmp TCA0_HUNF_ISR
  2314. jmp TCA0_CMP0_ISR
  2315. // jmp TCA0_LCMP0_ISR
  2316. jmp TCA0_CMP1_ISR
  2317. // jmp TCA0_LCMP1_ISR
  2318. jmp TCA0_CMP2_ISR
  2319. // jmp TCA0_LCMP2_ISR
  2320. jmp TCB0_INT_ISR
  2321. jmp TCB1_INT_ISR
  2322. jmp TCD0_OVF_ISR
  2323. jmp TCD0_TRIG_ISR
  2324. jmp TWI0_TWIS_ISR
  2325. jmp TWI0_TWIM_ISR
  2326. jmp SPI0_INT_ISR
  2327. jmp USART0_RXC_ISR
  2328. jmp USART0_DRE_ISR
  2329. jmp USART0_TXC_ISR
  2330. jmp PORTD_PORT_ISR
  2331. jmp AC0_AC_ISR
  2332. jmp ADC0_RESRDY_ISR
  2333. jmp ADC0_WCMP_ISR
  2334. jmp ZCD0_ZCD_ISR
  2335. jmp PTC_PTC_ISR
  2336. jmp AC1_AC_ISR
  2337. jmp PORTC_PORT_ISR
  2338. jmp TCB2_INT_ISR
  2339. jmp USART1_RXC_ISR
  2340. jmp USART1_DRE_ISR
  2341. jmp USART1_TXC_ISR
  2342. jmp PORTF_PORT_ISR
  2343. jmp NVMCTRL_EE_ISR
  2344. jmp SPI1_INT_ISR
  2345. jmp USART2_RXC_ISR
  2346. jmp USART2_DRE_ISR
  2347. jmp USART2_TXC_ISR
  2348. jmp AC2_AC_ISR
  2349. jmp TWI1_TWIS_ISR
  2350. jmp TWI1_TWIM_ISR
  2351. .weak CRCSCAN_NMI_ISR
  2352. .weak BOD_VLM_ISR
  2353. .weak RTC_CNT_ISR
  2354. .weak RTC_PIT_ISR
  2355. .weak CCL_CCL_ISR
  2356. .weak PORTA_PORT_ISR
  2357. .weak TCA0_LUNF_ISR
  2358. // .weak TCA0_OVF_ISR
  2359. .weak TCA0_HUNF_ISR
  2360. .weak TCA0_CMP0_ISR
  2361. // .weak TCA0_LCMP0_ISR
  2362. .weak TCA0_CMP1_ISR
  2363. // .weak TCA0_LCMP1_ISR
  2364. .weak TCA0_CMP2_ISR
  2365. // .weak TCA0_LCMP2_ISR
  2366. .weak TCB0_INT_ISR
  2367. .weak TCB1_INT_ISR
  2368. .weak TCD0_OVF_ISR
  2369. .weak TCD0_TRIG_ISR
  2370. .weak TWI0_TWIS_ISR
  2371. .weak TWI0_TWIM_ISR
  2372. .weak SPI0_INT_ISR
  2373. .weak USART0_RXC_ISR
  2374. .weak USART0_DRE_ISR
  2375. .weak USART0_TXC_ISR
  2376. .weak PORTD_PORT_ISR
  2377. .weak AC0_AC_ISR
  2378. .weak ADC0_RESRDY_ISR
  2379. .weak ADC0_WCMP_ISR
  2380. .weak ZCD0_ZCD_ISR
  2381. .weak PTC_PTC_ISR
  2382. .weak AC1_AC_ISR
  2383. .weak PORTC_PORT_ISR
  2384. .weak TCB2_INT_ISR
  2385. .weak USART1_RXC_ISR
  2386. .weak USART1_DRE_ISR
  2387. .weak USART1_TXC_ISR
  2388. .weak PORTF_PORT_ISR
  2389. .weak NVMCTRL_EE_ISR
  2390. .weak SPI1_INT_ISR
  2391. .weak USART2_RXC_ISR
  2392. .weak USART2_DRE_ISR
  2393. .weak USART2_TXC_ISR
  2394. .weak AC2_AC_ISR
  2395. .weak TWI1_TWIS_ISR
  2396. .weak TWI1_TWIM_ISR
  2397. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  2398. .set BOD_VLM_ISR, Default_IRQ_handler
  2399. .set RTC_CNT_ISR, Default_IRQ_handler
  2400. .set RTC_PIT_ISR, Default_IRQ_handler
  2401. .set CCL_CCL_ISR, Default_IRQ_handler
  2402. .set PORTA_PORT_ISR, Default_IRQ_handler
  2403. .set TCA0_LUNF_ISR, Default_IRQ_handler
  2404. // .set TCA0_OVF_ISR, Default_IRQ_handler
  2405. .set TCA0_HUNF_ISR, Default_IRQ_handler
  2406. .set TCA0_CMP0_ISR, Default_IRQ_handler
  2407. // .set TCA0_LCMP0_ISR, Default_IRQ_handler
  2408. .set TCA0_CMP1_ISR, Default_IRQ_handler
  2409. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  2410. .set TCA0_CMP2_ISR, Default_IRQ_handler
  2411. // .set TCA0_LCMP2_ISR, Default_IRQ_handler
  2412. .set TCB0_INT_ISR, Default_IRQ_handler
  2413. .set TCB1_INT_ISR, Default_IRQ_handler
  2414. .set TCD0_OVF_ISR, Default_IRQ_handler
  2415. .set TCD0_TRIG_ISR, Default_IRQ_handler
  2416. .set TWI0_TWIS_ISR, Default_IRQ_handler
  2417. .set TWI0_TWIM_ISR, Default_IRQ_handler
  2418. .set SPI0_INT_ISR, Default_IRQ_handler
  2419. .set USART0_RXC_ISR, Default_IRQ_handler
  2420. .set USART0_DRE_ISR, Default_IRQ_handler
  2421. .set USART0_TXC_ISR, Default_IRQ_handler
  2422. .set PORTD_PORT_ISR, Default_IRQ_handler
  2423. .set AC0_AC_ISR, Default_IRQ_handler
  2424. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  2425. .set ADC0_WCMP_ISR, Default_IRQ_handler
  2426. .set ZCD0_ZCD_ISR, Default_IRQ_handler
  2427. .set PTC_PTC_ISR, Default_IRQ_handler
  2428. .set AC1_AC_ISR, Default_IRQ_handler
  2429. .set PORTC_PORT_ISR, Default_IRQ_handler
  2430. .set TCB2_INT_ISR, Default_IRQ_handler
  2431. .set USART1_RXC_ISR, Default_IRQ_handler
  2432. .set USART1_DRE_ISR, Default_IRQ_handler
  2433. .set USART1_TXC_ISR, Default_IRQ_handler
  2434. .set PORTF_PORT_ISR, Default_IRQ_handler
  2435. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  2436. .set SPI1_INT_ISR, Default_IRQ_handler
  2437. .set USART2_RXC_ISR, Default_IRQ_handler
  2438. .set USART2_DRE_ISR, Default_IRQ_handler
  2439. .set USART2_TXC_ISR, Default_IRQ_handler
  2440. .set AC2_AC_ISR, Default_IRQ_handler
  2441. .set TWI1_TWIS_ISR, Default_IRQ_handler
  2442. .set TWI1_TWIM_ISR, Default_IRQ_handler
  2443. end;
  2444. end.