avr32da32s.pp 65 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497
  1. unit AVR32DA32S;
  2. interface
  3. type
  4. TAC = object //Analog Comparator
  5. CTRLA: byte; //Control A
  6. CTRLB: byte; //Control B
  7. MUXCTRL: byte; //Mux Control A
  8. Reserved3: byte;
  9. Reserved4: byte;
  10. DACREF: byte; //DAC Voltage Reference
  11. INTCTRL: byte; //Interrupt Control
  12. STATUS: byte; //Status
  13. const
  14. // Enable
  15. ENABLEbm = $01;
  16. // AC_HYSMODE
  17. HYSMODEmask = $06;
  18. HYSMODE_NONE = $00;
  19. HYSMODE_SMALL = $02;
  20. HYSMODE_MEDIUM = $04;
  21. HYSMODE_LARGE = $06;
  22. // AC_POWER
  23. POWERmask = $18;
  24. POWER_PROFILE0 = $00;
  25. POWER_PROFILE1 = $08;
  26. POWER_PROFILE2 = $10;
  27. // Output Pad Enable
  28. OUTENbm = $40;
  29. // Run in Standby Mode
  30. RUNSTDBYbm = $80;
  31. // AC_WINSEL
  32. WINSELmask = $03;
  33. WINSEL_DISABLED = $00;
  34. WINSEL_UPSEL1 = $01;
  35. WINSEL_UPSEL2 = $02;
  36. // AC_MUXNEG
  37. MUXNEGmask = $07;
  38. MUXNEG_AINN0 = $00;
  39. MUXNEG_AINN1 = $01;
  40. MUXNEG_AINN2 = $02;
  41. MUXNEG_DACREF = $03;
  42. // AC_MUXPOS
  43. MUXPOSmask = $38;
  44. MUXPOS_AINP0 = $00;
  45. MUXPOS_AINP1 = $08;
  46. MUXPOS_AINP2 = $10;
  47. MUXPOS_AINP3 = $18;
  48. // AC_INITVAL
  49. INITVALmask = $40;
  50. INITVAL_LOW = $00;
  51. INITVAL_HIGH = $40;
  52. // Invert AC Output
  53. INVERTbm = $80;
  54. // Analog Comparator Interrupt Flag
  55. CMPIFbm = $01;
  56. // Analog Comparator State
  57. CMPSTATEbm = $10;
  58. // AC_WINSTATE
  59. WINSTATEmask = $C0;
  60. WINSTATE_ABOVE = $00;
  61. WINSTATE_INSIDE = $40;
  62. WINSTATE_BELOW = $80;
  63. end;
  64. TADC = object //Analog to Digital Converter
  65. CTRLA: byte; //Control A
  66. CTRLB: byte; //Control B
  67. CTRLC: byte; //Control C
  68. CTRLD: byte; //Control D
  69. CTRLE: byte; //Control E
  70. SAMPCTRL: byte; //Sample Control
  71. Reserved6: byte;
  72. Reserved7: byte;
  73. MUXPOS: byte; //Positive mux input
  74. MUXNEG: byte; //Negative mux input
  75. COMMAND: byte; //Command
  76. EVCTRL: byte; //Event Control
  77. INTCTRL: byte; //Interrupt Control
  78. INTFLAGS: byte; //Interrupt Flags
  79. DBGCTRL: byte; //Debug Control
  80. TEMP: byte; //Temporary Data
  81. RES: word; //ADC Accumulator Result
  82. WINLT: word; //Window comparator low threshold
  83. WINHT: word; //Window comparator high threshold
  84. const
  85. // ADC Enable
  86. ENABLEbm = $01;
  87. // Free running mode
  88. FREERUNbm = $02;
  89. // ADC_RESSEL
  90. RESSELmask = $0C;
  91. RESSEL_12BIT = $00;
  92. RESSEL_10BIT = $04;
  93. // Left adjust result
  94. LEFTADJbm = $10;
  95. // ADC_CONVMODE
  96. CONVMODEmask = $20;
  97. CONVMODE_SINGLEENDED = $00;
  98. CONVMODE_DIFF = $20;
  99. // Run standby mode
  100. RUNSTBYbm = $80;
  101. // ADC_SAMPNUM
  102. SAMPNUMmask = $07;
  103. SAMPNUM_NONE = $00;
  104. SAMPNUM_ACC2 = $01;
  105. SAMPNUM_ACC4 = $02;
  106. SAMPNUM_ACC8 = $03;
  107. SAMPNUM_ACC16 = $04;
  108. SAMPNUM_ACC32 = $05;
  109. SAMPNUM_ACC64 = $06;
  110. SAMPNUM_ACC128 = $07;
  111. // ADC_PRESC
  112. PRESCmask = $0F;
  113. PRESC_DIV2 = $00;
  114. PRESC_DIV4 = $01;
  115. PRESC_DIV8 = $02;
  116. PRESC_DIV12 = $03;
  117. PRESC_DIV16 = $04;
  118. PRESC_DIV20 = $05;
  119. PRESC_DIV24 = $06;
  120. PRESC_DIV28 = $07;
  121. PRESC_DIV32 = $08;
  122. PRESC_DIV48 = $09;
  123. PRESC_DIV64 = $0A;
  124. PRESC_DIV96 = $0B;
  125. PRESC_DIV128 = $0C;
  126. PRESC_DIV256 = $0D;
  127. // ADC_SAMPDLY
  128. SAMPDLYmask = $0F;
  129. SAMPDLY_DLY0 = $00;
  130. SAMPDLY_DLY1 = $01;
  131. SAMPDLY_DLY2 = $02;
  132. SAMPDLY_DLY3 = $03;
  133. SAMPDLY_DLY4 = $04;
  134. SAMPDLY_DLY5 = $05;
  135. SAMPDLY_DLY6 = $06;
  136. SAMPDLY_DLY7 = $07;
  137. SAMPDLY_DLY8 = $08;
  138. SAMPDLY_DLY9 = $09;
  139. SAMPDLY_DLY10 = $0A;
  140. SAMPDLY_DLY11 = $0B;
  141. SAMPDLY_DLY12 = $0C;
  142. SAMPDLY_DLY13 = $0D;
  143. SAMPDLY_DLY14 = $0E;
  144. SAMPDLY_DLY15 = $0F;
  145. // ADC_INITDLY
  146. INITDLYmask = $E0;
  147. INITDLY_DLY0 = $00;
  148. INITDLY_DLY16 = $20;
  149. INITDLY_DLY32 = $40;
  150. INITDLY_DLY64 = $60;
  151. INITDLY_DLY128 = $80;
  152. INITDLY_DLY256 = $A0;
  153. // ADC_WINCM
  154. WINCMmask = $07;
  155. WINCM_NONE = $00;
  156. WINCM_BELOW = $01;
  157. WINCM_ABOVE = $02;
  158. WINCM_INSIDE = $03;
  159. WINCM_OUTSIDE = $04;
  160. // ADC_MUXPOS
  161. MUXPOSmask = $7F;
  162. MUXPOS_AIN0 = $00;
  163. MUXPOS_AIN1 = $01;
  164. MUXPOS_AIN2 = $02;
  165. MUXPOS_AIN3 = $03;
  166. MUXPOS_AIN4 = $04;
  167. MUXPOS_AIN5 = $05;
  168. MUXPOS_AIN6 = $06;
  169. MUXPOS_AIN7 = $07;
  170. MUXPOS_AIN16 = $10;
  171. MUXPOS_AIN17 = $11;
  172. MUXPOS_AIN18 = $12;
  173. MUXPOS_AIN19 = $13;
  174. MUXPOS_AIN20 = $14;
  175. MUXPOS_AIN21 = $15;
  176. MUXPOS_GND = $40;
  177. MUXPOS_TEMPSENSE = $42;
  178. MUXPOS_DAC0 = $48;
  179. // ADC_MUXNEG
  180. MUXNEGmask = $7F;
  181. MUXNEG_AIN0 = $00;
  182. MUXNEG_AIN1 = $01;
  183. MUXNEG_AIN2 = $02;
  184. MUXNEG_AIN3 = $03;
  185. MUXNEG_AIN4 = $04;
  186. MUXNEG_AIN5 = $05;
  187. MUXNEG_AIN6 = $06;
  188. MUXNEG_AIN7 = $07;
  189. MUXNEG_GND = $40;
  190. MUXNEG_DAC0 = $48;
  191. // Start Conversion
  192. STCONVbm = $01;
  193. // Stop Conversion
  194. SPCONVbm = $02;
  195. // Start Event Input Enable
  196. STARTEIbm = $01;
  197. // Result Ready Interrupt Enable
  198. RESRDYbm = $01;
  199. // Window Comparator Interrupt Enable
  200. WCMPbm = $02;
  201. // Debug run
  202. DBGRUNbm = $01;
  203. end;
  204. TBOD = object //Bod interface
  205. CTRLA: byte; //Control A
  206. CTRLB: byte; //Control B
  207. Reserved2: byte;
  208. Reserved3: byte;
  209. Reserved4: byte;
  210. Reserved5: byte;
  211. Reserved6: byte;
  212. Reserved7: byte;
  213. VLMCTRLA: byte; //Voltage level monitor Control
  214. INTCTRL: byte; //Voltage level monitor interrupt Control
  215. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  216. STATUS: byte; //Voltage level monitor status
  217. const
  218. // BOD_SLEEP
  219. SLEEPmask = $03;
  220. SLEEP_DIS = $00;
  221. SLEEP_ENABLED = $01;
  222. SLEEP_SAMPLED = $02;
  223. // BOD_ACTIVE
  224. ACTIVEmask = $0C;
  225. ACTIVE_DIS = $00;
  226. ACTIVE_ENABLED = $04;
  227. ACTIVE_SAMPLED = $08;
  228. ACTIVE_ENWAKE = $0C;
  229. // BOD_SAMPFREQ
  230. SAMPFREQmask = $10;
  231. SAMPFREQ_128HZ = $00;
  232. SAMPFREQ_32HZ = $10;
  233. // BOD_LVL
  234. LVLmask = $07;
  235. LVL_BODLEVEL0 = $00;
  236. LVL_BODLEVEL1 = $01;
  237. LVL_BODLEVEL2 = $02;
  238. LVL_BODLEVEL3 = $03;
  239. // BOD_VLMLVL
  240. VLMLVLmask = $03;
  241. VLMLVL_OFF = $00;
  242. VLMLVL_5ABOVE = $01;
  243. VLMLVL_15ABOVE = $02;
  244. VLMLVL_25ABOVE = $03;
  245. // voltage level monitor interrrupt enable
  246. VLMIEbm = $01;
  247. // BOD_VLMCFG
  248. VLMCFGmask = $06;
  249. VLMCFG_FALLING = $00;
  250. VLMCFG_RISING = $02;
  251. VLMCFG_BOTH = $04;
  252. // Voltage level monitor interrupt flag
  253. VLMIFbm = $01;
  254. // BOD_VLMS
  255. VLMSmask = $01;
  256. VLMS_ABOVE = $00;
  257. VLMS_BELOW = $01;
  258. end;
  259. TCCL = object //Configurable Custom Logic
  260. CTRLA: byte; //Control Register A
  261. SEQCTRL0: byte; //Sequential Control 0
  262. SEQCTRL1: byte; //Sequential Control 1
  263. Reserved3: byte;
  264. Reserved4: byte;
  265. INTCTRL0: byte; //Interrupt Control 0
  266. Reserved6: byte;
  267. INTFLAGS: byte; //Interrupt Flags
  268. LUT0CTRLA: byte; //LUT 0 Control A
  269. LUT0CTRLB: byte; //LUT 0 Control B
  270. LUT0CTRLC: byte; //LUT 0 Control C
  271. TRUTH0: byte; //Truth 0
  272. LUT1CTRLA: byte; //LUT 1 Control A
  273. LUT1CTRLB: byte; //LUT 1 Control B
  274. LUT1CTRLC: byte; //LUT 1 Control C
  275. TRUTH1: byte; //Truth 1
  276. LUT2CTRLA: byte; //LUT 2 Control A
  277. LUT2CTRLB: byte; //LUT 2 Control B
  278. LUT2CTRLC: byte; //LUT 2 Control C
  279. TRUTH2: byte; //Truth 2
  280. LUT3CTRLA: byte; //LUT 3 Control A
  281. LUT3CTRLB: byte; //LUT 3 Control B
  282. LUT3CTRLC: byte; //LUT 3 Control C
  283. TRUTH3: byte; //Truth 3
  284. const
  285. // Enable
  286. ENABLEbm = $01;
  287. // Run in Standby
  288. RUNSTDBYbm = $40;
  289. // CCL_SEQSEL
  290. SEQSELmask = $0F;
  291. SEQSEL_DISABLE = $00;
  292. SEQSEL_DFF = $01;
  293. SEQSEL_JK = $02;
  294. SEQSEL_LATCH = $03;
  295. SEQSEL_RS = $04;
  296. // CCL_INTMODE0
  297. INTMODE0mask = $03;
  298. INTMODE0_INTDISABLE = $00;
  299. INTMODE0_RISING = $01;
  300. INTMODE0_FALLING = $02;
  301. INTMODE0_BOTH = $03;
  302. // CCL_INTMODE1
  303. INTMODE1mask = $0C;
  304. INTMODE1_INTDISABLE = $00;
  305. INTMODE1_RISING = $04;
  306. INTMODE1_FALLING = $08;
  307. INTMODE1_BOTH = $0C;
  308. // CCL_INTMODE2
  309. INTMODE2mask = $30;
  310. INTMODE2_INTDISABLE = $00;
  311. INTMODE2_RISING = $10;
  312. INTMODE2_FALLING = $20;
  313. INTMODE2_BOTH = $30;
  314. // CCL_INTMODE3
  315. INTMODE3mask = $C0;
  316. INTMODE3_INTDISABLE = $00;
  317. INTMODE3_RISING = $40;
  318. INTMODE3_FALLING = $80;
  319. INTMODE3_BOTH = $C0;
  320. // Interrupt Flag
  321. INT0bm = $01;
  322. INT1bm = $02;
  323. INT2bm = $04;
  324. INT3bm = $08;
  325. // CCL_CLKSRC
  326. CLKSRCmask = $0E;
  327. CLKSRC_CLKPER = $00;
  328. CLKSRC_IN2 = $02;
  329. CLKSRC_OSCHF = $08;
  330. CLKSRC_OSC32K = $0A;
  331. CLKSRC_OSC1K = $0C;
  332. // CCL_FILTSEL
  333. FILTSELmask = $30;
  334. FILTSEL_DISABLE = $00;
  335. FILTSEL_SYNCH = $10;
  336. FILTSEL_FILTER = $20;
  337. // Output Enable
  338. OUTENbm = $40;
  339. // CCL_EDGEDET
  340. EDGEDETmask = $80;
  341. EDGEDET_DIS = $00;
  342. EDGEDET_EN = $80;
  343. // CCL_INSEL0
  344. INSEL0mask = $0F;
  345. INSEL0_MASK = $00;
  346. INSEL0_FEEDBACK = $01;
  347. INSEL0_LINK = $02;
  348. INSEL0_EVENTA = $03;
  349. INSEL0_EVENTB = $04;
  350. INSEL0_IN0 = $05;
  351. INSEL0_AC0 = $06;
  352. INSEL0_ZCD0 = $07;
  353. INSEL0_USART0 = $08;
  354. INSEL0_SPI0 = $09;
  355. INSEL0_TCA0 = $0A;
  356. INSEL0_TCB0 = $0C;
  357. INSEL0_TCD0 = $0D;
  358. // CCL_INSEL1
  359. INSEL1mask = $F0;
  360. INSEL1_MASK = $00;
  361. INSEL1_FEEDBACK = $10;
  362. INSEL1_LINK = $20;
  363. INSEL1_EVENTA = $30;
  364. INSEL1_EVENTB = $40;
  365. INSEL1_IN1 = $50;
  366. INSEL1_AC1 = $60;
  367. INSEL1_USART1 = $80;
  368. INSEL1_SPI0 = $90;
  369. INSEL1_TCA0 = $A0;
  370. INSEL1_TCB1 = $C0;
  371. INSEL1_TCD0 = $D0;
  372. // CCL_INSEL2
  373. INSEL2mask = $0F;
  374. INSEL2_MASK = $00;
  375. INSEL2_FEEDBACK = $01;
  376. INSEL2_LINK = $02;
  377. INSEL2_EVENTA = $03;
  378. INSEL2_EVENTB = $04;
  379. INSEL2_IN2 = $05;
  380. INSEL2_AC2 = $06;
  381. INSEL2_USART2 = $08;
  382. INSEL2_SPI0 = $09;
  383. INSEL2_TCA0 = $0A;
  384. INSEL2_TCB2 = $0C;
  385. INSEL2_TCD0 = $0D;
  386. end;
  387. TCLKCTRL = object //Clock controller
  388. MCLKCTRLA: byte; //MCLK Control A
  389. MCLKCTRLB: byte; //MCLK Control B
  390. MCLKLOCK: byte; //MCLK Lock
  391. MCLKSTATUS: byte; //MCLK Status
  392. Reserved4: byte;
  393. Reserved5: byte;
  394. Reserved6: byte;
  395. Reserved7: byte;
  396. OSCHFCTRLA: byte; //OSCHF Control A
  397. OSCHFTUNE: byte; //OSCHF Tune
  398. Reserved10: byte;
  399. Reserved11: byte;
  400. Reserved12: byte;
  401. Reserved13: byte;
  402. Reserved14: byte;
  403. Reserved15: byte;
  404. PLLCTRLA: byte; //PLL Control A
  405. Reserved17: byte;
  406. Reserved18: byte;
  407. Reserved19: byte;
  408. Reserved20: byte;
  409. Reserved21: byte;
  410. Reserved22: byte;
  411. Reserved23: byte;
  412. OSC32KCTRLA: byte; //OSC32K Control A
  413. Reserved25: byte;
  414. Reserved26: byte;
  415. Reserved27: byte;
  416. XOSC32KCTRLA: byte; //XOSC32K Control A
  417. const
  418. // CLKCTRL_CLKSEL
  419. CLKSELmask = $07;
  420. CLKSEL_OSCHF = $00;
  421. CLKSEL_OSC32K = $01;
  422. CLKSEL_XOSC32K = $02;
  423. CLKSEL_EXTCLK = $03;
  424. // System clock out
  425. CLKOUTbm = $80;
  426. // Prescaler enable
  427. PENbm = $01;
  428. // CLKCTRL_PDIV
  429. PDIVmask = $1E;
  430. PDIV_2X = $00;
  431. PDIV_4X = $02;
  432. PDIV_8X = $04;
  433. PDIV_16X = $06;
  434. PDIV_32X = $08;
  435. PDIV_64X = $0A;
  436. PDIV_6X = $10;
  437. PDIV_10X = $12;
  438. PDIV_12X = $14;
  439. PDIV_24X = $16;
  440. PDIV_48X = $18;
  441. // lock ebable
  442. LOCKENbm = $01;
  443. // System Oscillator changing
  444. SOSCbm = $01;
  445. // High frequency oscillator status
  446. OSCHFSbm = $02;
  447. // 32KHz oscillator status
  448. OSC32KSbm = $04;
  449. // 32.768 kHz Crystal Oscillator status
  450. XOSC32KSbm = $08;
  451. // External Clock status
  452. EXTSbm = $10;
  453. // PLL oscillator status
  454. PLLSbm = $20;
  455. // Autotune
  456. AUTOTUNEbm = $01;
  457. // CLKCTRL_FRQSEL
  458. FRQSELmask = $3C;
  459. FRQSEL_1M = $00;
  460. FRQSEL_2M = $04;
  461. FRQSEL_3M = $08;
  462. FRQSEL_4M = $0C;
  463. FRQSEL_8M = $14;
  464. FRQSEL_12M = $18;
  465. FRQSEL_16M = $1C;
  466. FRQSEL_20M = $20;
  467. FRQSEL_24M = $24;
  468. // Run standby
  469. RUNSTDBYbm = $80;
  470. // CLKCTRL_MULFAC
  471. MULFACmask = $03;
  472. MULFAC_DISABLE = $00;
  473. MULFAC_2x = $01;
  474. MULFAC_3x = $02;
  475. // Source
  476. SOURCEbm = $40;
  477. // Enable
  478. ENABLEbm = $01;
  479. // Low power mode
  480. LPMODEbm = $02;
  481. // Select
  482. SELbm = $04;
  483. // CLKCTRL_CSUT
  484. CSUTmask = $30;
  485. CSUT_1K = $00;
  486. CSUT_16K = $10;
  487. CSUT_32K = $20;
  488. CSUT_64K = $30;
  489. end;
  490. TCPU = object //CPU
  491. Reserved0: byte;
  492. Reserved1: byte;
  493. Reserved2: byte;
  494. Reserved3: byte;
  495. CCP: byte; //Configuration Change Protection
  496. Reserved5: byte;
  497. Reserved6: byte;
  498. Reserved7: byte;
  499. Reserved8: byte;
  500. Reserved9: byte;
  501. Reserved10: byte;
  502. Reserved11: byte;
  503. Reserved12: byte;
  504. SP: word; //Stack Pointer
  505. SREG: byte; //Status Register
  506. const
  507. // CPU_CCP
  508. CCPmask = $FF;
  509. CCP_SPM = $9D;
  510. CCP_IOREG = $D8;
  511. // Carry Flag
  512. Cbm = $01;
  513. // Zero Flag
  514. Zbm = $02;
  515. // Negative Flag
  516. Nbm = $04;
  517. // Two's Complement Overflow Flag
  518. Vbm = $08;
  519. // N Exclusive Or V Flag
  520. Sbm = $10;
  521. // Half Carry Flag
  522. Hbm = $20;
  523. // Transfer Bit
  524. Tbm = $40;
  525. // Global Interrupt Enable Flag
  526. Ibm = $80;
  527. end;
  528. TCPUINT = object //Interrupt Controller
  529. CTRLA: byte; //Control A
  530. STATUS: byte; //Status
  531. LVL0PRI: byte; //Interrupt Level 0 Priority
  532. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  533. const
  534. // Round-robin Scheduling Enable
  535. LVL0RRbm = $01;
  536. // Compact Vector Table
  537. CVTbm = $20;
  538. // Interrupt Vector Select
  539. IVSELbm = $40;
  540. // Level 0 Interrupt Executing
  541. LVL0EXbm = $01;
  542. // Level 1 Interrupt Executing
  543. LVL1EXbm = $02;
  544. // Non-maskable Interrupt Executing
  545. NMIEXbm = $80;
  546. end;
  547. TCRCSCAN = object //CRCSCAN
  548. CTRLA: byte; //Control A
  549. CTRLB: byte; //Control B
  550. STATUS: byte; //Status
  551. const
  552. // Enable CRC scan
  553. ENABLEbm = $01;
  554. // Enable NMI Trigger
  555. NMIENbm = $02;
  556. // Reset CRC scan
  557. RESETbm = $80;
  558. // CRCSCAN_SRC
  559. SRCmask = $03;
  560. SRC_FLASH = $00;
  561. SRC_APPLICATION = $01;
  562. SRC_BOOT = $02;
  563. // CRC Busy
  564. BUSYbm = $01;
  565. // CRC Ok
  566. OKbm = $02;
  567. end;
  568. TDAC = object //Digital to Analog Converter
  569. CTRLA: byte; //Control Register A
  570. Reserved1: byte;
  571. DATA: word; //DATA Register
  572. const
  573. // DAC Enable
  574. ENABLEbm = $01;
  575. // Output Buffer Enable
  576. OUTENbm = $40;
  577. // Run in Standby Mode
  578. RUNSTDBYbm = $80;
  579. end;
  580. TEVSYS = object //Event System
  581. SWEVENTA: byte; //Software Event A
  582. Reserved1: byte;
  583. Reserved2: byte;
  584. Reserved3: byte;
  585. Reserved4: byte;
  586. Reserved5: byte;
  587. Reserved6: byte;
  588. Reserved7: byte;
  589. Reserved8: byte;
  590. Reserved9: byte;
  591. Reserved10: byte;
  592. Reserved11: byte;
  593. Reserved12: byte;
  594. Reserved13: byte;
  595. Reserved14: byte;
  596. Reserved15: byte;
  597. CHANNEL0: byte; //Multiplexer Channel 0
  598. CHANNEL1: byte; //Multiplexer Channel 1
  599. CHANNEL2: byte; //Multiplexer Channel 2
  600. CHANNEL3: byte; //Multiplexer Channel 3
  601. CHANNEL4: byte; //Multiplexer Channel 4
  602. CHANNEL5: byte; //Multiplexer Channel 5
  603. CHANNEL6: byte; //Multiplexer Channel 6
  604. CHANNEL7: byte; //Multiplexer Channel 7
  605. Reserved24: byte;
  606. Reserved25: byte;
  607. Reserved26: byte;
  608. Reserved27: byte;
  609. Reserved28: byte;
  610. Reserved29: byte;
  611. Reserved30: byte;
  612. Reserved31: byte;
  613. USERCCLLUT0A: byte; //User 0 - CCL0 Event A
  614. USERCCLLUT0B: byte; //User 1 - CCL0 Event B
  615. USERCCLLUT1A: byte; //User 2 - CCL1 Event A
  616. USERCCLLUT1B: byte; //User 3 - CCL1 Event B
  617. USERCCLLUT2A: byte; //User 4 - CCL2 Event A
  618. USERCCLLUT2B: byte; //User 5 - CCL2 Event B
  619. USERCCLLUT3A: byte; //User 6 - CCL3 Event A
  620. USERCCLLUT3B: byte; //User 7 - CCL3 Event B
  621. Reserved40: byte;
  622. Reserved41: byte;
  623. Reserved42: byte;
  624. Reserved43: byte;
  625. USERADC0START: byte; //User 12 - ADC0
  626. USERPTCSTART: byte; //User 13 - PTC
  627. USEREVSYSEVOUTA: byte; //User 14 - EVOUTA
  628. Reserved47: byte;
  629. USEREVSYSEVOUTC: byte; //User 16 - EVOUTC
  630. USEREVSYSEVOUTD: byte; //User 17 - EVOUTD
  631. Reserved50: byte;
  632. USEREVSYSEVOUTF: byte; //User 19 - EVOUTF
  633. Reserved52: byte;
  634. USERUSART0IRDA: byte; //User 21 - USART0
  635. USERUSART1IRDA: byte; //User 22 - USART1
  636. USERUSART2IRDA: byte; //User 23 - USART2
  637. Reserved56: byte;
  638. Reserved57: byte;
  639. Reserved58: byte;
  640. USERTCA0CNTA: byte; //User 27 - TCA0 Event A
  641. USERTCA0CNTB: byte; //User 28 - TCA0 Event B
  642. Reserved61: byte;
  643. Reserved62: byte;
  644. USERTCB0CAPT: byte; //User 31 - TCB0 Event A
  645. USERTCB0COUNT: byte; //User 32 - TCB0 Event B
  646. USERTCB1CAPT: byte; //User 33 - TCB1 Event A
  647. USERTCB1COUNT: byte; //User 34 - TCB1 Event B
  648. USERTCB2CAPT: byte; //User 35 - TCB2 Event A
  649. USERTCB2COUNT: byte; //User 36 - TCB2 Event B
  650. Reserved69: byte;
  651. Reserved70: byte;
  652. Reserved71: byte;
  653. Reserved72: byte;
  654. USERTCD0INPUTA: byte; //User 41 - TCD0 Event A
  655. USERTCD0INPUTB: byte; //User 42 - TCD0 Event B
  656. const
  657. // EVSYS_SWEVENTA
  658. SWEVENTAmask = $FF;
  659. SWEVENTA_CH0 = $01;
  660. SWEVENTA_CH1 = $02;
  661. SWEVENTA_CH2 = $04;
  662. SWEVENTA_CH3 = $08;
  663. SWEVENTA_CH4 = $10;
  664. SWEVENTA_CH5 = $20;
  665. SWEVENTA_CH6 = $40;
  666. SWEVENTA_CH7 = $80;
  667. // EVSYS_CHANNEL0
  668. CHANNEL0mask = $FF;
  669. CHANNEL0_OFF = $00;
  670. CHANNEL0_UPDI_SYNCH = $01;
  671. CHANNEL0_RTC_OVF = $06;
  672. CHANNEL0_RTC_CMP = $07;
  673. CHANNEL0_RTC_PIT_DIV8192 = $08;
  674. CHANNEL0_RTC_PIT_DIV4096 = $09;
  675. CHANNEL0_RTC_PIT_DIV2048 = $0A;
  676. CHANNEL0_RTC_PIT_DIV1024 = $0B;
  677. CHANNEL0_CCL_LUT0 = $10;
  678. CHANNEL0_CCL_LUT1 = $11;
  679. CHANNEL0_CCL_LUT2 = $12;
  680. CHANNEL0_CCL_LUT3 = $13;
  681. CHANNEL0_AC0_OUT = $20;
  682. CHANNEL0_AC1_OUT = $21;
  683. CHANNEL0_AC2_OUT = $22;
  684. CHANNEL0_ADC0_RESRDY = $24;
  685. CHANNEL0_PTC_RESRDY = $28;
  686. CHANNEL0_ZCD0 = $30;
  687. CHANNEL0_PORTA_PIN0 = $40;
  688. CHANNEL0_PORTA_PIN1 = $41;
  689. CHANNEL0_PORTA_PIN2 = $42;
  690. CHANNEL0_PORTA_PIN3 = $43;
  691. CHANNEL0_PORTA_PIN4 = $44;
  692. CHANNEL0_PORTA_PIN5 = $45;
  693. CHANNEL0_PORTA_PIN6 = $46;
  694. CHANNEL0_PORTA_PIN7 = $47;
  695. CHANNEL0_USART0_XCK = $60;
  696. CHANNEL0_USART1_XCK = $61;
  697. CHANNEL0_USART2_XCK = $62;
  698. CHANNEL0_SPI0_SCK = $68;
  699. CHANNEL0_SPI1_SCK = $69;
  700. CHANNEL0_TCA0_OVF_LUNF = $80;
  701. CHANNEL0_TCA0_HUNF = $81;
  702. CHANNEL0_TCA0_CMP0_LCMP0 = $84;
  703. CHANNEL0_TCA0_CMP1_LCMP1 = $85;
  704. CHANNEL0_TCA0_CMP2_LCMP2 = $86;
  705. CHANNEL0_TCA1_OVF_LUNF = $88;
  706. CHANNEL0_TCB0_CAPT = $A0;
  707. CHANNEL0_TCB0_OVF = $A1;
  708. CHANNEL0_TCB1_CAPT = $A2;
  709. CHANNEL0_TCB1_OVF = $A3;
  710. CHANNEL0_TCB2_CAPT = $A4;
  711. CHANNEL0_TCB2_OVF = $A5;
  712. CHANNEL0_TCD0_CMPBCLR = $B0;
  713. CHANNEL0_TCD0_CMPASET = $B1;
  714. CHANNEL0_TCD0_CMPBSET = $B2;
  715. CHANNEL0_TCD0_PROGEV = $B3;
  716. // EVSYS_CHANNEL1
  717. CHANNEL1mask = $FF;
  718. CHANNEL1_OFF = $00;
  719. CHANNEL1_UPDI_SYNCH = $01;
  720. CHANNEL1_RTC_OVF = $06;
  721. CHANNEL1_RTC_CMP = $07;
  722. CHANNEL1_RTC_PIT_DIV512 = $08;
  723. CHANNEL1_RTC_PIT_DIV256 = $09;
  724. CHANNEL1_RTC_PIT_DIV128 = $0A;
  725. CHANNEL1_RTC_PIT_DIV64 = $0B;
  726. CHANNEL1_CCL_LUT0 = $10;
  727. CHANNEL1_CCL_LUT1 = $11;
  728. CHANNEL1_CCL_LUT2 = $12;
  729. CHANNEL1_CCL_LUT3 = $13;
  730. CHANNEL1_AC0_OUT = $20;
  731. CHANNEL1_AC1_OUT = $21;
  732. CHANNEL1_AC2_OUT = $22;
  733. CHANNEL1_ADC0_RESRDY = $24;
  734. CHANNEL1_PTC_RESRDY = $28;
  735. CHANNEL1_ZCD0 = $30;
  736. CHANNEL1_PORTA_PIN0 = $40;
  737. CHANNEL1_PORTA_PIN1 = $41;
  738. CHANNEL1_PORTA_PIN2 = $42;
  739. CHANNEL1_PORTA_PIN3 = $43;
  740. CHANNEL1_PORTA_PIN4 = $44;
  741. CHANNEL1_PORTA_PIN5 = $45;
  742. CHANNEL1_PORTA_PIN6 = $46;
  743. CHANNEL1_PORTA_PIN7 = $47;
  744. CHANNEL1_USART0_XCK = $60;
  745. CHANNEL1_USART1_XCK = $61;
  746. CHANNEL1_USART2_XCK = $62;
  747. CHANNEL1_SPI0_SCK = $68;
  748. CHANNEL1_SPI1_SCK = $69;
  749. CHANNEL1_TCA0_OVF_LUNF = $80;
  750. CHANNEL1_TCA0_HUNF = $81;
  751. CHANNEL1_TCA0_CMP0_LCMP0 = $84;
  752. CHANNEL1_TCA0_CMP1_LCMP1 = $85;
  753. CHANNEL1_TCA0_CMP2_LCMP2 = $86;
  754. CHANNEL1_TCB0_CAPT = $A0;
  755. CHANNEL1_TCB0_OVF = $A1;
  756. CHANNEL1_TCB1_CAPT = $A2;
  757. CHANNEL1_TCB1_OVF = $A3;
  758. CHANNEL1_TCB2_CAPT = $A4;
  759. CHANNEL1_TCB2_OVF = $A5;
  760. CHANNEL1_TCD0_CMPBCLR = $B0;
  761. CHANNEL1_TCD0_CMPASET = $B1;
  762. CHANNEL1_TCD0_CMPBSET = $B2;
  763. CHANNEL1_TCD0_PROGEV = $B3;
  764. // EVSYS_CHANNEL2
  765. CHANNEL2mask = $FF;
  766. CHANNEL2_OFF = $00;
  767. CHANNEL2_UPDI_SYNCH = $01;
  768. CHANNEL2_RTC_OVF = $06;
  769. CHANNEL2_RTC_CMP = $07;
  770. CHANNEL2_RTC_PIT_DIV8192 = $08;
  771. CHANNEL2_RTC_PIT_DIV4096 = $09;
  772. CHANNEL2_RTC_PIT_DIV2048 = $0A;
  773. CHANNEL2_RTC_PIT_DIV1024 = $0B;
  774. CHANNEL2_CCL_LUT0 = $10;
  775. CHANNEL2_CCL_LUT1 = $11;
  776. CHANNEL2_CCL_LUT2 = $12;
  777. CHANNEL2_CCL_LUT3 = $13;
  778. CHANNEL2_AC0_OUT = $20;
  779. CHANNEL2_AC1_OUT = $21;
  780. CHANNEL2_AC2_OUT = $22;
  781. CHANNEL2_ADC0_RESRDY = $24;
  782. CHANNEL2_PTC_RESRDY = $28;
  783. CHANNEL2_ZCD0 = $30;
  784. CHANNEL2_PORTC_PIN0 = $40;
  785. CHANNEL2_PORTC_PIN1 = $41;
  786. CHANNEL2_PORTC_PIN2 = $42;
  787. CHANNEL2_PORTC_PIN3 = $43;
  788. CHANNEL2_PORTD_PIN0 = $48;
  789. CHANNEL2_PORTD_PIN1 = $49;
  790. CHANNEL2_PORTD_PIN2 = $4A;
  791. CHANNEL2_PORTD_PIN3 = $4B;
  792. CHANNEL2_PORTD_PIN4 = $4C;
  793. CHANNEL2_PORTD_PIN5 = $4D;
  794. CHANNEL2_PORTD_PIN6 = $4E;
  795. CHANNEL2_PORTD_PIN7 = $4F;
  796. CHANNEL2_USART0_XCK = $60;
  797. CHANNEL2_USART1_XCK = $61;
  798. CHANNEL2_USART2_XCK = $62;
  799. CHANNEL2_SPI0_SCK = $68;
  800. CHANNEL2_SPI1_SCK = $69;
  801. CHANNEL2_TCA0_OVF_LUNF = $80;
  802. CHANNEL2_TCA0_HUNF = $81;
  803. CHANNEL2_TCA0_CMP0_LCMP0 = $84;
  804. CHANNEL2_TCA0_CMP1_LCMP1 = $85;
  805. CHANNEL2_TCA0_CMP2_LCMP2 = $86;
  806. CHANNEL2_TCB0_CAPT = $A0;
  807. CHANNEL2_TCB0_OVF = $A1;
  808. CHANNEL2_TCB1_CAPT = $A2;
  809. CHANNEL2_TCB1_OVF = $A3;
  810. CHANNEL2_TCB2_CAPT = $A4;
  811. CHANNEL2_TCB2_OVF = $A5;
  812. CHANNEL2_TCD0_CMPBCLR = $B0;
  813. CHANNEL2_TCD0_CMPASET = $B1;
  814. CHANNEL2_TCD0_CMPBSET = $B2;
  815. CHANNEL2_TCD0_PROGEV = $B3;
  816. // EVSYS_CHANNEL3
  817. CHANNEL3mask = $FF;
  818. CHANNEL3_OFF = $00;
  819. CHANNEL3_UPDI_SYNCH = $01;
  820. CHANNEL3_RTC_OVF = $06;
  821. CHANNEL3_RTC_CMP = $07;
  822. CHANNEL3_RTC_PIT_DIV512 = $08;
  823. CHANNEL3_RTC_PIT_DIV256 = $09;
  824. CHANNEL3_RTC_PIT_DIV128 = $0A;
  825. CHANNEL3_RTC_PIT_DIV64 = $0B;
  826. CHANNEL3_CCL_LUT0 = $10;
  827. CHANNEL3_CCL_LUT1 = $11;
  828. CHANNEL3_CCL_LUT2 = $12;
  829. CHANNEL3_CCL_LUT3 = $13;
  830. CHANNEL3_AC0_OUT = $20;
  831. CHANNEL3_AC1_OUT = $21;
  832. CHANNEL3_AC2_OUT = $22;
  833. CHANNEL3_ADC0_RESRDY = $24;
  834. CHANNEL3_PTC_RESRDY = $28;
  835. CHANNEL3_ZCD0 = $30;
  836. CHANNEL3_PORTC_PIN0 = $40;
  837. CHANNEL3_PORTC_PIN1 = $41;
  838. CHANNEL3_PORTC_PIN2 = $42;
  839. CHANNEL3_PORTC_PIN3 = $43;
  840. CHANNEL3_PORTD_PIN0 = $48;
  841. CHANNEL3_PORTD_PIN1 = $49;
  842. CHANNEL3_PORTD_PIN2 = $4A;
  843. CHANNEL3_PORTD_PIN3 = $4B;
  844. CHANNEL3_PORTD_PIN4 = $4C;
  845. CHANNEL3_PORTD_PIN5 = $4D;
  846. CHANNEL3_PORTD_PIN6 = $4E;
  847. CHANNEL3_PORTD_PIN7 = $4F;
  848. CHANNEL3_USART0_XCK = $60;
  849. CHANNEL3_USART1_XCK = $61;
  850. CHANNEL3_USART2_XCK = $62;
  851. CHANNEL3_SPI0_SCK = $68;
  852. CHANNEL3_SPI1_SCK = $69;
  853. CHANNEL3_TCA0_OVF_LUNF = $80;
  854. CHANNEL3_TCA0_HUNF = $81;
  855. CHANNEL3_TCA0_CMP0_LCMP0 = $84;
  856. CHANNEL3_TCA0_CMP1_LCMP1 = $85;
  857. CHANNEL3_TCA0_CMP2_LCMP2 = $86;
  858. CHANNEL3_TCB0_CAPT = $A0;
  859. CHANNEL3_TCB0_OVF = $A1;
  860. CHANNEL3_TCB1_CAPT = $A2;
  861. CHANNEL3_TCB1_OVF = $A3;
  862. CHANNEL3_TCB2_CAPT = $A4;
  863. CHANNEL3_TCB2_OVF = $A5;
  864. CHANNEL3_TCD0_CMPBCLR = $B0;
  865. CHANNEL3_TCD0_CMPASET = $B1;
  866. CHANNEL3_TCD0_CMPBSET = $B2;
  867. CHANNEL3_TCD0_PROGEV = $B3;
  868. // EVSYS_CHANNEL4
  869. CHANNEL4mask = $FF;
  870. CHANNEL4_OFF = $00;
  871. CHANNEL4_UPDI_SYNCH = $01;
  872. CHANNEL4_RTC_OVF = $06;
  873. CHANNEL4_RTC_CMP = $07;
  874. CHANNEL4_RTC_PIT_DIV8192 = $08;
  875. CHANNEL4_RTC_PIT_DIV4096 = $09;
  876. CHANNEL4_RTC_PIT_DIV2048 = $0A;
  877. CHANNEL4_RTC_PIT_DIV1024 = $0B;
  878. CHANNEL4_CCL_LUT0 = $10;
  879. CHANNEL4_CCL_LUT1 = $11;
  880. CHANNEL4_CCL_LUT2 = $12;
  881. CHANNEL4_CCL_LUT3 = $13;
  882. CHANNEL4_AC0_OUT = $20;
  883. CHANNEL4_AC1_OUT = $21;
  884. CHANNEL4_AC2_OUT = $22;
  885. CHANNEL4_ADC0_RESRDY = $24;
  886. CHANNEL4_PTC_RESRDY = $28;
  887. CHANNEL4_ZCD0 = $30;
  888. CHANNEL4_PORTF_PIN0 = $48;
  889. CHANNEL4_PORTF_PIN1 = $49;
  890. CHANNEL4_PORTF_PIN2 = $4A;
  891. CHANNEL4_PORTF_PIN3 = $4B;
  892. CHANNEL4_PORTF_PIN4 = $4C;
  893. CHANNEL4_PORTF_PIN5 = $4D;
  894. CHANNEL4_PORTF_PIN6 = $4E;
  895. CHANNEL4_USART0_XCK = $60;
  896. CHANNEL4_USART1_XCK = $61;
  897. CHANNEL4_USART2_XCK = $62;
  898. CHANNEL4_SPI0_SCK = $68;
  899. CHANNEL4_SPI1_SCK = $69;
  900. CHANNEL4_TCA0_OVF_LUNF = $80;
  901. CHANNEL4_TCA0_HUNF = $81;
  902. CHANNEL4_TCA0_CMP0_LCMP0 = $84;
  903. CHANNEL4_TCA0_CMP1_LCMP1 = $85;
  904. CHANNEL4_TCA0_CMP2_LCMP2 = $86;
  905. CHANNEL4_TCB0_CAPT = $A0;
  906. CHANNEL4_TCB0_OVF = $A1;
  907. CHANNEL4_TCB1_CAPT = $A2;
  908. CHANNEL4_TCB1_OVF = $A3;
  909. CHANNEL4_TCB2_CAPT = $A4;
  910. CHANNEL4_TCB2_OVF = $A5;
  911. CHANNEL4_TCD0_CMPBCLR = $B0;
  912. CHANNEL4_TCD0_CMPASET = $B1;
  913. CHANNEL4_TCD0_CMPBSET = $B2;
  914. CHANNEL4_TCD0_PROGEV = $B3;
  915. // EVSYS_CHANNEL5
  916. CHANNEL5mask = $FF;
  917. CHANNEL5_OFF = $00;
  918. CHANNEL5_UPDI_SYNCH = $01;
  919. CHANNEL5_RTC_OVF = $06;
  920. CHANNEL5_RTC_CMP = $07;
  921. CHANNEL5_RTC_PIT_DIV512 = $08;
  922. CHANNEL5_RTC_PIT_DIV256 = $09;
  923. CHANNEL5_RTC_PIT_DIV128 = $0A;
  924. CHANNEL5_RTC_PIT_DIV64 = $0B;
  925. CHANNEL5_CCL_LUT0 = $10;
  926. CHANNEL5_CCL_LUT1 = $11;
  927. CHANNEL5_CCL_LUT2 = $12;
  928. CHANNEL5_CCL_LUT3 = $13;
  929. CHANNEL5_AC0_OUT = $20;
  930. CHANNEL5_AC1_OUT = $21;
  931. CHANNEL5_AC2_OUT = $22;
  932. CHANNEL5_ADC0_RESRDY = $24;
  933. CHANNEL5_PTC_RESRDY = $28;
  934. CHANNEL5_ZCD0 = $30;
  935. CHANNEL5_PORTF_PIN0 = $48;
  936. CHANNEL5_PORTF_PIN1 = $49;
  937. CHANNEL5_PORTF_PIN2 = $4A;
  938. CHANNEL5_PORTF_PIN3 = $4B;
  939. CHANNEL5_PORTF_PIN4 = $4C;
  940. CHANNEL5_PORTF_PIN5 = $4D;
  941. CHANNEL5_PORTF_PIN6 = $4E;
  942. CHANNEL5_USART0_XCK = $60;
  943. CHANNEL5_USART1_XCK = $61;
  944. CHANNEL5_USART2_XCK = $62;
  945. CHANNEL5_SPI0_SCK = $68;
  946. CHANNEL5_SPI1_SCK = $69;
  947. CHANNEL5_TCA0_OVF_LUNF = $80;
  948. CHANNEL5_TCA0_HUNF = $81;
  949. CHANNEL5_TCA0_CMP0_LCMP0 = $84;
  950. CHANNEL5_TCA0_CMP1_LCMP1 = $85;
  951. CHANNEL5_TCA0_CMP2_LCMP2 = $86;
  952. CHANNEL5_TCB0_CAPT = $A0;
  953. CHANNEL5_TCB0_OVF = $A1;
  954. CHANNEL5_TCB1_CAPT = $A2;
  955. CHANNEL5_TCB1_OVF = $A3;
  956. CHANNEL5_TCB2_CAPT = $A4;
  957. CHANNEL5_TCB2_OVF = $A5;
  958. CHANNEL5_TCD0_CMPBCLR = $B0;
  959. CHANNEL5_TCD0_CMPASET = $B1;
  960. CHANNEL5_TCD0_CMPBSET = $B2;
  961. CHANNEL5_TCD0_PROGEV = $B3;
  962. // EVSYS_CHANNEL6
  963. CHANNEL6mask = $FF;
  964. CHANNEL6_OFF = $00;
  965. CHANNEL6_UPDI_SYNCH = $01;
  966. CHANNEL6_RTC_OVF = $06;
  967. CHANNEL6_RTC_CMP = $07;
  968. CHANNEL6_RTC_PIT_DIV8192 = $08;
  969. CHANNEL6_RTC_PIT_DIV4096 = $09;
  970. CHANNEL6_RTC_PIT_DIV2048 = $0A;
  971. CHANNEL6_RTC_PIT_DIV1024 = $0B;
  972. CHANNEL6_CCL_LUT0 = $10;
  973. CHANNEL6_CCL_LUT1 = $11;
  974. CHANNEL6_CCL_LUT2 = $12;
  975. CHANNEL6_CCL_LUT3 = $13;
  976. CHANNEL6_AC0_OUT = $20;
  977. CHANNEL6_AC1_OUT = $21;
  978. CHANNEL6_AC2_OUT = $22;
  979. CHANNEL6_ADC0_RESRDY = $24;
  980. CHANNEL6_PTC_RESRDY = $28;
  981. CHANNEL6_ZCD0 = $30;
  982. CHANNEL6_USART0_XCK = $60;
  983. CHANNEL6_USART1_XCK = $61;
  984. CHANNEL6_USART2_XCK = $62;
  985. CHANNEL6_SPI0_SCK = $68;
  986. CHANNEL6_SPI1_SCK = $69;
  987. CHANNEL6_TCA0_OVF_LUNF = $80;
  988. CHANNEL6_TCA0_HUNF = $81;
  989. CHANNEL6_TCA0_CMP0_LCMP0 = $84;
  990. CHANNEL6_TCA0_CMP1_LCMP1 = $85;
  991. CHANNEL6_TCA0_CMP2_LCMP2 = $86;
  992. CHANNEL6_TCB0_CAPT = $A0;
  993. CHANNEL6_TCB0_OVF = $A1;
  994. CHANNEL6_TCB1_CAPT = $A2;
  995. CHANNEL6_TCB1_OVF = $A3;
  996. CHANNEL6_TCB2_CAPT = $A4;
  997. CHANNEL6_TCB2_OVF = $A5;
  998. CHANNEL6_TCD0_CMPBCLR = $B0;
  999. CHANNEL6_TCD0_CMPASET = $B1;
  1000. CHANNEL6_TCD0_CMPBSET = $B2;
  1001. CHANNEL6_TCD0_PROGEV = $B3;
  1002. // EVSYS_CHANNEL7
  1003. CHANNEL7mask = $FF;
  1004. CHANNEL7_OFF = $00;
  1005. CHANNEL7_UPDI_SYNCH = $01;
  1006. CHANNEL7_RTC_OVF = $06;
  1007. CHANNEL7_RTC_CMP = $07;
  1008. CHANNEL7_RTC_PIT_DIV512 = $08;
  1009. CHANNEL7_RTC_PIT_DIV256 = $09;
  1010. CHANNEL7_RTC_PIT_DIV128 = $0A;
  1011. CHANNEL7_RTC_PIT_DIV64 = $0B;
  1012. CHANNEL7_CCL_LUT0 = $10;
  1013. CHANNEL7_CCL_LUT1 = $11;
  1014. CHANNEL7_CCL_LUT2 = $12;
  1015. CHANNEL7_CCL_LUT3 = $13;
  1016. CHANNEL7_AC0_OUT = $20;
  1017. CHANNEL7_AC1_OUT = $21;
  1018. CHANNEL7_AC2_OUT = $22;
  1019. CHANNEL7_ADC0_RESRDY = $24;
  1020. CHANNEL7_PTC_RESRDY = $28;
  1021. CHANNEL7_ZCD0 = $30;
  1022. CHANNEL7_USART0_XCK = $60;
  1023. CHANNEL7_USART1_XCK = $61;
  1024. CHANNEL7_USART2_XCK = $62;
  1025. CHANNEL7_SPI0_SCK = $68;
  1026. CHANNEL7_SPI1_SCK = $69;
  1027. CHANNEL7_TCA0_OVF_LUNF = $80;
  1028. CHANNEL7_TCA0_HUNF = $81;
  1029. CHANNEL7_TCA0_CMP0_LCMP0 = $84;
  1030. CHANNEL7_TCA0_CMP1_LCMP1 = $85;
  1031. CHANNEL7_TCA0_CMP2_LCMP2 = $86;
  1032. CHANNEL7_TCB0_CAPT = $A0;
  1033. CHANNEL7_TCB0_OVF = $A1;
  1034. CHANNEL7_TCB1_CAPT = $A2;
  1035. CHANNEL7_TCB1_OVF = $A3;
  1036. CHANNEL7_TCB2_CAPT = $A4;
  1037. CHANNEL7_TCB2_OVF = $A5;
  1038. CHANNEL7_TCD0_CMPBCLR = $B0;
  1039. CHANNEL7_TCD0_CMPASET = $B1;
  1040. CHANNEL7_TCD0_CMPBSET = $B2;
  1041. CHANNEL7_TCD0_PROGEV = $B3;
  1042. // EVSYS_USER
  1043. USERmask = $FF;
  1044. USER_OFF = $00;
  1045. USER_CHANNEL0 = $01;
  1046. USER_CHANNEL1 = $02;
  1047. USER_CHANNEL2 = $03;
  1048. USER_CHANNEL3 = $04;
  1049. USER_CHANNEL4 = $05;
  1050. USER_CHANNEL5 = $06;
  1051. USER_CHANNEL6 = $07;
  1052. USER_CHANNEL7 = $08;
  1053. end;
  1054. TFUSE = object //Fuses
  1055. WDTCFG: byte; //Watchdog Configuration
  1056. BODCFG: byte; //BOD Configuration
  1057. OSCCFG: byte; //Oscillator Configuration
  1058. Reserved3: byte;
  1059. Reserved4: byte;
  1060. SYSCFG0: byte; //System Configuration 0
  1061. SYSCFG1: byte; //System Configuration 1
  1062. CODESIZE: byte; //Code Section Size
  1063. BOOTSIZE: byte; //Boot Section Size
  1064. Reserved9: byte;
  1065. PDICFG: word; //Programming and Debugging Interface Configuration
  1066. const
  1067. // FUSE_PERIOD
  1068. PERIODmask = $0F;
  1069. PERIOD_OFF = $00;
  1070. PERIOD_8CLK = $01;
  1071. PERIOD_16CLK = $02;
  1072. PERIOD_32CLK = $03;
  1073. PERIOD_64CLK = $04;
  1074. PERIOD_128CLK = $05;
  1075. PERIOD_256CLK = $06;
  1076. PERIOD_512CLK = $07;
  1077. PERIOD_1KCLK = $08;
  1078. PERIOD_2KCLK = $09;
  1079. PERIOD_4KCLK = $0A;
  1080. PERIOD_8KCLK = $0B;
  1081. // FUSE_WINDOW
  1082. WINDOWmask = $F0;
  1083. WINDOW_OFF = $00;
  1084. WINDOW_8CLK = $10;
  1085. WINDOW_16CLK = $20;
  1086. WINDOW_32CLK = $30;
  1087. WINDOW_64CLK = $40;
  1088. WINDOW_128CLK = $50;
  1089. WINDOW_256CLK = $60;
  1090. WINDOW_512CLK = $70;
  1091. WINDOW_1KCLK = $80;
  1092. WINDOW_2KCLK = $90;
  1093. WINDOW_4KCLK = $A0;
  1094. WINDOW_8KCLK = $B0;
  1095. // FUSE_SLEEP
  1096. SLEEPmask = $03;
  1097. SLEEP_DISABLE = $00;
  1098. SLEEP_ENABLE = $01;
  1099. SLEEP_SAMPLE = $02;
  1100. // FUSE_ACTIVE
  1101. ACTIVEmask = $0C;
  1102. ACTIVE_DISABLE = $00;
  1103. ACTIVE_ENABLE = $04;
  1104. ACTIVE_SAMPLE = $08;
  1105. ACTIVE_ENABLEWAIT = $0C;
  1106. // FUSE_SAMPFREQ
  1107. SAMPFREQmask = $10;
  1108. SAMPFREQ_128Hz = $00;
  1109. SAMPFREQ_32Hz = $10;
  1110. // FUSE_LVL
  1111. LVLmask = $E0;
  1112. LVL_BODLEVEL0 = $00;
  1113. LVL_BODLEVEL1 = $20;
  1114. LVL_BODLEVEL2 = $40;
  1115. LVL_BODLEVEL3 = $60;
  1116. // FUSE_CLKSEL
  1117. CLKSELmask = $07;
  1118. CLKSEL_OSCHF = $00;
  1119. CLKSEL_OSC32K = $01;
  1120. // EEPROM Save
  1121. EESAVEbm = $01;
  1122. // FUSE_RSTPINCFG
  1123. RSTPINCFGmask = $0C;
  1124. RSTPINCFG_GPIO = $00;
  1125. RSTPINCFG_RST = $08;
  1126. // FUSE_CRCSEL
  1127. CRCSELmask = $20;
  1128. CRCSEL_CRC16 = $00;
  1129. CRCSEL_CRC32 = $20;
  1130. // FUSE_CRCSRC
  1131. CRCSRCmask = $C0;
  1132. CRCSRC_FLASH = $00;
  1133. CRCSRC_BOOT = $40;
  1134. CRCSRC_BOOTAPP = $80;
  1135. CRCSRC_NOCRC = $C0;
  1136. // FUSE_SUT
  1137. SUTmask = $07;
  1138. SUT_0MS = $00;
  1139. SUT_1MS = $01;
  1140. SUT_2MS = $02;
  1141. SUT_4MS = $03;
  1142. SUT_8MS = $04;
  1143. SUT_16MS = $05;
  1144. SUT_32MS = $06;
  1145. SUT_64MS = $07;
  1146. // FUSE_LEVEL
  1147. LEVELmask = $03;
  1148. LEVEL_NVMACCDIS = $02;
  1149. LEVEL_BASIC = $03;
  1150. // FUSE_KEY
  1151. KEYmask = $FFF0;
  1152. KEY_NOTACT = $00;
  1153. KEY_NVMACT = $B450;
  1154. end;
  1155. TGPR = object //General Purpose Registers
  1156. GPR0: byte; //General Purpose Register 0
  1157. GPR1: byte; //General Purpose Register 1
  1158. GPR2: byte; //General Purpose Register 2
  1159. GPR3: byte; //General Purpose Register 3
  1160. end;
  1161. TLOCK = object //Lockbits
  1162. KEY: dword; //Lock Key Bits
  1163. const
  1164. // LOCK_KEY
  1165. KEYmask = $FFFFFFFF;
  1166. KEY_NOLOCK = $5CC5C55C;
  1167. KEY_RWLOCK = $A33A3AA3;
  1168. end;
  1169. TNVMCTRL = object //Non-volatile Memory Controller
  1170. CTRLA: byte; //Control A
  1171. CTRLB: byte; //Control B
  1172. STATUS: byte; //Status
  1173. INTCTRL: byte; //Interrupt Control
  1174. INTFLAGS: byte; //Interrupt Flags
  1175. Reserved5: byte;
  1176. DATA: word; //Data
  1177. ADDR: dword; //Address
  1178. const
  1179. // NVMCTRL_CMD
  1180. CMDmask = $7F;
  1181. CMD_NONE = $00;
  1182. CMD_NOOP = $01;
  1183. CMD_FLWR = $02;
  1184. CMD_FLPER = $08;
  1185. CMD_FLMPER2 = $09;
  1186. CMD_FLMPER4 = $0A;
  1187. CMD_FLMPER8 = $0B;
  1188. CMD_FLMPER16 = $0C;
  1189. CMD_FLMPER32 = $0D;
  1190. CMD_EEWR = $12;
  1191. CMD_EEERWR = $13;
  1192. CMD_EEBER = $18;
  1193. CMD_EEMBER2 = $19;
  1194. CMD_EEMBER4 = $1A;
  1195. CMD_EEMBER8 = $1B;
  1196. CMD_EEMBER16 = $1C;
  1197. CMD_EEMBER32 = $1D;
  1198. CMD_CHER = $20;
  1199. CMD_EECHER = $30;
  1200. // Application Code Write Protect
  1201. APPCODEWPbm = $01;
  1202. // Boot Read Protect
  1203. BOOTRPbm = $02;
  1204. // Application Data Write Protect
  1205. APPDATAWPbm = $04;
  1206. // NVMCTRL_FLMAP
  1207. FLMAPmask = $30;
  1208. FLMAP_SECTION0 = $00;
  1209. FLMAP_SECTION1 = $10;
  1210. FLMAP_SECTION2 = $20;
  1211. FLMAP_SECTION3 = $30;
  1212. // Flash Mapping Lock
  1213. FLMAPLOCKbm = $80;
  1214. // Flash busy
  1215. FBUSYbm = $01;
  1216. // EEPROM busy
  1217. EEBUSYbm = $02;
  1218. // NVMCTRL_ERROR
  1219. ERRORmask = $70;
  1220. ERROR_NOERROR = $00;
  1221. ERROR_ILLEGALCMD = $10;
  1222. ERROR_ILLEGALSADDR = $20;
  1223. ERROR_DOUBLESELECT = $30;
  1224. ERROR_ONGOINGPROG = $40;
  1225. // EEPROM Ready
  1226. EEREADYbm = $01;
  1227. end;
  1228. TPORT = object //I/O Ports
  1229. DIR: byte; //Data Direction
  1230. DIRSET: byte; //Data Direction Set
  1231. DIRCLR: byte; //Data Direction Clear
  1232. DIRTGL: byte; //Data Direction Toggle
  1233. OUT_: byte; //Output Value
  1234. OUTSET: byte; //Output Value Set
  1235. OUTCLR: byte; //Output Value Clear
  1236. OUTTGL: byte; //Output Value Toggle
  1237. IN_: byte; //Input Value
  1238. INTFLAGS: byte; //Interrupt Flags
  1239. PORTCTRL: byte; //Port Control
  1240. PINCONFIG: byte; //Pin Control Config
  1241. PINCTRLUPD: byte; //Pin Control Update
  1242. PINCTRLSET: byte; //Pin Control Set
  1243. PINCTRLCLR: byte; //Pin Control Clear
  1244. Reserved15: byte;
  1245. PIN0CTRL: byte; //Pin 0 Control
  1246. PIN1CTRL: byte; //Pin 1 Control
  1247. PIN2CTRL: byte; //Pin 2 Control
  1248. PIN3CTRL: byte; //Pin 3 Control
  1249. PIN4CTRL: byte; //Pin 4 Control
  1250. PIN5CTRL: byte; //Pin 5 Control
  1251. PIN6CTRL: byte; //Pin 6 Control
  1252. PIN7CTRL: byte; //Pin 7 Control
  1253. const
  1254. // Slew Rate Limit Enable
  1255. SRLbm = $01;
  1256. // PORT_ISC
  1257. ISCmask = $07;
  1258. ISC_INTDISABLE = $00;
  1259. ISC_BOTHEDGES = $01;
  1260. ISC_RISING = $02;
  1261. ISC_FALLING = $03;
  1262. ISC_INPUT_DISABLE = $04;
  1263. ISC_LEVEL = $05;
  1264. // Pullup enable
  1265. PULLUPENbm = $08;
  1266. // Inverted I/O Enable
  1267. INVENbm = $80;
  1268. end;
  1269. TPORTMUX = object //Port Multiplexer
  1270. EVSYSROUTEA: byte; //EVSYS route A
  1271. CCLROUTEA: byte; //CCL route A
  1272. USARTROUTEA: byte; //USART route A
  1273. Reserved3: byte;
  1274. SPIROUTEA: byte; //SPI route A
  1275. TWIROUTEA: byte; //TWI route A
  1276. TCAROUTEA: byte; //TCA route A
  1277. TCBROUTEA: byte; //TCB route A
  1278. TCDROUTEA: byte; //TCD route A
  1279. ACROUTEA: byte; //AC route A
  1280. ZCDROUTEA: byte; //ZCD route A
  1281. const
  1282. // PORTMUX_EVOUTA
  1283. EVOUTAmask = $01;
  1284. EVOUTA_DEFAULT = $00;
  1285. EVOUTA_ALT1 = $01;
  1286. // PORTMUX_EVOUTC
  1287. EVOUTCmask = $04;
  1288. EVOUTC_DEFAULT = $00;
  1289. // PORTMUX_EVOUTD
  1290. EVOUTDmask = $08;
  1291. EVOUTD_DEFAULT = $00;
  1292. EVOUTD_ALT1 = $08;
  1293. // PORTMUX_EVOUTF
  1294. EVOUTFmask = $20;
  1295. EVOUTF_DEFAULT = $00;
  1296. // PORTMUX_LUT0
  1297. LUT0mask = $01;
  1298. LUT0_DEFAULT = $00;
  1299. LUT0_ALT1 = $01;
  1300. // PORTMUX_LUT1
  1301. LUT1mask = $02;
  1302. LUT1_DEFAULT = $00;
  1303. LUT1_ALT1 = $02;
  1304. // PORTMUX_LUT2
  1305. LUT2mask = $04;
  1306. LUT2_DEFAULT = $00;
  1307. LUT2_ALT1 = $04;
  1308. // PORTMUX_LUT3
  1309. LUT3mask = $08;
  1310. LUT3_DEFAULT = $00;
  1311. // PORTMUX_USART0
  1312. USART0mask = $03;
  1313. USART0_DEFAULT = $00;
  1314. USART0_ALT1 = $01;
  1315. USART0_NONE = $03;
  1316. // PORTMUX_USART1
  1317. USART1mask = $0C;
  1318. USART1_DEFAULT = $00;
  1319. USART1_NONE = $0C;
  1320. // PORTMUX_USART2
  1321. USART2mask = $30;
  1322. USART2_DEFAULT = $00;
  1323. USART2_ALT1 = $10;
  1324. USART2_NONE = $30;
  1325. // PORTMUX_SPI0
  1326. SPI0mask = $03;
  1327. SPI0_DEFAULT = $00;
  1328. SPI0_NONE = $03;
  1329. // PORTMUX_SPI1
  1330. SPI1mask = $0C;
  1331. SPI1_DEFAULT = $00;
  1332. SPI1_NONE = $0C;
  1333. // PORTMUX_TWI0
  1334. TWI0mask = $03;
  1335. TWI0_DEFAULT = $00;
  1336. TWI0_ALT1 = $01;
  1337. TWI0_ALT2 = $02;
  1338. // PORTMUX_TWI1
  1339. TWI1mask = $0C;
  1340. TWI1_DEFAULT = $00;
  1341. TWI1_ALT1 = $04;
  1342. // PORTMUX_TCA0
  1343. TCA0mask = $07;
  1344. TCA0_PORTA = $00;
  1345. TCA0_PORTC = $02;
  1346. TCA0_PORTD = $03;
  1347. TCA0_PORTF = $05;
  1348. // PORTMUX_TCB0
  1349. TCB0mask = $01;
  1350. TCB0_DEFAULT = $00;
  1351. TCB0_ALT1 = $01;
  1352. // PORTMUX_TCB1
  1353. TCB1mask = $02;
  1354. TCB1_DEFAULT = $00;
  1355. TCB1_ALT1 = $02;
  1356. // PORTMUX_TCB2
  1357. TCB2mask = $04;
  1358. TCB2_DEFAULT = $00;
  1359. // PORTMUX_TCD0
  1360. TCD0mask = $07;
  1361. TCD0_DEFAULT = $00;
  1362. TCD0_ALT2 = $02;
  1363. // PORTMUX_AC0
  1364. AC0mask = $01;
  1365. AC0_DEFAULT = $00;
  1366. // PORTMUX_AC1
  1367. AC1mask = $02;
  1368. AC1_DEFAULT = $00;
  1369. // PORTMUX_AC2
  1370. AC2mask = $04;
  1371. AC2_DEFAULT = $00;
  1372. // PORTMUX_ZCD0
  1373. ZCD0mask = $01;
  1374. ZCD0_DEFAULT = $00;
  1375. end;
  1376. TRSTCTRL = object //Reset controller
  1377. RSTFR: byte; //Reset Flags
  1378. SWRR: byte; //Software Reset
  1379. const
  1380. // Power on Reset flag
  1381. PORFbm = $01;
  1382. // Brown out detector Reset flag
  1383. BORFbm = $02;
  1384. // External Reset flag
  1385. EXTRFbm = $04;
  1386. // Watch dog Reset flag
  1387. WDRFbm = $08;
  1388. // Software Reset flag
  1389. SWRFbm = $10;
  1390. // UPDI Reset flag
  1391. UPDIRFbm = $20;
  1392. // Software reset enable
  1393. SWRSTbm = $01;
  1394. end;
  1395. TRTC = object //Real-Time Counter
  1396. CTRLA: byte; //Control A
  1397. STATUS: byte; //Status
  1398. INTCTRL: byte; //Interrupt Control
  1399. INTFLAGS: byte; //Interrupt Flags
  1400. TEMP: byte; //Temporary
  1401. DBGCTRL: byte; //Debug control
  1402. CALIB: byte; //Calibration
  1403. CLKSEL: byte; //Clock Select
  1404. CNT: word; //Counter
  1405. PER: word; //Period
  1406. CMP: word; //Compare
  1407. Reserved14: byte;
  1408. Reserved15: byte;
  1409. PITCTRLA: byte; //PIT Control A
  1410. PITSTATUS: byte; //PIT Status
  1411. PITINTCTRL: byte; //PIT Interrupt Control
  1412. PITINTFLAGS: byte; //PIT Interrupt Flags
  1413. Reserved20: byte;
  1414. PITDBGCTRL: byte; //PIT Debug control
  1415. const
  1416. // Enable
  1417. RTCENbm = $01;
  1418. // Correction enable
  1419. CORRENbm = $04;
  1420. // RTC_PRESCALER
  1421. PRESCALERmask = $78;
  1422. PRESCALER_DIV1 = $00;
  1423. PRESCALER_DIV2 = $08;
  1424. PRESCALER_DIV4 = $10;
  1425. PRESCALER_DIV8 = $18;
  1426. PRESCALER_DIV16 = $20;
  1427. PRESCALER_DIV32 = $28;
  1428. PRESCALER_DIV64 = $30;
  1429. PRESCALER_DIV128 = $38;
  1430. PRESCALER_DIV256 = $40;
  1431. PRESCALER_DIV512 = $48;
  1432. PRESCALER_DIV1024 = $50;
  1433. PRESCALER_DIV2048 = $58;
  1434. PRESCALER_DIV4096 = $60;
  1435. PRESCALER_DIV8192 = $68;
  1436. PRESCALER_DIV16384 = $70;
  1437. PRESCALER_DIV32768 = $78;
  1438. // Run In Standby
  1439. RUNSTDBYbm = $80;
  1440. // CTRLA Synchronization Busy Flag
  1441. CTRLABUSYbm = $01;
  1442. // Count Synchronization Busy Flag
  1443. CNTBUSYbm = $02;
  1444. // Period Synchronization Busy Flag
  1445. PERBUSYbm = $04;
  1446. // Comparator Synchronization Busy Flag
  1447. CMPBUSYbm = $08;
  1448. // Overflow Interrupt enable
  1449. OVFbm = $01;
  1450. // Compare Match Interrupt enable
  1451. CMPbm = $02;
  1452. // Run in debug
  1453. DBGRUNbm = $01;
  1454. // Error Correction Value
  1455. ERROR0bm = $01;
  1456. ERROR1bm = $02;
  1457. ERROR2bm = $04;
  1458. ERROR3bm = $08;
  1459. ERROR4bm = $10;
  1460. ERROR5bm = $20;
  1461. ERROR6bm = $40;
  1462. // Error Correction Sign Bit
  1463. SIGNbm = $80;
  1464. // RTC_CLKSEL
  1465. CLKSELmask = $03;
  1466. CLKSEL_OSC32K = $00;
  1467. CLKSEL_OSC1K = $01;
  1468. CLKSEL_XOSC32K = $02;
  1469. CLKSEL_EXTCLK = $03;
  1470. // Enable
  1471. PITENbm = $01;
  1472. // RTC_PERIOD
  1473. PERIODmask = $78;
  1474. PERIOD_OFF = $00;
  1475. PERIOD_CYC4 = $08;
  1476. PERIOD_CYC8 = $10;
  1477. PERIOD_CYC16 = $18;
  1478. PERIOD_CYC32 = $20;
  1479. PERIOD_CYC64 = $28;
  1480. PERIOD_CYC128 = $30;
  1481. PERIOD_CYC256 = $38;
  1482. PERIOD_CYC512 = $40;
  1483. PERIOD_CYC1024 = $48;
  1484. PERIOD_CYC2048 = $50;
  1485. PERIOD_CYC4096 = $58;
  1486. PERIOD_CYC8192 = $60;
  1487. PERIOD_CYC16384 = $68;
  1488. PERIOD_CYC32768 = $70;
  1489. // CTRLA Synchronization Busy Flag
  1490. CTRLBUSYbm = $01;
  1491. // Periodic Interrupt
  1492. PIbm = $01;
  1493. end;
  1494. TSIGROW = object //Signature row
  1495. DEVICEID0: byte; //Device ID Byte 0
  1496. DEVICEID1: byte; //Device ID Byte 1
  1497. DEVICEID2: byte; //Device ID Byte 2
  1498. Reserved3: byte;
  1499. TEMPSENSE0: word; //Temperature Calibration 0
  1500. TEMPSENSE1: word; //Temperature Calibration 1
  1501. Reserved8: byte;
  1502. Reserved9: byte;
  1503. Reserved10: byte;
  1504. Reserved11: byte;
  1505. Reserved12: byte;
  1506. Reserved13: byte;
  1507. Reserved14: byte;
  1508. Reserved15: byte;
  1509. SERNUM0: byte; //LOTNUM0
  1510. SERNUM1: byte; //LOTNUM1
  1511. SERNUM2: byte; //LOTNUM2
  1512. SERNUM3: byte; //LOTNUM3
  1513. SERNUM4: byte; //LOTNUM4
  1514. SERNUM5: byte; //LOTNUM5
  1515. SERNUM6: byte; //RANDOM
  1516. SERNUM7: byte; //SCRIBE
  1517. SERNUM8: byte; //XPOS0
  1518. SERNUM9: byte; //XPOS1
  1519. SERNUM10: byte; //YPOS0
  1520. SERNUM11: byte; //YPOS1
  1521. SERNUM12: byte; //RES0
  1522. SERNUM13: byte; //RES1
  1523. SERNUM14: byte; //RES2
  1524. SERNUM15: byte; //RES3
  1525. end;
  1526. TSLPCTRL = object //Sleep Controller
  1527. CTRLA: byte; //Control A
  1528. VREGCTRL: byte; //Control B
  1529. const
  1530. // Sleep enable
  1531. SENbm = $01;
  1532. // SLPCTRL_SMODE
  1533. SMODEmask = $06;
  1534. SMODE_IDLE = $00;
  1535. SMODE_STDBY = $02;
  1536. SMODE_PDOWN = $04;
  1537. // SLPCTRL_PMODE
  1538. PMODEmask = $07;
  1539. PMODE_AUTO = $00;
  1540. PMODE_FULL = $01;
  1541. // SLPCTRL_HTLLEN
  1542. HTLLENmask = $10;
  1543. HTLLEN_OFF = $00;
  1544. HTLLEN_ON = $10;
  1545. end;
  1546. TSPI = object //Serial Peripheral Interface
  1547. CTRLA: byte; //Control A
  1548. CTRLB: byte; //Control B
  1549. INTCTRL: byte; //Interrupt Control
  1550. INTFLAGS: byte; //Interrupt Flags
  1551. DATA: byte; //Data
  1552. const
  1553. // Enable Module
  1554. ENABLEbm = $01;
  1555. // SPI_PRESC
  1556. PRESCmask = $06;
  1557. PRESC_DIV4 = $00;
  1558. PRESC_DIV16 = $02;
  1559. PRESC_DIV64 = $04;
  1560. PRESC_DIV128 = $06;
  1561. // Enable Double Speed
  1562. CLK2Xbm = $10;
  1563. // Host Operation Enable
  1564. MASTERbm = $20;
  1565. // Data Order Setting
  1566. DORDbm = $40;
  1567. // SPI_MODE
  1568. MODEmask = $03;
  1569. MODE_0 = $00;
  1570. MODE_1 = $01;
  1571. MODE_2 = $02;
  1572. MODE_3 = $03;
  1573. // SPI Select Disable
  1574. SSDbm = $04;
  1575. // Buffer Mode Wait for Receive
  1576. BUFWRbm = $40;
  1577. // Buffer Mode Enable
  1578. BUFENbm = $80;
  1579. // Interrupt Enable
  1580. IEbm = $01;
  1581. // SPI Select Trigger Interrupt Enable
  1582. SSIEbm = $10;
  1583. // Data Register Empty Interrupt Enable
  1584. DREIEbm = $20;
  1585. // Transfer Complete Interrupt Enable
  1586. TXCIEbm = $40;
  1587. // Receive Complete Interrupt Enable
  1588. RXCIEbm = $80;
  1589. end;
  1590. TSYSCFG = object //System Configuration Registers
  1591. Reserved0: byte;
  1592. REVID: byte; //Revision ID
  1593. Reserved2: byte;
  1594. Reserved3: byte;
  1595. Reserved4: byte;
  1596. Reserved5: byte;
  1597. Reserved6: byte;
  1598. Reserved7: byte;
  1599. Reserved8: byte;
  1600. Reserved9: byte;
  1601. Reserved10: byte;
  1602. Reserved11: byte;
  1603. Reserved12: byte;
  1604. Reserved13: byte;
  1605. Reserved14: byte;
  1606. Reserved15: byte;
  1607. Reserved16: byte;
  1608. Reserved17: byte;
  1609. Reserved18: byte;
  1610. Reserved19: byte;
  1611. Reserved20: byte;
  1612. Reserved21: byte;
  1613. Reserved22: byte;
  1614. Reserved23: byte;
  1615. OCDMCTRL: byte; //OCD Message Control
  1616. OCDMSTATUS: byte; //OCD Message Status
  1617. const
  1618. // OCD Message Read
  1619. OCDMRbm = $01;
  1620. end;
  1621. TTCA = object //16-bit Timer/Counter Type A
  1622. end;
  1623. TTCB = object //16-bit Timer Type B
  1624. CTRLA: byte; //Control A
  1625. CTRLB: byte; //Control Register B
  1626. Reserved2: byte;
  1627. Reserved3: byte;
  1628. EVCTRL: byte; //Event Control
  1629. INTCTRL: byte; //Interrupt Control
  1630. INTFLAGS: byte; //Interrupt Flags
  1631. STATUS: byte; //Status
  1632. DBGCTRL: byte; //Debug Control
  1633. TEMP: byte; //Temporary Value
  1634. CNT: word; //Count
  1635. CCMP: word; //Compare or Capture
  1636. const
  1637. // Enable
  1638. ENABLEbm = $01;
  1639. // TCB_CLKSEL
  1640. CLKSELmask = $0E;
  1641. CLKSEL_DIV1 = $00;
  1642. CLKSEL_DIV2 = $02;
  1643. CLKSEL_TCA0 = $04;
  1644. CLKSEL_EVENT = $0E;
  1645. // Synchronize Update
  1646. SYNCUPDbm = $10;
  1647. // Cascade two timers
  1648. CASCADEbm = $20;
  1649. // Run Standby
  1650. RUNSTDBYbm = $40;
  1651. // TCB_CNTMODE
  1652. CNTMODEmask = $07;
  1653. CNTMODE_INT = $00;
  1654. CNTMODE_TIMEOUT = $01;
  1655. CNTMODE_CAPT = $02;
  1656. CNTMODE_FRQ = $03;
  1657. CNTMODE_PW = $04;
  1658. CNTMODE_FRQPW = $05;
  1659. CNTMODE_SINGLE = $06;
  1660. CNTMODE_PWM8 = $07;
  1661. // Pin Output Enable
  1662. CCMPENbm = $10;
  1663. // Pin Initial State
  1664. CCMPINITbm = $20;
  1665. // Asynchronous Enable
  1666. ASYNCbm = $40;
  1667. // Event Input Enable
  1668. CAPTEIbm = $01;
  1669. // Event Edge
  1670. EDGEbm = $10;
  1671. // Input Capture Noise Cancellation Filter
  1672. FILTERbm = $40;
  1673. // Capture or Timeout
  1674. CAPTbm = $01;
  1675. // Overflow
  1676. OVFbm = $02;
  1677. // Run
  1678. RUNbm = $01;
  1679. // Debug Run
  1680. DBGRUNbm = $01;
  1681. end;
  1682. TTCD = object //Timer Counter D
  1683. CTRLA: byte; //Control A
  1684. CTRLB: byte; //Control B
  1685. CTRLC: byte; //Control C
  1686. CTRLD: byte; //Control D
  1687. CTRLE: byte; //Control E
  1688. Reserved5: byte;
  1689. Reserved6: byte;
  1690. Reserved7: byte;
  1691. EVCTRLA: byte; //EVCTRLA
  1692. EVCTRLB: byte; //EVCTRLB
  1693. Reserved10: byte;
  1694. Reserved11: byte;
  1695. INTCTRL: byte; //Interrupt Control
  1696. INTFLAGS: byte; //Interrupt Flags
  1697. STATUS: byte; //Status
  1698. Reserved15: byte;
  1699. INPUTCTRLA: byte; //Input Control A
  1700. INPUTCTRLB: byte; //Input Control B
  1701. FAULTCTRL: byte; //Fault Control
  1702. Reserved19: byte;
  1703. DLYCTRL: byte; //Delay Control
  1704. DLYVAL: byte; //Delay value
  1705. Reserved22: byte;
  1706. Reserved23: byte;
  1707. DITCTRL: byte; //Dither Control A
  1708. DITVAL: byte; //Dither value
  1709. Reserved26: byte;
  1710. Reserved27: byte;
  1711. Reserved28: byte;
  1712. Reserved29: byte;
  1713. DBGCTRL: byte; //Debug Control
  1714. Reserved31: byte;
  1715. Reserved32: byte;
  1716. Reserved33: byte;
  1717. CAPTUREA: word; //Capture A
  1718. CAPTUREB: word; //Capture B
  1719. Reserved38: byte;
  1720. Reserved39: byte;
  1721. CMPASET: word; //Compare A Set
  1722. CMPACLR: word; //Compare A Clear
  1723. CMPBSET: word; //Compare B Set
  1724. CMPBCLR: word; //Compare B Clear
  1725. const
  1726. // Enable
  1727. ENABLEbm = $01;
  1728. // TCD_SYNCPRES
  1729. SYNCPRESmask = $06;
  1730. SYNCPRES_DIV1 = $00;
  1731. SYNCPRES_DIV2 = $02;
  1732. SYNCPRES_DIV4 = $04;
  1733. SYNCPRES_DIV8 = $06;
  1734. // TCD_CNTPRES
  1735. CNTPRESmask = $18;
  1736. CNTPRES_DIV1 = $00;
  1737. CNTPRES_DIV4 = $08;
  1738. CNTPRES_DIV32 = $10;
  1739. // TCD_CLKSEL
  1740. CLKSELmask = $60;
  1741. CLKSEL_OSCHF = $00;
  1742. CLKSEL_PLL = $20;
  1743. CLKSEL_EXTCLK = $40;
  1744. CLKSEL_CLKPER = $60;
  1745. // TCD_WGMODE
  1746. WGMODEmask = $03;
  1747. WGMODE_ONERAMP = $00;
  1748. WGMODE_TWORAMP = $01;
  1749. WGMODE_FOURRAMP = $02;
  1750. WGMODE_DS = $03;
  1751. // Compare output value override
  1752. CMPOVRbm = $01;
  1753. // Auto update
  1754. AUPDATEbm = $02;
  1755. // Fifty percent waveform
  1756. FIFTYbm = $08;
  1757. // TCD_CMPCSEL
  1758. CMPCSELmask = $40;
  1759. CMPCSEL_PWMA = $00;
  1760. CMPCSEL_PWMB = $40;
  1761. // TCD_CMPDSEL
  1762. CMPDSELmask = $80;
  1763. CMPDSEL_PWMA = $00;
  1764. CMPDSEL_PWMB = $80;
  1765. // Compare A value
  1766. CMPAVAL0bm = $01;
  1767. CMPAVAL1bm = $02;
  1768. CMPAVAL2bm = $04;
  1769. CMPAVAL3bm = $08;
  1770. // Compare B value
  1771. CMPBVAL0bm = $10;
  1772. CMPBVAL1bm = $20;
  1773. CMPBVAL2bm = $40;
  1774. CMPBVAL3bm = $80;
  1775. // Synchronize end of cycle strobe
  1776. SYNCEOCbm = $01;
  1777. // synchronize strobe
  1778. SYNCbm = $02;
  1779. // Restart strobe
  1780. RESTARTbm = $04;
  1781. // Software Capture A Strobe
  1782. SCAPTUREAbm = $08;
  1783. // Software Capture B Strobe
  1784. SCAPTUREBbm = $10;
  1785. // Disable at end of cycle
  1786. DISEOCbm = $80;
  1787. // Trigger event enable
  1788. TRIGEIbm = $01;
  1789. // TCD_ACTION
  1790. ACTIONmask = $04;
  1791. ACTION_FAULT = $00;
  1792. ACTION_CAPTURE = $04;
  1793. // TCD_EDGE
  1794. EDGEmask = $10;
  1795. EDGE_FALL_LOW = $00;
  1796. EDGE_RISE_HIGH = $10;
  1797. // TCD_CFG
  1798. CFGmask = $C0;
  1799. CFG_NEITHER = $00;
  1800. CFG_FILTER = $40;
  1801. CFG_ASYNC = $80;
  1802. // Overflow interrupt enable
  1803. OVFbm = $01;
  1804. // Trigger A interrupt enable
  1805. TRIGAbm = $04;
  1806. // Trigger B interrupt enable
  1807. TRIGBbm = $08;
  1808. // Enable ready
  1809. ENRDYbm = $01;
  1810. // Command ready
  1811. CMDRDYbm = $02;
  1812. // PWM activity on A
  1813. PWMACTAbm = $40;
  1814. // PWM activity on B
  1815. PWMACTBbm = $80;
  1816. // TCD_INPUTMODE
  1817. INPUTMODEmask = $0F;
  1818. INPUTMODE_NONE = $00;
  1819. INPUTMODE_JMPWAIT = $01;
  1820. INPUTMODE_EXECWAIT = $02;
  1821. INPUTMODE_EXECFAULT = $03;
  1822. INPUTMODE_FREQ = $04;
  1823. INPUTMODE_EXECDT = $05;
  1824. INPUTMODE_WAIT = $06;
  1825. INPUTMODE_WAITSW = $07;
  1826. INPUTMODE_EDGETRIG = $08;
  1827. INPUTMODE_EDGETRIGFREQ = $09;
  1828. INPUTMODE_LVLTRIGFREQ = $0A;
  1829. // Compare A value
  1830. CMPAbm = $01;
  1831. // Compare B value
  1832. CMPBbm = $02;
  1833. // Compare C value
  1834. CMPCbm = $04;
  1835. // Compare D vaule
  1836. CMPDbm = $08;
  1837. // Compare A enable
  1838. CMPAENbm = $10;
  1839. // Compare B enable
  1840. CMPBENbm = $20;
  1841. // Compare C enable
  1842. CMPCENbm = $40;
  1843. // Compare D enable
  1844. CMPDENbm = $80;
  1845. // TCD_DLYSEL
  1846. DLYSELmask = $03;
  1847. DLYSEL_OFF = $00;
  1848. DLYSEL_INBLANK = $01;
  1849. DLYSEL_EVENT = $02;
  1850. // TCD_DLYTRIG
  1851. DLYTRIGmask = $0C;
  1852. DLYTRIG_CMPASET = $00;
  1853. DLYTRIG_CMPACLR = $04;
  1854. DLYTRIG_CMPBSET = $08;
  1855. DLYTRIG_CMPBCLR = $0C;
  1856. // TCD_DLYPRESC
  1857. DLYPRESCmask = $30;
  1858. DLYPRESC_DIV1 = $00;
  1859. DLYPRESC_DIV2 = $10;
  1860. DLYPRESC_DIV4 = $20;
  1861. DLYPRESC_DIV8 = $30;
  1862. // TCD_DITHERSEL
  1863. DITHERSELmask = $03;
  1864. DITHERSEL_ONTIMEB = $00;
  1865. DITHERSEL_ONTIMEAB = $01;
  1866. DITHERSEL_DEADTIMEB = $02;
  1867. DITHERSEL_DEADTIMEAB = $03;
  1868. // Dither value
  1869. DITHER0bm = $01;
  1870. DITHER1bm = $02;
  1871. DITHER2bm = $04;
  1872. DITHER3bm = $08;
  1873. // Debug run
  1874. DBGRUNbm = $01;
  1875. // Fault detection
  1876. FAULTDETbm = $04;
  1877. end;
  1878. TTWI = object //Two-Wire Interface
  1879. CTRLA: byte; //Control A
  1880. DUALCTRL: byte; //Dual Control
  1881. DBGCTRL: byte; //Debug Control Register
  1882. MCTRLA: byte; //Host Control A
  1883. MCTRLB: byte; //Host Control B
  1884. MSTATUS: byte; //Host Status
  1885. MBAUD: byte; //Host Baud Rate Control
  1886. MADDR: byte; //Host Address
  1887. MDATA: byte; //Host Data
  1888. SCTRLA: byte; //Client Control A
  1889. SCTRLB: byte; //Client Control B
  1890. SSTATUS: byte; //Client Status
  1891. SADDR: byte; //Client Address
  1892. SDATA: byte; //Client Data
  1893. SADDRMASK: byte; //Client Address Mask
  1894. const
  1895. // TWI_FMPEN
  1896. FMPENmask = $02;
  1897. FMPEN_OFF = $00;
  1898. FMPEN_ON = $02;
  1899. // TWI_SDAHOLD
  1900. SDAHOLDmask = $0C;
  1901. SDAHOLD_OFF = $00;
  1902. SDAHOLD_50NS = $04;
  1903. SDAHOLD_300NS = $08;
  1904. SDAHOLD_500NS = $0C;
  1905. // TWI_SDASETUP
  1906. SDASETUPmask = $10;
  1907. SDASETUP_4CYC = $00;
  1908. SDASETUP_8CYC = $10;
  1909. // TWI_INPUTLVL
  1910. INPUTLVLmask = $40;
  1911. INPUTLVL_I2C = $00;
  1912. INPUTLVL_SMBUS = $40;
  1913. // Dual Control Enable
  1914. ENABLEbm = $01;
  1915. // Debug Run
  1916. DBGRUNbm = $01;
  1917. // Smart Mode Enable
  1918. SMENbm = $02;
  1919. // TWI_TIMEOUT
  1920. TIMEOUTmask = $0C;
  1921. TIMEOUT_DISABLED = $00;
  1922. TIMEOUT_50US = $04;
  1923. TIMEOUT_100US = $08;
  1924. TIMEOUT_200US = $0C;
  1925. // Quick Command Enable
  1926. QCENbm = $10;
  1927. // Write Interrupt Enable
  1928. WIENbm = $40;
  1929. // Read Interrupt Enable
  1930. RIENbm = $80;
  1931. // TWI_MCMD
  1932. MCMDmask = $03;
  1933. MCMD_NOACT = $00;
  1934. MCMD_REPSTART = $01;
  1935. MCMD_RECVTRANS = $02;
  1936. MCMD_STOP = $03;
  1937. // TWI_ACKACT
  1938. ACKACTmask = $04;
  1939. ACKACT_ACK = $00;
  1940. ACKACT_NACK = $04;
  1941. // Flush
  1942. FLUSHbm = $08;
  1943. // TWI_BUSSTATE
  1944. BUSSTATEmask = $03;
  1945. BUSSTATE_UNKNOWN = $00;
  1946. BUSSTATE_IDLE = $01;
  1947. BUSSTATE_OWNER = $02;
  1948. BUSSTATE_BUSY = $03;
  1949. // Bus Error
  1950. BUSERRbm = $04;
  1951. // Arbitration Lost
  1952. ARBLOSTbm = $08;
  1953. // Received Acknowledge
  1954. RXACKbm = $10;
  1955. // Clock Hold
  1956. CLKHOLDbm = $20;
  1957. // Write Interrupt Flag
  1958. WIFbm = $40;
  1959. // Read Interrupt Flag
  1960. RIFbm = $80;
  1961. // Promiscuous Mode Enable
  1962. PMENbm = $04;
  1963. // Stop Interrupt Enable
  1964. PIENbm = $20;
  1965. // Address/Stop Interrupt Enable
  1966. APIENbm = $40;
  1967. // Data Interrupt Enable
  1968. DIENbm = $80;
  1969. // TWI_SCMD
  1970. SCMDmask = $03;
  1971. SCMD_NOACT = $00;
  1972. SCMD_COMPTRANS = $02;
  1973. SCMD_RESPONSE = $03;
  1974. // TWI_AP
  1975. APmask = $01;
  1976. AP_STOP = $00;
  1977. AP_ADR = $01;
  1978. // Read/Write Direction
  1979. DIRbm = $02;
  1980. // Collision
  1981. COLLbm = $08;
  1982. // Address/Stop Interrupt Flag
  1983. APIFbm = $40;
  1984. // Data Interrupt Flag
  1985. DIFbm = $80;
  1986. // Address Enable
  1987. ADDRENbm = $01;
  1988. // Address Mask
  1989. ADDRMASK0bm = $02;
  1990. ADDRMASK1bm = $04;
  1991. ADDRMASK2bm = $08;
  1992. ADDRMASK3bm = $10;
  1993. ADDRMASK4bm = $20;
  1994. ADDRMASK5bm = $40;
  1995. ADDRMASK6bm = $80;
  1996. end;
  1997. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1998. RXDATAL: byte; //Receive Data Low Byte
  1999. RXDATAH: byte; //Receive Data High Byte
  2000. TXDATAL: byte; //Transmit Data Low Byte
  2001. TXDATAH: byte; //Transmit Data High Byte
  2002. STATUS: byte; //Status
  2003. CTRLA: byte; //Control A
  2004. CTRLB: byte; //Control B
  2005. CTRLC: byte; //Control C
  2006. BAUD: word; //Baud Rate
  2007. CTRLD: byte; //Control D
  2008. DBGCTRL: byte; //Debug Control
  2009. EVCTRL: byte; //Event Control
  2010. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  2011. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  2012. const
  2013. // Receiver Data Register
  2014. DATA8bm = $01;
  2015. // Parity Error
  2016. PERRbm = $02;
  2017. // Frame Error
  2018. FERRbm = $04;
  2019. // Buffer Overflow
  2020. BUFOVFbm = $40;
  2021. // Receive Complete Interrupt Flag
  2022. RXCIFbm = $80;
  2023. // Wait For Break
  2024. WFBbm = $01;
  2025. // Break Detected Flag
  2026. BDFbm = $02;
  2027. // Inconsistent Sync Field Interrupt Flag
  2028. ISFIFbm = $08;
  2029. // Receive Start Interrupt
  2030. RXSIFbm = $10;
  2031. // Data Register Empty Flag
  2032. DREIFbm = $20;
  2033. // Transmit Interrupt Flag
  2034. TXCIFbm = $40;
  2035. // USART_RS485
  2036. RS485mask = $01;
  2037. RS485_DISABLE = $00;
  2038. RS485_ENABLE = $01;
  2039. // Auto-baud Error Interrupt Enable
  2040. ABEIEbm = $04;
  2041. // Loop-back Mode Enable
  2042. LBMEbm = $08;
  2043. // Receiver Start Frame Interrupt Enable
  2044. RXSIEbm = $10;
  2045. // Data Register Empty Interrupt Enable
  2046. DREIEbm = $20;
  2047. // Transmit Complete Interrupt Enable
  2048. TXCIEbm = $40;
  2049. // Receive Complete Interrupt Enable
  2050. RXCIEbm = $80;
  2051. // Multi-processor Communication Mode
  2052. MPCMbm = $01;
  2053. // USART_RXMODE
  2054. RXMODEmask = $06;
  2055. RXMODE_NORMAL = $00;
  2056. RXMODE_CLK2X = $02;
  2057. RXMODE_GENAUTO = $04;
  2058. RXMODE_LINAUTO = $06;
  2059. // Open Drain Mode Enable
  2060. ODMEbm = $08;
  2061. // Start Frame Detection Enable
  2062. SFDENbm = $10;
  2063. // Transmitter Enable
  2064. TXENbm = $40;
  2065. // Reciever enable
  2066. RXENbm = $80;
  2067. // USART_ABW
  2068. ABWmask = $C0;
  2069. ABW_WDW0 = $00;
  2070. ABW_WDW1 = $40;
  2071. ABW_WDW2 = $80;
  2072. ABW_WDW3 = $C0;
  2073. // Debug Run
  2074. DBGRUNbm = $01;
  2075. // IrDA Event Input Enable
  2076. IREIbm = $01;
  2077. // Receiver Pulse Lenght
  2078. RXPL0bm = $01;
  2079. RXPL1bm = $02;
  2080. RXPL2bm = $04;
  2081. RXPL3bm = $08;
  2082. RXPL4bm = $10;
  2083. RXPL5bm = $20;
  2084. RXPL6bm = $40;
  2085. end;
  2086. TUSERROW = object //User Row
  2087. USERROW0: byte; //User Row Byte 0
  2088. USERROW1: byte; //User Row Byte 1
  2089. USERROW2: byte; //User Row Byte 2
  2090. USERROW3: byte; //User Row Byte 3
  2091. USERROW4: byte; //User Row Byte 4
  2092. USERROW5: byte; //User Row Byte 5
  2093. USERROW6: byte; //User Row Byte 6
  2094. USERROW7: byte; //User Row Byte 7
  2095. USERROW8: byte; //User Row Byte 8
  2096. USERROW9: byte; //User Row Byte 9
  2097. USERROW10: byte; //User Row Byte 10
  2098. USERROW11: byte; //User Row Byte 11
  2099. USERROW12: byte; //User Row Byte 12
  2100. USERROW13: byte; //User Row Byte 13
  2101. USERROW14: byte; //User Row Byte 14
  2102. USERROW15: byte; //User Row Byte 15
  2103. USERROW16: byte; //User Row Byte 16
  2104. USERROW17: byte; //User Row Byte 17
  2105. USERROW18: byte; //User Row Byte 18
  2106. USERROW19: byte; //User Row Byte 19
  2107. USERROW20: byte; //User Row Byte 20
  2108. USERROW21: byte; //User Row Byte 21
  2109. USERROW22: byte; //User Row Byte 22
  2110. USERROW23: byte; //User Row Byte 23
  2111. USERROW24: byte; //User Row Byte 24
  2112. USERROW25: byte; //User Row Byte 25
  2113. USERROW26: byte; //User Row Byte 26
  2114. USERROW27: byte; //User Row Byte 27
  2115. USERROW28: byte; //User Row Byte 28
  2116. USERROW29: byte; //User Row Byte 29
  2117. USERROW30: byte; //User Row Byte 30
  2118. USERROW31: byte; //User Row Byte 31
  2119. end;
  2120. TVPORT = object //Virtual Ports
  2121. DIR: byte; //Data Direction
  2122. OUT_: byte; //Output Value
  2123. IN_: byte; //Input Value
  2124. INTFLAGS: byte; //Interrupt Flags
  2125. end;
  2126. TVREF = object //Voltage reference
  2127. ADC0REF: byte; //ADC0 Reference
  2128. Reserved1: byte;
  2129. DAC0REF: byte; //DAC0 Reference
  2130. Reserved3: byte;
  2131. ACREF: byte; //AC Reference
  2132. const
  2133. // VREF_REFSEL
  2134. REFSELmask = $07;
  2135. REFSEL_1V024 = $00;
  2136. REFSEL_2V048 = $01;
  2137. REFSEL_4V096 = $02;
  2138. REFSEL_2V500 = $03;
  2139. REFSEL_VDD = $05;
  2140. REFSEL_VREFA = $06;
  2141. // Always on
  2142. ALWAYSONbm = $80;
  2143. end;
  2144. TWDT = object //Watch-Dog Timer
  2145. CTRLA: byte; //Control A
  2146. STATUS: byte; //Status
  2147. const
  2148. // WDT_PERIOD
  2149. PERIODmask = $0F;
  2150. PERIOD_OFF = $00;
  2151. PERIOD_8CLK = $01;
  2152. PERIOD_16CLK = $02;
  2153. PERIOD_32CLK = $03;
  2154. PERIOD_64CLK = $04;
  2155. PERIOD_128CLK = $05;
  2156. PERIOD_256CLK = $06;
  2157. PERIOD_512CLK = $07;
  2158. PERIOD_1KCLK = $08;
  2159. PERIOD_2KCLK = $09;
  2160. PERIOD_4KCLK = $0A;
  2161. PERIOD_8KCLK = $0B;
  2162. // WDT_WINDOW
  2163. WINDOWmask = $F0;
  2164. WINDOW_OFF = $00;
  2165. WINDOW_8CLK = $10;
  2166. WINDOW_16CLK = $20;
  2167. WINDOW_32CLK = $30;
  2168. WINDOW_64CLK = $40;
  2169. WINDOW_128CLK = $50;
  2170. WINDOW_256CLK = $60;
  2171. WINDOW_512CLK = $70;
  2172. WINDOW_1KCLK = $80;
  2173. WINDOW_2KCLK = $90;
  2174. WINDOW_4KCLK = $A0;
  2175. WINDOW_8KCLK = $B0;
  2176. // Syncronization busy
  2177. SYNCBUSYbm = $01;
  2178. // Lock enable
  2179. LOCKbm = $80;
  2180. end;
  2181. TZCD = object //Zero Cross Detect
  2182. CTRLA: byte; //Control A
  2183. Reserved1: byte;
  2184. INTCTRL: byte; //Interrupt Control
  2185. STATUS: byte; //Status
  2186. const
  2187. // Enable
  2188. ENABLEbm = $01;
  2189. // Invert signal from pin
  2190. INVERTbm = $08;
  2191. // Output Pad Enable
  2192. OUTENbm = $40;
  2193. // Run in Standby Mode
  2194. RUNSTDBYbm = $80;
  2195. // ZCD_INTMODE
  2196. INTMODEmask = $03;
  2197. INTMODE_NONE = $00;
  2198. INTMODE_RISING = $01;
  2199. INTMODE_FALLING = $02;
  2200. INTMODE_BOTH = $03;
  2201. // ZCD Interrupt Flag
  2202. CROSSIFbm = $01;
  2203. // ZCD_STATE
  2204. STATEmask = $10;
  2205. STATE_LOW = $00;
  2206. STATE_HIGH = $10;
  2207. end;
  2208. const
  2209. Pin0idx = 0; Pin0bm = 1;
  2210. Pin1idx = 1; Pin1bm = 2;
  2211. Pin2idx = 2; Pin2bm = 4;
  2212. Pin3idx = 3; Pin3bm = 8;
  2213. Pin4idx = 4; Pin4bm = 16;
  2214. Pin5idx = 5; Pin5bm = 32;
  2215. Pin6idx = 6; Pin6bm = 64;
  2216. Pin7idx = 7; Pin7bm = 128;
  2217. var
  2218. VPORTA: TVPORT absolute $0000;
  2219. VPORTC: TVPORT absolute $0008;
  2220. VPORTD: TVPORT absolute $000C;
  2221. VPORTF: TVPORT absolute $0014;
  2222. GPR: TGPR absolute $001C;
  2223. CPU: TCPU absolute $0030;
  2224. RSTCTRL: TRSTCTRL absolute $0040;
  2225. SLPCTRL: TSLPCTRL absolute $0050;
  2226. CLKCTRL: TCLKCTRL absolute $0060;
  2227. BOD: TBOD absolute $0080;
  2228. VREF: TVREF absolute $00A0;
  2229. WDT: TWDT absolute $0100;
  2230. CPUINT: TCPUINT absolute $0110;
  2231. CRCSCAN: TCRCSCAN absolute $0120;
  2232. RTC: TRTC absolute $0140;
  2233. CCL: TCCL absolute $01C0;
  2234. EVSYS: TEVSYS absolute $0200;
  2235. PORTA: TPORT absolute $0400;
  2236. PORTC: TPORT absolute $0440;
  2237. PORTD: TPORT absolute $0460;
  2238. PORTF: TPORT absolute $04A0;
  2239. PORTMUX: TPORTMUX absolute $05E0;
  2240. ADC0: TADC absolute $0600;
  2241. AC0: TAC absolute $0680;
  2242. AC1: TAC absolute $0688;
  2243. AC2: TAC absolute $0690;
  2244. DAC0: TDAC absolute $06A0;
  2245. ZCD0: TZCD absolute $06C0;
  2246. USART0: TUSART absolute $0800;
  2247. USART1: TUSART absolute $0820;
  2248. USART2: TUSART absolute $0840;
  2249. TWI0: TTWI absolute $0900;
  2250. TWI1: TTWI absolute $0920;
  2251. SPI0: TSPI absolute $0940;
  2252. SPI1: TSPI absolute $0960;
  2253. TCA0: TTCA absolute $0A00;
  2254. TCB0: TTCB absolute $0B00;
  2255. TCB1: TTCB absolute $0B10;
  2256. TCB2: TTCB absolute $0B20;
  2257. TCD0: TTCD absolute $0B80;
  2258. SYSCFG: TSYSCFG absolute $0F00;
  2259. NVMCTRL: TNVMCTRL absolute $1000;
  2260. LOCK: TLOCK absolute $1040;
  2261. FUSE: TFUSE absolute $1050;
  2262. USERROW: TUSERROW absolute $1080;
  2263. SIGROW: TSIGROW absolute $1100;
  2264. implementation
  2265. {$i avrcommon.inc}
  2266. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  2267. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  2268. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 3
  2269. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 4
  2270. procedure CCL_CCL_ISR; external name 'CCL_CCL_ISR'; // Interrupt 5
  2271. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 6
  2272. procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 7
  2273. //procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 7
  2274. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 8
  2275. procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 9
  2276. //procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 9
  2277. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 10
  2278. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 10
  2279. procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 11
  2280. //procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 11
  2281. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 12
  2282. procedure TCB1_INT_ISR; external name 'TCB1_INT_ISR'; // Interrupt 13
  2283. procedure TCD0_OVF_ISR; external name 'TCD0_OVF_ISR'; // Interrupt 14
  2284. procedure TCD0_TRIG_ISR; external name 'TCD0_TRIG_ISR'; // Interrupt 15
  2285. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 16
  2286. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 17
  2287. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 18
  2288. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 19
  2289. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 20
  2290. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 21
  2291. procedure PORTD_PORT_ISR; external name 'PORTD_PORT_ISR'; // Interrupt 22
  2292. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 23
  2293. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 24
  2294. procedure ADC0_WCMP_ISR; external name 'ADC0_WCMP_ISR'; // Interrupt 25
  2295. procedure ZCD0_ZCD_ISR; external name 'ZCD0_ZCD_ISR'; // Interrupt 26
  2296. procedure PTC_PTC_ISR; external name 'PTC_PTC_ISR'; // Interrupt 27
  2297. procedure AC1_AC_ISR; external name 'AC1_AC_ISR'; // Interrupt 28
  2298. procedure PORTC_PORT_ISR; external name 'PORTC_PORT_ISR'; // Interrupt 29
  2299. procedure TCB2_INT_ISR; external name 'TCB2_INT_ISR'; // Interrupt 30
  2300. procedure USART1_RXC_ISR; external name 'USART1_RXC_ISR'; // Interrupt 31
  2301. procedure USART1_DRE_ISR; external name 'USART1_DRE_ISR'; // Interrupt 32
  2302. procedure USART1_TXC_ISR; external name 'USART1_TXC_ISR'; // Interrupt 33
  2303. procedure PORTF_PORT_ISR; external name 'PORTF_PORT_ISR'; // Interrupt 34
  2304. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 35
  2305. procedure SPI1_INT_ISR; external name 'SPI1_INT_ISR'; // Interrupt 36
  2306. procedure USART2_RXC_ISR; external name 'USART2_RXC_ISR'; // Interrupt 37
  2307. procedure USART2_DRE_ISR; external name 'USART2_DRE_ISR'; // Interrupt 38
  2308. procedure USART2_TXC_ISR; external name 'USART2_TXC_ISR'; // Interrupt 39
  2309. procedure AC2_AC_ISR; external name 'AC2_AC_ISR'; // Interrupt 40
  2310. procedure TWI1_TWIS_ISR; external name 'TWI1_TWIS_ISR'; // Interrupt 42
  2311. procedure TWI1_TWIM_ISR; external name 'TWI1_TWIM_ISR'; // Interrupt 43
  2312. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  2313. asm
  2314. jmp __dtors_end
  2315. jmp CRCSCAN_NMI_ISR
  2316. jmp BOD_VLM_ISR
  2317. jmp RTC_CNT_ISR
  2318. jmp RTC_PIT_ISR
  2319. jmp CCL_CCL_ISR
  2320. jmp PORTA_PORT_ISR
  2321. jmp TCA0_LUNF_ISR
  2322. // jmp TCA0_OVF_ISR
  2323. jmp TCA0_HUNF_ISR
  2324. jmp TCA0_CMP0_ISR
  2325. // jmp TCA0_LCMP0_ISR
  2326. jmp TCA0_CMP1_ISR
  2327. // jmp TCA0_LCMP1_ISR
  2328. jmp TCA0_CMP2_ISR
  2329. // jmp TCA0_LCMP2_ISR
  2330. jmp TCB0_INT_ISR
  2331. jmp TCB1_INT_ISR
  2332. jmp TCD0_OVF_ISR
  2333. jmp TCD0_TRIG_ISR
  2334. jmp TWI0_TWIS_ISR
  2335. jmp TWI0_TWIM_ISR
  2336. jmp SPI0_INT_ISR
  2337. jmp USART0_RXC_ISR
  2338. jmp USART0_DRE_ISR
  2339. jmp USART0_TXC_ISR
  2340. jmp PORTD_PORT_ISR
  2341. jmp AC0_AC_ISR
  2342. jmp ADC0_RESRDY_ISR
  2343. jmp ADC0_WCMP_ISR
  2344. jmp ZCD0_ZCD_ISR
  2345. jmp PTC_PTC_ISR
  2346. jmp AC1_AC_ISR
  2347. jmp PORTC_PORT_ISR
  2348. jmp TCB2_INT_ISR
  2349. jmp USART1_RXC_ISR
  2350. jmp USART1_DRE_ISR
  2351. jmp USART1_TXC_ISR
  2352. jmp PORTF_PORT_ISR
  2353. jmp NVMCTRL_EE_ISR
  2354. jmp SPI1_INT_ISR
  2355. jmp USART2_RXC_ISR
  2356. jmp USART2_DRE_ISR
  2357. jmp USART2_TXC_ISR
  2358. jmp AC2_AC_ISR
  2359. jmp TWI1_TWIS_ISR
  2360. jmp TWI1_TWIM_ISR
  2361. .weak CRCSCAN_NMI_ISR
  2362. .weak BOD_VLM_ISR
  2363. .weak RTC_CNT_ISR
  2364. .weak RTC_PIT_ISR
  2365. .weak CCL_CCL_ISR
  2366. .weak PORTA_PORT_ISR
  2367. .weak TCA0_LUNF_ISR
  2368. // .weak TCA0_OVF_ISR
  2369. .weak TCA0_HUNF_ISR
  2370. .weak TCA0_CMP0_ISR
  2371. // .weak TCA0_LCMP0_ISR
  2372. .weak TCA0_CMP1_ISR
  2373. // .weak TCA0_LCMP1_ISR
  2374. .weak TCA0_CMP2_ISR
  2375. // .weak TCA0_LCMP2_ISR
  2376. .weak TCB0_INT_ISR
  2377. .weak TCB1_INT_ISR
  2378. .weak TCD0_OVF_ISR
  2379. .weak TCD0_TRIG_ISR
  2380. .weak TWI0_TWIS_ISR
  2381. .weak TWI0_TWIM_ISR
  2382. .weak SPI0_INT_ISR
  2383. .weak USART0_RXC_ISR
  2384. .weak USART0_DRE_ISR
  2385. .weak USART0_TXC_ISR
  2386. .weak PORTD_PORT_ISR
  2387. .weak AC0_AC_ISR
  2388. .weak ADC0_RESRDY_ISR
  2389. .weak ADC0_WCMP_ISR
  2390. .weak ZCD0_ZCD_ISR
  2391. .weak PTC_PTC_ISR
  2392. .weak AC1_AC_ISR
  2393. .weak PORTC_PORT_ISR
  2394. .weak TCB2_INT_ISR
  2395. .weak USART1_RXC_ISR
  2396. .weak USART1_DRE_ISR
  2397. .weak USART1_TXC_ISR
  2398. .weak PORTF_PORT_ISR
  2399. .weak NVMCTRL_EE_ISR
  2400. .weak SPI1_INT_ISR
  2401. .weak USART2_RXC_ISR
  2402. .weak USART2_DRE_ISR
  2403. .weak USART2_TXC_ISR
  2404. .weak AC2_AC_ISR
  2405. .weak TWI1_TWIS_ISR
  2406. .weak TWI1_TWIM_ISR
  2407. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  2408. .set BOD_VLM_ISR, Default_IRQ_handler
  2409. .set RTC_CNT_ISR, Default_IRQ_handler
  2410. .set RTC_PIT_ISR, Default_IRQ_handler
  2411. .set CCL_CCL_ISR, Default_IRQ_handler
  2412. .set PORTA_PORT_ISR, Default_IRQ_handler
  2413. .set TCA0_LUNF_ISR, Default_IRQ_handler
  2414. // .set TCA0_OVF_ISR, Default_IRQ_handler
  2415. .set TCA0_HUNF_ISR, Default_IRQ_handler
  2416. .set TCA0_CMP0_ISR, Default_IRQ_handler
  2417. // .set TCA0_LCMP0_ISR, Default_IRQ_handler
  2418. .set TCA0_CMP1_ISR, Default_IRQ_handler
  2419. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  2420. .set TCA0_CMP2_ISR, Default_IRQ_handler
  2421. // .set TCA0_LCMP2_ISR, Default_IRQ_handler
  2422. .set TCB0_INT_ISR, Default_IRQ_handler
  2423. .set TCB1_INT_ISR, Default_IRQ_handler
  2424. .set TCD0_OVF_ISR, Default_IRQ_handler
  2425. .set TCD0_TRIG_ISR, Default_IRQ_handler
  2426. .set TWI0_TWIS_ISR, Default_IRQ_handler
  2427. .set TWI0_TWIM_ISR, Default_IRQ_handler
  2428. .set SPI0_INT_ISR, Default_IRQ_handler
  2429. .set USART0_RXC_ISR, Default_IRQ_handler
  2430. .set USART0_DRE_ISR, Default_IRQ_handler
  2431. .set USART0_TXC_ISR, Default_IRQ_handler
  2432. .set PORTD_PORT_ISR, Default_IRQ_handler
  2433. .set AC0_AC_ISR, Default_IRQ_handler
  2434. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  2435. .set ADC0_WCMP_ISR, Default_IRQ_handler
  2436. .set ZCD0_ZCD_ISR, Default_IRQ_handler
  2437. .set PTC_PTC_ISR, Default_IRQ_handler
  2438. .set AC1_AC_ISR, Default_IRQ_handler
  2439. .set PORTC_PORT_ISR, Default_IRQ_handler
  2440. .set TCB2_INT_ISR, Default_IRQ_handler
  2441. .set USART1_RXC_ISR, Default_IRQ_handler
  2442. .set USART1_DRE_ISR, Default_IRQ_handler
  2443. .set USART1_TXC_ISR, Default_IRQ_handler
  2444. .set PORTF_PORT_ISR, Default_IRQ_handler
  2445. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  2446. .set SPI1_INT_ISR, Default_IRQ_handler
  2447. .set USART2_RXC_ISR, Default_IRQ_handler
  2448. .set USART2_DRE_ISR, Default_IRQ_handler
  2449. .set USART2_TXC_ISR, Default_IRQ_handler
  2450. .set AC2_AC_ISR, Default_IRQ_handler
  2451. .set TWI1_TWIS_ISR, Default_IRQ_handler
  2452. .set TWI1_TWIM_ISR, Default_IRQ_handler
  2453. end;
  2454. end.