avr32dd14.pp 60 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315
  1. unit AVR32DD14;
  2. interface
  3. type
  4. TAC = object //Analog Comparator
  5. CTRLA: byte; //Control A
  6. Reserved1: byte;
  7. MUXCTRL: byte; //Mux Control A
  8. Reserved3: byte;
  9. Reserved4: byte;
  10. DACREF: byte; //DAC Voltage Reference
  11. INTCTRL: byte; //Interrupt Control
  12. STATUS: byte; //Status
  13. const
  14. // Enable
  15. ENABLEbm = $01;
  16. // AC_HYSMODE
  17. HYSMODEmask = $06;
  18. HYSMODE_NONE = $00;
  19. HYSMODE_SMALL = $02;
  20. HYSMODE_MEDIUM = $04;
  21. HYSMODE_LARGE = $06;
  22. // AC_POWER
  23. POWERmask = $18;
  24. POWER_PROFILE0 = $00;
  25. POWER_PROFILE1 = $08;
  26. POWER_PROFILE2 = $10;
  27. POWER_PROFILE3 = $18;
  28. // Output Pad Enable
  29. OUTENbm = $40;
  30. // Run in Standby Mode
  31. RUNSTDBYbm = $80;
  32. // AC_MUXNEG
  33. MUXNEGmask = $07;
  34. MUXNEG_AINN0 = $00;
  35. MUXNEG_AINN2 = $02;
  36. MUXNEG_AINN3 = $03;
  37. MUXNEG_DACREF = $04;
  38. // AC_MUXPOS
  39. MUXPOSmask = $38;
  40. MUXPOS_AINP0 = $00;
  41. MUXPOS_AINP3 = $18;
  42. MUXPOS_AINP4 = $20;
  43. // AC_INITVAL
  44. INITVALmask = $40;
  45. INITVAL_LOW = $00;
  46. INITVAL_HIGH = $40;
  47. // Invert AC Output
  48. INVERTbm = $80;
  49. // Analog Comparator Interrupt Flag
  50. CMPIFbm = $01;
  51. // Analog Comparator State
  52. CMPSTATEbm = $10;
  53. end;
  54. TADC = object //Analog to Digital Converter
  55. CTRLA: byte; //Control A
  56. CTRLB: byte; //Control B
  57. CTRLC: byte; //Control C
  58. CTRLD: byte; //Control D
  59. CTRLE: byte; //Control E
  60. SAMPCTRL: byte; //Sample Control
  61. Reserved6: byte;
  62. Reserved7: byte;
  63. MUXPOS: byte; //Positive mux input
  64. MUXNEG: byte; //Negative mux input
  65. COMMAND: byte; //Command
  66. EVCTRL: byte; //Event Control
  67. INTCTRL: byte; //Interrupt Control
  68. INTFLAGS: byte; //Interrupt Flags
  69. DBGCTRL: byte; //Debug Control
  70. TEMP: byte; //Temporary Data
  71. RES: word; //ADC Accumulator Result
  72. WINLT: word; //Window comparator low threshold
  73. WINHT: word; //Window comparator high threshold
  74. const
  75. // ADC Enable
  76. ENABLEbm = $01;
  77. // Free running mode
  78. FREERUNbm = $02;
  79. // ADC_RESSEL
  80. RESSELmask = $0C;
  81. RESSEL_12BIT = $00;
  82. RESSEL_10BIT = $04;
  83. // Left adjust result
  84. LEFTADJbm = $10;
  85. // ADC_CONVMODE
  86. CONVMODEmask = $20;
  87. CONVMODE_SINGLEENDED = $00;
  88. CONVMODE_DIFF = $20;
  89. // Run standby mode
  90. RUNSTBYbm = $80;
  91. // ADC_SAMPNUM
  92. SAMPNUMmask = $07;
  93. SAMPNUM_NONE = $00;
  94. SAMPNUM_ACC2 = $01;
  95. SAMPNUM_ACC4 = $02;
  96. SAMPNUM_ACC8 = $03;
  97. SAMPNUM_ACC16 = $04;
  98. SAMPNUM_ACC32 = $05;
  99. SAMPNUM_ACC64 = $06;
  100. SAMPNUM_ACC128 = $07;
  101. // ADC_PRESC
  102. PRESCmask = $0F;
  103. PRESC_DIV2 = $00;
  104. PRESC_DIV4 = $01;
  105. PRESC_DIV8 = $02;
  106. PRESC_DIV12 = $03;
  107. PRESC_DIV16 = $04;
  108. PRESC_DIV20 = $05;
  109. PRESC_DIV24 = $06;
  110. PRESC_DIV28 = $07;
  111. PRESC_DIV32 = $08;
  112. PRESC_DIV48 = $09;
  113. PRESC_DIV64 = $0A;
  114. PRESC_DIV96 = $0B;
  115. PRESC_DIV128 = $0C;
  116. PRESC_DIV256 = $0D;
  117. // ADC_SAMPDLY
  118. SAMPDLYmask = $0F;
  119. SAMPDLY_DLY0 = $00;
  120. SAMPDLY_DLY1 = $01;
  121. SAMPDLY_DLY2 = $02;
  122. SAMPDLY_DLY3 = $03;
  123. SAMPDLY_DLY4 = $04;
  124. SAMPDLY_DLY5 = $05;
  125. SAMPDLY_DLY6 = $06;
  126. SAMPDLY_DLY7 = $07;
  127. SAMPDLY_DLY8 = $08;
  128. SAMPDLY_DLY9 = $09;
  129. SAMPDLY_DLY10 = $0A;
  130. SAMPDLY_DLY11 = $0B;
  131. SAMPDLY_DLY12 = $0C;
  132. SAMPDLY_DLY13 = $0D;
  133. SAMPDLY_DLY14 = $0E;
  134. SAMPDLY_DLY15 = $0F;
  135. // ADC_INITDLY
  136. INITDLYmask = $E0;
  137. INITDLY_DLY0 = $00;
  138. INITDLY_DLY16 = $20;
  139. INITDLY_DLY32 = $40;
  140. INITDLY_DLY64 = $60;
  141. INITDLY_DLY128 = $80;
  142. INITDLY_DLY256 = $A0;
  143. // ADC_WINCM
  144. WINCMmask = $07;
  145. WINCM_NONE = $00;
  146. WINCM_BELOW = $01;
  147. WINCM_ABOVE = $02;
  148. WINCM_INSIDE = $03;
  149. WINCM_OUTSIDE = $04;
  150. // ADC_MUXPOS
  151. MUXPOSmask = $7F;
  152. MUXPOS_AIN1 = $01;
  153. MUXPOS_AIN2 = $02;
  154. MUXPOS_AIN3 = $03;
  155. MUXPOS_AIN4 = $04;
  156. MUXPOS_AIN5 = $05;
  157. MUXPOS_AIN6 = $06;
  158. MUXPOS_AIN7 = $07;
  159. MUXPOS_AIN16 = $10;
  160. MUXPOS_AIN17 = $11;
  161. MUXPOS_AIN18 = $12;
  162. MUXPOS_AIN19 = $13;
  163. MUXPOS_AIN20 = $14;
  164. MUXPOS_AIN21 = $15;
  165. MUXPOS_AIN22 = $16;
  166. MUXPOS_AIN23 = $17;
  167. MUXPOS_AIN24 = $18;
  168. MUXPOS_AIN25 = $19;
  169. MUXPOS_AIN26 = $1A;
  170. MUXPOS_AIN27 = $1B;
  171. MUXPOS_AIN28 = $1C;
  172. MUXPOS_AIN29 = $1D;
  173. MUXPOS_AIN30 = $1E;
  174. MUXPOS_AIN31 = $1F;
  175. MUXPOS_GND = $40;
  176. MUXPOS_TEMPSENSE = $42;
  177. MUXPOS_VDDDIV10 = $44;
  178. MUXPOS_VDDIO2DIV10 = $45;
  179. MUXPOS_DAC0 = $48;
  180. MUXPOS_DACREF0 = $49;
  181. // ADC_MUXNEG
  182. MUXNEGmask = $7F;
  183. MUXNEG_AIN1 = $01;
  184. MUXNEG_AIN2 = $02;
  185. MUXNEG_AIN3 = $03;
  186. MUXNEG_AIN4 = $04;
  187. MUXNEG_AIN5 = $05;
  188. MUXNEG_AIN6 = $06;
  189. MUXNEG_AIN7 = $07;
  190. MUXNEG_AIN16 = $10;
  191. MUXNEG_AIN17 = $11;
  192. MUXNEG_AIN18 = $12;
  193. MUXNEG_AIN19 = $13;
  194. MUXNEG_AIN20 = $14;
  195. MUXNEG_AIN21 = $15;
  196. MUXNEG_AIN22 = $16;
  197. MUXNEG_AIN23 = $17;
  198. MUXNEG_AIN24 = $18;
  199. MUXNEG_AIN25 = $19;
  200. MUXNEG_AIN26 = $1A;
  201. MUXNEG_AIN27 = $1B;
  202. MUXNEG_AIN28 = $1C;
  203. MUXNEG_AIN29 = $1D;
  204. MUXNEG_AIN30 = $1E;
  205. MUXNEG_AIN31 = $1F;
  206. MUXNEG_GND = $40;
  207. MUXNEG_DAC0 = $48;
  208. // Start Conversion
  209. STCONVbm = $01;
  210. // Stop Conversion
  211. SPCONVbm = $02;
  212. // Start Event Input Enable
  213. STARTEIbm = $01;
  214. // Result Ready Interrupt Enable
  215. RESRDYbm = $01;
  216. // Window Comparator Interrupt Enable
  217. WCMPbm = $02;
  218. // Debug run
  219. DBGRUNbm = $01;
  220. end;
  221. TBOD = object //Bod interface
  222. CTRLA: byte; //Control A
  223. CTRLB: byte; //Control B
  224. Reserved2: byte;
  225. Reserved3: byte;
  226. Reserved4: byte;
  227. Reserved5: byte;
  228. Reserved6: byte;
  229. Reserved7: byte;
  230. VLMCTRLA: byte; //Voltage level monitor Control
  231. INTCTRL: byte; //Voltage level monitor interrupt Control
  232. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  233. STATUS: byte; //Voltage level monitor status
  234. const
  235. // BOD_SLEEP
  236. SLEEPmask = $03;
  237. SLEEP_DIS = $00;
  238. SLEEP_ENABLED = $01;
  239. SLEEP_SAMPLED = $02;
  240. // BOD_ACTIVE
  241. ACTIVEmask = $0C;
  242. ACTIVE_DIS = $00;
  243. ACTIVE_ENABLED = $04;
  244. ACTIVE_SAMPLED = $08;
  245. ACTIVE_ENWAKE = $0C;
  246. // BOD_SAMPFREQ
  247. SAMPFREQmask = $10;
  248. SAMPFREQ_128HZ = $00;
  249. SAMPFREQ_32HZ = $10;
  250. // BOD_LVL
  251. LVLmask = $07;
  252. LVL_BODLEVEL0 = $00;
  253. LVL_BODLEVEL1 = $01;
  254. LVL_BODLEVEL2 = $02;
  255. LVL_BODLEVEL3 = $03;
  256. // BOD_VLMLVL
  257. VLMLVLmask = $03;
  258. VLMLVL_OFF = $00;
  259. VLMLVL_5ABOVE = $01;
  260. VLMLVL_15ABOVE = $02;
  261. VLMLVL_25ABOVE = $03;
  262. // voltage level monitor interrrupt enable
  263. VLMIEbm = $01;
  264. // BOD_VLMCFG
  265. VLMCFGmask = $06;
  266. VLMCFG_FALLING = $00;
  267. VLMCFG_RISING = $02;
  268. VLMCFG_BOTH = $04;
  269. // Voltage level monitor interrupt flag
  270. VLMIFbm = $01;
  271. // BOD_VLMS
  272. VLMSmask = $01;
  273. VLMS_ABOVE = $00;
  274. VLMS_BELOW = $01;
  275. end;
  276. TCCL = object //Configurable Custom Logic
  277. CTRLA: byte; //Control Register A
  278. SEQCTRL0: byte; //Sequential Control 0
  279. SEQCTRL1: byte; //Sequential Control 1
  280. Reserved3: byte;
  281. Reserved4: byte;
  282. INTCTRL0: byte; //Interrupt Control 0
  283. Reserved6: byte;
  284. INTFLAGS: byte; //Interrupt Flags
  285. LUT0CTRLA: byte; //LUT 0 Control A
  286. LUT0CTRLB: byte; //LUT 0 Control B
  287. LUT0CTRLC: byte; //LUT 0 Control C
  288. TRUTH0: byte; //Truth 0
  289. LUT1CTRLA: byte; //LUT 1 Control A
  290. LUT1CTRLB: byte; //LUT 1 Control B
  291. LUT1CTRLC: byte; //LUT 1 Control C
  292. TRUTH1: byte; //Truth 1
  293. LUT2CTRLA: byte; //LUT 2 Control A
  294. LUT2CTRLB: byte; //LUT 2 Control B
  295. LUT2CTRLC: byte; //LUT 2 Control C
  296. TRUTH2: byte; //Truth 2
  297. LUT3CTRLA: byte; //LUT 3 Control A
  298. LUT3CTRLB: byte; //LUT 3 Control B
  299. LUT3CTRLC: byte; //LUT 3 Control C
  300. TRUTH3: byte; //Truth 3
  301. const
  302. // Enable
  303. ENABLEbm = $01;
  304. // Run in Standby
  305. RUNSTDBYbm = $40;
  306. // CCL_SEQSEL
  307. SEQSELmask = $0F;
  308. SEQSEL_DISABLE = $00;
  309. SEQSEL_DFF = $01;
  310. SEQSEL_JK = $02;
  311. SEQSEL_LATCH = $03;
  312. SEQSEL_RS = $04;
  313. // CCL_INTMODE0
  314. INTMODE0mask = $03;
  315. INTMODE0_INTDISABLE = $00;
  316. INTMODE0_RISING = $01;
  317. INTMODE0_FALLING = $02;
  318. INTMODE0_BOTH = $03;
  319. // CCL_INTMODE1
  320. INTMODE1mask = $0C;
  321. INTMODE1_INTDISABLE = $00;
  322. INTMODE1_RISING = $04;
  323. INTMODE1_FALLING = $08;
  324. INTMODE1_BOTH = $0C;
  325. // CCL_INTMODE2
  326. INTMODE2mask = $30;
  327. INTMODE2_INTDISABLE = $00;
  328. INTMODE2_RISING = $10;
  329. INTMODE2_FALLING = $20;
  330. INTMODE2_BOTH = $30;
  331. // CCL_INTMODE3
  332. INTMODE3mask = $C0;
  333. INTMODE3_INTDISABLE = $00;
  334. INTMODE3_RISING = $40;
  335. INTMODE3_FALLING = $80;
  336. INTMODE3_BOTH = $C0;
  337. // Interrupt Flag
  338. INT0bm = $01;
  339. INT1bm = $02;
  340. INT2bm = $04;
  341. INT3bm = $08;
  342. // CCL_CLKSRC
  343. CLKSRCmask = $0E;
  344. CLKSRC_CLKPER = $00;
  345. CLKSRC_IN2 = $02;
  346. CLKSRC_OSCHF = $08;
  347. CLKSRC_OSC32K = $0A;
  348. CLKSRC_OSC1K = $0C;
  349. // CCL_FILTSEL
  350. FILTSELmask = $30;
  351. FILTSEL_DISABLE = $00;
  352. FILTSEL_SYNCH = $10;
  353. FILTSEL_FILTER = $20;
  354. // Output Enable
  355. OUTENbm = $40;
  356. // CCL_EDGEDET
  357. EDGEDETmask = $80;
  358. EDGEDET_DIS = $00;
  359. EDGEDET_EN = $80;
  360. // CCL_INSEL0
  361. INSEL0mask = $0F;
  362. INSEL0_MASK = $00;
  363. INSEL0_FEEDBACK = $01;
  364. INSEL0_LINK = $02;
  365. INSEL0_EVENTA = $03;
  366. INSEL0_EVENTB = $04;
  367. INSEL0_IN0 = $05;
  368. INSEL0_AC0 = $06;
  369. INSEL0_ZCD3 = $07;
  370. INSEL0_USART0 = $08;
  371. INSEL0_SPI0 = $09;
  372. INSEL0_TCA0 = $0A;
  373. INSEL0_TCB0 = $0B;
  374. INSEL0_TCD0 = $0C;
  375. // CCL_INSEL1
  376. INSEL1mask = $F0;
  377. INSEL1_MASK = $00;
  378. INSEL1_FEEDBACK = $10;
  379. INSEL1_LINK = $20;
  380. INSEL1_EVENTA = $30;
  381. INSEL1_EVENTB = $40;
  382. INSEL1_IN1 = $50;
  383. INSEL1_AC0 = $60;
  384. INSEL1_ZCD3 = $70;
  385. INSEL1_USART1 = $80;
  386. INSEL1_SPI0 = $90;
  387. INSEL1_TCA0 = $A0;
  388. INSEL1_TCB1 = $B0;
  389. INSEL1_TCD0 = $C0;
  390. // CCL_INSEL2
  391. INSEL2mask = $0F;
  392. INSEL2_MASK = $00;
  393. INSEL2_FEEDBACK = $01;
  394. INSEL2_LINK = $02;
  395. INSEL2_EVENTA = $03;
  396. INSEL2_EVENTB = $04;
  397. INSEL2_IN2 = $05;
  398. INSEL2_AC0 = $06;
  399. INSEL2_ZCD3 = $07;
  400. INSEL2_USART1 = $08;
  401. INSEL2_SPI0 = $09;
  402. INSEL2_TCA0 = $0A;
  403. INSEL2_TCB2 = $0B;
  404. INSEL2_TCD0 = $0C;
  405. end;
  406. TCLKCTRL = object //Clock controller
  407. MCLKCTRLA: byte; //MCLK Control A
  408. MCLKCTRLB: byte; //MCLK Control B
  409. MCLKCTRLC: byte; //MCLK Control C
  410. MCLKINTCTRL: byte; //MCLK Interrupt Control
  411. MCLKINTFLAGS: byte; //MCLK Interrupt Flags
  412. MCLKSTATUS: byte; //MCLK Status
  413. Reserved6: byte;
  414. Reserved7: byte;
  415. OSCHFCTRLA: byte; //OSCHF Control A
  416. OSCHFTUNE: byte; //OSCHF Tune
  417. Reserved10: byte;
  418. Reserved11: byte;
  419. Reserved12: byte;
  420. Reserved13: byte;
  421. Reserved14: byte;
  422. Reserved15: byte;
  423. PLLCTRLA: byte; //PLL Control A
  424. Reserved17: byte;
  425. Reserved18: byte;
  426. Reserved19: byte;
  427. Reserved20: byte;
  428. Reserved21: byte;
  429. Reserved22: byte;
  430. Reserved23: byte;
  431. OSC32KCTRLA: byte; //OSC32K Control A
  432. Reserved25: byte;
  433. Reserved26: byte;
  434. Reserved27: byte;
  435. XOSC32KCTRLA: byte; //XOSC32K Control A
  436. Reserved29: byte;
  437. Reserved30: byte;
  438. Reserved31: byte;
  439. XOSCHFCTRLA: byte; //XOSC HF Control A
  440. const
  441. // CLKCTRL_CLKSEL
  442. CLKSELmask = $07;
  443. CLKSEL_OSCHF = $00;
  444. CLKSEL_OSC32K = $01;
  445. CLKSEL_XOSC32K = $02;
  446. CLKSEL_EXTCLK = $03;
  447. // System clock out
  448. CLKOUTbm = $80;
  449. // Prescaler enable
  450. PENbm = $01;
  451. // CLKCTRL_PDIV
  452. PDIVmask = $1E;
  453. PDIV_2X = $00;
  454. PDIV_4X = $02;
  455. PDIV_8X = $04;
  456. PDIV_16X = $06;
  457. PDIV_32X = $08;
  458. PDIV_64X = $0A;
  459. PDIV_6X = $10;
  460. PDIV_10X = $12;
  461. PDIV_12X = $14;
  462. PDIV_24X = $16;
  463. PDIV_48X = $18;
  464. // Clock Failure Detect Enable
  465. CFDENbm = $01;
  466. // Clock Failure Detect Test
  467. CFDTSTbm = $02;
  468. // CLKCTRL_CFDSRC
  469. CFDSRCmask = $0C;
  470. CFDSRC_CLKMAIN = $00;
  471. CFDSRC_XOSCHF = $04;
  472. CFDSRC_XOSC32K = $08;
  473. // Clock Failure Detect Interrupt Enable
  474. CFDbm = $01;
  475. // CLKCTRL_INTTYPE
  476. INTTYPEmask = $80;
  477. INTTYPE_INT = $00;
  478. INTTYPE_NMI = $80;
  479. // System Oscillator changing
  480. SOSCbm = $01;
  481. // High frequency oscillator status
  482. OSCHFSbm = $02;
  483. // 32KHz oscillator status
  484. OSC32KSbm = $04;
  485. // 32.768 kHz Crystal Oscillator status
  486. XOSC32KSbm = $08;
  487. // External Clock status
  488. EXTSbm = $10;
  489. // PLL oscillator status
  490. PLLSbm = $20;
  491. // Autotune
  492. AUTOTUNEbm = $01;
  493. // CLKCTRL_FRQSEL
  494. FRQSELmask = $3C;
  495. FRQSEL_1M = $00;
  496. FRQSEL_2M = $04;
  497. FRQSEL_3M = $08;
  498. FRQSEL_4M = $0C;
  499. FRQSEL_8M = $14;
  500. FRQSEL_12M = $18;
  501. FRQSEL_16M = $1C;
  502. FRQSEL_20M = $20;
  503. FRQSEL_24M = $24;
  504. // Run standby
  505. RUNSTDBYbm = $80;
  506. // CLKCTRL_MULFAC
  507. MULFACmask = $03;
  508. MULFAC_DISABLE = $00;
  509. MULFAC_2x = $01;
  510. MULFAC_3x = $02;
  511. // CLKCTRL_SOURCE
  512. SOURCEmask = $40;
  513. SOURCE_OSCHF = $00;
  514. SOURCE_XOSCHF = $40;
  515. // Enable
  516. ENABLEbm = $01;
  517. // Low power mode
  518. LPMODEbm = $02;
  519. // Select
  520. SELbm = $04;
  521. // CLKCTRL_CSUT
  522. CSUTmask = $30;
  523. CSUT_1K = $00;
  524. CSUT_16K = $10;
  525. CSUT_32K = $20;
  526. CSUT_64K = $30;
  527. // CLKCTRL_SELHF
  528. SELHFmask = $02;
  529. SELHF_XTAL = $00;
  530. SELHF_EXTCLOCK = $02;
  531. // CLKCTRL_FRQRANGE
  532. FRQRANGEmask = $0C;
  533. FRQRANGE_8M = $00;
  534. FRQRANGE_16M = $04;
  535. FRQRANGE_24M = $08;
  536. FRQRANGE_32M = $0C;
  537. // CLKCTRL_CSUTHF
  538. CSUTHFmask = $30;
  539. CSUTHF_256 = $00;
  540. CSUTHF_1K = $10;
  541. CSUTHF_4K = $20;
  542. // Run Standby
  543. RUNSTBYbm = $80;
  544. end;
  545. TCPU = object //CPU
  546. Reserved0: byte;
  547. Reserved1: byte;
  548. Reserved2: byte;
  549. Reserved3: byte;
  550. CCP: byte; //Configuration Change Protection
  551. Reserved5: byte;
  552. Reserved6: byte;
  553. Reserved7: byte;
  554. Reserved8: byte;
  555. Reserved9: byte;
  556. Reserved10: byte;
  557. Reserved11: byte;
  558. Reserved12: byte;
  559. SP: word; //Stack Pointer
  560. SREG: byte; //Status Register
  561. const
  562. // CPU_CCP
  563. CCPmask = $FF;
  564. CCP_SPM = $9D;
  565. CCP_IOREG = $D8;
  566. // Carry Flag
  567. Cbm = $01;
  568. // Zero Flag
  569. Zbm = $02;
  570. // Negative Flag
  571. Nbm = $04;
  572. // Two's Complement Overflow Flag
  573. Vbm = $08;
  574. // N Exclusive Or V Flag
  575. Sbm = $10;
  576. // Half Carry Flag
  577. Hbm = $20;
  578. // Transfer Bit
  579. Tbm = $40;
  580. // Global Interrupt Enable Flag
  581. Ibm = $80;
  582. end;
  583. TCPUINT = object //Interrupt Controller
  584. CTRLA: byte; //Control A
  585. STATUS: byte; //Status
  586. LVL0PRI: byte; //Interrupt Level 0 Priority
  587. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  588. const
  589. // Round-robin Scheduling Enable
  590. LVL0RRbm = $01;
  591. // Compact Vector Table
  592. CVTbm = $20;
  593. // Interrupt Vector Select
  594. IVSELbm = $40;
  595. // Level 0 Interrupt Executing
  596. LVL0EXbm = $01;
  597. // Level 1 Interrupt Executing
  598. LVL1EXbm = $02;
  599. // Non-maskable Interrupt Executing
  600. NMIEXbm = $80;
  601. end;
  602. TCRCSCAN = object //CRCSCAN
  603. CTRLA: byte; //Control A
  604. CTRLB: byte; //Control B
  605. STATUS: byte; //Status
  606. const
  607. // Enable CRC scan
  608. ENABLEbm = $01;
  609. // Enable NMI Trigger
  610. NMIENbm = $02;
  611. // Reset CRC scan
  612. RESETbm = $80;
  613. // CRCSCAN_SRC
  614. SRCmask = $03;
  615. SRC_FLASH = $00;
  616. SRC_APPLICATION = $01;
  617. SRC_BOOT = $02;
  618. // CRC Busy
  619. BUSYbm = $01;
  620. // CRC Ok
  621. OKbm = $02;
  622. end;
  623. TDAC = object //Digital to Analog Converter
  624. CTRLA: byte; //Control Register A
  625. Reserved1: byte;
  626. DATA: word; //DATA Register
  627. const
  628. // DAC Enable
  629. ENABLEbm = $01;
  630. // Output Buffer Enable
  631. OUTENbm = $40;
  632. // Run in Standby Mode
  633. RUNSTDBYbm = $80;
  634. end;
  635. TEVSYS = object //Event System
  636. SWEVENTA: byte; //Software Event A
  637. SWEVENTB: byte; //Software Event B
  638. Reserved2: byte;
  639. Reserved3: byte;
  640. Reserved4: byte;
  641. Reserved5: byte;
  642. Reserved6: byte;
  643. Reserved7: byte;
  644. Reserved8: byte;
  645. Reserved9: byte;
  646. Reserved10: byte;
  647. Reserved11: byte;
  648. Reserved12: byte;
  649. Reserved13: byte;
  650. Reserved14: byte;
  651. Reserved15: byte;
  652. CHANNEL0: byte; //Multiplexer Channel 0
  653. CHANNEL1: byte; //Multiplexer Channel 1
  654. CHANNEL2: byte; //Multiplexer Channel 2
  655. CHANNEL3: byte; //Multiplexer Channel 3
  656. CHANNEL4: byte; //Multiplexer Channel 4
  657. CHANNEL5: byte; //Multiplexer Channel 5
  658. Reserved22: byte;
  659. Reserved23: byte;
  660. Reserved24: byte;
  661. Reserved25: byte;
  662. Reserved26: byte;
  663. Reserved27: byte;
  664. Reserved28: byte;
  665. Reserved29: byte;
  666. Reserved30: byte;
  667. Reserved31: byte;
  668. USERCCLLUT0A: byte; //User 0 - CCL0 Event A
  669. USERCCLLUT0B: byte; //User 1 - CCL0 Event B
  670. USERCCLLUT1A: byte; //User 2 - CCL1 Event A
  671. USERCCLLUT1B: byte; //User 3 - CCL1 Event B
  672. USERCCLLUT2A: byte; //User 4 - CCL2 Event A
  673. USERCCLLUT2B: byte; //User 5 - CCL2 Event B
  674. USERCCLLUT3A: byte; //User 6 - CCL3 Event A
  675. USERCCLLUT3B: byte; //User 7 - CCL3 Event B
  676. USERADC0START: byte; //User 12 - ADC0
  677. USEREVSYSEVOUTA: byte; //User 13 - EVOUTA
  678. USEREVSYSEVOUTC: byte; //User 15 - EVOUTC
  679. USEREVSYSEVOUTD: byte; //User 16 - EVOUTD
  680. USEREVSYSEVOUTF: byte; //User 18 - EVOUTF
  681. USERUSART0IRDA: byte; //User 20 - USART0
  682. USERUSART1IRDA: byte; //User 21 - USART1
  683. USERTCA0CNTA: byte; //User 26 - TCA0 Event A
  684. USERTCA0CNTB: byte; //User 27 - TCA0 Event B
  685. USERTCB0CAPT: byte; //User 30 - TCB0 Event A
  686. USERTCB0COUNT: byte; //User 31 - TCB0 Event B
  687. USERTCB1CAPT: byte; //User 32 - TCB1 Event A
  688. USERTCB1COUNT: byte; //User 33 - TCB1 Event B
  689. USERTCB2CAPT: byte; //User 34 - TCB2 Event A
  690. USERTCB2COUNT: byte; //User 35 - TCB2 Event B
  691. USERTCD0INPUTA: byte; //User 40 - TCD0 Event A
  692. USERTCD0INPUTB: byte; //User 41 - TCD0 Event B
  693. const
  694. // EVSYS_SWEVENTA
  695. SWEVENTAmask = $FF;
  696. SWEVENTA_CH0 = $01;
  697. SWEVENTA_CH1 = $02;
  698. SWEVENTA_CH2 = $04;
  699. SWEVENTA_CH3 = $08;
  700. SWEVENTA_CH4 = $10;
  701. SWEVENTA_CH5 = $20;
  702. SWEVENTA_CH6 = $40;
  703. SWEVENTA_CH7 = $80;
  704. // EVSYS_SWEVENTB
  705. SWEVENTBmask = $03;
  706. SWEVENTB_CH8 = $00;
  707. SWEVENTB_CH9 = $01;
  708. // EVSYS_CHANNEL0
  709. CHANNEL0mask = $FF;
  710. CHANNEL0_OFF = $00;
  711. CHANNEL0_UPDI_SYNCH = $01;
  712. CHANNEL0_MVIO = $05;
  713. CHANNEL0_RTC_OVF = $06;
  714. CHANNEL0_RTC_CMP = $07;
  715. CHANNEL0_RTC_PIT_DIV8192 = $08;
  716. CHANNEL0_RTC_PIT_DIV4096 = $09;
  717. CHANNEL0_RTC_PIT_DIV2048 = $0A;
  718. CHANNEL0_RTC_PIT_DIV1024 = $0B;
  719. CHANNEL0_CCL_LUT0 = $10;
  720. CHANNEL0_CCL_LUT1 = $11;
  721. CHANNEL0_CCL_LUT2 = $12;
  722. CHANNEL0_CCL_LUT3 = $13;
  723. CHANNEL0_AC0_OUT = $20;
  724. CHANNEL0_ADC0_RESRDY = $24;
  725. CHANNEL0_ZCD3 = $30;
  726. CHANNEL0_PORTA_PIN0 = $40;
  727. CHANNEL0_PORTA_PIN1 = $41;
  728. CHANNEL0_USART0_XCK = $60;
  729. CHANNEL0_USART1_XCK = $61;
  730. CHANNEL0_SPI0_SCK = $68;
  731. CHANNEL0_TCA0_OVF_LUNF = $80;
  732. CHANNEL0_TCA0_HUNF = $81;
  733. CHANNEL0_TCA0_CMP0_LCMP0 = $84;
  734. CHANNEL0_TCA0_CMP1_LCMP1 = $85;
  735. CHANNEL0_TCA0_CMP2_LCMP2 = $86;
  736. CHANNEL0_TCB0_CAPT = $A0;
  737. CHANNEL0_TCB0_OVF = $A1;
  738. CHANNEL0_TCB1_CAPT = $A2;
  739. CHANNEL0_TCB1_OVF = $A3;
  740. CHANNEL0_TCB2_CAPT = $A4;
  741. CHANNEL0_TCB2_OVF = $A5;
  742. CHANNEL0_TCD0_CMPBCLR = $B0;
  743. CHANNEL0_TCD0_CMPASET = $B1;
  744. CHANNEL0_TCD0_CMPBSET = $B2;
  745. CHANNEL0_TCD0_PROGEV = $B3;
  746. // EVSYS_CHANNEL1
  747. CHANNEL1mask = $FF;
  748. CHANNEL1_OFF = $00;
  749. CHANNEL1_UPDI_SYNCH = $01;
  750. CHANNEL1_MVIO = $05;
  751. CHANNEL1_RTC_OVF = $06;
  752. CHANNEL1_RTC_CMP = $07;
  753. CHANNEL1_RTC_PIT_DIV512 = $08;
  754. CHANNEL1_RTC_PIT_DIV256 = $09;
  755. CHANNEL1_RTC_PIT_DIV128 = $0A;
  756. CHANNEL1_RTC_PIT_DIV64 = $0B;
  757. CHANNEL1_CCL_LUT0 = $10;
  758. CHANNEL1_CCL_LUT1 = $11;
  759. CHANNEL1_CCL_LUT2 = $12;
  760. CHANNEL1_CCL_LUT3 = $13;
  761. CHANNEL1_AC0_OUT = $20;
  762. CHANNEL1_ADC0_RESRDY = $24;
  763. CHANNEL1_ZCD3 = $30;
  764. CHANNEL1_PORTA_PIN0 = $40;
  765. CHANNEL1_PORTA_PIN1 = $41;
  766. CHANNEL1_USART0_XCK = $60;
  767. CHANNEL1_USART1_XCK = $61;
  768. CHANNEL1_SPI0_SCK = $68;
  769. CHANNEL1_TCA0_OVF_LUNF = $80;
  770. CHANNEL1_TCA0_HUNF = $81;
  771. CHANNEL1_TCA0_CMP0_LCMP0 = $84;
  772. CHANNEL1_TCA0_CMP1_LCMP1 = $85;
  773. CHANNEL1_TCA0_CMP2_LCMP2 = $86;
  774. CHANNEL1_TCB0_CAPT = $A0;
  775. CHANNEL1_TCB0_OVF = $A1;
  776. CHANNEL1_TCB1_CAPT = $A2;
  777. CHANNEL1_TCB1_OVF = $A3;
  778. CHANNEL1_TCB2_CAPT = $A4;
  779. CHANNEL1_TCB2_OVF = $A5;
  780. CHANNEL1_TCD0_CMPBCLR = $B0;
  781. CHANNEL1_TCD0_CMPASET = $B1;
  782. CHANNEL1_TCD0_CMPBSET = $B2;
  783. CHANNEL1_TCD0_PROGEV = $B3;
  784. // EVSYS_CHANNEL2
  785. CHANNEL2mask = $FF;
  786. CHANNEL2_OFF = $00;
  787. CHANNEL2_UPDI_SYNCH = $01;
  788. CHANNEL2_MVIO = $05;
  789. CHANNEL2_RTC_OVF = $06;
  790. CHANNEL2_RTC_CMP = $07;
  791. CHANNEL2_RTC_PIT_DIV8192 = $08;
  792. CHANNEL2_RTC_PIT_DIV4096 = $09;
  793. CHANNEL2_RTC_PIT_DIV2048 = $0A;
  794. CHANNEL2_RTC_PIT_DIV1024 = $0B;
  795. CHANNEL2_CCL_LUT0 = $10;
  796. CHANNEL2_CCL_LUT1 = $11;
  797. CHANNEL2_CCL_LUT2 = $12;
  798. CHANNEL2_CCL_LUT3 = $13;
  799. CHANNEL2_AC0_OUT = $20;
  800. CHANNEL2_ADC0_RESRDY = $24;
  801. CHANNEL2_ZCD3 = $30;
  802. CHANNEL2_PORTC_PIN1 = $41;
  803. CHANNEL2_PORTC_PIN2 = $42;
  804. CHANNEL2_PORTC_PIN3 = $43;
  805. CHANNEL2_PORTD_PIN4 = $4C;
  806. CHANNEL2_PORTD_PIN5 = $4D;
  807. CHANNEL2_PORTD_PIN6 = $4E;
  808. CHANNEL2_PORTD_PIN7 = $4F;
  809. CHANNEL2_USART0_XCK = $60;
  810. CHANNEL2_USART1_XCK = $61;
  811. CHANNEL2_SPI0_SCK = $68;
  812. CHANNEL2_TCA0_OVF_LUNF = $80;
  813. CHANNEL2_TCA0_HUNF = $81;
  814. CHANNEL2_TCA0_CMP0_LCMP0 = $84;
  815. CHANNEL2_TCA0_CMP1_LCMP1 = $85;
  816. CHANNEL2_TCA0_CMP2_LCMP2 = $86;
  817. CHANNEL2_TCB0_CAPT = $A0;
  818. CHANNEL2_TCB0_OVF = $A1;
  819. CHANNEL2_TCB1_CAPT = $A2;
  820. CHANNEL2_TCB1_OVF = $A3;
  821. CHANNEL2_TCB2_CAPT = $A4;
  822. CHANNEL2_TCB2_OVF = $A5;
  823. CHANNEL2_TCD0_CMPBCLR = $B0;
  824. CHANNEL2_TCD0_CMPASET = $B1;
  825. CHANNEL2_TCD0_CMPBSET = $B2;
  826. CHANNEL2_TCD0_PROGEV = $B3;
  827. // EVSYS_CHANNEL3
  828. CHANNEL3mask = $FF;
  829. CHANNEL3_OFF = $00;
  830. CHANNEL3_UPDI_SYNCH = $01;
  831. CHANNEL3_MVIO = $05;
  832. CHANNEL3_RTC_OVF = $06;
  833. CHANNEL3_RTC_CMP = $07;
  834. CHANNEL3_RTC_PIT_DIV512 = $08;
  835. CHANNEL3_RTC_PIT_DIV256 = $09;
  836. CHANNEL3_RTC_PIT_DIV128 = $0A;
  837. CHANNEL3_RTC_PIT_DIV64 = $0B;
  838. CHANNEL3_CCL_LUT0 = $10;
  839. CHANNEL3_CCL_LUT1 = $11;
  840. CHANNEL3_CCL_LUT2 = $12;
  841. CHANNEL3_CCL_LUT3 = $13;
  842. CHANNEL3_AC0_OUT = $20;
  843. CHANNEL3_ADC0_RESRDY = $24;
  844. CHANNEL3_ZCD3 = $30;
  845. CHANNEL3_PORTC_PIN1 = $41;
  846. CHANNEL3_PORTC_PIN2 = $42;
  847. CHANNEL3_PORTC_PIN3 = $43;
  848. CHANNEL3_PORTD_PIN4 = $4C;
  849. CHANNEL3_PORTD_PIN5 = $4D;
  850. CHANNEL3_PORTD_PIN6 = $4E;
  851. CHANNEL3_PORTD_PIN7 = $4F;
  852. CHANNEL3_USART0_XCK = $60;
  853. CHANNEL3_USART1_XCK = $61;
  854. CHANNEL3_SPI0_SCK = $68;
  855. CHANNEL3_TCA0_OVF_LUNF = $80;
  856. CHANNEL3_TCA0_HUNF = $81;
  857. CHANNEL3_TCA0_CMP0_LCMP0 = $84;
  858. CHANNEL3_TCA0_CMP1_LCMP1 = $85;
  859. CHANNEL3_TCA0_CMP2_LCMP2 = $86;
  860. CHANNEL3_TCB0_CAPT = $A0;
  861. CHANNEL3_TCB0_OVF = $A1;
  862. CHANNEL3_TCB1_CAPT = $A2;
  863. CHANNEL3_TCB1_OVF = $A3;
  864. CHANNEL3_TCB2_CAPT = $A4;
  865. CHANNEL3_TCB2_OVF = $A5;
  866. CHANNEL3_TCD0_CMPBCLR = $B0;
  867. CHANNEL3_TCD0_CMPASET = $B1;
  868. CHANNEL3_TCD0_CMPBSET = $B2;
  869. CHANNEL3_TCD0_PROGEV = $B3;
  870. // EVSYS_CHANNEL4
  871. CHANNEL4mask = $FF;
  872. CHANNEL4_OFF = $00;
  873. CHANNEL4_UPDI_SYNCH = $01;
  874. CHANNEL4_MVIO = $05;
  875. CHANNEL4_RTC_OVF = $06;
  876. CHANNEL4_RTC_CMP = $07;
  877. CHANNEL4_RTC_PIT_DIV8192 = $08;
  878. CHANNEL4_RTC_PIT_DIV4096 = $09;
  879. CHANNEL4_RTC_PIT_DIV2048 = $0A;
  880. CHANNEL4_RTC_PIT_DIV1024 = $0B;
  881. CHANNEL4_CCL_LUT0 = $10;
  882. CHANNEL4_CCL_LUT1 = $11;
  883. CHANNEL4_CCL_LUT2 = $12;
  884. CHANNEL4_CCL_LUT3 = $13;
  885. CHANNEL4_AC0_OUT = $20;
  886. CHANNEL4_ADC0_RESRDY = $24;
  887. CHANNEL4_ZCD3 = $30;
  888. CHANNEL4_PORTF_PIN6 = $4E;
  889. CHANNEL4_PORTF_PIN7 = $4F;
  890. CHANNEL4_USART0_XCK = $60;
  891. CHANNEL4_USART1_XCK = $61;
  892. CHANNEL4_SPI0_SCK = $68;
  893. CHANNEL4_TCA0_OVF_LUNF = $80;
  894. CHANNEL4_TCA0_HUNF = $81;
  895. CHANNEL4_TCA0_CMP0_LCMP0 = $84;
  896. CHANNEL4_TCA0_CMP1_LCMP1 = $85;
  897. CHANNEL4_TCA0_CMP2_LCMP2 = $86;
  898. CHANNEL4_TCB0_CAPT = $A0;
  899. CHANNEL4_TCB0_OVF = $A1;
  900. CHANNEL4_TCB1_CAPT = $A2;
  901. CHANNEL4_TCB1_OVF = $A3;
  902. CHANNEL4_TCB2_CAPT = $A4;
  903. CHANNEL4_TCB2_OVF = $A5;
  904. CHANNEL4_TCD0_CMPBCLR = $B0;
  905. CHANNEL4_TCD0_CMPASET = $B1;
  906. CHANNEL4_TCD0_CMPBSET = $B2;
  907. CHANNEL4_TCD0_PROGEV = $B3;
  908. // EVSYS_CHANNEL5
  909. CHANNEL5mask = $FF;
  910. CHANNEL5_OFF = $00;
  911. CHANNEL5_UPDI_SYNCH = $01;
  912. CHANNEL5_MVIO = $05;
  913. CHANNEL5_RTC_OVF = $06;
  914. CHANNEL5_RTC_CMP = $07;
  915. CHANNEL5_RTC_PIT_DIV512 = $08;
  916. CHANNEL5_RTC_PIT_DIV256 = $09;
  917. CHANNEL5_RTC_PIT_DIV128 = $0A;
  918. CHANNEL5_RTC_PIT_DIV64 = $0B;
  919. CHANNEL5_CCL_LUT0 = $10;
  920. CHANNEL5_CCL_LUT1 = $11;
  921. CHANNEL5_CCL_LUT2 = $12;
  922. CHANNEL5_CCL_LUT3 = $13;
  923. CHANNEL5_AC0_OUT = $20;
  924. CHANNEL5_ADC0_RESRDY = $24;
  925. CHANNEL5_ZCD3 = $30;
  926. CHANNEL5_PORTF_PIN6 = $4E;
  927. CHANNEL5_PORTF_PIN7 = $4F;
  928. CHANNEL5_USART0_XCK = $60;
  929. CHANNEL5_USART1_XCK = $61;
  930. CHANNEL5_SPI0_SCK = $68;
  931. CHANNEL5_TCA0_OVF_LUNF = $80;
  932. CHANNEL5_TCA0_HUNF = $81;
  933. CHANNEL5_TCA0_CMP0_LCMP0 = $84;
  934. CHANNEL5_TCA0_CMP1_LCMP1 = $85;
  935. CHANNEL5_TCA0_CMP2_LCMP2 = $86;
  936. CHANNEL5_TCB0_CAPT = $A0;
  937. CHANNEL5_TCB0_OVF = $A1;
  938. CHANNEL5_TCB1_CAPT = $A2;
  939. CHANNEL5_TCB1_OVF = $A3;
  940. CHANNEL5_TCB2_CAPT = $A4;
  941. CHANNEL5_TCB2_OVF = $A5;
  942. CHANNEL5_TCD0_CMPBCLR = $B0;
  943. CHANNEL5_TCD0_CMPASET = $B1;
  944. CHANNEL5_TCD0_CMPBSET = $B2;
  945. CHANNEL5_TCD0_PROGEV = $B3;
  946. // EVSYS_USER
  947. USERmask = $FF;
  948. USER_OFF = $00;
  949. USER_CHANNEL0 = $01;
  950. USER_CHANNEL1 = $02;
  951. USER_CHANNEL2 = $03;
  952. USER_CHANNEL3 = $04;
  953. USER_CHANNEL4 = $05;
  954. USER_CHANNEL5 = $06;
  955. end;
  956. TFUSE = object //Fuses
  957. WDTCFG: byte; //Watchdog Configuration
  958. BODCFG: byte; //BOD Configuration
  959. OSCCFG: byte; //Oscillator Configuration
  960. Reserved3: byte;
  961. Reserved4: byte;
  962. SYSCFG0: byte; //System Configuration 0
  963. SYSCFG1: byte; //System Configuration 1
  964. CODESIZE: byte; //Code Section Size
  965. BOOTSIZE: byte; //Boot Section Size
  966. const
  967. // FUSE_PERIOD
  968. PERIODmask = $0F;
  969. PERIOD_OFF = $00;
  970. PERIOD_8CLK = $01;
  971. PERIOD_16CLK = $02;
  972. PERIOD_32CLK = $03;
  973. PERIOD_64CLK = $04;
  974. PERIOD_128CLK = $05;
  975. PERIOD_256CLK = $06;
  976. PERIOD_512CLK = $07;
  977. PERIOD_1KCLK = $08;
  978. PERIOD_2KCLK = $09;
  979. PERIOD_4KCLK = $0A;
  980. PERIOD_8KCLK = $0B;
  981. // FUSE_WINDOW
  982. WINDOWmask = $F0;
  983. WINDOW_OFF = $00;
  984. WINDOW_8CLK = $10;
  985. WINDOW_16CLK = $20;
  986. WINDOW_32CLK = $30;
  987. WINDOW_64CLK = $40;
  988. WINDOW_128CLK = $50;
  989. WINDOW_256CLK = $60;
  990. WINDOW_512CLK = $70;
  991. WINDOW_1KCLK = $80;
  992. WINDOW_2KCLK = $90;
  993. WINDOW_4KCLK = $A0;
  994. WINDOW_8KCLK = $B0;
  995. // FUSE_SLEEP
  996. SLEEPmask = $03;
  997. SLEEP_DISABLE = $00;
  998. SLEEP_ENABLE = $01;
  999. SLEEP_SAMPLE = $02;
  1000. // FUSE_ACTIVE
  1001. ACTIVEmask = $0C;
  1002. ACTIVE_DISABLE = $00;
  1003. ACTIVE_ENABLE = $04;
  1004. ACTIVE_SAMPLE = $08;
  1005. ACTIVE_ENABLEWAIT = $0C;
  1006. // FUSE_SAMPFREQ
  1007. SAMPFREQmask = $10;
  1008. SAMPFREQ_128Hz = $00;
  1009. SAMPFREQ_32Hz = $10;
  1010. // FUSE_LVL
  1011. LVLmask = $E0;
  1012. LVL_BODLEVEL0 = $00;
  1013. LVL_BODLEVEL1 = $20;
  1014. LVL_BODLEVEL2 = $40;
  1015. LVL_BODLEVEL3 = $60;
  1016. // FUSE_CLKSEL
  1017. CLKSELmask = $07;
  1018. CLKSEL_OSCHF = $00;
  1019. CLKSEL_OSC32K = $01;
  1020. // EEPROM Save
  1021. EESAVEbm = $01;
  1022. // FUSE_RSTPINCFG
  1023. RSTPINCFGmask = $08;
  1024. RSTPINCFG_GPIO = $00;
  1025. RSTPINCFG_RST = $08;
  1026. // FUSE_UPDIPINCFG
  1027. UPDIPINCFGmask = $10;
  1028. UPDIPINCFG_GPIO = $00;
  1029. UPDIPINCFG_UPDI = $10;
  1030. // FUSE_CRCSEL
  1031. CRCSELmask = $20;
  1032. CRCSEL_CRC16 = $00;
  1033. CRCSEL_CRC32 = $20;
  1034. // FUSE_CRCSRC
  1035. CRCSRCmask = $C0;
  1036. CRCSRC_FLASH = $00;
  1037. CRCSRC_BOOT = $40;
  1038. CRCSRC_BOOTAPP = $80;
  1039. CRCSRC_NOCRC = $C0;
  1040. // FUSE_SUT
  1041. SUTmask = $07;
  1042. SUT_0MS = $00;
  1043. SUT_1MS = $01;
  1044. SUT_2MS = $02;
  1045. SUT_4MS = $03;
  1046. SUT_8MS = $04;
  1047. SUT_16MS = $05;
  1048. SUT_32MS = $06;
  1049. SUT_64MS = $07;
  1050. // FUSE_MVSYSCFG
  1051. MVSYSCFGmask = $18;
  1052. MVSYSCFG_DUAL = $08;
  1053. MVSYSCFG_SINGLE = $10;
  1054. end;
  1055. TGPR = object //General Purpose Registers
  1056. GPR0: byte; //General Purpose Register 0
  1057. GPR1: byte; //General Purpose Register 1
  1058. GPR2: byte; //General Purpose Register 2
  1059. GPR3: byte; //General Purpose Register 3
  1060. end;
  1061. TLOCK = object //Lockbits
  1062. KEY: dword; //Lock Key Bits
  1063. const
  1064. // LOCK_KEY
  1065. KEYmask = $FFFFFFFF;
  1066. KEY_NOLOCK = $5CC5C55C;
  1067. KEY_RWLOCK = $A33A3AA3;
  1068. end;
  1069. TMVIO = object //Multi-Voltage I/O
  1070. INTCTRL: byte; //Interrupt Control
  1071. INTFLAGS: byte; //Interrupt Flags
  1072. STATUS: byte; //Status
  1073. const
  1074. // VDDIO2 Interrupt Enable
  1075. VDDIO2IEbm = $01;
  1076. // VDDIO2 Interrupt Flag
  1077. VDDIO2IFbm = $01;
  1078. // VDDIO2 Status
  1079. VDDIO2Sbm = $01;
  1080. end;
  1081. TNVMCTRL = object //Non-volatile Memory Controller
  1082. CTRLA: byte; //Control A
  1083. CTRLB: byte; //Control B
  1084. STATUS: byte; //Status
  1085. INTCTRL: byte; //Interrupt Control
  1086. INTFLAGS: byte; //Interrupt Flags
  1087. Reserved5: byte;
  1088. DATA: word; //Data
  1089. ADDR: dword; //Address
  1090. const
  1091. // NVMCTRL_CMD
  1092. CMDmask = $7F;
  1093. CMD_NONE = $00;
  1094. CMD_NOOP = $01;
  1095. CMD_FLWR = $02;
  1096. CMD_FLPER = $08;
  1097. CMD_FLMPER2 = $09;
  1098. CMD_FLMPER4 = $0A;
  1099. CMD_FLMPER8 = $0B;
  1100. CMD_FLMPER16 = $0C;
  1101. CMD_FLMPER32 = $0D;
  1102. CMD_EEWR = $12;
  1103. CMD_EEERWR = $13;
  1104. CMD_EEBER = $18;
  1105. CMD_EEMBER2 = $19;
  1106. CMD_EEMBER4 = $1A;
  1107. CMD_EEMBER8 = $1B;
  1108. CMD_EEMBER16 = $1C;
  1109. CMD_EEMBER32 = $1D;
  1110. CMD_CHER = $20;
  1111. CMD_EECHER = $30;
  1112. // Application Code Write Protect
  1113. APPCODEWPbm = $01;
  1114. // Boot Read Protect
  1115. BOOTRPbm = $02;
  1116. // Application Data Write Protect
  1117. APPDATAWPbm = $04;
  1118. // NVMCTRL_FLMAP
  1119. FLMAPmask = $30;
  1120. FLMAP_SECTION0 = $00;
  1121. FLMAP_SECTION1 = $10;
  1122. FLMAP_SECTION2 = $20;
  1123. FLMAP_SECTION3 = $30;
  1124. // Flash Mapping Lock
  1125. FLMAPLOCKbm = $80;
  1126. // Flash busy
  1127. FBUSYbm = $01;
  1128. // EEPROM busy
  1129. EEBUSYbm = $02;
  1130. // NVMCTRL_ERROR
  1131. ERRORmask = $70;
  1132. ERROR_NOERROR = $00;
  1133. ERROR_ILLEGALCMD = $10;
  1134. ERROR_ILLEGALSADDR = $20;
  1135. ERROR_DOUBLESELECT = $30;
  1136. ERROR_ONGOINGPROG = $40;
  1137. // EEPROM Ready
  1138. EEREADYbm = $01;
  1139. end;
  1140. TPORT = object //I/O Ports
  1141. DIR: byte; //Data Direction
  1142. DIRSET: byte; //Data Direction Set
  1143. DIRCLR: byte; //Data Direction Clear
  1144. DIRTGL: byte; //Data Direction Toggle
  1145. OUT_: byte; //Output Value
  1146. OUTSET: byte; //Output Value Set
  1147. OUTCLR: byte; //Output Value Clear
  1148. OUTTGL: byte; //Output Value Toggle
  1149. IN_: byte; //Input Value
  1150. INTFLAGS: byte; //Interrupt Flags
  1151. PORTCTRL: byte; //Port Control
  1152. PINCONFIG: byte; //Pin Control Config
  1153. PINCTRLUPD: byte; //Pin Control Update
  1154. PINCTRLSET: byte; //Pin Control Set
  1155. PINCTRLCLR: byte; //Pin Control Clear
  1156. Reserved15: byte;
  1157. PIN0CTRL: byte; //Pin 0 Control
  1158. PIN1CTRL: byte; //Pin 1 Control
  1159. PIN2CTRL: byte; //Pin 2 Control
  1160. PIN3CTRL: byte; //Pin 3 Control
  1161. PIN4CTRL: byte; //Pin 4 Control
  1162. PIN5CTRL: byte; //Pin 5 Control
  1163. PIN6CTRL: byte; //Pin 6 Control
  1164. PIN7CTRL: byte; //Pin 7 Control
  1165. const
  1166. // Slew Rate Limit Enable
  1167. SRLbm = $01;
  1168. // PORT_ISC
  1169. ISCmask = $07;
  1170. ISC_INTDISABLE = $00;
  1171. ISC_BOTHEDGES = $01;
  1172. ISC_RISING = $02;
  1173. ISC_FALLING = $03;
  1174. ISC_INPUT_DISABLE = $04;
  1175. ISC_LEVEL = $05;
  1176. // Pullup enable
  1177. PULLUPENbm = $08;
  1178. // Input level select
  1179. INLVLbm = $40;
  1180. // Inverted I/O Enable
  1181. INVENbm = $80;
  1182. end;
  1183. TPORTMUX = object //Port Multiplexer
  1184. EVSYSROUTEA: byte; //EVSYS route A
  1185. CCLROUTEA: byte; //CCL route A
  1186. USARTROUTEA: byte; //USART route A
  1187. Reserved3: byte;
  1188. Reserved4: byte;
  1189. SPIROUTEA: byte; //SPI route A
  1190. TWIROUTEA: byte; //TWI route A
  1191. TCAROUTEA: byte; //TCA route A
  1192. Reserved8: byte;
  1193. TCDROUTEA: byte; //TCD route A
  1194. const
  1195. // PORTMUX_EVOUTC
  1196. EVOUTCmask = $04;
  1197. EVOUTC_DEFAULT = $00;
  1198. // PORTMUX_EVOUTD
  1199. EVOUTDmask = $08;
  1200. EVOUTD_DEFAULT = $00;
  1201. EVOUTD_ALT1 = $08;
  1202. // PORTMUX_LUT0
  1203. LUT0mask = $01;
  1204. LUT0_DEFAULT = $00;
  1205. LUT0_ALT1 = $01;
  1206. // PORTMUX_LUT1
  1207. LUT1mask = $02;
  1208. LUT1_DEFAULT = $00;
  1209. LUT1_ALT1 = $02;
  1210. // PORTMUX_LUT2
  1211. LUT2mask = $04;
  1212. LUT2_DEFAULT = $00;
  1213. LUT2_ALT1 = $04;
  1214. // PORTMUX_USART0
  1215. USART0mask = $07;
  1216. USART0_DEFAULT = $00;
  1217. USART0_ALT3 = $03;
  1218. USART0_ALT4 = $04;
  1219. USART0_NONE = $05;
  1220. // PORTMUX_USART1
  1221. USART1mask = $18;
  1222. USART1_DEFAULT = $00;
  1223. USART1_ALT2 = $10;
  1224. USART1_NONE = $18;
  1225. // PORTMUX_SPI0
  1226. SPI0mask = $07;
  1227. SPI0_DEFAULT = $00;
  1228. SPI0_ALT3 = $03;
  1229. SPI0_ALT4 = $04;
  1230. SPI0_ALT5 = $05;
  1231. SPI0_ALT6 = $06;
  1232. SPI0_NONE = $07;
  1233. // PORTMUX_TWI0
  1234. TWI0mask = $03;
  1235. TWI0_DEFAULT = $00;
  1236. TWI0_ALT2 = $02;
  1237. TWI0_ALT3 = $03;
  1238. // PORTMUX_TCA0
  1239. TCA0mask = $07;
  1240. TCA0_PORTA = $00;
  1241. TCA0_PORTC = $02;
  1242. TCA0_PORTD = $03;
  1243. // PORTMUX_TCD0
  1244. TCD0mask = $07;
  1245. TCD0_DEFAULT = $00;
  1246. TCD0_ALT4 = $04;
  1247. end;
  1248. TRSTCTRL = object //Reset controller
  1249. RSTFR: byte; //Reset Flags
  1250. SWRR: byte; //Software Reset
  1251. const
  1252. // Power on Reset flag
  1253. PORFbm = $01;
  1254. // Brown out detector Reset flag
  1255. BORFbm = $02;
  1256. // External Reset flag
  1257. EXTRFbm = $04;
  1258. // Watch dog Reset flag
  1259. WDRFbm = $08;
  1260. // Software Reset flag
  1261. SWRFbm = $10;
  1262. // UPDI Reset flag
  1263. UPDIRFbm = $20;
  1264. // Software reset enable
  1265. SWRSTbm = $01;
  1266. end;
  1267. TRTC = object //Real-Time Counter
  1268. CTRLA: byte; //Control A
  1269. STATUS: byte; //Status
  1270. INTCTRL: byte; //Interrupt Control
  1271. INTFLAGS: byte; //Interrupt Flags
  1272. TEMP: byte; //Temporary
  1273. DBGCTRL: byte; //Debug control
  1274. CALIB: byte; //Calibration
  1275. CLKSEL: byte; //Clock Select
  1276. CNT: word; //Counter
  1277. PER: word; //Period
  1278. CMP: word; //Compare
  1279. Reserved14: byte;
  1280. Reserved15: byte;
  1281. PITCTRLA: byte; //PIT Control A
  1282. PITSTATUS: byte; //PIT Status
  1283. PITINTCTRL: byte; //PIT Interrupt Control
  1284. PITINTFLAGS: byte; //PIT Interrupt Flags
  1285. Reserved20: byte;
  1286. PITDBGCTRL: byte; //PIT Debug control
  1287. const
  1288. // Enable
  1289. RTCENbm = $01;
  1290. // Correction enable
  1291. CORRENbm = $04;
  1292. // RTC_PRESCALER
  1293. PRESCALERmask = $78;
  1294. PRESCALER_DIV1 = $00;
  1295. PRESCALER_DIV2 = $08;
  1296. PRESCALER_DIV4 = $10;
  1297. PRESCALER_DIV8 = $18;
  1298. PRESCALER_DIV16 = $20;
  1299. PRESCALER_DIV32 = $28;
  1300. PRESCALER_DIV64 = $30;
  1301. PRESCALER_DIV128 = $38;
  1302. PRESCALER_DIV256 = $40;
  1303. PRESCALER_DIV512 = $48;
  1304. PRESCALER_DIV1024 = $50;
  1305. PRESCALER_DIV2048 = $58;
  1306. PRESCALER_DIV4096 = $60;
  1307. PRESCALER_DIV8192 = $68;
  1308. PRESCALER_DIV16384 = $70;
  1309. PRESCALER_DIV32768 = $78;
  1310. // Run In Standby
  1311. RUNSTDBYbm = $80;
  1312. // CTRLA Synchronization Busy Flag
  1313. CTRLABUSYbm = $01;
  1314. // Count Synchronization Busy Flag
  1315. CNTBUSYbm = $02;
  1316. // Period Synchronization Busy Flag
  1317. PERBUSYbm = $04;
  1318. // Comparator Synchronization Busy Flag
  1319. CMPBUSYbm = $08;
  1320. // Overflow Interrupt enable
  1321. OVFbm = $01;
  1322. // Compare Match Interrupt enable
  1323. CMPbm = $02;
  1324. // Run in debug
  1325. DBGRUNbm = $01;
  1326. // Error Correction Value
  1327. ERROR0bm = $01;
  1328. ERROR1bm = $02;
  1329. ERROR2bm = $04;
  1330. ERROR3bm = $08;
  1331. ERROR4bm = $10;
  1332. ERROR5bm = $20;
  1333. ERROR6bm = $40;
  1334. // Error Correction Sign Bit
  1335. SIGNbm = $80;
  1336. // RTC_CLKSEL
  1337. CLKSELmask = $03;
  1338. CLKSEL_OSC32K = $00;
  1339. CLKSEL_OSC1K = $01;
  1340. CLKSEL_XTAL32K = $02;
  1341. CLKSEL_EXTCLK = $03;
  1342. // Enable
  1343. PITENbm = $01;
  1344. // RTC_PERIOD
  1345. PERIODmask = $78;
  1346. PERIOD_OFF = $00;
  1347. PERIOD_CYC4 = $08;
  1348. PERIOD_CYC8 = $10;
  1349. PERIOD_CYC16 = $18;
  1350. PERIOD_CYC32 = $20;
  1351. PERIOD_CYC64 = $28;
  1352. PERIOD_CYC128 = $30;
  1353. PERIOD_CYC256 = $38;
  1354. PERIOD_CYC512 = $40;
  1355. PERIOD_CYC1024 = $48;
  1356. PERIOD_CYC2048 = $50;
  1357. PERIOD_CYC4096 = $58;
  1358. PERIOD_CYC8192 = $60;
  1359. PERIOD_CYC16384 = $68;
  1360. PERIOD_CYC32768 = $70;
  1361. // CTRLA Synchronization Busy Flag
  1362. CTRLBUSYbm = $01;
  1363. // Periodic Interrupt
  1364. PIbm = $01;
  1365. end;
  1366. TSIGROW = object //Signature row
  1367. DEVICEID0: byte; //Device ID Byte 0
  1368. DEVICEID1: byte; //Device ID Byte 1
  1369. DEVICEID2: byte; //Device ID Byte 2
  1370. Reserved3: byte;
  1371. TEMPSENSE0: word; //Temperature Calibration 0
  1372. TEMPSENSE1: word; //Temperature Calibration 1
  1373. Reserved8: byte;
  1374. Reserved9: byte;
  1375. Reserved10: byte;
  1376. Reserved11: byte;
  1377. Reserved12: byte;
  1378. Reserved13: byte;
  1379. Reserved14: byte;
  1380. Reserved15: byte;
  1381. SERNUM0: byte; //LOTNUM0
  1382. SERNUM1: byte; //LOTNUM1
  1383. SERNUM2: byte; //LOTNUM2
  1384. SERNUM3: byte; //LOTNUM3
  1385. SERNUM4: byte; //LOTNUM4
  1386. SERNUM5: byte; //LOTNUM5
  1387. SERNUM6: byte; //RANDOM
  1388. SERNUM7: byte; //SCRIBE
  1389. SERNUM8: byte; //XPOS0
  1390. SERNUM9: byte; //XPOS1
  1391. SERNUM10: byte; //YPOS0
  1392. SERNUM11: byte; //YPOS1
  1393. SERNUM12: byte; //RES0
  1394. SERNUM13: byte; //RES1
  1395. SERNUM14: byte; //RES2
  1396. SERNUM15: byte; //RES3
  1397. end;
  1398. TSLPCTRL = object //Sleep Controller
  1399. CTRLA: byte; //Control A
  1400. VREGCTRL: byte; //Control B
  1401. const
  1402. // Sleep enable
  1403. SENbm = $01;
  1404. // SLPCTRL_SMODE
  1405. SMODEmask = $06;
  1406. SMODE_IDLE = $00;
  1407. SMODE_STDBY = $02;
  1408. SMODE_PDOWN = $04;
  1409. // SLPCTRL_PMODE
  1410. PMODEmask = $07;
  1411. PMODE_AUTO = $00;
  1412. PMODE_FULL = $01;
  1413. // SLPCTRL_HTLLEN
  1414. HTLLENmask = $10;
  1415. HTLLEN_OFF = $00;
  1416. HTLLEN_ON = $10;
  1417. end;
  1418. TSPI = object //Serial Peripheral Interface
  1419. CTRLA: byte; //Control A
  1420. CTRLB: byte; //Control B
  1421. INTCTRL: byte; //Interrupt Control
  1422. INTFLAGS: byte; //Interrupt Flags
  1423. DATA: byte; //Data
  1424. const
  1425. // Enable Module
  1426. ENABLEbm = $01;
  1427. // SPI_PRESC
  1428. PRESCmask = $06;
  1429. PRESC_DIV4 = $00;
  1430. PRESC_DIV16 = $02;
  1431. PRESC_DIV64 = $04;
  1432. PRESC_DIV128 = $06;
  1433. // Enable Double Speed
  1434. CLK2Xbm = $10;
  1435. // Host Operation Enable
  1436. MASTERbm = $20;
  1437. // Data Order Setting
  1438. DORDbm = $40;
  1439. // SPI_MODE
  1440. MODEmask = $03;
  1441. MODE_0 = $00;
  1442. MODE_1 = $01;
  1443. MODE_2 = $02;
  1444. MODE_3 = $03;
  1445. // SPI Select Disable
  1446. SSDbm = $04;
  1447. // Buffer Mode Wait for Receive
  1448. BUFWRbm = $40;
  1449. // Buffer Mode Enable
  1450. BUFENbm = $80;
  1451. // Interrupt Enable
  1452. IEbm = $01;
  1453. // SPI Select Trigger Interrupt Enable
  1454. SSIEbm = $10;
  1455. // Data Register Empty Interrupt Enable
  1456. DREIEbm = $20;
  1457. // Transfer Complete Interrupt Enable
  1458. TXCIEbm = $40;
  1459. // Receive Complete Interrupt Enable
  1460. RXCIEbm = $80;
  1461. end;
  1462. TSYSCFG = object //System Configuration Registers
  1463. Reserved0: byte;
  1464. REVID: byte; //Revision ID
  1465. Reserved2: byte;
  1466. Reserved3: byte;
  1467. OCDMCTRL: byte; //OCD Message Control
  1468. OCDMSTATUS: byte; //OCD Message Status
  1469. const
  1470. // OCD Message Valid
  1471. VALIDbm = $01;
  1472. end;
  1473. TTCA = object //16-bit Timer/Counter Type A
  1474. end;
  1475. TTCB = object //16-bit Timer Type B
  1476. CTRLA: byte; //Control A
  1477. CTRLB: byte; //Control Register B
  1478. Reserved2: byte;
  1479. Reserved3: byte;
  1480. EVCTRL: byte; //Event Control
  1481. INTCTRL: byte; //Interrupt Control
  1482. INTFLAGS: byte; //Interrupt Flags
  1483. STATUS: byte; //Status
  1484. DBGCTRL: byte; //Debug Control
  1485. TEMP: byte; //Temporary Value
  1486. CNT: word; //Count
  1487. CCMP: word; //Compare or Capture
  1488. const
  1489. // Enable
  1490. ENABLEbm = $01;
  1491. // TCB_CLKSEL
  1492. CLKSELmask = $0E;
  1493. CLKSEL_DIV1 = $00;
  1494. CLKSEL_DIV2 = $02;
  1495. CLKSEL_TCA0 = $04;
  1496. CLKSEL_EVENT = $0E;
  1497. // Synchronize Update
  1498. SYNCUPDbm = $10;
  1499. // Cascade two timers
  1500. CASCADEbm = $20;
  1501. // Run Standby
  1502. RUNSTDBYbm = $40;
  1503. // TCB_CNTMODE
  1504. CNTMODEmask = $07;
  1505. CNTMODE_INT = $00;
  1506. CNTMODE_TIMEOUT = $01;
  1507. CNTMODE_CAPT = $02;
  1508. CNTMODE_FRQ = $03;
  1509. CNTMODE_PW = $04;
  1510. CNTMODE_FRQPW = $05;
  1511. CNTMODE_SINGLE = $06;
  1512. CNTMODE_PWM8 = $07;
  1513. // Pin Output Enable
  1514. CCMPENbm = $10;
  1515. // Pin Initial State
  1516. CCMPINITbm = $20;
  1517. // Asynchronous Enable
  1518. ASYNCbm = $40;
  1519. // Event Input Enable
  1520. CAPTEIbm = $01;
  1521. // Event Edge
  1522. EDGEbm = $10;
  1523. // Input Capture Noise Cancellation Filter
  1524. FILTERbm = $40;
  1525. // Capture or Timeout
  1526. CAPTbm = $01;
  1527. // Overflow
  1528. OVFbm = $02;
  1529. // Run
  1530. RUNbm = $01;
  1531. // Debug Run
  1532. DBGRUNbm = $01;
  1533. end;
  1534. TTCD = object //Timer Counter D
  1535. CTRLA: byte; //Control A
  1536. CTRLB: byte; //Control B
  1537. CTRLC: byte; //Control C
  1538. CTRLD: byte; //Control D
  1539. CTRLE: byte; //Control E
  1540. Reserved5: byte;
  1541. Reserved6: byte;
  1542. Reserved7: byte;
  1543. EVCTRLA: byte; //EVCTRLA
  1544. EVCTRLB: byte; //EVCTRLB
  1545. Reserved10: byte;
  1546. Reserved11: byte;
  1547. INTCTRL: byte; //Interrupt Control
  1548. INTFLAGS: byte; //Interrupt Flags
  1549. STATUS: byte; //Status
  1550. Reserved15: byte;
  1551. INPUTCTRLA: byte; //Input Control A
  1552. INPUTCTRLB: byte; //Input Control B
  1553. FAULTCTRL: byte; //Fault Control
  1554. Reserved19: byte;
  1555. DLYCTRL: byte; //Delay Control
  1556. DLYVAL: byte; //Delay value
  1557. Reserved22: byte;
  1558. Reserved23: byte;
  1559. DITCTRL: byte; //Dither Control A
  1560. DITVAL: byte; //Dither value
  1561. Reserved26: byte;
  1562. Reserved27: byte;
  1563. Reserved28: byte;
  1564. Reserved29: byte;
  1565. DBGCTRL: byte; //Debug Control
  1566. Reserved31: byte;
  1567. Reserved32: byte;
  1568. Reserved33: byte;
  1569. CAPTUREA: word; //Capture A
  1570. CAPTUREB: word; //Capture B
  1571. Reserved38: byte;
  1572. Reserved39: byte;
  1573. CMPASET: word; //Compare A Set
  1574. CMPACLR: word; //Compare A Clear
  1575. CMPBSET: word; //Compare B Set
  1576. CMPBCLR: word; //Compare B Clear
  1577. const
  1578. // Enable
  1579. ENABLEbm = $01;
  1580. // TCD_SYNCPRES
  1581. SYNCPRESmask = $06;
  1582. SYNCPRES_DIV1 = $00;
  1583. SYNCPRES_DIV2 = $02;
  1584. SYNCPRES_DIV4 = $04;
  1585. SYNCPRES_DIV8 = $06;
  1586. // TCD_CNTPRES
  1587. CNTPRESmask = $18;
  1588. CNTPRES_DIV1 = $00;
  1589. CNTPRES_DIV4 = $08;
  1590. CNTPRES_DIV32 = $10;
  1591. // TCD_CLKSEL
  1592. CLKSELmask = $60;
  1593. CLKSEL_OSCHF = $00;
  1594. CLKSEL_PLL = $20;
  1595. CLKSEL_EXTCLK = $40;
  1596. CLKSEL_CLKPER = $60;
  1597. // TCD_WGMODE
  1598. WGMODEmask = $03;
  1599. WGMODE_ONERAMP = $00;
  1600. WGMODE_TWORAMP = $01;
  1601. WGMODE_FOURRAMP = $02;
  1602. WGMODE_DS = $03;
  1603. // Compare output value override
  1604. CMPOVRbm = $01;
  1605. // Auto update
  1606. AUPDATEbm = $02;
  1607. // Fifty percent waveform
  1608. FIFTYbm = $08;
  1609. // TCD_CMPCSEL
  1610. CMPCSELmask = $40;
  1611. CMPCSEL_PWMA = $00;
  1612. CMPCSEL_PWMB = $40;
  1613. // TCD_CMPDSEL
  1614. CMPDSELmask = $80;
  1615. CMPDSEL_PWMA = $00;
  1616. CMPDSEL_PWMB = $80;
  1617. // Compare A value
  1618. CMPAVAL0bm = $01;
  1619. CMPAVAL1bm = $02;
  1620. CMPAVAL2bm = $04;
  1621. CMPAVAL3bm = $08;
  1622. // Compare B value
  1623. CMPBVAL0bm = $10;
  1624. CMPBVAL1bm = $20;
  1625. CMPBVAL2bm = $40;
  1626. CMPBVAL3bm = $80;
  1627. // Synchronize end of cycle strobe
  1628. SYNCEOCbm = $01;
  1629. // synchronize strobe
  1630. SYNCbm = $02;
  1631. // Restart strobe
  1632. RESTARTbm = $04;
  1633. // Software Capture A Strobe
  1634. SCAPTUREAbm = $08;
  1635. // Software Capture B Strobe
  1636. SCAPTUREBbm = $10;
  1637. // Disable at end of cycle
  1638. DISEOCbm = $80;
  1639. // Trigger event enable
  1640. TRIGEIbm = $01;
  1641. // TCD_ACTION
  1642. ACTIONmask = $04;
  1643. ACTION_FAULT = $00;
  1644. ACTION_CAPTURE = $04;
  1645. // TCD_EDGE
  1646. EDGEmask = $10;
  1647. EDGE_FALL_LOW = $00;
  1648. EDGE_RISE_HIGH = $10;
  1649. // TCD_CFG
  1650. CFGmask = $C0;
  1651. CFG_NEITHER = $00;
  1652. CFG_FILTER = $40;
  1653. CFG_ASYNC = $80;
  1654. // Overflow interrupt enable
  1655. OVFbm = $01;
  1656. // Trigger A interrupt enable
  1657. TRIGAbm = $04;
  1658. // Trigger B interrupt enable
  1659. TRIGBbm = $08;
  1660. // Enable ready
  1661. ENRDYbm = $01;
  1662. // Command ready
  1663. CMDRDYbm = $02;
  1664. // PWM activity on A
  1665. PWMACTAbm = $40;
  1666. // PWM activity on B
  1667. PWMACTBbm = $80;
  1668. // TCD_INPUTMODE
  1669. INPUTMODEmask = $0F;
  1670. INPUTMODE_NONE = $00;
  1671. INPUTMODE_JMPWAIT = $01;
  1672. INPUTMODE_EXECWAIT = $02;
  1673. INPUTMODE_EXECFAULT = $03;
  1674. INPUTMODE_FREQ = $04;
  1675. INPUTMODE_EXECDT = $05;
  1676. INPUTMODE_WAIT = $06;
  1677. INPUTMODE_WAITSW = $07;
  1678. INPUTMODE_EDGETRIG = $08;
  1679. INPUTMODE_EDGETRIGFREQ = $09;
  1680. INPUTMODE_LVLTRIGFREQ = $0A;
  1681. // Compare A value
  1682. CMPAbm = $01;
  1683. // Compare B value
  1684. CMPBbm = $02;
  1685. // Compare C value
  1686. CMPCbm = $04;
  1687. // Compare D vaule
  1688. CMPDbm = $08;
  1689. // Compare A enable
  1690. CMPAENbm = $10;
  1691. // Compare B enable
  1692. CMPBENbm = $20;
  1693. // Compare C enable
  1694. CMPCENbm = $40;
  1695. // Compare D enable
  1696. CMPDENbm = $80;
  1697. // TCD_DLYSEL
  1698. DLYSELmask = $03;
  1699. DLYSEL_OFF = $00;
  1700. DLYSEL_INBLANK = $01;
  1701. DLYSEL_EVENT = $02;
  1702. // TCD_DLYTRIG
  1703. DLYTRIGmask = $0C;
  1704. DLYTRIG_CMPASET = $00;
  1705. DLYTRIG_CMPACLR = $04;
  1706. DLYTRIG_CMPBSET = $08;
  1707. DLYTRIG_CMPBCLR = $0C;
  1708. // TCD_DLYPRESC
  1709. DLYPRESCmask = $30;
  1710. DLYPRESC_DIV1 = $00;
  1711. DLYPRESC_DIV2 = $10;
  1712. DLYPRESC_DIV4 = $20;
  1713. DLYPRESC_DIV8 = $30;
  1714. // TCD_DITHERSEL
  1715. DITHERSELmask = $03;
  1716. DITHERSEL_ONTIMEB = $00;
  1717. DITHERSEL_ONTIMEAB = $01;
  1718. DITHERSEL_DEADTIMEB = $02;
  1719. DITHERSEL_DEADTIMEAB = $03;
  1720. // Dither value
  1721. DITHER0bm = $01;
  1722. DITHER1bm = $02;
  1723. DITHER2bm = $04;
  1724. DITHER3bm = $08;
  1725. // Debug run
  1726. DBGRUNbm = $01;
  1727. // Fault detection
  1728. FAULTDETbm = $04;
  1729. end;
  1730. TTWI = object //Two-Wire Interface
  1731. CTRLA: byte; //Control A
  1732. DUALCTRL: byte; //Dual Mode Control
  1733. DBGCTRL: byte; //Debug Control
  1734. MCTRLA: byte; //Host Control A
  1735. MCTRLB: byte; //Host Control B
  1736. MSTATUS: byte; //Host STATUS
  1737. MBAUD: byte; //Host Baud Rate
  1738. MADDR: byte; //Host Address
  1739. MDATA: byte; //Host Data
  1740. SCTRLA: byte; //Client Control A
  1741. SCTRLB: byte; //Client Control B
  1742. SSTATUS: byte; //Client Status
  1743. SADDR: byte; //Client Address
  1744. SDATA: byte; //Client Data
  1745. SADDRMASK: byte; //Client Address Mask
  1746. const
  1747. // TWI_FMPEN
  1748. FMPENmask = $02;
  1749. FMPEN_OFF = $00;
  1750. FMPEN_ON = $02;
  1751. // TWI_SDAHOLD
  1752. SDAHOLDmask = $0C;
  1753. SDAHOLD_OFF = $00;
  1754. SDAHOLD_50NS = $04;
  1755. SDAHOLD_300NS = $08;
  1756. SDAHOLD_500NS = $0C;
  1757. // TWI_SDASETUP
  1758. SDASETUPmask = $10;
  1759. SDASETUP_4CYC = $00;
  1760. SDASETUP_8CYC = $10;
  1761. // TWI_INPUTLVL
  1762. INPUTLVLmask = $40;
  1763. INPUTLVL_I2C = $00;
  1764. INPUTLVL_SMBUS = $40;
  1765. // Enable
  1766. ENABLEbm = $01;
  1767. // TWI_DBGRUN
  1768. DBGRUNmask = $01;
  1769. DBGRUN_HALT = $00;
  1770. DBGRUN_RUN = $01;
  1771. // Smart Mode Enable
  1772. SMENbm = $02;
  1773. // TWI_TIMEOUT
  1774. TIMEOUTmask = $0C;
  1775. TIMEOUT_DISABLED = $00;
  1776. TIMEOUT_50US = $04;
  1777. TIMEOUT_100US = $08;
  1778. TIMEOUT_200US = $0C;
  1779. // Quick Command Enable
  1780. QCENbm = $10;
  1781. // Write Interrupt Enable
  1782. WIENbm = $40;
  1783. // Read Interrupt Enable
  1784. RIENbm = $80;
  1785. // TWI_MCMD
  1786. MCMDmask = $03;
  1787. MCMD_NOACT = $00;
  1788. MCMD_REPSTART = $01;
  1789. MCMD_RECVTRANS = $02;
  1790. MCMD_STOP = $03;
  1791. // TWI_ACKACT
  1792. ACKACTmask = $04;
  1793. ACKACT_ACK = $00;
  1794. ACKACT_NACK = $04;
  1795. // Flush
  1796. FLUSHbm = $08;
  1797. // TWI_BUSSTATE
  1798. BUSSTATEmask = $03;
  1799. BUSSTATE_UNKNOWN = $00;
  1800. BUSSTATE_IDLE = $01;
  1801. BUSSTATE_OWNER = $02;
  1802. BUSSTATE_BUSY = $03;
  1803. // Bus Error
  1804. BUSERRbm = $04;
  1805. // Arbitration Lost
  1806. ARBLOSTbm = $08;
  1807. // Received Acknowledge
  1808. RXACKbm = $10;
  1809. // Clock Hold
  1810. CLKHOLDbm = $20;
  1811. // Write Interrupt Flag
  1812. WIFbm = $40;
  1813. // Read Interrupt Flag
  1814. RIFbm = $80;
  1815. // Address Recognition Mode
  1816. PMENbm = $04;
  1817. // Stop Interrupt Enable
  1818. PIENbm = $20;
  1819. // Address or Stop Interrupt Enable
  1820. APIENbm = $40;
  1821. // Data Interrupt Enable
  1822. DIENbm = $80;
  1823. // TWI_SCMD
  1824. SCMDmask = $03;
  1825. SCMD_NOACT = $00;
  1826. SCMD_COMPTRANS = $02;
  1827. SCMD_RESPONSE = $03;
  1828. // TWI_AP
  1829. APmask = $01;
  1830. AP_STOP = $00;
  1831. AP_ADR = $01;
  1832. // Read/Write Direction
  1833. DIRbm = $02;
  1834. // Collision
  1835. COLLbm = $08;
  1836. // Address or Stop Interrupt Flag
  1837. APIFbm = $40;
  1838. // Data Interrupt Flag
  1839. DIFbm = $80;
  1840. // Address Mask Enable
  1841. ADDRENbm = $01;
  1842. // Address Mask
  1843. ADDRMASK0bm = $02;
  1844. ADDRMASK1bm = $04;
  1845. ADDRMASK2bm = $08;
  1846. ADDRMASK3bm = $10;
  1847. ADDRMASK4bm = $20;
  1848. ADDRMASK5bm = $40;
  1849. ADDRMASK6bm = $80;
  1850. end;
  1851. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1852. RXDATAL: byte; //Receive Data Low Byte
  1853. RXDATAH: byte; //Receive Data High Byte
  1854. TXDATAL: byte; //Transmit Data Low Byte
  1855. TXDATAH: byte; //Transmit Data High Byte
  1856. STATUS: byte; //Status
  1857. CTRLA: byte; //Control A
  1858. CTRLB: byte; //Control B
  1859. CTRLC: byte; //Control C
  1860. BAUD: word; //Baud Rate
  1861. CTRLD: byte; //Control D
  1862. DBGCTRL: byte; //Debug Control
  1863. EVCTRL: byte; //Event Control
  1864. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1865. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1866. const
  1867. // Receiver Data Register
  1868. DATA8bm = $01;
  1869. // Parity Error
  1870. PERRbm = $02;
  1871. // Frame Error
  1872. FERRbm = $04;
  1873. // Buffer Overflow
  1874. BUFOVFbm = $40;
  1875. // Receive Complete Interrupt Flag
  1876. RXCIFbm = $80;
  1877. // Wait For Break
  1878. WFBbm = $01;
  1879. // Break Detected Flag
  1880. BDFbm = $02;
  1881. // Inconsistent Sync Field Interrupt Flag
  1882. ISFIFbm = $08;
  1883. // Receive Start Interrupt
  1884. RXSIFbm = $10;
  1885. // Data Register Empty Flag
  1886. DREIFbm = $20;
  1887. // Transmit Interrupt Flag
  1888. TXCIFbm = $40;
  1889. // USART_RS485
  1890. RS485mask = $01;
  1891. RS485_DISABLE = $00;
  1892. RS485_ENABLE = $01;
  1893. // Auto-baud Error Interrupt Enable
  1894. ABEIEbm = $04;
  1895. // Loop-back Mode Enable
  1896. LBMEbm = $08;
  1897. // Receiver Start Frame Interrupt Enable
  1898. RXSIEbm = $10;
  1899. // Data Register Empty Interrupt Enable
  1900. DREIEbm = $20;
  1901. // Transmit Complete Interrupt Enable
  1902. TXCIEbm = $40;
  1903. // Receive Complete Interrupt Enable
  1904. RXCIEbm = $80;
  1905. // Multi-processor Communication Mode
  1906. MPCMbm = $01;
  1907. // USART_RXMODE
  1908. RXMODEmask = $06;
  1909. RXMODE_NORMAL = $00;
  1910. RXMODE_CLK2X = $02;
  1911. RXMODE_GENAUTO = $04;
  1912. RXMODE_LINAUTO = $06;
  1913. // Open Drain Mode Enable
  1914. ODMEbm = $08;
  1915. // Start Frame Detection Enable
  1916. SFDENbm = $10;
  1917. // Transmitter Enable
  1918. TXENbm = $40;
  1919. // Reciever enable
  1920. RXENbm = $80;
  1921. // USART_ABW
  1922. ABWmask = $C0;
  1923. ABW_WDW0 = $00;
  1924. ABW_WDW1 = $40;
  1925. ABW_WDW2 = $80;
  1926. ABW_WDW3 = $C0;
  1927. // Debug Run
  1928. DBGRUNbm = $01;
  1929. // IrDA Event Input Enable
  1930. IREIbm = $01;
  1931. // Receiver Pulse Lenght
  1932. RXPL0bm = $01;
  1933. RXPL1bm = $02;
  1934. RXPL2bm = $04;
  1935. RXPL3bm = $08;
  1936. RXPL4bm = $10;
  1937. RXPL5bm = $20;
  1938. RXPL6bm = $40;
  1939. end;
  1940. TUSERROW = object //User Row
  1941. USERROW0: byte; //User Row Byte 0
  1942. USERROW1: byte; //User Row Byte 1
  1943. USERROW2: byte; //User Row Byte 2
  1944. USERROW3: byte; //User Row Byte 3
  1945. USERROW4: byte; //User Row Byte 4
  1946. USERROW5: byte; //User Row Byte 5
  1947. USERROW6: byte; //User Row Byte 6
  1948. USERROW7: byte; //User Row Byte 7
  1949. USERROW8: byte; //User Row Byte 8
  1950. USERROW9: byte; //User Row Byte 9
  1951. USERROW10: byte; //User Row Byte 10
  1952. USERROW11: byte; //User Row Byte 11
  1953. USERROW12: byte; //User Row Byte 12
  1954. USERROW13: byte; //User Row Byte 13
  1955. USERROW14: byte; //User Row Byte 14
  1956. USERROW15: byte; //User Row Byte 15
  1957. USERROW16: byte; //User Row Byte 16
  1958. USERROW17: byte; //User Row Byte 17
  1959. USERROW18: byte; //User Row Byte 18
  1960. USERROW19: byte; //User Row Byte 19
  1961. USERROW20: byte; //User Row Byte 20
  1962. USERROW21: byte; //User Row Byte 21
  1963. USERROW22: byte; //User Row Byte 22
  1964. USERROW23: byte; //User Row Byte 23
  1965. USERROW24: byte; //User Row Byte 24
  1966. USERROW25: byte; //User Row Byte 25
  1967. USERROW26: byte; //User Row Byte 26
  1968. USERROW27: byte; //User Row Byte 27
  1969. USERROW28: byte; //User Row Byte 28
  1970. USERROW29: byte; //User Row Byte 29
  1971. USERROW30: byte; //User Row Byte 30
  1972. USERROW31: byte; //User Row Byte 31
  1973. end;
  1974. TVPORT = object //Virtual Ports
  1975. DIR: byte; //Data Direction
  1976. OUT_: byte; //Output Value
  1977. IN_: byte; //Input Value
  1978. INTFLAGS: byte; //Interrupt Flags
  1979. end;
  1980. TVREF = object //Voltage reference
  1981. ADC0REF: byte; //ADC0 Reference
  1982. Reserved1: byte;
  1983. DAC0REF: byte; //DAC0 Reference
  1984. Reserved3: byte;
  1985. ACREF: byte; //AC Reference
  1986. const
  1987. // VREF_REFSEL
  1988. REFSELmask = $07;
  1989. REFSEL_1V024 = $00;
  1990. REFSEL_2V048 = $01;
  1991. REFSEL_4V096 = $02;
  1992. REFSEL_2V500 = $03;
  1993. REFSEL_VDD = $05;
  1994. REFSEL_VREFA = $06;
  1995. // Always on
  1996. ALWAYSONbm = $80;
  1997. end;
  1998. TWDT = object //Watch-Dog Timer
  1999. CTRLA: byte; //Control A
  2000. STATUS: byte; //Status
  2001. const
  2002. // WDT_PERIOD
  2003. PERIODmask = $0F;
  2004. PERIOD_OFF = $00;
  2005. PERIOD_8CLK = $01;
  2006. PERIOD_16CLK = $02;
  2007. PERIOD_32CLK = $03;
  2008. PERIOD_64CLK = $04;
  2009. PERIOD_128CLK = $05;
  2010. PERIOD_256CLK = $06;
  2011. PERIOD_512CLK = $07;
  2012. PERIOD_1KCLK = $08;
  2013. PERIOD_2KCLK = $09;
  2014. PERIOD_4KCLK = $0A;
  2015. PERIOD_8KCLK = $0B;
  2016. // WDT_WINDOW
  2017. WINDOWmask = $F0;
  2018. WINDOW_OFF = $00;
  2019. WINDOW_8CLK = $10;
  2020. WINDOW_16CLK = $20;
  2021. WINDOW_32CLK = $30;
  2022. WINDOW_64CLK = $40;
  2023. WINDOW_128CLK = $50;
  2024. WINDOW_256CLK = $60;
  2025. WINDOW_512CLK = $70;
  2026. WINDOW_1KCLK = $80;
  2027. WINDOW_2KCLK = $90;
  2028. WINDOW_4KCLK = $A0;
  2029. WINDOW_8KCLK = $B0;
  2030. // Syncronization busy
  2031. SYNCBUSYbm = $01;
  2032. // Lock enable
  2033. LOCKbm = $80;
  2034. end;
  2035. TZCD = object //Zero Cross Detect
  2036. CTRLA: byte; //Control A
  2037. Reserved1: byte;
  2038. INTCTRL: byte; //Interrupt Control
  2039. STATUS: byte; //Status
  2040. const
  2041. // Enable
  2042. ENABLEbm = $01;
  2043. // Invert signal from pin
  2044. INVERTbm = $08;
  2045. // Output Pad Enable
  2046. OUTENbm = $40;
  2047. // Run in Standby Mode
  2048. RUNSTDBYbm = $80;
  2049. // ZCD_INTMODE
  2050. INTMODEmask = $03;
  2051. INTMODE_NONE = $00;
  2052. INTMODE_RISING = $01;
  2053. INTMODE_FALLING = $02;
  2054. INTMODE_BOTH = $03;
  2055. // ZCD Interrupt Flag
  2056. CROSSIFbm = $01;
  2057. // ZCD_STATE
  2058. STATEmask = $10;
  2059. STATE_LOW = $00;
  2060. STATE_HIGH = $10;
  2061. end;
  2062. const
  2063. Pin0idx = 0; Pin0bm = 1;
  2064. Pin1idx = 1; Pin1bm = 2;
  2065. Pin2idx = 2; Pin2bm = 4;
  2066. Pin3idx = 3; Pin3bm = 8;
  2067. Pin4idx = 4; Pin4bm = 16;
  2068. Pin5idx = 5; Pin5bm = 32;
  2069. Pin6idx = 6; Pin6bm = 64;
  2070. Pin7idx = 7; Pin7bm = 128;
  2071. var
  2072. VPORTA: TVPORT absolute $0000;
  2073. VPORTC: TVPORT absolute $0008;
  2074. VPORTD: TVPORT absolute $000C;
  2075. VPORTF: TVPORT absolute $0014;
  2076. GPR: TGPR absolute $001C;
  2077. CPU: TCPU absolute $0030;
  2078. RSTCTRL: TRSTCTRL absolute $0040;
  2079. SLPCTRL: TSLPCTRL absolute $0050;
  2080. CLKCTRL: TCLKCTRL absolute $0060;
  2081. BOD: TBOD absolute $00A0;
  2082. VREF: TVREF absolute $00B0;
  2083. MVIO: TMVIO absolute $00C0;
  2084. WDT: TWDT absolute $0100;
  2085. CPUINT: TCPUINT absolute $0110;
  2086. CRCSCAN: TCRCSCAN absolute $0120;
  2087. RTC: TRTC absolute $0140;
  2088. CCL: TCCL absolute $01C0;
  2089. EVSYS: TEVSYS absolute $0200;
  2090. PORTA: TPORT absolute $0400;
  2091. PORTC: TPORT absolute $0440;
  2092. PORTD: TPORT absolute $0460;
  2093. PORTF: TPORT absolute $04A0;
  2094. PORTMUX: TPORTMUX absolute $05E0;
  2095. ADC0: TADC absolute $0600;
  2096. AC0: TAC absolute $0680;
  2097. DAC0: TDAC absolute $06A0;
  2098. ZCD3: TZCD absolute $06D8;
  2099. USART0: TUSART absolute $0800;
  2100. USART1: TUSART absolute $0820;
  2101. TWI0: TTWI absolute $0900;
  2102. SPI0: TSPI absolute $0940;
  2103. TCA0: TTCA absolute $0A00;
  2104. TCB0: TTCB absolute $0B00;
  2105. TCB1: TTCB absolute $0B10;
  2106. TCD0: TTCD absolute $0B80;
  2107. SYSCFG: TSYSCFG absolute $0F00;
  2108. NVMCTRL: TNVMCTRL absolute $1000;
  2109. LOCK: TLOCK absolute $1040;
  2110. FUSE: TFUSE absolute $1050;
  2111. USERROW: TUSERROW absolute $1080;
  2112. SIGROW: TSIGROW absolute $1100;
  2113. implementation
  2114. {$i avrcommon.inc}
  2115. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  2116. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  2117. procedure CLKCTRL_CFD_ISR; external name 'CLKCTRL_CFD_ISR'; // Interrupt 3
  2118. procedure MVIO_MVIO_ISR; external name 'MVIO_MVIO_ISR'; // Interrupt 4
  2119. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 5
  2120. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 6
  2121. procedure CCL_CCL_ISR; external name 'CCL_CCL_ISR'; // Interrupt 7
  2122. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 8
  2123. procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 9
  2124. //procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 9
  2125. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 10
  2126. procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 11
  2127. //procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 11
  2128. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 12
  2129. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 12
  2130. procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 13
  2131. //procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 13
  2132. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 14
  2133. procedure TCB1_INT_ISR; external name 'TCB1_INT_ISR'; // Interrupt 15
  2134. procedure TCD0_OVF_ISR; external name 'TCD0_OVF_ISR'; // Interrupt 16
  2135. procedure TCD0_TRIG_ISR; external name 'TCD0_TRIG_ISR'; // Interrupt 17
  2136. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 18
  2137. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 19
  2138. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 20
  2139. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 21
  2140. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 22
  2141. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 23
  2142. procedure PORTD_PORT_ISR; external name 'PORTD_PORT_ISR'; // Interrupt 24
  2143. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 25
  2144. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 26
  2145. procedure ADC0_WCMP_ISR; external name 'ADC0_WCMP_ISR'; // Interrupt 27
  2146. procedure ZCD3_ZCD_ISR; external name 'ZCD3_ZCD_ISR'; // Interrupt 28
  2147. procedure PORTC_PORT_ISR; external name 'PORTC_PORT_ISR'; // Interrupt 29
  2148. procedure USART1_RXC_ISR; external name 'USART1_RXC_ISR'; // Interrupt 31
  2149. procedure USART1_DRE_ISR; external name 'USART1_DRE_ISR'; // Interrupt 32
  2150. procedure USART1_TXC_ISR; external name 'USART1_TXC_ISR'; // Interrupt 33
  2151. procedure PORTF_PORT_ISR; external name 'PORTF_PORT_ISR'; // Interrupt 34
  2152. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 35
  2153. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  2154. asm
  2155. jmp __dtors_end
  2156. jmp CRCSCAN_NMI_ISR
  2157. jmp BOD_VLM_ISR
  2158. jmp CLKCTRL_CFD_ISR
  2159. jmp MVIO_MVIO_ISR
  2160. jmp RTC_CNT_ISR
  2161. jmp RTC_PIT_ISR
  2162. jmp CCL_CCL_ISR
  2163. jmp PORTA_PORT_ISR
  2164. jmp TCA0_LUNF_ISR
  2165. // jmp TCA0_OVF_ISR
  2166. jmp TCA0_HUNF_ISR
  2167. jmp TCA0_CMP0_ISR
  2168. // jmp TCA0_LCMP0_ISR
  2169. jmp TCA0_CMP1_ISR
  2170. // jmp TCA0_LCMP1_ISR
  2171. jmp TCA0_CMP2_ISR
  2172. // jmp TCA0_LCMP2_ISR
  2173. jmp TCB0_INT_ISR
  2174. jmp TCB1_INT_ISR
  2175. jmp TCD0_OVF_ISR
  2176. jmp TCD0_TRIG_ISR
  2177. jmp TWI0_TWIS_ISR
  2178. jmp TWI0_TWIM_ISR
  2179. jmp SPI0_INT_ISR
  2180. jmp USART0_RXC_ISR
  2181. jmp USART0_DRE_ISR
  2182. jmp USART0_TXC_ISR
  2183. jmp PORTD_PORT_ISR
  2184. jmp AC0_AC_ISR
  2185. jmp ADC0_RESRDY_ISR
  2186. jmp ADC0_WCMP_ISR
  2187. jmp ZCD3_ZCD_ISR
  2188. jmp PORTC_PORT_ISR
  2189. jmp USART1_RXC_ISR
  2190. jmp USART1_DRE_ISR
  2191. jmp USART1_TXC_ISR
  2192. jmp PORTF_PORT_ISR
  2193. jmp NVMCTRL_EE_ISR
  2194. .weak CRCSCAN_NMI_ISR
  2195. .weak BOD_VLM_ISR
  2196. .weak CLKCTRL_CFD_ISR
  2197. .weak MVIO_MVIO_ISR
  2198. .weak RTC_CNT_ISR
  2199. .weak RTC_PIT_ISR
  2200. .weak CCL_CCL_ISR
  2201. .weak PORTA_PORT_ISR
  2202. .weak TCA0_LUNF_ISR
  2203. // .weak TCA0_OVF_ISR
  2204. .weak TCA0_HUNF_ISR
  2205. .weak TCA0_CMP0_ISR
  2206. // .weak TCA0_LCMP0_ISR
  2207. .weak TCA0_CMP1_ISR
  2208. // .weak TCA0_LCMP1_ISR
  2209. .weak TCA0_CMP2_ISR
  2210. // .weak TCA0_LCMP2_ISR
  2211. .weak TCB0_INT_ISR
  2212. .weak TCB1_INT_ISR
  2213. .weak TCD0_OVF_ISR
  2214. .weak TCD0_TRIG_ISR
  2215. .weak TWI0_TWIS_ISR
  2216. .weak TWI0_TWIM_ISR
  2217. .weak SPI0_INT_ISR
  2218. .weak USART0_RXC_ISR
  2219. .weak USART0_DRE_ISR
  2220. .weak USART0_TXC_ISR
  2221. .weak PORTD_PORT_ISR
  2222. .weak AC0_AC_ISR
  2223. .weak ADC0_RESRDY_ISR
  2224. .weak ADC0_WCMP_ISR
  2225. .weak ZCD3_ZCD_ISR
  2226. .weak PORTC_PORT_ISR
  2227. .weak USART1_RXC_ISR
  2228. .weak USART1_DRE_ISR
  2229. .weak USART1_TXC_ISR
  2230. .weak PORTF_PORT_ISR
  2231. .weak NVMCTRL_EE_ISR
  2232. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  2233. .set BOD_VLM_ISR, Default_IRQ_handler
  2234. .set CLKCTRL_CFD_ISR, Default_IRQ_handler
  2235. .set MVIO_MVIO_ISR, Default_IRQ_handler
  2236. .set RTC_CNT_ISR, Default_IRQ_handler
  2237. .set RTC_PIT_ISR, Default_IRQ_handler
  2238. .set CCL_CCL_ISR, Default_IRQ_handler
  2239. .set PORTA_PORT_ISR, Default_IRQ_handler
  2240. .set TCA0_LUNF_ISR, Default_IRQ_handler
  2241. // .set TCA0_OVF_ISR, Default_IRQ_handler
  2242. .set TCA0_HUNF_ISR, Default_IRQ_handler
  2243. .set TCA0_CMP0_ISR, Default_IRQ_handler
  2244. // .set TCA0_LCMP0_ISR, Default_IRQ_handler
  2245. .set TCA0_CMP1_ISR, Default_IRQ_handler
  2246. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  2247. .set TCA0_CMP2_ISR, Default_IRQ_handler
  2248. // .set TCA0_LCMP2_ISR, Default_IRQ_handler
  2249. .set TCB0_INT_ISR, Default_IRQ_handler
  2250. .set TCB1_INT_ISR, Default_IRQ_handler
  2251. .set TCD0_OVF_ISR, Default_IRQ_handler
  2252. .set TCD0_TRIG_ISR, Default_IRQ_handler
  2253. .set TWI0_TWIS_ISR, Default_IRQ_handler
  2254. .set TWI0_TWIM_ISR, Default_IRQ_handler
  2255. .set SPI0_INT_ISR, Default_IRQ_handler
  2256. .set USART0_RXC_ISR, Default_IRQ_handler
  2257. .set USART0_DRE_ISR, Default_IRQ_handler
  2258. .set USART0_TXC_ISR, Default_IRQ_handler
  2259. .set PORTD_PORT_ISR, Default_IRQ_handler
  2260. .set AC0_AC_ISR, Default_IRQ_handler
  2261. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  2262. .set ADC0_WCMP_ISR, Default_IRQ_handler
  2263. .set ZCD3_ZCD_ISR, Default_IRQ_handler
  2264. .set PORTC_PORT_ISR, Default_IRQ_handler
  2265. .set USART1_RXC_ISR, Default_IRQ_handler
  2266. .set USART1_DRE_ISR, Default_IRQ_handler
  2267. .set USART1_TXC_ISR, Default_IRQ_handler
  2268. .set PORTF_PORT_ISR, Default_IRQ_handler
  2269. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  2270. end;
  2271. end.