avr32eb14.pp 66 KB

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  1. unit AVR32EB14;
  2. interface
  3. type
  4. TAC = object //Analog Comparator
  5. CTRLA: byte; //Control A
  6. CTRLB: byte; //Control B
  7. MUXCTRL: byte; //Mux Control A
  8. Reserved3: byte;
  9. Reserved4: byte;
  10. DACREF: byte; //DAC Voltage Reference
  11. INTCTRL: byte; //Interrupt Control
  12. STATUS: byte; //Status
  13. const
  14. // Enable
  15. ENABLEbm = $01;
  16. // AC_HYSMODE
  17. HYSMODEmask = $06;
  18. HYSMODE_NONE = $00;
  19. HYSMODE_SMALL = $02;
  20. HYSMODE_MEDIUM = $04;
  21. HYSMODE_LARGE = $06;
  22. // AC_POWER
  23. POWERmask = $18;
  24. POWER_PROFILE0 = $00;
  25. POWER_PROFILE1 = $08;
  26. // Output Pad Enable
  27. OUTENbm = $40;
  28. // Run in Standby Mode
  29. RUNSTDBYbm = $80;
  30. // AC_WINSEL
  31. WINSELmask = $03;
  32. WINSEL_DISABLED = $00;
  33. WINSEL_UPSEL1 = $01;
  34. // AC_MUXNEG
  35. MUXNEGmask = $07;
  36. MUXNEG_AINN0 = $00;
  37. MUXNEG_AINN1 = $01;
  38. MUXNEG_AINN2 = $02;
  39. MUXNEG_AINN3 = $03;
  40. MUXNEG_DACREF = $04;
  41. // AC_MUXPOS
  42. MUXPOSmask = $38;
  43. MUXPOS_AINP0 = $00;
  44. MUXPOS_AINP1 = $08;
  45. MUXPOS_AINP2 = $10;
  46. MUXPOS_AINP3 = $18;
  47. MUXPOS_AINP4 = $20;
  48. MUXPOS_AINP5 = $28;
  49. MUXPOS_AINP6 = $30;
  50. // AC_INITVAL
  51. INITVALmask = $40;
  52. INITVAL_LOW = $00;
  53. INITVAL_HIGH = $40;
  54. // Invert AC Output
  55. INVERTbm = $80;
  56. // Analog Comparator Interrupt Flag
  57. CMPIFbm = $01;
  58. // Analog Comparator State
  59. CMPSTATEbm = $10;
  60. // AC_WINSTATE
  61. WINSTATEmask = $C0;
  62. WINSTATE_ABOVE = $00;
  63. WINSTATE_INSIDE = $40;
  64. WINSTATE_BELOW = $80;
  65. end;
  66. TADC = object //Analog to Digital Converter
  67. CTRLA: byte; //Control A
  68. CTRLB: byte; //Control B
  69. CTRLC: byte; //Control C
  70. CTRLD: byte; //Control D
  71. INTCTRL: byte; //Interrupt Control
  72. INTFLAGS: byte; //Interrupt Flags
  73. STATUS: byte; //Status register
  74. DBGCTRL: byte; //Debug Control
  75. CTRLE: byte; //Control E
  76. CTRLF: byte; //Control F
  77. COMMAND: byte; //Command register
  78. PGACTRL: byte; //PGA Control
  79. MUXPOS: byte; //Positive Input Multiplexer
  80. MUXNEG: byte; //Negative Input Multiplexer
  81. Reserved14: byte;
  82. Reserved15: byte;
  83. RESULT: dword; //Result
  84. SAMPLE: word; //Sample
  85. Reserved22: byte;
  86. Reserved23: byte;
  87. TEMP0: byte; //Temporary Data 0
  88. TEMP1: byte; //Temporary Data 1
  89. TEMP2: byte; //Temporary Data 2
  90. Reserved27: byte;
  91. WINLT: word; //Window Low Threshold
  92. WINHT: word; //Window High Threshold
  93. const
  94. // ADC Enable
  95. ENABLEbm = $01;
  96. // Low Latency
  97. LOWLATbm = $20;
  98. // Run in Standby
  99. RUNSTDBYbm = $80;
  100. // ADC_PRESC
  101. PRESCmask = $0F;
  102. PRESC_DIV2 = $00;
  103. PRESC_DIV4 = $01;
  104. PRESC_DIV6 = $02;
  105. PRESC_DIV8 = $03;
  106. PRESC_DIV10 = $04;
  107. PRESC_DIV12 = $05;
  108. PRESC_DIV14 = $06;
  109. PRESC_DIV16 = $07;
  110. PRESC_DIV20 = $08;
  111. PRESC_DIV24 = $09;
  112. PRESC_DIV28 = $0A;
  113. PRESC_DIV32 = $0B;
  114. PRESC_DIV40 = $0C;
  115. PRESC_DIV48 = $0D;
  116. PRESC_DIV56 = $0E;
  117. PRESC_DIV64 = $0F;
  118. // ADC_REFSEL
  119. REFSELmask = $07;
  120. REFSEL_VDD = $00;
  121. REFSEL_VREFA = $02;
  122. REFSEL_1V024 = $04;
  123. REFSEL_2V048 = $05;
  124. REFSEL_4V096 = $06;
  125. REFSEL_2V500 = $07;
  126. // ADC_WINCM
  127. WINCMmask = $07;
  128. WINCM_NONE = $00;
  129. WINCM_BELOW = $01;
  130. WINCM_ABOVE = $02;
  131. WINCM_INSIDE = $03;
  132. WINCM_OUTSIDE = $04;
  133. // ADC_WINSRC
  134. WINSRCmask = $08;
  135. WINSRC_RESULT = $00;
  136. WINSRC_SAMPLE = $08;
  137. // Result Ready Interrupt Enable
  138. RESRDYbm = $01;
  139. // Sample Ready Interrupt Enable
  140. SAMPRDYbm = $02;
  141. // Window Comparator Interrupt Enable
  142. WCMPbm = $04;
  143. // Result Overwrite Interrupt Enable
  144. RESOVRbm = $08;
  145. // Sample Overwrite Interrupt Enable
  146. SAMPOVRbm = $10;
  147. // Trigger Overrun Interrupt Enable
  148. TRIGOVRbm = $20;
  149. // ADC Busy
  150. ADCBUSYbm = $01;
  151. // Run in Debug Mode
  152. DBGRUNbm = $01;
  153. // ADC_SAMPNUM
  154. SAMPNUMmask = $0F;
  155. SAMPNUM_NONE = $00;
  156. SAMPNUM_ACC2 = $01;
  157. SAMPNUM_ACC4 = $02;
  158. SAMPNUM_ACC8 = $03;
  159. SAMPNUM_ACC16 = $04;
  160. SAMPNUM_ACC32 = $05;
  161. SAMPNUM_ACC64 = $06;
  162. SAMPNUM_ACC128 = $07;
  163. SAMPNUM_ACC256 = $08;
  164. SAMPNUM_ACC512 = $09;
  165. SAMPNUM_ACC1024 = $0A;
  166. // Left Adjust
  167. LEFTADJbm = $10;
  168. // Free-Running mode
  169. FREERUNbm = $20;
  170. // ADC_CHOPPING
  171. CHOPPINGmask = $40;
  172. CHOPPING_DISABLE = $00;
  173. CHOPPING_ENABLE = $40;
  174. // ADC_START
  175. STARTmask = $07;
  176. START_STOP = $00;
  177. START_IMMEDIATE = $01;
  178. START_MUXPOS_WRITE = $02;
  179. START_MUXNEG_WRITE = $03;
  180. START_EVENT_TRIGGER = $04;
  181. // ADC_MODE
  182. MODEmask = $70;
  183. MODE_SINGLE_8BIT = $00;
  184. MODE_SINGLE_12BIT = $10;
  185. MODE_SERIES = $20;
  186. MODE_SERIES_SCALING = $30;
  187. MODE_BURST = $40;
  188. MODE_BURST_SCALING = $50;
  189. // Differential mode
  190. DIFFbm = $80;
  191. // PGA Enable
  192. PGAENbm = $01;
  193. // ADC_PGABIASSEL
  194. PGABIASSELmask = $18;
  195. PGABIASSEL_100PCT = $00;
  196. PGABIASSEL_75PCT = $08;
  197. PGABIASSEL_50PCT = $10;
  198. PGABIASSEL_25PCT = $18;
  199. // ADC_GAIN
  200. GAINmask = $E0;
  201. GAIN_1X = $00;
  202. GAIN_2X = $20;
  203. GAIN_4X = $40;
  204. GAIN_8X = $60;
  205. GAIN_16X = $80;
  206. // ADC_MUXPOS
  207. MUXPOSmask = $3F;
  208. MUXPOS_AIN4 = $04;
  209. MUXPOS_AIN5 = $05;
  210. MUXPOS_AIN6 = $06;
  211. MUXPOS_AIN7 = $07;
  212. MUXPOS_AIN28 = $1C;
  213. MUXPOS_AIN29 = $1D;
  214. MUXPOS_AIN30 = $1E;
  215. MUXPOS_AIN31 = $1F;
  216. MUXPOS_GND = $30;
  217. MUXPOS_VDD10 = $31;
  218. MUXPOS_TEMPSENSE = $32;
  219. // ADC_VIA
  220. VIAmask = $C0;
  221. VIA_DIRECT = $00;
  222. VIA_PGA = $40;
  223. // ADC_MUXNEG
  224. MUXNEGmask = $3F;
  225. MUXNEG_AIN4 = $04;
  226. MUXNEG_AIN5 = $05;
  227. MUXNEG_AIN6 = $06;
  228. MUXNEG_AIN7 = $07;
  229. MUXNEG_AIN28 = $1C;
  230. MUXNEG_AIN29 = $1D;
  231. MUXNEG_AIN30 = $1E;
  232. MUXNEG_AIN31 = $1F;
  233. MUXNEG_GND = $30;
  234. MUXNEG_DAC0 = $38;
  235. MUXNEG_DACREF0 = $39;
  236. MUXNEG_DACREF1 = $3A;
  237. end;
  238. TBOD = object //Bod interface
  239. CTRLA: byte; //Control A
  240. CTRLB: byte; //Control B
  241. Reserved2: byte;
  242. Reserved3: byte;
  243. Reserved4: byte;
  244. Reserved5: byte;
  245. Reserved6: byte;
  246. Reserved7: byte;
  247. VLMCTRLA: byte; //Voltage level monitor Control
  248. INTCTRL: byte; //Voltage level monitor interrupt Control
  249. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  250. STATUS: byte; //Voltage level monitor status
  251. const
  252. // BOD_SLEEP
  253. SLEEPmask = $03;
  254. SLEEP_DISABLE = $00;
  255. SLEEP_ENABLE = $01;
  256. SLEEP_SAMPLE = $02;
  257. // BOD_ACTIVE
  258. ACTIVEmask = $0C;
  259. ACTIVE_DISABLE = $00;
  260. ACTIVE_ENABLED = $04;
  261. ACTIVE_SAMPLED = $08;
  262. ACTIVE_ENABLEWAIT = $0C;
  263. // BOD_SAMPFREQ
  264. SAMPFREQmask = $10;
  265. SAMPFREQ_128HZ = $00;
  266. SAMPFREQ_32HZ = $10;
  267. // BOD_LVL
  268. LVLmask = $07;
  269. LVL_BODLEVEL0 = $00;
  270. LVL_BODLEVEL1 = $01;
  271. LVL_BODLEVEL2 = $02;
  272. LVL_BODLEVEL3 = $03;
  273. // BOD_VLMLVL
  274. VLMLVLmask = $03;
  275. VLMLVL_OFF = $00;
  276. VLMLVL_5ABOVE = $01;
  277. VLMLVL_15ABOVE = $02;
  278. VLMLVL_25ABOVE = $03;
  279. // voltage level monitor interrrupt enable
  280. VLMIEbm = $01;
  281. // BOD_VLMCFG
  282. VLMCFGmask = $06;
  283. VLMCFG_FALLING = $00;
  284. VLMCFG_RISING = $02;
  285. VLMCFG_BOTH = $04;
  286. // Voltage level monitor interrupt flag
  287. VLMIFbm = $01;
  288. // BOD_VLMS
  289. VLMSmask = $01;
  290. VLMS_ABOVE = $00;
  291. VLMS_BELOW = $01;
  292. end;
  293. TBOOTROW = object //Boot Row
  294. BOOTROW: byte; //Boot Row
  295. end;
  296. TCCL = object //Configurable Custom Logic
  297. CTRLA: byte; //Control Register A
  298. SEQCTRL0: byte; //Sequential Control 0
  299. SEQCTRL1: byte; //Sequential Control 1
  300. Reserved3: byte;
  301. Reserved4: byte;
  302. INTCTRL0: byte; //Interrupt Control 0
  303. Reserved6: byte;
  304. INTFLAGS: byte; //Interrupt Flags
  305. LUT0CTRLA: byte; //LUT 0 Control A
  306. LUT0CTRLB: byte; //LUT 0 Control B
  307. LUT0CTRLC: byte; //LUT 0 Control C
  308. TRUTH0: byte; //Truth 0
  309. LUT1CTRLA: byte; //LUT 1 Control A
  310. LUT1CTRLB: byte; //LUT 1 Control B
  311. LUT1CTRLC: byte; //LUT 1 Control C
  312. TRUTH1: byte; //Truth 1
  313. LUT2CTRLA: byte; //LUT 2 Control A
  314. LUT2CTRLB: byte; //LUT 2 Control B
  315. LUT2CTRLC: byte; //LUT 2 Control C
  316. TRUTH2: byte; //Truth 2
  317. LUT3CTRLA: byte; //LUT 3 Control A
  318. LUT3CTRLB: byte; //LUT 3 Control B
  319. LUT3CTRLC: byte; //LUT 3 Control C
  320. TRUTH3: byte; //Truth 3
  321. const
  322. // Enable
  323. ENABLEbm = $01;
  324. // Run in Standby
  325. RUNSTDBYbm = $40;
  326. // CCL_SEQSEL
  327. SEQSELmask = $0F;
  328. SEQSEL_DISABLE = $00;
  329. SEQSEL_DFF = $01;
  330. SEQSEL_JK = $02;
  331. SEQSEL_LATCH = $03;
  332. SEQSEL_RS = $04;
  333. // CCL_INTMODE0
  334. INTMODE0mask = $03;
  335. INTMODE0_INTDISABLE = $00;
  336. INTMODE0_RISING = $01;
  337. INTMODE0_FALLING = $02;
  338. INTMODE0_BOTH = $03;
  339. // CCL_INTMODE1
  340. INTMODE1mask = $0C;
  341. INTMODE1_INTDISABLE = $00;
  342. INTMODE1_RISING = $04;
  343. INTMODE1_FALLING = $08;
  344. INTMODE1_BOTH = $0C;
  345. // CCL_INTMODE2
  346. INTMODE2mask = $30;
  347. INTMODE2_INTDISABLE = $00;
  348. INTMODE2_RISING = $10;
  349. INTMODE2_FALLING = $20;
  350. INTMODE2_BOTH = $30;
  351. // CCL_INTMODE3
  352. INTMODE3mask = $C0;
  353. INTMODE3_INTDISABLE = $00;
  354. INTMODE3_RISING = $40;
  355. INTMODE3_FALLING = $80;
  356. INTMODE3_BOTH = $C0;
  357. // Interrupt Flag
  358. INT0bm = $01;
  359. INT1bm = $02;
  360. INT2bm = $04;
  361. INT3bm = $08;
  362. // CCL_CLKSRC
  363. CLKSRCmask = $0E;
  364. CLKSRC_CLKPER = $00;
  365. CLKSRC_IN2 = $02;
  366. CLKSRC_OSCHF = $08;
  367. CLKSRC_OSC32K = $0A;
  368. CLKSRC_OSC1K = $0C;
  369. CLKSRC_PLL = $0E;
  370. // CCL_FILTSEL
  371. FILTSELmask = $30;
  372. FILTSEL_DISABLE = $00;
  373. FILTSEL_SYNCH = $10;
  374. FILTSEL_FILTER = $20;
  375. // Output Enable
  376. OUTENbm = $40;
  377. // CCL_EDGEDET
  378. EDGEDETmask = $80;
  379. EDGEDET_DIS = $00;
  380. EDGEDET_EN = $80;
  381. // CCL_INSEL0
  382. INSEL0mask = $0F;
  383. INSEL0_MASK = $00;
  384. INSEL0_FEEDBACK = $01;
  385. INSEL0_LINK = $02;
  386. INSEL0_EVENTA = $03;
  387. INSEL0_EVENTB = $04;
  388. INSEL0_IN0 = $05;
  389. INSEL0_AC0 = $06;
  390. INSEL0_USART0 = $07;
  391. INSEL0_SPI0 = $08;
  392. INSEL0_TCE0 = $09;
  393. INSEL0_TCB0 = $0A;
  394. INSEL0_TCF0 = $0B;
  395. INSEL0_WEX0 = $0C;
  396. // CCL_INSEL1
  397. INSEL1mask = $F0;
  398. INSEL1_MASK = $00;
  399. INSEL1_FEEDBACK = $10;
  400. INSEL1_LINK = $20;
  401. INSEL1_EVENTA = $30;
  402. INSEL1_EVENTB = $40;
  403. INSEL1_IN1 = $50;
  404. INSEL1_AC1 = $60;
  405. INSEL1_USART0 = $70;
  406. INSEL1_SPI0 = $80;
  407. INSEL1_TCE0 = $90;
  408. INSEL1_TCB1 = $A0;
  409. INSEL1_TCF0 = $B0;
  410. INSEL1_WEX0 = $C0;
  411. // CCL_INSEL2
  412. INSEL2mask = $0F;
  413. INSEL2_MASK = $00;
  414. INSEL2_FEEDBACK = $01;
  415. INSEL2_LINK = $02;
  416. INSEL2_EVENTA = $03;
  417. INSEL2_EVENTB = $04;
  418. INSEL2_IN2 = $05;
  419. INSEL2_AC1 = $06;
  420. INSEL2_USART0 = $07;
  421. INSEL2_SPI0 = $08;
  422. INSEL2_TCE0 = $09;
  423. INSEL2_TCB1 = $0A;
  424. INSEL2_TCF0 = $0B;
  425. INSEL2_WEX0 = $0C;
  426. end;
  427. TCLKCTRL = object //Clock controller
  428. MCLKCTRLA: byte; //MCLK Control A
  429. MCLKCTRLB: byte; //MCLK Control B
  430. Reserved2: byte;
  431. Reserved3: byte;
  432. Reserved4: byte;
  433. MCLKSTATUS: byte; //MCLK Status
  434. MCLKTIMEBASE: byte; //MCLK Timebase
  435. Reserved7: byte;
  436. OSCHFCTRLA: byte; //OSCHF Control A
  437. OSCHFTUNE: byte; //OSCHF Tune
  438. Reserved10: byte;
  439. Reserved11: byte;
  440. Reserved12: byte;
  441. Reserved13: byte;
  442. Reserved14: byte;
  443. Reserved15: byte;
  444. PLLCTRLA: byte; //PLL Control A
  445. PLLCTRLB: byte; //PLL Control B
  446. Reserved18: byte;
  447. Reserved19: byte;
  448. Reserved20: byte;
  449. Reserved21: byte;
  450. Reserved22: byte;
  451. Reserved23: byte;
  452. OSC32KCTRLA: byte; //OSC32K Control A
  453. Reserved25: byte;
  454. Reserved26: byte;
  455. Reserved27: byte;
  456. XOSC32KCTRLA: byte; //XOSC32K Control A
  457. const
  458. // CLKCTRL_CLKSEL
  459. CLKSELmask = $0F;
  460. CLKSEL_OSCHF = $00;
  461. CLKSEL_OSC32K = $01;
  462. CLKSEL_XOSC32K = $02;
  463. CLKSEL_EXTCLK = $03;
  464. CLKSEL_PLL = $04;
  465. // System clock out
  466. CLKOUTbm = $80;
  467. // Prescaler enable
  468. PENbm = $01;
  469. // CLKCTRL_PDIV
  470. PDIVmask = $1E;
  471. PDIV_DIV2 = $00;
  472. PDIV_DIV4 = $02;
  473. PDIV_DIV8 = $04;
  474. PDIV_DIV16 = $06;
  475. PDIV_DIV32 = $08;
  476. PDIV_DIV64 = $0A;
  477. PDIV_DIV6 = $10;
  478. PDIV_DIV10 = $12;
  479. PDIV_DIV12 = $14;
  480. PDIV_DIV24 = $16;
  481. PDIV_DIV48 = $18;
  482. // CLKCTRL_PBDIV
  483. PBDIVmask = $20;
  484. PBDIV_NONE = $00;
  485. PBDIV_DIV4 = $20;
  486. // System Oscillator changing
  487. SOSCbm = $01;
  488. // High frequency oscillator status
  489. OSCHFSbm = $02;
  490. // 32KHz oscillator status
  491. OSC32KSbm = $04;
  492. // 32.768 kHz Crystal Oscillator status
  493. XOSC32KSbm = $08;
  494. // External Clock status
  495. EXTSbm = $10;
  496. // PLL status
  497. PLLSbm = $20;
  498. // Timebase
  499. TIMEBASE0bm = $01;
  500. TIMEBASE1bm = $02;
  501. TIMEBASE2bm = $04;
  502. TIMEBASE3bm = $08;
  503. TIMEBASE4bm = $10;
  504. // CLKCTRL_AUTOTUNE
  505. AUTOTUNEmask = $03;
  506. AUTOTUNE_OFF = $00;
  507. AUTOTUNE_XOSC32K = $01;
  508. // Run in standby
  509. RUNSTDBYbm = $80;
  510. // CLKCTRL_MULFAC
  511. MULFACmask = $03;
  512. MULFAC_OFF = $00;
  513. MULFAC_8X = $02;
  514. MULFAC_16X = $03;
  515. // CLKCTRL_SOURCEDIV
  516. SOURCEDIVmask = $18;
  517. SOURCEDIV_DIV1 = $00;
  518. SOURCEDIV_DIV2 = $08;
  519. SOURCEDIV_DIV4 = $10;
  520. SOURCEDIV_DIV6 = $18;
  521. // CLKCTRL_SOURCE
  522. SOURCEmask = $60;
  523. SOURCE_OSCHF = $00;
  524. SOURCE_EXTCLK = $20;
  525. // CLKCTRL_CLKDIV
  526. CLKDIVmask = $01;
  527. CLKDIV_NONE = $00;
  528. CLKDIV_DIV2 = $01;
  529. // Enable
  530. ENABLEbm = $01;
  531. // Low power mode
  532. LPMODEbm = $02;
  533. // Select
  534. SELbm = $04;
  535. // CLKCTRL_CSUT
  536. CSUTmask = $30;
  537. CSUT_1K = $00;
  538. CSUT_16K = $10;
  539. CSUT_32K = $20;
  540. CSUT_64K = $30;
  541. end;
  542. TCPU = object //CPU
  543. Reserved0: byte;
  544. Reserved1: byte;
  545. Reserved2: byte;
  546. Reserved3: byte;
  547. CCP: byte; //Configuration Change Protection
  548. Reserved5: byte;
  549. Reserved6: byte;
  550. Reserved7: byte;
  551. Reserved8: byte;
  552. Reserved9: byte;
  553. Reserved10: byte;
  554. Reserved11: byte;
  555. Reserved12: byte;
  556. SP: word; //Stack Pointer
  557. SREG: byte; //Status Register
  558. const
  559. // CPU_CCP
  560. CCPmask = $FF;
  561. CCP_SPM = $9D;
  562. CCP_IOREG = $D8;
  563. // Carry Flag
  564. Cbm = $01;
  565. // Zero Flag
  566. Zbm = $02;
  567. // Negative Flag
  568. Nbm = $04;
  569. // Two's Complement Overflow Flag
  570. Vbm = $08;
  571. // N Exclusive Or V Flag
  572. Sbm = $10;
  573. // Half Carry Flag
  574. Hbm = $20;
  575. // Transfer Bit
  576. Tbm = $40;
  577. // Global Interrupt Enable Flag
  578. Ibm = $80;
  579. end;
  580. TCPUINT = object //Interrupt Controller
  581. CTRLA: byte; //Control A
  582. STATUS: byte; //Status
  583. LVL0PRI: byte; //Interrupt Level 0 Priority
  584. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  585. const
  586. // Round-robin Scheduling Enable
  587. LVL0RRbm = $01;
  588. // Compact Vector Table
  589. CVTbm = $20;
  590. // Interrupt Vector Select
  591. IVSELbm = $40;
  592. // Level 0 Interrupt Executing
  593. LVL0EXbm = $01;
  594. // Level 1 Interrupt Executing
  595. LVL1EXbm = $02;
  596. // Non-maskable Interrupt Executing
  597. NMIEXbm = $80;
  598. end;
  599. TCRCSCAN = object //CRCSCAN
  600. CTRLA: byte; //Control A
  601. CTRLB: byte; //Control B
  602. STATUS: byte; //Status
  603. const
  604. // Enable CRC scan
  605. ENABLEbm = $01;
  606. // Enable NMI Trigger
  607. NMIENbm = $02;
  608. // Reset CRC scan
  609. RESETbm = $80;
  610. // CRCSCAN_SRC
  611. SRCmask = $03;
  612. SRC_FLASH = $00;
  613. SRC_APPLICATION = $01;
  614. SRC_BOOT = $02;
  615. // CRC Busy
  616. BUSYbm = $01;
  617. // CRC Ok
  618. OKbm = $02;
  619. end;
  620. TEVSYS = object //Event System
  621. SWEVENTA: byte; //Software Event A
  622. Reserved1: byte;
  623. Reserved2: byte;
  624. Reserved3: byte;
  625. Reserved4: byte;
  626. Reserved5: byte;
  627. Reserved6: byte;
  628. Reserved7: byte;
  629. Reserved8: byte;
  630. Reserved9: byte;
  631. Reserved10: byte;
  632. Reserved11: byte;
  633. Reserved12: byte;
  634. Reserved13: byte;
  635. Reserved14: byte;
  636. Reserved15: byte;
  637. CHANNEL0: byte; //Multiplexer Channel 0
  638. CHANNEL1: byte; //Multiplexer Channel 1
  639. CHANNEL2: byte; //Multiplexer Channel 2
  640. CHANNEL3: byte; //Multiplexer Channel 3
  641. CHANNEL4: byte; //Multiplexer Channel 4
  642. CHANNEL5: byte; //Multiplexer Channel 5
  643. Reserved22: byte;
  644. Reserved23: byte;
  645. Reserved24: byte;
  646. Reserved25: byte;
  647. Reserved26: byte;
  648. Reserved27: byte;
  649. Reserved28: byte;
  650. Reserved29: byte;
  651. Reserved30: byte;
  652. Reserved31: byte;
  653. USERCCLLUT0A: byte; //CCL0 Event A
  654. USERCCLLUT0B: byte; //CCL0 Event B
  655. USERCCLLUT1A: byte; //CCL1 Event A
  656. USERCCLLUT1B: byte; //CCL1 Event B
  657. USERCCLLUT2A: byte; //CCL2 Event A
  658. USERCCLLUT2B: byte; //CCL2 Event B
  659. USERCCLLUT3A: byte; //CCL3 Event A
  660. USERCCLLUT3B: byte; //CCL3 Event B
  661. USERADC0START: byte; //ADC0 Start
  662. USEREVSYSEVOUTA: byte; //EVOUTA
  663. USEREVSYSEVOUTC: byte; //EVOUTC
  664. USEREVSYSEVOUTD: byte; //EVOUTD
  665. USEREVSYSEVOUTF: byte; //EVOUTF
  666. USERUSART0IRDA: byte; //USART0 IrDA Event
  667. USERTCE0CNTA: byte; //TCE0 Event A
  668. USERTCE0CNTB: byte; //TCE0 Event B
  669. USERTCB0CAPT: byte; //TCB0 Event A
  670. USERTCB0COUNT: byte; //TCB0 Event B
  671. USERTCB1CAPT: byte; //TCB1 Event A
  672. USERTCB1COUNT: byte; //TCB1 Event B
  673. USERTCF0CNT: byte; //TCF0 Clock Event
  674. USERTCF0ACT: byte; //TCF0 Action Event
  675. USERWEXA: byte; //WEX Event A
  676. USERWEXB: byte; //WEX Event B
  677. USERWEXC: byte; //WEX Event C
  678. const
  679. // EVSYS_SWEVENTA
  680. SWEVENTAmask = $FF;
  681. SWEVENTA_CH0 = $01;
  682. SWEVENTA_CH1 = $02;
  683. SWEVENTA_CH2 = $04;
  684. SWEVENTA_CH3 = $08;
  685. SWEVENTA_CH4 = $10;
  686. SWEVENTA_CH5 = $20;
  687. SWEVENTA_CH6 = $40;
  688. SWEVENTA_CH7 = $80;
  689. // EVSYS_CHANNEL
  690. CHANNELmask = $FF;
  691. CHANNEL_OFF = $00;
  692. CHANNEL_UPDI_SYNCH = $01;
  693. CHANNEL_RTC_OVF = $06;
  694. CHANNEL_RTC_CMP = $07;
  695. CHANNEL_RTC_PITEV0 = $08;
  696. CHANNEL_RTC_PITEV1 = $09;
  697. CHANNEL_CCL_LUT0 = $10;
  698. CHANNEL_CCL_LUT1 = $11;
  699. CHANNEL_CCL_LUT2 = $12;
  700. CHANNEL_CCL_LUT3 = $13;
  701. CHANNEL_AC0_OUT = $20;
  702. CHANNEL_AC1_OUT = $21;
  703. CHANNEL_ADC0_RES = $24;
  704. CHANNEL_ADC0_SAMP = $25;
  705. CHANNEL_ADC0_WCMP = $26;
  706. CHANNEL_PORTA_EV0 = $40;
  707. CHANNEL_PORTA_EV1 = $41;
  708. CHANNEL_PORTC_EV0 = $44;
  709. CHANNEL_PORTC_EV1 = $45;
  710. CHANNEL_PORTD_EV0 = $46;
  711. CHANNEL_PORTD_EV1 = $47;
  712. CHANNEL_PORTF_EV0 = $4A;
  713. CHANNEL_PORTF_EV1 = $4B;
  714. CHANNEL_USART0_XCK = $60;
  715. CHANNEL_SPI0_SCK = $68;
  716. CHANNEL_TCE0_OVF = $80;
  717. CHANNEL_TCE0_CMP0 = $84;
  718. CHANNEL_TCE0_CMP1 = $85;
  719. CHANNEL_TCE0_CMP2 = $86;
  720. CHANNEL_TCE0_CMP3 = $87;
  721. CHANNEL_TCB0_CAPT = $A0;
  722. CHANNEL_TCB0_OVF = $A1;
  723. CHANNEL_TCB1_CAPT = $A2;
  724. CHANNEL_TCB1_OVF = $A3;
  725. CHANNEL_TCF0_OVF = $B8;
  726. CHANNEL_TCF0_CMP0 = $B9;
  727. CHANNEL_TCF0_CMP1 = $BA;
  728. // EVSYS_USER
  729. USERmask = $FF;
  730. USER_OFF = $00;
  731. USER_CHANNEL0 = $01;
  732. USER_CHANNEL1 = $02;
  733. USER_CHANNEL2 = $03;
  734. USER_CHANNEL3 = $04;
  735. USER_CHANNEL4 = $05;
  736. USER_CHANNEL5 = $06;
  737. end;
  738. TFUSE = object //Fuses
  739. WDTCFG: byte; //Watchdog Configuration
  740. BODCFG: byte; //BOD Configuration
  741. OSCCFG: byte; //Oscillator Configuration
  742. Reserved3: byte;
  743. Reserved4: byte;
  744. SYSCFG0: byte; //System Configuration 0
  745. SYSCFG1: byte; //System Configuration 1
  746. CODESIZE: byte; //Code Section Size
  747. BOOTSIZE: byte; //Boot Section Size
  748. Reserved9: byte;
  749. PDICFG: word; //Programming and Debugging Interface Configuration
  750. const
  751. // FUSE_PERIOD
  752. PERIODmask = $0F;
  753. PERIOD_OFF = $00;
  754. PERIOD_8CLK = $01;
  755. PERIOD_16CLK = $02;
  756. PERIOD_32CLK = $03;
  757. PERIOD_64CLK = $04;
  758. PERIOD_128CLK = $05;
  759. PERIOD_256CLK = $06;
  760. PERIOD_512CLK = $07;
  761. PERIOD_1KCLK = $08;
  762. PERIOD_2KCLK = $09;
  763. PERIOD_4KCLK = $0A;
  764. PERIOD_8KCLK = $0B;
  765. // FUSE_WINDOW
  766. WINDOWmask = $F0;
  767. WINDOW_OFF = $00;
  768. WINDOW_8CLK = $10;
  769. WINDOW_16CLK = $20;
  770. WINDOW_32CLK = $30;
  771. WINDOW_64CLK = $40;
  772. WINDOW_128CLK = $50;
  773. WINDOW_256CLK = $60;
  774. WINDOW_512CLK = $70;
  775. WINDOW_1KCLK = $80;
  776. WINDOW_2KCLK = $90;
  777. WINDOW_4KCLK = $A0;
  778. WINDOW_8KCLK = $B0;
  779. // FUSE_SLEEP
  780. SLEEPmask = $03;
  781. SLEEP_DISABLE = $00;
  782. SLEEP_ENABLE = $01;
  783. SLEEP_SAMPLE = $02;
  784. // FUSE_ACTIVE
  785. ACTIVEmask = $0C;
  786. ACTIVE_DISABLE = $00;
  787. ACTIVE_ENABLED = $04;
  788. ACTIVE_SAMPLED = $08;
  789. ACTIVE_ENABLEWAIT = $0C;
  790. // FUSE_SAMPFREQ
  791. SAMPFREQmask = $10;
  792. SAMPFREQ_128HZ = $00;
  793. SAMPFREQ_32HZ = $10;
  794. // FUSE_LVL
  795. LVLmask = $E0;
  796. LVL_BODLEVEL0 = $00;
  797. LVL_BODLEVEL1 = $20;
  798. LVL_BODLEVEL2 = $40;
  799. LVL_BODLEVEL3 = $60;
  800. // FUSE_OSCHFFRQ
  801. OSCHFFRQmask = $08;
  802. OSCHFFRQ_20M = $00;
  803. OSCHFFRQ_16M = $08;
  804. // FUSE_EESAVE
  805. EESAVEmask = $01;
  806. EESAVE_DISABLE = $00;
  807. EESAVE_ENABLE = $01;
  808. // FUSE_RSTPINCFG
  809. RSTPINCFGmask = $08;
  810. RSTPINCFG_NONE = $00;
  811. RSTPINCFG_RESET = $08;
  812. // FUSE_UPDIPINCFG
  813. UPDIPINCFGmask = $10;
  814. UPDIPINCFG_GPIO = $00;
  815. UPDIPINCFG_UPDI = $10;
  816. // FUSE_CRCSEL
  817. CRCSELmask = $20;
  818. CRCSEL_CRC16 = $00;
  819. CRCSEL_CRC32 = $20;
  820. // FUSE_CRCSRC
  821. CRCSRCmask = $C0;
  822. CRCSRC_FLASH = $00;
  823. CRCSRC_BOOT = $40;
  824. CRCSRC_BOOTAPP = $80;
  825. CRCSRC_NOCRC = $C0;
  826. // FUSE_SUT
  827. SUTmask = $07;
  828. SUT_0MS = $00;
  829. SUT_1MS = $01;
  830. SUT_2MS = $02;
  831. SUT_4MS = $03;
  832. SUT_8MS = $04;
  833. SUT_16MS = $05;
  834. SUT_32MS = $06;
  835. SUT_64MS = $07;
  836. // FUSE_LEVEL
  837. LEVELmask = $03;
  838. LEVEL_NVMACCDIS = $02;
  839. LEVEL_BASIC = $03;
  840. // FUSE_KEY
  841. KEYmask = $FFF0;
  842. KEY_NOTACT = $00;
  843. KEY_NVMACT = $B450;
  844. end;
  845. TGPR = object //General Purpose Registers
  846. GPR0: byte; //General Purpose Register 0
  847. GPR1: byte; //General Purpose Register 1
  848. GPR2: byte; //General Purpose Register 2
  849. GPR3: byte; //General Purpose Register 3
  850. end;
  851. TLOCK = object //Lockbits
  852. KEY: dword; //Lock Key Bits
  853. const
  854. // LOCK_KEY
  855. KEYmask = $FFFFFFFF;
  856. KEY_NOLOCK = $5CC5C55C;
  857. KEY_RWLOCK = $A33A3AA3;
  858. end;
  859. TNVMCTRL = object //Non-volatile Memory Controller
  860. CTRLA: byte; //Control A
  861. CTRLB: byte; //Control B
  862. CTRLC: byte; //Control C
  863. Reserved3: byte;
  864. INTCTRL: byte; //Interrupt Control
  865. INTFLAGS: byte; //Interrupt Flags
  866. STATUS: byte; //Status
  867. Reserved7: byte;
  868. DATA: word; //Data
  869. Reserved10: byte;
  870. Reserved11: byte;
  871. ADDR: dword; //Address
  872. const
  873. // NVMCTRL_CMD
  874. CMDmask = $7F;
  875. CMD_NOCMD = $00;
  876. CMD_NOOP = $01;
  877. CMD_FLPW = $04;
  878. CMD_FLPERW = $05;
  879. CMD_FLPER = $08;
  880. CMD_FLMPER2 = $09;
  881. CMD_FLMPER4 = $0A;
  882. CMD_FLMPER8 = $0B;
  883. CMD_FLMPER16 = $0C;
  884. CMD_FLMPER32 = $0D;
  885. CMD_FLPBCLR = $0F;
  886. CMD_EEPW = $14;
  887. CMD_EEPERW = $15;
  888. CMD_EEPER = $17;
  889. CMD_EEPBCLR = $1F;
  890. CMD_CHER = $20;
  891. CMD_EECHER = $30;
  892. // Application Code Write Protect
  893. APPCODEWPbm = $01;
  894. // Boot Read Protect
  895. BOOTRPbm = $02;
  896. // Application Data Write Protect
  897. APPDATAWPbm = $04;
  898. // EEPROM Write Protect
  899. EEWPbm = $08;
  900. // NVMCTRL_FLMAP
  901. FLMAPmask = $30;
  902. FLMAP_SECTION0 = $00;
  903. FLMAP_SECTION1 = $10;
  904. FLMAP_SECTION2 = $20;
  905. FLMAP_SECTION3 = $30;
  906. // Flash Mapping Lock
  907. FLMAPLOCKbm = $80;
  908. // User Row Write Protect
  909. UROWWPbm = $01;
  910. // Boot Row Write Protect
  911. BOOTROWWPbm = $02;
  912. // EEPROM Ready
  913. EEREADYbm = $01;
  914. // Flash Ready
  915. FLREADYbm = $02;
  916. // EEPROM busy
  917. EEBUSYbm = $01;
  918. // Flash busy
  919. FLBUSYbm = $02;
  920. // NVMCTRL_ERROR
  921. ERRORmask = $70;
  922. ERROR_NOERROR = $00;
  923. ERROR_WRITEPROTECT = $20;
  924. ERROR_CMDCOLLISION = $30;
  925. ERROR_WRONGSECTION = $40;
  926. end;
  927. TPORT = object //I/O Ports
  928. DIR: byte; //Data Direction
  929. DIRSET: byte; //Data Direction Set
  930. DIRCLR: byte; //Data Direction Clear
  931. DIRTGL: byte; //Data Direction Toggle
  932. OUT_: byte; //Output Value
  933. OUTSET: byte; //Output Value Set
  934. OUTCLR: byte; //Output Value Clear
  935. OUTTGL: byte; //Output Value Toggle
  936. IN_: byte; //Input Value
  937. INTFLAGS: byte; //Interrupt Flags
  938. PORTCTRL: byte; //Port Control
  939. PINCONFIG: byte; //Pin Control Config
  940. PINCTRLUPD: byte; //Pin Control Update
  941. PINCTRLSET: byte; //Pin Control Set
  942. PINCTRLCLR: byte; //Pin Control Clear
  943. Reserved15: byte;
  944. PIN0CTRL: byte; //Pin 0 Control
  945. PIN1CTRL: byte; //Pin 1 Control
  946. PIN2CTRL: byte; //Pin 2 Control
  947. PIN3CTRL: byte; //Pin 3 Control
  948. PIN4CTRL: byte; //Pin 4 Control
  949. PIN5CTRL: byte; //Pin 5 Control
  950. PIN6CTRL: byte; //Pin 6 Control
  951. PIN7CTRL: byte; //Pin 7 Control
  952. EVGENCTRLA: byte; //Event Generation Control A
  953. const
  954. // Slew Rate Limit Enable
  955. SRLbm = $01;
  956. // PORT_ISC
  957. ISCmask = $07;
  958. ISC_INTDISABLE = $00;
  959. ISC_BOTHEDGES = $01;
  960. ISC_RISING = $02;
  961. ISC_FALLING = $03;
  962. ISC_INPUT_DISABLE = $04;
  963. ISC_LEVEL = $05;
  964. // Pullup enable
  965. PULLUPENbm = $08;
  966. // PORT_INLVL
  967. INLVLmask = $40;
  968. INLVL_ST = $00;
  969. INLVL_TTL = $40;
  970. // Inverted I/O Enable
  971. INVENbm = $80;
  972. // PORT_EVGEN0SEL
  973. EVGEN0SELmask = $07;
  974. EVGEN0SEL_PIN0 = $00;
  975. EVGEN0SEL_PIN1 = $01;
  976. EVGEN0SEL_PIN2 = $02;
  977. EVGEN0SEL_PIN3 = $03;
  978. EVGEN0SEL_PIN4 = $04;
  979. EVGEN0SEL_PIN5 = $05;
  980. EVGEN0SEL_PIN6 = $06;
  981. EVGEN0SEL_PIN7 = $07;
  982. // PORT_EVGEN1SEL
  983. EVGEN1SELmask = $70;
  984. EVGEN1SEL_PIN0 = $00;
  985. EVGEN1SEL_PIN1 = $10;
  986. EVGEN1SEL_PIN2 = $20;
  987. EVGEN1SEL_PIN3 = $30;
  988. EVGEN1SEL_PIN4 = $40;
  989. EVGEN1SEL_PIN5 = $50;
  990. EVGEN1SEL_PIN6 = $60;
  991. EVGEN1SEL_PIN7 = $70;
  992. end;
  993. TPORTMUX = object //Port Multiplexer
  994. EVSYSROUTEA: byte; //EVSYS route A
  995. CCLROUTEA: byte; //CCL route A
  996. USARTROUTEA: byte; //USART route A
  997. Reserved3: byte;
  998. Reserved4: byte;
  999. SPIROUTEA: byte; //SPI route A
  1000. TWIROUTEA: byte; //TWI route A
  1001. TCEROUTEA: byte; //TCE route A
  1002. Reserved8: byte;
  1003. Reserved9: byte;
  1004. Reserved10: byte;
  1005. Reserved11: byte;
  1006. TCFROUTEA: byte; //TCF Route A
  1007. const
  1008. // PORTMUX_EVOUTC
  1009. EVOUTCmask = $04;
  1010. EVOUTC_DEFAULT = $00;
  1011. // PORTMUX_EVOUTD
  1012. EVOUTDmask = $08;
  1013. EVOUTD_DEFAULT = $00;
  1014. EVOUTD_ALT1 = $08;
  1015. // PORTMUX_EVOUTF
  1016. EVOUTFmask = $20;
  1017. EVOUTF_DEFAULT = $00;
  1018. EVOUTF_ALT1 = $20;
  1019. // PORTMUX_LUT0
  1020. LUT0mask = $01;
  1021. LUT0_DEFAULT = $00;
  1022. LUT0_ALT1 = $01;
  1023. // PORTMUX_LUT1
  1024. LUT1mask = $02;
  1025. LUT1_DEFAULT = $00;
  1026. LUT1_ALT1 = $02;
  1027. // PORTMUX_LUT2
  1028. LUT2mask = $04;
  1029. LUT2_DEFAULT = $00;
  1030. LUT2_ALT1 = $04;
  1031. // PORTMUX_USART0
  1032. USART0mask = $07;
  1033. USART0_DEFAULT = $00;
  1034. USART0_ALT3 = $03;
  1035. USART0_ALT4 = $04;
  1036. USART0_ALT6 = $06;
  1037. USART0_NONE = $07;
  1038. // PORTMUX_SPI0
  1039. SPI0mask = $07;
  1040. SPI0_DEFAULT = $00;
  1041. SPI0_ALT3 = $03;
  1042. SPI0_ALT4 = $04;
  1043. SPI0_ALT5 = $05;
  1044. SPI0_ALT6 = $06;
  1045. SPI0_NONE = $07;
  1046. // PORTMUX_TWI0
  1047. TWI0mask = $03;
  1048. TWI0_DEFAULT = $00;
  1049. TWI0_ALT2 = $02;
  1050. TWI0_ALT3 = $03;
  1051. // PORTMUX_TCE0
  1052. TCE0mask = $0F;
  1053. TCE0_PORTA = $00;
  1054. TCE0_PORTC = $02;
  1055. TCE0_PORTD = $03;
  1056. TCE0_PORTC2 = $08;
  1057. // PORTMUX_TCF0
  1058. TCF0mask = $03;
  1059. TCF0_DEFAULT = $00;
  1060. end;
  1061. TRSTCTRL = object //Reset controller
  1062. RSTFR: byte; //Reset Flags
  1063. SWRR: byte; //Software Reset
  1064. const
  1065. // Power on Reset flag
  1066. PORFbm = $01;
  1067. // Brown out detector Reset flag
  1068. BORFbm = $02;
  1069. // External Reset flag
  1070. EXTRFbm = $04;
  1071. // Watch dog Reset flag
  1072. WDRFbm = $08;
  1073. // Software Reset flag
  1074. SWRFbm = $10;
  1075. // UPDI Reset flag
  1076. UPDIRFbm = $20;
  1077. // Software Reset Enable
  1078. SWREbm = $01;
  1079. end;
  1080. TRTC = object //Real-Time Counter
  1081. CTRLA: byte; //Control A
  1082. STATUS: byte; //Status
  1083. INTCTRL: byte; //Interrupt Control
  1084. INTFLAGS: byte; //Interrupt Flags
  1085. TEMP: byte; //Temporary
  1086. DBGCTRL: byte; //Debug control
  1087. CALIB: byte; //Calibration
  1088. CLKSEL: byte; //Clock Select
  1089. CNT: word; //Counter
  1090. PER: word; //Period
  1091. CMP: word; //Compare
  1092. Reserved14: byte;
  1093. Reserved15: byte;
  1094. PITCTRLA: byte; //PIT Control A
  1095. PITSTATUS: byte; //PIT Status
  1096. PITINTCTRL: byte; //PIT Interrupt Control
  1097. PITINTFLAGS: byte; //PIT Interrupt Flags
  1098. Reserved20: byte;
  1099. PITDBGCTRL: byte; //PIT Debug control
  1100. PITEVGENCTRLA: byte; //PIT Event Generation Control A
  1101. const
  1102. // Enable
  1103. RTCENbm = $01;
  1104. // Correction enable
  1105. CORRENbm = $04;
  1106. // RTC_PRESCALER
  1107. PRESCALERmask = $78;
  1108. PRESCALER_DIV1 = $00;
  1109. PRESCALER_DIV2 = $08;
  1110. PRESCALER_DIV4 = $10;
  1111. PRESCALER_DIV8 = $18;
  1112. PRESCALER_DIV16 = $20;
  1113. PRESCALER_DIV32 = $28;
  1114. PRESCALER_DIV64 = $30;
  1115. PRESCALER_DIV128 = $38;
  1116. PRESCALER_DIV256 = $40;
  1117. PRESCALER_DIV512 = $48;
  1118. PRESCALER_DIV1024 = $50;
  1119. PRESCALER_DIV2048 = $58;
  1120. PRESCALER_DIV4096 = $60;
  1121. PRESCALER_DIV8192 = $68;
  1122. PRESCALER_DIV16384 = $70;
  1123. PRESCALER_DIV32768 = $78;
  1124. // Run In Standby
  1125. RUNSTDBYbm = $80;
  1126. // CTRLA Synchronization Busy Flag
  1127. CTRLABUSYbm = $01;
  1128. // Count Synchronization Busy Flag
  1129. CNTBUSYbm = $02;
  1130. // Period Synchronization Busy Flag
  1131. PERBUSYbm = $04;
  1132. // Comparator Synchronization Busy Flag
  1133. CMPBUSYbm = $08;
  1134. // Overflow Interrupt enable
  1135. OVFbm = $01;
  1136. // Compare Match Interrupt enable
  1137. CMPbm = $02;
  1138. // Run in debug
  1139. DBGRUNbm = $01;
  1140. // Error Correction Value
  1141. ERROR0bm = $01;
  1142. ERROR1bm = $02;
  1143. ERROR2bm = $04;
  1144. ERROR3bm = $08;
  1145. ERROR4bm = $10;
  1146. ERROR5bm = $20;
  1147. ERROR6bm = $40;
  1148. // Error Correction Sign Bit
  1149. SIGNbm = $80;
  1150. // RTC_CLKSEL
  1151. CLKSELmask = $03;
  1152. CLKSEL_OSC32K = $00;
  1153. CLKSEL_OSC1K = $01;
  1154. CLKSEL_XOSC32K = $02;
  1155. CLKSEL_EXTCLK = $03;
  1156. // Enable
  1157. PITENbm = $01;
  1158. // RTC_PERIOD
  1159. PERIODmask = $78;
  1160. PERIOD_OFF = $00;
  1161. PERIOD_CYC4 = $08;
  1162. PERIOD_CYC8 = $10;
  1163. PERIOD_CYC16 = $18;
  1164. PERIOD_CYC32 = $20;
  1165. PERIOD_CYC64 = $28;
  1166. PERIOD_CYC128 = $30;
  1167. PERIOD_CYC256 = $38;
  1168. PERIOD_CYC512 = $40;
  1169. PERIOD_CYC1024 = $48;
  1170. PERIOD_CYC2048 = $50;
  1171. PERIOD_CYC4096 = $58;
  1172. PERIOD_CYC8192 = $60;
  1173. PERIOD_CYC16384 = $68;
  1174. PERIOD_CYC32768 = $70;
  1175. // CTRLA Synchronization Busy Flag
  1176. CTRLBUSYbm = $01;
  1177. // Periodic Interrupt
  1178. PIbm = $01;
  1179. // RTC_EVGEN0SEL
  1180. EVGEN0SELmask = $0F;
  1181. EVGEN0SEL_OFF = $00;
  1182. EVGEN0SEL_DIV4 = $01;
  1183. EVGEN0SEL_DIV8 = $02;
  1184. EVGEN0SEL_DIV16 = $03;
  1185. EVGEN0SEL_DIV32 = $04;
  1186. EVGEN0SEL_DIV64 = $05;
  1187. EVGEN0SEL_DIV128 = $06;
  1188. EVGEN0SEL_DIV256 = $07;
  1189. EVGEN0SEL_DIV512 = $08;
  1190. EVGEN0SEL_DIV1024 = $09;
  1191. EVGEN0SEL_DIV2048 = $0A;
  1192. EVGEN0SEL_DIV4096 = $0B;
  1193. EVGEN0SEL_DIV8192 = $0C;
  1194. EVGEN0SEL_DIV16384 = $0D;
  1195. EVGEN0SEL_DIV32768 = $0E;
  1196. // RTC_EVGEN1SEL
  1197. EVGEN1SELmask = $F0;
  1198. EVGEN1SEL_OFF = $00;
  1199. EVGEN1SEL_DIV4 = $10;
  1200. EVGEN1SEL_DIV8 = $20;
  1201. EVGEN1SEL_DIV16 = $30;
  1202. EVGEN1SEL_DIV32 = $40;
  1203. EVGEN1SEL_DIV64 = $50;
  1204. EVGEN1SEL_DIV128 = $60;
  1205. EVGEN1SEL_DIV256 = $70;
  1206. EVGEN1SEL_DIV512 = $80;
  1207. EVGEN1SEL_DIV1024 = $90;
  1208. EVGEN1SEL_DIV2048 = $A0;
  1209. EVGEN1SEL_DIV4096 = $B0;
  1210. EVGEN1SEL_DIV8192 = $C0;
  1211. EVGEN1SEL_DIV16384 = $D0;
  1212. EVGEN1SEL_DIV32768 = $E0;
  1213. end;
  1214. TSIGROW = object //Signature row
  1215. DEVICEID0: byte; //Device ID Byte 0
  1216. DEVICEID1: byte; //Device ID Byte 1
  1217. DEVICEID2: byte; //Device ID Byte 2
  1218. Reserved3: byte;
  1219. TEMPSENSE0: word; //Temperature Calibration 0
  1220. TEMPSENSE1: word; //Temperature Calibration 1
  1221. Reserved8: byte;
  1222. Reserved9: byte;
  1223. Reserved10: byte;
  1224. Reserved11: byte;
  1225. Reserved12: byte;
  1226. Reserved13: byte;
  1227. Reserved14: byte;
  1228. Reserved15: byte;
  1229. SERNUM0: byte; //Serial Number Byte 0
  1230. SERNUM1: byte; //Serial Number Byte 1
  1231. SERNUM2: byte; //Serial Number Byte 2
  1232. SERNUM3: byte; //Serial Number Byte 3
  1233. SERNUM4: byte; //Serial Number Byte 4
  1234. SERNUM5: byte; //Serial Number Byte 5
  1235. SERNUM6: byte; //Serial Number Byte 6
  1236. SERNUM7: byte; //Serial Number Byte 7
  1237. SERNUM8: byte; //Serial Number Byte 8
  1238. SERNUM9: byte; //Serial Number Byte 9
  1239. SERNUM10: byte; //Serial Number Byte 10
  1240. SERNUM11: byte; //Serial Number Byte 11
  1241. SERNUM12: byte; //Serial Number Byte 12
  1242. SERNUM13: byte; //Serial Number Byte 13
  1243. SERNUM14: byte; //Serial Number Byte 14
  1244. SERNUM15: byte; //Serial Number Byte 15
  1245. end;
  1246. TSLPCTRL = object //Sleep Controller
  1247. CTRLA: byte; //Control A
  1248. const
  1249. // Sleep enable
  1250. SENbm = $01;
  1251. // SLPCTRL_SMODE
  1252. SMODEmask = $06;
  1253. SMODE_IDLE = $00;
  1254. SMODE_STDBY = $02;
  1255. SMODE_PDOWN = $04;
  1256. end;
  1257. TSPI = object //Serial Peripheral Interface
  1258. CTRLA: byte; //Control A
  1259. CTRLB: byte; //Control B
  1260. INTCTRL: byte; //Interrupt Control
  1261. INTFLAGS: byte; //Interrupt Flags
  1262. DATA: byte; //Data
  1263. const
  1264. // Enable Module
  1265. ENABLEbm = $01;
  1266. // SPI_PRESC
  1267. PRESCmask = $06;
  1268. PRESC_DIV4 = $00;
  1269. PRESC_DIV16 = $02;
  1270. PRESC_DIV64 = $04;
  1271. PRESC_DIV128 = $06;
  1272. // Enable Double Speed
  1273. CLK2Xbm = $10;
  1274. // Host Operation Enable
  1275. MASTERbm = $20;
  1276. // Data Order Setting
  1277. DORDbm = $40;
  1278. // SPI_MODE
  1279. MODEmask = $03;
  1280. MODE_0 = $00;
  1281. MODE_1 = $01;
  1282. MODE_2 = $02;
  1283. MODE_3 = $03;
  1284. // SPI Select Disable
  1285. SSDbm = $04;
  1286. // Buffer Mode Wait for Receive
  1287. BUFWRbm = $40;
  1288. // Buffer Mode Enable
  1289. BUFENbm = $80;
  1290. // Interrupt Enable
  1291. IEbm = $01;
  1292. // SPI Select Trigger Interrupt Enable
  1293. SSIEbm = $10;
  1294. // Data Register Empty Interrupt Enable
  1295. DREIEbm = $20;
  1296. // Transfer Complete Interrupt Enable
  1297. TXCIEbm = $40;
  1298. // Receive Complete Interrupt Enable
  1299. RXCIEbm = $80;
  1300. end;
  1301. TSYSCFG = object //System Configuration Registers
  1302. Reserved0: byte;
  1303. REVID: byte; //Revision ID
  1304. const
  1305. // Minor Revision
  1306. MINOR0bm = $01;
  1307. MINOR1bm = $02;
  1308. MINOR2bm = $04;
  1309. MINOR3bm = $08;
  1310. // Major Revision
  1311. MAJOR0bm = $10;
  1312. MAJOR1bm = $20;
  1313. MAJOR2bm = $40;
  1314. MAJOR3bm = $80;
  1315. end;
  1316. TTCB = object //16-bit Timer/Counter Type B
  1317. CTRLA: byte; //Control A
  1318. CTRLB: byte; //Control B
  1319. CTRLC: byte; //Control C
  1320. Reserved3: byte;
  1321. EVCTRL: byte; //Event Control
  1322. INTCTRL: byte; //Interrupt Control
  1323. INTFLAGS: byte; //Interrupt Flags
  1324. STATUS: byte; //Status
  1325. DBGCTRL: byte; //Debug Control
  1326. TEMP: byte; //Temporary Value
  1327. CNT: word; //Count
  1328. CCMP: word; //Compare or Capture
  1329. const
  1330. // Enable
  1331. ENABLEbm = $01;
  1332. // TCB_CLKSEL
  1333. CLKSELmask = $0E;
  1334. CLKSEL_DIV1 = $00;
  1335. CLKSEL_DIV2 = $02;
  1336. CLKSEL_TCE0 = $04;
  1337. CLKSEL_EVENT = $0E;
  1338. // Synchronize Update
  1339. SYNCUPDbm = $10;
  1340. // Cascade two timers
  1341. CASCADEbm = $20;
  1342. // Run Standby
  1343. RUNSTDBYbm = $40;
  1344. // TCB_CNTMODE
  1345. CNTMODEmask = $07;
  1346. CNTMODE_INT = $00;
  1347. CNTMODE_TIMEOUT = $01;
  1348. CNTMODE_CAPT = $02;
  1349. CNTMODE_FRQ = $03;
  1350. CNTMODE_PW = $04;
  1351. CNTMODE_FRQPW = $05;
  1352. CNTMODE_SINGLE = $06;
  1353. CNTMODE_PWM8 = $07;
  1354. // Pin Output Enable
  1355. CCMPENbm = $10;
  1356. // Pin Initial State
  1357. CCMPINITbm = $20;
  1358. // Asynchronous Enable
  1359. ASYNCbm = $40;
  1360. // TCB_EVGEN
  1361. EVGENmask = $80;
  1362. EVGEN_PULSE = $00;
  1363. EVGEN_WAVEFORM = $80;
  1364. // TCB_CNTSIZE
  1365. CNTSIZEmask = $07;
  1366. CNTSIZE_16BITS = $00;
  1367. CNTSIZE_15BITS = $01;
  1368. CNTSIZE_14BITS = $02;
  1369. CNTSIZE_13BITS = $03;
  1370. CNTSIZE_12BITS = $04;
  1371. CNTSIZE_11BITS = $05;
  1372. CNTSIZE_10BITS = $06;
  1373. CNTSIZE_9BITS = $07;
  1374. // Event Input Enable
  1375. CAPTEIbm = $01;
  1376. // Event Edge
  1377. EDGEbm = $10;
  1378. // Input Capture Noise Cancellation Filter
  1379. FILTERbm = $40;
  1380. // Capture or Timeout
  1381. CAPTbm = $01;
  1382. // Overflow
  1383. OVFbm = $02;
  1384. // Run
  1385. RUNbm = $01;
  1386. // Debug Run
  1387. DBGRUNbm = $01;
  1388. end;
  1389. TTCE = object //16-bit Timer/Counter Type E
  1390. CTRLA: byte; //Control A
  1391. CTRLB: byte; //Control B
  1392. CTRLC: byte; //Control C
  1393. CTRLD: byte; //Control D
  1394. CTRLECLR: byte; //Control E Clear
  1395. CTRLESET: byte; //Control E Set
  1396. CTRLFCLR: byte; //Control F Clear
  1397. CTRLFSET: byte; //Control F Set
  1398. EVGENCTRL: byte; //Event Generation Control
  1399. EVCTRL: byte; //Event Control
  1400. INTCTRL: byte; //Interrupt Control
  1401. INTFLAGS: byte; //Interrupt Flags
  1402. Reserved12: byte;
  1403. Reserved13: byte;
  1404. DBGCTRL: byte; //Debug Control
  1405. TEMP: byte; //Temporary data for 16-bit Access
  1406. Reserved16: byte;
  1407. Reserved17: byte;
  1408. Reserved18: byte;
  1409. Reserved19: byte;
  1410. Reserved20: byte;
  1411. Reserved21: byte;
  1412. Reserved22: byte;
  1413. Reserved23: byte;
  1414. Reserved24: byte;
  1415. Reserved25: byte;
  1416. Reserved26: byte;
  1417. Reserved27: byte;
  1418. Reserved28: byte;
  1419. Reserved29: byte;
  1420. Reserved30: byte;
  1421. Reserved31: byte;
  1422. CNT: word; //Count
  1423. AMP: word; //Amplitude
  1424. OFFSET: word; //Offset
  1425. PER: word; //Period
  1426. CMP0: word; //Compare 0
  1427. CMP1: word; //Compare 1
  1428. CMP2: word; //Compare 2
  1429. CMP3: word; //Compare 3
  1430. Reserved48: byte;
  1431. Reserved49: byte;
  1432. Reserved50: byte;
  1433. Reserved51: byte;
  1434. Reserved52: byte;
  1435. Reserved53: byte;
  1436. PERBUF: word; //Period Buffer
  1437. CMP0BUF: word; //Compare 0 Buffer
  1438. CMP1BUF: word; //Compare 1 Buffer
  1439. CMP2BUF: word; //Compare 2 Buffer
  1440. CMP3BUF: word; //Compare 3 Buffer
  1441. const
  1442. // Module Enable
  1443. ENABLEbm = $01;
  1444. // TCE_CLKSEL
  1445. CLKSELmask = $0E;
  1446. CLKSEL_DIV1 = $00;
  1447. CLKSEL_DIV2 = $02;
  1448. CLKSEL_DIV4 = $04;
  1449. CLKSEL_DIV8 = $06;
  1450. CLKSEL_DIV16 = $08;
  1451. CLKSEL_DIV64 = $0A;
  1452. CLKSEL_DIV256 = $0C;
  1453. CLKSEL_DIV1024 = $0E;
  1454. // Run in Standby
  1455. RUNSTDBYbm = $80;
  1456. // TCE_WGMODE
  1457. WGMODEmask = $07;
  1458. WGMODE_NORMAL = $00;
  1459. WGMODE_FRQ = $01;
  1460. WGMODE_SINGLESLOPE = $03;
  1461. WGMODE_DSTOP = $05;
  1462. WGMODE_DSBOTH = $06;
  1463. WGMODE_DSBOTTOM = $07;
  1464. // Auto Lock Update
  1465. ALUPDbm = $08;
  1466. // Compare 0 Enable
  1467. CMP0ENbm = $10;
  1468. // Compare 1 Enable
  1469. CMP1ENbm = $20;
  1470. // Compare 2 Enable
  1471. CMP2ENbm = $40;
  1472. // Compare 3 Enable
  1473. CMP3ENbm = $80;
  1474. // Compare 0 Waveform Output Value
  1475. CMP0OVbm = $01;
  1476. // Compare 1 Waveform Output Value
  1477. CMP1OVbm = $02;
  1478. // Compare 2 Waveform Output Value
  1479. CMP2OVbm = $04;
  1480. // Compare 3 Waveform Output Value
  1481. CMP3OVbm = $08;
  1482. // Compare 0 Polarity
  1483. CMP0POLbm = $10;
  1484. // Compare 1 Polarity
  1485. CMP1POLbm = $20;
  1486. // Compare 2 Polarity
  1487. CMP2POLbm = $40;
  1488. // Compare 3 Polarity
  1489. CMP3POLbm = $80;
  1490. // TCE_SCALE
  1491. SCALEmask = $04;
  1492. SCALE_NORMAL = $00;
  1493. SCALE_FRACTIONAL = $04;
  1494. // Amplitude Control Enable
  1495. AMPENbm = $08;
  1496. // TCE_SCALEMODE
  1497. SCALEMODEmask = $30;
  1498. SCALEMODE_CENTER = $00;
  1499. SCALEMODE_BOTTOM = $10;
  1500. SCALEMODE_TOP = $20;
  1501. SCALEMODE_TOPBOTTOM = $30;
  1502. // TCE_HREN
  1503. HRENmask = $C0;
  1504. HREN_OFF = $00;
  1505. HREN_4X = $40;
  1506. HREN_8X = $80;
  1507. // Direction
  1508. DIRbm = $01;
  1509. // Lock Update
  1510. LUPDbm = $02;
  1511. // TCE_CMD
  1512. CMDmask = $0C;
  1513. CMD_NONE = $00;
  1514. CMD_UPDATE = $04;
  1515. CMD_RESTART = $08;
  1516. CMD_RESET = $0C;
  1517. // Period Buffer Valid
  1518. PERBVbm = $01;
  1519. // Compare 0 Buffer Valid
  1520. CMP0BVbm = $02;
  1521. // Compare 1 Buffer Valid
  1522. CMP1BVbm = $04;
  1523. // Compare 2 Buffer Valid
  1524. CMP2BVbm = $08;
  1525. // Compare 3 Buffer Valid
  1526. CMP3BVbm = $10;
  1527. // CMP0EV
  1528. CMP0EVmask = $10;
  1529. CMP0EVPULSE = $00;
  1530. CMP0EVWAVEFORM = $10;
  1531. // CMP1EV
  1532. CMP1EVmask = $20;
  1533. CMP1EVPULSE = $00;
  1534. CMP1EVWAVEFORM = $20;
  1535. // CMP2EV
  1536. CMP2EVmask = $40;
  1537. CMP2EVPULSE = $00;
  1538. CMP2EVWAVEFORM = $40;
  1539. // CMP3EV
  1540. CMP3EVmask = $80;
  1541. CMP3EVPULSE = $00;
  1542. CMP3EVWAVEFORM = $80;
  1543. // Count on Event Input A
  1544. CNTAEIbm = $01;
  1545. // TCE_EVACTA
  1546. EVACTAmask = $0E;
  1547. EVACTA_CNT_POSEDGE = $00;
  1548. EVACTA_CNT_ANYEDGE = $02;
  1549. EVACTA_CNT_HIGHLVL = $04;
  1550. EVACTA_UPDOWN = $06;
  1551. // Count on Event Input B
  1552. CNTBEIbm = $10;
  1553. // TCE_EVACTB
  1554. EVACTBmask = $E0;
  1555. EVACTB_NONE = $00;
  1556. EVACTB_UPDOWN = $60;
  1557. EVACTB_RESTART_POSEDGE = $80;
  1558. EVACTB_RESTART_ANYEDGE = $A0;
  1559. EVACTB_RESTART_HIGHLVL = $C0;
  1560. // Overflow Interrupt Enable
  1561. OVFbm = $01;
  1562. // Compare 0 Interrupt Enable
  1563. CMP0bm = $10;
  1564. // Compare 1 Interrupt Enable
  1565. CMP1bm = $20;
  1566. // Compare 2 Interrupt Enable
  1567. CMP2bm = $40;
  1568. // Compare 3 Interrupt Enable
  1569. CMP3bm = $80;
  1570. // Debug Run
  1571. DBGRUNbm = $01;
  1572. end;
  1573. TTCF = object //24-bit Timer/Counter for frequency generation
  1574. CTRLA: byte; //Control A
  1575. CTRLB: byte; //Control B
  1576. CTRLC: byte; //Control C
  1577. CTRLD: byte; //Control D
  1578. EVCTRL: byte; //Event Control
  1579. INTCTRL: byte; //Interrupt Control
  1580. INTFLAGS: byte; //Interrupt Flags
  1581. STATUS: byte; //Status
  1582. Reserved8: byte;
  1583. Reserved9: byte;
  1584. Reserved10: byte;
  1585. Reserved11: byte;
  1586. Reserved12: byte;
  1587. DBGCTRL: byte; //Debug Control
  1588. Reserved14: byte;
  1589. Reserved15: byte;
  1590. CNT: dword; //Count
  1591. CMP: dword; //Compare
  1592. const
  1593. // Enable
  1594. ENABLEbm = $01;
  1595. // TCF_PRESC
  1596. PRESCmask = $0E;
  1597. PRESC_DIV1 = $00;
  1598. PRESC_DIV2 = $02;
  1599. PRESC_DIV4 = $04;
  1600. PRESC_DIV8 = $06;
  1601. PRESC_DIV16 = $08;
  1602. PRESC_DIV32 = $0A;
  1603. PRESC_DIV64 = $0C;
  1604. PRESC_DIV128 = $0E;
  1605. // Run Standby
  1606. RUNSTDBYbm = $80;
  1607. // TCF_WGMODE
  1608. WGMODEmask = $07;
  1609. WGMODE_FRQ = $00;
  1610. WGMODE_NCOPF = $01;
  1611. WGMODE_NCOFDC = $02;
  1612. WGMODE_PWM8 = $07;
  1613. // TCF_CLKSEL
  1614. CLKSELmask = $38;
  1615. CLKSEL_CLKPER = $00;
  1616. CLKSEL_EVENT = $08;
  1617. CLKSEL_OSCHF = $10;
  1618. CLKSEL_OSC32K = $18;
  1619. CLKSEL_PLL = $28;
  1620. // CMP0EV
  1621. CMP0EVmask = $40;
  1622. CMP0EVPULSE = $00;
  1623. CMP0EVWAVEFORM = $40;
  1624. // CMP1EV
  1625. CMP1EVmask = $80;
  1626. CMP1EVPULSE = $00;
  1627. CMP1EVWAVEFORM = $80;
  1628. // Waveform Output 0 Enable
  1629. WO0ENbm = $01;
  1630. // Waveform Output 1 Enable
  1631. WO1ENbm = $02;
  1632. // WO0POL
  1633. WO0POLmask = $04;
  1634. WO0POLNORMAL = $00;
  1635. WO0POLINVERSE = $04;
  1636. // WO1POL
  1637. WO1POLmask = $08;
  1638. WO1POLNORMAL = $00;
  1639. WO1POLINVERSE = $08;
  1640. // TCF_WGPULSE
  1641. WGPULSEmask = $70;
  1642. WGPULSE_CLK1 = $00;
  1643. WGPULSE_CLK2 = $10;
  1644. WGPULSE_CLK4 = $20;
  1645. WGPULSE_CLK8 = $30;
  1646. WGPULSE_CLK16 = $40;
  1647. WGPULSE_CLK32 = $50;
  1648. WGPULSE_CLK64 = $60;
  1649. WGPULSE_CLK128 = $70;
  1650. // TCF_CMD
  1651. CMDmask = $03;
  1652. CMD_NONE = $00;
  1653. CMD_UPDATE = $01;
  1654. CMD_RESTART = $02;
  1655. // Event A Input Enable
  1656. CNTAEIbm = $01;
  1657. // TCF_EVACTA
  1658. EVACTAmask = $06;
  1659. EVACTA_RESTART = $00;
  1660. EVACTA_BLANK = $02;
  1661. // Event A Filter
  1662. FILTERAbm = $08;
  1663. // Overflow
  1664. OVFbm = $01;
  1665. // Compare 0 Interrupt Enable
  1666. CMP0bm = $02;
  1667. // Compare 1 Interrupt Enable
  1668. CMP1bm = $04;
  1669. // Control A Synchronization Busy
  1670. CTRLABUSYbm = $02;
  1671. // Control B Synchronization Busy
  1672. CTRLCBUSYbm = $04;
  1673. // Control D Synchronization Busy
  1674. CTRLDBUSYbm = $08;
  1675. // Counter Synchronization Busy
  1676. CNTBUSYbm = $10;
  1677. // Period Synchronization Busy
  1678. PERBUSYbm = $20;
  1679. // Compare 0 Synchronization Busy
  1680. CMP0BUSYbm = $40;
  1681. // Compare 1 Synchronization Busy
  1682. CMP1BUSYbm = $80;
  1683. // Debug Run
  1684. DBGRUNbm = $01;
  1685. end;
  1686. TTWI = object //Two-Wire Interface
  1687. CTRLA: byte; //Control A
  1688. DUALCTRL: byte; //Dual Mode Control
  1689. DBGCTRL: byte; //Debug Control
  1690. MCTRLA: byte; //Host Control A
  1691. MCTRLB: byte; //Host Control B
  1692. MSTATUS: byte; //Host STATUS
  1693. MBAUD: byte; //Host Baud Rate
  1694. MADDR: byte; //Host Address
  1695. MDATA: byte; //Host Data
  1696. SCTRLA: byte; //Client Control A
  1697. SCTRLB: byte; //Client Control B
  1698. SSTATUS: byte; //Client Status
  1699. SADDR: byte; //Client Address
  1700. SDATA: byte; //Client Data
  1701. SADDRMASK: byte; //Client Address Mask
  1702. const
  1703. // TWI_FMEN
  1704. FMENmask = $01;
  1705. FMEN_OFF = $00;
  1706. FMEN_ON = $01;
  1707. // TWI_FMPEN
  1708. FMPENmask = $02;
  1709. FMPEN_OFF = $00;
  1710. FMPEN_ON = $02;
  1711. // TWI_SDAHOLD
  1712. SDAHOLDmask = $0C;
  1713. SDAHOLD_OFF = $00;
  1714. SDAHOLD_50NS = $04;
  1715. SDAHOLD_300NS = $08;
  1716. SDAHOLD_500NS = $0C;
  1717. // TWI_SDASETUP
  1718. SDASETUPmask = $10;
  1719. SDASETUP_4CYC = $00;
  1720. SDASETUP_8CYC = $10;
  1721. // TWI_INPUTLVL
  1722. INPUTLVLmask = $40;
  1723. INPUTLVL_I2C = $00;
  1724. INPUTLVL_SMBUS = $40;
  1725. // Enable
  1726. ENABLEbm = $01;
  1727. // TWI_DBGRUN
  1728. DBGRUNmask = $01;
  1729. DBGRUN_HALT = $00;
  1730. DBGRUN_RUN = $01;
  1731. // Smart Mode Enable
  1732. SMENbm = $02;
  1733. // TWI_TIMEOUT
  1734. TIMEOUTmask = $0C;
  1735. TIMEOUT_DISABLED = $00;
  1736. TIMEOUT_50US = $04;
  1737. TIMEOUT_100US = $08;
  1738. TIMEOUT_200US = $0C;
  1739. // Quick Command Enable
  1740. QCENbm = $10;
  1741. // Write Interrupt Enable
  1742. WIENbm = $40;
  1743. // Read Interrupt Enable
  1744. RIENbm = $80;
  1745. // TWI_MCMD
  1746. MCMDmask = $03;
  1747. MCMD_NOACT = $00;
  1748. MCMD_REPSTART = $01;
  1749. MCMD_RECVTRANS = $02;
  1750. MCMD_STOP = $03;
  1751. // TWI_ACKACT
  1752. ACKACTmask = $04;
  1753. ACKACT_ACK = $00;
  1754. ACKACT_NACK = $04;
  1755. // Flush
  1756. FLUSHbm = $08;
  1757. // TWI_BUSSTATE
  1758. BUSSTATEmask = $03;
  1759. BUSSTATE_UNKNOWN = $00;
  1760. BUSSTATE_IDLE = $01;
  1761. BUSSTATE_OWNER = $02;
  1762. BUSSTATE_BUSY = $03;
  1763. // Bus Error
  1764. BUSERRbm = $04;
  1765. // Arbitration Lost
  1766. ARBLOSTbm = $08;
  1767. // Received Acknowledge
  1768. RXACKbm = $10;
  1769. // Clock Hold
  1770. CLKHOLDbm = $20;
  1771. // Write Interrupt Flag
  1772. WIFbm = $40;
  1773. // Read Interrupt Flag
  1774. RIFbm = $80;
  1775. // Address Recognition Mode
  1776. PMENbm = $04;
  1777. // Stop Interrupt Enable
  1778. PIENbm = $20;
  1779. // Address or Stop Interrupt Enable
  1780. APIENbm = $40;
  1781. // Data Interrupt Enable
  1782. DIENbm = $80;
  1783. // TWI_SCMD
  1784. SCMDmask = $03;
  1785. SCMD_NOACT = $00;
  1786. SCMD_COMPTRANS = $02;
  1787. SCMD_RESPONSE = $03;
  1788. // TWI_AP
  1789. APmask = $01;
  1790. AP_STOP = $00;
  1791. AP_ADR = $01;
  1792. // Read/Write Direction
  1793. DIRbm = $02;
  1794. // Collision
  1795. COLLbm = $08;
  1796. // Address or Stop Interrupt Flag
  1797. APIFbm = $40;
  1798. // Data Interrupt Flag
  1799. DIFbm = $80;
  1800. // Address Mask Enable
  1801. ADDRENbm = $01;
  1802. // Address Mask
  1803. ADDRMASK0bm = $02;
  1804. ADDRMASK1bm = $04;
  1805. ADDRMASK2bm = $08;
  1806. ADDRMASK3bm = $10;
  1807. ADDRMASK4bm = $20;
  1808. ADDRMASK5bm = $40;
  1809. ADDRMASK6bm = $80;
  1810. end;
  1811. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1812. RXDATAL: byte; //Receive Data Low Byte
  1813. RXDATAH: byte; //Receive Data High Byte
  1814. TXDATAL: byte; //Transmit Data Low Byte
  1815. TXDATAH: byte; //Transmit Data High Byte
  1816. STATUS: byte; //Status
  1817. CTRLA: byte; //Control A
  1818. CTRLB: byte; //Control B
  1819. CTRLC: byte; //Control C
  1820. BAUD: word; //Baud Rate
  1821. CTRLD: byte; //Control D
  1822. DBGCTRL: byte; //Debug Control
  1823. EVCTRL: byte; //Event Control
  1824. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1825. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1826. const
  1827. // Receiver Data Register
  1828. DATA8bm = $01;
  1829. // Parity Error
  1830. PERRbm = $02;
  1831. // Frame Error
  1832. FERRbm = $04;
  1833. // Buffer Overflow
  1834. BUFOVFbm = $40;
  1835. // Receive Complete Interrupt Flag
  1836. RXCIFbm = $80;
  1837. // Wait For Break
  1838. WFBbm = $01;
  1839. // Break Detected Flag
  1840. BDFbm = $02;
  1841. // Inconsistent Sync Field Interrupt Flag
  1842. ISFIFbm = $08;
  1843. // Receive Start Interrupt
  1844. RXSIFbm = $10;
  1845. // Data Register Empty Flag
  1846. DREIFbm = $20;
  1847. // Transmit Interrupt Flag
  1848. TXCIFbm = $40;
  1849. // USART_RS485
  1850. RS485mask = $01;
  1851. RS485_DISABLE = $00;
  1852. RS485_ENABLE = $01;
  1853. // Auto-baud Error Interrupt Enable
  1854. ABEIEbm = $04;
  1855. // Loop-back Mode Enable
  1856. LBMEbm = $08;
  1857. // Receiver Start Frame Interrupt Enable
  1858. RXSIEbm = $10;
  1859. // Data Register Empty Interrupt Enable
  1860. DREIEbm = $20;
  1861. // Transmit Complete Interrupt Enable
  1862. TXCIEbm = $40;
  1863. // Receive Complete Interrupt Enable
  1864. RXCIEbm = $80;
  1865. // Multi-processor Communication Mode
  1866. MPCMbm = $01;
  1867. // USART_RXMODE
  1868. RXMODEmask = $06;
  1869. RXMODE_NORMAL = $00;
  1870. RXMODE_CLK2X = $02;
  1871. RXMODE_GENAUTO = $04;
  1872. RXMODE_LINAUTO = $06;
  1873. // Open Drain Mode Enable
  1874. ODMEbm = $08;
  1875. // Start Frame Detection Enable
  1876. SFDENbm = $10;
  1877. // Transmitter Enable
  1878. TXENbm = $40;
  1879. // Reciever enable
  1880. RXENbm = $80;
  1881. // USART_ABW
  1882. ABWmask = $C0;
  1883. ABW_WDW0 = $00;
  1884. ABW_WDW1 = $40;
  1885. ABW_WDW2 = $80;
  1886. ABW_WDW3 = $C0;
  1887. // Debug Run
  1888. DBGRUNbm = $01;
  1889. // IrDA Event Input Enable
  1890. IREIbm = $01;
  1891. // Receiver Pulse Lenght
  1892. RXPL0bm = $01;
  1893. RXPL1bm = $02;
  1894. RXPL2bm = $04;
  1895. RXPL3bm = $08;
  1896. RXPL4bm = $10;
  1897. RXPL5bm = $20;
  1898. RXPL6bm = $40;
  1899. end;
  1900. TUSERROW = object //User Row
  1901. USERROW0: byte; //User Row Byte 0
  1902. USERROW1: byte; //User Row Byte 1
  1903. USERROW2: byte; //User Row Byte 2
  1904. USERROW3: byte; //User Row Byte 3
  1905. USERROW4: byte; //User Row Byte 4
  1906. USERROW5: byte; //User Row Byte 5
  1907. USERROW6: byte; //User Row Byte 6
  1908. USERROW7: byte; //User Row Byte 7
  1909. USERROW8: byte; //User Row Byte 8
  1910. USERROW9: byte; //User Row Byte 9
  1911. USERROW10: byte; //User Row Byte 10
  1912. USERROW11: byte; //User Row Byte 11
  1913. USERROW12: byte; //User Row Byte 12
  1914. USERROW13: byte; //User Row Byte 13
  1915. USERROW14: byte; //User Row Byte 14
  1916. USERROW15: byte; //User Row Byte 15
  1917. USERROW16: byte; //User Row Byte 16
  1918. USERROW17: byte; //User Row Byte 17
  1919. USERROW18: byte; //User Row Byte 18
  1920. USERROW19: byte; //User Row Byte 19
  1921. USERROW20: byte; //User Row Byte 20
  1922. USERROW21: byte; //User Row Byte 21
  1923. USERROW22: byte; //User Row Byte 22
  1924. USERROW23: byte; //User Row Byte 23
  1925. USERROW24: byte; //User Row Byte 24
  1926. USERROW25: byte; //User Row Byte 25
  1927. USERROW26: byte; //User Row Byte 26
  1928. USERROW27: byte; //User Row Byte 27
  1929. USERROW28: byte; //User Row Byte 28
  1930. USERROW29: byte; //User Row Byte 29
  1931. USERROW30: byte; //User Row Byte 30
  1932. USERROW31: byte; //User Row Byte 31
  1933. USERROW32: byte; //User Row Byte 32
  1934. USERROW33: byte; //User Row Byte 33
  1935. USERROW34: byte; //User Row Byte 34
  1936. USERROW35: byte; //User Row Byte 35
  1937. USERROW36: byte; //User Row Byte 36
  1938. USERROW37: byte; //User Row Byte 37
  1939. USERROW38: byte; //User Row Byte 38
  1940. USERROW39: byte; //User Row Byte 39
  1941. USERROW40: byte; //User Row Byte 40
  1942. USERROW41: byte; //User Row Byte 41
  1943. USERROW42: byte; //User Row Byte 42
  1944. USERROW43: byte; //User Row Byte 43
  1945. USERROW44: byte; //User Row Byte 44
  1946. USERROW45: byte; //User Row Byte 45
  1947. USERROW46: byte; //User Row Byte 46
  1948. USERROW47: byte; //User Row Byte 47
  1949. USERROW48: byte; //User Row Byte 48
  1950. USERROW49: byte; //User Row Byte 49
  1951. USERROW50: byte; //User Row Byte 50
  1952. USERROW51: byte; //User Row Byte 51
  1953. USERROW52: byte; //User Row Byte 52
  1954. USERROW53: byte; //User Row Byte 53
  1955. USERROW54: byte; //User Row Byte 54
  1956. USERROW55: byte; //User Row Byte 55
  1957. USERROW56: byte; //User Row Byte 56
  1958. USERROW57: byte; //User Row Byte 57
  1959. USERROW58: byte; //User Row Byte 58
  1960. USERROW59: byte; //User Row Byte 59
  1961. USERROW60: byte; //User Row Byte 60
  1962. USERROW61: byte; //User Row Byte 61
  1963. USERROW62: byte; //User Row Byte 62
  1964. USERROW63: byte; //User Row Byte 63
  1965. end;
  1966. TVPORT = object //Virtual Ports
  1967. DIR: byte; //Data Direction
  1968. OUT_: byte; //Output Value
  1969. IN_: byte; //Input Value
  1970. INTFLAGS: byte; //Interrupt Flags
  1971. end;
  1972. TVREF = object //Voltage reference
  1973. Reserved0: byte;
  1974. Reserved1: byte;
  1975. DAC0REF: byte; //DAC0 Reference
  1976. Reserved3: byte;
  1977. ACREF: byte; //AC Reference
  1978. const
  1979. // VREF_REFSEL
  1980. REFSELmask = $07;
  1981. REFSEL_1V024 = $00;
  1982. REFSEL_2V048 = $01;
  1983. REFSEL_4V096 = $02;
  1984. REFSEL_2V500 = $03;
  1985. REFSEL_VDD = $05;
  1986. REFSEL_VREFA = $06;
  1987. // Always on
  1988. ALWAYSONbm = $80;
  1989. end;
  1990. TWDT = object //Watch-Dog Timer
  1991. CTRLA: byte; //Control A
  1992. STATUS: byte; //Status
  1993. const
  1994. // WDT_PERIOD
  1995. PERIODmask = $0F;
  1996. PERIOD_OFF = $00;
  1997. PERIOD_8CLK = $01;
  1998. PERIOD_16CLK = $02;
  1999. PERIOD_32CLK = $03;
  2000. PERIOD_64CLK = $04;
  2001. PERIOD_128CLK = $05;
  2002. PERIOD_256CLK = $06;
  2003. PERIOD_512CLK = $07;
  2004. PERIOD_1KCLK = $08;
  2005. PERIOD_2KCLK = $09;
  2006. PERIOD_4KCLK = $0A;
  2007. PERIOD_8KCLK = $0B;
  2008. // WDT_WINDOW
  2009. WINDOWmask = $F0;
  2010. WINDOW_OFF = $00;
  2011. WINDOW_8CLK = $10;
  2012. WINDOW_16CLK = $20;
  2013. WINDOW_32CLK = $30;
  2014. WINDOW_64CLK = $40;
  2015. WINDOW_128CLK = $50;
  2016. WINDOW_256CLK = $60;
  2017. WINDOW_512CLK = $70;
  2018. WINDOW_1KCLK = $80;
  2019. WINDOW_2KCLK = $90;
  2020. WINDOW_4KCLK = $A0;
  2021. WINDOW_8KCLK = $B0;
  2022. // Syncronization busy
  2023. SYNCBUSYbm = $01;
  2024. // Lock enable
  2025. LOCKbm = $80;
  2026. end;
  2027. TWEX = object //Waveform Extension
  2028. CTRLA: byte; //Control A
  2029. CTRLB: byte; //Control B
  2030. CTRLC: byte; //Control C
  2031. Reserved3: byte;
  2032. EVCTRLA: byte; //Event Control A
  2033. EVCTRLB: byte; //Event Control B
  2034. EVCTRLC: byte; //Event Control C
  2035. BUFCTRL: byte; //Buffer Valid Control
  2036. BLANKCTRL: byte; //Blanking Control
  2037. BLANKTIME: byte; //Blanking Time
  2038. FAULTCTRL: byte; //Fault Control
  2039. FAULTDRV: byte; //Fault Drive
  2040. FAULTOUT: byte; //Fault Output
  2041. INTCTRL: byte; //Interrupt Control
  2042. INTFLAGS: byte; //Interrupt Flags
  2043. STATUS: byte; //Status
  2044. DTLS: byte; //Dead-time Low Side
  2045. DTHS: byte; //Dead-time High Side
  2046. DTBOTH: byte; //Dead-time Both Sides
  2047. SWAP: byte; //DTI Swap
  2048. PGMOVR: byte; //Pattern Generation Override
  2049. PGMOUT: byte; //Pattern Generation Output
  2050. Reserved22: byte;
  2051. OUTOVEN: byte; //Output Override Enable
  2052. DTLSBUF: byte; //Dead-time Low Side Buffer
  2053. DTHSBUF: byte; //Dead-time High Side Buffer
  2054. DTBOTHBUF: byte; //Dead-time Both Sides Buffer
  2055. SWAPBUF: byte; //DTI Swap Buffer
  2056. PGMOVRBUF: byte; //Pattern Generation Override Buffer
  2057. PGMOUTBUF: byte; //Pattern Generation Output Buffer
  2058. const
  2059. // Dead-Time Insertion CMP0 Enable
  2060. DTI0ENbm = $01;
  2061. // Dead-Time Insertion CMP1 Enable
  2062. DTI1ENbm = $02;
  2063. // Dead-Time Insertion CMP2 Enable
  2064. DTI2ENbm = $04;
  2065. // Dead-Time Insertion CMP3 Enable
  2066. DTI3ENbm = $08;
  2067. // WEX_INMX
  2068. INMXmask = $70;
  2069. INMX_DIRECT = $00;
  2070. INMX_CWCMA = $20;
  2071. INMX_CWCMB = $30;
  2072. // Pattern Generation Mode
  2073. PGMbm = $80;
  2074. // WEX_UPDSRC
  2075. UPDSRCmask = $03;
  2076. UPDSRC_TCPWM0 = $00;
  2077. UPDSRC_SW = $03;
  2078. // WEX_CMD
  2079. CMDmask = $07;
  2080. CMD_NONE = $00;
  2081. CMD_UPDATE = $01;
  2082. CMD_FAULTSET = $02;
  2083. CMD_FAULTCLR = $03;
  2084. CMD_BLANKSET = $04;
  2085. CMD_BLANKCLR = $05;
  2086. // Fault Event Input Enable
  2087. FAULTEIbm = $01;
  2088. // Fault Event Blanking Enable
  2089. BLANKbm = $02;
  2090. // WEX_FILTER
  2091. FILTERmask = $1C;
  2092. FILTER_ZERO = $00;
  2093. FILTER_SAMPLE1 = $04;
  2094. FILTER_SAMPLE2 = $08;
  2095. FILTER_SAMPLE3 = $0C;
  2096. FILTER_SAMPLE4 = $10;
  2097. FILTER_SAMPLE5 = $14;
  2098. FILTER_SAMPLE6 = $18;
  2099. FILTER_SAMPLE7 = $1C;
  2100. // Dead-time Low Side Buffer Valid
  2101. DTLSBVbm = $01;
  2102. // Dead-time High Side Buffer Valid
  2103. DTHSBVbm = $02;
  2104. // Swap Buffer Valid
  2105. SWAPBVbm = $04;
  2106. // PGM Override Buffer Valid
  2107. PGMOVRBVbm = $08;
  2108. // PGM Output Value Buffer Valid
  2109. PGMOUTBVbm = $10;
  2110. // WEX_BLANKTRIG
  2111. BLANKTRIGmask = $1F;
  2112. BLANKTRIG_NONE = $00;
  2113. BLANKTRIG_TCE0UPD = $04;
  2114. BLANKTRIG_TCE0CMP0 = $08;
  2115. BLANKTRIG_TCE0CMP1 = $0C;
  2116. BLANKTRIG_TCE0CMP2 = $10;
  2117. BLANKTRIG_TCE0CMP3 = $14;
  2118. // WEX_BLANKPRESC
  2119. BLANKPRESCmask = $60;
  2120. BLANKPRESC_DIV1 = $00;
  2121. BLANKPRESC_DIV4 = $20;
  2122. BLANKPRESC_DIV16 = $40;
  2123. BLANKPRESC_DIV64 = $60;
  2124. // WEX_FDACT
  2125. FDACTmask = $03;
  2126. FDACT_NONE = $00;
  2127. FDACT_LOW = $01;
  2128. FDACT_CUSTOM = $03;
  2129. // WEX_FDMODE
  2130. FDMODEmask = $04;
  2131. FDMODE_LATCHED = $00;
  2132. FDMODE_CBC = $04;
  2133. // WEX_FDDBD
  2134. FDDBDmask = $80;
  2135. FDDBD_FAULT = $00;
  2136. FDDBD_IGNORE = $80;
  2137. // Fault Drive Enable Bit 0
  2138. FAULTDRV0bm = $01;
  2139. // Fault Drive Enable Bit 1
  2140. FAULTDRV1bm = $02;
  2141. // Fault Drive Enable Bit 2
  2142. FAULTDRV2bm = $04;
  2143. // Fault Drive Enable Bit 3
  2144. FAULTDRV3bm = $08;
  2145. // Fault Drive Enable Bit 4
  2146. FAULTDRV4bm = $10;
  2147. // Fault Drive Enable Bit 5
  2148. FAULTDRV5bm = $20;
  2149. // Fault Drive Enable Bit 6
  2150. FAULTDRV6bm = $40;
  2151. // Fault Drive Enable Bit 7
  2152. FAULTDRV7bm = $80;
  2153. // Fault Output Value Bit 0
  2154. FAULTOUT0bm = $01;
  2155. // Fault Output Value Bit 1
  2156. FAULTOUT1bm = $02;
  2157. // Fault Output Value Bit 2
  2158. FAULTOUT2bm = $04;
  2159. // Fault Output Value Bit 3
  2160. FAULTOUT3bm = $08;
  2161. // Fault Output Value Bit 4
  2162. FAULTOUT4bm = $10;
  2163. // Fault Output Value Bit 5
  2164. FAULTOUT5bm = $20;
  2165. // Fault Output Value Bit 6
  2166. FAULTOUT6bm = $40;
  2167. // Fault Output Value Bit 7
  2168. FAULTOUT7bm = $80;
  2169. // Fault Detection Interrupt Enable
  2170. FAULTDETbm = $01;
  2171. // Fault Detection Flag Event Input A
  2172. FDFEVAbm = $04;
  2173. // Fault Detection Flag Event Input B
  2174. FDFEVBbm = $08;
  2175. // Fault Detection Flag Event Input C
  2176. FDFEVCbm = $10;
  2177. // WEX_FDSTATE
  2178. FDSTATEmask = $01;
  2179. FDSTATE_NORMAL = $00;
  2180. FDSTATE_FAULT = $01;
  2181. // Fault Detection State Event A
  2182. FDSEVAbm = $04;
  2183. // Fault Detection State Event B
  2184. FDSEVBbm = $08;
  2185. // Fault Detection State Event C
  2186. FDSEVCbm = $10;
  2187. // WEX_BLANKSTATE
  2188. BLANKSTATEmask = $80;
  2189. BLANKSTATE_OFF = $00;
  2190. BLANKSTATE_ON = $80;
  2191. // Swap DTI Output Pair 0
  2192. SWAP0bm = $01;
  2193. // Swap DTI Output Pair 1
  2194. SWAP1bm = $02;
  2195. // Swap DTI Output Pair 2
  2196. SWAP2bm = $04;
  2197. // Swap DTI Output Pair 3
  2198. SWAP3bm = $08;
  2199. // Pattern Generation Override Enable Bit 0
  2200. PGMOVR0bm = $01;
  2201. // Pattern Generation Override Enable Bit 1
  2202. PGMOVR1bm = $02;
  2203. // Pattern Generation Override Enable Bit 2
  2204. PGMOVR2bm = $04;
  2205. // Pattern Generation Override Enable Bit 3
  2206. PGMOVR3bm = $08;
  2207. // Pattern Generation Override Enable Bit 4
  2208. PGMOVR4bm = $10;
  2209. // Pattern Generation Override Enable Bit 5
  2210. PGMOVR5bm = $20;
  2211. // Pattern Generation Override Enable Bit 6
  2212. PGMOVR6bm = $40;
  2213. // Pattern Generation Override Enable Bit 7
  2214. PGMOVR7bm = $80;
  2215. // Pattern Generation Output Value Bit 0
  2216. PGMOUT0bm = $01;
  2217. // Pattern Generation Output Value Bit 1
  2218. PGMOUT1bm = $02;
  2219. // Pattern Generation Output Value Bit 2
  2220. PGMOUT2bm = $04;
  2221. // Pattern Generation Output Value Bit 3
  2222. PGMOUT3bm = $08;
  2223. // Pattern Generation Output Value Bit 4
  2224. PGMOUT4bm = $10;
  2225. // Pattern Generation Output Value Bit 5
  2226. PGMOUT5bm = $20;
  2227. // Pattern Generation Output Value Bit 6
  2228. PGMOUT6bm = $40;
  2229. // Pattern Generation Output Value Bit 7
  2230. PGMOUT7bm = $80;
  2231. // Output Override Enable Bit 0
  2232. OUTOVEN0bm = $01;
  2233. // Output Override Enable Bit 1
  2234. OUTOVEN1bm = $02;
  2235. // Output Override Enable Bit 2
  2236. OUTOVEN2bm = $04;
  2237. // Output Override Enable Bit 3
  2238. OUTOVEN3bm = $08;
  2239. // Output Override Enable Bit 4
  2240. OUTOVEN4bm = $10;
  2241. // Output Override Enable Bit 5
  2242. OUTOVEN5bm = $20;
  2243. // Output Override Enable Bit 6
  2244. OUTOVEN6bm = $40;
  2245. // Output Override Enable Bit 7
  2246. OUTOVEN7bm = $80;
  2247. // Swap DTI Output Pair 0 Buffer
  2248. SWAPBUF0bm = $01;
  2249. // Swap DTI Output Pair 1 Buffer
  2250. SWAPBUF1bm = $02;
  2251. // Swap DTI Output Pair 2 Buffer
  2252. SWAPBUF2bm = $04;
  2253. // Swap DTI Output Pair 3 Buffer
  2254. SWAPBUF3bm = $08;
  2255. // Pattern Generation Override Enable Buffer Bit 0
  2256. PGMOVRBUF0bm = $01;
  2257. // Pattern Generation Override Enable Buffer Bit 1
  2258. PGMOVRBUF1bm = $02;
  2259. // Pattern Generation Override Enable Buffer Bit 2
  2260. PGMOVRBUF2bm = $04;
  2261. // Pattern Generation Override Enable Buffer Bit 3
  2262. PGMOVRBUF3bm = $08;
  2263. // Pattern Generation Override Enable Buffer Bit 4
  2264. PGMOVRBUF4bm = $10;
  2265. // Pattern Generation Override Enable Buffer Bit 5
  2266. PGMOVRBUF5bm = $20;
  2267. // Pattern Generation Override Enable Buffer Bit 6
  2268. PGMOVRBUF6bm = $40;
  2269. // Pattern Generation Override Enable Buffer Bit 7
  2270. PGMOVRBUF7bm = $80;
  2271. // Pattern Generation Output Value Buffer Bit 0
  2272. PGMOUTBUF0bm = $01;
  2273. // Pattern Generation Output Value Buffer Bit 1
  2274. PGMOUTBUF1bm = $02;
  2275. // Pattern Generation Output Value Buffer Bit 2
  2276. PGMOUTBUF2bm = $04;
  2277. // Pattern Generation Output Value Buffer Bit 3
  2278. PGMOUTBUF3bm = $08;
  2279. // Pattern Generation Output Value Buffer Bit 4
  2280. PGMOUTBUF4bm = $10;
  2281. // Pattern Generation Output Value Buffer Bit 5
  2282. PGMOUTBUF5bm = $20;
  2283. // Pattern Generation Output Value Buffer Bit 6
  2284. PGMOUTBUF6bm = $40;
  2285. // Pattern Generation Output Value Buffer Bit 7
  2286. PGMOUTBUF7bm = $80;
  2287. end;
  2288. const
  2289. Pin0idx = 0; Pin0bm = 1;
  2290. Pin1idx = 1; Pin1bm = 2;
  2291. Pin2idx = 2; Pin2bm = 4;
  2292. Pin3idx = 3; Pin3bm = 8;
  2293. Pin4idx = 4; Pin4bm = 16;
  2294. Pin5idx = 5; Pin5bm = 32;
  2295. Pin6idx = 6; Pin6bm = 64;
  2296. Pin7idx = 7; Pin7bm = 128;
  2297. var
  2298. VPORTA: TVPORT absolute $0000;
  2299. VPORTC: TVPORT absolute $0008;
  2300. VPORTD: TVPORT absolute $000C;
  2301. VPORTF: TVPORT absolute $0014;
  2302. GPR: TGPR absolute $001C;
  2303. CPU: TCPU absolute $0030;
  2304. RSTCTRL: TRSTCTRL absolute $0040;
  2305. SLPCTRL: TSLPCTRL absolute $0050;
  2306. CLKCTRL: TCLKCTRL absolute $0060;
  2307. BOD: TBOD absolute $00A0;
  2308. VREF: TVREF absolute $00B0;
  2309. WDT: TWDT absolute $0100;
  2310. CPUINT: TCPUINT absolute $0110;
  2311. CRCSCAN: TCRCSCAN absolute $0120;
  2312. RTC: TRTC absolute $0140;
  2313. CCL: TCCL absolute $01C0;
  2314. EVSYS: TEVSYS absolute $0200;
  2315. PORTA: TPORT absolute $0400;
  2316. PORTC: TPORT absolute $0440;
  2317. PORTD: TPORT absolute $0460;
  2318. PORTF: TPORT absolute $04A0;
  2319. PORTMUX: TPORTMUX absolute $05E0;
  2320. ADC0: TADC absolute $0600;
  2321. AC0: TAC absolute $0680;
  2322. AC1: TAC absolute $0688;
  2323. USART0: TUSART absolute $0800;
  2324. TWI0: TTWI absolute $0900;
  2325. SPI0: TSPI absolute $0940;
  2326. TCE0: TTCE absolute $0A00;
  2327. TCB0: TTCB absolute $0B00;
  2328. TCB1: TTCB absolute $0B10;
  2329. TCF0: TTCF absolute $0C00;
  2330. WEX0: TWEX absolute $0C80;
  2331. SYSCFG: TSYSCFG absolute $0F00;
  2332. NVMCTRL: TNVMCTRL absolute $1000;
  2333. LOCK: TLOCK absolute $1040;
  2334. FUSE: TFUSE absolute $1050;
  2335. SIGROW: TSIGROW absolute $1080;
  2336. BOOTROW: TBOOTROW absolute $1100;
  2337. USERROW: TUSERROW absolute $1200;
  2338. implementation
  2339. {$i avrcommon.inc}
  2340. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  2341. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  2342. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 3
  2343. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 4
  2344. procedure CCL_CCL_ISR; external name 'CCL_CCL_ISR'; // Interrupt 5
  2345. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 6
  2346. procedure WEX0_FAULTDET_ISR; external name 'WEX0_FAULTDET_ISR'; // Interrupt 7
  2347. //procedure WEX0_FDFEVA_ISR; external name 'WEX0_FDFEVA_ISR'; // Interrupt 7
  2348. //procedure WEX0_FDFEVB_ISR; external name 'WEX0_FDFEVB_ISR'; // Interrupt 7
  2349. //procedure WEX0_FDFEVC_ISR; external name 'WEX0_FDFEVC_ISR'; // Interrupt 7
  2350. procedure TCE0_OVF_ISR; external name 'TCE0_OVF_ISR'; // Interrupt 8
  2351. procedure TCE0_CMP0_ISR; external name 'TCE0_CMP0_ISR'; // Interrupt 9
  2352. procedure TCE0_CMP1_ISR; external name 'TCE0_CMP1_ISR'; // Interrupt 10
  2353. procedure TCE0_CMP2_ISR; external name 'TCE0_CMP2_ISR'; // Interrupt 11
  2354. procedure TCE0_CMP3_ISR; external name 'TCE0_CMP3_ISR'; // Interrupt 12
  2355. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 13
  2356. procedure TCB1_INT_ISR; external name 'TCB1_INT_ISR'; // Interrupt 14
  2357. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 15
  2358. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 16
  2359. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 17
  2360. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 18
  2361. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 19
  2362. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 20
  2363. procedure PORTD_PORT_ISR; external name 'PORTD_PORT_ISR'; // Interrupt 21
  2364. procedure TCF0_INT_ISR; external name 'TCF0_INT_ISR'; // Interrupt 22
  2365. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 23
  2366. procedure ADC0_ERROR_ISR; external name 'ADC0_ERROR_ISR'; // Interrupt 24
  2367. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 25
  2368. procedure ADC0_SAMPRDY_ISR; external name 'ADC0_SAMPRDY_ISR'; // Interrupt 26
  2369. procedure AC1_AC_ISR; external name 'AC1_AC_ISR'; // Interrupt 27
  2370. procedure PORTC_PORT_ISR; external name 'PORTC_PORT_ISR'; // Interrupt 28
  2371. procedure PORTF_PORT_ISR; external name 'PORTF_PORT_ISR'; // Interrupt 29
  2372. procedure NVMCTRL_EEREADY_ISR; external name 'NVMCTRL_EEREADY_ISR'; // Interrupt 30
  2373. //procedure NVMCTRL_FLREADY_ISR; external name 'NVMCTRL_FLREADY_ISR'; // Interrupt 30
  2374. //procedure NVMCTRL_NVMREADY_ISR; external name 'NVMCTRL_NVMREADY_ISR'; // Interrupt 30
  2375. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  2376. asm
  2377. jmp __dtors_end
  2378. jmp CRCSCAN_NMI_ISR
  2379. jmp BOD_VLM_ISR
  2380. jmp RTC_CNT_ISR
  2381. jmp RTC_PIT_ISR
  2382. jmp CCL_CCL_ISR
  2383. jmp PORTA_PORT_ISR
  2384. jmp WEX0_FAULTDET_ISR
  2385. // jmp WEX0_FDFEVA_ISR
  2386. // jmp WEX0_FDFEVB_ISR
  2387. // jmp WEX0_FDFEVC_ISR
  2388. jmp TCE0_OVF_ISR
  2389. jmp TCE0_CMP0_ISR
  2390. jmp TCE0_CMP1_ISR
  2391. jmp TCE0_CMP2_ISR
  2392. jmp TCE0_CMP3_ISR
  2393. jmp TCB0_INT_ISR
  2394. jmp TCB1_INT_ISR
  2395. jmp TWI0_TWIS_ISR
  2396. jmp TWI0_TWIM_ISR
  2397. jmp SPI0_INT_ISR
  2398. jmp USART0_RXC_ISR
  2399. jmp USART0_DRE_ISR
  2400. jmp USART0_TXC_ISR
  2401. jmp PORTD_PORT_ISR
  2402. jmp TCF0_INT_ISR
  2403. jmp AC0_AC_ISR
  2404. jmp ADC0_ERROR_ISR
  2405. jmp ADC0_RESRDY_ISR
  2406. jmp ADC0_SAMPRDY_ISR
  2407. jmp AC1_AC_ISR
  2408. jmp PORTC_PORT_ISR
  2409. jmp PORTF_PORT_ISR
  2410. jmp NVMCTRL_EEREADY_ISR
  2411. // jmp NVMCTRL_FLREADY_ISR
  2412. // jmp NVMCTRL_NVMREADY_ISR
  2413. .weak CRCSCAN_NMI_ISR
  2414. .weak BOD_VLM_ISR
  2415. .weak RTC_CNT_ISR
  2416. .weak RTC_PIT_ISR
  2417. .weak CCL_CCL_ISR
  2418. .weak PORTA_PORT_ISR
  2419. .weak WEX0_FAULTDET_ISR
  2420. // .weak WEX0_FDFEVA_ISR
  2421. // .weak WEX0_FDFEVB_ISR
  2422. // .weak WEX0_FDFEVC_ISR
  2423. .weak TCE0_OVF_ISR
  2424. .weak TCE0_CMP0_ISR
  2425. .weak TCE0_CMP1_ISR
  2426. .weak TCE0_CMP2_ISR
  2427. .weak TCE0_CMP3_ISR
  2428. .weak TCB0_INT_ISR
  2429. .weak TCB1_INT_ISR
  2430. .weak TWI0_TWIS_ISR
  2431. .weak TWI0_TWIM_ISR
  2432. .weak SPI0_INT_ISR
  2433. .weak USART0_RXC_ISR
  2434. .weak USART0_DRE_ISR
  2435. .weak USART0_TXC_ISR
  2436. .weak PORTD_PORT_ISR
  2437. .weak TCF0_INT_ISR
  2438. .weak AC0_AC_ISR
  2439. .weak ADC0_ERROR_ISR
  2440. .weak ADC0_RESRDY_ISR
  2441. .weak ADC0_SAMPRDY_ISR
  2442. .weak AC1_AC_ISR
  2443. .weak PORTC_PORT_ISR
  2444. .weak PORTF_PORT_ISR
  2445. .weak NVMCTRL_EEREADY_ISR
  2446. // .weak NVMCTRL_FLREADY_ISR
  2447. // .weak NVMCTRL_NVMREADY_ISR
  2448. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  2449. .set BOD_VLM_ISR, Default_IRQ_handler
  2450. .set RTC_CNT_ISR, Default_IRQ_handler
  2451. .set RTC_PIT_ISR, Default_IRQ_handler
  2452. .set CCL_CCL_ISR, Default_IRQ_handler
  2453. .set PORTA_PORT_ISR, Default_IRQ_handler
  2454. .set WEX0_FAULTDET_ISR, Default_IRQ_handler
  2455. // .set WEX0_FDFEVA_ISR, Default_IRQ_handler
  2456. // .set WEX0_FDFEVB_ISR, Default_IRQ_handler
  2457. // .set WEX0_FDFEVC_ISR, Default_IRQ_handler
  2458. .set TCE0_OVF_ISR, Default_IRQ_handler
  2459. .set TCE0_CMP0_ISR, Default_IRQ_handler
  2460. .set TCE0_CMP1_ISR, Default_IRQ_handler
  2461. .set TCE0_CMP2_ISR, Default_IRQ_handler
  2462. .set TCE0_CMP3_ISR, Default_IRQ_handler
  2463. .set TCB0_INT_ISR, Default_IRQ_handler
  2464. .set TCB1_INT_ISR, Default_IRQ_handler
  2465. .set TWI0_TWIS_ISR, Default_IRQ_handler
  2466. .set TWI0_TWIM_ISR, Default_IRQ_handler
  2467. .set SPI0_INT_ISR, Default_IRQ_handler
  2468. .set USART0_RXC_ISR, Default_IRQ_handler
  2469. .set USART0_DRE_ISR, Default_IRQ_handler
  2470. .set USART0_TXC_ISR, Default_IRQ_handler
  2471. .set PORTD_PORT_ISR, Default_IRQ_handler
  2472. .set TCF0_INT_ISR, Default_IRQ_handler
  2473. .set AC0_AC_ISR, Default_IRQ_handler
  2474. .set ADC0_ERROR_ISR, Default_IRQ_handler
  2475. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  2476. .set ADC0_SAMPRDY_ISR, Default_IRQ_handler
  2477. .set AC1_AC_ISR, Default_IRQ_handler
  2478. .set PORTC_PORT_ISR, Default_IRQ_handler
  2479. .set PORTF_PORT_ISR, Default_IRQ_handler
  2480. .set NVMCTRL_EEREADY_ISR, Default_IRQ_handler
  2481. // .set NVMCTRL_FLREADY_ISR, Default_IRQ_handler
  2482. // .set NVMCTRL_NVMREADY_ISR, Default_IRQ_handler
  2483. end;
  2484. end.