avr32eb32.pp 67 KB

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  1. unit AVR32EB32;
  2. interface
  3. type
  4. TAC = object //Analog Comparator
  5. CTRLA: byte; //Control A
  6. CTRLB: byte; //Control B
  7. MUXCTRL: byte; //Mux Control A
  8. Reserved3: byte;
  9. Reserved4: byte;
  10. DACREF: byte; //DAC Voltage Reference
  11. INTCTRL: byte; //Interrupt Control
  12. STATUS: byte; //Status
  13. const
  14. // Enable
  15. ENABLEbm = $01;
  16. // AC_HYSMODE
  17. HYSMODEmask = $06;
  18. HYSMODE_NONE = $00;
  19. HYSMODE_SMALL = $02;
  20. HYSMODE_MEDIUM = $04;
  21. HYSMODE_LARGE = $06;
  22. // AC_POWER
  23. POWERmask = $18;
  24. POWER_PROFILE0 = $00;
  25. POWER_PROFILE1 = $08;
  26. // Output Pad Enable
  27. OUTENbm = $40;
  28. // Run in Standby Mode
  29. RUNSTDBYbm = $80;
  30. // AC_WINSEL
  31. WINSELmask = $03;
  32. WINSEL_DISABLED = $00;
  33. WINSEL_UPSEL1 = $01;
  34. // AC_MUXNEG
  35. MUXNEGmask = $07;
  36. MUXNEG_AINN0 = $00;
  37. MUXNEG_AINN1 = $01;
  38. MUXNEG_AINN2 = $02;
  39. MUXNEG_AINN3 = $03;
  40. MUXNEG_DACREF = $04;
  41. // AC_MUXPOS
  42. MUXPOSmask = $38;
  43. MUXPOS_AINP0 = $00;
  44. MUXPOS_AINP1 = $08;
  45. MUXPOS_AINP2 = $10;
  46. MUXPOS_AINP3 = $18;
  47. MUXPOS_AINP4 = $20;
  48. MUXPOS_AINP5 = $28;
  49. MUXPOS_AINP6 = $30;
  50. // AC_INITVAL
  51. INITVALmask = $40;
  52. INITVAL_LOW = $00;
  53. INITVAL_HIGH = $40;
  54. // Invert AC Output
  55. INVERTbm = $80;
  56. // Analog Comparator Interrupt Flag
  57. CMPIFbm = $01;
  58. // Analog Comparator State
  59. CMPSTATEbm = $10;
  60. // AC_WINSTATE
  61. WINSTATEmask = $C0;
  62. WINSTATE_ABOVE = $00;
  63. WINSTATE_INSIDE = $40;
  64. WINSTATE_BELOW = $80;
  65. end;
  66. TADC = object //Analog to Digital Converter
  67. CTRLA: byte; //Control A
  68. CTRLB: byte; //Control B
  69. CTRLC: byte; //Control C
  70. CTRLD: byte; //Control D
  71. INTCTRL: byte; //Interrupt Control
  72. INTFLAGS: byte; //Interrupt Flags
  73. STATUS: byte; //Status register
  74. DBGCTRL: byte; //Debug Control
  75. CTRLE: byte; //Control E
  76. CTRLF: byte; //Control F
  77. COMMAND: byte; //Command register
  78. PGACTRL: byte; //PGA Control
  79. MUXPOS: byte; //Positive Input Multiplexer
  80. MUXNEG: byte; //Negative Input Multiplexer
  81. Reserved14: byte;
  82. Reserved15: byte;
  83. RESULT: dword; //Result
  84. SAMPLE: word; //Sample
  85. Reserved22: byte;
  86. Reserved23: byte;
  87. TEMP0: byte; //Temporary Data 0
  88. TEMP1: byte; //Temporary Data 1
  89. TEMP2: byte; //Temporary Data 2
  90. Reserved27: byte;
  91. WINLT: word; //Window Low Threshold
  92. WINHT: word; //Window High Threshold
  93. const
  94. // ADC Enable
  95. ENABLEbm = $01;
  96. // Low Latency
  97. LOWLATbm = $20;
  98. // Run in Standby
  99. RUNSTDBYbm = $80;
  100. // ADC_PRESC
  101. PRESCmask = $0F;
  102. PRESC_DIV2 = $00;
  103. PRESC_DIV4 = $01;
  104. PRESC_DIV6 = $02;
  105. PRESC_DIV8 = $03;
  106. PRESC_DIV10 = $04;
  107. PRESC_DIV12 = $05;
  108. PRESC_DIV14 = $06;
  109. PRESC_DIV16 = $07;
  110. PRESC_DIV20 = $08;
  111. PRESC_DIV24 = $09;
  112. PRESC_DIV28 = $0A;
  113. PRESC_DIV32 = $0B;
  114. PRESC_DIV40 = $0C;
  115. PRESC_DIV48 = $0D;
  116. PRESC_DIV56 = $0E;
  117. PRESC_DIV64 = $0F;
  118. // ADC_REFSEL
  119. REFSELmask = $07;
  120. REFSEL_VDD = $00;
  121. REFSEL_VREFA = $02;
  122. REFSEL_1V024 = $04;
  123. REFSEL_2V048 = $05;
  124. REFSEL_4V096 = $06;
  125. REFSEL_2V500 = $07;
  126. // ADC_WINCM
  127. WINCMmask = $07;
  128. WINCM_NONE = $00;
  129. WINCM_BELOW = $01;
  130. WINCM_ABOVE = $02;
  131. WINCM_INSIDE = $03;
  132. WINCM_OUTSIDE = $04;
  133. // ADC_WINSRC
  134. WINSRCmask = $08;
  135. WINSRC_RESULT = $00;
  136. WINSRC_SAMPLE = $08;
  137. // Result Ready Interrupt Enable
  138. RESRDYbm = $01;
  139. // Sample Ready Interrupt Enable
  140. SAMPRDYbm = $02;
  141. // Window Comparator Interrupt Enable
  142. WCMPbm = $04;
  143. // Result Overwrite Interrupt Enable
  144. RESOVRbm = $08;
  145. // Sample Overwrite Interrupt Enable
  146. SAMPOVRbm = $10;
  147. // Trigger Overrun Interrupt Enable
  148. TRIGOVRbm = $20;
  149. // ADC Busy
  150. ADCBUSYbm = $01;
  151. // Run in Debug Mode
  152. DBGRUNbm = $01;
  153. // ADC_SAMPNUM
  154. SAMPNUMmask = $0F;
  155. SAMPNUM_NONE = $00;
  156. SAMPNUM_ACC2 = $01;
  157. SAMPNUM_ACC4 = $02;
  158. SAMPNUM_ACC8 = $03;
  159. SAMPNUM_ACC16 = $04;
  160. SAMPNUM_ACC32 = $05;
  161. SAMPNUM_ACC64 = $06;
  162. SAMPNUM_ACC128 = $07;
  163. SAMPNUM_ACC256 = $08;
  164. SAMPNUM_ACC512 = $09;
  165. SAMPNUM_ACC1024 = $0A;
  166. // Left Adjust
  167. LEFTADJbm = $10;
  168. // Free-Running mode
  169. FREERUNbm = $20;
  170. // ADC_CHOPPING
  171. CHOPPINGmask = $40;
  172. CHOPPING_DISABLE = $00;
  173. CHOPPING_ENABLE = $40;
  174. // ADC_START
  175. STARTmask = $07;
  176. START_STOP = $00;
  177. START_IMMEDIATE = $01;
  178. START_MUXPOS_WRITE = $02;
  179. START_MUXNEG_WRITE = $03;
  180. START_EVENT_TRIGGER = $04;
  181. // ADC_MODE
  182. MODEmask = $70;
  183. MODE_SINGLE_8BIT = $00;
  184. MODE_SINGLE_12BIT = $10;
  185. MODE_SERIES = $20;
  186. MODE_SERIES_SCALING = $30;
  187. MODE_BURST = $40;
  188. MODE_BURST_SCALING = $50;
  189. // Differential mode
  190. DIFFbm = $80;
  191. // PGA Enable
  192. PGAENbm = $01;
  193. // ADC_PGABIASSEL
  194. PGABIASSELmask = $18;
  195. PGABIASSEL_100PCT = $00;
  196. PGABIASSEL_75PCT = $08;
  197. PGABIASSEL_50PCT = $10;
  198. PGABIASSEL_25PCT = $18;
  199. // ADC_GAIN
  200. GAINmask = $E0;
  201. GAIN_1X = $00;
  202. GAIN_2X = $20;
  203. GAIN_4X = $40;
  204. GAIN_8X = $60;
  205. GAIN_16X = $80;
  206. // ADC_MUXPOS
  207. MUXPOSmask = $3F;
  208. MUXPOS_AIN0 = $00;
  209. MUXPOS_AIN1 = $01;
  210. MUXPOS_AIN2 = $02;
  211. MUXPOS_AIN3 = $03;
  212. MUXPOS_AIN4 = $04;
  213. MUXPOS_AIN5 = $05;
  214. MUXPOS_AIN6 = $06;
  215. MUXPOS_AIN7 = $07;
  216. MUXPOS_AIN16 = $10;
  217. MUXPOS_AIN17 = $11;
  218. MUXPOS_AIN18 = $12;
  219. MUXPOS_AIN19 = $13;
  220. MUXPOS_AIN20 = $14;
  221. MUXPOS_AIN21 = $15;
  222. MUXPOS_AIN22 = $16;
  223. MUXPOS_AIN23 = $17;
  224. MUXPOS_AIN24 = $18;
  225. MUXPOS_AIN25 = $19;
  226. MUXPOS_AIN26 = $1A;
  227. MUXPOS_AIN27 = $1B;
  228. MUXPOS_AIN28 = $1C;
  229. MUXPOS_AIN29 = $1D;
  230. MUXPOS_AIN30 = $1E;
  231. MUXPOS_AIN31 = $1F;
  232. MUXPOS_GND = $30;
  233. MUXPOS_VDD10 = $31;
  234. MUXPOS_TEMPSENSE = $32;
  235. // ADC_VIA
  236. VIAmask = $C0;
  237. VIA_DIRECT = $00;
  238. VIA_PGA = $40;
  239. // ADC_MUXNEG
  240. MUXNEGmask = $3F;
  241. MUXNEG_AIN0 = $00;
  242. MUXNEG_AIN1 = $01;
  243. MUXNEG_AIN2 = $02;
  244. MUXNEG_AIN3 = $03;
  245. MUXNEG_AIN4 = $04;
  246. MUXNEG_AIN5 = $05;
  247. MUXNEG_AIN6 = $06;
  248. MUXNEG_AIN7 = $07;
  249. MUXNEG_AIN16 = $10;
  250. MUXNEG_AIN17 = $11;
  251. MUXNEG_AIN18 = $12;
  252. MUXNEG_AIN19 = $13;
  253. MUXNEG_AIN20 = $14;
  254. MUXNEG_AIN21 = $15;
  255. MUXNEG_AIN22 = $16;
  256. MUXNEG_AIN23 = $17;
  257. MUXNEG_AIN24 = $18;
  258. MUXNEG_AIN25 = $19;
  259. MUXNEG_AIN26 = $1A;
  260. MUXNEG_AIN27 = $1B;
  261. MUXNEG_AIN28 = $1C;
  262. MUXNEG_AIN29 = $1D;
  263. MUXNEG_AIN30 = $1E;
  264. MUXNEG_AIN31 = $1F;
  265. MUXNEG_GND = $30;
  266. MUXNEG_DAC0 = $38;
  267. MUXNEG_DACREF0 = $39;
  268. MUXNEG_DACREF1 = $3A;
  269. end;
  270. TBOD = object //Bod interface
  271. CTRLA: byte; //Control A
  272. CTRLB: byte; //Control B
  273. Reserved2: byte;
  274. Reserved3: byte;
  275. Reserved4: byte;
  276. Reserved5: byte;
  277. Reserved6: byte;
  278. Reserved7: byte;
  279. VLMCTRLA: byte; //Voltage level monitor Control
  280. INTCTRL: byte; //Voltage level monitor interrupt Control
  281. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  282. STATUS: byte; //Voltage level monitor status
  283. const
  284. // BOD_SLEEP
  285. SLEEPmask = $03;
  286. SLEEP_DISABLE = $00;
  287. SLEEP_ENABLE = $01;
  288. SLEEP_SAMPLE = $02;
  289. // BOD_ACTIVE
  290. ACTIVEmask = $0C;
  291. ACTIVE_DISABLE = $00;
  292. ACTIVE_ENABLED = $04;
  293. ACTIVE_SAMPLED = $08;
  294. ACTIVE_ENABLEWAIT = $0C;
  295. // BOD_SAMPFREQ
  296. SAMPFREQmask = $10;
  297. SAMPFREQ_128HZ = $00;
  298. SAMPFREQ_32HZ = $10;
  299. // BOD_LVL
  300. LVLmask = $07;
  301. LVL_BODLEVEL0 = $00;
  302. LVL_BODLEVEL1 = $01;
  303. LVL_BODLEVEL2 = $02;
  304. LVL_BODLEVEL3 = $03;
  305. // BOD_VLMLVL
  306. VLMLVLmask = $03;
  307. VLMLVL_OFF = $00;
  308. VLMLVL_5ABOVE = $01;
  309. VLMLVL_15ABOVE = $02;
  310. VLMLVL_25ABOVE = $03;
  311. // voltage level monitor interrrupt enable
  312. VLMIEbm = $01;
  313. // BOD_VLMCFG
  314. VLMCFGmask = $06;
  315. VLMCFG_FALLING = $00;
  316. VLMCFG_RISING = $02;
  317. VLMCFG_BOTH = $04;
  318. // Voltage level monitor interrupt flag
  319. VLMIFbm = $01;
  320. // BOD_VLMS
  321. VLMSmask = $01;
  322. VLMS_ABOVE = $00;
  323. VLMS_BELOW = $01;
  324. end;
  325. TBOOTROW = object //Boot Row
  326. BOOTROW: byte; //Boot Row
  327. end;
  328. TCCL = object //Configurable Custom Logic
  329. CTRLA: byte; //Control Register A
  330. SEQCTRL0: byte; //Sequential Control 0
  331. SEQCTRL1: byte; //Sequential Control 1
  332. Reserved3: byte;
  333. Reserved4: byte;
  334. INTCTRL0: byte; //Interrupt Control 0
  335. Reserved6: byte;
  336. INTFLAGS: byte; //Interrupt Flags
  337. LUT0CTRLA: byte; //LUT 0 Control A
  338. LUT0CTRLB: byte; //LUT 0 Control B
  339. LUT0CTRLC: byte; //LUT 0 Control C
  340. TRUTH0: byte; //Truth 0
  341. LUT1CTRLA: byte; //LUT 1 Control A
  342. LUT1CTRLB: byte; //LUT 1 Control B
  343. LUT1CTRLC: byte; //LUT 1 Control C
  344. TRUTH1: byte; //Truth 1
  345. LUT2CTRLA: byte; //LUT 2 Control A
  346. LUT2CTRLB: byte; //LUT 2 Control B
  347. LUT2CTRLC: byte; //LUT 2 Control C
  348. TRUTH2: byte; //Truth 2
  349. LUT3CTRLA: byte; //LUT 3 Control A
  350. LUT3CTRLB: byte; //LUT 3 Control B
  351. LUT3CTRLC: byte; //LUT 3 Control C
  352. TRUTH3: byte; //Truth 3
  353. const
  354. // Enable
  355. ENABLEbm = $01;
  356. // Run in Standby
  357. RUNSTDBYbm = $40;
  358. // CCL_SEQSEL
  359. SEQSELmask = $0F;
  360. SEQSEL_DISABLE = $00;
  361. SEQSEL_DFF = $01;
  362. SEQSEL_JK = $02;
  363. SEQSEL_LATCH = $03;
  364. SEQSEL_RS = $04;
  365. // CCL_INTMODE0
  366. INTMODE0mask = $03;
  367. INTMODE0_INTDISABLE = $00;
  368. INTMODE0_RISING = $01;
  369. INTMODE0_FALLING = $02;
  370. INTMODE0_BOTH = $03;
  371. // CCL_INTMODE1
  372. INTMODE1mask = $0C;
  373. INTMODE1_INTDISABLE = $00;
  374. INTMODE1_RISING = $04;
  375. INTMODE1_FALLING = $08;
  376. INTMODE1_BOTH = $0C;
  377. // CCL_INTMODE2
  378. INTMODE2mask = $30;
  379. INTMODE2_INTDISABLE = $00;
  380. INTMODE2_RISING = $10;
  381. INTMODE2_FALLING = $20;
  382. INTMODE2_BOTH = $30;
  383. // CCL_INTMODE3
  384. INTMODE3mask = $C0;
  385. INTMODE3_INTDISABLE = $00;
  386. INTMODE3_RISING = $40;
  387. INTMODE3_FALLING = $80;
  388. INTMODE3_BOTH = $C0;
  389. // Interrupt Flag
  390. INT0bm = $01;
  391. INT1bm = $02;
  392. INT2bm = $04;
  393. INT3bm = $08;
  394. // CCL_CLKSRC
  395. CLKSRCmask = $0E;
  396. CLKSRC_CLKPER = $00;
  397. CLKSRC_IN2 = $02;
  398. CLKSRC_OSCHF = $08;
  399. CLKSRC_OSC32K = $0A;
  400. CLKSRC_OSC1K = $0C;
  401. CLKSRC_PLL = $0E;
  402. // CCL_FILTSEL
  403. FILTSELmask = $30;
  404. FILTSEL_DISABLE = $00;
  405. FILTSEL_SYNCH = $10;
  406. FILTSEL_FILTER = $20;
  407. // Output Enable
  408. OUTENbm = $40;
  409. // CCL_EDGEDET
  410. EDGEDETmask = $80;
  411. EDGEDET_DIS = $00;
  412. EDGEDET_EN = $80;
  413. // CCL_INSEL0
  414. INSEL0mask = $0F;
  415. INSEL0_MASK = $00;
  416. INSEL0_FEEDBACK = $01;
  417. INSEL0_LINK = $02;
  418. INSEL0_EVENTA = $03;
  419. INSEL0_EVENTB = $04;
  420. INSEL0_IN0 = $05;
  421. INSEL0_AC0 = $06;
  422. INSEL0_USART0 = $07;
  423. INSEL0_SPI0 = $08;
  424. INSEL0_TCE0 = $09;
  425. INSEL0_TCB0 = $0A;
  426. INSEL0_TCF0 = $0B;
  427. INSEL0_WEX0 = $0C;
  428. // CCL_INSEL1
  429. INSEL1mask = $F0;
  430. INSEL1_MASK = $00;
  431. INSEL1_FEEDBACK = $10;
  432. INSEL1_LINK = $20;
  433. INSEL1_EVENTA = $30;
  434. INSEL1_EVENTB = $40;
  435. INSEL1_IN1 = $50;
  436. INSEL1_AC1 = $60;
  437. INSEL1_USART0 = $70;
  438. INSEL1_SPI0 = $80;
  439. INSEL1_TCE0 = $90;
  440. INSEL1_TCB1 = $A0;
  441. INSEL1_TCF0 = $B0;
  442. INSEL1_WEX0 = $C0;
  443. // CCL_INSEL2
  444. INSEL2mask = $0F;
  445. INSEL2_MASK = $00;
  446. INSEL2_FEEDBACK = $01;
  447. INSEL2_LINK = $02;
  448. INSEL2_EVENTA = $03;
  449. INSEL2_EVENTB = $04;
  450. INSEL2_IN2 = $05;
  451. INSEL2_AC1 = $06;
  452. INSEL2_USART0 = $07;
  453. INSEL2_SPI0 = $08;
  454. INSEL2_TCE0 = $09;
  455. INSEL2_TCB1 = $0A;
  456. INSEL2_TCF0 = $0B;
  457. INSEL2_WEX0 = $0C;
  458. end;
  459. TCLKCTRL = object //Clock controller
  460. MCLKCTRLA: byte; //MCLK Control A
  461. MCLKCTRLB: byte; //MCLK Control B
  462. Reserved2: byte;
  463. Reserved3: byte;
  464. Reserved4: byte;
  465. MCLKSTATUS: byte; //MCLK Status
  466. MCLKTIMEBASE: byte; //MCLK Timebase
  467. Reserved7: byte;
  468. OSCHFCTRLA: byte; //OSCHF Control A
  469. OSCHFTUNE: byte; //OSCHF Tune
  470. Reserved10: byte;
  471. Reserved11: byte;
  472. Reserved12: byte;
  473. Reserved13: byte;
  474. Reserved14: byte;
  475. Reserved15: byte;
  476. PLLCTRLA: byte; //PLL Control A
  477. PLLCTRLB: byte; //PLL Control B
  478. Reserved18: byte;
  479. Reserved19: byte;
  480. Reserved20: byte;
  481. Reserved21: byte;
  482. Reserved22: byte;
  483. Reserved23: byte;
  484. OSC32KCTRLA: byte; //OSC32K Control A
  485. Reserved25: byte;
  486. Reserved26: byte;
  487. Reserved27: byte;
  488. XOSC32KCTRLA: byte; //XOSC32K Control A
  489. const
  490. // CLKCTRL_CLKSEL
  491. CLKSELmask = $0F;
  492. CLKSEL_OSCHF = $00;
  493. CLKSEL_OSC32K = $01;
  494. CLKSEL_XOSC32K = $02;
  495. CLKSEL_EXTCLK = $03;
  496. CLKSEL_PLL = $04;
  497. // System clock out
  498. CLKOUTbm = $80;
  499. // Prescaler enable
  500. PENbm = $01;
  501. // CLKCTRL_PDIV
  502. PDIVmask = $1E;
  503. PDIV_DIV2 = $00;
  504. PDIV_DIV4 = $02;
  505. PDIV_DIV8 = $04;
  506. PDIV_DIV16 = $06;
  507. PDIV_DIV32 = $08;
  508. PDIV_DIV64 = $0A;
  509. PDIV_DIV6 = $10;
  510. PDIV_DIV10 = $12;
  511. PDIV_DIV12 = $14;
  512. PDIV_DIV24 = $16;
  513. PDIV_DIV48 = $18;
  514. // CLKCTRL_PBDIV
  515. PBDIVmask = $20;
  516. PBDIV_NONE = $00;
  517. PBDIV_DIV4 = $20;
  518. // System Oscillator changing
  519. SOSCbm = $01;
  520. // High frequency oscillator status
  521. OSCHFSbm = $02;
  522. // 32KHz oscillator status
  523. OSC32KSbm = $04;
  524. // 32.768 kHz Crystal Oscillator status
  525. XOSC32KSbm = $08;
  526. // External Clock status
  527. EXTSbm = $10;
  528. // PLL status
  529. PLLSbm = $20;
  530. // Timebase
  531. TIMEBASE0bm = $01;
  532. TIMEBASE1bm = $02;
  533. TIMEBASE2bm = $04;
  534. TIMEBASE3bm = $08;
  535. TIMEBASE4bm = $10;
  536. // CLKCTRL_AUTOTUNE
  537. AUTOTUNEmask = $03;
  538. AUTOTUNE_OFF = $00;
  539. AUTOTUNE_XOSC32K = $01;
  540. // Run in standby
  541. RUNSTDBYbm = $80;
  542. // CLKCTRL_MULFAC
  543. MULFACmask = $03;
  544. MULFAC_OFF = $00;
  545. MULFAC_8X = $02;
  546. MULFAC_16X = $03;
  547. // CLKCTRL_SOURCEDIV
  548. SOURCEDIVmask = $18;
  549. SOURCEDIV_DIV1 = $00;
  550. SOURCEDIV_DIV2 = $08;
  551. SOURCEDIV_DIV4 = $10;
  552. SOURCEDIV_DIV6 = $18;
  553. // CLKCTRL_SOURCE
  554. SOURCEmask = $60;
  555. SOURCE_OSCHF = $00;
  556. SOURCE_EXTCLK = $20;
  557. // CLKCTRL_CLKDIV
  558. CLKDIVmask = $01;
  559. CLKDIV_NONE = $00;
  560. CLKDIV_DIV2 = $01;
  561. // Enable
  562. ENABLEbm = $01;
  563. // Low power mode
  564. LPMODEbm = $02;
  565. // Select
  566. SELbm = $04;
  567. // CLKCTRL_CSUT
  568. CSUTmask = $30;
  569. CSUT_1K = $00;
  570. CSUT_16K = $10;
  571. CSUT_32K = $20;
  572. CSUT_64K = $30;
  573. end;
  574. TCPU = object //CPU
  575. Reserved0: byte;
  576. Reserved1: byte;
  577. Reserved2: byte;
  578. Reserved3: byte;
  579. CCP: byte; //Configuration Change Protection
  580. Reserved5: byte;
  581. Reserved6: byte;
  582. Reserved7: byte;
  583. Reserved8: byte;
  584. Reserved9: byte;
  585. Reserved10: byte;
  586. Reserved11: byte;
  587. Reserved12: byte;
  588. SP: word; //Stack Pointer
  589. SREG: byte; //Status Register
  590. const
  591. // CPU_CCP
  592. CCPmask = $FF;
  593. CCP_SPM = $9D;
  594. CCP_IOREG = $D8;
  595. // Carry Flag
  596. Cbm = $01;
  597. // Zero Flag
  598. Zbm = $02;
  599. // Negative Flag
  600. Nbm = $04;
  601. // Two's Complement Overflow Flag
  602. Vbm = $08;
  603. // N Exclusive Or V Flag
  604. Sbm = $10;
  605. // Half Carry Flag
  606. Hbm = $20;
  607. // Transfer Bit
  608. Tbm = $40;
  609. // Global Interrupt Enable Flag
  610. Ibm = $80;
  611. end;
  612. TCPUINT = object //Interrupt Controller
  613. CTRLA: byte; //Control A
  614. STATUS: byte; //Status
  615. LVL0PRI: byte; //Interrupt Level 0 Priority
  616. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  617. const
  618. // Round-robin Scheduling Enable
  619. LVL0RRbm = $01;
  620. // Compact Vector Table
  621. CVTbm = $20;
  622. // Interrupt Vector Select
  623. IVSELbm = $40;
  624. // Level 0 Interrupt Executing
  625. LVL0EXbm = $01;
  626. // Level 1 Interrupt Executing
  627. LVL1EXbm = $02;
  628. // Non-maskable Interrupt Executing
  629. NMIEXbm = $80;
  630. end;
  631. TCRCSCAN = object //CRCSCAN
  632. CTRLA: byte; //Control A
  633. CTRLB: byte; //Control B
  634. STATUS: byte; //Status
  635. const
  636. // Enable CRC scan
  637. ENABLEbm = $01;
  638. // Enable NMI Trigger
  639. NMIENbm = $02;
  640. // Reset CRC scan
  641. RESETbm = $80;
  642. // CRCSCAN_SRC
  643. SRCmask = $03;
  644. SRC_FLASH = $00;
  645. SRC_APPLICATION = $01;
  646. SRC_BOOT = $02;
  647. // CRC Busy
  648. BUSYbm = $01;
  649. // CRC Ok
  650. OKbm = $02;
  651. end;
  652. TEVSYS = object //Event System
  653. SWEVENTA: byte; //Software Event A
  654. Reserved1: byte;
  655. Reserved2: byte;
  656. Reserved3: byte;
  657. Reserved4: byte;
  658. Reserved5: byte;
  659. Reserved6: byte;
  660. Reserved7: byte;
  661. Reserved8: byte;
  662. Reserved9: byte;
  663. Reserved10: byte;
  664. Reserved11: byte;
  665. Reserved12: byte;
  666. Reserved13: byte;
  667. Reserved14: byte;
  668. Reserved15: byte;
  669. CHANNEL0: byte; //Multiplexer Channel 0
  670. CHANNEL1: byte; //Multiplexer Channel 1
  671. CHANNEL2: byte; //Multiplexer Channel 2
  672. CHANNEL3: byte; //Multiplexer Channel 3
  673. CHANNEL4: byte; //Multiplexer Channel 4
  674. CHANNEL5: byte; //Multiplexer Channel 5
  675. Reserved22: byte;
  676. Reserved23: byte;
  677. Reserved24: byte;
  678. Reserved25: byte;
  679. Reserved26: byte;
  680. Reserved27: byte;
  681. Reserved28: byte;
  682. Reserved29: byte;
  683. Reserved30: byte;
  684. Reserved31: byte;
  685. USERCCLLUT0A: byte; //CCL0 Event A
  686. USERCCLLUT0B: byte; //CCL0 Event B
  687. USERCCLLUT1A: byte; //CCL1 Event A
  688. USERCCLLUT1B: byte; //CCL1 Event B
  689. USERCCLLUT2A: byte; //CCL2 Event A
  690. USERCCLLUT2B: byte; //CCL2 Event B
  691. USERCCLLUT3A: byte; //CCL3 Event A
  692. USERCCLLUT3B: byte; //CCL3 Event B
  693. USERADC0START: byte; //ADC0 Start
  694. USEREVSYSEVOUTA: byte; //EVOUTA
  695. USEREVSYSEVOUTC: byte; //EVOUTC
  696. USEREVSYSEVOUTD: byte; //EVOUTD
  697. USEREVSYSEVOUTF: byte; //EVOUTF
  698. USERUSART0IRDA: byte; //USART0 IrDA Event
  699. USERTCE0CNTA: byte; //TCE0 Event A
  700. USERTCE0CNTB: byte; //TCE0 Event B
  701. USERTCB0CAPT: byte; //TCB0 Event A
  702. USERTCB0COUNT: byte; //TCB0 Event B
  703. USERTCB1CAPT: byte; //TCB1 Event A
  704. USERTCB1COUNT: byte; //TCB1 Event B
  705. USERTCF0CNT: byte; //TCF0 Clock Event
  706. USERTCF0ACT: byte; //TCF0 Action Event
  707. USERWEXA: byte; //WEX Event A
  708. USERWEXB: byte; //WEX Event B
  709. USERWEXC: byte; //WEX Event C
  710. const
  711. // EVSYS_SWEVENTA
  712. SWEVENTAmask = $FF;
  713. SWEVENTA_CH0 = $01;
  714. SWEVENTA_CH1 = $02;
  715. SWEVENTA_CH2 = $04;
  716. SWEVENTA_CH3 = $08;
  717. SWEVENTA_CH4 = $10;
  718. SWEVENTA_CH5 = $20;
  719. SWEVENTA_CH6 = $40;
  720. SWEVENTA_CH7 = $80;
  721. // EVSYS_CHANNEL
  722. CHANNELmask = $FF;
  723. CHANNEL_OFF = $00;
  724. CHANNEL_UPDI_SYNCH = $01;
  725. CHANNEL_RTC_OVF = $06;
  726. CHANNEL_RTC_CMP = $07;
  727. CHANNEL_RTC_PITEV0 = $08;
  728. CHANNEL_RTC_PITEV1 = $09;
  729. CHANNEL_CCL_LUT0 = $10;
  730. CHANNEL_CCL_LUT1 = $11;
  731. CHANNEL_CCL_LUT2 = $12;
  732. CHANNEL_CCL_LUT3 = $13;
  733. CHANNEL_AC0_OUT = $20;
  734. CHANNEL_AC1_OUT = $21;
  735. CHANNEL_ADC0_RES = $24;
  736. CHANNEL_ADC0_SAMP = $25;
  737. CHANNEL_ADC0_WCMP = $26;
  738. CHANNEL_PORTA_EV0 = $40;
  739. CHANNEL_PORTA_EV1 = $41;
  740. CHANNEL_PORTC_EV0 = $44;
  741. CHANNEL_PORTC_EV1 = $45;
  742. CHANNEL_PORTD_EV0 = $46;
  743. CHANNEL_PORTD_EV1 = $47;
  744. CHANNEL_PORTF_EV0 = $4A;
  745. CHANNEL_PORTF_EV1 = $4B;
  746. CHANNEL_USART0_XCK = $60;
  747. CHANNEL_SPI0_SCK = $68;
  748. CHANNEL_TCE0_OVF = $80;
  749. CHANNEL_TCE0_CMP0 = $84;
  750. CHANNEL_TCE0_CMP1 = $85;
  751. CHANNEL_TCE0_CMP2 = $86;
  752. CHANNEL_TCE0_CMP3 = $87;
  753. CHANNEL_TCB0_CAPT = $A0;
  754. CHANNEL_TCB0_OVF = $A1;
  755. CHANNEL_TCB1_CAPT = $A2;
  756. CHANNEL_TCB1_OVF = $A3;
  757. CHANNEL_TCF0_OVF = $B8;
  758. CHANNEL_TCF0_CMP0 = $B9;
  759. CHANNEL_TCF0_CMP1 = $BA;
  760. // EVSYS_USER
  761. USERmask = $FF;
  762. USER_OFF = $00;
  763. USER_CHANNEL0 = $01;
  764. USER_CHANNEL1 = $02;
  765. USER_CHANNEL2 = $03;
  766. USER_CHANNEL3 = $04;
  767. USER_CHANNEL4 = $05;
  768. USER_CHANNEL5 = $06;
  769. end;
  770. TFUSE = object //Fuses
  771. WDTCFG: byte; //Watchdog Configuration
  772. BODCFG: byte; //BOD Configuration
  773. OSCCFG: byte; //Oscillator Configuration
  774. Reserved3: byte;
  775. Reserved4: byte;
  776. SYSCFG0: byte; //System Configuration 0
  777. SYSCFG1: byte; //System Configuration 1
  778. CODESIZE: byte; //Code Section Size
  779. BOOTSIZE: byte; //Boot Section Size
  780. Reserved9: byte;
  781. PDICFG: word; //Programming and Debugging Interface Configuration
  782. const
  783. // FUSE_PERIOD
  784. PERIODmask = $0F;
  785. PERIOD_OFF = $00;
  786. PERIOD_8CLK = $01;
  787. PERIOD_16CLK = $02;
  788. PERIOD_32CLK = $03;
  789. PERIOD_64CLK = $04;
  790. PERIOD_128CLK = $05;
  791. PERIOD_256CLK = $06;
  792. PERIOD_512CLK = $07;
  793. PERIOD_1KCLK = $08;
  794. PERIOD_2KCLK = $09;
  795. PERIOD_4KCLK = $0A;
  796. PERIOD_8KCLK = $0B;
  797. // FUSE_WINDOW
  798. WINDOWmask = $F0;
  799. WINDOW_OFF = $00;
  800. WINDOW_8CLK = $10;
  801. WINDOW_16CLK = $20;
  802. WINDOW_32CLK = $30;
  803. WINDOW_64CLK = $40;
  804. WINDOW_128CLK = $50;
  805. WINDOW_256CLK = $60;
  806. WINDOW_512CLK = $70;
  807. WINDOW_1KCLK = $80;
  808. WINDOW_2KCLK = $90;
  809. WINDOW_4KCLK = $A0;
  810. WINDOW_8KCLK = $B0;
  811. // FUSE_SLEEP
  812. SLEEPmask = $03;
  813. SLEEP_DISABLE = $00;
  814. SLEEP_ENABLE = $01;
  815. SLEEP_SAMPLE = $02;
  816. // FUSE_ACTIVE
  817. ACTIVEmask = $0C;
  818. ACTIVE_DISABLE = $00;
  819. ACTIVE_ENABLED = $04;
  820. ACTIVE_SAMPLED = $08;
  821. ACTIVE_ENABLEWAIT = $0C;
  822. // FUSE_SAMPFREQ
  823. SAMPFREQmask = $10;
  824. SAMPFREQ_128HZ = $00;
  825. SAMPFREQ_32HZ = $10;
  826. // FUSE_LVL
  827. LVLmask = $E0;
  828. LVL_BODLEVEL0 = $00;
  829. LVL_BODLEVEL1 = $20;
  830. LVL_BODLEVEL2 = $40;
  831. LVL_BODLEVEL3 = $60;
  832. // FUSE_OSCHFFRQ
  833. OSCHFFRQmask = $08;
  834. OSCHFFRQ_20M = $00;
  835. OSCHFFRQ_16M = $08;
  836. // FUSE_EESAVE
  837. EESAVEmask = $01;
  838. EESAVE_DISABLE = $00;
  839. EESAVE_ENABLE = $01;
  840. // FUSE_RSTPINCFG
  841. RSTPINCFGmask = $08;
  842. RSTPINCFG_NONE = $00;
  843. RSTPINCFG_RESET = $08;
  844. // FUSE_UPDIPINCFG
  845. UPDIPINCFGmask = $10;
  846. UPDIPINCFG_GPIO = $00;
  847. UPDIPINCFG_UPDI = $10;
  848. // FUSE_CRCSEL
  849. CRCSELmask = $20;
  850. CRCSEL_CRC16 = $00;
  851. CRCSEL_CRC32 = $20;
  852. // FUSE_CRCSRC
  853. CRCSRCmask = $C0;
  854. CRCSRC_FLASH = $00;
  855. CRCSRC_BOOT = $40;
  856. CRCSRC_BOOTAPP = $80;
  857. CRCSRC_NOCRC = $C0;
  858. // FUSE_SUT
  859. SUTmask = $07;
  860. SUT_0MS = $00;
  861. SUT_1MS = $01;
  862. SUT_2MS = $02;
  863. SUT_4MS = $03;
  864. SUT_8MS = $04;
  865. SUT_16MS = $05;
  866. SUT_32MS = $06;
  867. SUT_64MS = $07;
  868. // FUSE_LEVEL
  869. LEVELmask = $03;
  870. LEVEL_NVMACCDIS = $02;
  871. LEVEL_BASIC = $03;
  872. // FUSE_KEY
  873. KEYmask = $FFF0;
  874. KEY_NOTACT = $00;
  875. KEY_NVMACT = $B450;
  876. end;
  877. TGPR = object //General Purpose Registers
  878. GPR0: byte; //General Purpose Register 0
  879. GPR1: byte; //General Purpose Register 1
  880. GPR2: byte; //General Purpose Register 2
  881. GPR3: byte; //General Purpose Register 3
  882. end;
  883. TLOCK = object //Lockbits
  884. KEY: dword; //Lock Key Bits
  885. const
  886. // LOCK_KEY
  887. KEYmask = $FFFFFFFF;
  888. KEY_NOLOCK = $5CC5C55C;
  889. KEY_RWLOCK = $A33A3AA3;
  890. end;
  891. TNVMCTRL = object //Non-volatile Memory Controller
  892. CTRLA: byte; //Control A
  893. CTRLB: byte; //Control B
  894. CTRLC: byte; //Control C
  895. Reserved3: byte;
  896. INTCTRL: byte; //Interrupt Control
  897. INTFLAGS: byte; //Interrupt Flags
  898. STATUS: byte; //Status
  899. Reserved7: byte;
  900. DATA: word; //Data
  901. Reserved10: byte;
  902. Reserved11: byte;
  903. ADDR: dword; //Address
  904. const
  905. // NVMCTRL_CMD
  906. CMDmask = $7F;
  907. CMD_NOCMD = $00;
  908. CMD_NOOP = $01;
  909. CMD_FLPW = $04;
  910. CMD_FLPERW = $05;
  911. CMD_FLPER = $08;
  912. CMD_FLMPER2 = $09;
  913. CMD_FLMPER4 = $0A;
  914. CMD_FLMPER8 = $0B;
  915. CMD_FLMPER16 = $0C;
  916. CMD_FLMPER32 = $0D;
  917. CMD_FLPBCLR = $0F;
  918. CMD_EEPW = $14;
  919. CMD_EEPERW = $15;
  920. CMD_EEPER = $17;
  921. CMD_EEPBCLR = $1F;
  922. CMD_CHER = $20;
  923. CMD_EECHER = $30;
  924. // Application Code Write Protect
  925. APPCODEWPbm = $01;
  926. // Boot Read Protect
  927. BOOTRPbm = $02;
  928. // Application Data Write Protect
  929. APPDATAWPbm = $04;
  930. // EEPROM Write Protect
  931. EEWPbm = $08;
  932. // NVMCTRL_FLMAP
  933. FLMAPmask = $30;
  934. FLMAP_SECTION0 = $00;
  935. FLMAP_SECTION1 = $10;
  936. FLMAP_SECTION2 = $20;
  937. FLMAP_SECTION3 = $30;
  938. // Flash Mapping Lock
  939. FLMAPLOCKbm = $80;
  940. // User Row Write Protect
  941. UROWWPbm = $01;
  942. // Boot Row Write Protect
  943. BOOTROWWPbm = $02;
  944. // EEPROM Ready
  945. EEREADYbm = $01;
  946. // Flash Ready
  947. FLREADYbm = $02;
  948. // EEPROM busy
  949. EEBUSYbm = $01;
  950. // Flash busy
  951. FLBUSYbm = $02;
  952. // NVMCTRL_ERROR
  953. ERRORmask = $70;
  954. ERROR_NOERROR = $00;
  955. ERROR_WRITEPROTECT = $20;
  956. ERROR_CMDCOLLISION = $30;
  957. ERROR_WRONGSECTION = $40;
  958. end;
  959. TPORT = object //I/O Ports
  960. DIR: byte; //Data Direction
  961. DIRSET: byte; //Data Direction Set
  962. DIRCLR: byte; //Data Direction Clear
  963. DIRTGL: byte; //Data Direction Toggle
  964. OUT_: byte; //Output Value
  965. OUTSET: byte; //Output Value Set
  966. OUTCLR: byte; //Output Value Clear
  967. OUTTGL: byte; //Output Value Toggle
  968. IN_: byte; //Input Value
  969. INTFLAGS: byte; //Interrupt Flags
  970. PORTCTRL: byte; //Port Control
  971. PINCONFIG: byte; //Pin Control Config
  972. PINCTRLUPD: byte; //Pin Control Update
  973. PINCTRLSET: byte; //Pin Control Set
  974. PINCTRLCLR: byte; //Pin Control Clear
  975. Reserved15: byte;
  976. PIN0CTRL: byte; //Pin 0 Control
  977. PIN1CTRL: byte; //Pin 1 Control
  978. PIN2CTRL: byte; //Pin 2 Control
  979. PIN3CTRL: byte; //Pin 3 Control
  980. PIN4CTRL: byte; //Pin 4 Control
  981. PIN5CTRL: byte; //Pin 5 Control
  982. PIN6CTRL: byte; //Pin 6 Control
  983. PIN7CTRL: byte; //Pin 7 Control
  984. EVGENCTRLA: byte; //Event Generation Control A
  985. const
  986. // Slew Rate Limit Enable
  987. SRLbm = $01;
  988. // PORT_ISC
  989. ISCmask = $07;
  990. ISC_INTDISABLE = $00;
  991. ISC_BOTHEDGES = $01;
  992. ISC_RISING = $02;
  993. ISC_FALLING = $03;
  994. ISC_INPUT_DISABLE = $04;
  995. ISC_LEVEL = $05;
  996. // Pullup enable
  997. PULLUPENbm = $08;
  998. // PORT_INLVL
  999. INLVLmask = $40;
  1000. INLVL_ST = $00;
  1001. INLVL_TTL = $40;
  1002. // Inverted I/O Enable
  1003. INVENbm = $80;
  1004. // PORT_EVGEN0SEL
  1005. EVGEN0SELmask = $07;
  1006. EVGEN0SEL_PIN0 = $00;
  1007. EVGEN0SEL_PIN1 = $01;
  1008. EVGEN0SEL_PIN2 = $02;
  1009. EVGEN0SEL_PIN3 = $03;
  1010. EVGEN0SEL_PIN4 = $04;
  1011. EVGEN0SEL_PIN5 = $05;
  1012. EVGEN0SEL_PIN6 = $06;
  1013. EVGEN0SEL_PIN7 = $07;
  1014. // PORT_EVGEN1SEL
  1015. EVGEN1SELmask = $70;
  1016. EVGEN1SEL_PIN0 = $00;
  1017. EVGEN1SEL_PIN1 = $10;
  1018. EVGEN1SEL_PIN2 = $20;
  1019. EVGEN1SEL_PIN3 = $30;
  1020. EVGEN1SEL_PIN4 = $40;
  1021. EVGEN1SEL_PIN5 = $50;
  1022. EVGEN1SEL_PIN6 = $60;
  1023. EVGEN1SEL_PIN7 = $70;
  1024. end;
  1025. TPORTMUX = object //Port Multiplexer
  1026. EVSYSROUTEA: byte; //EVSYS route A
  1027. CCLROUTEA: byte; //CCL route A
  1028. USARTROUTEA: byte; //USART route A
  1029. Reserved3: byte;
  1030. Reserved4: byte;
  1031. SPIROUTEA: byte; //SPI route A
  1032. TWIROUTEA: byte; //TWI route A
  1033. TCEROUTEA: byte; //TCE route A
  1034. TCBROUTEA: byte; //TCB route A
  1035. Reserved9: byte;
  1036. Reserved10: byte;
  1037. Reserved11: byte;
  1038. TCFROUTEA: byte; //TCF Route A
  1039. const
  1040. // PORTMUX_EVOUTA
  1041. EVOUTAmask = $01;
  1042. EVOUTA_DEFAULT = $00;
  1043. EVOUTA_ALT1 = $01;
  1044. // PORTMUX_EVOUTC
  1045. EVOUTCmask = $04;
  1046. EVOUTC_DEFAULT = $00;
  1047. // PORTMUX_EVOUTD
  1048. EVOUTDmask = $08;
  1049. EVOUTD_DEFAULT = $00;
  1050. EVOUTD_ALT1 = $08;
  1051. // PORTMUX_EVOUTF
  1052. EVOUTFmask = $20;
  1053. EVOUTF_DEFAULT = $00;
  1054. EVOUTF_ALT1 = $20;
  1055. // PORTMUX_LUT0
  1056. LUT0mask = $01;
  1057. LUT0_DEFAULT = $00;
  1058. LUT0_ALT1 = $01;
  1059. // PORTMUX_LUT1
  1060. LUT1mask = $02;
  1061. LUT1_DEFAULT = $00;
  1062. LUT1_ALT1 = $02;
  1063. // PORTMUX_LUT2
  1064. LUT2mask = $04;
  1065. LUT2_DEFAULT = $00;
  1066. LUT2_ALT1 = $04;
  1067. // PORTMUX_LUT3
  1068. LUT3mask = $08;
  1069. LUT3_DEFAULT = $00;
  1070. // PORTMUX_USART0
  1071. USART0mask = $07;
  1072. USART0_DEFAULT = $00;
  1073. USART0_ALT1 = $01;
  1074. USART0_ALT2 = $02;
  1075. USART0_ALT3 = $03;
  1076. USART0_ALT4 = $04;
  1077. USART0_ALT6 = $06;
  1078. USART0_NONE = $07;
  1079. // PORTMUX_SPI0
  1080. SPI0mask = $07;
  1081. SPI0_DEFAULT = $00;
  1082. SPI0_ALT3 = $03;
  1083. SPI0_ALT4 = $04;
  1084. SPI0_ALT5 = $05;
  1085. SPI0_ALT6 = $06;
  1086. SPI0_NONE = $07;
  1087. // PORTMUX_TWI0
  1088. TWI0mask = $03;
  1089. TWI0_DEFAULT = $00;
  1090. TWI0_ALT1 = $01;
  1091. TWI0_ALT2 = $02;
  1092. TWI0_ALT3 = $03;
  1093. // PORTMUX_TCE0
  1094. TCE0mask = $0F;
  1095. TCE0_PORTA = $00;
  1096. TCE0_PORTC = $02;
  1097. TCE0_PORTD = $03;
  1098. TCE0_PORTF = $05;
  1099. TCE0_PORTC2 = $08;
  1100. TCE0_PORTA2 = $09;
  1101. // PORTMUX_TCB0
  1102. TCB0mask = $01;
  1103. TCB0_DEFAULT = $00;
  1104. TCB0_ALT1 = $01;
  1105. // PORTMUX_TCB1
  1106. TCB1mask = $02;
  1107. TCB1_DEFAULT = $00;
  1108. TCB1_ALT1 = $02;
  1109. // PORTMUX_TCF0
  1110. TCF0mask = $03;
  1111. TCF0_DEFAULT = $00;
  1112. TCF0_ALT1 = $01;
  1113. TCF0_ALT2 = $02;
  1114. end;
  1115. TRSTCTRL = object //Reset controller
  1116. RSTFR: byte; //Reset Flags
  1117. SWRR: byte; //Software Reset
  1118. const
  1119. // Power on Reset flag
  1120. PORFbm = $01;
  1121. // Brown out detector Reset flag
  1122. BORFbm = $02;
  1123. // External Reset flag
  1124. EXTRFbm = $04;
  1125. // Watch dog Reset flag
  1126. WDRFbm = $08;
  1127. // Software Reset flag
  1128. SWRFbm = $10;
  1129. // UPDI Reset flag
  1130. UPDIRFbm = $20;
  1131. // Software Reset Enable
  1132. SWREbm = $01;
  1133. end;
  1134. TRTC = object //Real-Time Counter
  1135. CTRLA: byte; //Control A
  1136. STATUS: byte; //Status
  1137. INTCTRL: byte; //Interrupt Control
  1138. INTFLAGS: byte; //Interrupt Flags
  1139. TEMP: byte; //Temporary
  1140. DBGCTRL: byte; //Debug control
  1141. CALIB: byte; //Calibration
  1142. CLKSEL: byte; //Clock Select
  1143. CNT: word; //Counter
  1144. PER: word; //Period
  1145. CMP: word; //Compare
  1146. Reserved14: byte;
  1147. Reserved15: byte;
  1148. PITCTRLA: byte; //PIT Control A
  1149. PITSTATUS: byte; //PIT Status
  1150. PITINTCTRL: byte; //PIT Interrupt Control
  1151. PITINTFLAGS: byte; //PIT Interrupt Flags
  1152. Reserved20: byte;
  1153. PITDBGCTRL: byte; //PIT Debug control
  1154. PITEVGENCTRLA: byte; //PIT Event Generation Control A
  1155. const
  1156. // Enable
  1157. RTCENbm = $01;
  1158. // Correction enable
  1159. CORRENbm = $04;
  1160. // RTC_PRESCALER
  1161. PRESCALERmask = $78;
  1162. PRESCALER_DIV1 = $00;
  1163. PRESCALER_DIV2 = $08;
  1164. PRESCALER_DIV4 = $10;
  1165. PRESCALER_DIV8 = $18;
  1166. PRESCALER_DIV16 = $20;
  1167. PRESCALER_DIV32 = $28;
  1168. PRESCALER_DIV64 = $30;
  1169. PRESCALER_DIV128 = $38;
  1170. PRESCALER_DIV256 = $40;
  1171. PRESCALER_DIV512 = $48;
  1172. PRESCALER_DIV1024 = $50;
  1173. PRESCALER_DIV2048 = $58;
  1174. PRESCALER_DIV4096 = $60;
  1175. PRESCALER_DIV8192 = $68;
  1176. PRESCALER_DIV16384 = $70;
  1177. PRESCALER_DIV32768 = $78;
  1178. // Run In Standby
  1179. RUNSTDBYbm = $80;
  1180. // CTRLA Synchronization Busy Flag
  1181. CTRLABUSYbm = $01;
  1182. // Count Synchronization Busy Flag
  1183. CNTBUSYbm = $02;
  1184. // Period Synchronization Busy Flag
  1185. PERBUSYbm = $04;
  1186. // Comparator Synchronization Busy Flag
  1187. CMPBUSYbm = $08;
  1188. // Overflow Interrupt enable
  1189. OVFbm = $01;
  1190. // Compare Match Interrupt enable
  1191. CMPbm = $02;
  1192. // Run in debug
  1193. DBGRUNbm = $01;
  1194. // Error Correction Value
  1195. ERROR0bm = $01;
  1196. ERROR1bm = $02;
  1197. ERROR2bm = $04;
  1198. ERROR3bm = $08;
  1199. ERROR4bm = $10;
  1200. ERROR5bm = $20;
  1201. ERROR6bm = $40;
  1202. // Error Correction Sign Bit
  1203. SIGNbm = $80;
  1204. // RTC_CLKSEL
  1205. CLKSELmask = $03;
  1206. CLKSEL_OSC32K = $00;
  1207. CLKSEL_OSC1K = $01;
  1208. CLKSEL_XOSC32K = $02;
  1209. CLKSEL_EXTCLK = $03;
  1210. // Enable
  1211. PITENbm = $01;
  1212. // RTC_PERIOD
  1213. PERIODmask = $78;
  1214. PERIOD_OFF = $00;
  1215. PERIOD_CYC4 = $08;
  1216. PERIOD_CYC8 = $10;
  1217. PERIOD_CYC16 = $18;
  1218. PERIOD_CYC32 = $20;
  1219. PERIOD_CYC64 = $28;
  1220. PERIOD_CYC128 = $30;
  1221. PERIOD_CYC256 = $38;
  1222. PERIOD_CYC512 = $40;
  1223. PERIOD_CYC1024 = $48;
  1224. PERIOD_CYC2048 = $50;
  1225. PERIOD_CYC4096 = $58;
  1226. PERIOD_CYC8192 = $60;
  1227. PERIOD_CYC16384 = $68;
  1228. PERIOD_CYC32768 = $70;
  1229. // CTRLA Synchronization Busy Flag
  1230. CTRLBUSYbm = $01;
  1231. // Periodic Interrupt
  1232. PIbm = $01;
  1233. // RTC_EVGEN0SEL
  1234. EVGEN0SELmask = $0F;
  1235. EVGEN0SEL_OFF = $00;
  1236. EVGEN0SEL_DIV4 = $01;
  1237. EVGEN0SEL_DIV8 = $02;
  1238. EVGEN0SEL_DIV16 = $03;
  1239. EVGEN0SEL_DIV32 = $04;
  1240. EVGEN0SEL_DIV64 = $05;
  1241. EVGEN0SEL_DIV128 = $06;
  1242. EVGEN0SEL_DIV256 = $07;
  1243. EVGEN0SEL_DIV512 = $08;
  1244. EVGEN0SEL_DIV1024 = $09;
  1245. EVGEN0SEL_DIV2048 = $0A;
  1246. EVGEN0SEL_DIV4096 = $0B;
  1247. EVGEN0SEL_DIV8192 = $0C;
  1248. EVGEN0SEL_DIV16384 = $0D;
  1249. EVGEN0SEL_DIV32768 = $0E;
  1250. // RTC_EVGEN1SEL
  1251. EVGEN1SELmask = $F0;
  1252. EVGEN1SEL_OFF = $00;
  1253. EVGEN1SEL_DIV4 = $10;
  1254. EVGEN1SEL_DIV8 = $20;
  1255. EVGEN1SEL_DIV16 = $30;
  1256. EVGEN1SEL_DIV32 = $40;
  1257. EVGEN1SEL_DIV64 = $50;
  1258. EVGEN1SEL_DIV128 = $60;
  1259. EVGEN1SEL_DIV256 = $70;
  1260. EVGEN1SEL_DIV512 = $80;
  1261. EVGEN1SEL_DIV1024 = $90;
  1262. EVGEN1SEL_DIV2048 = $A0;
  1263. EVGEN1SEL_DIV4096 = $B0;
  1264. EVGEN1SEL_DIV8192 = $C0;
  1265. EVGEN1SEL_DIV16384 = $D0;
  1266. EVGEN1SEL_DIV32768 = $E0;
  1267. end;
  1268. TSIGROW = object //Signature row
  1269. DEVICEID0: byte; //Device ID Byte 0
  1270. DEVICEID1: byte; //Device ID Byte 1
  1271. DEVICEID2: byte; //Device ID Byte 2
  1272. Reserved3: byte;
  1273. TEMPSENSE0: word; //Temperature Calibration 0
  1274. TEMPSENSE1: word; //Temperature Calibration 1
  1275. Reserved8: byte;
  1276. Reserved9: byte;
  1277. Reserved10: byte;
  1278. Reserved11: byte;
  1279. Reserved12: byte;
  1280. Reserved13: byte;
  1281. Reserved14: byte;
  1282. Reserved15: byte;
  1283. SERNUM0: byte; //Serial Number Byte 0
  1284. SERNUM1: byte; //Serial Number Byte 1
  1285. SERNUM2: byte; //Serial Number Byte 2
  1286. SERNUM3: byte; //Serial Number Byte 3
  1287. SERNUM4: byte; //Serial Number Byte 4
  1288. SERNUM5: byte; //Serial Number Byte 5
  1289. SERNUM6: byte; //Serial Number Byte 6
  1290. SERNUM7: byte; //Serial Number Byte 7
  1291. SERNUM8: byte; //Serial Number Byte 8
  1292. SERNUM9: byte; //Serial Number Byte 9
  1293. SERNUM10: byte; //Serial Number Byte 10
  1294. SERNUM11: byte; //Serial Number Byte 11
  1295. SERNUM12: byte; //Serial Number Byte 12
  1296. SERNUM13: byte; //Serial Number Byte 13
  1297. SERNUM14: byte; //Serial Number Byte 14
  1298. SERNUM15: byte; //Serial Number Byte 15
  1299. end;
  1300. TSLPCTRL = object //Sleep Controller
  1301. CTRLA: byte; //Control A
  1302. const
  1303. // Sleep enable
  1304. SENbm = $01;
  1305. // SLPCTRL_SMODE
  1306. SMODEmask = $06;
  1307. SMODE_IDLE = $00;
  1308. SMODE_STDBY = $02;
  1309. SMODE_PDOWN = $04;
  1310. end;
  1311. TSPI = object //Serial Peripheral Interface
  1312. CTRLA: byte; //Control A
  1313. CTRLB: byte; //Control B
  1314. INTCTRL: byte; //Interrupt Control
  1315. INTFLAGS: byte; //Interrupt Flags
  1316. DATA: byte; //Data
  1317. const
  1318. // Enable Module
  1319. ENABLEbm = $01;
  1320. // SPI_PRESC
  1321. PRESCmask = $06;
  1322. PRESC_DIV4 = $00;
  1323. PRESC_DIV16 = $02;
  1324. PRESC_DIV64 = $04;
  1325. PRESC_DIV128 = $06;
  1326. // Enable Double Speed
  1327. CLK2Xbm = $10;
  1328. // Host Operation Enable
  1329. MASTERbm = $20;
  1330. // Data Order Setting
  1331. DORDbm = $40;
  1332. // SPI_MODE
  1333. MODEmask = $03;
  1334. MODE_0 = $00;
  1335. MODE_1 = $01;
  1336. MODE_2 = $02;
  1337. MODE_3 = $03;
  1338. // SPI Select Disable
  1339. SSDbm = $04;
  1340. // Buffer Mode Wait for Receive
  1341. BUFWRbm = $40;
  1342. // Buffer Mode Enable
  1343. BUFENbm = $80;
  1344. // Interrupt Enable
  1345. IEbm = $01;
  1346. // SPI Select Trigger Interrupt Enable
  1347. SSIEbm = $10;
  1348. // Data Register Empty Interrupt Enable
  1349. DREIEbm = $20;
  1350. // Transfer Complete Interrupt Enable
  1351. TXCIEbm = $40;
  1352. // Receive Complete Interrupt Enable
  1353. RXCIEbm = $80;
  1354. end;
  1355. TSYSCFG = object //System Configuration Registers
  1356. Reserved0: byte;
  1357. REVID: byte; //Revision ID
  1358. const
  1359. // Minor Revision
  1360. MINOR0bm = $01;
  1361. MINOR1bm = $02;
  1362. MINOR2bm = $04;
  1363. MINOR3bm = $08;
  1364. // Major Revision
  1365. MAJOR0bm = $10;
  1366. MAJOR1bm = $20;
  1367. MAJOR2bm = $40;
  1368. MAJOR3bm = $80;
  1369. end;
  1370. TTCB = object //16-bit Timer/Counter Type B
  1371. CTRLA: byte; //Control A
  1372. CTRLB: byte; //Control B
  1373. CTRLC: byte; //Control C
  1374. Reserved3: byte;
  1375. EVCTRL: byte; //Event Control
  1376. INTCTRL: byte; //Interrupt Control
  1377. INTFLAGS: byte; //Interrupt Flags
  1378. STATUS: byte; //Status
  1379. DBGCTRL: byte; //Debug Control
  1380. TEMP: byte; //Temporary Value
  1381. CNT: word; //Count
  1382. CCMP: word; //Compare or Capture
  1383. const
  1384. // Enable
  1385. ENABLEbm = $01;
  1386. // TCB_CLKSEL
  1387. CLKSELmask = $0E;
  1388. CLKSEL_DIV1 = $00;
  1389. CLKSEL_DIV2 = $02;
  1390. CLKSEL_TCE0 = $04;
  1391. CLKSEL_EVENT = $0E;
  1392. // Synchronize Update
  1393. SYNCUPDbm = $10;
  1394. // Cascade two timers
  1395. CASCADEbm = $20;
  1396. // Run Standby
  1397. RUNSTDBYbm = $40;
  1398. // TCB_CNTMODE
  1399. CNTMODEmask = $07;
  1400. CNTMODE_INT = $00;
  1401. CNTMODE_TIMEOUT = $01;
  1402. CNTMODE_CAPT = $02;
  1403. CNTMODE_FRQ = $03;
  1404. CNTMODE_PW = $04;
  1405. CNTMODE_FRQPW = $05;
  1406. CNTMODE_SINGLE = $06;
  1407. CNTMODE_PWM8 = $07;
  1408. // Pin Output Enable
  1409. CCMPENbm = $10;
  1410. // Pin Initial State
  1411. CCMPINITbm = $20;
  1412. // Asynchronous Enable
  1413. ASYNCbm = $40;
  1414. // TCB_EVGEN
  1415. EVGENmask = $80;
  1416. EVGEN_PULSE = $00;
  1417. EVGEN_WAVEFORM = $80;
  1418. // TCB_CNTSIZE
  1419. CNTSIZEmask = $07;
  1420. CNTSIZE_16BITS = $00;
  1421. CNTSIZE_15BITS = $01;
  1422. CNTSIZE_14BITS = $02;
  1423. CNTSIZE_13BITS = $03;
  1424. CNTSIZE_12BITS = $04;
  1425. CNTSIZE_11BITS = $05;
  1426. CNTSIZE_10BITS = $06;
  1427. CNTSIZE_9BITS = $07;
  1428. // Event Input Enable
  1429. CAPTEIbm = $01;
  1430. // Event Edge
  1431. EDGEbm = $10;
  1432. // Input Capture Noise Cancellation Filter
  1433. FILTERbm = $40;
  1434. // Capture or Timeout
  1435. CAPTbm = $01;
  1436. // Overflow
  1437. OVFbm = $02;
  1438. // Run
  1439. RUNbm = $01;
  1440. // Debug Run
  1441. DBGRUNbm = $01;
  1442. end;
  1443. TTCE = object //16-bit Timer/Counter Type E
  1444. CTRLA: byte; //Control A
  1445. CTRLB: byte; //Control B
  1446. CTRLC: byte; //Control C
  1447. CTRLD: byte; //Control D
  1448. CTRLECLR: byte; //Control E Clear
  1449. CTRLESET: byte; //Control E Set
  1450. CTRLFCLR: byte; //Control F Clear
  1451. CTRLFSET: byte; //Control F Set
  1452. EVGENCTRL: byte; //Event Generation Control
  1453. EVCTRL: byte; //Event Control
  1454. INTCTRL: byte; //Interrupt Control
  1455. INTFLAGS: byte; //Interrupt Flags
  1456. Reserved12: byte;
  1457. Reserved13: byte;
  1458. DBGCTRL: byte; //Debug Control
  1459. TEMP: byte; //Temporary data for 16-bit Access
  1460. Reserved16: byte;
  1461. Reserved17: byte;
  1462. Reserved18: byte;
  1463. Reserved19: byte;
  1464. Reserved20: byte;
  1465. Reserved21: byte;
  1466. Reserved22: byte;
  1467. Reserved23: byte;
  1468. Reserved24: byte;
  1469. Reserved25: byte;
  1470. Reserved26: byte;
  1471. Reserved27: byte;
  1472. Reserved28: byte;
  1473. Reserved29: byte;
  1474. Reserved30: byte;
  1475. Reserved31: byte;
  1476. CNT: word; //Count
  1477. AMP: word; //Amplitude
  1478. OFFSET: word; //Offset
  1479. PER: word; //Period
  1480. CMP0: word; //Compare 0
  1481. CMP1: word; //Compare 1
  1482. CMP2: word; //Compare 2
  1483. CMP3: word; //Compare 3
  1484. Reserved48: byte;
  1485. Reserved49: byte;
  1486. Reserved50: byte;
  1487. Reserved51: byte;
  1488. Reserved52: byte;
  1489. Reserved53: byte;
  1490. PERBUF: word; //Period Buffer
  1491. CMP0BUF: word; //Compare 0 Buffer
  1492. CMP1BUF: word; //Compare 1 Buffer
  1493. CMP2BUF: word; //Compare 2 Buffer
  1494. CMP3BUF: word; //Compare 3 Buffer
  1495. const
  1496. // Module Enable
  1497. ENABLEbm = $01;
  1498. // TCE_CLKSEL
  1499. CLKSELmask = $0E;
  1500. CLKSEL_DIV1 = $00;
  1501. CLKSEL_DIV2 = $02;
  1502. CLKSEL_DIV4 = $04;
  1503. CLKSEL_DIV8 = $06;
  1504. CLKSEL_DIV16 = $08;
  1505. CLKSEL_DIV64 = $0A;
  1506. CLKSEL_DIV256 = $0C;
  1507. CLKSEL_DIV1024 = $0E;
  1508. // Run in Standby
  1509. RUNSTDBYbm = $80;
  1510. // TCE_WGMODE
  1511. WGMODEmask = $07;
  1512. WGMODE_NORMAL = $00;
  1513. WGMODE_FRQ = $01;
  1514. WGMODE_SINGLESLOPE = $03;
  1515. WGMODE_DSTOP = $05;
  1516. WGMODE_DSBOTH = $06;
  1517. WGMODE_DSBOTTOM = $07;
  1518. // Auto Lock Update
  1519. ALUPDbm = $08;
  1520. // Compare 0 Enable
  1521. CMP0ENbm = $10;
  1522. // Compare 1 Enable
  1523. CMP1ENbm = $20;
  1524. // Compare 2 Enable
  1525. CMP2ENbm = $40;
  1526. // Compare 3 Enable
  1527. CMP3ENbm = $80;
  1528. // Compare 0 Waveform Output Value
  1529. CMP0OVbm = $01;
  1530. // Compare 1 Waveform Output Value
  1531. CMP1OVbm = $02;
  1532. // Compare 2 Waveform Output Value
  1533. CMP2OVbm = $04;
  1534. // Compare 3 Waveform Output Value
  1535. CMP3OVbm = $08;
  1536. // Compare 0 Polarity
  1537. CMP0POLbm = $10;
  1538. // Compare 1 Polarity
  1539. CMP1POLbm = $20;
  1540. // Compare 2 Polarity
  1541. CMP2POLbm = $40;
  1542. // Compare 3 Polarity
  1543. CMP3POLbm = $80;
  1544. // TCE_SCALE
  1545. SCALEmask = $04;
  1546. SCALE_NORMAL = $00;
  1547. SCALE_FRACTIONAL = $04;
  1548. // Amplitude Control Enable
  1549. AMPENbm = $08;
  1550. // TCE_SCALEMODE
  1551. SCALEMODEmask = $30;
  1552. SCALEMODE_CENTER = $00;
  1553. SCALEMODE_BOTTOM = $10;
  1554. SCALEMODE_TOP = $20;
  1555. SCALEMODE_TOPBOTTOM = $30;
  1556. // TCE_HREN
  1557. HRENmask = $C0;
  1558. HREN_OFF = $00;
  1559. HREN_4X = $40;
  1560. HREN_8X = $80;
  1561. // Direction
  1562. DIRbm = $01;
  1563. // Lock Update
  1564. LUPDbm = $02;
  1565. // TCE_CMD
  1566. CMDmask = $0C;
  1567. CMD_NONE = $00;
  1568. CMD_UPDATE = $04;
  1569. CMD_RESTART = $08;
  1570. CMD_RESET = $0C;
  1571. // Period Buffer Valid
  1572. PERBVbm = $01;
  1573. // Compare 0 Buffer Valid
  1574. CMP0BVbm = $02;
  1575. // Compare 1 Buffer Valid
  1576. CMP1BVbm = $04;
  1577. // Compare 2 Buffer Valid
  1578. CMP2BVbm = $08;
  1579. // Compare 3 Buffer Valid
  1580. CMP3BVbm = $10;
  1581. // CMP0EV
  1582. CMP0EVmask = $10;
  1583. CMP0EVPULSE = $00;
  1584. CMP0EVWAVEFORM = $10;
  1585. // CMP1EV
  1586. CMP1EVmask = $20;
  1587. CMP1EVPULSE = $00;
  1588. CMP1EVWAVEFORM = $20;
  1589. // CMP2EV
  1590. CMP2EVmask = $40;
  1591. CMP2EVPULSE = $00;
  1592. CMP2EVWAVEFORM = $40;
  1593. // CMP3EV
  1594. CMP3EVmask = $80;
  1595. CMP3EVPULSE = $00;
  1596. CMP3EVWAVEFORM = $80;
  1597. // Count on Event Input A
  1598. CNTAEIbm = $01;
  1599. // TCE_EVACTA
  1600. EVACTAmask = $0E;
  1601. EVACTA_CNT_POSEDGE = $00;
  1602. EVACTA_CNT_ANYEDGE = $02;
  1603. EVACTA_CNT_HIGHLVL = $04;
  1604. EVACTA_UPDOWN = $06;
  1605. // Count on Event Input B
  1606. CNTBEIbm = $10;
  1607. // TCE_EVACTB
  1608. EVACTBmask = $E0;
  1609. EVACTB_NONE = $00;
  1610. EVACTB_UPDOWN = $60;
  1611. EVACTB_RESTART_POSEDGE = $80;
  1612. EVACTB_RESTART_ANYEDGE = $A0;
  1613. EVACTB_RESTART_HIGHLVL = $C0;
  1614. // Overflow Interrupt Enable
  1615. OVFbm = $01;
  1616. // Compare 0 Interrupt Enable
  1617. CMP0bm = $10;
  1618. // Compare 1 Interrupt Enable
  1619. CMP1bm = $20;
  1620. // Compare 2 Interrupt Enable
  1621. CMP2bm = $40;
  1622. // Compare 3 Interrupt Enable
  1623. CMP3bm = $80;
  1624. // Debug Run
  1625. DBGRUNbm = $01;
  1626. end;
  1627. TTCF = object //24-bit Timer/Counter for frequency generation
  1628. CTRLA: byte; //Control A
  1629. CTRLB: byte; //Control B
  1630. CTRLC: byte; //Control C
  1631. CTRLD: byte; //Control D
  1632. EVCTRL: byte; //Event Control
  1633. INTCTRL: byte; //Interrupt Control
  1634. INTFLAGS: byte; //Interrupt Flags
  1635. STATUS: byte; //Status
  1636. Reserved8: byte;
  1637. Reserved9: byte;
  1638. Reserved10: byte;
  1639. Reserved11: byte;
  1640. Reserved12: byte;
  1641. DBGCTRL: byte; //Debug Control
  1642. Reserved14: byte;
  1643. Reserved15: byte;
  1644. CNT: dword; //Count
  1645. CMP: dword; //Compare
  1646. const
  1647. // Enable
  1648. ENABLEbm = $01;
  1649. // TCF_PRESC
  1650. PRESCmask = $0E;
  1651. PRESC_DIV1 = $00;
  1652. PRESC_DIV2 = $02;
  1653. PRESC_DIV4 = $04;
  1654. PRESC_DIV8 = $06;
  1655. PRESC_DIV16 = $08;
  1656. PRESC_DIV32 = $0A;
  1657. PRESC_DIV64 = $0C;
  1658. PRESC_DIV128 = $0E;
  1659. // Run Standby
  1660. RUNSTDBYbm = $80;
  1661. // TCF_WGMODE
  1662. WGMODEmask = $07;
  1663. WGMODE_FRQ = $00;
  1664. WGMODE_NCOPF = $01;
  1665. WGMODE_NCOFDC = $02;
  1666. WGMODE_PWM8 = $07;
  1667. // TCF_CLKSEL
  1668. CLKSELmask = $38;
  1669. CLKSEL_CLKPER = $00;
  1670. CLKSEL_EVENT = $08;
  1671. CLKSEL_OSCHF = $10;
  1672. CLKSEL_OSC32K = $18;
  1673. CLKSEL_PLL = $28;
  1674. // CMP0EV
  1675. CMP0EVmask = $40;
  1676. CMP0EVPULSE = $00;
  1677. CMP0EVWAVEFORM = $40;
  1678. // CMP1EV
  1679. CMP1EVmask = $80;
  1680. CMP1EVPULSE = $00;
  1681. CMP1EVWAVEFORM = $80;
  1682. // Waveform Output 0 Enable
  1683. WO0ENbm = $01;
  1684. // Waveform Output 1 Enable
  1685. WO1ENbm = $02;
  1686. // WO0POL
  1687. WO0POLmask = $04;
  1688. WO0POLNORMAL = $00;
  1689. WO0POLINVERSE = $04;
  1690. // WO1POL
  1691. WO1POLmask = $08;
  1692. WO1POLNORMAL = $00;
  1693. WO1POLINVERSE = $08;
  1694. // TCF_WGPULSE
  1695. WGPULSEmask = $70;
  1696. WGPULSE_CLK1 = $00;
  1697. WGPULSE_CLK2 = $10;
  1698. WGPULSE_CLK4 = $20;
  1699. WGPULSE_CLK8 = $30;
  1700. WGPULSE_CLK16 = $40;
  1701. WGPULSE_CLK32 = $50;
  1702. WGPULSE_CLK64 = $60;
  1703. WGPULSE_CLK128 = $70;
  1704. // TCF_CMD
  1705. CMDmask = $03;
  1706. CMD_NONE = $00;
  1707. CMD_UPDATE = $01;
  1708. CMD_RESTART = $02;
  1709. // Event A Input Enable
  1710. CNTAEIbm = $01;
  1711. // TCF_EVACTA
  1712. EVACTAmask = $06;
  1713. EVACTA_RESTART = $00;
  1714. EVACTA_BLANK = $02;
  1715. // Event A Filter
  1716. FILTERAbm = $08;
  1717. // Overflow
  1718. OVFbm = $01;
  1719. // Compare 0 Interrupt Enable
  1720. CMP0bm = $02;
  1721. // Compare 1 Interrupt Enable
  1722. CMP1bm = $04;
  1723. // Control A Synchronization Busy
  1724. CTRLABUSYbm = $02;
  1725. // Control B Synchronization Busy
  1726. CTRLCBUSYbm = $04;
  1727. // Control D Synchronization Busy
  1728. CTRLDBUSYbm = $08;
  1729. // Counter Synchronization Busy
  1730. CNTBUSYbm = $10;
  1731. // Period Synchronization Busy
  1732. PERBUSYbm = $20;
  1733. // Compare 0 Synchronization Busy
  1734. CMP0BUSYbm = $40;
  1735. // Compare 1 Synchronization Busy
  1736. CMP1BUSYbm = $80;
  1737. // Debug Run
  1738. DBGRUNbm = $01;
  1739. end;
  1740. TTWI = object //Two-Wire Interface
  1741. CTRLA: byte; //Control A
  1742. DUALCTRL: byte; //Dual Mode Control
  1743. DBGCTRL: byte; //Debug Control
  1744. MCTRLA: byte; //Host Control A
  1745. MCTRLB: byte; //Host Control B
  1746. MSTATUS: byte; //Host STATUS
  1747. MBAUD: byte; //Host Baud Rate
  1748. MADDR: byte; //Host Address
  1749. MDATA: byte; //Host Data
  1750. SCTRLA: byte; //Client Control A
  1751. SCTRLB: byte; //Client Control B
  1752. SSTATUS: byte; //Client Status
  1753. SADDR: byte; //Client Address
  1754. SDATA: byte; //Client Data
  1755. SADDRMASK: byte; //Client Address Mask
  1756. const
  1757. // TWI_FMEN
  1758. FMENmask = $01;
  1759. FMEN_OFF = $00;
  1760. FMEN_ON = $01;
  1761. // TWI_FMPEN
  1762. FMPENmask = $02;
  1763. FMPEN_OFF = $00;
  1764. FMPEN_ON = $02;
  1765. // TWI_SDAHOLD
  1766. SDAHOLDmask = $0C;
  1767. SDAHOLD_OFF = $00;
  1768. SDAHOLD_50NS = $04;
  1769. SDAHOLD_300NS = $08;
  1770. SDAHOLD_500NS = $0C;
  1771. // TWI_SDASETUP
  1772. SDASETUPmask = $10;
  1773. SDASETUP_4CYC = $00;
  1774. SDASETUP_8CYC = $10;
  1775. // TWI_INPUTLVL
  1776. INPUTLVLmask = $40;
  1777. INPUTLVL_I2C = $00;
  1778. INPUTLVL_SMBUS = $40;
  1779. // Enable
  1780. ENABLEbm = $01;
  1781. // TWI_DBGRUN
  1782. DBGRUNmask = $01;
  1783. DBGRUN_HALT = $00;
  1784. DBGRUN_RUN = $01;
  1785. // Smart Mode Enable
  1786. SMENbm = $02;
  1787. // TWI_TIMEOUT
  1788. TIMEOUTmask = $0C;
  1789. TIMEOUT_DISABLED = $00;
  1790. TIMEOUT_50US = $04;
  1791. TIMEOUT_100US = $08;
  1792. TIMEOUT_200US = $0C;
  1793. // Quick Command Enable
  1794. QCENbm = $10;
  1795. // Write Interrupt Enable
  1796. WIENbm = $40;
  1797. // Read Interrupt Enable
  1798. RIENbm = $80;
  1799. // TWI_MCMD
  1800. MCMDmask = $03;
  1801. MCMD_NOACT = $00;
  1802. MCMD_REPSTART = $01;
  1803. MCMD_RECVTRANS = $02;
  1804. MCMD_STOP = $03;
  1805. // TWI_ACKACT
  1806. ACKACTmask = $04;
  1807. ACKACT_ACK = $00;
  1808. ACKACT_NACK = $04;
  1809. // Flush
  1810. FLUSHbm = $08;
  1811. // TWI_BUSSTATE
  1812. BUSSTATEmask = $03;
  1813. BUSSTATE_UNKNOWN = $00;
  1814. BUSSTATE_IDLE = $01;
  1815. BUSSTATE_OWNER = $02;
  1816. BUSSTATE_BUSY = $03;
  1817. // Bus Error
  1818. BUSERRbm = $04;
  1819. // Arbitration Lost
  1820. ARBLOSTbm = $08;
  1821. // Received Acknowledge
  1822. RXACKbm = $10;
  1823. // Clock Hold
  1824. CLKHOLDbm = $20;
  1825. // Write Interrupt Flag
  1826. WIFbm = $40;
  1827. // Read Interrupt Flag
  1828. RIFbm = $80;
  1829. // Address Recognition Mode
  1830. PMENbm = $04;
  1831. // Stop Interrupt Enable
  1832. PIENbm = $20;
  1833. // Address or Stop Interrupt Enable
  1834. APIENbm = $40;
  1835. // Data Interrupt Enable
  1836. DIENbm = $80;
  1837. // TWI_SCMD
  1838. SCMDmask = $03;
  1839. SCMD_NOACT = $00;
  1840. SCMD_COMPTRANS = $02;
  1841. SCMD_RESPONSE = $03;
  1842. // TWI_AP
  1843. APmask = $01;
  1844. AP_STOP = $00;
  1845. AP_ADR = $01;
  1846. // Read/Write Direction
  1847. DIRbm = $02;
  1848. // Collision
  1849. COLLbm = $08;
  1850. // Address or Stop Interrupt Flag
  1851. APIFbm = $40;
  1852. // Data Interrupt Flag
  1853. DIFbm = $80;
  1854. // Address Mask Enable
  1855. ADDRENbm = $01;
  1856. // Address Mask
  1857. ADDRMASK0bm = $02;
  1858. ADDRMASK1bm = $04;
  1859. ADDRMASK2bm = $08;
  1860. ADDRMASK3bm = $10;
  1861. ADDRMASK4bm = $20;
  1862. ADDRMASK5bm = $40;
  1863. ADDRMASK6bm = $80;
  1864. end;
  1865. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1866. RXDATAL: byte; //Receive Data Low Byte
  1867. RXDATAH: byte; //Receive Data High Byte
  1868. TXDATAL: byte; //Transmit Data Low Byte
  1869. TXDATAH: byte; //Transmit Data High Byte
  1870. STATUS: byte; //Status
  1871. CTRLA: byte; //Control A
  1872. CTRLB: byte; //Control B
  1873. CTRLC: byte; //Control C
  1874. BAUD: word; //Baud Rate
  1875. CTRLD: byte; //Control D
  1876. DBGCTRL: byte; //Debug Control
  1877. EVCTRL: byte; //Event Control
  1878. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1879. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1880. const
  1881. // Receiver Data Register
  1882. DATA8bm = $01;
  1883. // Parity Error
  1884. PERRbm = $02;
  1885. // Frame Error
  1886. FERRbm = $04;
  1887. // Buffer Overflow
  1888. BUFOVFbm = $40;
  1889. // Receive Complete Interrupt Flag
  1890. RXCIFbm = $80;
  1891. // Wait For Break
  1892. WFBbm = $01;
  1893. // Break Detected Flag
  1894. BDFbm = $02;
  1895. // Inconsistent Sync Field Interrupt Flag
  1896. ISFIFbm = $08;
  1897. // Receive Start Interrupt
  1898. RXSIFbm = $10;
  1899. // Data Register Empty Flag
  1900. DREIFbm = $20;
  1901. // Transmit Interrupt Flag
  1902. TXCIFbm = $40;
  1903. // USART_RS485
  1904. RS485mask = $01;
  1905. RS485_DISABLE = $00;
  1906. RS485_ENABLE = $01;
  1907. // Auto-baud Error Interrupt Enable
  1908. ABEIEbm = $04;
  1909. // Loop-back Mode Enable
  1910. LBMEbm = $08;
  1911. // Receiver Start Frame Interrupt Enable
  1912. RXSIEbm = $10;
  1913. // Data Register Empty Interrupt Enable
  1914. DREIEbm = $20;
  1915. // Transmit Complete Interrupt Enable
  1916. TXCIEbm = $40;
  1917. // Receive Complete Interrupt Enable
  1918. RXCIEbm = $80;
  1919. // Multi-processor Communication Mode
  1920. MPCMbm = $01;
  1921. // USART_RXMODE
  1922. RXMODEmask = $06;
  1923. RXMODE_NORMAL = $00;
  1924. RXMODE_CLK2X = $02;
  1925. RXMODE_GENAUTO = $04;
  1926. RXMODE_LINAUTO = $06;
  1927. // Open Drain Mode Enable
  1928. ODMEbm = $08;
  1929. // Start Frame Detection Enable
  1930. SFDENbm = $10;
  1931. // Transmitter Enable
  1932. TXENbm = $40;
  1933. // Reciever enable
  1934. RXENbm = $80;
  1935. // USART_ABW
  1936. ABWmask = $C0;
  1937. ABW_WDW0 = $00;
  1938. ABW_WDW1 = $40;
  1939. ABW_WDW2 = $80;
  1940. ABW_WDW3 = $C0;
  1941. // Debug Run
  1942. DBGRUNbm = $01;
  1943. // IrDA Event Input Enable
  1944. IREIbm = $01;
  1945. // Receiver Pulse Lenght
  1946. RXPL0bm = $01;
  1947. RXPL1bm = $02;
  1948. RXPL2bm = $04;
  1949. RXPL3bm = $08;
  1950. RXPL4bm = $10;
  1951. RXPL5bm = $20;
  1952. RXPL6bm = $40;
  1953. end;
  1954. TUSERROW = object //User Row
  1955. USERROW0: byte; //User Row Byte 0
  1956. USERROW1: byte; //User Row Byte 1
  1957. USERROW2: byte; //User Row Byte 2
  1958. USERROW3: byte; //User Row Byte 3
  1959. USERROW4: byte; //User Row Byte 4
  1960. USERROW5: byte; //User Row Byte 5
  1961. USERROW6: byte; //User Row Byte 6
  1962. USERROW7: byte; //User Row Byte 7
  1963. USERROW8: byte; //User Row Byte 8
  1964. USERROW9: byte; //User Row Byte 9
  1965. USERROW10: byte; //User Row Byte 10
  1966. USERROW11: byte; //User Row Byte 11
  1967. USERROW12: byte; //User Row Byte 12
  1968. USERROW13: byte; //User Row Byte 13
  1969. USERROW14: byte; //User Row Byte 14
  1970. USERROW15: byte; //User Row Byte 15
  1971. USERROW16: byte; //User Row Byte 16
  1972. USERROW17: byte; //User Row Byte 17
  1973. USERROW18: byte; //User Row Byte 18
  1974. USERROW19: byte; //User Row Byte 19
  1975. USERROW20: byte; //User Row Byte 20
  1976. USERROW21: byte; //User Row Byte 21
  1977. USERROW22: byte; //User Row Byte 22
  1978. USERROW23: byte; //User Row Byte 23
  1979. USERROW24: byte; //User Row Byte 24
  1980. USERROW25: byte; //User Row Byte 25
  1981. USERROW26: byte; //User Row Byte 26
  1982. USERROW27: byte; //User Row Byte 27
  1983. USERROW28: byte; //User Row Byte 28
  1984. USERROW29: byte; //User Row Byte 29
  1985. USERROW30: byte; //User Row Byte 30
  1986. USERROW31: byte; //User Row Byte 31
  1987. USERROW32: byte; //User Row Byte 32
  1988. USERROW33: byte; //User Row Byte 33
  1989. USERROW34: byte; //User Row Byte 34
  1990. USERROW35: byte; //User Row Byte 35
  1991. USERROW36: byte; //User Row Byte 36
  1992. USERROW37: byte; //User Row Byte 37
  1993. USERROW38: byte; //User Row Byte 38
  1994. USERROW39: byte; //User Row Byte 39
  1995. USERROW40: byte; //User Row Byte 40
  1996. USERROW41: byte; //User Row Byte 41
  1997. USERROW42: byte; //User Row Byte 42
  1998. USERROW43: byte; //User Row Byte 43
  1999. USERROW44: byte; //User Row Byte 44
  2000. USERROW45: byte; //User Row Byte 45
  2001. USERROW46: byte; //User Row Byte 46
  2002. USERROW47: byte; //User Row Byte 47
  2003. USERROW48: byte; //User Row Byte 48
  2004. USERROW49: byte; //User Row Byte 49
  2005. USERROW50: byte; //User Row Byte 50
  2006. USERROW51: byte; //User Row Byte 51
  2007. USERROW52: byte; //User Row Byte 52
  2008. USERROW53: byte; //User Row Byte 53
  2009. USERROW54: byte; //User Row Byte 54
  2010. USERROW55: byte; //User Row Byte 55
  2011. USERROW56: byte; //User Row Byte 56
  2012. USERROW57: byte; //User Row Byte 57
  2013. USERROW58: byte; //User Row Byte 58
  2014. USERROW59: byte; //User Row Byte 59
  2015. USERROW60: byte; //User Row Byte 60
  2016. USERROW61: byte; //User Row Byte 61
  2017. USERROW62: byte; //User Row Byte 62
  2018. USERROW63: byte; //User Row Byte 63
  2019. end;
  2020. TVPORT = object //Virtual Ports
  2021. DIR: byte; //Data Direction
  2022. OUT_: byte; //Output Value
  2023. IN_: byte; //Input Value
  2024. INTFLAGS: byte; //Interrupt Flags
  2025. end;
  2026. TVREF = object //Voltage reference
  2027. Reserved0: byte;
  2028. Reserved1: byte;
  2029. DAC0REF: byte; //DAC0 Reference
  2030. Reserved3: byte;
  2031. ACREF: byte; //AC Reference
  2032. const
  2033. // VREF_REFSEL
  2034. REFSELmask = $07;
  2035. REFSEL_1V024 = $00;
  2036. REFSEL_2V048 = $01;
  2037. REFSEL_4V096 = $02;
  2038. REFSEL_2V500 = $03;
  2039. REFSEL_VDD = $05;
  2040. REFSEL_VREFA = $06;
  2041. // Always on
  2042. ALWAYSONbm = $80;
  2043. end;
  2044. TWDT = object //Watch-Dog Timer
  2045. CTRLA: byte; //Control A
  2046. STATUS: byte; //Status
  2047. const
  2048. // WDT_PERIOD
  2049. PERIODmask = $0F;
  2050. PERIOD_OFF = $00;
  2051. PERIOD_8CLK = $01;
  2052. PERIOD_16CLK = $02;
  2053. PERIOD_32CLK = $03;
  2054. PERIOD_64CLK = $04;
  2055. PERIOD_128CLK = $05;
  2056. PERIOD_256CLK = $06;
  2057. PERIOD_512CLK = $07;
  2058. PERIOD_1KCLK = $08;
  2059. PERIOD_2KCLK = $09;
  2060. PERIOD_4KCLK = $0A;
  2061. PERIOD_8KCLK = $0B;
  2062. // WDT_WINDOW
  2063. WINDOWmask = $F0;
  2064. WINDOW_OFF = $00;
  2065. WINDOW_8CLK = $10;
  2066. WINDOW_16CLK = $20;
  2067. WINDOW_32CLK = $30;
  2068. WINDOW_64CLK = $40;
  2069. WINDOW_128CLK = $50;
  2070. WINDOW_256CLK = $60;
  2071. WINDOW_512CLK = $70;
  2072. WINDOW_1KCLK = $80;
  2073. WINDOW_2KCLK = $90;
  2074. WINDOW_4KCLK = $A0;
  2075. WINDOW_8KCLK = $B0;
  2076. // Syncronization busy
  2077. SYNCBUSYbm = $01;
  2078. // Lock enable
  2079. LOCKbm = $80;
  2080. end;
  2081. TWEX = object //Waveform Extension
  2082. CTRLA: byte; //Control A
  2083. CTRLB: byte; //Control B
  2084. CTRLC: byte; //Control C
  2085. Reserved3: byte;
  2086. EVCTRLA: byte; //Event Control A
  2087. EVCTRLB: byte; //Event Control B
  2088. EVCTRLC: byte; //Event Control C
  2089. BUFCTRL: byte; //Buffer Valid Control
  2090. BLANKCTRL: byte; //Blanking Control
  2091. BLANKTIME: byte; //Blanking Time
  2092. FAULTCTRL: byte; //Fault Control
  2093. FAULTDRV: byte; //Fault Drive
  2094. FAULTOUT: byte; //Fault Output
  2095. INTCTRL: byte; //Interrupt Control
  2096. INTFLAGS: byte; //Interrupt Flags
  2097. STATUS: byte; //Status
  2098. DTLS: byte; //Dead-time Low Side
  2099. DTHS: byte; //Dead-time High Side
  2100. DTBOTH: byte; //Dead-time Both Sides
  2101. SWAP: byte; //DTI Swap
  2102. PGMOVR: byte; //Pattern Generation Override
  2103. PGMOUT: byte; //Pattern Generation Output
  2104. Reserved22: byte;
  2105. OUTOVEN: byte; //Output Override Enable
  2106. DTLSBUF: byte; //Dead-time Low Side Buffer
  2107. DTHSBUF: byte; //Dead-time High Side Buffer
  2108. DTBOTHBUF: byte; //Dead-time Both Sides Buffer
  2109. SWAPBUF: byte; //DTI Swap Buffer
  2110. PGMOVRBUF: byte; //Pattern Generation Override Buffer
  2111. PGMOUTBUF: byte; //Pattern Generation Output Buffer
  2112. const
  2113. // Dead-Time Insertion CMP0 Enable
  2114. DTI0ENbm = $01;
  2115. // Dead-Time Insertion CMP1 Enable
  2116. DTI1ENbm = $02;
  2117. // Dead-Time Insertion CMP2 Enable
  2118. DTI2ENbm = $04;
  2119. // Dead-Time Insertion CMP3 Enable
  2120. DTI3ENbm = $08;
  2121. // WEX_INMX
  2122. INMXmask = $70;
  2123. INMX_DIRECT = $00;
  2124. INMX_CWCMA = $20;
  2125. INMX_CWCMB = $30;
  2126. // Pattern Generation Mode
  2127. PGMbm = $80;
  2128. // WEX_UPDSRC
  2129. UPDSRCmask = $03;
  2130. UPDSRC_TCPWM0 = $00;
  2131. UPDSRC_SW = $03;
  2132. // WEX_CMD
  2133. CMDmask = $07;
  2134. CMD_NONE = $00;
  2135. CMD_UPDATE = $01;
  2136. CMD_FAULTSET = $02;
  2137. CMD_FAULTCLR = $03;
  2138. CMD_BLANKSET = $04;
  2139. CMD_BLANKCLR = $05;
  2140. // Fault Event Input Enable
  2141. FAULTEIbm = $01;
  2142. // Fault Event Blanking Enable
  2143. BLANKbm = $02;
  2144. // WEX_FILTER
  2145. FILTERmask = $1C;
  2146. FILTER_ZERO = $00;
  2147. FILTER_SAMPLE1 = $04;
  2148. FILTER_SAMPLE2 = $08;
  2149. FILTER_SAMPLE3 = $0C;
  2150. FILTER_SAMPLE4 = $10;
  2151. FILTER_SAMPLE5 = $14;
  2152. FILTER_SAMPLE6 = $18;
  2153. FILTER_SAMPLE7 = $1C;
  2154. // Dead-time Low Side Buffer Valid
  2155. DTLSBVbm = $01;
  2156. // Dead-time High Side Buffer Valid
  2157. DTHSBVbm = $02;
  2158. // Swap Buffer Valid
  2159. SWAPBVbm = $04;
  2160. // PGM Override Buffer Valid
  2161. PGMOVRBVbm = $08;
  2162. // PGM Output Value Buffer Valid
  2163. PGMOUTBVbm = $10;
  2164. // WEX_BLANKTRIG
  2165. BLANKTRIGmask = $1F;
  2166. BLANKTRIG_NONE = $00;
  2167. BLANKTRIG_TCE0UPD = $04;
  2168. BLANKTRIG_TCE0CMP0 = $08;
  2169. BLANKTRIG_TCE0CMP1 = $0C;
  2170. BLANKTRIG_TCE0CMP2 = $10;
  2171. BLANKTRIG_TCE0CMP3 = $14;
  2172. // WEX_BLANKPRESC
  2173. BLANKPRESCmask = $60;
  2174. BLANKPRESC_DIV1 = $00;
  2175. BLANKPRESC_DIV4 = $20;
  2176. BLANKPRESC_DIV16 = $40;
  2177. BLANKPRESC_DIV64 = $60;
  2178. // WEX_FDACT
  2179. FDACTmask = $03;
  2180. FDACT_NONE = $00;
  2181. FDACT_LOW = $01;
  2182. FDACT_CUSTOM = $03;
  2183. // WEX_FDMODE
  2184. FDMODEmask = $04;
  2185. FDMODE_LATCHED = $00;
  2186. FDMODE_CBC = $04;
  2187. // WEX_FDDBD
  2188. FDDBDmask = $80;
  2189. FDDBD_FAULT = $00;
  2190. FDDBD_IGNORE = $80;
  2191. // Fault Drive Enable Bit 0
  2192. FAULTDRV0bm = $01;
  2193. // Fault Drive Enable Bit 1
  2194. FAULTDRV1bm = $02;
  2195. // Fault Drive Enable Bit 2
  2196. FAULTDRV2bm = $04;
  2197. // Fault Drive Enable Bit 3
  2198. FAULTDRV3bm = $08;
  2199. // Fault Drive Enable Bit 4
  2200. FAULTDRV4bm = $10;
  2201. // Fault Drive Enable Bit 5
  2202. FAULTDRV5bm = $20;
  2203. // Fault Drive Enable Bit 6
  2204. FAULTDRV6bm = $40;
  2205. // Fault Drive Enable Bit 7
  2206. FAULTDRV7bm = $80;
  2207. // Fault Output Value Bit 0
  2208. FAULTOUT0bm = $01;
  2209. // Fault Output Value Bit 1
  2210. FAULTOUT1bm = $02;
  2211. // Fault Output Value Bit 2
  2212. FAULTOUT2bm = $04;
  2213. // Fault Output Value Bit 3
  2214. FAULTOUT3bm = $08;
  2215. // Fault Output Value Bit 4
  2216. FAULTOUT4bm = $10;
  2217. // Fault Output Value Bit 5
  2218. FAULTOUT5bm = $20;
  2219. // Fault Output Value Bit 6
  2220. FAULTOUT6bm = $40;
  2221. // Fault Output Value Bit 7
  2222. FAULTOUT7bm = $80;
  2223. // Fault Detection Interrupt Enable
  2224. FAULTDETbm = $01;
  2225. // Fault Detection Flag Event Input A
  2226. FDFEVAbm = $04;
  2227. // Fault Detection Flag Event Input B
  2228. FDFEVBbm = $08;
  2229. // Fault Detection Flag Event Input C
  2230. FDFEVCbm = $10;
  2231. // WEX_FDSTATE
  2232. FDSTATEmask = $01;
  2233. FDSTATE_NORMAL = $00;
  2234. FDSTATE_FAULT = $01;
  2235. // Fault Detection State Event A
  2236. FDSEVAbm = $04;
  2237. // Fault Detection State Event B
  2238. FDSEVBbm = $08;
  2239. // Fault Detection State Event C
  2240. FDSEVCbm = $10;
  2241. // WEX_BLANKSTATE
  2242. BLANKSTATEmask = $80;
  2243. BLANKSTATE_OFF = $00;
  2244. BLANKSTATE_ON = $80;
  2245. // Swap DTI Output Pair 0
  2246. SWAP0bm = $01;
  2247. // Swap DTI Output Pair 1
  2248. SWAP1bm = $02;
  2249. // Swap DTI Output Pair 2
  2250. SWAP2bm = $04;
  2251. // Swap DTI Output Pair 3
  2252. SWAP3bm = $08;
  2253. // Pattern Generation Override Enable Bit 0
  2254. PGMOVR0bm = $01;
  2255. // Pattern Generation Override Enable Bit 1
  2256. PGMOVR1bm = $02;
  2257. // Pattern Generation Override Enable Bit 2
  2258. PGMOVR2bm = $04;
  2259. // Pattern Generation Override Enable Bit 3
  2260. PGMOVR3bm = $08;
  2261. // Pattern Generation Override Enable Bit 4
  2262. PGMOVR4bm = $10;
  2263. // Pattern Generation Override Enable Bit 5
  2264. PGMOVR5bm = $20;
  2265. // Pattern Generation Override Enable Bit 6
  2266. PGMOVR6bm = $40;
  2267. // Pattern Generation Override Enable Bit 7
  2268. PGMOVR7bm = $80;
  2269. // Pattern Generation Output Value Bit 0
  2270. PGMOUT0bm = $01;
  2271. // Pattern Generation Output Value Bit 1
  2272. PGMOUT1bm = $02;
  2273. // Pattern Generation Output Value Bit 2
  2274. PGMOUT2bm = $04;
  2275. // Pattern Generation Output Value Bit 3
  2276. PGMOUT3bm = $08;
  2277. // Pattern Generation Output Value Bit 4
  2278. PGMOUT4bm = $10;
  2279. // Pattern Generation Output Value Bit 5
  2280. PGMOUT5bm = $20;
  2281. // Pattern Generation Output Value Bit 6
  2282. PGMOUT6bm = $40;
  2283. // Pattern Generation Output Value Bit 7
  2284. PGMOUT7bm = $80;
  2285. // Output Override Enable Bit 0
  2286. OUTOVEN0bm = $01;
  2287. // Output Override Enable Bit 1
  2288. OUTOVEN1bm = $02;
  2289. // Output Override Enable Bit 2
  2290. OUTOVEN2bm = $04;
  2291. // Output Override Enable Bit 3
  2292. OUTOVEN3bm = $08;
  2293. // Output Override Enable Bit 4
  2294. OUTOVEN4bm = $10;
  2295. // Output Override Enable Bit 5
  2296. OUTOVEN5bm = $20;
  2297. // Output Override Enable Bit 6
  2298. OUTOVEN6bm = $40;
  2299. // Output Override Enable Bit 7
  2300. OUTOVEN7bm = $80;
  2301. // Swap DTI Output Pair 0 Buffer
  2302. SWAPBUF0bm = $01;
  2303. // Swap DTI Output Pair 1 Buffer
  2304. SWAPBUF1bm = $02;
  2305. // Swap DTI Output Pair 2 Buffer
  2306. SWAPBUF2bm = $04;
  2307. // Swap DTI Output Pair 3 Buffer
  2308. SWAPBUF3bm = $08;
  2309. // Pattern Generation Override Enable Buffer Bit 0
  2310. PGMOVRBUF0bm = $01;
  2311. // Pattern Generation Override Enable Buffer Bit 1
  2312. PGMOVRBUF1bm = $02;
  2313. // Pattern Generation Override Enable Buffer Bit 2
  2314. PGMOVRBUF2bm = $04;
  2315. // Pattern Generation Override Enable Buffer Bit 3
  2316. PGMOVRBUF3bm = $08;
  2317. // Pattern Generation Override Enable Buffer Bit 4
  2318. PGMOVRBUF4bm = $10;
  2319. // Pattern Generation Override Enable Buffer Bit 5
  2320. PGMOVRBUF5bm = $20;
  2321. // Pattern Generation Override Enable Buffer Bit 6
  2322. PGMOVRBUF6bm = $40;
  2323. // Pattern Generation Override Enable Buffer Bit 7
  2324. PGMOVRBUF7bm = $80;
  2325. // Pattern Generation Output Value Buffer Bit 0
  2326. PGMOUTBUF0bm = $01;
  2327. // Pattern Generation Output Value Buffer Bit 1
  2328. PGMOUTBUF1bm = $02;
  2329. // Pattern Generation Output Value Buffer Bit 2
  2330. PGMOUTBUF2bm = $04;
  2331. // Pattern Generation Output Value Buffer Bit 3
  2332. PGMOUTBUF3bm = $08;
  2333. // Pattern Generation Output Value Buffer Bit 4
  2334. PGMOUTBUF4bm = $10;
  2335. // Pattern Generation Output Value Buffer Bit 5
  2336. PGMOUTBUF5bm = $20;
  2337. // Pattern Generation Output Value Buffer Bit 6
  2338. PGMOUTBUF6bm = $40;
  2339. // Pattern Generation Output Value Buffer Bit 7
  2340. PGMOUTBUF7bm = $80;
  2341. end;
  2342. const
  2343. Pin0idx = 0; Pin0bm = 1;
  2344. Pin1idx = 1; Pin1bm = 2;
  2345. Pin2idx = 2; Pin2bm = 4;
  2346. Pin3idx = 3; Pin3bm = 8;
  2347. Pin4idx = 4; Pin4bm = 16;
  2348. Pin5idx = 5; Pin5bm = 32;
  2349. Pin6idx = 6; Pin6bm = 64;
  2350. Pin7idx = 7; Pin7bm = 128;
  2351. var
  2352. VPORTA: TVPORT absolute $0000;
  2353. VPORTC: TVPORT absolute $0008;
  2354. VPORTD: TVPORT absolute $000C;
  2355. VPORTF: TVPORT absolute $0014;
  2356. GPR: TGPR absolute $001C;
  2357. CPU: TCPU absolute $0030;
  2358. RSTCTRL: TRSTCTRL absolute $0040;
  2359. SLPCTRL: TSLPCTRL absolute $0050;
  2360. CLKCTRL: TCLKCTRL absolute $0060;
  2361. BOD: TBOD absolute $00A0;
  2362. VREF: TVREF absolute $00B0;
  2363. WDT: TWDT absolute $0100;
  2364. CPUINT: TCPUINT absolute $0110;
  2365. CRCSCAN: TCRCSCAN absolute $0120;
  2366. RTC: TRTC absolute $0140;
  2367. CCL: TCCL absolute $01C0;
  2368. EVSYS: TEVSYS absolute $0200;
  2369. PORTA: TPORT absolute $0400;
  2370. PORTC: TPORT absolute $0440;
  2371. PORTD: TPORT absolute $0460;
  2372. PORTF: TPORT absolute $04A0;
  2373. PORTMUX: TPORTMUX absolute $05E0;
  2374. ADC0: TADC absolute $0600;
  2375. AC0: TAC absolute $0680;
  2376. AC1: TAC absolute $0688;
  2377. USART0: TUSART absolute $0800;
  2378. TWI0: TTWI absolute $0900;
  2379. SPI0: TSPI absolute $0940;
  2380. TCE0: TTCE absolute $0A00;
  2381. TCB0: TTCB absolute $0B00;
  2382. TCB1: TTCB absolute $0B10;
  2383. TCF0: TTCF absolute $0C00;
  2384. WEX0: TWEX absolute $0C80;
  2385. SYSCFG: TSYSCFG absolute $0F00;
  2386. NVMCTRL: TNVMCTRL absolute $1000;
  2387. LOCK: TLOCK absolute $1040;
  2388. FUSE: TFUSE absolute $1050;
  2389. SIGROW: TSIGROW absolute $1080;
  2390. BOOTROW: TBOOTROW absolute $1100;
  2391. USERROW: TUSERROW absolute $1200;
  2392. implementation
  2393. {$i avrcommon.inc}
  2394. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  2395. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  2396. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 3
  2397. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 4
  2398. procedure CCL_CCL_ISR; external name 'CCL_CCL_ISR'; // Interrupt 5
  2399. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 6
  2400. procedure WEX0_FAULTDET_ISR; external name 'WEX0_FAULTDET_ISR'; // Interrupt 7
  2401. //procedure WEX0_FDFEVA_ISR; external name 'WEX0_FDFEVA_ISR'; // Interrupt 7
  2402. //procedure WEX0_FDFEVB_ISR; external name 'WEX0_FDFEVB_ISR'; // Interrupt 7
  2403. //procedure WEX0_FDFEVC_ISR; external name 'WEX0_FDFEVC_ISR'; // Interrupt 7
  2404. procedure TCE0_OVF_ISR; external name 'TCE0_OVF_ISR'; // Interrupt 8
  2405. procedure TCE0_CMP0_ISR; external name 'TCE0_CMP0_ISR'; // Interrupt 9
  2406. procedure TCE0_CMP1_ISR; external name 'TCE0_CMP1_ISR'; // Interrupt 10
  2407. procedure TCE0_CMP2_ISR; external name 'TCE0_CMP2_ISR'; // Interrupt 11
  2408. procedure TCE0_CMP3_ISR; external name 'TCE0_CMP3_ISR'; // Interrupt 12
  2409. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 13
  2410. procedure TCB1_INT_ISR; external name 'TCB1_INT_ISR'; // Interrupt 14
  2411. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 15
  2412. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 16
  2413. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 17
  2414. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 18
  2415. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 19
  2416. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 20
  2417. procedure PORTD_PORT_ISR; external name 'PORTD_PORT_ISR'; // Interrupt 21
  2418. procedure TCF0_INT_ISR; external name 'TCF0_INT_ISR'; // Interrupt 22
  2419. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 23
  2420. procedure ADC0_ERROR_ISR; external name 'ADC0_ERROR_ISR'; // Interrupt 24
  2421. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 25
  2422. procedure ADC0_SAMPRDY_ISR; external name 'ADC0_SAMPRDY_ISR'; // Interrupt 26
  2423. procedure AC1_AC_ISR; external name 'AC1_AC_ISR'; // Interrupt 27
  2424. procedure PORTC_PORT_ISR; external name 'PORTC_PORT_ISR'; // Interrupt 28
  2425. procedure PORTF_PORT_ISR; external name 'PORTF_PORT_ISR'; // Interrupt 29
  2426. procedure NVMCTRL_EEREADY_ISR; external name 'NVMCTRL_EEREADY_ISR'; // Interrupt 30
  2427. //procedure NVMCTRL_FLREADY_ISR; external name 'NVMCTRL_FLREADY_ISR'; // Interrupt 30
  2428. //procedure NVMCTRL_NVMREADY_ISR; external name 'NVMCTRL_NVMREADY_ISR'; // Interrupt 30
  2429. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  2430. asm
  2431. jmp __dtors_end
  2432. jmp CRCSCAN_NMI_ISR
  2433. jmp BOD_VLM_ISR
  2434. jmp RTC_CNT_ISR
  2435. jmp RTC_PIT_ISR
  2436. jmp CCL_CCL_ISR
  2437. jmp PORTA_PORT_ISR
  2438. jmp WEX0_FAULTDET_ISR
  2439. // jmp WEX0_FDFEVA_ISR
  2440. // jmp WEX0_FDFEVB_ISR
  2441. // jmp WEX0_FDFEVC_ISR
  2442. jmp TCE0_OVF_ISR
  2443. jmp TCE0_CMP0_ISR
  2444. jmp TCE0_CMP1_ISR
  2445. jmp TCE0_CMP2_ISR
  2446. jmp TCE0_CMP3_ISR
  2447. jmp TCB0_INT_ISR
  2448. jmp TCB1_INT_ISR
  2449. jmp TWI0_TWIS_ISR
  2450. jmp TWI0_TWIM_ISR
  2451. jmp SPI0_INT_ISR
  2452. jmp USART0_RXC_ISR
  2453. jmp USART0_DRE_ISR
  2454. jmp USART0_TXC_ISR
  2455. jmp PORTD_PORT_ISR
  2456. jmp TCF0_INT_ISR
  2457. jmp AC0_AC_ISR
  2458. jmp ADC0_ERROR_ISR
  2459. jmp ADC0_RESRDY_ISR
  2460. jmp ADC0_SAMPRDY_ISR
  2461. jmp AC1_AC_ISR
  2462. jmp PORTC_PORT_ISR
  2463. jmp PORTF_PORT_ISR
  2464. jmp NVMCTRL_EEREADY_ISR
  2465. // jmp NVMCTRL_FLREADY_ISR
  2466. // jmp NVMCTRL_NVMREADY_ISR
  2467. .weak CRCSCAN_NMI_ISR
  2468. .weak BOD_VLM_ISR
  2469. .weak RTC_CNT_ISR
  2470. .weak RTC_PIT_ISR
  2471. .weak CCL_CCL_ISR
  2472. .weak PORTA_PORT_ISR
  2473. .weak WEX0_FAULTDET_ISR
  2474. // .weak WEX0_FDFEVA_ISR
  2475. // .weak WEX0_FDFEVB_ISR
  2476. // .weak WEX0_FDFEVC_ISR
  2477. .weak TCE0_OVF_ISR
  2478. .weak TCE0_CMP0_ISR
  2479. .weak TCE0_CMP1_ISR
  2480. .weak TCE0_CMP2_ISR
  2481. .weak TCE0_CMP3_ISR
  2482. .weak TCB0_INT_ISR
  2483. .weak TCB1_INT_ISR
  2484. .weak TWI0_TWIS_ISR
  2485. .weak TWI0_TWIM_ISR
  2486. .weak SPI0_INT_ISR
  2487. .weak USART0_RXC_ISR
  2488. .weak USART0_DRE_ISR
  2489. .weak USART0_TXC_ISR
  2490. .weak PORTD_PORT_ISR
  2491. .weak TCF0_INT_ISR
  2492. .weak AC0_AC_ISR
  2493. .weak ADC0_ERROR_ISR
  2494. .weak ADC0_RESRDY_ISR
  2495. .weak ADC0_SAMPRDY_ISR
  2496. .weak AC1_AC_ISR
  2497. .weak PORTC_PORT_ISR
  2498. .weak PORTF_PORT_ISR
  2499. .weak NVMCTRL_EEREADY_ISR
  2500. // .weak NVMCTRL_FLREADY_ISR
  2501. // .weak NVMCTRL_NVMREADY_ISR
  2502. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  2503. .set BOD_VLM_ISR, Default_IRQ_handler
  2504. .set RTC_CNT_ISR, Default_IRQ_handler
  2505. .set RTC_PIT_ISR, Default_IRQ_handler
  2506. .set CCL_CCL_ISR, Default_IRQ_handler
  2507. .set PORTA_PORT_ISR, Default_IRQ_handler
  2508. .set WEX0_FAULTDET_ISR, Default_IRQ_handler
  2509. // .set WEX0_FDFEVA_ISR, Default_IRQ_handler
  2510. // .set WEX0_FDFEVB_ISR, Default_IRQ_handler
  2511. // .set WEX0_FDFEVC_ISR, Default_IRQ_handler
  2512. .set TCE0_OVF_ISR, Default_IRQ_handler
  2513. .set TCE0_CMP0_ISR, Default_IRQ_handler
  2514. .set TCE0_CMP1_ISR, Default_IRQ_handler
  2515. .set TCE0_CMP2_ISR, Default_IRQ_handler
  2516. .set TCE0_CMP3_ISR, Default_IRQ_handler
  2517. .set TCB0_INT_ISR, Default_IRQ_handler
  2518. .set TCB1_INT_ISR, Default_IRQ_handler
  2519. .set TWI0_TWIS_ISR, Default_IRQ_handler
  2520. .set TWI0_TWIM_ISR, Default_IRQ_handler
  2521. .set SPI0_INT_ISR, Default_IRQ_handler
  2522. .set USART0_RXC_ISR, Default_IRQ_handler
  2523. .set USART0_DRE_ISR, Default_IRQ_handler
  2524. .set USART0_TXC_ISR, Default_IRQ_handler
  2525. .set PORTD_PORT_ISR, Default_IRQ_handler
  2526. .set TCF0_INT_ISR, Default_IRQ_handler
  2527. .set AC0_AC_ISR, Default_IRQ_handler
  2528. .set ADC0_ERROR_ISR, Default_IRQ_handler
  2529. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  2530. .set ADC0_SAMPRDY_ISR, Default_IRQ_handler
  2531. .set AC1_AC_ISR, Default_IRQ_handler
  2532. .set PORTC_PORT_ISR, Default_IRQ_handler
  2533. .set PORTF_PORT_ISR, Default_IRQ_handler
  2534. .set NVMCTRL_EEREADY_ISR, Default_IRQ_handler
  2535. // .set NVMCTRL_FLREADY_ISR, Default_IRQ_handler
  2536. // .set NVMCTRL_NVMREADY_ISR, Default_IRQ_handler
  2537. end;
  2538. end.