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avr64dd32.pp 61 KB

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  1. unit AVR64DD32;
  2. interface
  3. type
  4. TAC = object //Analog Comparator
  5. CTRLA: byte; //Control A
  6. Reserved1: byte;
  7. MUXCTRL: byte; //Mux Control A
  8. Reserved3: byte;
  9. Reserved4: byte;
  10. DACREF: byte; //DAC Voltage Reference
  11. INTCTRL: byte; //Interrupt Control
  12. STATUS: byte; //Status
  13. const
  14. // Enable
  15. ENABLEbm = $01;
  16. // AC_HYSMODE
  17. HYSMODEmask = $06;
  18. HYSMODE_NONE = $00;
  19. HYSMODE_SMALL = $02;
  20. HYSMODE_MEDIUM = $04;
  21. HYSMODE_LARGE = $06;
  22. // AC_POWER
  23. POWERmask = $18;
  24. POWER_PROFILE0 = $00;
  25. POWER_PROFILE1 = $08;
  26. POWER_PROFILE2 = $10;
  27. POWER_PROFILE3 = $18;
  28. // Output Pad Enable
  29. OUTENbm = $40;
  30. // Run in Standby Mode
  31. RUNSTDBYbm = $80;
  32. // AC_MUXNEG
  33. MUXNEGmask = $07;
  34. MUXNEG_AINN0 = $00;
  35. MUXNEG_AINN2 = $02;
  36. MUXNEG_AINN3 = $03;
  37. MUXNEG_DACREF = $04;
  38. // AC_MUXPOS
  39. MUXPOSmask = $38;
  40. MUXPOS_AINP0 = $00;
  41. MUXPOS_AINP3 = $18;
  42. MUXPOS_AINP4 = $20;
  43. // AC_INITVAL
  44. INITVALmask = $40;
  45. INITVAL_LOW = $00;
  46. INITVAL_HIGH = $40;
  47. // Invert AC Output
  48. INVERTbm = $80;
  49. // Analog Comparator Interrupt Flag
  50. CMPIFbm = $01;
  51. // Analog Comparator State
  52. CMPSTATEbm = $10;
  53. end;
  54. TADC = object //Analog to Digital Converter
  55. CTRLA: byte; //Control A
  56. CTRLB: byte; //Control B
  57. CTRLC: byte; //Control C
  58. CTRLD: byte; //Control D
  59. CTRLE: byte; //Control E
  60. SAMPCTRL: byte; //Sample Control
  61. Reserved6: byte;
  62. Reserved7: byte;
  63. MUXPOS: byte; //Positive mux input
  64. MUXNEG: byte; //Negative mux input
  65. COMMAND: byte; //Command
  66. EVCTRL: byte; //Event Control
  67. INTCTRL: byte; //Interrupt Control
  68. INTFLAGS: byte; //Interrupt Flags
  69. DBGCTRL: byte; //Debug Control
  70. TEMP: byte; //Temporary Data
  71. RES: word; //ADC Accumulator Result
  72. WINLT: word; //Window comparator low threshold
  73. WINHT: word; //Window comparator high threshold
  74. const
  75. // ADC Enable
  76. ENABLEbm = $01;
  77. // Free running mode
  78. FREERUNbm = $02;
  79. // ADC_RESSEL
  80. RESSELmask = $0C;
  81. RESSEL_12BIT = $00;
  82. RESSEL_10BIT = $04;
  83. // Left adjust result
  84. LEFTADJbm = $10;
  85. // ADC_CONVMODE
  86. CONVMODEmask = $20;
  87. CONVMODE_SINGLEENDED = $00;
  88. CONVMODE_DIFF = $20;
  89. // Run standby mode
  90. RUNSTBYbm = $80;
  91. // ADC_SAMPNUM
  92. SAMPNUMmask = $07;
  93. SAMPNUM_NONE = $00;
  94. SAMPNUM_ACC2 = $01;
  95. SAMPNUM_ACC4 = $02;
  96. SAMPNUM_ACC8 = $03;
  97. SAMPNUM_ACC16 = $04;
  98. SAMPNUM_ACC32 = $05;
  99. SAMPNUM_ACC64 = $06;
  100. SAMPNUM_ACC128 = $07;
  101. // ADC_PRESC
  102. PRESCmask = $0F;
  103. PRESC_DIV2 = $00;
  104. PRESC_DIV4 = $01;
  105. PRESC_DIV8 = $02;
  106. PRESC_DIV12 = $03;
  107. PRESC_DIV16 = $04;
  108. PRESC_DIV20 = $05;
  109. PRESC_DIV24 = $06;
  110. PRESC_DIV28 = $07;
  111. PRESC_DIV32 = $08;
  112. PRESC_DIV48 = $09;
  113. PRESC_DIV64 = $0A;
  114. PRESC_DIV96 = $0B;
  115. PRESC_DIV128 = $0C;
  116. PRESC_DIV256 = $0D;
  117. // ADC_SAMPDLY
  118. SAMPDLYmask = $0F;
  119. SAMPDLY_DLY0 = $00;
  120. SAMPDLY_DLY1 = $01;
  121. SAMPDLY_DLY2 = $02;
  122. SAMPDLY_DLY3 = $03;
  123. SAMPDLY_DLY4 = $04;
  124. SAMPDLY_DLY5 = $05;
  125. SAMPDLY_DLY6 = $06;
  126. SAMPDLY_DLY7 = $07;
  127. SAMPDLY_DLY8 = $08;
  128. SAMPDLY_DLY9 = $09;
  129. SAMPDLY_DLY10 = $0A;
  130. SAMPDLY_DLY11 = $0B;
  131. SAMPDLY_DLY12 = $0C;
  132. SAMPDLY_DLY13 = $0D;
  133. SAMPDLY_DLY14 = $0E;
  134. SAMPDLY_DLY15 = $0F;
  135. // ADC_INITDLY
  136. INITDLYmask = $E0;
  137. INITDLY_DLY0 = $00;
  138. INITDLY_DLY16 = $20;
  139. INITDLY_DLY32 = $40;
  140. INITDLY_DLY64 = $60;
  141. INITDLY_DLY128 = $80;
  142. INITDLY_DLY256 = $A0;
  143. // ADC_WINCM
  144. WINCMmask = $07;
  145. WINCM_NONE = $00;
  146. WINCM_BELOW = $01;
  147. WINCM_ABOVE = $02;
  148. WINCM_INSIDE = $03;
  149. WINCM_OUTSIDE = $04;
  150. // ADC_MUXPOS
  151. MUXPOSmask = $7F;
  152. MUXPOS_AIN1 = $01;
  153. MUXPOS_AIN2 = $02;
  154. MUXPOS_AIN3 = $03;
  155. MUXPOS_AIN4 = $04;
  156. MUXPOS_AIN5 = $05;
  157. MUXPOS_AIN6 = $06;
  158. MUXPOS_AIN7 = $07;
  159. MUXPOS_AIN16 = $10;
  160. MUXPOS_AIN17 = $11;
  161. MUXPOS_AIN18 = $12;
  162. MUXPOS_AIN19 = $13;
  163. MUXPOS_AIN20 = $14;
  164. MUXPOS_AIN21 = $15;
  165. MUXPOS_AIN22 = $16;
  166. MUXPOS_AIN23 = $17;
  167. MUXPOS_AIN24 = $18;
  168. MUXPOS_AIN25 = $19;
  169. MUXPOS_AIN26 = $1A;
  170. MUXPOS_AIN27 = $1B;
  171. MUXPOS_AIN28 = $1C;
  172. MUXPOS_AIN29 = $1D;
  173. MUXPOS_AIN30 = $1E;
  174. MUXPOS_AIN31 = $1F;
  175. MUXPOS_GND = $40;
  176. MUXPOS_TEMPSENSE = $42;
  177. MUXPOS_VDDDIV10 = $44;
  178. MUXPOS_VDDIO2DIV10 = $45;
  179. MUXPOS_DAC0 = $48;
  180. MUXPOS_DACREF0 = $49;
  181. // ADC_MUXNEG
  182. MUXNEGmask = $7F;
  183. MUXNEG_AIN1 = $01;
  184. MUXNEG_AIN2 = $02;
  185. MUXNEG_AIN3 = $03;
  186. MUXNEG_AIN4 = $04;
  187. MUXNEG_AIN5 = $05;
  188. MUXNEG_AIN6 = $06;
  189. MUXNEG_AIN7 = $07;
  190. MUXNEG_AIN16 = $10;
  191. MUXNEG_AIN17 = $11;
  192. MUXNEG_AIN18 = $12;
  193. MUXNEG_AIN19 = $13;
  194. MUXNEG_AIN20 = $14;
  195. MUXNEG_AIN21 = $15;
  196. MUXNEG_AIN22 = $16;
  197. MUXNEG_AIN23 = $17;
  198. MUXNEG_AIN24 = $18;
  199. MUXNEG_AIN25 = $19;
  200. MUXNEG_AIN26 = $1A;
  201. MUXNEG_AIN27 = $1B;
  202. MUXNEG_AIN28 = $1C;
  203. MUXNEG_AIN29 = $1D;
  204. MUXNEG_AIN30 = $1E;
  205. MUXNEG_AIN31 = $1F;
  206. MUXNEG_GND = $40;
  207. MUXNEG_DAC0 = $48;
  208. // Start Conversion
  209. STCONVbm = $01;
  210. // Stop Conversion
  211. SPCONVbm = $02;
  212. // Start Event Input Enable
  213. STARTEIbm = $01;
  214. // Result Ready Interrupt Enable
  215. RESRDYbm = $01;
  216. // Window Comparator Interrupt Enable
  217. WCMPbm = $02;
  218. // Debug run
  219. DBGRUNbm = $01;
  220. end;
  221. TBOD = object //Bod interface
  222. CTRLA: byte; //Control A
  223. CTRLB: byte; //Control B
  224. Reserved2: byte;
  225. Reserved3: byte;
  226. Reserved4: byte;
  227. Reserved5: byte;
  228. Reserved6: byte;
  229. Reserved7: byte;
  230. VLMCTRLA: byte; //Voltage level monitor Control
  231. INTCTRL: byte; //Voltage level monitor interrupt Control
  232. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  233. STATUS: byte; //Voltage level monitor status
  234. const
  235. // BOD_SLEEP
  236. SLEEPmask = $03;
  237. SLEEP_DIS = $00;
  238. SLEEP_ENABLED = $01;
  239. SLEEP_SAMPLED = $02;
  240. // BOD_ACTIVE
  241. ACTIVEmask = $0C;
  242. ACTIVE_DIS = $00;
  243. ACTIVE_ENABLED = $04;
  244. ACTIVE_SAMPLED = $08;
  245. ACTIVE_ENWAKE = $0C;
  246. // BOD_SAMPFREQ
  247. SAMPFREQmask = $10;
  248. SAMPFREQ_128HZ = $00;
  249. SAMPFREQ_32HZ = $10;
  250. // BOD_LVL
  251. LVLmask = $07;
  252. LVL_BODLEVEL0 = $00;
  253. LVL_BODLEVEL1 = $01;
  254. LVL_BODLEVEL2 = $02;
  255. LVL_BODLEVEL3 = $03;
  256. // BOD_VLMLVL
  257. VLMLVLmask = $03;
  258. VLMLVL_OFF = $00;
  259. VLMLVL_5ABOVE = $01;
  260. VLMLVL_15ABOVE = $02;
  261. VLMLVL_25ABOVE = $03;
  262. // voltage level monitor interrrupt enable
  263. VLMIEbm = $01;
  264. // BOD_VLMCFG
  265. VLMCFGmask = $06;
  266. VLMCFG_FALLING = $00;
  267. VLMCFG_RISING = $02;
  268. VLMCFG_BOTH = $04;
  269. // Voltage level monitor interrupt flag
  270. VLMIFbm = $01;
  271. // BOD_VLMS
  272. VLMSmask = $01;
  273. VLMS_ABOVE = $00;
  274. VLMS_BELOW = $01;
  275. end;
  276. TCCL = object //Configurable Custom Logic
  277. CTRLA: byte; //Control Register A
  278. SEQCTRL0: byte; //Sequential Control 0
  279. SEQCTRL1: byte; //Sequential Control 1
  280. Reserved3: byte;
  281. Reserved4: byte;
  282. INTCTRL0: byte; //Interrupt Control 0
  283. Reserved6: byte;
  284. INTFLAGS: byte; //Interrupt Flags
  285. LUT0CTRLA: byte; //LUT 0 Control A
  286. LUT0CTRLB: byte; //LUT 0 Control B
  287. LUT0CTRLC: byte; //LUT 0 Control C
  288. TRUTH0: byte; //Truth 0
  289. LUT1CTRLA: byte; //LUT 1 Control A
  290. LUT1CTRLB: byte; //LUT 1 Control B
  291. LUT1CTRLC: byte; //LUT 1 Control C
  292. TRUTH1: byte; //Truth 1
  293. LUT2CTRLA: byte; //LUT 2 Control A
  294. LUT2CTRLB: byte; //LUT 2 Control B
  295. LUT2CTRLC: byte; //LUT 2 Control C
  296. TRUTH2: byte; //Truth 2
  297. LUT3CTRLA: byte; //LUT 3 Control A
  298. LUT3CTRLB: byte; //LUT 3 Control B
  299. LUT3CTRLC: byte; //LUT 3 Control C
  300. TRUTH3: byte; //Truth 3
  301. const
  302. // Enable
  303. ENABLEbm = $01;
  304. // Run in Standby
  305. RUNSTDBYbm = $40;
  306. // CCL_SEQSEL
  307. SEQSELmask = $0F;
  308. SEQSEL_DISABLE = $00;
  309. SEQSEL_DFF = $01;
  310. SEQSEL_JK = $02;
  311. SEQSEL_LATCH = $03;
  312. SEQSEL_RS = $04;
  313. // CCL_INTMODE0
  314. INTMODE0mask = $03;
  315. INTMODE0_INTDISABLE = $00;
  316. INTMODE0_RISING = $01;
  317. INTMODE0_FALLING = $02;
  318. INTMODE0_BOTH = $03;
  319. // CCL_INTMODE1
  320. INTMODE1mask = $0C;
  321. INTMODE1_INTDISABLE = $00;
  322. INTMODE1_RISING = $04;
  323. INTMODE1_FALLING = $08;
  324. INTMODE1_BOTH = $0C;
  325. // CCL_INTMODE2
  326. INTMODE2mask = $30;
  327. INTMODE2_INTDISABLE = $00;
  328. INTMODE2_RISING = $10;
  329. INTMODE2_FALLING = $20;
  330. INTMODE2_BOTH = $30;
  331. // CCL_INTMODE3
  332. INTMODE3mask = $C0;
  333. INTMODE3_INTDISABLE = $00;
  334. INTMODE3_RISING = $40;
  335. INTMODE3_FALLING = $80;
  336. INTMODE3_BOTH = $C0;
  337. // Interrupt Flag
  338. INT0bm = $01;
  339. INT1bm = $02;
  340. INT2bm = $04;
  341. INT3bm = $08;
  342. // CCL_CLKSRC
  343. CLKSRCmask = $0E;
  344. CLKSRC_CLKPER = $00;
  345. CLKSRC_IN2 = $02;
  346. CLKSRC_OSCHF = $08;
  347. CLKSRC_OSC32K = $0A;
  348. CLKSRC_OSC1K = $0C;
  349. // CCL_FILTSEL
  350. FILTSELmask = $30;
  351. FILTSEL_DISABLE = $00;
  352. FILTSEL_SYNCH = $10;
  353. FILTSEL_FILTER = $20;
  354. // Output Enable
  355. OUTENbm = $40;
  356. // CCL_EDGEDET
  357. EDGEDETmask = $80;
  358. EDGEDET_DIS = $00;
  359. EDGEDET_EN = $80;
  360. // CCL_INSEL0
  361. INSEL0mask = $0F;
  362. INSEL0_MASK = $00;
  363. INSEL0_FEEDBACK = $01;
  364. INSEL0_LINK = $02;
  365. INSEL0_EVENTA = $03;
  366. INSEL0_EVENTB = $04;
  367. INSEL0_IN0 = $05;
  368. INSEL0_AC0 = $06;
  369. INSEL0_ZCD3 = $07;
  370. INSEL0_USART0 = $08;
  371. INSEL0_SPI0 = $09;
  372. INSEL0_TCA0 = $0A;
  373. INSEL0_TCB0 = $0B;
  374. INSEL0_TCD0 = $0C;
  375. // CCL_INSEL1
  376. INSEL1mask = $F0;
  377. INSEL1_MASK = $00;
  378. INSEL1_FEEDBACK = $10;
  379. INSEL1_LINK = $20;
  380. INSEL1_EVENTA = $30;
  381. INSEL1_EVENTB = $40;
  382. INSEL1_IN1 = $50;
  383. INSEL1_AC0 = $60;
  384. INSEL1_ZCD3 = $70;
  385. INSEL1_USART1 = $80;
  386. INSEL1_SPI0 = $90;
  387. INSEL1_TCA0 = $A0;
  388. INSEL1_TCB1 = $B0;
  389. INSEL1_TCD0 = $C0;
  390. // CCL_INSEL2
  391. INSEL2mask = $0F;
  392. INSEL2_MASK = $00;
  393. INSEL2_FEEDBACK = $01;
  394. INSEL2_LINK = $02;
  395. INSEL2_EVENTA = $03;
  396. INSEL2_EVENTB = $04;
  397. INSEL2_IN2 = $05;
  398. INSEL2_AC0 = $06;
  399. INSEL2_ZCD3 = $07;
  400. INSEL2_USART1 = $08;
  401. INSEL2_SPI0 = $09;
  402. INSEL2_TCA0 = $0A;
  403. INSEL2_TCB2 = $0B;
  404. INSEL2_TCD0 = $0C;
  405. end;
  406. TCLKCTRL = object //Clock controller
  407. MCLKCTRLA: byte; //MCLK Control A
  408. MCLKCTRLB: byte; //MCLK Control B
  409. MCLKCTRLC: byte; //MCLK Control C
  410. MCLKINTCTRL: byte; //MCLK Interrupt Control
  411. MCLKINTFLAGS: byte; //MCLK Interrupt Flags
  412. MCLKSTATUS: byte; //MCLK Status
  413. Reserved6: byte;
  414. Reserved7: byte;
  415. OSCHFCTRLA: byte; //OSCHF Control A
  416. OSCHFTUNE: byte; //OSCHF Tune
  417. Reserved10: byte;
  418. Reserved11: byte;
  419. Reserved12: byte;
  420. Reserved13: byte;
  421. Reserved14: byte;
  422. Reserved15: byte;
  423. PLLCTRLA: byte; //PLL Control A
  424. Reserved17: byte;
  425. Reserved18: byte;
  426. Reserved19: byte;
  427. Reserved20: byte;
  428. Reserved21: byte;
  429. Reserved22: byte;
  430. Reserved23: byte;
  431. OSC32KCTRLA: byte; //OSC32K Control A
  432. Reserved25: byte;
  433. Reserved26: byte;
  434. Reserved27: byte;
  435. XOSC32KCTRLA: byte; //XOSC32K Control A
  436. Reserved29: byte;
  437. Reserved30: byte;
  438. Reserved31: byte;
  439. XOSCHFCTRLA: byte; //XOSC HF Control A
  440. const
  441. // CLKCTRL_CLKSEL
  442. CLKSELmask = $07;
  443. CLKSEL_OSCHF = $00;
  444. CLKSEL_OSC32K = $01;
  445. CLKSEL_XOSC32K = $02;
  446. CLKSEL_EXTCLK = $03;
  447. // System clock out
  448. CLKOUTbm = $80;
  449. // Prescaler enable
  450. PENbm = $01;
  451. // CLKCTRL_PDIV
  452. PDIVmask = $1E;
  453. PDIV_2X = $00;
  454. PDIV_4X = $02;
  455. PDIV_8X = $04;
  456. PDIV_16X = $06;
  457. PDIV_32X = $08;
  458. PDIV_64X = $0A;
  459. PDIV_6X = $10;
  460. PDIV_10X = $12;
  461. PDIV_12X = $14;
  462. PDIV_24X = $16;
  463. PDIV_48X = $18;
  464. // Clock Failure Detect Enable
  465. CFDENbm = $01;
  466. // Clock Failure Detect Test
  467. CFDTSTbm = $02;
  468. // CLKCTRL_CFDSRC
  469. CFDSRCmask = $0C;
  470. CFDSRC_CLKMAIN = $00;
  471. CFDSRC_XOSCHF = $04;
  472. CFDSRC_XOSC32K = $08;
  473. // Clock Failure Detect Interrupt Enable
  474. CFDbm = $01;
  475. // CLKCTRL_INTTYPE
  476. INTTYPEmask = $80;
  477. INTTYPE_INT = $00;
  478. INTTYPE_NMI = $80;
  479. // System Oscillator changing
  480. SOSCbm = $01;
  481. // High frequency oscillator status
  482. OSCHFSbm = $02;
  483. // 32KHz oscillator status
  484. OSC32KSbm = $04;
  485. // 32.768 kHz Crystal Oscillator status
  486. XOSC32KSbm = $08;
  487. // External Clock status
  488. EXTSbm = $10;
  489. // PLL oscillator status
  490. PLLSbm = $20;
  491. // Autotune
  492. AUTOTUNEbm = $01;
  493. // CLKCTRL_FRQSEL
  494. FRQSELmask = $3C;
  495. FRQSEL_1M = $00;
  496. FRQSEL_2M = $04;
  497. FRQSEL_3M = $08;
  498. FRQSEL_4M = $0C;
  499. FRQSEL_8M = $14;
  500. FRQSEL_12M = $18;
  501. FRQSEL_16M = $1C;
  502. FRQSEL_20M = $20;
  503. FRQSEL_24M = $24;
  504. // Run standby
  505. RUNSTDBYbm = $80;
  506. // CLKCTRL_MULFAC
  507. MULFACmask = $03;
  508. MULFAC_DISABLE = $00;
  509. MULFAC_2x = $01;
  510. MULFAC_3x = $02;
  511. // CLKCTRL_SOURCE
  512. SOURCEmask = $40;
  513. SOURCE_OSCHF = $00;
  514. SOURCE_XOSCHF = $40;
  515. // Enable
  516. ENABLEbm = $01;
  517. // Low power mode
  518. LPMODEbm = $02;
  519. // Select
  520. SELbm = $04;
  521. // CLKCTRL_CSUT
  522. CSUTmask = $30;
  523. CSUT_1K = $00;
  524. CSUT_16K = $10;
  525. CSUT_32K = $20;
  526. CSUT_64K = $30;
  527. // CLKCTRL_SELHF
  528. SELHFmask = $02;
  529. SELHF_XTAL = $00;
  530. SELHF_EXTCLOCK = $02;
  531. // CLKCTRL_FRQRANGE
  532. FRQRANGEmask = $0C;
  533. FRQRANGE_8M = $00;
  534. FRQRANGE_16M = $04;
  535. FRQRANGE_24M = $08;
  536. FRQRANGE_32M = $0C;
  537. // CLKCTRL_CSUTHF
  538. CSUTHFmask = $30;
  539. CSUTHF_256 = $00;
  540. CSUTHF_1K = $10;
  541. CSUTHF_4K = $20;
  542. // Run Standby
  543. RUNSTBYbm = $80;
  544. end;
  545. TCPU = object //CPU
  546. Reserved0: byte;
  547. Reserved1: byte;
  548. Reserved2: byte;
  549. Reserved3: byte;
  550. CCP: byte; //Configuration Change Protection
  551. Reserved5: byte;
  552. Reserved6: byte;
  553. Reserved7: byte;
  554. Reserved8: byte;
  555. Reserved9: byte;
  556. Reserved10: byte;
  557. Reserved11: byte;
  558. Reserved12: byte;
  559. SP: word; //Stack Pointer
  560. SREG: byte; //Status Register
  561. const
  562. // CPU_CCP
  563. CCPmask = $FF;
  564. CCP_SPM = $9D;
  565. CCP_IOREG = $D8;
  566. // Carry Flag
  567. Cbm = $01;
  568. // Zero Flag
  569. Zbm = $02;
  570. // Negative Flag
  571. Nbm = $04;
  572. // Two's Complement Overflow Flag
  573. Vbm = $08;
  574. // N Exclusive Or V Flag
  575. Sbm = $10;
  576. // Half Carry Flag
  577. Hbm = $20;
  578. // Transfer Bit
  579. Tbm = $40;
  580. // Global Interrupt Enable Flag
  581. Ibm = $80;
  582. end;
  583. TCPUINT = object //Interrupt Controller
  584. CTRLA: byte; //Control A
  585. STATUS: byte; //Status
  586. LVL0PRI: byte; //Interrupt Level 0 Priority
  587. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  588. const
  589. // Round-robin Scheduling Enable
  590. LVL0RRbm = $01;
  591. // Compact Vector Table
  592. CVTbm = $20;
  593. // Interrupt Vector Select
  594. IVSELbm = $40;
  595. // Level 0 Interrupt Executing
  596. LVL0EXbm = $01;
  597. // Level 1 Interrupt Executing
  598. LVL1EXbm = $02;
  599. // Non-maskable Interrupt Executing
  600. NMIEXbm = $80;
  601. end;
  602. TCRCSCAN = object //CRCSCAN
  603. CTRLA: byte; //Control A
  604. CTRLB: byte; //Control B
  605. STATUS: byte; //Status
  606. const
  607. // Enable CRC scan
  608. ENABLEbm = $01;
  609. // Enable NMI Trigger
  610. NMIENbm = $02;
  611. // Reset CRC scan
  612. RESETbm = $80;
  613. // CRCSCAN_SRC
  614. SRCmask = $03;
  615. SRC_FLASH = $00;
  616. SRC_APPLICATION = $01;
  617. SRC_BOOT = $02;
  618. // CRC Busy
  619. BUSYbm = $01;
  620. // CRC Ok
  621. OKbm = $02;
  622. end;
  623. TDAC = object //Digital to Analog Converter
  624. CTRLA: byte; //Control Register A
  625. Reserved1: byte;
  626. DATA: word; //DATA Register
  627. const
  628. // DAC Enable
  629. ENABLEbm = $01;
  630. // Output Buffer Enable
  631. OUTENbm = $40;
  632. // Run in Standby Mode
  633. RUNSTDBYbm = $80;
  634. end;
  635. TEVSYS = object //Event System
  636. SWEVENTA: byte; //Software Event A
  637. SWEVENTB: byte; //Software Event B
  638. Reserved2: byte;
  639. Reserved3: byte;
  640. Reserved4: byte;
  641. Reserved5: byte;
  642. Reserved6: byte;
  643. Reserved7: byte;
  644. Reserved8: byte;
  645. Reserved9: byte;
  646. Reserved10: byte;
  647. Reserved11: byte;
  648. Reserved12: byte;
  649. Reserved13: byte;
  650. Reserved14: byte;
  651. Reserved15: byte;
  652. CHANNEL0: byte; //Multiplexer Channel 0
  653. CHANNEL1: byte; //Multiplexer Channel 1
  654. CHANNEL2: byte; //Multiplexer Channel 2
  655. CHANNEL3: byte; //Multiplexer Channel 3
  656. CHANNEL4: byte; //Multiplexer Channel 4
  657. CHANNEL5: byte; //Multiplexer Channel 5
  658. Reserved22: byte;
  659. Reserved23: byte;
  660. Reserved24: byte;
  661. Reserved25: byte;
  662. Reserved26: byte;
  663. Reserved27: byte;
  664. Reserved28: byte;
  665. Reserved29: byte;
  666. Reserved30: byte;
  667. Reserved31: byte;
  668. USERCCLLUT0A: byte; //User 0 - CCL0 Event A
  669. USERCCLLUT0B: byte; //User 1 - CCL0 Event B
  670. USERCCLLUT1A: byte; //User 2 - CCL1 Event A
  671. USERCCLLUT1B: byte; //User 3 - CCL1 Event B
  672. USERCCLLUT2A: byte; //User 4 - CCL2 Event A
  673. USERCCLLUT2B: byte; //User 5 - CCL2 Event B
  674. USERCCLLUT3A: byte; //User 6 - CCL3 Event A
  675. USERCCLLUT3B: byte; //User 7 - CCL3 Event B
  676. USERADC0START: byte; //User 12 - ADC0
  677. USEREVSYSEVOUTA: byte; //User 13 - EVOUTA
  678. USEREVSYSEVOUTC: byte; //User 15 - EVOUTC
  679. USEREVSYSEVOUTD: byte; //User 16 - EVOUTD
  680. USEREVSYSEVOUTF: byte; //User 18 - EVOUTF
  681. USERUSART0IRDA: byte; //User 20 - USART0
  682. USERUSART1IRDA: byte; //User 21 - USART1
  683. USERTCA0CNTA: byte; //User 26 - TCA0 Event A
  684. USERTCA0CNTB: byte; //User 27 - TCA0 Event B
  685. USERTCB0CAPT: byte; //User 30 - TCB0 Event A
  686. USERTCB0COUNT: byte; //User 31 - TCB0 Event B
  687. USERTCB1CAPT: byte; //User 32 - TCB1 Event A
  688. USERTCB1COUNT: byte; //User 33 - TCB1 Event B
  689. USERTCB2CAPT: byte; //User 34 - TCB2 Event A
  690. USERTCB2COUNT: byte; //User 35 - TCB2 Event B
  691. USERTCD0INPUTA: byte; //User 40 - TCD0 Event A
  692. USERTCD0INPUTB: byte; //User 41 - TCD0 Event B
  693. const
  694. // EVSYS_SWEVENTA
  695. SWEVENTAmask = $FF;
  696. SWEVENTA_CH0 = $01;
  697. SWEVENTA_CH1 = $02;
  698. SWEVENTA_CH2 = $04;
  699. SWEVENTA_CH3 = $08;
  700. SWEVENTA_CH4 = $10;
  701. SWEVENTA_CH5 = $20;
  702. SWEVENTA_CH6 = $40;
  703. SWEVENTA_CH7 = $80;
  704. // EVSYS_SWEVENTB
  705. SWEVENTBmask = $03;
  706. SWEVENTB_CH8 = $00;
  707. SWEVENTB_CH9 = $01;
  708. // EVSYS_CHANNEL0
  709. CHANNEL0mask = $FF;
  710. CHANNEL0_OFF = $00;
  711. CHANNEL0_UPDI_SYNCH = $01;
  712. CHANNEL0_MVIO = $05;
  713. CHANNEL0_RTC_OVF = $06;
  714. CHANNEL0_RTC_CMP = $07;
  715. CHANNEL0_RTC_PIT_DIV8192 = $08;
  716. CHANNEL0_RTC_PIT_DIV4096 = $09;
  717. CHANNEL0_RTC_PIT_DIV2048 = $0A;
  718. CHANNEL0_RTC_PIT_DIV1024 = $0B;
  719. CHANNEL0_CCL_LUT0 = $10;
  720. CHANNEL0_CCL_LUT1 = $11;
  721. CHANNEL0_CCL_LUT2 = $12;
  722. CHANNEL0_CCL_LUT3 = $13;
  723. CHANNEL0_AC0_OUT = $20;
  724. CHANNEL0_ADC0_RESRDY = $24;
  725. CHANNEL0_ZCD3 = $30;
  726. CHANNEL0_PORTA_PIN0 = $40;
  727. CHANNEL0_PORTA_PIN1 = $41;
  728. CHANNEL0_PORTA_PIN2 = $42;
  729. CHANNEL0_PORTA_PIN3 = $43;
  730. CHANNEL0_PORTA_PIN4 = $44;
  731. CHANNEL0_PORTA_PIN5 = $45;
  732. CHANNEL0_PORTA_PIN6 = $46;
  733. CHANNEL0_PORTA_PIN7 = $47;
  734. CHANNEL0_USART0_XCK = $60;
  735. CHANNEL0_USART1_XCK = $61;
  736. CHANNEL0_SPI0_SCK = $68;
  737. CHANNEL0_TCA0_OVF_LUNF = $80;
  738. CHANNEL0_TCA0_HUNF = $81;
  739. CHANNEL0_TCA0_CMP0_LCMP0 = $84;
  740. CHANNEL0_TCA0_CMP1_LCMP1 = $85;
  741. CHANNEL0_TCA0_CMP2_LCMP2 = $86;
  742. CHANNEL0_TCB0_CAPT = $A0;
  743. CHANNEL0_TCB0_OVF = $A1;
  744. CHANNEL0_TCB1_CAPT = $A2;
  745. CHANNEL0_TCB1_OVF = $A3;
  746. CHANNEL0_TCB2_CAPT = $A4;
  747. CHANNEL0_TCB2_OVF = $A5;
  748. CHANNEL0_TCD0_CMPBCLR = $B0;
  749. CHANNEL0_TCD0_CMPASET = $B1;
  750. CHANNEL0_TCD0_CMPBSET = $B2;
  751. CHANNEL0_TCD0_PROGEV = $B3;
  752. // EVSYS_CHANNEL1
  753. CHANNEL1mask = $FF;
  754. CHANNEL1_OFF = $00;
  755. CHANNEL1_UPDI_SYNCH = $01;
  756. CHANNEL1_MVIO = $05;
  757. CHANNEL1_RTC_OVF = $06;
  758. CHANNEL1_RTC_CMP = $07;
  759. CHANNEL1_RTC_PIT_DIV512 = $08;
  760. CHANNEL1_RTC_PIT_DIV256 = $09;
  761. CHANNEL1_RTC_PIT_DIV128 = $0A;
  762. CHANNEL1_RTC_PIT_DIV64 = $0B;
  763. CHANNEL1_CCL_LUT0 = $10;
  764. CHANNEL1_CCL_LUT1 = $11;
  765. CHANNEL1_CCL_LUT2 = $12;
  766. CHANNEL1_CCL_LUT3 = $13;
  767. CHANNEL1_AC0_OUT = $20;
  768. CHANNEL1_ADC0_RESRDY = $24;
  769. CHANNEL1_ZCD3 = $30;
  770. CHANNEL1_PORTA_PIN0 = $40;
  771. CHANNEL1_PORTA_PIN1 = $41;
  772. CHANNEL1_PORTA_PIN2 = $42;
  773. CHANNEL1_PORTA_PIN3 = $43;
  774. CHANNEL1_PORTA_PIN4 = $44;
  775. CHANNEL1_PORTA_PIN5 = $45;
  776. CHANNEL1_PORTA_PIN6 = $46;
  777. CHANNEL1_PORTA_PIN7 = $47;
  778. CHANNEL1_USART0_XCK = $60;
  779. CHANNEL1_USART1_XCK = $61;
  780. CHANNEL1_SPI0_SCK = $68;
  781. CHANNEL1_TCA0_OVF_LUNF = $80;
  782. CHANNEL1_TCA0_HUNF = $81;
  783. CHANNEL1_TCA0_CMP0_LCMP0 = $84;
  784. CHANNEL1_TCA0_CMP1_LCMP1 = $85;
  785. CHANNEL1_TCA0_CMP2_LCMP2 = $86;
  786. CHANNEL1_TCB0_CAPT = $A0;
  787. CHANNEL1_TCB0_OVF = $A1;
  788. CHANNEL1_TCB1_CAPT = $A2;
  789. CHANNEL1_TCB1_OVF = $A3;
  790. CHANNEL1_TCB2_CAPT = $A4;
  791. CHANNEL1_TCB2_OVF = $A5;
  792. CHANNEL1_TCD0_CMPBCLR = $B0;
  793. CHANNEL1_TCD0_CMPASET = $B1;
  794. CHANNEL1_TCD0_CMPBSET = $B2;
  795. CHANNEL1_TCD0_PROGEV = $B3;
  796. // EVSYS_CHANNEL2
  797. CHANNEL2mask = $FF;
  798. CHANNEL2_OFF = $00;
  799. CHANNEL2_UPDI_SYNCH = $01;
  800. CHANNEL2_MVIO = $05;
  801. CHANNEL2_RTC_OVF = $06;
  802. CHANNEL2_RTC_CMP = $07;
  803. CHANNEL2_RTC_PIT_DIV8192 = $08;
  804. CHANNEL2_RTC_PIT_DIV4096 = $09;
  805. CHANNEL2_RTC_PIT_DIV2048 = $0A;
  806. CHANNEL2_RTC_PIT_DIV1024 = $0B;
  807. CHANNEL2_CCL_LUT0 = $10;
  808. CHANNEL2_CCL_LUT1 = $11;
  809. CHANNEL2_CCL_LUT2 = $12;
  810. CHANNEL2_CCL_LUT3 = $13;
  811. CHANNEL2_AC0_OUT = $20;
  812. CHANNEL2_ADC0_RESRDY = $24;
  813. CHANNEL2_ZCD3 = $30;
  814. CHANNEL2_PORTC_PIN0 = $40;
  815. CHANNEL2_PORTC_PIN1 = $41;
  816. CHANNEL2_PORTC_PIN2 = $42;
  817. CHANNEL2_PORTC_PIN3 = $43;
  818. CHANNEL2_PORTD_PIN1 = $49;
  819. CHANNEL2_PORTD_PIN2 = $4A;
  820. CHANNEL2_PORTD_PIN3 = $4B;
  821. CHANNEL2_PORTD_PIN4 = $4C;
  822. CHANNEL2_PORTD_PIN5 = $4D;
  823. CHANNEL2_PORTD_PIN6 = $4E;
  824. CHANNEL2_PORTD_PIN7 = $4F;
  825. CHANNEL2_USART0_XCK = $60;
  826. CHANNEL2_USART1_XCK = $61;
  827. CHANNEL2_SPI0_SCK = $68;
  828. CHANNEL2_TCA0_OVF_LUNF = $80;
  829. CHANNEL2_TCA0_HUNF = $81;
  830. CHANNEL2_TCA0_CMP0_LCMP0 = $84;
  831. CHANNEL2_TCA0_CMP1_LCMP1 = $85;
  832. CHANNEL2_TCA0_CMP2_LCMP2 = $86;
  833. CHANNEL2_TCB0_CAPT = $A0;
  834. CHANNEL2_TCB0_OVF = $A1;
  835. CHANNEL2_TCB1_CAPT = $A2;
  836. CHANNEL2_TCB1_OVF = $A3;
  837. CHANNEL2_TCB2_CAPT = $A4;
  838. CHANNEL2_TCB2_OVF = $A5;
  839. CHANNEL2_TCD0_CMPBCLR = $B0;
  840. CHANNEL2_TCD0_CMPASET = $B1;
  841. CHANNEL2_TCD0_CMPBSET = $B2;
  842. CHANNEL2_TCD0_PROGEV = $B3;
  843. // EVSYS_CHANNEL3
  844. CHANNEL3mask = $FF;
  845. CHANNEL3_OFF = $00;
  846. CHANNEL3_UPDI_SYNCH = $01;
  847. CHANNEL3_MVIO = $05;
  848. CHANNEL3_RTC_OVF = $06;
  849. CHANNEL3_RTC_CMP = $07;
  850. CHANNEL3_RTC_PIT_DIV512 = $08;
  851. CHANNEL3_RTC_PIT_DIV256 = $09;
  852. CHANNEL3_RTC_PIT_DIV128 = $0A;
  853. CHANNEL3_RTC_PIT_DIV64 = $0B;
  854. CHANNEL3_CCL_LUT0 = $10;
  855. CHANNEL3_CCL_LUT1 = $11;
  856. CHANNEL3_CCL_LUT2 = $12;
  857. CHANNEL3_CCL_LUT3 = $13;
  858. CHANNEL3_AC0_OUT = $20;
  859. CHANNEL3_ADC0_RESRDY = $24;
  860. CHANNEL3_ZCD3 = $30;
  861. CHANNEL3_PORTC_PIN0 = $40;
  862. CHANNEL3_PORTC_PIN1 = $41;
  863. CHANNEL3_PORTC_PIN2 = $42;
  864. CHANNEL3_PORTC_PIN3 = $43;
  865. CHANNEL3_PORTD_PIN1 = $49;
  866. CHANNEL3_PORTD_PIN2 = $4A;
  867. CHANNEL3_PORTD_PIN3 = $4B;
  868. CHANNEL3_PORTD_PIN4 = $4C;
  869. CHANNEL3_PORTD_PIN5 = $4D;
  870. CHANNEL3_PORTD_PIN6 = $4E;
  871. CHANNEL3_PORTD_PIN7 = $4F;
  872. CHANNEL3_USART0_XCK = $60;
  873. CHANNEL3_USART1_XCK = $61;
  874. CHANNEL3_SPI0_SCK = $68;
  875. CHANNEL3_TCA0_OVF_LUNF = $80;
  876. CHANNEL3_TCA0_HUNF = $81;
  877. CHANNEL3_TCA0_CMP0_LCMP0 = $84;
  878. CHANNEL3_TCA0_CMP1_LCMP1 = $85;
  879. CHANNEL3_TCA0_CMP2_LCMP2 = $86;
  880. CHANNEL3_TCB0_CAPT = $A0;
  881. CHANNEL3_TCB0_OVF = $A1;
  882. CHANNEL3_TCB1_CAPT = $A2;
  883. CHANNEL3_TCB1_OVF = $A3;
  884. CHANNEL3_TCB2_CAPT = $A4;
  885. CHANNEL3_TCB2_OVF = $A5;
  886. CHANNEL3_TCD0_CMPBCLR = $B0;
  887. CHANNEL3_TCD0_CMPASET = $B1;
  888. CHANNEL3_TCD0_CMPBSET = $B2;
  889. CHANNEL3_TCD0_PROGEV = $B3;
  890. // EVSYS_CHANNEL4
  891. CHANNEL4mask = $FF;
  892. CHANNEL4_OFF = $00;
  893. CHANNEL4_UPDI_SYNCH = $01;
  894. CHANNEL4_MVIO = $05;
  895. CHANNEL4_RTC_OVF = $06;
  896. CHANNEL4_RTC_CMP = $07;
  897. CHANNEL4_RTC_PIT_DIV8192 = $08;
  898. CHANNEL4_RTC_PIT_DIV4096 = $09;
  899. CHANNEL4_RTC_PIT_DIV2048 = $0A;
  900. CHANNEL4_RTC_PIT_DIV1024 = $0B;
  901. CHANNEL4_CCL_LUT0 = $10;
  902. CHANNEL4_CCL_LUT1 = $11;
  903. CHANNEL4_CCL_LUT2 = $12;
  904. CHANNEL4_CCL_LUT3 = $13;
  905. CHANNEL4_AC0_OUT = $20;
  906. CHANNEL4_ADC0_RESRDY = $24;
  907. CHANNEL4_ZCD3 = $30;
  908. CHANNEL4_PORTF_PIN0 = $48;
  909. CHANNEL4_PORTF_PIN1 = $49;
  910. CHANNEL4_PORTF_PIN2 = $4A;
  911. CHANNEL4_PORTF_PIN3 = $4B;
  912. CHANNEL4_PORTF_PIN4 = $4C;
  913. CHANNEL4_PORTF_PIN5 = $4D;
  914. CHANNEL4_PORTF_PIN6 = $4E;
  915. CHANNEL4_PORTF_PIN7 = $4F;
  916. CHANNEL4_USART0_XCK = $60;
  917. CHANNEL4_USART1_XCK = $61;
  918. CHANNEL4_SPI0_SCK = $68;
  919. CHANNEL4_TCA0_OVF_LUNF = $80;
  920. CHANNEL4_TCA0_HUNF = $81;
  921. CHANNEL4_TCA0_CMP0_LCMP0 = $84;
  922. CHANNEL4_TCA0_CMP1_LCMP1 = $85;
  923. CHANNEL4_TCA0_CMP2_LCMP2 = $86;
  924. CHANNEL4_TCB0_CAPT = $A0;
  925. CHANNEL4_TCB0_OVF = $A1;
  926. CHANNEL4_TCB1_CAPT = $A2;
  927. CHANNEL4_TCB1_OVF = $A3;
  928. CHANNEL4_TCB2_CAPT = $A4;
  929. CHANNEL4_TCB2_OVF = $A5;
  930. CHANNEL4_TCD0_CMPBCLR = $B0;
  931. CHANNEL4_TCD0_CMPASET = $B1;
  932. CHANNEL4_TCD0_CMPBSET = $B2;
  933. CHANNEL4_TCD0_PROGEV = $B3;
  934. // EVSYS_CHANNEL5
  935. CHANNEL5mask = $FF;
  936. CHANNEL5_OFF = $00;
  937. CHANNEL5_UPDI_SYNCH = $01;
  938. CHANNEL5_MVIO = $05;
  939. CHANNEL5_RTC_OVF = $06;
  940. CHANNEL5_RTC_CMP = $07;
  941. CHANNEL5_RTC_PIT_DIV512 = $08;
  942. CHANNEL5_RTC_PIT_DIV256 = $09;
  943. CHANNEL5_RTC_PIT_DIV128 = $0A;
  944. CHANNEL5_RTC_PIT_DIV64 = $0B;
  945. CHANNEL5_CCL_LUT0 = $10;
  946. CHANNEL5_CCL_LUT1 = $11;
  947. CHANNEL5_CCL_LUT2 = $12;
  948. CHANNEL5_CCL_LUT3 = $13;
  949. CHANNEL5_AC0_OUT = $20;
  950. CHANNEL5_ADC0_RESRDY = $24;
  951. CHANNEL5_ZCD3 = $30;
  952. CHANNEL5_PORTF_PIN0 = $48;
  953. CHANNEL5_PORTF_PIN1 = $49;
  954. CHANNEL5_PORTF_PIN2 = $4A;
  955. CHANNEL5_PORTF_PIN3 = $4B;
  956. CHANNEL5_PORTF_PIN4 = $4C;
  957. CHANNEL5_PORTF_PIN5 = $4D;
  958. CHANNEL5_PORTF_PIN6 = $4E;
  959. CHANNEL5_PORTF_PIN7 = $4F;
  960. CHANNEL5_USART0_XCK = $60;
  961. CHANNEL5_USART1_XCK = $61;
  962. CHANNEL5_SPI0_SCK = $68;
  963. CHANNEL5_TCA0_OVF_LUNF = $80;
  964. CHANNEL5_TCA0_HUNF = $81;
  965. CHANNEL5_TCA0_CMP0_LCMP0 = $84;
  966. CHANNEL5_TCA0_CMP1_LCMP1 = $85;
  967. CHANNEL5_TCA0_CMP2_LCMP2 = $86;
  968. CHANNEL5_TCB0_CAPT = $A0;
  969. CHANNEL5_TCB0_OVF = $A1;
  970. CHANNEL5_TCB1_CAPT = $A2;
  971. CHANNEL5_TCB1_OVF = $A3;
  972. CHANNEL5_TCB2_CAPT = $A4;
  973. CHANNEL5_TCB2_OVF = $A5;
  974. CHANNEL5_TCD0_CMPBCLR = $B0;
  975. CHANNEL5_TCD0_CMPASET = $B1;
  976. CHANNEL5_TCD0_CMPBSET = $B2;
  977. CHANNEL5_TCD0_PROGEV = $B3;
  978. // EVSYS_USER
  979. USERmask = $FF;
  980. USER_OFF = $00;
  981. USER_CHANNEL0 = $01;
  982. USER_CHANNEL1 = $02;
  983. USER_CHANNEL2 = $03;
  984. USER_CHANNEL3 = $04;
  985. USER_CHANNEL4 = $05;
  986. USER_CHANNEL5 = $06;
  987. end;
  988. TFUSE = object //Fuses
  989. WDTCFG: byte; //Watchdog Configuration
  990. BODCFG: byte; //BOD Configuration
  991. OSCCFG: byte; //Oscillator Configuration
  992. Reserved3: byte;
  993. Reserved4: byte;
  994. SYSCFG0: byte; //System Configuration 0
  995. SYSCFG1: byte; //System Configuration 1
  996. CODESIZE: byte; //Code Section Size
  997. BOOTSIZE: byte; //Boot Section Size
  998. const
  999. // FUSE_PERIOD
  1000. PERIODmask = $0F;
  1001. PERIOD_OFF = $00;
  1002. PERIOD_8CLK = $01;
  1003. PERIOD_16CLK = $02;
  1004. PERIOD_32CLK = $03;
  1005. PERIOD_64CLK = $04;
  1006. PERIOD_128CLK = $05;
  1007. PERIOD_256CLK = $06;
  1008. PERIOD_512CLK = $07;
  1009. PERIOD_1KCLK = $08;
  1010. PERIOD_2KCLK = $09;
  1011. PERIOD_4KCLK = $0A;
  1012. PERIOD_8KCLK = $0B;
  1013. // FUSE_WINDOW
  1014. WINDOWmask = $F0;
  1015. WINDOW_OFF = $00;
  1016. WINDOW_8CLK = $10;
  1017. WINDOW_16CLK = $20;
  1018. WINDOW_32CLK = $30;
  1019. WINDOW_64CLK = $40;
  1020. WINDOW_128CLK = $50;
  1021. WINDOW_256CLK = $60;
  1022. WINDOW_512CLK = $70;
  1023. WINDOW_1KCLK = $80;
  1024. WINDOW_2KCLK = $90;
  1025. WINDOW_4KCLK = $A0;
  1026. WINDOW_8KCLK = $B0;
  1027. // FUSE_SLEEP
  1028. SLEEPmask = $03;
  1029. SLEEP_DISABLE = $00;
  1030. SLEEP_ENABLE = $01;
  1031. SLEEP_SAMPLE = $02;
  1032. // FUSE_ACTIVE
  1033. ACTIVEmask = $0C;
  1034. ACTIVE_DISABLE = $00;
  1035. ACTIVE_ENABLE = $04;
  1036. ACTIVE_SAMPLE = $08;
  1037. ACTIVE_ENABLEWAIT = $0C;
  1038. // FUSE_SAMPFREQ
  1039. SAMPFREQmask = $10;
  1040. SAMPFREQ_128Hz = $00;
  1041. SAMPFREQ_32Hz = $10;
  1042. // FUSE_LVL
  1043. LVLmask = $E0;
  1044. LVL_BODLEVEL0 = $00;
  1045. LVL_BODLEVEL1 = $20;
  1046. LVL_BODLEVEL2 = $40;
  1047. LVL_BODLEVEL3 = $60;
  1048. // FUSE_CLKSEL
  1049. CLKSELmask = $07;
  1050. CLKSEL_OSCHF = $00;
  1051. CLKSEL_OSC32K = $01;
  1052. // EEPROM Save
  1053. EESAVEbm = $01;
  1054. // FUSE_RSTPINCFG
  1055. RSTPINCFGmask = $08;
  1056. RSTPINCFG_GPIO = $00;
  1057. RSTPINCFG_RST = $08;
  1058. // FUSE_UPDIPINCFG
  1059. UPDIPINCFGmask = $10;
  1060. UPDIPINCFG_GPIO = $00;
  1061. UPDIPINCFG_UPDI = $10;
  1062. // FUSE_CRCSEL
  1063. CRCSELmask = $20;
  1064. CRCSEL_CRC16 = $00;
  1065. CRCSEL_CRC32 = $20;
  1066. // FUSE_CRCSRC
  1067. CRCSRCmask = $C0;
  1068. CRCSRC_FLASH = $00;
  1069. CRCSRC_BOOT = $40;
  1070. CRCSRC_BOOTAPP = $80;
  1071. CRCSRC_NOCRC = $C0;
  1072. // FUSE_SUT
  1073. SUTmask = $07;
  1074. SUT_0MS = $00;
  1075. SUT_1MS = $01;
  1076. SUT_2MS = $02;
  1077. SUT_4MS = $03;
  1078. SUT_8MS = $04;
  1079. SUT_16MS = $05;
  1080. SUT_32MS = $06;
  1081. SUT_64MS = $07;
  1082. // FUSE_MVSYSCFG
  1083. MVSYSCFGmask = $18;
  1084. MVSYSCFG_DUAL = $08;
  1085. MVSYSCFG_SINGLE = $10;
  1086. end;
  1087. TGPR = object //General Purpose Registers
  1088. GPR0: byte; //General Purpose Register 0
  1089. GPR1: byte; //General Purpose Register 1
  1090. GPR2: byte; //General Purpose Register 2
  1091. GPR3: byte; //General Purpose Register 3
  1092. end;
  1093. TLOCK = object //Lockbits
  1094. KEY: dword; //Lock Key Bits
  1095. const
  1096. // LOCK_KEY
  1097. KEYmask = $FFFFFFFF;
  1098. KEY_NOLOCK = $5CC5C55C;
  1099. KEY_RWLOCK = $A33A3AA3;
  1100. end;
  1101. TMVIO = object //Multi-Voltage I/O
  1102. INTCTRL: byte; //Interrupt Control
  1103. INTFLAGS: byte; //Interrupt Flags
  1104. STATUS: byte; //Status
  1105. const
  1106. // VDDIO2 Interrupt Enable
  1107. VDDIO2IEbm = $01;
  1108. // VDDIO2 Interrupt Flag
  1109. VDDIO2IFbm = $01;
  1110. // VDDIO2 Status
  1111. VDDIO2Sbm = $01;
  1112. end;
  1113. TNVMCTRL = object //Non-volatile Memory Controller
  1114. CTRLA: byte; //Control A
  1115. CTRLB: byte; //Control B
  1116. STATUS: byte; //Status
  1117. INTCTRL: byte; //Interrupt Control
  1118. INTFLAGS: byte; //Interrupt Flags
  1119. Reserved5: byte;
  1120. DATA: word; //Data
  1121. ADDR: dword; //Address
  1122. const
  1123. // NVMCTRL_CMD
  1124. CMDmask = $7F;
  1125. CMD_NONE = $00;
  1126. CMD_NOOP = $01;
  1127. CMD_FLWR = $02;
  1128. CMD_FLPER = $08;
  1129. CMD_FLMPER2 = $09;
  1130. CMD_FLMPER4 = $0A;
  1131. CMD_FLMPER8 = $0B;
  1132. CMD_FLMPER16 = $0C;
  1133. CMD_FLMPER32 = $0D;
  1134. CMD_EEWR = $12;
  1135. CMD_EEERWR = $13;
  1136. CMD_EEBER = $18;
  1137. CMD_EEMBER2 = $19;
  1138. CMD_EEMBER4 = $1A;
  1139. CMD_EEMBER8 = $1B;
  1140. CMD_EEMBER16 = $1C;
  1141. CMD_EEMBER32 = $1D;
  1142. CMD_CHER = $20;
  1143. CMD_EECHER = $30;
  1144. // Application Code Write Protect
  1145. APPCODEWPbm = $01;
  1146. // Boot Read Protect
  1147. BOOTRPbm = $02;
  1148. // Application Data Write Protect
  1149. APPDATAWPbm = $04;
  1150. // NVMCTRL_FLMAP
  1151. FLMAPmask = $30;
  1152. FLMAP_SECTION0 = $00;
  1153. FLMAP_SECTION1 = $10;
  1154. FLMAP_SECTION2 = $20;
  1155. FLMAP_SECTION3 = $30;
  1156. // Flash Mapping Lock
  1157. FLMAPLOCKbm = $80;
  1158. // Flash busy
  1159. FBUSYbm = $01;
  1160. // EEPROM busy
  1161. EEBUSYbm = $02;
  1162. // NVMCTRL_ERROR
  1163. ERRORmask = $70;
  1164. ERROR_NOERROR = $00;
  1165. ERROR_ILLEGALCMD = $10;
  1166. ERROR_ILLEGALSADDR = $20;
  1167. ERROR_DOUBLESELECT = $30;
  1168. ERROR_ONGOINGPROG = $40;
  1169. // EEPROM Ready
  1170. EEREADYbm = $01;
  1171. end;
  1172. TPORT = object //I/O Ports
  1173. DIR: byte; //Data Direction
  1174. DIRSET: byte; //Data Direction Set
  1175. DIRCLR: byte; //Data Direction Clear
  1176. DIRTGL: byte; //Data Direction Toggle
  1177. OUT_: byte; //Output Value
  1178. OUTSET: byte; //Output Value Set
  1179. OUTCLR: byte; //Output Value Clear
  1180. OUTTGL: byte; //Output Value Toggle
  1181. IN_: byte; //Input Value
  1182. INTFLAGS: byte; //Interrupt Flags
  1183. PORTCTRL: byte; //Port Control
  1184. PINCONFIG: byte; //Pin Control Config
  1185. PINCTRLUPD: byte; //Pin Control Update
  1186. PINCTRLSET: byte; //Pin Control Set
  1187. PINCTRLCLR: byte; //Pin Control Clear
  1188. Reserved15: byte;
  1189. PIN0CTRL: byte; //Pin 0 Control
  1190. PIN1CTRL: byte; //Pin 1 Control
  1191. PIN2CTRL: byte; //Pin 2 Control
  1192. PIN3CTRL: byte; //Pin 3 Control
  1193. PIN4CTRL: byte; //Pin 4 Control
  1194. PIN5CTRL: byte; //Pin 5 Control
  1195. PIN6CTRL: byte; //Pin 6 Control
  1196. PIN7CTRL: byte; //Pin 7 Control
  1197. const
  1198. // Slew Rate Limit Enable
  1199. SRLbm = $01;
  1200. // PORT_ISC
  1201. ISCmask = $07;
  1202. ISC_INTDISABLE = $00;
  1203. ISC_BOTHEDGES = $01;
  1204. ISC_RISING = $02;
  1205. ISC_FALLING = $03;
  1206. ISC_INPUT_DISABLE = $04;
  1207. ISC_LEVEL = $05;
  1208. // Pullup enable
  1209. PULLUPENbm = $08;
  1210. // Input level select
  1211. INLVLbm = $40;
  1212. // Inverted I/O Enable
  1213. INVENbm = $80;
  1214. end;
  1215. TPORTMUX = object //Port Multiplexer
  1216. EVSYSROUTEA: byte; //EVSYS route A
  1217. CCLROUTEA: byte; //CCL route A
  1218. USARTROUTEA: byte; //USART route A
  1219. Reserved3: byte;
  1220. Reserved4: byte;
  1221. SPIROUTEA: byte; //SPI route A
  1222. TWIROUTEA: byte; //TWI route A
  1223. TCAROUTEA: byte; //TCA route A
  1224. TCBROUTEA: byte; //TCB route A
  1225. TCDROUTEA: byte; //TCD route A
  1226. const
  1227. // PORTMUX_EVOUTA
  1228. EVOUTAmask = $01;
  1229. EVOUTA_DEFAULT = $00;
  1230. EVOUTA_ALT1 = $01;
  1231. // PORTMUX_EVOUTC
  1232. EVOUTCmask = $04;
  1233. EVOUTC_DEFAULT = $00;
  1234. // PORTMUX_EVOUTD
  1235. EVOUTDmask = $08;
  1236. EVOUTD_DEFAULT = $00;
  1237. EVOUTD_ALT1 = $08;
  1238. // PORTMUX_EVOUTF
  1239. EVOUTFmask = $20;
  1240. EVOUTF_DEFAULT = $00;
  1241. // PORTMUX_LUT0
  1242. LUT0mask = $01;
  1243. LUT0_DEFAULT = $00;
  1244. LUT0_ALT1 = $01;
  1245. // PORTMUX_LUT1
  1246. LUT1mask = $02;
  1247. LUT1_DEFAULT = $00;
  1248. LUT1_ALT1 = $02;
  1249. // PORTMUX_LUT2
  1250. LUT2mask = $04;
  1251. LUT2_DEFAULT = $00;
  1252. LUT2_ALT1 = $04;
  1253. // PORTMUX_LUT3
  1254. LUT3mask = $08;
  1255. LUT3_DEFAULT = $00;
  1256. // PORTMUX_USART0
  1257. USART0mask = $07;
  1258. USART0_DEFAULT = $00;
  1259. USART0_ALT1 = $01;
  1260. USART0_ALT2 = $02;
  1261. USART0_ALT3 = $03;
  1262. USART0_ALT4 = $04;
  1263. USART0_NONE = $05;
  1264. // PORTMUX_USART1
  1265. USART1mask = $18;
  1266. USART1_DEFAULT = $00;
  1267. USART1_ALT2 = $10;
  1268. USART1_NONE = $18;
  1269. // PORTMUX_SPI0
  1270. SPI0mask = $07;
  1271. SPI0_DEFAULT = $00;
  1272. SPI0_ALT3 = $03;
  1273. SPI0_ALT4 = $04;
  1274. SPI0_ALT5 = $05;
  1275. SPI0_ALT6 = $06;
  1276. SPI0_NONE = $07;
  1277. // PORTMUX_TWI0
  1278. TWI0mask = $03;
  1279. TWI0_DEFAULT = $00;
  1280. TWI0_ALT1 = $01;
  1281. TWI0_ALT2 = $02;
  1282. TWI0_ALT3 = $03;
  1283. // PORTMUX_TCA0
  1284. TCA0mask = $07;
  1285. TCA0_PORTA = $00;
  1286. TCA0_PORTC = $02;
  1287. TCA0_PORTD = $03;
  1288. TCA0_PORTF = $05;
  1289. // PORTMUX_TCB0
  1290. TCB0mask = $01;
  1291. TCB0_DEFAULT = $00;
  1292. TCB0_ALT1 = $01;
  1293. // PORTMUX_TCB1
  1294. TCB1mask = $02;
  1295. TCB1_DEFAULT = $00;
  1296. TCB1_ALT1 = $02;
  1297. // PORTMUX_TCB2
  1298. TCB2mask = $04;
  1299. TCB2_DEFAULT = $00;
  1300. // PORTMUX_TCD0
  1301. TCD0mask = $07;
  1302. TCD0_DEFAULT = $00;
  1303. TCD0_ALT2 = $02;
  1304. TCD0_ALT4 = $04;
  1305. end;
  1306. TRSTCTRL = object //Reset controller
  1307. RSTFR: byte; //Reset Flags
  1308. SWRR: byte; //Software Reset
  1309. const
  1310. // Power on Reset flag
  1311. PORFbm = $01;
  1312. // Brown out detector Reset flag
  1313. BORFbm = $02;
  1314. // External Reset flag
  1315. EXTRFbm = $04;
  1316. // Watch dog Reset flag
  1317. WDRFbm = $08;
  1318. // Software Reset flag
  1319. SWRFbm = $10;
  1320. // UPDI Reset flag
  1321. UPDIRFbm = $20;
  1322. // Software reset enable
  1323. SWRSTbm = $01;
  1324. end;
  1325. TRTC = object //Real-Time Counter
  1326. CTRLA: byte; //Control A
  1327. STATUS: byte; //Status
  1328. INTCTRL: byte; //Interrupt Control
  1329. INTFLAGS: byte; //Interrupt Flags
  1330. TEMP: byte; //Temporary
  1331. DBGCTRL: byte; //Debug control
  1332. CALIB: byte; //Calibration
  1333. CLKSEL: byte; //Clock Select
  1334. CNT: word; //Counter
  1335. PER: word; //Period
  1336. CMP: word; //Compare
  1337. Reserved14: byte;
  1338. Reserved15: byte;
  1339. PITCTRLA: byte; //PIT Control A
  1340. PITSTATUS: byte; //PIT Status
  1341. PITINTCTRL: byte; //PIT Interrupt Control
  1342. PITINTFLAGS: byte; //PIT Interrupt Flags
  1343. Reserved20: byte;
  1344. PITDBGCTRL: byte; //PIT Debug control
  1345. const
  1346. // Enable
  1347. RTCENbm = $01;
  1348. // Correction enable
  1349. CORRENbm = $04;
  1350. // RTC_PRESCALER
  1351. PRESCALERmask = $78;
  1352. PRESCALER_DIV1 = $00;
  1353. PRESCALER_DIV2 = $08;
  1354. PRESCALER_DIV4 = $10;
  1355. PRESCALER_DIV8 = $18;
  1356. PRESCALER_DIV16 = $20;
  1357. PRESCALER_DIV32 = $28;
  1358. PRESCALER_DIV64 = $30;
  1359. PRESCALER_DIV128 = $38;
  1360. PRESCALER_DIV256 = $40;
  1361. PRESCALER_DIV512 = $48;
  1362. PRESCALER_DIV1024 = $50;
  1363. PRESCALER_DIV2048 = $58;
  1364. PRESCALER_DIV4096 = $60;
  1365. PRESCALER_DIV8192 = $68;
  1366. PRESCALER_DIV16384 = $70;
  1367. PRESCALER_DIV32768 = $78;
  1368. // Run In Standby
  1369. RUNSTDBYbm = $80;
  1370. // CTRLA Synchronization Busy Flag
  1371. CTRLABUSYbm = $01;
  1372. // Count Synchronization Busy Flag
  1373. CNTBUSYbm = $02;
  1374. // Period Synchronization Busy Flag
  1375. PERBUSYbm = $04;
  1376. // Comparator Synchronization Busy Flag
  1377. CMPBUSYbm = $08;
  1378. // Overflow Interrupt enable
  1379. OVFbm = $01;
  1380. // Compare Match Interrupt enable
  1381. CMPbm = $02;
  1382. // Run in debug
  1383. DBGRUNbm = $01;
  1384. // Error Correction Value
  1385. ERROR0bm = $01;
  1386. ERROR1bm = $02;
  1387. ERROR2bm = $04;
  1388. ERROR3bm = $08;
  1389. ERROR4bm = $10;
  1390. ERROR5bm = $20;
  1391. ERROR6bm = $40;
  1392. // Error Correction Sign Bit
  1393. SIGNbm = $80;
  1394. // RTC_CLKSEL
  1395. CLKSELmask = $03;
  1396. CLKSEL_OSC32K = $00;
  1397. CLKSEL_OSC1K = $01;
  1398. CLKSEL_XTAL32K = $02;
  1399. CLKSEL_EXTCLK = $03;
  1400. // Enable
  1401. PITENbm = $01;
  1402. // RTC_PERIOD
  1403. PERIODmask = $78;
  1404. PERIOD_OFF = $00;
  1405. PERIOD_CYC4 = $08;
  1406. PERIOD_CYC8 = $10;
  1407. PERIOD_CYC16 = $18;
  1408. PERIOD_CYC32 = $20;
  1409. PERIOD_CYC64 = $28;
  1410. PERIOD_CYC128 = $30;
  1411. PERIOD_CYC256 = $38;
  1412. PERIOD_CYC512 = $40;
  1413. PERIOD_CYC1024 = $48;
  1414. PERIOD_CYC2048 = $50;
  1415. PERIOD_CYC4096 = $58;
  1416. PERIOD_CYC8192 = $60;
  1417. PERIOD_CYC16384 = $68;
  1418. PERIOD_CYC32768 = $70;
  1419. // CTRLA Synchronization Busy Flag
  1420. CTRLBUSYbm = $01;
  1421. // Periodic Interrupt
  1422. PIbm = $01;
  1423. end;
  1424. TSIGROW = object //Signature row
  1425. DEVICEID0: byte; //Device ID Byte 0
  1426. DEVICEID1: byte; //Device ID Byte 1
  1427. DEVICEID2: byte; //Device ID Byte 2
  1428. Reserved3: byte;
  1429. TEMPSENSE0: word; //Temperature Calibration 0
  1430. TEMPSENSE1: word; //Temperature Calibration 1
  1431. Reserved8: byte;
  1432. Reserved9: byte;
  1433. Reserved10: byte;
  1434. Reserved11: byte;
  1435. Reserved12: byte;
  1436. Reserved13: byte;
  1437. Reserved14: byte;
  1438. Reserved15: byte;
  1439. SERNUM0: byte; //LOTNUM0
  1440. SERNUM1: byte; //LOTNUM1
  1441. SERNUM2: byte; //LOTNUM2
  1442. SERNUM3: byte; //LOTNUM3
  1443. SERNUM4: byte; //LOTNUM4
  1444. SERNUM5: byte; //LOTNUM5
  1445. SERNUM6: byte; //RANDOM
  1446. SERNUM7: byte; //SCRIBE
  1447. SERNUM8: byte; //XPOS0
  1448. SERNUM9: byte; //XPOS1
  1449. SERNUM10: byte; //YPOS0
  1450. SERNUM11: byte; //YPOS1
  1451. SERNUM12: byte; //RES0
  1452. SERNUM13: byte; //RES1
  1453. SERNUM14: byte; //RES2
  1454. SERNUM15: byte; //RES3
  1455. end;
  1456. TSLPCTRL = object //Sleep Controller
  1457. CTRLA: byte; //Control A
  1458. VREGCTRL: byte; //Control B
  1459. const
  1460. // Sleep enable
  1461. SENbm = $01;
  1462. // SLPCTRL_SMODE
  1463. SMODEmask = $06;
  1464. SMODE_IDLE = $00;
  1465. SMODE_STDBY = $02;
  1466. SMODE_PDOWN = $04;
  1467. // SLPCTRL_PMODE
  1468. PMODEmask = $07;
  1469. PMODE_AUTO = $00;
  1470. PMODE_FULL = $01;
  1471. // SLPCTRL_HTLLEN
  1472. HTLLENmask = $10;
  1473. HTLLEN_OFF = $00;
  1474. HTLLEN_ON = $10;
  1475. end;
  1476. TSPI = object //Serial Peripheral Interface
  1477. CTRLA: byte; //Control A
  1478. CTRLB: byte; //Control B
  1479. INTCTRL: byte; //Interrupt Control
  1480. INTFLAGS: byte; //Interrupt Flags
  1481. DATA: byte; //Data
  1482. const
  1483. // Enable Module
  1484. ENABLEbm = $01;
  1485. // SPI_PRESC
  1486. PRESCmask = $06;
  1487. PRESC_DIV4 = $00;
  1488. PRESC_DIV16 = $02;
  1489. PRESC_DIV64 = $04;
  1490. PRESC_DIV128 = $06;
  1491. // Enable Double Speed
  1492. CLK2Xbm = $10;
  1493. // Host Operation Enable
  1494. MASTERbm = $20;
  1495. // Data Order Setting
  1496. DORDbm = $40;
  1497. // SPI_MODE
  1498. MODEmask = $03;
  1499. MODE_0 = $00;
  1500. MODE_1 = $01;
  1501. MODE_2 = $02;
  1502. MODE_3 = $03;
  1503. // SPI Select Disable
  1504. SSDbm = $04;
  1505. // Buffer Mode Wait for Receive
  1506. BUFWRbm = $40;
  1507. // Buffer Mode Enable
  1508. BUFENbm = $80;
  1509. // Interrupt Enable
  1510. IEbm = $01;
  1511. // SPI Select Trigger Interrupt Enable
  1512. SSIEbm = $10;
  1513. // Data Register Empty Interrupt Enable
  1514. DREIEbm = $20;
  1515. // Transfer Complete Interrupt Enable
  1516. TXCIEbm = $40;
  1517. // Receive Complete Interrupt Enable
  1518. RXCIEbm = $80;
  1519. end;
  1520. TSYSCFG = object //System Configuration Registers
  1521. Reserved0: byte;
  1522. REVID: byte; //Revision ID
  1523. Reserved2: byte;
  1524. Reserved3: byte;
  1525. OCDMCTRL: byte; //OCD Message Control
  1526. OCDMSTATUS: byte; //OCD Message Status
  1527. const
  1528. // OCD Message Valid
  1529. VALIDbm = $01;
  1530. end;
  1531. TTCA = object //16-bit Timer/Counter Type A
  1532. end;
  1533. TTCB = object //16-bit Timer Type B
  1534. CTRLA: byte; //Control A
  1535. CTRLB: byte; //Control Register B
  1536. Reserved2: byte;
  1537. Reserved3: byte;
  1538. EVCTRL: byte; //Event Control
  1539. INTCTRL: byte; //Interrupt Control
  1540. INTFLAGS: byte; //Interrupt Flags
  1541. STATUS: byte; //Status
  1542. DBGCTRL: byte; //Debug Control
  1543. TEMP: byte; //Temporary Value
  1544. CNT: word; //Count
  1545. CCMP: word; //Compare or Capture
  1546. const
  1547. // Enable
  1548. ENABLEbm = $01;
  1549. // TCB_CLKSEL
  1550. CLKSELmask = $0E;
  1551. CLKSEL_DIV1 = $00;
  1552. CLKSEL_DIV2 = $02;
  1553. CLKSEL_TCA0 = $04;
  1554. CLKSEL_EVENT = $0E;
  1555. // Synchronize Update
  1556. SYNCUPDbm = $10;
  1557. // Cascade two timers
  1558. CASCADEbm = $20;
  1559. // Run Standby
  1560. RUNSTDBYbm = $40;
  1561. // TCB_CNTMODE
  1562. CNTMODEmask = $07;
  1563. CNTMODE_INT = $00;
  1564. CNTMODE_TIMEOUT = $01;
  1565. CNTMODE_CAPT = $02;
  1566. CNTMODE_FRQ = $03;
  1567. CNTMODE_PW = $04;
  1568. CNTMODE_FRQPW = $05;
  1569. CNTMODE_SINGLE = $06;
  1570. CNTMODE_PWM8 = $07;
  1571. // Pin Output Enable
  1572. CCMPENbm = $10;
  1573. // Pin Initial State
  1574. CCMPINITbm = $20;
  1575. // Asynchronous Enable
  1576. ASYNCbm = $40;
  1577. // Event Input Enable
  1578. CAPTEIbm = $01;
  1579. // Event Edge
  1580. EDGEbm = $10;
  1581. // Input Capture Noise Cancellation Filter
  1582. FILTERbm = $40;
  1583. // Capture or Timeout
  1584. CAPTbm = $01;
  1585. // Overflow
  1586. OVFbm = $02;
  1587. // Run
  1588. RUNbm = $01;
  1589. // Debug Run
  1590. DBGRUNbm = $01;
  1591. end;
  1592. TTCD = object //Timer Counter D
  1593. CTRLA: byte; //Control A
  1594. CTRLB: byte; //Control B
  1595. CTRLC: byte; //Control C
  1596. CTRLD: byte; //Control D
  1597. CTRLE: byte; //Control E
  1598. Reserved5: byte;
  1599. Reserved6: byte;
  1600. Reserved7: byte;
  1601. EVCTRLA: byte; //EVCTRLA
  1602. EVCTRLB: byte; //EVCTRLB
  1603. Reserved10: byte;
  1604. Reserved11: byte;
  1605. INTCTRL: byte; //Interrupt Control
  1606. INTFLAGS: byte; //Interrupt Flags
  1607. STATUS: byte; //Status
  1608. Reserved15: byte;
  1609. INPUTCTRLA: byte; //Input Control A
  1610. INPUTCTRLB: byte; //Input Control B
  1611. FAULTCTRL: byte; //Fault Control
  1612. Reserved19: byte;
  1613. DLYCTRL: byte; //Delay Control
  1614. DLYVAL: byte; //Delay value
  1615. Reserved22: byte;
  1616. Reserved23: byte;
  1617. DITCTRL: byte; //Dither Control A
  1618. DITVAL: byte; //Dither value
  1619. Reserved26: byte;
  1620. Reserved27: byte;
  1621. Reserved28: byte;
  1622. Reserved29: byte;
  1623. DBGCTRL: byte; //Debug Control
  1624. Reserved31: byte;
  1625. Reserved32: byte;
  1626. Reserved33: byte;
  1627. CAPTUREA: word; //Capture A
  1628. CAPTUREB: word; //Capture B
  1629. Reserved38: byte;
  1630. Reserved39: byte;
  1631. CMPASET: word; //Compare A Set
  1632. CMPACLR: word; //Compare A Clear
  1633. CMPBSET: word; //Compare B Set
  1634. CMPBCLR: word; //Compare B Clear
  1635. const
  1636. // Enable
  1637. ENABLEbm = $01;
  1638. // TCD_SYNCPRES
  1639. SYNCPRESmask = $06;
  1640. SYNCPRES_DIV1 = $00;
  1641. SYNCPRES_DIV2 = $02;
  1642. SYNCPRES_DIV4 = $04;
  1643. SYNCPRES_DIV8 = $06;
  1644. // TCD_CNTPRES
  1645. CNTPRESmask = $18;
  1646. CNTPRES_DIV1 = $00;
  1647. CNTPRES_DIV4 = $08;
  1648. CNTPRES_DIV32 = $10;
  1649. // TCD_CLKSEL
  1650. CLKSELmask = $60;
  1651. CLKSEL_OSCHF = $00;
  1652. CLKSEL_PLL = $20;
  1653. CLKSEL_EXTCLK = $40;
  1654. CLKSEL_CLKPER = $60;
  1655. // TCD_WGMODE
  1656. WGMODEmask = $03;
  1657. WGMODE_ONERAMP = $00;
  1658. WGMODE_TWORAMP = $01;
  1659. WGMODE_FOURRAMP = $02;
  1660. WGMODE_DS = $03;
  1661. // Compare output value override
  1662. CMPOVRbm = $01;
  1663. // Auto update
  1664. AUPDATEbm = $02;
  1665. // Fifty percent waveform
  1666. FIFTYbm = $08;
  1667. // TCD_CMPCSEL
  1668. CMPCSELmask = $40;
  1669. CMPCSEL_PWMA = $00;
  1670. CMPCSEL_PWMB = $40;
  1671. // TCD_CMPDSEL
  1672. CMPDSELmask = $80;
  1673. CMPDSEL_PWMA = $00;
  1674. CMPDSEL_PWMB = $80;
  1675. // Compare A value
  1676. CMPAVAL0bm = $01;
  1677. CMPAVAL1bm = $02;
  1678. CMPAVAL2bm = $04;
  1679. CMPAVAL3bm = $08;
  1680. // Compare B value
  1681. CMPBVAL0bm = $10;
  1682. CMPBVAL1bm = $20;
  1683. CMPBVAL2bm = $40;
  1684. CMPBVAL3bm = $80;
  1685. // Synchronize end of cycle strobe
  1686. SYNCEOCbm = $01;
  1687. // synchronize strobe
  1688. SYNCbm = $02;
  1689. // Restart strobe
  1690. RESTARTbm = $04;
  1691. // Software Capture A Strobe
  1692. SCAPTUREAbm = $08;
  1693. // Software Capture B Strobe
  1694. SCAPTUREBbm = $10;
  1695. // Disable at end of cycle
  1696. DISEOCbm = $80;
  1697. // Trigger event enable
  1698. TRIGEIbm = $01;
  1699. // TCD_ACTION
  1700. ACTIONmask = $04;
  1701. ACTION_FAULT = $00;
  1702. ACTION_CAPTURE = $04;
  1703. // TCD_EDGE
  1704. EDGEmask = $10;
  1705. EDGE_FALL_LOW = $00;
  1706. EDGE_RISE_HIGH = $10;
  1707. // TCD_CFG
  1708. CFGmask = $C0;
  1709. CFG_NEITHER = $00;
  1710. CFG_FILTER = $40;
  1711. CFG_ASYNC = $80;
  1712. // Overflow interrupt enable
  1713. OVFbm = $01;
  1714. // Trigger A interrupt enable
  1715. TRIGAbm = $04;
  1716. // Trigger B interrupt enable
  1717. TRIGBbm = $08;
  1718. // Enable ready
  1719. ENRDYbm = $01;
  1720. // Command ready
  1721. CMDRDYbm = $02;
  1722. // PWM activity on A
  1723. PWMACTAbm = $40;
  1724. // PWM activity on B
  1725. PWMACTBbm = $80;
  1726. // TCD_INPUTMODE
  1727. INPUTMODEmask = $0F;
  1728. INPUTMODE_NONE = $00;
  1729. INPUTMODE_JMPWAIT = $01;
  1730. INPUTMODE_EXECWAIT = $02;
  1731. INPUTMODE_EXECFAULT = $03;
  1732. INPUTMODE_FREQ = $04;
  1733. INPUTMODE_EXECDT = $05;
  1734. INPUTMODE_WAIT = $06;
  1735. INPUTMODE_WAITSW = $07;
  1736. INPUTMODE_EDGETRIG = $08;
  1737. INPUTMODE_EDGETRIGFREQ = $09;
  1738. INPUTMODE_LVLTRIGFREQ = $0A;
  1739. // Compare A value
  1740. CMPAbm = $01;
  1741. // Compare B value
  1742. CMPBbm = $02;
  1743. // Compare C value
  1744. CMPCbm = $04;
  1745. // Compare D vaule
  1746. CMPDbm = $08;
  1747. // Compare A enable
  1748. CMPAENbm = $10;
  1749. // Compare B enable
  1750. CMPBENbm = $20;
  1751. // Compare C enable
  1752. CMPCENbm = $40;
  1753. // Compare D enable
  1754. CMPDENbm = $80;
  1755. // TCD_DLYSEL
  1756. DLYSELmask = $03;
  1757. DLYSEL_OFF = $00;
  1758. DLYSEL_INBLANK = $01;
  1759. DLYSEL_EVENT = $02;
  1760. // TCD_DLYTRIG
  1761. DLYTRIGmask = $0C;
  1762. DLYTRIG_CMPASET = $00;
  1763. DLYTRIG_CMPACLR = $04;
  1764. DLYTRIG_CMPBSET = $08;
  1765. DLYTRIG_CMPBCLR = $0C;
  1766. // TCD_DLYPRESC
  1767. DLYPRESCmask = $30;
  1768. DLYPRESC_DIV1 = $00;
  1769. DLYPRESC_DIV2 = $10;
  1770. DLYPRESC_DIV4 = $20;
  1771. DLYPRESC_DIV8 = $30;
  1772. // TCD_DITHERSEL
  1773. DITHERSELmask = $03;
  1774. DITHERSEL_ONTIMEB = $00;
  1775. DITHERSEL_ONTIMEAB = $01;
  1776. DITHERSEL_DEADTIMEB = $02;
  1777. DITHERSEL_DEADTIMEAB = $03;
  1778. // Dither value
  1779. DITHER0bm = $01;
  1780. DITHER1bm = $02;
  1781. DITHER2bm = $04;
  1782. DITHER3bm = $08;
  1783. // Debug run
  1784. DBGRUNbm = $01;
  1785. // Fault detection
  1786. FAULTDETbm = $04;
  1787. end;
  1788. TTWI = object //Two-Wire Interface
  1789. CTRLA: byte; //Control A
  1790. DUALCTRL: byte; //Dual Mode Control
  1791. DBGCTRL: byte; //Debug Control
  1792. MCTRLA: byte; //Host Control A
  1793. MCTRLB: byte; //Host Control B
  1794. MSTATUS: byte; //Host STATUS
  1795. MBAUD: byte; //Host Baud Rate
  1796. MADDR: byte; //Host Address
  1797. MDATA: byte; //Host Data
  1798. SCTRLA: byte; //Client Control A
  1799. SCTRLB: byte; //Client Control B
  1800. SSTATUS: byte; //Client Status
  1801. SADDR: byte; //Client Address
  1802. SDATA: byte; //Client Data
  1803. SADDRMASK: byte; //Client Address Mask
  1804. const
  1805. // TWI_FMPEN
  1806. FMPENmask = $02;
  1807. FMPEN_OFF = $00;
  1808. FMPEN_ON = $02;
  1809. // TWI_SDAHOLD
  1810. SDAHOLDmask = $0C;
  1811. SDAHOLD_OFF = $00;
  1812. SDAHOLD_50NS = $04;
  1813. SDAHOLD_300NS = $08;
  1814. SDAHOLD_500NS = $0C;
  1815. // TWI_SDASETUP
  1816. SDASETUPmask = $10;
  1817. SDASETUP_4CYC = $00;
  1818. SDASETUP_8CYC = $10;
  1819. // TWI_INPUTLVL
  1820. INPUTLVLmask = $40;
  1821. INPUTLVL_I2C = $00;
  1822. INPUTLVL_SMBUS = $40;
  1823. // Enable
  1824. ENABLEbm = $01;
  1825. // TWI_DBGRUN
  1826. DBGRUNmask = $01;
  1827. DBGRUN_HALT = $00;
  1828. DBGRUN_RUN = $01;
  1829. // Smart Mode Enable
  1830. SMENbm = $02;
  1831. // TWI_TIMEOUT
  1832. TIMEOUTmask = $0C;
  1833. TIMEOUT_DISABLED = $00;
  1834. TIMEOUT_50US = $04;
  1835. TIMEOUT_100US = $08;
  1836. TIMEOUT_200US = $0C;
  1837. // Quick Command Enable
  1838. QCENbm = $10;
  1839. // Write Interrupt Enable
  1840. WIENbm = $40;
  1841. // Read Interrupt Enable
  1842. RIENbm = $80;
  1843. // TWI_MCMD
  1844. MCMDmask = $03;
  1845. MCMD_NOACT = $00;
  1846. MCMD_REPSTART = $01;
  1847. MCMD_RECVTRANS = $02;
  1848. MCMD_STOP = $03;
  1849. // TWI_ACKACT
  1850. ACKACTmask = $04;
  1851. ACKACT_ACK = $00;
  1852. ACKACT_NACK = $04;
  1853. // Flush
  1854. FLUSHbm = $08;
  1855. // TWI_BUSSTATE
  1856. BUSSTATEmask = $03;
  1857. BUSSTATE_UNKNOWN = $00;
  1858. BUSSTATE_IDLE = $01;
  1859. BUSSTATE_OWNER = $02;
  1860. BUSSTATE_BUSY = $03;
  1861. // Bus Error
  1862. BUSERRbm = $04;
  1863. // Arbitration Lost
  1864. ARBLOSTbm = $08;
  1865. // Received Acknowledge
  1866. RXACKbm = $10;
  1867. // Clock Hold
  1868. CLKHOLDbm = $20;
  1869. // Write Interrupt Flag
  1870. WIFbm = $40;
  1871. // Read Interrupt Flag
  1872. RIFbm = $80;
  1873. // Address Recognition Mode
  1874. PMENbm = $04;
  1875. // Stop Interrupt Enable
  1876. PIENbm = $20;
  1877. // Address or Stop Interrupt Enable
  1878. APIENbm = $40;
  1879. // Data Interrupt Enable
  1880. DIENbm = $80;
  1881. // TWI_SCMD
  1882. SCMDmask = $03;
  1883. SCMD_NOACT = $00;
  1884. SCMD_COMPTRANS = $02;
  1885. SCMD_RESPONSE = $03;
  1886. // TWI_AP
  1887. APmask = $01;
  1888. AP_STOP = $00;
  1889. AP_ADR = $01;
  1890. // Read/Write Direction
  1891. DIRbm = $02;
  1892. // Collision
  1893. COLLbm = $08;
  1894. // Address or Stop Interrupt Flag
  1895. APIFbm = $40;
  1896. // Data Interrupt Flag
  1897. DIFbm = $80;
  1898. // Address Mask Enable
  1899. ADDRENbm = $01;
  1900. // Address Mask
  1901. ADDRMASK0bm = $02;
  1902. ADDRMASK1bm = $04;
  1903. ADDRMASK2bm = $08;
  1904. ADDRMASK3bm = $10;
  1905. ADDRMASK4bm = $20;
  1906. ADDRMASK5bm = $40;
  1907. ADDRMASK6bm = $80;
  1908. end;
  1909. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1910. RXDATAL: byte; //Receive Data Low Byte
  1911. RXDATAH: byte; //Receive Data High Byte
  1912. TXDATAL: byte; //Transmit Data Low Byte
  1913. TXDATAH: byte; //Transmit Data High Byte
  1914. STATUS: byte; //Status
  1915. CTRLA: byte; //Control A
  1916. CTRLB: byte; //Control B
  1917. CTRLC: byte; //Control C
  1918. BAUD: word; //Baud Rate
  1919. CTRLD: byte; //Control D
  1920. DBGCTRL: byte; //Debug Control
  1921. EVCTRL: byte; //Event Control
  1922. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1923. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1924. const
  1925. // Receiver Data Register
  1926. DATA8bm = $01;
  1927. // Parity Error
  1928. PERRbm = $02;
  1929. // Frame Error
  1930. FERRbm = $04;
  1931. // Buffer Overflow
  1932. BUFOVFbm = $40;
  1933. // Receive Complete Interrupt Flag
  1934. RXCIFbm = $80;
  1935. // Wait For Break
  1936. WFBbm = $01;
  1937. // Break Detected Flag
  1938. BDFbm = $02;
  1939. // Inconsistent Sync Field Interrupt Flag
  1940. ISFIFbm = $08;
  1941. // Receive Start Interrupt
  1942. RXSIFbm = $10;
  1943. // Data Register Empty Flag
  1944. DREIFbm = $20;
  1945. // Transmit Interrupt Flag
  1946. TXCIFbm = $40;
  1947. // USART_RS485
  1948. RS485mask = $01;
  1949. RS485_DISABLE = $00;
  1950. RS485_ENABLE = $01;
  1951. // Auto-baud Error Interrupt Enable
  1952. ABEIEbm = $04;
  1953. // Loop-back Mode Enable
  1954. LBMEbm = $08;
  1955. // Receiver Start Frame Interrupt Enable
  1956. RXSIEbm = $10;
  1957. // Data Register Empty Interrupt Enable
  1958. DREIEbm = $20;
  1959. // Transmit Complete Interrupt Enable
  1960. TXCIEbm = $40;
  1961. // Receive Complete Interrupt Enable
  1962. RXCIEbm = $80;
  1963. // Multi-processor Communication Mode
  1964. MPCMbm = $01;
  1965. // USART_RXMODE
  1966. RXMODEmask = $06;
  1967. RXMODE_NORMAL = $00;
  1968. RXMODE_CLK2X = $02;
  1969. RXMODE_GENAUTO = $04;
  1970. RXMODE_LINAUTO = $06;
  1971. // Open Drain Mode Enable
  1972. ODMEbm = $08;
  1973. // Start Frame Detection Enable
  1974. SFDENbm = $10;
  1975. // Transmitter Enable
  1976. TXENbm = $40;
  1977. // Reciever enable
  1978. RXENbm = $80;
  1979. // USART_ABW
  1980. ABWmask = $C0;
  1981. ABW_WDW0 = $00;
  1982. ABW_WDW1 = $40;
  1983. ABW_WDW2 = $80;
  1984. ABW_WDW3 = $C0;
  1985. // Debug Run
  1986. DBGRUNbm = $01;
  1987. // IrDA Event Input Enable
  1988. IREIbm = $01;
  1989. // Receiver Pulse Lenght
  1990. RXPL0bm = $01;
  1991. RXPL1bm = $02;
  1992. RXPL2bm = $04;
  1993. RXPL3bm = $08;
  1994. RXPL4bm = $10;
  1995. RXPL5bm = $20;
  1996. RXPL6bm = $40;
  1997. end;
  1998. TUSERROW = object //User Row
  1999. USERROW0: byte; //User Row Byte 0
  2000. USERROW1: byte; //User Row Byte 1
  2001. USERROW2: byte; //User Row Byte 2
  2002. USERROW3: byte; //User Row Byte 3
  2003. USERROW4: byte; //User Row Byte 4
  2004. USERROW5: byte; //User Row Byte 5
  2005. USERROW6: byte; //User Row Byte 6
  2006. USERROW7: byte; //User Row Byte 7
  2007. USERROW8: byte; //User Row Byte 8
  2008. USERROW9: byte; //User Row Byte 9
  2009. USERROW10: byte; //User Row Byte 10
  2010. USERROW11: byte; //User Row Byte 11
  2011. USERROW12: byte; //User Row Byte 12
  2012. USERROW13: byte; //User Row Byte 13
  2013. USERROW14: byte; //User Row Byte 14
  2014. USERROW15: byte; //User Row Byte 15
  2015. USERROW16: byte; //User Row Byte 16
  2016. USERROW17: byte; //User Row Byte 17
  2017. USERROW18: byte; //User Row Byte 18
  2018. USERROW19: byte; //User Row Byte 19
  2019. USERROW20: byte; //User Row Byte 20
  2020. USERROW21: byte; //User Row Byte 21
  2021. USERROW22: byte; //User Row Byte 22
  2022. USERROW23: byte; //User Row Byte 23
  2023. USERROW24: byte; //User Row Byte 24
  2024. USERROW25: byte; //User Row Byte 25
  2025. USERROW26: byte; //User Row Byte 26
  2026. USERROW27: byte; //User Row Byte 27
  2027. USERROW28: byte; //User Row Byte 28
  2028. USERROW29: byte; //User Row Byte 29
  2029. USERROW30: byte; //User Row Byte 30
  2030. USERROW31: byte; //User Row Byte 31
  2031. end;
  2032. TVPORT = object //Virtual Ports
  2033. DIR: byte; //Data Direction
  2034. OUT_: byte; //Output Value
  2035. IN_: byte; //Input Value
  2036. INTFLAGS: byte; //Interrupt Flags
  2037. end;
  2038. TVREF = object //Voltage reference
  2039. ADC0REF: byte; //ADC0 Reference
  2040. Reserved1: byte;
  2041. DAC0REF: byte; //DAC0 Reference
  2042. Reserved3: byte;
  2043. ACREF: byte; //AC Reference
  2044. const
  2045. // VREF_REFSEL
  2046. REFSELmask = $07;
  2047. REFSEL_1V024 = $00;
  2048. REFSEL_2V048 = $01;
  2049. REFSEL_4V096 = $02;
  2050. REFSEL_2V500 = $03;
  2051. REFSEL_VDD = $05;
  2052. REFSEL_VREFA = $06;
  2053. // Always on
  2054. ALWAYSONbm = $80;
  2055. end;
  2056. TWDT = object //Watch-Dog Timer
  2057. CTRLA: byte; //Control A
  2058. STATUS: byte; //Status
  2059. const
  2060. // WDT_PERIOD
  2061. PERIODmask = $0F;
  2062. PERIOD_OFF = $00;
  2063. PERIOD_8CLK = $01;
  2064. PERIOD_16CLK = $02;
  2065. PERIOD_32CLK = $03;
  2066. PERIOD_64CLK = $04;
  2067. PERIOD_128CLK = $05;
  2068. PERIOD_256CLK = $06;
  2069. PERIOD_512CLK = $07;
  2070. PERIOD_1KCLK = $08;
  2071. PERIOD_2KCLK = $09;
  2072. PERIOD_4KCLK = $0A;
  2073. PERIOD_8KCLK = $0B;
  2074. // WDT_WINDOW
  2075. WINDOWmask = $F0;
  2076. WINDOW_OFF = $00;
  2077. WINDOW_8CLK = $10;
  2078. WINDOW_16CLK = $20;
  2079. WINDOW_32CLK = $30;
  2080. WINDOW_64CLK = $40;
  2081. WINDOW_128CLK = $50;
  2082. WINDOW_256CLK = $60;
  2083. WINDOW_512CLK = $70;
  2084. WINDOW_1KCLK = $80;
  2085. WINDOW_2KCLK = $90;
  2086. WINDOW_4KCLK = $A0;
  2087. WINDOW_8KCLK = $B0;
  2088. // Syncronization busy
  2089. SYNCBUSYbm = $01;
  2090. // Lock enable
  2091. LOCKbm = $80;
  2092. end;
  2093. TZCD = object //Zero Cross Detect
  2094. CTRLA: byte; //Control A
  2095. Reserved1: byte;
  2096. INTCTRL: byte; //Interrupt Control
  2097. STATUS: byte; //Status
  2098. const
  2099. // Enable
  2100. ENABLEbm = $01;
  2101. // Invert signal from pin
  2102. INVERTbm = $08;
  2103. // Output Pad Enable
  2104. OUTENbm = $40;
  2105. // Run in Standby Mode
  2106. RUNSTDBYbm = $80;
  2107. // ZCD_INTMODE
  2108. INTMODEmask = $03;
  2109. INTMODE_NONE = $00;
  2110. INTMODE_RISING = $01;
  2111. INTMODE_FALLING = $02;
  2112. INTMODE_BOTH = $03;
  2113. // ZCD Interrupt Flag
  2114. CROSSIFbm = $01;
  2115. // ZCD_STATE
  2116. STATEmask = $10;
  2117. STATE_LOW = $00;
  2118. STATE_HIGH = $10;
  2119. end;
  2120. const
  2121. Pin0idx = 0; Pin0bm = 1;
  2122. Pin1idx = 1; Pin1bm = 2;
  2123. Pin2idx = 2; Pin2bm = 4;
  2124. Pin3idx = 3; Pin3bm = 8;
  2125. Pin4idx = 4; Pin4bm = 16;
  2126. Pin5idx = 5; Pin5bm = 32;
  2127. Pin6idx = 6; Pin6bm = 64;
  2128. Pin7idx = 7; Pin7bm = 128;
  2129. var
  2130. VPORTA: TVPORT absolute $0000;
  2131. VPORTC: TVPORT absolute $0008;
  2132. VPORTD: TVPORT absolute $000C;
  2133. VPORTF: TVPORT absolute $0014;
  2134. GPR: TGPR absolute $001C;
  2135. CPU: TCPU absolute $0030;
  2136. RSTCTRL: TRSTCTRL absolute $0040;
  2137. SLPCTRL: TSLPCTRL absolute $0050;
  2138. CLKCTRL: TCLKCTRL absolute $0060;
  2139. BOD: TBOD absolute $00A0;
  2140. VREF: TVREF absolute $00B0;
  2141. MVIO: TMVIO absolute $00C0;
  2142. WDT: TWDT absolute $0100;
  2143. CPUINT: TCPUINT absolute $0110;
  2144. CRCSCAN: TCRCSCAN absolute $0120;
  2145. RTC: TRTC absolute $0140;
  2146. CCL: TCCL absolute $01C0;
  2147. EVSYS: TEVSYS absolute $0200;
  2148. PORTA: TPORT absolute $0400;
  2149. PORTC: TPORT absolute $0440;
  2150. PORTD: TPORT absolute $0460;
  2151. PORTF: TPORT absolute $04A0;
  2152. PORTMUX: TPORTMUX absolute $05E0;
  2153. ADC0: TADC absolute $0600;
  2154. AC0: TAC absolute $0680;
  2155. DAC0: TDAC absolute $06A0;
  2156. ZCD3: TZCD absolute $06D8;
  2157. USART0: TUSART absolute $0800;
  2158. USART1: TUSART absolute $0820;
  2159. TWI0: TTWI absolute $0900;
  2160. SPI0: TSPI absolute $0940;
  2161. TCA0: TTCA absolute $0A00;
  2162. TCB0: TTCB absolute $0B00;
  2163. TCB1: TTCB absolute $0B10;
  2164. TCB2: TTCB absolute $0B20;
  2165. TCD0: TTCD absolute $0B80;
  2166. SYSCFG: TSYSCFG absolute $0F00;
  2167. NVMCTRL: TNVMCTRL absolute $1000;
  2168. LOCK: TLOCK absolute $1040;
  2169. FUSE: TFUSE absolute $1050;
  2170. USERROW: TUSERROW absolute $1080;
  2171. SIGROW: TSIGROW absolute $1100;
  2172. implementation
  2173. {$i avrcommon.inc}
  2174. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  2175. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  2176. procedure CLKCTRL_CFD_ISR; external name 'CLKCTRL_CFD_ISR'; // Interrupt 3
  2177. procedure MVIO_MVIO_ISR; external name 'MVIO_MVIO_ISR'; // Interrupt 4
  2178. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 5
  2179. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 6
  2180. procedure CCL_CCL_ISR; external name 'CCL_CCL_ISR'; // Interrupt 7
  2181. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 8
  2182. procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 9
  2183. //procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 9
  2184. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 10
  2185. procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 11
  2186. //procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 11
  2187. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 12
  2188. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 12
  2189. procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 13
  2190. //procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 13
  2191. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 14
  2192. procedure TCB1_INT_ISR; external name 'TCB1_INT_ISR'; // Interrupt 15
  2193. procedure TCD0_OVF_ISR; external name 'TCD0_OVF_ISR'; // Interrupt 16
  2194. procedure TCD0_TRIG_ISR; external name 'TCD0_TRIG_ISR'; // Interrupt 17
  2195. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 18
  2196. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 19
  2197. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 20
  2198. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 21
  2199. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 22
  2200. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 23
  2201. procedure PORTD_PORT_ISR; external name 'PORTD_PORT_ISR'; // Interrupt 24
  2202. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 25
  2203. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 26
  2204. procedure ADC0_WCMP_ISR; external name 'ADC0_WCMP_ISR'; // Interrupt 27
  2205. procedure ZCD3_ZCD_ISR; external name 'ZCD3_ZCD_ISR'; // Interrupt 28
  2206. procedure PORTC_PORT_ISR; external name 'PORTC_PORT_ISR'; // Interrupt 29
  2207. procedure TCB2_INT_ISR; external name 'TCB2_INT_ISR'; // Interrupt 30
  2208. procedure USART1_RXC_ISR; external name 'USART1_RXC_ISR'; // Interrupt 31
  2209. procedure USART1_DRE_ISR; external name 'USART1_DRE_ISR'; // Interrupt 32
  2210. procedure USART1_TXC_ISR; external name 'USART1_TXC_ISR'; // Interrupt 33
  2211. procedure PORTF_PORT_ISR; external name 'PORTF_PORT_ISR'; // Interrupt 34
  2212. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 35
  2213. procedure _FPC_start; assembler; nostackframe; noreturn; public name '_START'; section '.init';
  2214. asm
  2215. jmp __dtors_end
  2216. jmp CRCSCAN_NMI_ISR
  2217. jmp BOD_VLM_ISR
  2218. jmp CLKCTRL_CFD_ISR
  2219. jmp MVIO_MVIO_ISR
  2220. jmp RTC_CNT_ISR
  2221. jmp RTC_PIT_ISR
  2222. jmp CCL_CCL_ISR
  2223. jmp PORTA_PORT_ISR
  2224. jmp TCA0_LUNF_ISR
  2225. // jmp TCA0_OVF_ISR
  2226. jmp TCA0_HUNF_ISR
  2227. jmp TCA0_CMP0_ISR
  2228. // jmp TCA0_LCMP0_ISR
  2229. jmp TCA0_CMP1_ISR
  2230. // jmp TCA0_LCMP1_ISR
  2231. jmp TCA0_CMP2_ISR
  2232. // jmp TCA0_LCMP2_ISR
  2233. jmp TCB0_INT_ISR
  2234. jmp TCB1_INT_ISR
  2235. jmp TCD0_OVF_ISR
  2236. jmp TCD0_TRIG_ISR
  2237. jmp TWI0_TWIS_ISR
  2238. jmp TWI0_TWIM_ISR
  2239. jmp SPI0_INT_ISR
  2240. jmp USART0_RXC_ISR
  2241. jmp USART0_DRE_ISR
  2242. jmp USART0_TXC_ISR
  2243. jmp PORTD_PORT_ISR
  2244. jmp AC0_AC_ISR
  2245. jmp ADC0_RESRDY_ISR
  2246. jmp ADC0_WCMP_ISR
  2247. jmp ZCD3_ZCD_ISR
  2248. jmp PORTC_PORT_ISR
  2249. jmp TCB2_INT_ISR
  2250. jmp USART1_RXC_ISR
  2251. jmp USART1_DRE_ISR
  2252. jmp USART1_TXC_ISR
  2253. jmp PORTF_PORT_ISR
  2254. jmp NVMCTRL_EE_ISR
  2255. .weak CRCSCAN_NMI_ISR
  2256. .weak BOD_VLM_ISR
  2257. .weak CLKCTRL_CFD_ISR
  2258. .weak MVIO_MVIO_ISR
  2259. .weak RTC_CNT_ISR
  2260. .weak RTC_PIT_ISR
  2261. .weak CCL_CCL_ISR
  2262. .weak PORTA_PORT_ISR
  2263. .weak TCA0_LUNF_ISR
  2264. // .weak TCA0_OVF_ISR
  2265. .weak TCA0_HUNF_ISR
  2266. .weak TCA0_CMP0_ISR
  2267. // .weak TCA0_LCMP0_ISR
  2268. .weak TCA0_CMP1_ISR
  2269. // .weak TCA0_LCMP1_ISR
  2270. .weak TCA0_CMP2_ISR
  2271. // .weak TCA0_LCMP2_ISR
  2272. .weak TCB0_INT_ISR
  2273. .weak TCB1_INT_ISR
  2274. .weak TCD0_OVF_ISR
  2275. .weak TCD0_TRIG_ISR
  2276. .weak TWI0_TWIS_ISR
  2277. .weak TWI0_TWIM_ISR
  2278. .weak SPI0_INT_ISR
  2279. .weak USART0_RXC_ISR
  2280. .weak USART0_DRE_ISR
  2281. .weak USART0_TXC_ISR
  2282. .weak PORTD_PORT_ISR
  2283. .weak AC0_AC_ISR
  2284. .weak ADC0_RESRDY_ISR
  2285. .weak ADC0_WCMP_ISR
  2286. .weak ZCD3_ZCD_ISR
  2287. .weak PORTC_PORT_ISR
  2288. .weak TCB2_INT_ISR
  2289. .weak USART1_RXC_ISR
  2290. .weak USART1_DRE_ISR
  2291. .weak USART1_TXC_ISR
  2292. .weak PORTF_PORT_ISR
  2293. .weak NVMCTRL_EE_ISR
  2294. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  2295. .set BOD_VLM_ISR, Default_IRQ_handler
  2296. .set CLKCTRL_CFD_ISR, Default_IRQ_handler
  2297. .set MVIO_MVIO_ISR, Default_IRQ_handler
  2298. .set RTC_CNT_ISR, Default_IRQ_handler
  2299. .set RTC_PIT_ISR, Default_IRQ_handler
  2300. .set CCL_CCL_ISR, Default_IRQ_handler
  2301. .set PORTA_PORT_ISR, Default_IRQ_handler
  2302. .set TCA0_LUNF_ISR, Default_IRQ_handler
  2303. // .set TCA0_OVF_ISR, Default_IRQ_handler
  2304. .set TCA0_HUNF_ISR, Default_IRQ_handler
  2305. .set TCA0_CMP0_ISR, Default_IRQ_handler
  2306. // .set TCA0_LCMP0_ISR, Default_IRQ_handler
  2307. .set TCA0_CMP1_ISR, Default_IRQ_handler
  2308. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  2309. .set TCA0_CMP2_ISR, Default_IRQ_handler
  2310. // .set TCA0_LCMP2_ISR, Default_IRQ_handler
  2311. .set TCB0_INT_ISR, Default_IRQ_handler
  2312. .set TCB1_INT_ISR, Default_IRQ_handler
  2313. .set TCD0_OVF_ISR, Default_IRQ_handler
  2314. .set TCD0_TRIG_ISR, Default_IRQ_handler
  2315. .set TWI0_TWIS_ISR, Default_IRQ_handler
  2316. .set TWI0_TWIM_ISR, Default_IRQ_handler
  2317. .set SPI0_INT_ISR, Default_IRQ_handler
  2318. .set USART0_RXC_ISR, Default_IRQ_handler
  2319. .set USART0_DRE_ISR, Default_IRQ_handler
  2320. .set USART0_TXC_ISR, Default_IRQ_handler
  2321. .set PORTD_PORT_ISR, Default_IRQ_handler
  2322. .set AC0_AC_ISR, Default_IRQ_handler
  2323. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  2324. .set ADC0_WCMP_ISR, Default_IRQ_handler
  2325. .set ZCD3_ZCD_ISR, Default_IRQ_handler
  2326. .set PORTC_PORT_ISR, Default_IRQ_handler
  2327. .set TCB2_INT_ISR, Default_IRQ_handler
  2328. .set USART1_RXC_ISR, Default_IRQ_handler
  2329. .set USART1_DRE_ISR, Default_IRQ_handler
  2330. .set USART1_TXC_ISR, Default_IRQ_handler
  2331. .set PORTF_PORT_ISR, Default_IRQ_handler
  2332. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  2333. end;
  2334. end.