ncgadd.pas 30 KB

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  1. {
  2. Copyright (c) 2000-2002 by the FPC development team
  3. Code generation for add nodes (generic version)
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncgadd;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,nadd,cpubase;
  22. type
  23. tcgaddnode = class(taddnode)
  24. { function pass_1: tnode; override;}
  25. procedure pass_generate_code;override;
  26. protected
  27. { call secondpass for both left and right }
  28. procedure pass_left_right;
  29. { set the register of the result location }
  30. procedure set_result_location_reg;
  31. { load left and right nodes into registers }
  32. procedure force_reg_left_right(allow_swap,allow_constant:boolean);
  33. procedure second_opfloat;
  34. procedure second_opboolean;
  35. procedure second_opsmallset;
  36. procedure second_op64bit;
  37. procedure second_opordinal;
  38. procedure second_addstring;virtual;
  39. procedure second_addfloat;virtual;abstract;
  40. procedure second_addboolean;virtual;
  41. procedure second_addsmallset;virtual;
  42. procedure second_addsmallsetelement;virtual;
  43. {$ifdef x86}
  44. {$ifdef SUPPORT_MMX}
  45. procedure second_opmmx;virtual;abstract;
  46. {$endif SUPPORT_MMX}
  47. {$endif x86}
  48. procedure second_opvector;virtual;abstract;
  49. procedure second_add64bit;virtual;
  50. procedure second_addordinal;virtual;
  51. procedure second_cmpfloat;virtual;abstract;
  52. procedure second_cmpboolean;virtual;
  53. procedure second_cmpsmallset;virtual;abstract;
  54. procedure second_cmp64bit;virtual;abstract;
  55. procedure second_cmpordinal;virtual;abstract;
  56. end;
  57. implementation
  58. uses
  59. globtype,systems,
  60. cutils,verbose,globals,
  61. symconst,symdef,paramgr,
  62. aasmbase,aasmtai,aasmdata,defutil,
  63. cgbase,procinfo,pass_2,tgobj,
  64. nutils,ncon,nset,ncgutil,cgobj,cgutils
  65. ;
  66. {*****************************************************************************
  67. Helpers
  68. *****************************************************************************}
  69. procedure tcgaddnode.pass_left_right;
  70. var
  71. tmpreg : tregister;
  72. {$ifdef x86}
  73. pushedfpu,
  74. {$endif x86}
  75. isjump : boolean;
  76. otl,ofl : tasmlabel;
  77. begin
  78. { calculate the operator which is more difficult }
  79. firstcomplex(self);
  80. { in case of constant put it to the left }
  81. if (left.nodetype=ordconstn) then
  82. swapleftright;
  83. isjump:=(left.expectloc=LOC_JUMP);
  84. if isjump then
  85. begin
  86. otl:=current_procinfo.CurrTrueLabel;
  87. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  88. ofl:=current_procinfo.CurrFalseLabel;
  89. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  90. end;
  91. secondpass(left);
  92. if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
  93. location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(resultdef),false);
  94. if isjump then
  95. begin
  96. current_procinfo.CurrTrueLabel:=otl;
  97. current_procinfo.CurrFalseLabel:=ofl;
  98. end;
  99. {$ifdef x86}
  100. { are too few registers free? }
  101. pushedfpu:=false;
  102. if (left.location.loc=LOC_FPUREGISTER) and
  103. (node_resources_fpu(right)>=maxfpuregs) then
  104. begin
  105. location_force_mem(current_asmdata.CurrAsmList,left.location);
  106. pushedfpu:=true;
  107. end;
  108. {$endif x86}
  109. isjump:=(right.expectloc=LOC_JUMP);
  110. if isjump then
  111. begin
  112. otl:=current_procinfo.CurrTrueLabel;
  113. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  114. ofl:=current_procinfo.CurrFalseLabel;
  115. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  116. end;
  117. secondpass(right);
  118. if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
  119. location_force_reg(current_asmdata.CurrAsmList,right.location,def_cgsize(resultdef),false);
  120. if isjump then
  121. begin
  122. current_procinfo.CurrTrueLabel:=otl;
  123. current_procinfo.CurrFalseLabel:=ofl;
  124. end;
  125. {$ifdef x86}
  126. if pushedfpu then
  127. begin
  128. if use_vectorfpu(left.resultdef) then
  129. begin
  130. tmpreg := cg.getmmregister(current_asmdata.CurrAsmList,left.location.size);
  131. cg.a_loadmm_loc_reg(current_asmdata.CurrAsmList,left.location.size,left.location,tmpreg,mms_movescalar);
  132. location_freetemp(current_asmdata.CurrAsmList,left.location);
  133. location_reset(left.location,LOC_MMREGISTER,left.location.size);
  134. left.location.register:=tmpreg;
  135. end
  136. else
  137. begin
  138. tmpreg := cg.getfpuregister(current_asmdata.CurrAsmList,left.location.size);
  139. cg.a_loadfpu_loc_reg(current_asmdata.CurrAsmList,left.location.size,left.location,tmpreg);
  140. location_freetemp(current_asmdata.CurrAsmList,left.location);
  141. location_reset(left.location,LOC_FPUREGISTER,left.location.size);
  142. left.location.register := tmpreg;
  143. { left operand is now on top of the stack, instead of the right one! }
  144. if (right.location.loc=LOC_FPUREGISTER) then
  145. toggleflag(nf_swapped);
  146. end;
  147. end;
  148. {$endif x86}
  149. end;
  150. procedure tcgaddnode.set_result_location_reg;
  151. begin
  152. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  153. {$ifdef x86}
  154. if left.location.loc=LOC_REGISTER then
  155. begin
  156. if TCGSize2Size[left.location.size]<>TCGSize2Size[location.size] then
  157. internalerror(200307041);
  158. {$ifndef cpu64bitalu}
  159. if location.size in [OS_64,OS_S64] then
  160. begin
  161. location.register64.reglo := left.location.register64.reglo;
  162. location.register64.reghi := left.location.register64.reghi;
  163. end
  164. else
  165. {$endif}
  166. location.register := left.location.register;
  167. end
  168. else
  169. if right.location.loc=LOC_REGISTER then
  170. begin
  171. if TCGSize2Size[right.location.size]<>TCGSize2Size[location.size] then
  172. internalerror(200307042);
  173. {$ifndef cpu64bitalu}
  174. if location.size in [OS_64,OS_S64] then
  175. begin
  176. location.register64.reglo := right.location.register64.reglo;
  177. location.register64.reghi := right.location.register64.reghi;
  178. end
  179. else
  180. {$endif}
  181. location.register := right.location.register;
  182. end
  183. else
  184. {$endif}
  185. begin
  186. {$ifndef cpu64bitalu}
  187. if location.size in [OS_64,OS_S64] then
  188. begin
  189. location.register64.reglo := cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  190. location.register64.reghi := cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  191. end
  192. else
  193. {$endif}
  194. location.register := cg.getintregister(current_asmdata.CurrAsmList,location.size);
  195. end;
  196. end;
  197. procedure tcgaddnode.force_reg_left_right(allow_swap,allow_constant:boolean);
  198. begin
  199. if (left.location.loc<>LOC_REGISTER) and
  200. not(
  201. allow_constant and
  202. (left.location.loc in [LOC_CONSTANT,LOC_CREGISTER])
  203. ) then
  204. location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,false);
  205. if (right.location.loc<>LOC_REGISTER) and
  206. not(
  207. allow_constant and
  208. (right.location.loc in [LOC_CONSTANT,LOC_CREGISTER]) and
  209. (left.location.loc<>LOC_CONSTANT)
  210. ) then
  211. location_force_reg(current_asmdata.CurrAsmList,right.location,right.location.size,false);
  212. { Left is always a register, right can be register or constant }
  213. if left.location.loc=LOC_CONSTANT then
  214. begin
  215. { when it is not allowed to swap we have a constant on
  216. left, that will give problems }
  217. if not allow_swap then
  218. internalerror(200307043);
  219. swapleftright;
  220. end;
  221. end;
  222. {*****************************************************************************
  223. Smallsets
  224. *****************************************************************************}
  225. procedure tcgaddnode.second_opsmallset;
  226. begin
  227. { when a setdef is passed, it has to be a smallset }
  228. if not(
  229. ((left.nodetype=setelementn) or is_smallset(left.resultdef)) and
  230. ((right.nodetype=setelementn) or is_smallset(right.resultdef))
  231. ) then
  232. internalerror(200203302);
  233. if (left.nodetype=setelementn) or (right.nodetype=setelementn) then
  234. second_addsmallsetelement
  235. else if nodetype in [equaln,unequaln,gtn,gten,lten,ltn] then
  236. second_cmpsmallset
  237. else
  238. second_addsmallset;
  239. end;
  240. procedure tcgaddnode.second_addsmallset;
  241. var
  242. cgop : TOpCg;
  243. opdone : boolean;
  244. begin
  245. opdone := false;
  246. pass_left_right;
  247. force_reg_left_right(true,true);
  248. set_result_location_reg;
  249. case nodetype of
  250. addn :
  251. cgop:=OP_OR;
  252. symdifn :
  253. cgop:=OP_XOR;
  254. muln :
  255. cgop:=OP_AND;
  256. subn :
  257. begin
  258. cgop:=OP_AND;
  259. if (not(nf_swapped in flags)) then
  260. if (right.location.loc=LOC_CONSTANT) then
  261. right.location.value := not(right.location.value)
  262. else
  263. opdone := true
  264. else if (left.location.loc=LOC_CONSTANT) then
  265. left.location.value := not(left.location.value)
  266. else
  267. begin
  268. swapleftright;
  269. opdone := true;
  270. end;
  271. if opdone then
  272. begin
  273. if (right.location.size<>left.location.size) or
  274. (location.size<>left.location.size) then
  275. internalerror(2010123001);
  276. { make sure we don't modify left/right.location, because we told
  277. force_reg_left_right above that they can be constant }
  278. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NOT,location.size,right.location.register,location.register);
  279. if left.location.loc = LOC_CONSTANT then
  280. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,location.size,left.location.value,location.register)
  281. else
  282. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_AND,location.size,left.location.register,location.register);
  283. end;
  284. end;
  285. else
  286. internalerror(2002072701);
  287. end;
  288. if not opdone then
  289. begin
  290. // these are all commutative operations
  291. if (left.location.loc = LOC_CONSTANT) then
  292. swapleftright;
  293. if (right.location.loc = LOC_CONSTANT) then
  294. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  295. right.location.value,left.location.register,
  296. location.register)
  297. else
  298. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  299. right.location.register,left.location.register,
  300. location.register);
  301. end;
  302. end;
  303. procedure tcgaddnode.second_addsmallsetelement;
  304. var
  305. tmpreg : tregister;
  306. mask,
  307. setbase : aint;
  308. cgop : TOpCg;
  309. begin
  310. if nodetype<>addn then
  311. internalerror(20080302);
  312. { setelementn is a special case, it must be on right }
  313. if (nf_swapped in flags) and
  314. (left.nodetype=setelementn) then
  315. swapleftright;
  316. { no range support for smallsets }
  317. if assigned(tsetelementnode(right).right) then
  318. internalerror(20080303);
  319. pass_left_right;
  320. force_reg_left_right(false,false);
  321. set_result_location_reg;
  322. setbase:=tsetdef(left.resultdef).setbase;
  323. if (right.location.loc = LOC_CONSTANT) then
  324. begin
  325. if (target_info.endian=endian_big) then
  326. mask:=aint((aword(1) shl (resultdef.size*8-1)) shr aword(right.location.value-setbase))
  327. else
  328. mask:=aint(1 shl (right.location.value-setbase));
  329. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,location.size,
  330. mask,left.location.register,location.register);
  331. end
  332. else
  333. begin
  334. if (target_info.endian=endian_big) then
  335. begin
  336. mask:=aint((aword(1) shl (resultdef.size*8-1)));
  337. cgop:=OP_SHR
  338. end
  339. else
  340. begin
  341. mask:=1;
  342. cgop:=OP_SHL
  343. end;
  344. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,location.size);
  345. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,mask,tmpreg);
  346. location_force_reg(current_asmdata.CurrAsmList,right.location,location.size,true);
  347. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,right.location,setbase);
  348. cg.a_op_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  349. right.location.register,tmpreg);
  350. if left.location.loc <> LOC_CONSTANT then
  351. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,location.size,tmpreg,
  352. left.location.register,location.register)
  353. else
  354. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,location.size,
  355. left.location.value,tmpreg,location.register);
  356. end;
  357. end;
  358. {*****************************************************************************
  359. Boolean
  360. *****************************************************************************}
  361. procedure tcgaddnode.second_opboolean;
  362. begin
  363. if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
  364. second_cmpboolean
  365. else
  366. second_addboolean;
  367. end;
  368. procedure tcgaddnode.second_addboolean;
  369. var
  370. cgop : TOpCg;
  371. otl,ofl : tasmlabel;
  372. oldflowcontrol : tflowcontrol;
  373. begin
  374. { And,Or will only evaluate from left to right only the
  375. needed nodes unless full boolean evaluation is enabled }
  376. if (nodetype in [orn,andn]) and
  377. (not(cs_full_boolean_eval in current_settings.localswitches) or
  378. (nf_short_bool in flags)) then
  379. begin
  380. location_reset(location,LOC_JUMP,OS_NO);
  381. case nodetype of
  382. andn :
  383. begin
  384. otl:=current_procinfo.CurrTrueLabel;
  385. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  386. secondpass(left);
  387. maketojumpbool(current_asmdata.CurrAsmList,left,lr_load_regvars);
  388. cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrTrueLabel);
  389. current_procinfo.CurrTrueLabel:=otl;
  390. end;
  391. orn :
  392. begin
  393. ofl:=current_procinfo.CurrFalseLabel;
  394. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  395. secondpass(left);
  396. maketojumpbool(current_asmdata.CurrAsmList,left,lr_load_regvars);
  397. cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
  398. current_procinfo.CurrFalseLabel:=ofl;
  399. end;
  400. else
  401. internalerror(200307044);
  402. end;
  403. { these jumps mean we're now in a flow control construct }
  404. oldflowcontrol:=flowcontrol;
  405. include(flowcontrol,fc_inflowcontrol);
  406. secondpass(right);
  407. maketojumpbool(current_asmdata.CurrAsmList,right,lr_load_regvars);
  408. flowcontrol:=oldflowcontrol+(flowcontrol-[fc_inflowcontrol]);
  409. end
  410. else
  411. begin
  412. pass_left_right;
  413. force_reg_left_right(false,true);
  414. set_result_location_reg;
  415. case nodetype of
  416. xorn :
  417. cgop:=OP_XOR;
  418. orn :
  419. cgop:=OP_OR;
  420. andn :
  421. cgop:=OP_AND;
  422. else
  423. internalerror(200203247);
  424. end;
  425. if right.location.loc <> LOC_CONSTANT then
  426. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  427. left.location.register,right.location.register,
  428. location.register)
  429. else
  430. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  431. right.location.value,left.location.register,
  432. location.register);
  433. end;
  434. end;
  435. {*****************************************************************************
  436. 64-bit
  437. *****************************************************************************}
  438. procedure tcgaddnode.second_op64bit;
  439. begin
  440. if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
  441. second_cmp64bit
  442. else
  443. second_add64bit;
  444. end;
  445. procedure tcgaddnode.second_add64bit;
  446. var
  447. op : TOpCG;
  448. checkoverflow : boolean;
  449. ovloc : tlocation;
  450. begin
  451. ovloc.loc:=LOC_VOID;
  452. pass_left_right;
  453. force_reg_left_right(false,true);
  454. set_result_location_reg;
  455. { assume no overflow checking is required }
  456. checkoverflow := false;
  457. case nodetype of
  458. addn :
  459. begin
  460. op:=OP_ADD;
  461. checkoverflow:=true;
  462. end;
  463. subn :
  464. begin
  465. op:=OP_SUB;
  466. checkoverflow:=true;
  467. end;
  468. xorn:
  469. op:=OP_XOR;
  470. orn:
  471. op:=OP_OR;
  472. andn:
  473. op:=OP_AND;
  474. muln:
  475. begin
  476. { should be handled in pass_1 (JM) }
  477. internalerror(200109051);
  478. end;
  479. else
  480. internalerror(2002072705);
  481. end;
  482. checkoverflow:=
  483. checkoverflow and
  484. (left.resultdef.typ<>pointerdef) and
  485. (right.resultdef.typ<>pointerdef);
  486. {$ifdef cpu64bitalu}
  487. case nodetype of
  488. xorn,orn,andn,addn:
  489. begin
  490. if (right.location.loc = LOC_CONSTANT) then
  491. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,op,location.size,right.location.value,
  492. left.location.register,location.register)
  493. else
  494. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,op,location.size,right.location.register,
  495. left.location.register,location.register);
  496. end;
  497. subn:
  498. begin
  499. if (nf_swapped in flags) then
  500. swapleftright;
  501. if left.location.loc <> LOC_CONSTANT then
  502. begin
  503. if right.location.loc <> LOC_CONSTANT then
  504. // reg64 - reg64
  505. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  506. right.location.register,left.location.register,location.register,
  507. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  508. else
  509. // reg64 - const64
  510. cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  511. right.location.value,left.location.register,location.register,
  512. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  513. end
  514. else
  515. begin
  516. // const64 - reg64
  517. location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
  518. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  519. right.location.register,left.location.register,location.register,
  520. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  521. end;
  522. end;
  523. else
  524. internalerror(2002072803);
  525. end;
  526. {$else cpu64bitalu}
  527. case nodetype of
  528. xorn,orn,andn,addn:
  529. begin
  530. if (right.location.loc = LOC_CONSTANT) then
  531. cg64.a_op64_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,op,location.size,right.location.value64,
  532. left.location.register64,location.register64,
  533. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  534. else
  535. cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,op,location.size,right.location.register64,
  536. left.location.register64,location.register64,
  537. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  538. end;
  539. subn:
  540. begin
  541. if (nf_swapped in flags) then
  542. swapleftright;
  543. if left.location.loc <> LOC_CONSTANT then
  544. begin
  545. if right.location.loc <> LOC_CONSTANT then
  546. // reg64 - reg64
  547. cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  548. right.location.register64,left.location.register64,
  549. location.register64,
  550. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  551. else
  552. // reg64 - const64
  553. cg64.a_op64_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  554. right.location.value64,left.location.register64,
  555. location.register64,
  556. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  557. end
  558. else
  559. begin
  560. // const64 - reg64
  561. location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
  562. cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  563. right.location.register64,left.location.register64,
  564. location.register64,
  565. checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  566. end;
  567. end;
  568. else
  569. internalerror(2002072803);
  570. end;
  571. {$endif cpu64bitalu}
  572. { emit overflow check if enabled }
  573. if checkoverflow then
  574. cg.g_overflowcheck_loc(current_asmdata.CurrAsmList,Location,resultdef,ovloc);
  575. end;
  576. {*****************************************************************************
  577. Strings
  578. *****************************************************************************}
  579. procedure tcgaddnode.second_addstring;
  580. begin
  581. { this should already be handled in pass1 }
  582. internalerror(2002072402);
  583. end;
  584. {*****************************************************************************
  585. Floats
  586. *****************************************************************************}
  587. procedure tcgaddnode.second_opfloat;
  588. begin
  589. if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
  590. second_cmpfloat
  591. else
  592. second_addfloat;
  593. end;
  594. {*****************************************************************************
  595. Ordinals
  596. *****************************************************************************}
  597. procedure tcgaddnode.second_opordinal;
  598. begin
  599. if (nodetype in [ltn,lten,gtn,gten,equaln,unequaln]) then
  600. second_cmpordinal
  601. else
  602. second_addordinal;
  603. end;
  604. procedure tcgaddnode.second_addordinal;
  605. var
  606. unsigned,
  607. checkoverflow : boolean;
  608. cgop : topcg;
  609. tmpreg : tregister;
  610. ovloc : tlocation;
  611. begin
  612. ovloc.loc:=LOC_VOID;
  613. pass_left_right;
  614. force_reg_left_right(false,true);
  615. set_result_location_reg;
  616. { determine if the comparison will be unsigned }
  617. unsigned:=not(is_signed(left.resultdef)) or
  618. not(is_signed(right.resultdef));
  619. { assume no overflow checking is require }
  620. checkoverflow := false;
  621. case nodetype of
  622. addn:
  623. begin
  624. cgop:=OP_ADD;
  625. checkoverflow:=true;
  626. end;
  627. xorn :
  628. begin
  629. cgop:=OP_XOR;
  630. end;
  631. orn :
  632. begin
  633. cgop:=OP_OR;
  634. end;
  635. andn:
  636. begin
  637. cgop:=OP_AND;
  638. end;
  639. muln:
  640. begin
  641. checkoverflow:=true;
  642. if unsigned then
  643. cgop:=OP_MUL
  644. else
  645. cgop:=OP_IMUL;
  646. end;
  647. subn :
  648. begin
  649. checkoverflow:=true;
  650. cgop:=OP_SUB;
  651. end;
  652. end;
  653. checkoverflow:=
  654. checkoverflow and
  655. (left.resultdef.typ<>pointerdef) and
  656. (right.resultdef.typ<>pointerdef);
  657. if nodetype<>subn then
  658. begin
  659. if (right.location.loc<>LOC_CONSTANT) then
  660. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,cgop,location.size,
  661. left.location.register,right.location.register,
  662. location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  663. else
  664. cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,cgop,location.size,
  665. right.location.value,left.location.register,
  666. location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  667. end
  668. else { subtract is a special case since its not commutative }
  669. begin
  670. if (nf_swapped in flags) then
  671. swapleftright;
  672. if left.location.loc<>LOC_CONSTANT then
  673. begin
  674. if right.location.loc<>LOC_CONSTANT then
  675. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  676. right.location.register,left.location.register,
  677. location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
  678. else
  679. cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  680. right.location.value,left.location.register,
  681. location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  682. end
  683. else
  684. begin
  685. tmpreg:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  686. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,
  687. left.location.value,tmpreg);
  688. cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  689. right.location.register,tmpreg,location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
  690. end;
  691. end;
  692. { emit overflow check if required }
  693. if checkoverflow then
  694. cg.g_overflowcheck_loc(current_asmdata.CurrAsmList,Location,resultdef,ovloc);
  695. end;
  696. procedure tcgaddnode.second_cmpboolean;
  697. begin
  698. second_cmpordinal;
  699. end;
  700. {*****************************************************************************
  701. pass_generate_code;
  702. *****************************************************************************}
  703. procedure tcgaddnode.pass_generate_code;
  704. begin
  705. case left.resultdef.typ of
  706. orddef :
  707. begin
  708. { handling boolean expressions }
  709. if is_boolean(left.resultdef) and
  710. is_boolean(right.resultdef) then
  711. second_opboolean
  712. { 64bit operations }
  713. else if is_64bit(left.resultdef) then
  714. second_op64bit
  715. else
  716. second_opordinal;
  717. end;
  718. stringdef :
  719. begin
  720. second_addstring;
  721. end;
  722. setdef :
  723. begin
  724. if is_smallset(tsetdef(left.resultdef)) then
  725. second_opsmallset
  726. else
  727. internalerror(200109041);
  728. end;
  729. arraydef :
  730. begin
  731. { support dynarr=nil }
  732. if is_dynamic_array(left.resultdef) then
  733. second_opordinal
  734. else
  735. if (cs_support_vectors in current_settings.globalswitches) and
  736. is_vector(left.resultdef) then
  737. second_opvector
  738. {$ifdef SUPPORT_MMX}
  739. else
  740. if is_mmx_able_array(left.resultdef) then
  741. second_opmmx
  742. {$endif SUPPORT_MMX}
  743. else
  744. internalerror(200306016);
  745. end;
  746. floatdef :
  747. second_opfloat;
  748. else
  749. second_opordinal;
  750. end;
  751. end;
  752. begin
  753. caddnode:=tcgaddnode;
  754. end.