fpc/compiler/sparc/spreg.dat

;
; Sparc registers
;
; layout
; <name>,<regtype>,<regnum>,<stdname>,<stabidx>,<dwarfidx>
;
NO,$00,$00,$00,INVALID,-1,-1
; Integer registers
G0,$01,$04,$00,%g0,1,1
G1,$01,$04,$01,%g1,2,2
G2,$01,$04,$02,%g2,3,3
G3,$01,$04,$03,%g3,4,4
G4,$01,$04,$04,%g4,5,5
G5,$01,$04,$05,%g5,6,6
G6,$01,$04,$06,%g6,7,7
G7,$01,$04,$07,%g7,8,8
O0,$01,$04,$08,%o0,9,9
O1,$01,$04,$09,%o1,10,10
O2,$01,$04,$0a,%o2,11,11
O3,$01,$04,$0b,%o3,12,12
O4,$01,$04,$0c,%o4,13,13
O5,$01,$04,$0d,%o5,14,14
O6,$01,$04,$0e,%o6,15,15
O7,$01,$04,$0f,%o7,16,16
L0,$01,$04,$10,%l0,17,17
L1,$01,$04,$11,%l1,18,18
L2,$01,$04,$12,%l2,19,19
L3,$01,$04,$13,%l3,20,20
L4,$01,$04,$14,%l4,21,21
L5,$01,$04,$15,%l5,22,22
L6,$01,$04,$16,%l6,23,23
L7,$01,$04,$17,%l7,24,24
I0,$01,$04,$18,%i0,25,25
I1,$01,$04,$19,%i1,26,26
I2,$01,$04,$1a,%i2,27,27
I3,$01,$04,$1b,%i3,28,28
I4,$01,$04,$1c,%i4,29,29
I5,$01,$04,$1d,%i5,30,30
I6,$01,$04,$1e,%i6,31,31
I7,$01,$04,$1f,%i7,32,32
; Aliases for stackpointer (%o6) and framepointer (%i6)
FP,$01,$04,$1e,%fp,31,31
SP,$01,$04,$0e,%sp,15,15
; Float registers, single use
F0,$02,$06,$00,%f0,32,32
F1,$02,$06,$01,%f1,32,32
F2,$02,$06,$02,%f2,32,32
F3,$02,$06,$03,%f3,32,32
F4,$02,$06,$04,%f4,32,32
F5,$02,$06,$05,%f5,32,32
F6,$02,$06,$06,%f6,32,32
F7,$02,$06,$07,%f7,32,32
F8,$02,$06,$08,%f8,32,32
F9,$02,$06,$09,%f9,32,32
F10,$02,$06,$0a,%f10,32,32
F11,$02,$06,$0b,%f11,32,32
F12,$02,$06,$0c,%f12,32,32
F13,$02,$06,$0d,%f13,32,32
F14,$02,$06,$0e,%f14,32,32
F15,$02,$06,$0f,%f15,32,32
F16,$02,$06,$10,%f16,32,32
F17,$02,$06,$11,%f17,32,32
F18,$02,$06,$12,%f18,32,32
F19,$02,$06,$13,%f19,32,32
F20,$02,$06,$14,%f20,32,32
F21,$02,$06,$15,%f21,32,32
F22,$02,$06,$16,%f22,32,32
F23,$02,$06,$17,%f23,32,32
F24,$02,$06,$18,%f24,32,32
F25,$02,$06,$19,%f25,32,32
F26,$02,$06,$1a,%f26,32,32
F27,$02,$06,$1b,%f27,32,32
F28,$02,$06,$1c,%f28,32,32
F29,$02,$06,$1d,%f29,32,32
F30,$02,$06,$1e,%f30,32,32
F31,$02,$06,$1f,%f31,32,32

; Coprocessor registers
C0,$03,$00,$00,%c0,32,32
C1,$03,$00,$01,%c1,32,32
C2,$03,$00,$02,%c2,32,32
C3,$03,$00,$03,%c3,32,32
C4,$03,$00,$04,%c4,32,32
C5,$03,$00,$05,%c5,32,32
C6,$03,$00,$06,%c6,32,32
C7,$03,$00,$07,%c7,32,32
C8,$03,$00,$08,%c8,32,32
C9,$03,$00,$09,%c9,32,32
C10,$03,$00,$0a,%c10,32,32
C11,$03,$00,$0b,%c11,32,32
C12,$03,$00,$0c,%c12,32,32
C13,$03,$00,$0d,%c13,32,32
C14,$03,$00,$0e,%c14,32,32
C15,$03,$00,$0f,%c15,32,32
C16,$03,$00,$10,%c16,32,32
C17,$03,$00,$11,%c17,32,32
C18,$03,$00,$12,%c18,32,32
C19,$03,$00,$13,%c19,32,32
C20,$03,$00,$14,%c20,32,32
C21,$03,$00,$15,%c21,32,32
C22,$03,$00,$16,%c22,32,32
C23,$03,$00,$17,%c23,32,32
C24,$03,$00,$18,%c24,32,32
C25,$03,$00,$19,%c25,32,32
C26,$03,$00,$1a,%c26,32,32
C27,$03,$00,$1b,%c27,32,32
C28,$03,$00,$1c,%c28,32,32
C29,$03,$00,$1d,%c29,32,32
C30,$03,$00,$1e,%c30,32,32
C31,$03,$00,$1f,%c31,32,32

; Special registers
FSR,$05,$00,$00,%fsr,64,64
FQ,$05,$00,$01,%fq,65,65
CSR,$05,$00,$02,%csr,64,64
CQ,$05,$00,$03,%cq,65,65
PSR,$05,$00,$04,%psr,64,64
TBR,$05,$00,$05,%tbr,64,64
WIM,$05,$00,$06,%wim,64,64
Y,$05,$00,$07,%y,64,64

; Ancillary State Registers
ASR0,$04,$00,$00,%asr0,32,32
ASR1,$04,$00,$01,%asr1,32,32
ASR2,$04,$00,$02,%asr2,32,32
ASR3,$04,$00,$03,%asr3,32,32
ASR4,$04,$00,$04,%asr4,32,32
ASR5,$04,$00,$05,%asr5,32,32
ASR6,$04,$00,$06,%asr6,32,32
ASR7,$04,$00,$07,%asr7,32,32
ASR8,$04,$00,$08,%asr8,32,32
ASR9,$04,$00,$09,%asr9,32,32
ASR10,$04,$00,$0a,%asr10,32,32
ASR11,$04,$00,$0b,%asr11,32,32
ASR12,$04,$00,$0c,%asr12,32,32
ASR13,$04,$00,$0d,%asr13,32,32
ASR14,$04,$00,$0e,%asr14,32,32
ASR15,$04,$00,$0f,%asr15,32,32
ASR16,$04,$00,$10,%asr16,32,32
ASR17,$04,$00,$11,%asr17,32,32
ASR18,$04,$00,$12,%asr18,32,32
ASR19,$04,$00,$13,%asr19,32,32
ASR20,$04,$00,$14,%asr20,32,32
ASR21,$04,$00,$15,%asr21,32,32
ASR22,$04,$00,$16,%asr22,32,32
ASR23,$04,$00,$17,%asr23,32,32
ASR24,$04,$00,$18,%asr24,32,32
ASR25,$04,$00,$19,%asr25,32,32
ASR26,$04,$00,$1a,%asr26,32,32
ASR27,$04,$00,$1b,%asr27,32,32
ASR28,$04,$00,$1c,%asr28,32,32
ASR29,$04,$00,$1d,%asr29,32,32
ASR30,$04,$00,$1e,%asr30,32,32
ASR31,$04,$00,$1f,%asr31,32,32