rgcpu.pas 5.1 KB

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  1. {
  2. Copyright (c) 1998-2008 by Florian Klaempfl
  3. This unit implements the avr specific class for the register
  4. allocator
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit rgcpu;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. aasmbase,aasmtai,aasmdata,aasmcpu,
  23. cgbase,cgutils,
  24. cpubase,
  25. rgobj;
  26. type
  27. trgcpu = class(trgobj)
  28. procedure add_constraints(reg:tregister);override;
  29. procedure do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override;
  30. procedure do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override;
  31. end;
  32. trgintcpu = class(trgcpu)
  33. procedure add_cpu_interferences(p : tai);override;
  34. end;
  35. implementation
  36. uses
  37. verbose, cutils,
  38. cgobj,
  39. procinfo;
  40. procedure trgcpu.add_constraints(reg:tregister);
  41. var
  42. supreg,i : Tsuperregister;
  43. begin
  44. case getsubreg(reg) of
  45. { Let 64bit floats conflict with all odd float regs }
  46. R_SUBFD:
  47. begin
  48. {
  49. supreg:=getsupreg(reg);
  50. i:=RS_F1;
  51. while (i<=RS_F31) do
  52. begin
  53. add_edge(supreg,i);
  54. inc(i,2);
  55. end;
  56. }
  57. end;
  58. { Let 64bit ints conflict with all odd int regs }
  59. R_SUBQ:
  60. begin
  61. supreg:=getsupreg(reg);
  62. {
  63. i:=RS_G1;
  64. while (i<=RS_I7) do
  65. begin
  66. add_edge(supreg,i);
  67. inc(i,2);
  68. end;
  69. }
  70. end;
  71. end;
  72. end;
  73. procedure trgcpu.do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);
  74. var
  75. helpins : tai;
  76. tmpref : treference;
  77. helplist : TAsmList;
  78. hreg : tregister;
  79. begin
  80. if abs(spilltemp.offset)>63 then
  81. begin
  82. helplist:=TAsmList.create;
  83. helplist.concat(taicpu.op_reg_const(A_LDI,NR_R26,lo(word(spilltemp.offset))));
  84. helplist.concat(taicpu.op_reg_const(A_LDI,NR_R27,hi(word(spilltemp.offset))));
  85. helplist.concat(taicpu.op_reg_reg(A_ADD,NR_R26,spilltemp.base));
  86. helplist.concat(taicpu.op_reg_reg(A_ADC,NR_R27,GetNextReg(spilltemp.base)));
  87. reference_reset_base(tmpref,NR_R26,0,1);
  88. helpins:=spilling_create_load(tmpref,tempreg);
  89. helplist.concat(helpins);
  90. list.insertlistafter(pos,helplist);
  91. helplist.free;
  92. end
  93. else
  94. inherited do_spill_read(list,pos,spilltemp,tempreg);
  95. end;
  96. procedure trgcpu.do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);
  97. var
  98. tmpref : treference;
  99. helplist : TAsmList;
  100. hreg : tregister;
  101. begin
  102. if abs(spilltemp.offset)>63 then
  103. begin
  104. helplist:=TAsmList.create;
  105. helplist.concat(taicpu.op_reg_const(A_LDI,NR_R26,lo(word(spilltemp.offset))));
  106. helplist.concat(taicpu.op_reg_const(A_LDI,NR_R27,hi(word(spilltemp.offset))));
  107. helplist.concat(taicpu.op_reg_reg(A_ADD,NR_R26,spilltemp.base));
  108. helplist.concat(taicpu.op_reg_reg(A_ADC,NR_R27,GetNextReg(spilltemp.base)));
  109. reference_reset_base(tmpref,NR_R26,0,1);
  110. helplist.concat(spilling_create_store(tempreg,tmpref));
  111. list.insertlistafter(pos,helplist);
  112. helplist.free;
  113. end
  114. else
  115. inherited do_spill_written(list,pos,spilltemp,tempreg);
  116. end;
  117. procedure trgintcpu.add_cpu_interferences(p : tai);
  118. var
  119. r : tsuperregister;
  120. begin
  121. if p.typ=ait_instruction then
  122. begin
  123. case taicpu(p).opcode of
  124. A_CPI,
  125. A_ANDI,
  126. A_ORI,
  127. A_SUBI,
  128. A_SBCI,
  129. A_LDI:
  130. for r:=RS_R0 to RS_R15 do
  131. add_edge(r,GetSupReg(taicpu(p).oper[0]^.reg));
  132. A_MULS:
  133. begin
  134. for r:=RS_R0 to RS_R15 do
  135. add_edge(r,GetSupReg(taicpu(p).oper[0]^.reg));
  136. for r:=RS_R0 to RS_R15 do
  137. add_edge(r,GetSupReg(taicpu(p).oper[1]^.reg));
  138. end;
  139. end;
  140. end;
  141. end;
  142. end.