ncgset.pas 66 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl and Carl Eric Codere
  3. Generate generic assembler for in set/case labels
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncgset;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. globtype,globals,constexp,symtype,
  22. node,nset,cpubase,cgbase,cgutils,cgobj,aasmbase,aasmtai,aasmdata;
  23. type
  24. tcgsetelementnode = class(tsetelementnode)
  25. procedure pass_generate_code;override;
  26. end;
  27. Tsetpart=record
  28. range : boolean; {Part is a range.}
  29. start,stop : byte; {Start/stop when range; Stop=element when an element.}
  30. end;
  31. Tsetparts=array[1..8] of Tsetpart;
  32. { tcginnode }
  33. tcginnode = class(tinnode)
  34. procedure in_smallset(opdef: tdef; setbase: aint); virtual;
  35. function pass_1: tnode;override;
  36. procedure pass_generate_code;override;
  37. protected
  38. function checkgenjumps(out setparts: Tsetparts; out numparts: byte; out use_small: boolean): boolean; virtual;
  39. function analizeset(const Aset:Tconstset;out setparts: Tsetparts; out numparts: byte;is_small:boolean):boolean;virtual;
  40. end;
  41. tcgcasenode = class(tcasenode)
  42. {
  43. Emits the case node statement. Contrary to the intel
  44. 80x86 version, this version does not emit jump tables,
  45. because of portability problems.
  46. }
  47. procedure pass_generate_code;override;
  48. protected
  49. with_sign : boolean;
  50. opsize : tdef;
  51. jmp_gt,jmp_lt,jmp_le : topcmp;
  52. { register with case expression }
  53. hregister,hregister2 : tregister;
  54. endlabel,elselabel : tasmlabel;
  55. { true, if we can omit the range check of the jump table }
  56. jumptable_no_range : boolean;
  57. { has the implementation jumptable support }
  58. min_label : tconstexprint;
  59. function GetBranchLabel(Block: TNode; out _Label: TAsmLabel): Boolean;
  60. function blocklabel(id:longint):tasmlabel;
  61. procedure optimizevalues(var max_linear_list:int64;var max_dist:qword);virtual;
  62. function has_jumptable : boolean;virtual;
  63. procedure genjumptable(hp : pcaselabel;min_,max_ : int64); virtual;
  64. procedure genlinearlist(hp : pcaselabel); virtual;
  65. procedure genlinearcmplist(hp : pcaselabel); virtual;
  66. procedure genjmptreeentry(p : pcaselabel;parentvalue : TConstExprInt); virtual;
  67. procedure genjmptree(root : pcaselabel); virtual;
  68. end;
  69. implementation
  70. uses
  71. verbose,
  72. cutils,
  73. symconst,symdef,symsym,defutil,
  74. pass_2,tgobj,
  75. nbas,ncon,ncgflw,
  76. {$ifdef WASM}
  77. hlcgcpu,aasmcpu,
  78. {$endif WASM}
  79. ncgutil,hlcgobj;
  80. {*****************************************************************************
  81. TCGSETELEMENTNODE
  82. *****************************************************************************}
  83. procedure tcgsetelementnode.pass_generate_code;
  84. begin
  85. { load the set element's value }
  86. secondpass(left);
  87. { also a second value ? }
  88. if assigned(right) then
  89. internalerror(2015111106);
  90. { we don't modify the left side, we only check the location type; our
  91. parent node (an add-node) will use the resulting location to perform
  92. the set operation without creating an intermediate set }
  93. location_copy(location,left.location);
  94. end;
  95. {*****************************************************************************
  96. *****************************************************************************}
  97. function tcginnode.analizeset(const Aset:Tconstset; out setparts:tsetparts; out numparts: byte; is_small:boolean):boolean;
  98. var
  99. compares,maxcompares:word;
  100. i:byte;
  101. begin
  102. analizeset:=false;
  103. fillchar(setparts,sizeof(setparts),0);
  104. numparts:=0;
  105. compares:=0;
  106. { Lots of comparisions take a lot of time, so do not allow
  107. too much comparisions. 8 comparisions are, however, still
  108. smalller than emitting the set }
  109. if cs_opt_size in current_settings.optimizerswitches then
  110. maxcompares:=8
  111. else
  112. maxcompares:=5;
  113. { when smallset is possible allow only 3 compares the smallset
  114. code is for littlesize also smaller when more compares are used }
  115. if is_small then
  116. maxcompares:=3;
  117. for i:=0 to 255 do
  118. if i in Aset then
  119. begin
  120. if (numparts=0) or (i<>setparts[numparts].stop+1) then
  121. begin
  122. {Set element is a separate element.}
  123. inc(compares);
  124. if compares>maxcompares then
  125. exit;
  126. inc(numparts);
  127. setparts[numparts].range:=false;
  128. setparts[numparts].stop:=i;
  129. end
  130. else
  131. {Set element is part of a range.}
  132. if not setparts[numparts].range then
  133. begin
  134. {Transform an element into a range.}
  135. setparts[numparts].range:=true;
  136. setparts[numparts].start:=setparts[numparts].stop;
  137. setparts[numparts].stop:=i;
  138. { there's only one compare per range anymore. Only a }
  139. { sub is added, but that's much faster than a }
  140. { cmp/jcc combo so neglect its effect }
  141. { inc(compares);
  142. if compares>maxcompares then
  143. exit; }
  144. end
  145. else
  146. begin
  147. {Extend a range.}
  148. setparts[numparts].stop:=i;
  149. end;
  150. end;
  151. analizeset:=true;
  152. end;
  153. procedure tcginnode.in_smallset(opdef: tdef; setbase: aint);
  154. begin
  155. { location is always LOC_REGISTER }
  156. location_reset(location, LOC_REGISTER, def_cgsize(resultdef));
  157. { allocate a register for the result }
  158. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, resultdef);
  159. {**************************** SMALL SET **********************}
  160. if left.location.loc=LOC_CONSTANT then
  161. begin
  162. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,
  163. right.resultdef, resultdef,
  164. left.location.value-setbase, right.location,
  165. location.register);
  166. end
  167. else
  168. begin
  169. hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location,
  170. left.resultdef, opdef, true);
  171. register_maybe_adjust_setbase(current_asmdata.CurrAsmList, opdef, left.location,
  172. setbase);
  173. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList, opdef,
  174. right.resultdef, resultdef, left.location.register, right.location,
  175. location.register);
  176. end;
  177. end;
  178. function tcginnode.checkgenjumps(out setparts: Tsetparts; out numparts: byte;out use_small: boolean): boolean;
  179. begin
  180. { check if we can use smallset operation using btl which is limited
  181. to 32 bits, the left side may also not contain higher values !! }
  182. use_small:=is_smallset(right.resultdef) and
  183. not is_signed(left.resultdef) and
  184. ((left.resultdef.typ=orddef) and (torddef(left.resultdef).high<32) or
  185. (left.resultdef.typ=enumdef) and (tenumdef(left.resultdef).max<32));
  186. { Can we generate jumps? Possible for all types of sets }
  187. checkgenjumps:=(right.nodetype=setconstn) and
  188. analizeset(Tsetconstnode(right).value_set^,setparts,numparts,use_small);
  189. end;
  190. function tcginnode.pass_1: tnode;
  191. var
  192. setparts: Tsetparts;
  193. numparts: byte;
  194. use_small: boolean;
  195. begin
  196. result := inherited pass_1;
  197. if not(assigned(result)) and
  198. checkgenjumps(setparts,numparts,use_small) then
  199. expectloc := LOC_JUMP;
  200. end;
  201. procedure tcginnode.pass_generate_code;
  202. var
  203. adjustment,
  204. setbase : {$ifdef CPU8BITALU}smallint{$else}aint{$endif};
  205. l, l2 : tasmlabel;
  206. hr,
  207. pleftreg : tregister;
  208. setparts : Tsetparts;
  209. opsize : tcgsize;
  210. opdef : tdef;
  211. uopsize : tcgsize;
  212. uopdef : tdef;
  213. orgopsize : tcgsize;
  214. genjumps,
  215. use_small : boolean;
  216. i,numparts : byte;
  217. needslabel : Boolean;
  218. begin
  219. l2:=nil;
  220. { We check first if we can generate jumps, this can be done
  221. because the resultdef is already set in firstpass }
  222. genjumps := checkgenjumps(setparts,numparts,use_small);
  223. orgopsize := def_cgsize(left.resultdef);
  224. {$if defined(cpu8bitalu)}
  225. if (tsetdef(right.resultdef).setbase>=-128) and
  226. (tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase+1<=256) then
  227. begin
  228. uopsize := OS_8;
  229. uopdef := u8inttype;
  230. if is_signed(left.resultdef) then
  231. begin
  232. opsize := OS_S8;
  233. opdef := s8inttype;
  234. end
  235. else
  236. begin
  237. opsize := uopsize;
  238. opdef := uopdef;
  239. end;
  240. end
  241. {$endif defined(cpu8bitalu)}
  242. {$if defined(cpu8bitalu)}
  243. { this should be also enabled for 16 bit CPUs, however, I have no proper testing facility for 16 bit, my
  244. testing results using Dosbox are no reliable }
  245. { $if defined(cpu8bitalu) or defined(cpu16bitalu)}
  246. else if (tsetdef(right.resultdef).setbase>=-32768) and
  247. (tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase+1<=65536) then
  248. begin
  249. uopsize := OS_16;
  250. uopdef := u16inttype;
  251. if is_signed(left.resultdef) then
  252. begin
  253. opsize := OS_S16;
  254. opdef := s16inttype;
  255. end
  256. else
  257. begin
  258. opsize := uopsize;
  259. opdef := uopdef;
  260. end;
  261. end
  262. else
  263. {$endif defined(cpu8bitalu)}
  264. begin
  265. uopsize := OS_32;
  266. uopdef := u32inttype;
  267. if is_signed(left.resultdef) then
  268. begin
  269. opsize := OS_S32;
  270. opdef := s32inttype;
  271. end
  272. else
  273. begin
  274. opsize := uopsize;
  275. opdef := uopdef;
  276. end;
  277. end;
  278. needslabel := false;
  279. if not genjumps then
  280. { calculate both operators }
  281. { the complex one first }
  282. { not in case of genjumps, because then we don't secondpass }
  283. { right at all (so we have to make sure that "right" really is }
  284. { "right" and not "swapped left" in that case) }
  285. firstcomplex(self);
  286. secondpass(left);
  287. if (left.expectloc=LOC_JUMP)<>
  288. (left.location.loc=LOC_JUMP) then
  289. internalerror(2007070101);
  290. { Only process the right if we are not generating jumps }
  291. if not genjumps then
  292. secondpass(right);
  293. if codegenerror then
  294. exit;
  295. { ofcourse not commutative }
  296. if nf_swapped in flags then
  297. swapleftright;
  298. setbase:=tsetdef(right.resultdef).setbase;
  299. if genjumps then
  300. begin
  301. { location is always LOC_JUMP }
  302. current_asmdata.getjumplabel(l);
  303. current_asmdata.getjumplabel(l2);
  304. location_reset_jump(location,l,l2);
  305. { If register is used, use only lower 8 bits }
  306. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
  307. pleftreg := left.location.register;
  308. { how much have we already substracted from the x in the }
  309. { "x in [y..z]" expression }
  310. adjustment := 0;
  311. hr:=NR_NO;
  312. for i:=1 to numparts do
  313. if setparts[i].range then
  314. { use fact that a <= x <= b <=> aword(x-a) <= aword(b-a) }
  315. begin
  316. { is the range different from all legal values? }
  317. if (setparts[i].stop-setparts[i].start <> 255) or not (orgopsize = OS_8) then
  318. begin
  319. { yes, is the lower bound <> 0? }
  320. if (setparts[i].start <> 0) then
  321. { we're going to substract from the left register, }
  322. { so in case of a LOC_CREGISTER first move the value }
  323. { to edi (not done before because now we can do the }
  324. { move and substract in one instruction with LEA) }
  325. if (left.location.loc = LOC_CREGISTER) and
  326. (hr<>pleftreg) then
  327. begin
  328. { don't change this back to a_op_const_reg/a_load_reg_reg, since pleftreg must not be modified }
  329. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,opdef);
  330. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,setparts[i].start,pleftreg,hr);
  331. pleftreg:=hr;
  332. end
  333. else
  334. begin
  335. { otherwise, the value is already in a register }
  336. { that can be modified }
  337. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,
  338. setparts[i].start-adjustment,pleftreg)
  339. end;
  340. { new total value substracted from x: }
  341. { adjustment + (setparts[i].start - adjustment) }
  342. adjustment := setparts[i].start;
  343. { check if result < b-a+1 (not "result <= b-a", since }
  344. { we need a carry in case the element is in the range }
  345. { (this will never overflow since we check at the }
  346. { beginning whether stop-start <> 255) }
  347. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, uopdef, OC_B,
  348. setparts[i].stop-setparts[i].start+1,pleftreg,location.truelabel);
  349. end
  350. else
  351. { if setparts[i].start = 0 and setparts[i].stop = 255, }
  352. { it's always true since "in" is only allowed for bytes }
  353. begin
  354. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.truelabel);
  355. end;
  356. end
  357. else
  358. begin
  359. { Emit code to check if left is an element }
  360. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_EQ,
  361. setparts[i].stop-adjustment,pleftreg,location.truelabel);
  362. end;
  363. { To compensate for not doing a second pass }
  364. right.location.reference.symbol:=nil;
  365. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
  366. end
  367. else
  368. {*****************************************************************}
  369. { NO JUMP TABLE GENERATION }
  370. {*****************************************************************}
  371. begin
  372. { We will now generated code to check the set itself, no jmps,
  373. handle smallsets separate, because it allows faster checks }
  374. if use_small then
  375. begin
  376. in_smallset(opdef, setbase);
  377. end
  378. else
  379. {************************** NOT SMALL SET ********************}
  380. begin
  381. { location is always LOC_REGISTER }
  382. location_reset(location, LOC_REGISTER, uopsize{def_cgsize(resultdef)});
  383. { allocate a register for the result }
  384. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, uopdef);
  385. if right.location.loc=LOC_CONSTANT then
  386. begin
  387. { can it actually occur currently? CEC }
  388. { yes: "if bytevar in [1,3,5,7,9,11,13,15]" (JM) }
  389. { note: this code assumes that left in [0..255], which is a valid }
  390. { assumption (other cases will be caught by range checking) (JM) }
  391. { load left in register }
  392. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,uopdef,true);
  393. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,uopdef,left.location,setbase);
  394. { emit bit test operation -- warning: do not use
  395. location_force_reg() to force a set into a register, except
  396. to a register of the same size as the set. The reason is
  397. that on big endian systems, this would require moving the
  398. set to the most significant part of the new register,
  399. and location_force_register can't do that (it does not
  400. know the type).
  401. a_bit_test_reg_loc_reg() properly takes into account the
  402. size of the set to adjust the register index to test }
  403. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,
  404. uopdef,right.resultdef,uopdef,
  405. left.location.register,right.location,location.register);
  406. { now zero the result if left > nr_of_bits_in_right_register }
  407. hr := hlcg.getintregister(current_asmdata.CurrAsmList,uopdef);
  408. { if left > tcgsize2size[opsize]*8 then hr := 0 else hr := $ffffffff }
  409. { (left.location.size = location.size at this point) }
  410. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList, OP_SUB, uopdef, tcgsize2size[opsize]*8, left.location.register, hr);
  411. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SAR, uopdef, (tcgsize2size[opsize]*8)-1, hr);
  412. { if left > tcgsize2size[opsize]*8-1, then result := 0 else result := result of bit test }
  413. hlcg.a_op_reg_reg(current_asmdata.CurrAsmList, OP_AND, uopdef, hr, location.register);
  414. end { of right.location.loc=LOC_CONSTANT }
  415. { do search in a normal set which could have >32 elements
  416. but also used if the left side contains higher values > 32 }
  417. else if (left.location.loc=LOC_CONSTANT) then
  418. begin
  419. if (left.location.value < setbase) or (((left.location.value-setbase) shr 3) >= right.resultdef.size) then
  420. {should be caught earlier }
  421. internalerror(2007020402);
  422. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,right.resultdef,uopdef,left.location.value-setbase,
  423. right.location,location.register);
  424. end
  425. else
  426. begin
  427. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
  428. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,opdef,left.location,setbase);
  429. pleftreg := left.location.register;
  430. if (opsize >= OS_S8) or { = if signed }
  431. ((left.resultdef.typ=orddef) and
  432. ((torddef(left.resultdef).low < int64(tsetdef(right.resultdef).setbase)) or
  433. (torddef(left.resultdef).high > int64(tsetdef(right.resultdef).setmax)))) or
  434. ((left.resultdef.typ=enumdef) and
  435. ((tenumdef(left.resultdef).min < aint(tsetdef(right.resultdef).setbase)) or
  436. (tenumdef(left.resultdef).max > aint(tsetdef(right.resultdef).setmax)))) then
  437. begin
  438. {$ifdef WASM}
  439. needslabel := True;
  440. thlcgwasm(hlcg).a_cmp_const_reg_stack(current_asmdata.CurrAsmList, opdef, OC_A, tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase, pleftreg);
  441. current_asmdata.CurrAsmList.concat(taicpu.op_none(a_if));
  442. thlcgwasm(hlcg).incblock;
  443. thlcgwasm(hlcg).decstack(current_asmdata.CurrAsmList,1);
  444. hlcg.a_load_const_reg(current_asmdata.CurrAsmList, uopdef, 0, location.register);
  445. current_asmdata.CurrAsmList.concat(taicpu.op_none(a_else));
  446. {$else WASM}
  447. current_asmdata.getjumplabel(l);
  448. current_asmdata.getjumplabel(l2);
  449. needslabel := True;
  450. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_BE, tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase, pleftreg, l);
  451. hlcg.a_load_const_reg(current_asmdata.CurrAsmList, uopdef, 0, location.register);
  452. hlcg.a_jmp_always(current_asmdata.CurrAsmList, l2);
  453. hlcg.a_label(current_asmdata.CurrAsmList, l);
  454. {$endif WASM}
  455. end;
  456. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,opdef,right.resultdef,uopdef,
  457. pleftreg,right.location,location.register);
  458. if needslabel then
  459. begin
  460. {$ifdef WASM}
  461. current_asmdata.CurrAsmList.concat(taicpu.op_none(a_end_if));
  462. thlcgwasm(hlcg).decblock;
  463. {$else WASM}
  464. hlcg.a_label(current_asmdata.CurrAsmList, l2);
  465. {$endif WASM}
  466. end
  467. end;
  468. {$ifndef cpuhighleveltarget}
  469. location.size := def_cgsize(resultdef);
  470. location.register := cg.makeregsize(current_asmdata.CurrAsmList, location.register, location.size);
  471. {$else not cpuhighleveltarget}
  472. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  473. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,uopdef,resultdef,location.register,hr);
  474. location.register:=hr;
  475. location.size := def_cgsize(resultdef);
  476. {$endif not cpuhighleveltarget}
  477. end;
  478. end;
  479. location_freetemp(current_asmdata.CurrAsmList, right.location);
  480. end;
  481. {*****************************************************************************
  482. TCGCASENODE
  483. *****************************************************************************}
  484. { Analyse the nodes following the else label - if empty, change to end label }
  485. function tcgcasenode.GetBranchLabel(Block: TNode; out _Label: TAsmLabel): Boolean;
  486. var
  487. LabelSym: TLabelSym;
  488. begin
  489. Result := True;
  490. if not Assigned(Block) then
  491. begin
  492. { Block doesn't exist / is empty }
  493. _Label := endlabel;
  494. Exit;
  495. end;
  496. { These optimisations aren't particularly debugger friendly }
  497. if not (cs_opt_level2 in current_settings.optimizerswitches) then
  498. begin
  499. Result := False;
  500. current_asmdata.getjumplabel(_Label);
  501. Exit;
  502. end;
  503. while Assigned(Block) do
  504. begin
  505. case Block.nodetype of
  506. nothingn:
  507. begin
  508. _Label := endlabel;
  509. Exit;
  510. end;
  511. goton:
  512. begin
  513. LabelSym := TCGGotoNode(Block).labelsym;
  514. if not Assigned(LabelSym) then
  515. InternalError(2018121131);
  516. _Label := TCGLabelNode(TCGGotoNode(Block).labelnode).getasmlabel;
  517. if Assigned(_Label) then
  518. { Keep tabs on the fact that an actual 'goto' was used }
  519. Include(flowcontrol,fc_gotolabel)
  520. else
  521. Break;
  522. Exit;
  523. end;
  524. blockn:
  525. begin
  526. Block := TBlockNode(Block).Left;
  527. Continue;
  528. end;
  529. statementn:
  530. begin
  531. { If the right node is assigned, then it's a compound block
  532. that can't be simplified, so fall through, set Result to
  533. False and make a new label }
  534. if Assigned(TStatementNode(Block).right) then
  535. Break;
  536. Block := TStatementNode(Block).Left;
  537. Continue;
  538. end;
  539. else
  540. ;
  541. end;
  542. Break;
  543. end;
  544. { Create unique label }
  545. Result := False;
  546. current_asmdata.getjumplabel(_Label);
  547. end;
  548. function tcgcasenode.blocklabel(id:longint):tasmlabel;
  549. begin
  550. if not assigned(blocks[id]) then
  551. internalerror(200411301);
  552. result:=pcaseblock(blocks[id])^.blocklabel;
  553. end;
  554. procedure tcgcasenode.optimizevalues(var max_linear_list:int64;var max_dist:qword);
  555. begin
  556. { no changes by default }
  557. end;
  558. function tcgcasenode.has_jumptable : boolean;
  559. begin
  560. { No jumptable support in the default implementation }
  561. has_jumptable:=false;
  562. end;
  563. procedure tcgcasenode.genjumptable(hp : pcaselabel;min_,max_ : int64);
  564. begin
  565. internalerror(200209161);
  566. end;
  567. procedure tcgcasenode.genlinearlist(hp : pcaselabel);
  568. var
  569. first : boolean;
  570. last : TConstExprInt;
  571. scratch_reg: tregister;
  572. newsize: tcgsize;
  573. newdef: tdef;
  574. procedure gensub(value:tcgint);
  575. begin
  576. { here, since the sub and cmp are separate we need
  577. to move the result before subtract to help
  578. the register allocator
  579. }
  580. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList, opsize, opsize, hregister, scratch_reg);
  581. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SUB, opsize, value, hregister);
  582. end;
  583. procedure genitem(t : pcaselabel);
  584. begin
  585. if assigned(t^.less) then
  586. genitem(t^.less);
  587. { do we need to test the first value? }
  588. if first and (t^._low>get_min_value(left.resultdef)) then
  589. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_lt,tcgint(t^._low.svalue),hregister,elselabel);
  590. if t^._low=t^._high then
  591. begin
  592. if t^._low-last=0 then
  593. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,OC_EQ,0,hregister,blocklabel(t^.blockid))
  594. else
  595. begin
  596. gensub(tcgint(t^._low.svalue-last.svalue));
  597. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,
  598. OC_EQ,tcgint(t^._low.svalue-last.svalue),scratch_reg,blocklabel(t^.blockid));
  599. end;
  600. last:=t^._low;
  601. end
  602. else
  603. begin
  604. { it begins with the smallest label, if the value }
  605. { is even smaller then jump immediately to the }
  606. { ELSE-label }
  607. if first then
  608. begin
  609. { have we to ajust the first value ? }
  610. if (t^._low>get_min_value(left.resultdef)) or (get_min_value(left.resultdef)<>0) then
  611. gensub(tcgint(t^._low.svalue));
  612. end
  613. else
  614. begin
  615. { if there is no unused label between the last and the }
  616. { present label then the lower limit can be checked }
  617. { immediately. else check the range in between: }
  618. gensub(tcgint(t^._low.svalue-last.svalue));
  619. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize,jmp_lt,tcgint(t^._low.svalue-last.svalue),scratch_reg,elselabel);
  620. end;
  621. gensub(tcgint(t^._high.svalue-t^._low.svalue));
  622. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_le,tcgint(t^._high.svalue-t^._low.svalue),scratch_reg,blocklabel(t^.blockid));
  623. last:=t^._high;
  624. end;
  625. first:=false;
  626. if assigned(t^.greater) then
  627. genitem(t^.greater);
  628. end;
  629. begin
  630. { do we need to generate cmps? }
  631. if (with_sign and (min_label<0)) then
  632. genlinearcmplist(hp)
  633. else
  634. begin
  635. { sign/zero extend the value to a full register before starting to
  636. subtract values, so that on platforms that don't have
  637. subregisters of the same size as the value we don't generate
  638. sign/zero-extensions after every subtraction
  639. make newsize always signed, since we only do this if the size in
  640. bytes of the register is larger than the original opsize, so
  641. the value can always be represented by a larger signed type }
  642. newsize:=tcgsize2signed[reg_cgsize(hregister)];
  643. if tcgsize2size[newsize]>opsize.size then
  644. begin
  645. newdef:=cgsize_orddef(newsize);
  646. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,newdef);
  647. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,newdef,hregister,scratch_reg);
  648. hregister:=scratch_reg;
  649. opsize:=newdef;
  650. end;
  651. if (labelcnt>1) or not(cs_opt_level1 in current_settings.optimizerswitches) then
  652. begin
  653. last:=0;
  654. first:=true;
  655. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
  656. genitem(hp);
  657. end
  658. else
  659. begin
  660. { If only one label exists, we can greatly simplify the checks to a simple comparison }
  661. if hp^._low=hp^._high then
  662. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, tcgint(hp^._low.svalue), hregister, blocklabel(hp^.blockid))
  663. else
  664. begin
  665. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
  666. gensub(tcgint(hp^._low.svalue));
  667. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_BE, tcgint(hp^._high.svalue-hp^._low.svalue), hregister, blocklabel(hp^.blockid))
  668. end;
  669. end;
  670. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  671. end;
  672. end;
  673. procedure tcgcasenode.genlinearcmplist(hp : pcaselabel);
  674. var
  675. last : TConstExprInt;
  676. lastwasrange: boolean;
  677. procedure genitem(t : pcaselabel);
  678. {$if not defined(cpu64bitalu) and not defined(cpuhighleveltarget)}
  679. var
  680. l1 : tasmlabel;
  681. {$endif not cpu64bitalu and not cpuhighleveltarget}
  682. begin
  683. if assigned(t^.less) then
  684. genitem(t^.less);
  685. if t^._low=t^._high then
  686. begin
  687. {$ifndef cpuhighleveltarget}
  688. {$if defined(cpu32bitalu)}
  689. if def_cgsize(opsize) in [OS_S64,OS_64] then
  690. begin
  691. current_asmdata.getjumplabel(l1);
  692. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_NE, aint(hi(int64(t^._low.svalue))),hregister2,l1);
  693. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_EQ, aint(lo(int64(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  694. cg.a_label(current_asmdata.CurrAsmList,l1);
  695. end
  696. else
  697. {$elseif defined(cpu16bitalu)}
  698. if def_cgsize(opsize) in [OS_S64,OS_64] then
  699. begin
  700. current_asmdata.getjumplabel(l1);
  701. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(hi(int64(t^._low.svalue)))),cg.GetNextReg(hregister2),l1);
  702. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(lo(hi(int64(t^._low.svalue)))),hregister2,l1);
  703. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(lo(int64(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
  704. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(lo(int64(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  705. cg.a_label(current_asmdata.CurrAsmList,l1);
  706. end
  707. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  708. begin
  709. current_asmdata.getjumplabel(l1);
  710. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(int32(t^._low.svalue))),cg.GetNextReg(hregister),l1);
  711. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(int32(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  712. cg.a_label(current_asmdata.CurrAsmList,l1);
  713. end
  714. else
  715. {$elseif defined(cpu8bitalu)}
  716. if def_cgsize(opsize) in [OS_S64,OS_64] then
  717. begin
  718. current_asmdata.getjumplabel(l1);
  719. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
  720. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
  721. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),l1);
  722. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  723. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  724. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  725. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),l1);
  726. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,blocklabel(t^.blockid));
  727. cg.a_label(current_asmdata.CurrAsmList,l1);
  728. end
  729. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  730. begin
  731. current_asmdata.getjumplabel(l1);
  732. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  733. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  734. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
  735. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(int32(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  736. cg.a_label(current_asmdata.CurrAsmList,l1);
  737. end
  738. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  739. begin
  740. current_asmdata.getjumplabel(l1);
  741. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),l1);
  742. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(int16(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  743. cg.a_label(current_asmdata.CurrAsmList,l1);
  744. end
  745. else
  746. {$endif}
  747. {$endif cpuhighleveltarget}
  748. begin
  749. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, tcgint(t^._low.svalue),hregister, blocklabel(t^.blockid));
  750. end;
  751. { Reset last here, because we've only checked for one value and need to compare
  752. for the next range both the lower and upper bound }
  753. lastwasrange := false;
  754. end
  755. else
  756. begin
  757. { it begins with the smallest label, if the value }
  758. { is even smaller then jump immediately to the }
  759. { ELSE-label }
  760. if not lastwasrange or (t^._low-last>1) then
  761. begin
  762. {$ifndef cpuhighleveltarget}
  763. {$if defined(cpu32bitalu)}
  764. if def_cgsize(opsize) in [OS_64,OS_S64] then
  765. begin
  766. current_asmdata.getjumplabel(l1);
  767. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._low.svalue))),
  768. hregister2, elselabel);
  769. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._low.svalue))),
  770. hregister2, l1);
  771. { the comparisation of the low dword must be always unsigned! }
  772. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_B, aint(lo(int64(t^._low.svalue))), hregister, elselabel);
  773. cg.a_label(current_asmdata.CurrAsmList,l1);
  774. end
  775. else
  776. {$elseif defined(cpu16bitalu)}
  777. if def_cgsize(opsize) in [OS_64,OS_S64] then
  778. begin
  779. current_asmdata.getjumplabel(l1);
  780. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._low.svalue)))),
  781. cg.GetNextReg(hregister2), elselabel);
  782. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._low.svalue)))),
  783. cg.GetNextReg(hregister2), l1);
  784. { the comparison of the low words must be always unsigned! }
  785. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._low.svalue)))),
  786. hregister2, elselabel);
  787. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._low.svalue)))),
  788. hregister2, l1);
  789. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._low.svalue)))),
  790. cg.GetNextReg(hregister), elselabel);
  791. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._low.svalue)))),
  792. cg.GetNextReg(hregister), l1);
  793. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(lo(int64(t^._low.svalue)))), hregister, elselabel);
  794. cg.a_label(current_asmdata.CurrAsmList,l1);
  795. end
  796. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  797. begin
  798. current_asmdata.getjumplabel(l1);
  799. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._low.svalue))),
  800. cg.GetNextReg(hregister), elselabel);
  801. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._low.svalue))),
  802. cg.GetNextReg(hregister), l1);
  803. { the comparisation of the low dword must be always unsigned! }
  804. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(int32(t^._low.svalue))), hregister, elselabel);
  805. cg.a_label(current_asmdata.CurrAsmList,l1);
  806. end
  807. else
  808. {$elseif defined(cpu8bitalu)}
  809. if def_cgsize(opsize) in [OS_64,OS_S64] then
  810. begin
  811. current_asmdata.getjumplabel(l1);
  812. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),elselabel);
  813. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
  814. { the comparison of the low words must be always unsigned! }
  815. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),elselabel);
  816. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
  817. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),elselabel);
  818. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),l1);
  819. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,elselabel);
  820. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  821. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),elselabel);
  822. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  823. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),elselabel);
  824. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  825. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),elselabel);
  826. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),l1);
  827. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,elselabel);
  828. cg.a_label(current_asmdata.CurrAsmList,l1);
  829. end
  830. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  831. begin
  832. current_asmdata.getjumplabel(l1);
  833. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),elselabel);
  834. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8,jmp_gt,aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  835. { the comparison of the low words must be always unsigned! }
  836. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),elselabel);
  837. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  838. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),elselabel);
  839. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
  840. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(int32(t^._low.svalue)))),hregister,elselabel);
  841. cg.a_label(current_asmdata.CurrAsmList,l1);
  842. end
  843. else if def_cgsize(opsize) in [OS_16,OS_S16] then
  844. begin
  845. current_asmdata.getjumplabel(l1);
  846. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),elselabel);
  847. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),l1);
  848. { the comparisation of the low dword must be always unsigned! }
  849. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(int16(t^._low.svalue))),hregister,elselabel);
  850. cg.a_label(current_asmdata.CurrAsmList,l1);
  851. end
  852. else
  853. {$endif}
  854. {$endif cpuhighleveltarget}
  855. begin
  856. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_lt, tcgint(t^._low.svalue), hregister,
  857. elselabel);
  858. end;
  859. end;
  860. {$ifndef cpuhighleveltarget}
  861. {$if defined(cpu32bitalu)}
  862. if def_cgsize(opsize) in [OS_S64,OS_64] then
  863. begin
  864. current_asmdata.getjumplabel(l1);
  865. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._high.svalue))), hregister2,
  866. blocklabel(t^.blockid));
  867. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._high.svalue))), hregister2,
  868. l1);
  869. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_BE, aint(lo(int64(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  870. cg.a_label(current_asmdata.CurrAsmList,l1);
  871. end
  872. else
  873. {$elseif defined(cpu16bitalu)}
  874. if def_cgsize(opsize) in [OS_S64,OS_64] then
  875. begin
  876. current_asmdata.getjumplabel(l1);
  877. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._high.svalue)))), cg.GetNextReg(hregister2),
  878. blocklabel(t^.blockid));
  879. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._high.svalue)))), cg.GetNextReg(hregister2),
  880. l1);
  881. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  882. blocklabel(t^.blockid));
  883. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  884. l1);
  885. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._high.svalue)))), cg.GetNextReg(hregister),
  886. blocklabel(t^.blockid));
  887. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._high.svalue)))), cg.GetNextReg(hregister),
  888. l1);
  889. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(lo(int64(t^._high.svalue)))), hregister, blocklabel(t^.blockid));
  890. cg.a_label(current_asmdata.CurrAsmList,l1);
  891. end
  892. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  893. begin
  894. current_asmdata.getjumplabel(l1);
  895. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._high.svalue))), cg.GetNextReg(hregister),
  896. blocklabel(t^.blockid));
  897. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._high.svalue))), cg.GetNextReg(hregister),
  898. l1);
  899. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(int32(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  900. cg.a_label(current_asmdata.CurrAsmList,l1);
  901. end
  902. else
  903. {$elseif defined(cpu8bitalu)}
  904. if def_cgsize(opsize) in [OS_S64,OS_64] then
  905. begin
  906. current_asmdata.getjumplabel(l1);
  907. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),blocklabel(t^.blockid));
  908. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
  909. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),blocklabel(t^.blockid));
  910. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
  911. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._high.svalue))))),cg.GetNextReg(hregister2),blocklabel(t^.blockid));
  912. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._high.svalue))))),cg.GetNextReg(hregister2),l1);
  913. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,blocklabel(t^.blockid));
  914. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,l1);
  915. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),blocklabel(t^.blockid));
  916. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  917. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),blocklabel(t^.blockid));
  918. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  919. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._high.svalue))))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
  920. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._high.svalue))))),cg.GetNextReg(hregister),l1);
  921. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(lo(int64(t^._high.svalue))))),hregister,blocklabel(t^.blockid));
  922. cg.a_label(current_asmdata.CurrAsmList,l1);
  923. end
  924. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  925. begin
  926. current_asmdata.getjumplabel(l1);
  927. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),blocklabel(t^.blockid));
  928. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  929. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),blocklabel(t^.blockid));
  930. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  931. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._high.svalue)))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
  932. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._high.svalue)))),cg.GetNextReg(hregister),l1);
  933. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(int32(t^._high.svalue)))),hregister,blocklabel(t^.blockid));
  934. cg.a_label(current_asmdata.CurrAsmList,l1);
  935. end
  936. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  937. begin
  938. current_asmdata.getjumplabel(l1);
  939. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._high.svalue))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
  940. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._high.svalue))),cg.GetNextReg(hregister),l1);
  941. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(int16(t^._high.svalue))),hregister,blocklabel(t^.blockid));
  942. cg.a_label(current_asmdata.CurrAsmList,l1);
  943. end
  944. else
  945. {$endif}
  946. {$endif cpuhighleveltarget}
  947. begin
  948. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_le, tcgint(t^._high.svalue), hregister, blocklabel(t^.blockid));
  949. end;
  950. last:=t^._high;
  951. lastwasrange := true;
  952. end;
  953. if assigned(t^.greater) then
  954. genitem(t^.greater);
  955. end;
  956. begin
  957. last:=0;
  958. lastwasrange:=false;
  959. genitem(hp);
  960. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  961. end;
  962. procedure tcgcasenode.genjmptreeentry(p : pcaselabel;parentvalue : TConstExprInt);
  963. var
  964. lesslabel,greaterlabel : tasmlabel;
  965. begin
  966. current_asmdata.CurrAsmList.concat(cai_align.Create(current_settings.alignment.jumpalign));
  967. cg.a_label(current_asmdata.CurrAsmList,p^.labellabel);
  968. { calculate labels for left and right }
  969. if p^.less=nil then
  970. lesslabel:=elselabel
  971. else
  972. lesslabel:=p^.less^.labellabel;
  973. if p^.greater=nil then
  974. greaterlabel:=elselabel
  975. else
  976. greaterlabel:=p^.greater^.labellabel;
  977. { calculate labels for left and right }
  978. { no range label: }
  979. if p^._low=p^._high then
  980. begin
  981. if greaterlabel=lesslabel then
  982. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_NE,p^._low,hregister, lesslabel)
  983. else
  984. begin
  985. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize, jmp_lt,p^._low,hregister, lesslabel);
  986. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize, jmp_gt,p^._low,hregister, greaterlabel);
  987. end;
  988. hlcg.a_jmp_always(current_asmdata.CurrAsmList,blocklabel(p^.blockid));
  989. end
  990. else
  991. begin
  992. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_lt,p^._low, hregister, lesslabel);
  993. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_gt,p^._high,hregister, greaterlabel);
  994. hlcg.a_jmp_always(current_asmdata.CurrAsmList,blocklabel(p^.blockid));
  995. end;
  996. if assigned(p^.less) then
  997. genjmptreeentry(p^.less,p^._low);
  998. if assigned(p^.greater) then
  999. genjmptreeentry(p^.greater,p^._high);
  1000. end;
  1001. procedure tcgcasenode.genjmptree(root : pcaselabel);
  1002. type
  1003. tlabelarrayentry = record
  1004. caselabel : pcaselabel;
  1005. asmlabel : TAsmLabel;
  1006. end;
  1007. tlabelarray = array of tlabelarrayentry;
  1008. var
  1009. labelarray : tlabelarray;
  1010. var
  1011. nextarrayentry : int64;
  1012. i : longint;
  1013. procedure addarrayentry(entry : pcaselabel);
  1014. begin
  1015. if assigned(entry^.less) then
  1016. addarrayentry(entry^.less);
  1017. with labelarray[nextarrayentry] do
  1018. begin
  1019. caselabel:=entry;
  1020. current_asmdata.getjumplabel(asmlabel);
  1021. end;
  1022. inc(nextarrayentry);
  1023. if assigned(entry^.greater) then
  1024. addarrayentry(entry^.greater);
  1025. end;
  1026. { rebuild the label tree balanced }
  1027. procedure rebuild(first,last : int64;var p : pcaselabel);
  1028. var
  1029. current : int64;
  1030. begin
  1031. current:=(first+last) div 2;
  1032. p:=labelarray[current].caselabel;
  1033. if first<current then
  1034. rebuild(first,current-1,p^.less)
  1035. else
  1036. p^.less:=nil;
  1037. if last>current then
  1038. rebuild(current+1,last,p^.greater)
  1039. else
  1040. p^.greater:=nil;
  1041. end;
  1042. begin
  1043. labelarray:=nil;
  1044. SetLength(labelarray,labelcnt);
  1045. nextarrayentry:=0;
  1046. addarrayentry(root);
  1047. rebuild(0,high(labelarray),root);
  1048. for i:=0 to high(labelarray) do
  1049. current_asmdata.getjumplabel(labelarray[i].caselabel^.labellabel);
  1050. genjmptreeentry(root,root^._high+10);
  1051. end;
  1052. procedure tcgcasenode.pass_generate_code;
  1053. var
  1054. oldflowcontrol: tflowcontrol;
  1055. i : longint;
  1056. dist : asizeuint;
  1057. distv,
  1058. lv,hv,
  1059. max_label: tconstexprint;
  1060. max_linear_list : int64;
  1061. max_dist : qword;
  1062. ShortcutElse: Boolean;
  1063. begin
  1064. location_reset(location,LOC_VOID,OS_NO);
  1065. oldflowcontrol := flowcontrol;
  1066. include(flowcontrol,fc_inflowcontrol);
  1067. { Allocate labels }
  1068. current_asmdata.getjumplabel(endlabel);
  1069. { Do some optimisation to deal with empty else blocks }
  1070. ShortcutElse := GetBranchLabel(elseblock, elselabel);
  1071. for i:=0 to blocks.count-1 do
  1072. with pcaseblock(blocks[i])^ do
  1073. shortcut := GetBranchLabel(statement, blocklabel);
  1074. with_sign:=is_signed(left.resultdef);
  1075. if with_sign then
  1076. begin
  1077. jmp_gt:=OC_GT;
  1078. jmp_lt:=OC_LT;
  1079. jmp_le:=OC_LTE;
  1080. end
  1081. else
  1082. begin
  1083. jmp_gt:=OC_A;
  1084. jmp_lt:=OC_B;
  1085. jmp_le:=OC_BE;
  1086. end;
  1087. secondpass(left);
  1088. if (left.expectloc=LOC_JUMP)<>
  1089. (left.location.loc=LOC_JUMP) then
  1090. internalerror(2006050501);
  1091. { determines the size of the operand }
  1092. opsize:=left.resultdef;
  1093. { copy the case expression to a register }
  1094. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opsize,false);
  1095. {$if not defined(cpu64bitalu)}
  1096. if def_cgsize(opsize) in [OS_S64,OS_64] then
  1097. begin
  1098. hregister:=left.location.register64.reglo;
  1099. hregister2:=left.location.register64.reghi;
  1100. end
  1101. else
  1102. {$endif not cpu64bitalu and not cpuhighleveltarget}
  1103. hregister:=left.location.register;
  1104. { we need the min_label always to choose between }
  1105. { cmps and subs/decs }
  1106. min_label:=case_get_min(labels);
  1107. { Generate the jumps }
  1108. {$ifdef OLDREGVARS}
  1109. load_all_regvars(current_asmdata.CurrAsmList);
  1110. {$endif OLDREGVARS}
  1111. {$if not defined(cpu64bitalu)}
  1112. if def_cgsize(opsize) in [OS_64,OS_S64] then
  1113. genlinearcmplist(labels)
  1114. else
  1115. {$endif not cpu64bitalu and not cpuhighleveltarget}
  1116. begin
  1117. if cs_opt_level1 in current_settings.optimizerswitches then
  1118. begin
  1119. { procedures are empirically passed on }
  1120. { consumption can also be calculated }
  1121. { but does it pay on the different }
  1122. { processors? }
  1123. { moreover can the size only be appro- }
  1124. { ximated as it is not known if rel8, }
  1125. { rel16 or rel32 jumps are used }
  1126. max_label := case_get_max(labels);
  1127. { can we omit the range check of the jump table ? }
  1128. getrange(left.resultdef,lv,hv);
  1129. jumptable_no_range:=(lv=min_label) and (hv=max_label);
  1130. distv:=max_label-min_label;
  1131. if distv>=0 then
  1132. dist:=distv.uvalue
  1133. else
  1134. dist:=asizeuint(-distv.svalue);
  1135. { optimize for size ? }
  1136. if cs_opt_size in current_settings.optimizerswitches then
  1137. begin
  1138. if has_jumptable and
  1139. (min_label>=int64(low(aint))) and
  1140. (max_label<=high(aint)) and
  1141. not((labelcnt<=2) or
  1142. (distv.svalue<0) or
  1143. (dist>3*labelcnt)) then
  1144. begin
  1145. { if the labels less or more a continuum then }
  1146. genjumptable(labels,min_label.svalue,max_label.svalue);
  1147. end
  1148. else
  1149. begin
  1150. { a linear list is always smaller than a jump tree }
  1151. genlinearlist(labels);
  1152. end;
  1153. end
  1154. else
  1155. begin
  1156. max_dist:=4*labelcoverage;
  1157. { Don't allow jump tables to get too large }
  1158. if max_dist>4*labelcnt then
  1159. max_dist:=min(max_dist,2048);
  1160. if jumptable_no_range then
  1161. max_linear_list:=4
  1162. else
  1163. max_linear_list:=2;
  1164. { allow processor specific values }
  1165. optimizevalues(max_linear_list,max_dist);
  1166. if (labelcnt<=max_linear_list) then
  1167. genlinearlist(labels)
  1168. else
  1169. begin
  1170. if (has_jumptable) and
  1171. (dist<max_dist) and
  1172. (min_label>=int64(low(aint))) and
  1173. (max_label<=high(aint)) then
  1174. genjumptable(labels,min_label.svalue,max_label.svalue)
  1175. { value has been determined on an i7-4770 using a random case with random values
  1176. if more values are known, this can be handled depending on the target CPU
  1177. Testing on a Core 2 Duo E6850 as well as on a Raspi3 showed also, that 64 is
  1178. a good value }
  1179. else if labelcnt>=64 then
  1180. genjmptree(labels)
  1181. else
  1182. genlinearlist(labels);
  1183. end;
  1184. end;
  1185. end
  1186. else
  1187. { it's always not bad }
  1188. genlinearlist(labels);
  1189. end;
  1190. { generate the instruction blocks }
  1191. for i:=0 to blocks.count-1 do with pcaseblock(blocks[i])^ do
  1192. begin
  1193. { If the labels are not equal, then the block label has been shortcut to point elsewhere,
  1194. so there's no need to implement it }
  1195. if not shortcut then
  1196. begin
  1197. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1198. cg.a_label(current_asmdata.CurrAsmList,blocklabel);
  1199. secondpass(statement);
  1200. { don't come back to case line }
  1201. current_filepos:=current_asmdata.CurrAsmList.getlasttaifilepos^;
  1202. {$ifdef OLDREGVARS}
  1203. load_all_regvars(current_asmdata.CurrAsmList);
  1204. {$endif OLDREGVARS}
  1205. hlcg.a_jmp_always(current_asmdata.CurrAsmList,endlabel);
  1206. end;
  1207. end;
  1208. { ...and the else block }
  1209. if not ShortcutElse then
  1210. begin
  1211. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1212. hlcg.a_label(current_asmdata.CurrAsmList,elselabel);
  1213. end;
  1214. if Assigned(elseblock) then
  1215. begin
  1216. secondpass(elseblock);
  1217. {$ifdef OLDREGVARS}
  1218. load_all_regvars(current_asmdata.CurrAsmList);
  1219. {$endif OLDREGVARS}
  1220. end;
  1221. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1222. hlcg.a_label(current_asmdata.CurrAsmList,endlabel);
  1223. { Reset labels }
  1224. for i:=0 to blocks.count-1 do
  1225. pcaseblock(blocks[i])^.blocklabel:=nil;
  1226. flowcontrol := oldflowcontrol + (flowcontrol - [fc_inflowcontrol]);
  1227. end;
  1228. begin
  1229. csetelementnode:=tcgsetelementnode;
  1230. cinnode:=tcginnode;
  1231. ccasenode:=tcgcasenode;
  1232. end.