nx86cnv.pas 19 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate for x86-64 and i386 assembler for type converting nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit nx86cnv;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ncgcnv,defutil;
  22. type
  23. tx86typeconvnode = class(tcgtypeconvnode)
  24. protected
  25. function first_real_to_real : tnode;override;
  26. { procedure second_int_to_int;override; }
  27. { procedure second_string_to_string;override; }
  28. { procedure second_cstring_to_pchar;override; }
  29. { procedure second_string_to_chararray;override; }
  30. { procedure second_array_to_pointer;override; }
  31. { procedure second_pointer_to_array;override; }
  32. { procedure second_chararray_to_string;override; }
  33. { procedure second_char_to_string;override; }
  34. function first_int_to_real: tnode; override;
  35. procedure second_int_to_real;override;
  36. { procedure second_real_to_real;override; }
  37. { procedure second_cord_to_pointer;override; }
  38. { procedure second_proc_to_procvar;override; }
  39. { procedure second_bool_to_int;override; }
  40. procedure second_int_to_bool;override;
  41. { procedure second_set_to_set;override; }
  42. { procedure second_ansistring_to_pchar;override; }
  43. { procedure second_pchar_to_string;override; }
  44. { procedure second_class_to_intf;override; }
  45. { procedure second_char_to_char;override; }
  46. end;
  47. implementation
  48. uses
  49. verbose,globals,globtype,
  50. aasmbase,aasmtai,aasmdata,aasmcpu,
  51. symconst,symdef,
  52. cgbase,cga,pass_1,pass_2,
  53. cpuinfo,
  54. ncnv,
  55. cpubase,
  56. cgutils,cgobj,hlcgobj,cgx86,
  57. tgobj;
  58. function tx86typeconvnode.first_real_to_real : tnode;
  59. begin
  60. first_real_to_real:=nil;
  61. if use_vectorfpu(resultdef) then
  62. expectloc:=LOC_MMREGISTER
  63. else
  64. expectloc:=LOC_FPUREGISTER;
  65. end;
  66. procedure tx86typeconvnode.second_int_to_bool;
  67. var
  68. {$ifndef cpu64bitalu}
  69. hreg2,
  70. hregister : tregister;
  71. href : treference;
  72. i : integer;
  73. {$endif not cpu64bitalu}
  74. resflags : tresflags;
  75. hlabel : tasmlabel;
  76. newsize : tcgsize;
  77. begin
  78. secondpass(left);
  79. if codegenerror then
  80. exit;
  81. { Explicit typecasts from any ordinal type to a boolean type }
  82. { must not change the ordinal value }
  83. if (nf_explicit in flags) and
  84. not(left.location.loc in [LOC_FLAGS,LOC_JUMP]) then
  85. begin
  86. location_copy(location,left.location);
  87. newsize:=def_cgsize(resultdef);
  88. { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
  89. if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
  90. ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
  91. hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
  92. else
  93. location.size:=newsize;
  94. exit;
  95. end;
  96. { Load left node into flag F_NE/F_E }
  97. resflags:=F_NE;
  98. if (left.location.loc in [LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF]) then
  99. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  100. case left.location.loc of
  101. LOC_CREFERENCE,
  102. LOC_REFERENCE :
  103. begin
  104. {$ifndef cpu64bitalu}
  105. if left.location.size in [OS_64,OS_S64{$ifdef cpu16bitalu},OS_32,OS_S32{$endif}] then
  106. begin
  107. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  108. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,left.location.reference,hregister);
  109. href:=left.location.reference;
  110. for i:=2 to tcgsize2size[left.location.size] div tcgsize2size[OS_INT] do
  111. begin
  112. inc(href.offset,tcgsize2size[OS_INT]);
  113. cg.a_op_ref_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,href,hregister);
  114. end;
  115. end
  116. else
  117. {$endif not cpu64bitalu}
  118. begin
  119. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  120. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
  121. end;
  122. end;
  123. LOC_FLAGS :
  124. begin
  125. resflags:=left.location.resflags;
  126. end;
  127. LOC_REGISTER,LOC_CREGISTER :
  128. begin
  129. {$if defined(cpu32bitalu)}
  130. if left.location.size in [OS_64,OS_S64] then
  131. begin
  132. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  133. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,left.location.register64.reglo,hregister);
  134. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,left.location.register64.reghi,hregister);
  135. end
  136. else
  137. {$elseif defined(cpu16bitalu)}
  138. if left.location.size in [OS_64,OS_S64] then
  139. begin
  140. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_16);
  141. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,left.location.register64.reglo,hregister);
  142. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,cg.GetNextReg(left.location.register64.reglo),hregister);
  143. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,left.location.register64.reghi,hregister);
  144. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,cg.GetNextReg(left.location.register64.reghi),hregister);
  145. end
  146. else
  147. if left.location.size in [OS_32,OS_S32] then
  148. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,left.location.register,cg.GetNextReg(left.location.register))
  149. else
  150. {$endif}
  151. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
  152. end;
  153. LOC_JUMP :
  154. begin
  155. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  156. location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  157. current_asmdata.getjumplabel(hlabel);
  158. cg.a_label(current_asmdata.CurrAsmList,left.location.truelabel);
  159. if not(is_cbool(resultdef)) then
  160. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,1,location.register)
  161. else
  162. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,-1,location.register);
  163. cg.a_jmp_always(current_asmdata.CurrAsmList,hlabel);
  164. cg.a_label(current_asmdata.CurrAsmList,left.location.falselabel);
  165. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,0,location.register);
  166. cg.a_label(current_asmdata.CurrAsmList,hlabel);
  167. end;
  168. else
  169. internalerror(10062);
  170. end;
  171. if (left.location.loc<>LOC_JUMP) then
  172. begin
  173. { load flags to register }
  174. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  175. {$ifndef cpu64bitalu}
  176. if (location.size in [OS_64,OS_S64]) then
  177. begin
  178. hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  179. cg.g_flags2reg(current_asmdata.CurrAsmList,OS_32,resflags,hreg2);
  180. if (is_cbool(resultdef)) then
  181. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,OS_32,hreg2,hreg2);
  182. location.register64.reglo:=hreg2;
  183. location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  184. if (is_cbool(resultdef)) then
  185. { reglo is either 0 or -1 -> reghi has to become the same }
  186. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,location.register64.reglo,location.register64.reghi)
  187. else
  188. { unsigned }
  189. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,location.register64.reghi);
  190. end
  191. else
  192. {$endif not cpu64bitalu}
  193. begin
  194. location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  195. cg.g_flags2reg(current_asmdata.CurrAsmList,location.size,resflags,location.register);
  196. if (is_cbool(resultdef)) then
  197. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,location.size,location.register,location.register);
  198. end
  199. end;
  200. end;
  201. function tx86typeconvnode.first_int_to_real : tnode;
  202. begin
  203. first_int_to_real:=nil;
  204. if (left.resultdef.size<4) then
  205. begin
  206. inserttypeconv(left,s32inttype);
  207. firstpass(left)
  208. end;
  209. if use_vectorfpu(resultdef) and
  210. (torddef(left.resultdef).ordtype = s32bit) then
  211. expectloc:=LOC_MMREGISTER
  212. else
  213. expectloc:=LOC_FPUREGISTER;
  214. end;
  215. procedure tx86typeconvnode.second_int_to_real;
  216. var
  217. leftref,
  218. href : treference;
  219. l1,l2 : tasmlabel;
  220. op: tasmop;
  221. opsize: topsize;
  222. signtested : boolean;
  223. use_bt: boolean; { true = use BT (386+), false = use TEST (286-) }
  224. begin
  225. {$ifdef i8086}
  226. use_bt:=current_settings.cputype>=cpu_386;
  227. {$else i8086}
  228. use_bt:=true;
  229. {$endif i8086}
  230. if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
  231. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  232. if use_vectorfpu(resultdef) and
  233. {$ifdef cpu64bitalu}
  234. ((torddef(left.resultdef).ordtype in [s32bit,s64bit]) or
  235. ((torddef(left.resultdef).ordtype in [u32bit,u64bit]) and
  236. (FPUX86_HAS_AVX512F in fpu_capabilities[current_settings.fputype]))
  237. ) then
  238. {$else cpu64bitalu}
  239. (torddef(left.resultdef).ordtype=s32bit) then
  240. {$endif cpu64bitalu}
  241. begin
  242. location_reset(location,LOC_MMREGISTER,def_cgsize(resultdef));
  243. location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
  244. if UseAVX then
  245. case location.size of
  246. OS_F32:
  247. if is_signed(left.resultdef) then
  248. op:=A_VCVTSI2SS
  249. else
  250. op:=A_VCVTUSI2SS;
  251. OS_F64:
  252. if is_signed(left.resultdef) then
  253. op:=A_VCVTSI2SD
  254. else
  255. op:=A_VCVTUSI2SD;
  256. else
  257. internalerror(2007120902);
  258. end
  259. else
  260. begin
  261. { do not use is_signed here as it checks the boundaries instead
  262. of the ordtype }
  263. if not(torddef(left.resultdef).ordtype in [s32bit,s64bit]) then
  264. Internalerror(2020101001);
  265. case location.size of
  266. OS_F32:
  267. op:=A_CVTSI2SS;
  268. OS_F64:
  269. op:=A_CVTSI2SD;
  270. else
  271. internalerror(2007120904);
  272. end;
  273. end;
  274. { don't use left.location.size, because that one may be OS_32/OS_64
  275. if the lower bound of the orddef >= 0
  276. }
  277. case torddef(left.resultdef).ordtype of
  278. s32bit,u32bit:
  279. opsize:=S_L;
  280. s64bit,u64bit:
  281. opsize:=S_Q;
  282. else
  283. internalerror(2007120903);
  284. end;
  285. case left.location.loc of
  286. LOC_REFERENCE,
  287. LOC_CREFERENCE:
  288. begin
  289. href:=left.location.reference;
  290. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
  291. if UseAVX then
  292. { VCVTSI2.. requires a second source operand to copy bits 64..127 }
  293. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg_reg(op,opsize,href,location.register,location.register))
  294. else
  295. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(op,opsize,href,location.register));
  296. end;
  297. LOC_REGISTER,
  298. LOC_CREGISTER:
  299. if UseAVX then
  300. { VCVTSI2.. requires a second source operand to copy bits 64..127 }
  301. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,opsize,left.location.register,location.register,location.register))
  302. else
  303. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(op,opsize,left.location.register,location.register));
  304. else
  305. internalerror(2019050708);
  306. end;
  307. end
  308. else
  309. begin
  310. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  311. if (left.location.loc=LOC_REGISTER) and (torddef(left.resultdef).ordtype=u64bit) then
  312. begin
  313. if use_bt then
  314. begin
  315. {$if defined(cpu64bitalu)}
  316. emit_const_reg(A_BT,S_Q,63,left.location.register);
  317. {$elseif defined(cpu32bitalu)}
  318. emit_const_reg(A_BT,S_L,31,left.location.register64.reghi);
  319. {$elseif defined(cpu16bitalu)}
  320. emit_const_reg(A_BT,S_W,15,cg.GetNextReg(left.location.register64.reghi));
  321. {$endif}
  322. end
  323. else
  324. begin
  325. {$ifdef i8086}
  326. emit_const_reg(A_TEST,S_W,aint($8000),cg.GetNextReg(left.location.register64.reghi));
  327. {$else i8086}
  328. internalerror(2013052510);
  329. {$endif i8086}
  330. end;
  331. signtested:=true;
  332. end
  333. else
  334. signtested:=false;
  335. { We need to load from a reference }
  336. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  337. { don't change left.location.reference, because if it's a temp we
  338. need the original location at the end so we can free it }
  339. leftref:=left.location.reference;
  340. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,leftref);
  341. { For u32bit we need to load it as comp and need to
  342. make it 64bits }
  343. if (torddef(left.resultdef).ordtype=u32bit) then
  344. begin
  345. tg.GetTemp(current_asmdata.CurrAsmList,8,8,tt_normal,href);
  346. location_freetemp(current_asmdata.CurrAsmList,left.location);
  347. cg.a_load_ref_ref(current_asmdata.CurrAsmList,left.location.size,OS_32,leftref,href);
  348. inc(href.offset,4);
  349. cg.a_load_const_ref(current_asmdata.CurrAsmList,OS_32,0,href);
  350. dec(href.offset,4);
  351. { could be a temp with an offset > 32 bit on x86_64 }
  352. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
  353. leftref:=href;
  354. end;
  355. { Load from reference to fpu reg }
  356. case torddef(left.resultdef).ordtype of
  357. u32bit,
  358. scurrency,
  359. s64bit:
  360. begin
  361. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,leftref));
  362. end;
  363. u64bit:
  364. begin
  365. { unsigned 64 bit ints are harder to handle:
  366. we load bits 0..62 and then check bit 63:
  367. if it is 1 then we add 2**64 as float.
  368. Since 2**64 can be represented exactly, use a single-precision
  369. constant to save space. }
  370. current_asmdata.getglobaldatalabel(l1);
  371. current_asmdata.getjumplabel(l2);
  372. if not(signtested) then
  373. begin
  374. if use_bt then
  375. begin
  376. {$if defined(cpu64bitalu) or defined(cpu32bitalu)}
  377. inc(leftref.offset,4);
  378. emit_const_ref(A_BT,S_L,31,leftref);
  379. dec(leftref.offset,4);
  380. {$elseif defined(cpu16bitalu)}
  381. inc(leftref.offset,6);
  382. emit_const_ref(A_BT,S_W,15,leftref);
  383. dec(leftref.offset,6);
  384. {$endif}
  385. end
  386. else
  387. begin
  388. {$ifdef i8086}
  389. { reading a byte, instead of word is faster on a true }
  390. { 8088, because of the 8-bit data bus }
  391. inc(leftref.offset,7);
  392. emit_const_ref(A_TEST,S_B,aint($80),leftref);
  393. dec(leftref.offset,7);
  394. {$else i8086}
  395. internalerror(2013052511);
  396. {$endif i8086}
  397. end;
  398. end;
  399. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,leftref));
  400. if use_bt then
  401. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NC,l2)
  402. else
  403. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_E,l2);
  404. new_section(current_asmdata.asmlists[al_typedconsts],sec_rodata_norel,l1.name,const_align(sizeof(pint)));
  405. current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(l1));
  406. { I got this constant from a test program (FK) }
  407. current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit($5f800000));
  408. reference_reset_symbol(href,l1,0,4,[]);
  409. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
  410. current_asmdata.CurrAsmList.concat(Taicpu.Op_ref(A_FADD,S_FS,href));
  411. cg.a_label(current_asmdata.CurrAsmList,l2);
  412. end
  413. else
  414. begin
  415. if left.resultdef.size<4 then
  416. internalerror(2007120901);
  417. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IL,leftref));
  418. end;
  419. end;
  420. tcgx86(cg).inc_fpu_stack;
  421. location.register:=NR_ST;
  422. tg.ungetiftemp(current_asmdata.CurrAsmList,leftref);
  423. end;
  424. end;
  425. begin
  426. ctypeconvnode:=tx86typeconvnode
  427. end.