cgobj.pas 170 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,constexp,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symtype,symdef,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. tsubsetloadopt = (SL_REG,SL_REGNOSRCMASK,SL_SETZERO,SL_SETMAX);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overriden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. sould be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. { how many times is this current code executed }
  48. executionweight : longint;
  49. alignment : talignment;
  50. rg : array[tregistertype] of trgobj;
  51. {$ifdef flowgraph}
  52. aktflownode:word;
  53. {$endif}
  54. {************************************************}
  55. { basic routines }
  56. constructor create;
  57. {# Initialize the register allocators needed for the codegenerator.}
  58. procedure init_register_allocators;virtual;
  59. {# Clean up the register allocators needed for the codegenerator.}
  60. procedure done_register_allocators;virtual;
  61. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  62. procedure set_regalloc_live_range_direction(dir: TRADirection);
  63. {$ifdef flowgraph}
  64. procedure init_flowgraph;
  65. procedure done_flowgraph;
  66. {$endif}
  67. {# Gets a register suitable to do integer operations on.}
  68. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  69. {# Gets a register suitable to do integer operations on.}
  70. function getaddressregister(list:TAsmList):Tregister;virtual;
  71. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  73. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  74. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  75. the cpu specific child cg object have such a method?}
  76. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  77. procedure add_move_instruction(instr:Taicpu);virtual;
  78. function uses_registers(rt:Tregistertype):boolean;virtual;
  79. {# Get a specific register.}
  80. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  81. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  82. {# Get multiple registers specified.}
  83. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  84. {# Free multiple registers specified.}
  85. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  86. procedure allocallcpuregisters(list:TAsmList);virtual;
  87. procedure deallocallcpuregisters(list:TAsmList);virtual;
  88. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  89. procedure translate_register(var reg : tregister);
  90. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  91. {# Emit a label to the instruction stream. }
  92. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  93. {# Allocates register r by inserting a pai_realloc record }
  94. procedure a_reg_alloc(list : TAsmList;r : tregister);
  95. {# Deallocates register r by inserting a pa_regdealloc record}
  96. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  97. { Synchronize register, make sure it is still valid }
  98. procedure a_reg_sync(list : TAsmList;r : tregister);
  99. {# Pass a parameter, which is located in a register, to a routine.
  100. This routine should push/send the parameter to the routine, as
  101. required by the specific processor ABI and routine modifiers.
  102. This must be overriden for each CPU target.
  103. @param(size size of the operand in the register)
  104. @param(r register source of the operand)
  105. @param(cgpara where the parameter will be stored)
  106. }
  107. procedure a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  108. {# Pass a parameter, which is a constant, to a routine.
  109. A generic version is provided. This routine should
  110. be overriden for optimization purposes if the cpu
  111. permits directly sending this type of parameter.
  112. @param(size size of the operand in constant)
  113. @param(a value of constant to send)
  114. @param(cgpara where the parameter will be stored)
  115. }
  116. procedure a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  117. {# Pass the value of a parameter, which is located in memory, to a routine.
  118. A generic version is provided. This routine should
  119. be overriden for optimization purposes if the cpu
  120. permits directly sending this type of parameter.
  121. @param(size size of the operand in constant)
  122. @param(r Memory reference of value to send)
  123. @param(cgpara where the parameter will be stored)
  124. }
  125. procedure a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  126. {# Pass the value of a parameter, which can be located either in a register or memory location,
  127. to a routine.
  128. A generic version is provided.
  129. @param(l location of the operand to send)
  130. @param(nr parameter number (starting from one) of routine (from left to right))
  131. @param(cgpara where the parameter will be stored)
  132. }
  133. procedure a_param_loc(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  134. {# Pass the address of a reference to a routine. This routine
  135. will calculate the address of the reference, and pass this
  136. calculated address as a parameter.
  137. A generic version is provided. This routine should
  138. be overriden for optimization purposes if the cpu
  139. permits directly sending this type of parameter.
  140. @param(r reference to get address from)
  141. @param(nr parameter number (starting from one) of routine (from left to right))
  142. }
  143. procedure a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  144. { Remarks:
  145. * If a method specifies a size you have only to take care
  146. of that number of bits, i.e. load_const_reg with OP_8 must
  147. only load the lower 8 bit of the specified register
  148. the rest of the register can be undefined
  149. if necessary the compiler will call a method
  150. to zero or sign extend the register
  151. * The a_load_XX_XX with OP_64 needn't to be
  152. implemented for 32 bit
  153. processors, the code generator takes care of that
  154. * the addr size is for work with the natural pointer
  155. size
  156. * the procedures without fpu/mm are only for integer usage
  157. * normally the first location is the source and the
  158. second the destination
  159. }
  160. {# Emits instruction to call the method specified by symbol name.
  161. This routine must be overriden for each new target cpu.
  162. There is no a_call_ref because loading the reference will use
  163. a temp register on most cpu's resulting in conflicts with the
  164. registers used for the parameters (PFV)
  165. }
  166. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);virtual; abstract;
  167. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  168. procedure a_call_ref(list : TAsmList;ref : treference);virtual; abstract;
  169. { same as a_call_name, might be overriden on certain architectures to emit
  170. static calls without usage of a got trampoline }
  171. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  172. { move instructions }
  173. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  174. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);virtual;
  175. procedure a_load_const_loc(list : TAsmList;a : aint;const loc : tlocation);
  176. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  177. procedure a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual;
  178. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  179. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  180. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  181. procedure a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual;
  182. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  183. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  184. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  185. procedure a_load_loc_subsetreg(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  186. procedure a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  187. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  188. procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); virtual;
  189. procedure a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister); virtual;
  190. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister); virtual;
  191. procedure a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference); virtual;
  192. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister); virtual;
  193. procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister); virtual;
  194. procedure a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation); virtual;
  195. procedure a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister); virtual;
  196. procedure a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  197. procedure a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference); virtual;
  198. procedure a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference); virtual;
  199. procedure a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference); virtual;
  200. procedure a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference); virtual;
  201. procedure a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation); virtual;
  202. procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister); virtual;
  203. procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference); virtual;
  204. { bit test instructions }
  205. procedure a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister); virtual;
  206. procedure a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister); virtual;
  207. procedure a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister); virtual;
  208. procedure a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister); virtual;
  209. procedure a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister); virtual;
  210. procedure a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  211. procedure a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  212. { bit set/clear instructions }
  213. procedure a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister); virtual;
  214. procedure a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference); virtual;
  215. procedure a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister); virtual;
  216. procedure a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister); virtual;
  217. procedure a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference); virtual;
  218. procedure a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  219. procedure a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  220. { fpu move instructions }
  221. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize:tcgsize; reg1, reg2: tregister); virtual; abstract;
  222. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  223. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  224. procedure a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  225. procedure a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  226. procedure a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  227. procedure a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  228. procedure a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  229. { vector register move instructions }
  230. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual;
  231. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  232. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual;
  233. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  234. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  235. procedure a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  236. procedure a_parammm_ref(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  237. procedure a_parammm_loc(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  238. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;
  239. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  240. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  241. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  242. { basic arithmetic operations }
  243. { note: for operators which require only one argument (not, neg), use }
  244. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  245. { that in this case the *second* operand is used as both source and }
  246. { destination (JM) }
  247. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  248. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  249. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister); virtual;
  250. procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference); virtual;
  251. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: Aint; const loc: tlocation);
  252. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  253. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  254. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  255. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister); virtual;
  256. procedure a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference); virtual;
  257. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  258. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  259. { trinary operations for processors that support them, 'emulated' }
  260. { on others. None with "ref" arguments since I don't think there }
  261. { are any processors that support it (JM) }
  262. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  263. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  264. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  265. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  266. { comparison operations }
  267. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  268. l : tasmlabel);virtual; abstract;
  269. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  270. l : tasmlabel); virtual;
  271. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  272. l : tasmlabel);
  273. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  274. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  275. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  276. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel); virtual;
  277. procedure a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel); virtual;
  278. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  279. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  280. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  281. l : tasmlabel);
  282. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  283. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  284. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  285. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  286. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  287. }
  288. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  289. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  290. {
  291. This routine tries to optimize the op_const_reg/ref opcode, and should be
  292. called at the start of a_op_const_reg/ref. It returns the actual opcode
  293. to emit, and the constant value to emit. This function can opcode OP_NONE to
  294. remove the opcode and OP_MOVE to replace it with a simple load
  295. @param(op The opcode to emit, returns the opcode which must be emitted)
  296. @param(a The constant which should be emitted, returns the constant which must
  297. be emitted)
  298. }
  299. procedure optimize_op_const(var op: topcg; var a : aint);virtual;
  300. {#
  301. This routine is used in exception management nodes. It should
  302. save the exception reason currently in the FUNCTION_RETURN_REG. The
  303. save should be done either to a temp (pointed to by href).
  304. or on the stack (pushing the value on the stack).
  305. The size of the value to save is OS_S32. The default version
  306. saves the exception reason to a temp. memory area.
  307. }
  308. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  309. {#
  310. This routine is used in exception management nodes. It should
  311. save the exception reason constant. The
  312. save should be done either to a temp (pointed to by href).
  313. or on the stack (pushing the value on the stack).
  314. The size of the value to save is OS_S32. The default version
  315. saves the exception reason to a temp. memory area.
  316. }
  317. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);virtual;
  318. {#
  319. This routine is used in exception management nodes. It should
  320. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  321. should either be in the temp. area (pointed to by href , href should
  322. *NOT* be freed) or on the stack (the value should be popped).
  323. The size of the value to save is OS_S32. The default version
  324. saves the exception reason to a temp. memory area.
  325. }
  326. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  327. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  328. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  329. {# This should emit the opcode to copy len bytes from the source
  330. to destination.
  331. It must be overriden for each new target processor.
  332. @param(source Source reference of copy)
  333. @param(dest Destination reference of copy)
  334. }
  335. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);virtual; abstract;
  336. {# This should emit the opcode to copy len bytes from the an unaligned source
  337. to destination.
  338. It must be overriden for each new target processor.
  339. @param(source Source reference of copy)
  340. @param(dest Destination reference of copy)
  341. }
  342. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);virtual;
  343. {# This should emit the opcode to a shortrstring from the source
  344. to destination.
  345. @param(source Source reference of copy)
  346. @param(dest Destination reference of copy)
  347. }
  348. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  349. procedure g_copyvariant(list : TAsmList;const source,dest : treference);
  350. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  351. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  352. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  353. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  354. {# Generates range checking code. It is to note
  355. that this routine does not need to be overriden,
  356. as it takes care of everything.
  357. @param(p Node which contains the value to check)
  358. @param(todef Type definition of node to range check)
  359. }
  360. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  361. {# Generates overflow checking code for a node }
  362. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  363. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  364. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  365. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  366. {# Emits instructions when compilation is done in profile
  367. mode (this is set as a command line option). The default
  368. behavior does nothing, should be overriden as required.
  369. }
  370. procedure g_profilecode(list : TAsmList);virtual;
  371. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  372. @param(size Number of bytes to allocate)
  373. }
  374. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  375. {# Emits instruction for allocating the locals in entry
  376. code of a routine. This is one of the first
  377. routine called in @var(genentrycode).
  378. @param(localsize Number of bytes to allocate as locals)
  379. }
  380. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  381. {# Emits instructions for returning from a subroutine.
  382. Should also restore the framepointer and stack.
  383. @param(parasize Number of bytes of parameters to deallocate from stack)
  384. }
  385. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  386. {# This routine is called when generating the code for the entry point
  387. of a routine. It should save all registers which are not used in this
  388. routine, and which should be declared as saved in the std_saved_registers
  389. set.
  390. This routine is mainly used when linking to code which is generated
  391. by ABI-compliant compilers (like GCC), to make sure that the reserved
  392. registers of that ABI are not clobbered.
  393. @param(usedinproc Registers which are used in the code of this routine)
  394. }
  395. procedure g_save_registers(list:TAsmList);virtual;
  396. {# This routine is called when generating the code for the exit point
  397. of a routine. It should restore all registers which were previously
  398. saved in @var(g_save_standard_registers).
  399. @param(usedinproc Registers which are used in the code of this routine)
  400. }
  401. procedure g_restore_registers(list:TAsmList);virtual;
  402. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  403. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);virtual;
  404. function g_indirect_sym_load(list:TAsmList;const symname: string; weak: boolean): tregister;virtual;
  405. { generate a stub which only purpose is to pass control the given external method,
  406. setting up any additional environment before doing so (if required).
  407. The default implementation issues a jump instruction to the external name. }
  408. procedure g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string); virtual;
  409. { initialize the pic/got register }
  410. procedure g_maybe_got_init(list: TAsmList); virtual;
  411. protected
  412. procedure get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  413. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  414. procedure a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg: tregister); virtual;
  415. procedure a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt); virtual;
  416. procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); virtual;
  417. function get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  418. function get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  419. function get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  420. end;
  421. {$ifndef cpu64bitalu}
  422. {# @abstract(Abstract code generator for 64 Bit operations)
  423. This class implements an abstract code generator class
  424. for 64 Bit operations.
  425. }
  426. tcg64 = class
  427. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  428. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  429. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  430. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  431. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  432. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  433. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  434. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  435. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  436. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  437. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  438. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  439. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  440. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  441. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  442. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  443. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  444. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  445. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  446. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  447. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  448. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  449. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  450. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  451. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  452. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  453. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  454. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  455. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  456. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  457. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  458. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  459. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  460. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  461. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  462. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  463. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  464. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  465. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  466. procedure a_param64_reg(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  467. procedure a_param64_const(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  468. procedure a_param64_ref(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  469. procedure a_param64_loc(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  470. {
  471. This routine tries to optimize the const_reg opcode, and should be
  472. called at the start of a_op64_const_reg. It returns the actual opcode
  473. to emit, and the constant value to emit. If this routine returns
  474. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  475. @param(op The opcode to emit, returns the opcode which must be emitted)
  476. @param(a The constant which should be emitted, returns the constant which must
  477. be emitted)
  478. @param(reg The register to emit the opcode with, returns the register with
  479. which the opcode will be emitted)
  480. }
  481. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  482. { override to catch 64bit rangechecks }
  483. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  484. end;
  485. {$endif cpu64bitalu}
  486. var
  487. {# Main code generator class }
  488. cg : tcg;
  489. {$ifndef cpu64bitalu}
  490. {# Code generator class for all operations working with 64-Bit operands }
  491. cg64 : tcg64;
  492. {$endif cpu64bitalu}
  493. procedure destroy_codegen;
  494. implementation
  495. uses
  496. globals,options,systems,
  497. verbose,defutil,paramgr,symsym,
  498. tgobj,cutils,procinfo,
  499. ncgrtti;
  500. {*****************************************************************************
  501. basic functionallity
  502. ******************************************************************************}
  503. constructor tcg.create;
  504. begin
  505. end;
  506. {*****************************************************************************
  507. register allocation
  508. ******************************************************************************}
  509. procedure tcg.init_register_allocators;
  510. begin
  511. fillchar(rg,sizeof(rg),0);
  512. add_reg_instruction_hook:=@add_reg_instruction;
  513. executionweight:=1;
  514. end;
  515. procedure tcg.done_register_allocators;
  516. begin
  517. { Safety }
  518. fillchar(rg,sizeof(rg),0);
  519. add_reg_instruction_hook:=nil;
  520. end;
  521. {$ifdef flowgraph}
  522. procedure Tcg.init_flowgraph;
  523. begin
  524. aktflownode:=0;
  525. end;
  526. procedure Tcg.done_flowgraph;
  527. begin
  528. end;
  529. {$endif}
  530. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  531. begin
  532. if not assigned(rg[R_INTREGISTER]) then
  533. internalerror(200312122);
  534. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(R_INTREGISTER,size));
  535. end;
  536. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  537. begin
  538. if not assigned(rg[R_FPUREGISTER]) then
  539. internalerror(200312123);
  540. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(R_FPUREGISTER,size));
  541. end;
  542. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  543. begin
  544. if not assigned(rg[R_MMREGISTER]) then
  545. internalerror(2003121214);
  546. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(R_MMREGISTER,size));
  547. end;
  548. function tcg.getaddressregister(list:TAsmList):Tregister;
  549. begin
  550. if assigned(rg[R_ADDRESSREGISTER]) then
  551. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  552. else
  553. begin
  554. if not assigned(rg[R_INTREGISTER]) then
  555. internalerror(200312121);
  556. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  557. end;
  558. end;
  559. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  560. var
  561. subreg:Tsubregister;
  562. begin
  563. subreg:=cgsize2subreg(getregtype(reg),size);
  564. result:=reg;
  565. setsubreg(result,subreg);
  566. { notify RA }
  567. if result<>reg then
  568. list.concat(tai_regalloc.resize(result));
  569. end;
  570. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  571. begin
  572. if not assigned(rg[getregtype(r)]) then
  573. internalerror(200312125);
  574. rg[getregtype(r)].getcpuregister(list,r);
  575. end;
  576. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  577. begin
  578. if not assigned(rg[getregtype(r)]) then
  579. internalerror(200312126);
  580. rg[getregtype(r)].ungetcpuregister(list,r);
  581. end;
  582. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  583. begin
  584. if assigned(rg[rt]) then
  585. rg[rt].alloccpuregisters(list,r)
  586. else
  587. internalerror(200310092);
  588. end;
  589. procedure tcg.allocallcpuregisters(list:TAsmList);
  590. begin
  591. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  592. {$ifndef i386}
  593. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  594. {$ifdef cpumm}
  595. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  596. {$endif cpumm}
  597. {$endif i386}
  598. end;
  599. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  600. begin
  601. if assigned(rg[rt]) then
  602. rg[rt].dealloccpuregisters(list,r)
  603. else
  604. internalerror(200310093);
  605. end;
  606. procedure tcg.deallocallcpuregisters(list:TAsmList);
  607. begin
  608. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  609. {$ifndef i386}
  610. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  611. {$ifdef cpumm}
  612. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  613. {$endif cpumm}
  614. {$endif i386}
  615. end;
  616. function tcg.uses_registers(rt:Tregistertype):boolean;
  617. begin
  618. if assigned(rg[rt]) then
  619. result:=rg[rt].uses_registers
  620. else
  621. result:=false;
  622. end;
  623. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  624. var
  625. rt : tregistertype;
  626. begin
  627. rt:=getregtype(r);
  628. { Only add it when a register allocator is configured.
  629. No IE can be generated, because the VMT is written
  630. without a valid rg[] }
  631. if assigned(rg[rt]) then
  632. rg[rt].add_reg_instruction(instr,r,cg.executionweight);
  633. end;
  634. procedure tcg.add_move_instruction(instr:Taicpu);
  635. var
  636. rt : tregistertype;
  637. begin
  638. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  639. if assigned(rg[rt]) then
  640. rg[rt].add_move_instruction(instr)
  641. else
  642. internalerror(200310095);
  643. end;
  644. procedure tcg.set_regalloc_live_range_direction(dir: TRADirection);
  645. var
  646. rt : tregistertype;
  647. begin
  648. for rt:=low(rg) to high(rg) do
  649. begin
  650. if assigned(rg[rt]) then
  651. rg[rt].live_range_direction:=dir;
  652. end;
  653. end;
  654. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  655. var
  656. rt : tregistertype;
  657. begin
  658. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  659. begin
  660. if assigned(rg[rt]) then
  661. rg[rt].do_register_allocation(list,headertai);
  662. end;
  663. { running the other register allocator passes could require addition int/addr. registers
  664. when spilling so run int/addr register allocation at the end }
  665. if assigned(rg[R_INTREGISTER]) then
  666. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  667. if assigned(rg[R_ADDRESSREGISTER]) then
  668. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  669. end;
  670. procedure tcg.translate_register(var reg : tregister);
  671. begin
  672. rg[getregtype(reg)].translate_register(reg);
  673. end;
  674. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  675. begin
  676. list.concat(tai_regalloc.alloc(r,nil));
  677. end;
  678. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  679. begin
  680. list.concat(tai_regalloc.dealloc(r,nil));
  681. end;
  682. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  683. var
  684. instr : tai;
  685. begin
  686. instr:=tai_regalloc.sync(r);
  687. list.concat(instr);
  688. add_reg_instruction(instr,r);
  689. end;
  690. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  691. begin
  692. list.concat(tai_label.create(l));
  693. end;
  694. {*****************************************************************************
  695. for better code generation these methods should be overridden
  696. ******************************************************************************}
  697. procedure tcg.a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  698. var
  699. ref : treference;
  700. begin
  701. cgpara.check_simple_location;
  702. case cgpara.location^.loc of
  703. LOC_REGISTER,LOC_CREGISTER:
  704. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  705. LOC_REFERENCE,LOC_CREFERENCE:
  706. begin
  707. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  708. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  709. end
  710. else
  711. internalerror(2002071004);
  712. end;
  713. end;
  714. procedure tcg.a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);
  715. var
  716. ref : treference;
  717. begin
  718. cgpara.check_simple_location;
  719. case cgpara.location^.loc of
  720. LOC_REGISTER,LOC_CREGISTER:
  721. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  722. LOC_REFERENCE,LOC_CREFERENCE:
  723. begin
  724. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  725. a_load_const_ref(list,cgpara.location^.size,a,ref);
  726. end
  727. else
  728. internalerror(2002071004);
  729. end;
  730. end;
  731. procedure tcg.a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  732. var
  733. ref : treference;
  734. begin
  735. cgpara.check_simple_location;
  736. case cgpara.location^.loc of
  737. LOC_REGISTER,LOC_CREGISTER:
  738. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  739. LOC_REFERENCE,LOC_CREFERENCE:
  740. begin
  741. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  742. if (size <> OS_NO) and
  743. (tcgsize2size[size] < sizeof(aint)) then
  744. begin
  745. if (cgpara.size = OS_NO) or
  746. assigned(cgpara.location^.next) then
  747. internalerror(2006052401);
  748. a_load_ref_ref(list,size,cgpara.size,r,ref);
  749. end
  750. else
  751. { use concatcopy, because the parameter can be larger than }
  752. { what the OS_* constants can handle }
  753. g_concatcopy(list,r,ref,cgpara.intsize);
  754. end
  755. else
  756. internalerror(2002071004);
  757. end;
  758. end;
  759. procedure tcg.a_param_loc(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  760. begin
  761. case l.loc of
  762. LOC_REGISTER,
  763. LOC_CREGISTER :
  764. a_param_reg(list,l.size,l.register,cgpara);
  765. LOC_CONSTANT :
  766. a_param_const(list,l.size,l.value,cgpara);
  767. LOC_CREFERENCE,
  768. LOC_REFERENCE :
  769. a_param_ref(list,l.size,l.reference,cgpara);
  770. else
  771. internalerror(2002032211);
  772. end;
  773. end;
  774. procedure tcg.a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);
  775. var
  776. hr : tregister;
  777. begin
  778. cgpara.check_simple_location;
  779. if cgpara.location^.loc in [LOC_CREGISTER,LOC_REGISTER] then
  780. a_loadaddr_ref_reg(list,r,cgpara.location^.register)
  781. else
  782. begin
  783. hr:=getaddressregister(list);
  784. a_loadaddr_ref_reg(list,r,hr);
  785. a_param_reg(list,OS_ADDR,hr,cgpara);
  786. end;
  787. end;
  788. {****************************************************************************
  789. some generic implementations
  790. ****************************************************************************}
  791. {$ifopt r+}
  792. {$define rangeon}
  793. {$r-}
  794. {$endif}
  795. {$ifopt q+}
  796. {$define overflowon}
  797. {$q-}
  798. {$endif}
  799. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
  800. var
  801. bitmask: aword;
  802. tmpreg: tregister;
  803. stopbit: byte;
  804. begin
  805. tmpreg:=getintregister(list,sreg.subsetregsize);
  806. if (subsetsize in [OS_S8..OS_S128]) then
  807. begin
  808. { sign extend in case the value has a bitsize mod 8 <> 0 }
  809. { both instructions will be optimized away if not }
  810. a_op_const_reg_reg(list,OP_SHL,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.startbit-sreg.bitlen,sreg.subsetreg,tmpreg);
  811. a_op_const_reg(list,OP_SAR,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.bitlen,tmpreg);
  812. end
  813. else
  814. begin
  815. a_op_const_reg_reg(list,OP_SHR,sreg.subsetregsize,sreg.startbit,sreg.subsetreg,tmpreg);
  816. stopbit := sreg.startbit + sreg.bitlen;
  817. // on x86(64), 1 shl 32(64) = 1 instead of 0
  818. // use aword to prevent overflow with 1 shl 31
  819. if (stopbit - sreg.startbit <> AIntBits) then
  820. bitmask := (aword(1) shl (stopbit - sreg.startbit)) - 1
  821. else
  822. bitmask := high(aword);
  823. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),tmpreg);
  824. end;
  825. tmpreg := makeregsize(list,tmpreg,subsetsize);
  826. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  827. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  828. end;
  829. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister);
  830. begin
  831. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,SL_REG);
  832. end;
  833. procedure tcg.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
  834. var
  835. bitmask: aword;
  836. tmpreg: tregister;
  837. stopbit: byte;
  838. begin
  839. stopbit := sreg.startbit + sreg.bitlen;
  840. // on x86(64), 1 shl 32(64) = 1 instead of 0
  841. if (stopbit <> AIntBits) then
  842. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  843. else
  844. bitmask := not(high(aword) xor ((aword(1) shl sreg.startbit)-1));
  845. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  846. begin
  847. tmpreg:=getintregister(list,sreg.subsetregsize);
  848. a_load_reg_reg(list,fromsize,sreg.subsetregsize,fromreg,tmpreg);
  849. a_op_const_reg(list,OP_SHL,sreg.subsetregsize,sreg.startbit,tmpreg);
  850. if (slopt <> SL_REGNOSRCMASK) then
  851. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(not(bitmask)),tmpreg);
  852. end;
  853. if (slopt <> SL_SETMAX) then
  854. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  855. case slopt of
  856. SL_SETZERO : ;
  857. SL_SETMAX :
  858. if (sreg.bitlen <> AIntBits) then
  859. a_op_const_reg(list,OP_OR,sreg.subsetregsize,
  860. aint(((aword(1) shl sreg.bitlen)-1) shl sreg.startbit),
  861. sreg.subsetreg)
  862. else
  863. a_load_const_reg(list,sreg.subsetregsize,-1,sreg.subsetreg);
  864. else
  865. a_op_reg_reg(list,OP_OR,sreg.subsetregsize,tmpreg,sreg.subsetreg);
  866. end;
  867. end;
  868. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister);
  869. var
  870. tmpreg: tregister;
  871. bitmask: aword;
  872. stopbit: byte;
  873. begin
  874. if (fromsreg.bitlen >= tosreg.bitlen) then
  875. begin
  876. tmpreg := getintregister(list,tosreg.subsetregsize);
  877. a_load_reg_reg(list,fromsreg.subsetregsize,tosreg.subsetregsize,fromsreg.subsetreg,tmpreg);
  878. if (fromsreg.startbit <= tosreg.startbit) then
  879. a_op_const_reg(list,OP_SHL,tosreg.subsetregsize,tosreg.startbit-fromsreg.startbit,tmpreg)
  880. else
  881. a_op_const_reg(list,OP_SHR,tosreg.subsetregsize,fromsreg.startbit-tosreg.startbit,tmpreg);
  882. stopbit := tosreg.startbit + tosreg.bitlen;
  883. // on x86(64), 1 shl 32(64) = 1 instead of 0
  884. if (stopbit <> AIntBits) then
  885. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl tosreg.startbit)-1))
  886. else
  887. bitmask := (aword(1) shl tosreg.startbit) - 1;
  888. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(bitmask),tosreg.subsetreg);
  889. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(not(bitmask)),tmpreg);
  890. a_op_reg_reg(list,OP_OR,tosreg.subsetregsize,tmpreg,tosreg.subsetreg);
  891. end
  892. else
  893. begin
  894. tmpreg := getintregister(list,tosubsetsize);
  895. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  896. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  897. end;
  898. end;
  899. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference);
  900. var
  901. tmpreg: tregister;
  902. begin
  903. tmpreg := getintregister(list,tosize);
  904. a_load_subsetreg_reg(list,subsetsize,tosize,sreg,tmpreg);
  905. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  906. end;
  907. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister);
  908. var
  909. tmpreg: tregister;
  910. begin
  911. tmpreg := getintregister(list,subsetsize);
  912. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  913. a_load_reg_subsetreg(list,subsetsize,subsetsize,tmpreg,sreg);
  914. end;
  915. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister);
  916. var
  917. bitmask: aword;
  918. stopbit: byte;
  919. begin
  920. stopbit := sreg.startbit + sreg.bitlen;
  921. // on x86(64), 1 shl 32(64) = 1 instead of 0
  922. if (stopbit <> AIntBits) then
  923. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  924. else
  925. bitmask := (aword(1) shl sreg.startbit) - 1;
  926. if (((aword(a) shl sreg.startbit) and not bitmask) <> not bitmask) then
  927. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  928. a_op_const_reg(list,OP_OR,sreg.subsetregsize,aint((aword(a) shl sreg.startbit) and not(bitmask)),sreg.subsetreg);
  929. end;
  930. procedure tcg.a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  931. begin
  932. case loc.loc of
  933. LOC_REFERENCE,LOC_CREFERENCE:
  934. a_load_ref_subsetref(list,loc.size,subsetsize,loc.reference,sref);
  935. LOC_REGISTER,LOC_CREGISTER:
  936. a_load_reg_subsetref(list,loc.size,subsetsize,loc.register,sref);
  937. LOC_CONSTANT:
  938. a_load_const_subsetref(list,subsetsize,loc.value,sref);
  939. LOC_SUBSETREG,LOC_CSUBSETREG:
  940. a_load_subsetreg_subsetref(list,loc.size,subsetsize,loc.sreg,sref);
  941. LOC_SUBSETREF,LOC_CSUBSETREF:
  942. a_load_subsetref_subsetref(list,loc.size,subsetsize,loc.sref,sref);
  943. else
  944. internalerror(200608053);
  945. end;
  946. end;
  947. (*
  948. Subsetrefs are used for (bit)packed arrays and (bit)packed records stored
  949. in memory. They are like a regular reference, but contain an extra bit
  950. offset (either constant -startbit- or variable -bitindexreg-, always OS_INT)
  951. and a bit length (always constant).
  952. Bit packed values are stored differently in memory depending on whether we
  953. are on a big or a little endian system (compatible with at least GPC). The
  954. size of the basic working unit is always the smallest power-of-2 byte size
  955. which can contain the bit value (so 1..8 bits -> 1 byte, 9..16 bits -> 2
  956. bytes, 17..32 bits -> 4 bytes etc).
  957. On a big endian, 5-bit: values are stored like this:
  958. 11111222 22333334 44445555 56666677 77788888
  959. The leftmost bit of each 5-bit value corresponds to the most significant
  960. bit.
  961. On little endian, it goes like this:
  962. 22211111 43333322 55554444 77666665 88888777
  963. In this case, per byte the left-most bit is more significant than those on
  964. the right, but the bits in the next byte are all more significant than
  965. those in the previous byte (e.g., the 222 in the first byte are the low
  966. three bits of that value, while the 22 in the second byte are the upper
  967. two bits.
  968. Big endian, 9 bit values:
  969. 11111111 12222222 22333333 33344444 ...
  970. Little endian, 9 bit values:
  971. 11111111 22222221 33333322 44444333 ...
  972. This is memory representation and the 16 bit values are byteswapped.
  973. Similarly as in the previous case, the 2222222 string contains the lower
  974. bits of value 2 and the 22 string contains the upper bits. Once loaded into
  975. registers (two 16 bit registers in the current implementation, although a
  976. single 32 bit register would be possible too, in particular if 32 bit
  977. alignment can be guaranteed), this becomes:
  978. 22222221 11111111 44444333 33333322 ...
  979. (l)ow u l l u l u
  980. The startbit/bitindex in a subsetreference always refers to
  981. a) on big endian: the most significant bit of the value
  982. (bits counted from left to right, both memory an registers)
  983. b) on little endian: the least significant bit when the value
  984. is loaded in a register (bit counted from right to left)
  985. Although a) results in more complex code for big endian systems, it's
  986. needed for compatibility both with GPC and with e.g. bitpacked arrays in
  987. Apple's universal interfaces which depend on these layout differences).
  988. Note: when changing the loadsize calculated in get_subsetref_load_info,
  989. make sure the appropriate alignment is guaranteed, at least in case of
  990. {$defined cpurequiresproperalignment}.
  991. *)
  992. procedure tcg.get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  993. var
  994. intloadsize: aint;
  995. begin
  996. intloadsize := packedbitsloadsize(sref.bitlen);
  997. if (intloadsize = 0) then
  998. internalerror(2006081310);
  999. if (intloadsize > sizeof(aint)) then
  1000. intloadsize := sizeof(aint);
  1001. loadsize := int_cgsize(intloadsize);
  1002. if (loadsize = OS_NO) then
  1003. internalerror(2006081311);
  1004. if (sref.bitlen > sizeof(aint)*8) then
  1005. internalerror(2006081312);
  1006. extra_load :=
  1007. (sref.bitlen <> 1) and
  1008. ((sref.bitindexreg <> NR_NO) or
  1009. (byte(sref.startbit+sref.bitlen) > byte(intloadsize*8)));
  1010. end;
  1011. procedure tcg.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  1012. var
  1013. restbits: byte;
  1014. begin
  1015. if (target_info.endian = endian_big) then
  1016. begin
  1017. { valuereg contains the upper bits, extra_value_reg the lower }
  1018. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  1019. if (subsetsize in [OS_S8..OS_S128]) then
  1020. begin
  1021. { sign extend }
  1022. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize+sref.startbit,valuereg);
  1023. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1024. end
  1025. else
  1026. begin
  1027. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  1028. { mask other bits }
  1029. if (sref.bitlen <> AIntBits) then
  1030. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1031. end;
  1032. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
  1033. end
  1034. else
  1035. begin
  1036. { valuereg contains the lower bits, extra_value_reg the upper }
  1037. a_op_const_reg(list,OP_SHR,OS_INT,sref.startbit,valuereg);
  1038. if (subsetsize in [OS_S8..OS_S128]) then
  1039. begin
  1040. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen+loadbitsize-sref.startbit,extra_value_reg);
  1041. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,extra_value_reg);
  1042. end
  1043. else
  1044. begin
  1045. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
  1046. { mask other bits }
  1047. if (sref.bitlen <> AIntBits) then
  1048. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),extra_value_reg);
  1049. end;
  1050. end;
  1051. { merge }
  1052. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1053. end;
  1054. procedure tcg.a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg: tregister);
  1055. var
  1056. hl: tasmlabel;
  1057. tmpref: treference;
  1058. extra_value_reg,
  1059. tmpreg: tregister;
  1060. begin
  1061. tmpreg := getintregister(list,OS_INT);
  1062. tmpref := sref.ref;
  1063. inc(tmpref.offset,loadbitsize div 8);
  1064. extra_value_reg := getintregister(list,OS_INT);
  1065. if (target_info.endian = endian_big) then
  1066. begin
  1067. { since this is a dynamic index, it's possible that the value }
  1068. { is entirely in valuereg. }
  1069. { get the data in valuereg in the right place }
  1070. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1071. if (subsetsize in [OS_S8..OS_S128]) then
  1072. begin
  1073. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1074. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg)
  1075. end
  1076. else
  1077. begin
  1078. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1079. if (loadbitsize <> AIntBits) then
  1080. { mask left over bits }
  1081. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1082. end;
  1083. tmpreg := getintregister(list,OS_INT);
  1084. { ensure we don't load anything past the end of the array }
  1085. current_asmdata.getjumplabel(hl);
  1086. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1087. { the bits in extra_value_reg (if any) start at the most significant bit => }
  1088. { extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
  1089. { => = -(sref.bitindex+(sref.bitlen-2*loadbitsize)) }
  1090. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpreg);
  1091. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1092. { load next "loadbitsize" bits of the array }
  1093. a_load_ref_reg(list,int_cgsize(loadbitsize div 8),OS_INT,tmpref,extra_value_reg);
  1094. a_op_reg_reg(list,OP_SHR,OS_INT,tmpreg,extra_value_reg);
  1095. { if there are no bits in extra_value_reg, then sref.bitindex was }
  1096. { < loadsize-sref.bitlen, and therefore tmpreg will now be >= loadsize }
  1097. { => extra_value_reg is now 0 }
  1098. { merge }
  1099. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1100. { no need to mask, necessary masking happened earlier on }
  1101. a_label(list,hl);
  1102. end
  1103. else
  1104. begin
  1105. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1106. { ensure we don't load anything past the end of the array }
  1107. current_asmdata.getjumplabel(hl);
  1108. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1109. { Y-x = -(Y-x) }
  1110. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpreg);
  1111. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1112. { load next "loadbitsize" bits of the array }
  1113. a_load_ref_reg(list,int_cgsize(loadbitsize div 8),OS_INT,tmpref,extra_value_reg);
  1114. { tmpreg is in the range 1..<cpu_bitsize>-1 -> always ok }
  1115. a_op_reg_reg(list,OP_SHL,OS_INT,tmpreg,extra_value_reg);
  1116. { merge }
  1117. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1118. a_label(list,hl);
  1119. { sign extend or mask other bits }
  1120. if (subsetsize in [OS_S8..OS_S128]) then
  1121. begin
  1122. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1123. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1124. end
  1125. else
  1126. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1127. end;
  1128. end;
  1129. procedure tcg.a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister);
  1130. var
  1131. tmpref: treference;
  1132. valuereg,extra_value_reg: tregister;
  1133. tosreg: tsubsetregister;
  1134. loadsize: tcgsize;
  1135. loadbitsize: byte;
  1136. extra_load: boolean;
  1137. begin
  1138. get_subsetref_load_info(sref,loadsize,extra_load);
  1139. loadbitsize := tcgsize2size[loadsize]*8;
  1140. { load the (first part) of the bit sequence }
  1141. valuereg := getintregister(list,OS_INT);
  1142. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1143. if not extra_load then
  1144. begin
  1145. { everything is guaranteed to be in a single register of loadsize }
  1146. if (sref.bitindexreg = NR_NO) then
  1147. begin
  1148. { use subsetreg routine, it may have been overridden with an optimized version }
  1149. tosreg.subsetreg := valuereg;
  1150. tosreg.subsetregsize := OS_INT;
  1151. { subsetregs always count bits from right to left }
  1152. if (target_info.endian = endian_big) then
  1153. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1154. else
  1155. tosreg.startbit := sref.startbit;
  1156. tosreg.bitlen := sref.bitlen;
  1157. a_load_subsetreg_reg(list,subsetsize,tosize,tosreg,destreg);
  1158. exit;
  1159. end
  1160. else
  1161. begin
  1162. if (sref.startbit <> 0) then
  1163. internalerror(2006081510);
  1164. if (target_info.endian = endian_big) then
  1165. begin
  1166. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1167. if (subsetsize in [OS_S8..OS_S128]) then
  1168. begin
  1169. { sign extend to entire register }
  1170. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1171. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1172. end
  1173. else
  1174. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1175. end
  1176. else
  1177. begin
  1178. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1179. if (subsetsize in [OS_S8..OS_S128]) then
  1180. begin
  1181. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1182. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1183. end
  1184. end;
  1185. { mask other bits/sign extend }
  1186. if not(subsetsize in [OS_S8..OS_S128]) then
  1187. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1188. end
  1189. end
  1190. else
  1191. begin
  1192. { load next value as well }
  1193. extra_value_reg := getintregister(list,OS_INT);
  1194. if (sref.bitindexreg = NR_NO) then
  1195. begin
  1196. tmpref := sref.ref;
  1197. inc(tmpref.offset,loadbitsize div 8);
  1198. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1199. { can be overridden to optimize }
  1200. a_load_subsetref_regs_noindex(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg)
  1201. end
  1202. else
  1203. begin
  1204. if (sref.startbit <> 0) then
  1205. internalerror(2006080610);
  1206. a_load_subsetref_regs_index(list,subsetsize,loadbitsize,sref,valuereg);
  1207. end;
  1208. end;
  1209. { store in destination }
  1210. { avoid unnecessary sign extension and zeroing }
  1211. valuereg := makeregsize(list,valuereg,OS_INT);
  1212. destreg := makeregsize(list,destreg,OS_INT);
  1213. a_load_reg_reg(list,OS_INT,OS_INT,valuereg,destreg);
  1214. destreg := makeregsize(list,destreg,tosize);
  1215. end;
  1216. procedure tcg.a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  1217. begin
  1218. a_load_regconst_subsetref_intern(list,fromsize,subsetsize,fromreg,sref,SL_REG);
  1219. end;
  1220. procedure tcg.a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt);
  1221. var
  1222. hl: tasmlabel;
  1223. tmpreg, tmpindexreg, valuereg, extra_value_reg, maskreg: tregister;
  1224. tosreg, fromsreg: tsubsetregister;
  1225. tmpref: treference;
  1226. bitmask: aword;
  1227. loadsize: tcgsize;
  1228. loadbitsize: byte;
  1229. extra_load: boolean;
  1230. begin
  1231. { the register must be able to contain the requested value }
  1232. if (tcgsize2size[fromsize]*8 < sref.bitlen) then
  1233. internalerror(2006081613);
  1234. get_subsetref_load_info(sref,loadsize,extra_load);
  1235. loadbitsize := tcgsize2size[loadsize]*8;
  1236. { load the (first part) of the bit sequence }
  1237. valuereg := getintregister(list,OS_INT);
  1238. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1239. { constant offset of bit sequence? }
  1240. if not extra_load then
  1241. begin
  1242. if (sref.bitindexreg = NR_NO) then
  1243. begin
  1244. { use subsetreg routine, it may have been overridden with an optimized version }
  1245. tosreg.subsetreg := valuereg;
  1246. tosreg.subsetregsize := OS_INT;
  1247. { subsetregs always count bits from right to left }
  1248. if (target_info.endian = endian_big) then
  1249. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1250. else
  1251. tosreg.startbit := sref.startbit;
  1252. tosreg.bitlen := sref.bitlen;
  1253. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1254. end
  1255. else
  1256. begin
  1257. if (sref.startbit <> 0) then
  1258. internalerror(2006081710);
  1259. { should be handled by normal code and will give wrong result }
  1260. { on x86 for the '1 shl bitlen' below }
  1261. if (sref.bitlen = AIntBits) then
  1262. internalerror(2006081711);
  1263. { zero the bits we have to insert }
  1264. if (slopt <> SL_SETMAX) then
  1265. begin
  1266. maskreg := getintregister(list,OS_INT);
  1267. if (target_info.endian = endian_big) then
  1268. begin
  1269. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen),maskreg);
  1270. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1271. end
  1272. else
  1273. begin
  1274. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1275. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1276. end;
  1277. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1278. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1279. end;
  1280. { insert the value }
  1281. if (slopt <> SL_SETZERO) then
  1282. begin
  1283. tmpreg := getintregister(list,OS_INT);
  1284. if (slopt <> SL_SETMAX) then
  1285. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1286. else if (sref.bitlen <> AIntBits) then
  1287. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1288. else
  1289. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1290. if (target_info.endian = endian_big) then
  1291. begin
  1292. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1293. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1294. begin
  1295. if (loadbitsize <> AIntBits) then
  1296. bitmask := (((aword(1) shl loadbitsize)-1) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1))
  1297. else
  1298. bitmask := (high(aword) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1));
  1299. a_op_const_reg(list,OP_AND,OS_INT,bitmask,tmpreg);
  1300. end;
  1301. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1302. end
  1303. else
  1304. begin
  1305. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1306. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1307. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1308. end;
  1309. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1310. end;
  1311. end;
  1312. { store back to memory }
  1313. valuereg := makeregsize(list,valuereg,loadsize);
  1314. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1315. exit;
  1316. end
  1317. else
  1318. begin
  1319. { load next value }
  1320. extra_value_reg := getintregister(list,OS_INT);
  1321. tmpref := sref.ref;
  1322. inc(tmpref.offset,loadbitsize div 8);
  1323. { should maybe be taken out too, can be done more efficiently }
  1324. { on e.g. i386 with shld/shrd }
  1325. if (sref.bitindexreg = NR_NO) then
  1326. begin
  1327. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1328. fromsreg.subsetreg := fromreg;
  1329. fromsreg.subsetregsize := fromsize;
  1330. tosreg.subsetreg := valuereg;
  1331. tosreg.subsetregsize := OS_INT;
  1332. { transfer first part }
  1333. fromsreg.bitlen := loadbitsize-sref.startbit;
  1334. tosreg.bitlen := fromsreg.bitlen;
  1335. if (target_info.endian = endian_big) then
  1336. begin
  1337. { valuereg must contain the upper bits of the value at bits [0..loadbitsize-startbit] }
  1338. { upper bits of the value ... }
  1339. fromsreg.startbit := sref.bitlen-(loadbitsize-sref.startbit);
  1340. { ... to bit 0 }
  1341. tosreg.startbit := 0
  1342. end
  1343. else
  1344. begin
  1345. { valuereg must contain the lower bits of the value at bits [startbit..loadbitsize] }
  1346. { lower bits of the value ... }
  1347. fromsreg.startbit := 0;
  1348. { ... to startbit }
  1349. tosreg.startbit := sref.startbit;
  1350. end;
  1351. case slopt of
  1352. SL_SETZERO,
  1353. SL_SETMAX:
  1354. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1355. else
  1356. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1357. end;
  1358. valuereg := makeregsize(list,valuereg,loadsize);
  1359. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1360. { transfer second part }
  1361. if (target_info.endian = endian_big) then
  1362. begin
  1363. { extra_value_reg must contain the lower bits of the value at bits }
  1364. { [(loadbitsize-(bitlen-(loadbitsize-startbit)))..loadbitsize] }
  1365. { (loadbitsize-(bitlen-(loadbitsize-startbit))) = 2*loadbitsize }
  1366. { - bitlen - startbit }
  1367. fromsreg.startbit := 0;
  1368. tosreg.startbit := 2*loadbitsize - sref.bitlen - sref.startbit
  1369. end
  1370. else
  1371. begin
  1372. { extra_value_reg must contain the upper bits of the value at bits [0..bitlen-(loadbitsize-startbit)] }
  1373. fromsreg.startbit := fromsreg.bitlen;
  1374. tosreg.startbit := 0;
  1375. end;
  1376. tosreg.subsetreg := extra_value_reg;
  1377. fromsreg.bitlen := sref.bitlen-fromsreg.bitlen;
  1378. tosreg.bitlen := fromsreg.bitlen;
  1379. case slopt of
  1380. SL_SETZERO,
  1381. SL_SETMAX:
  1382. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1383. else
  1384. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1385. end;
  1386. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1387. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1388. exit;
  1389. end
  1390. else
  1391. begin
  1392. if (sref.startbit <> 0) then
  1393. internalerror(2006081812);
  1394. { should be handled by normal code and will give wrong result }
  1395. { on x86 for the '1 shl bitlen' below }
  1396. if (sref.bitlen = AIntBits) then
  1397. internalerror(2006081713);
  1398. { generate mask to zero the bits we have to insert }
  1399. if (slopt <> SL_SETMAX) then
  1400. begin
  1401. maskreg := getintregister(list,OS_INT);
  1402. if (target_info.endian = endian_big) then
  1403. begin
  1404. a_load_const_reg(list,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),maskreg);
  1405. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1406. end
  1407. else
  1408. begin
  1409. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1410. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1411. end;
  1412. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1413. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1414. end;
  1415. { insert the value }
  1416. if (slopt <> SL_SETZERO) then
  1417. begin
  1418. tmpreg := getintregister(list,OS_INT);
  1419. if (slopt <> SL_SETMAX) then
  1420. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1421. else if (sref.bitlen <> AIntBits) then
  1422. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1423. else
  1424. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1425. if (target_info.endian = endian_big) then
  1426. begin
  1427. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1428. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1429. { mask left over bits }
  1430. a_op_const_reg(list,OP_AND,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),tmpreg);
  1431. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1432. end
  1433. else
  1434. begin
  1435. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1436. { mask left over bits }
  1437. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1438. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1439. end;
  1440. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1441. end;
  1442. valuereg := makeregsize(list,valuereg,loadsize);
  1443. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1444. { make sure we do not read/write past the end of the array }
  1445. current_asmdata.getjumplabel(hl);
  1446. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1447. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1448. tmpindexreg := getintregister(list,OS_INT);
  1449. { load current array value }
  1450. if (slopt <> SL_SETZERO) then
  1451. begin
  1452. tmpreg := getintregister(list,OS_INT);
  1453. if (slopt <> SL_SETMAX) then
  1454. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1455. else if (sref.bitlen <> AIntBits) then
  1456. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1457. else
  1458. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1459. end;
  1460. { generate mask to zero the bits we have to insert }
  1461. if (slopt <> SL_SETMAX) then
  1462. begin
  1463. maskreg := getintregister(list,OS_INT);
  1464. if (target_info.endian = endian_big) then
  1465. begin
  1466. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
  1467. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1468. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1469. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1470. end
  1471. else
  1472. begin
  1473. { Y-x = -(Y-x) }
  1474. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
  1475. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1476. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1477. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
  1478. end;
  1479. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1480. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,extra_value_reg);
  1481. end;
  1482. if (slopt <> SL_SETZERO) then
  1483. begin
  1484. if (target_info.endian = endian_big) then
  1485. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg)
  1486. else
  1487. begin
  1488. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1489. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1490. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
  1491. end;
  1492. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);
  1493. end;
  1494. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1495. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1496. a_label(list,hl);
  1497. end;
  1498. end;
  1499. end;
  1500. procedure tcg.a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference);
  1501. var
  1502. tmpreg: tregister;
  1503. begin
  1504. tmpreg := getintregister(list,tosubsetsize);
  1505. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1506. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1507. end;
  1508. procedure tcg.a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference);
  1509. var
  1510. tmpreg: tregister;
  1511. begin
  1512. tmpreg := getintregister(list,tosize);
  1513. a_load_subsetref_reg(list,subsetsize,tosize,sref,tmpreg);
  1514. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1515. end;
  1516. procedure tcg.a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference);
  1517. var
  1518. tmpreg: tregister;
  1519. begin
  1520. tmpreg := getintregister(list,subsetsize);
  1521. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1522. a_load_reg_subsetref(list,subsetsize,subsetsize,tmpreg,sref);
  1523. end;
  1524. procedure tcg.a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference);
  1525. var
  1526. tmpreg: tregister;
  1527. slopt: tsubsetloadopt;
  1528. begin
  1529. { perform masking of the source value in advance }
  1530. slopt := SL_REGNOSRCMASK;
  1531. if (sref.bitlen <> AIntBits) then
  1532. aword(a) := aword(a) and ((aword(1) shl sref.bitlen) -1);
  1533. if (
  1534. { broken x86 "x shl regbitsize = x" }
  1535. ((sref.bitlen <> AIntBits) and
  1536. ((aword(a) and ((aword(1) shl sref.bitlen) -1)) = (aword(1) shl sref.bitlen) -1)) or
  1537. ((sref.bitlen = AIntBits) and
  1538. (a = -1))
  1539. ) then
  1540. slopt := SL_SETMAX
  1541. else if (a = 0) then
  1542. slopt := SL_SETZERO;
  1543. tmpreg := getintregister(list,subsetsize);
  1544. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1545. a_load_const_reg(list,subsetsize,a,tmpreg);
  1546. a_load_regconst_subsetref_intern(list,subsetsize,subsetsize,tmpreg,sref,slopt);
  1547. end;
  1548. procedure tcg.a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation);
  1549. begin
  1550. case loc.loc of
  1551. LOC_REFERENCE,LOC_CREFERENCE:
  1552. a_load_subsetref_ref(list,subsetsize,loc.size,sref,loc.reference);
  1553. LOC_REGISTER,LOC_CREGISTER:
  1554. a_load_subsetref_reg(list,subsetsize,loc.size,sref,loc.register);
  1555. LOC_SUBSETREG,LOC_CSUBSETREG:
  1556. a_load_subsetref_subsetreg(list,subsetsize,loc.size,sref,loc.sreg);
  1557. LOC_SUBSETREF,LOC_CSUBSETREF:
  1558. a_load_subsetref_subsetref(list,subsetsize,loc.size,sref,loc.sref);
  1559. else
  1560. internalerror(200608054);
  1561. end;
  1562. end;
  1563. procedure tcg.a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
  1564. var
  1565. tmpreg: tregister;
  1566. begin
  1567. tmpreg := getintregister(list,tosubsetsize);
  1568. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1569. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1570. end;
  1571. procedure tcg.a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
  1572. var
  1573. tmpreg: tregister;
  1574. begin
  1575. tmpreg := getintregister(list,tosubsetsize);
  1576. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1577. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1578. end;
  1579. {$ifdef rangeon}
  1580. {$r+}
  1581. {$undef rangeon}
  1582. {$endif}
  1583. {$ifdef overflowon}
  1584. {$q+}
  1585. {$undef overflowon}
  1586. {$endif}
  1587. { generic bit address calculation routines }
  1588. function tcg.get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  1589. begin
  1590. result.ref:=ref;
  1591. inc(result.ref.offset,bitnumber div 8);
  1592. result.bitindexreg:=NR_NO;
  1593. result.startbit:=bitnumber mod 8;
  1594. result.bitlen:=1;
  1595. end;
  1596. function tcg.get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  1597. begin
  1598. result.subsetreg:=setreg;
  1599. result.subsetregsize:=setregsize;
  1600. { subsetregs always count from the least significant to the most significant bit }
  1601. if (target_info.endian=endian_big) then
  1602. result.startbit:=(tcgsize2size[setregsize]*8)-bitnumber-1
  1603. else
  1604. result.startbit:=bitnumber;
  1605. result.bitlen:=1;
  1606. end;
  1607. function tcg.get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  1608. var
  1609. tmpreg,
  1610. tmpaddrreg: tregister;
  1611. begin
  1612. result.ref:=ref;
  1613. result.startbit:=0;
  1614. result.bitlen:=1;
  1615. tmpreg:=getintregister(list,bitnumbersize);
  1616. a_op_const_reg_reg(list,OP_SHR,bitnumbersize,3,bitnumber,tmpreg);
  1617. tmpaddrreg:=getaddressregister(list);
  1618. a_load_reg_reg(list,bitnumbersize,OS_ADDR,tmpreg,tmpaddrreg);
  1619. if (result.ref.base=NR_NO) then
  1620. result.ref.base:=tmpaddrreg
  1621. else if (result.ref.index=NR_NO) then
  1622. result.ref.index:=tmpaddrreg
  1623. else
  1624. begin
  1625. a_op_reg_reg(list,OP_ADD,OS_ADDR,result.ref.index,tmpaddrreg);
  1626. result.ref.index:=tmpaddrreg;
  1627. end;
  1628. tmpreg:=getintregister(list,OS_INT);
  1629. a_op_const_reg_reg(list,OP_AND,OS_INT,7,bitnumber,tmpreg);
  1630. result.bitindexreg:=tmpreg;
  1631. end;
  1632. { bit testing routines }
  1633. procedure tcg.a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister);
  1634. var
  1635. tmpvalue: tregister;
  1636. begin
  1637. tmpvalue:=getintregister(list,valuesize);
  1638. if (target_info.endian=endian_little) then
  1639. begin
  1640. { rotate value register "bitnumber" bits to the right }
  1641. a_op_reg_reg_reg(list,OP_SHR,valuesize,bitnumber,value,tmpvalue);
  1642. { extract the bit we want }
  1643. a_op_const_reg(list,OP_AND,valuesize,1,tmpvalue);
  1644. end
  1645. else
  1646. begin
  1647. { highest (leftmost) bit = bit 0 -> shl bitnumber results in wanted }
  1648. { bit in uppermost position, then move it to the lowest position }
  1649. { "and" is not necessary since combination of shl/shr will clear }
  1650. { all other bits }
  1651. a_op_reg_reg_reg(list,OP_SHL,valuesize,bitnumber,value,tmpvalue);
  1652. a_op_const_reg(list,OP_SHR,valuesize,tcgsize2size[valuesize]*8-1,tmpvalue);
  1653. end;
  1654. a_load_reg_reg(list,valuesize,destsize,tmpvalue,destreg);
  1655. end;
  1656. procedure tcg.a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister);
  1657. begin
  1658. a_load_subsetref_reg(list,OS_8,destsize,get_bit_const_ref_sref(bitnumber,ref),destreg);
  1659. end;
  1660. procedure tcg.a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister);
  1661. begin
  1662. a_load_subsetreg_reg(list,setregsize,destsize,get_bit_const_reg_sreg(setregsize,bitnumber,setreg),destreg);
  1663. end;
  1664. procedure tcg.a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister);
  1665. var
  1666. tmpsreg: tsubsetregister;
  1667. begin
  1668. { the first parameter is used to calculate the bit offset in }
  1669. { case of big endian, and therefore must be the size of the }
  1670. { set and not of the whole subsetreg }
  1671. tmpsreg:=get_bit_const_reg_sreg(setregsize,bitnumber,setreg.subsetreg);
  1672. { now fix the size of the subsetreg }
  1673. tmpsreg.subsetregsize:=setreg.subsetregsize;
  1674. { correct offset of the set in the subsetreg }
  1675. inc(tmpsreg.startbit,setreg.startbit);
  1676. a_load_subsetreg_reg(list,setregsize,destsize,tmpsreg,destreg);
  1677. end;
  1678. procedure tcg.a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister);
  1679. begin
  1680. a_load_subsetref_reg(list,OS_8,destsize,get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref),destreg);
  1681. end;
  1682. procedure tcg.a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  1683. var
  1684. tmpreg: tregister;
  1685. begin
  1686. case loc.loc of
  1687. LOC_REFERENCE,LOC_CREFERENCE:
  1688. a_bit_test_reg_ref_reg(list,bitnumbersize,destsize,bitnumber,loc.reference,destreg);
  1689. LOC_REGISTER,LOC_CREGISTER,
  1690. LOC_SUBSETREG,LOC_CSUBSETREG,
  1691. LOC_CONSTANT:
  1692. begin
  1693. case loc.loc of
  1694. LOC_REGISTER,LOC_CREGISTER:
  1695. tmpreg:=loc.register;
  1696. LOC_SUBSETREG,LOC_CSUBSETREG:
  1697. begin
  1698. tmpreg:=getintregister(list,loc.size);
  1699. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1700. end;
  1701. LOC_CONSTANT:
  1702. begin
  1703. tmpreg:=getintregister(list,loc.size);
  1704. a_load_const_reg(list,loc.size,loc.value,tmpreg);
  1705. end;
  1706. end;
  1707. a_bit_test_reg_reg_reg(list,bitnumbersize,loc.size,destsize,bitnumber,tmpreg,destreg);
  1708. end;
  1709. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1710. else
  1711. internalerror(2007051701);
  1712. end;
  1713. end;
  1714. procedure tcg.a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  1715. begin
  1716. case loc.loc of
  1717. LOC_REFERENCE,LOC_CREFERENCE:
  1718. a_bit_test_const_ref_reg(list,destsize,bitnumber,loc.reference,destreg);
  1719. LOC_REGISTER,LOC_CREGISTER:
  1720. a_bit_test_const_reg_reg(list,loc.size,destsize,bitnumber,loc.register,destreg);
  1721. LOC_SUBSETREG,LOC_CSUBSETREG:
  1722. a_bit_test_const_subsetreg_reg(list,loc.size,destsize,bitnumber,loc.sreg,destreg);
  1723. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1724. else
  1725. internalerror(2007051702);
  1726. end;
  1727. end;
  1728. { bit setting/clearing routines }
  1729. procedure tcg.a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister);
  1730. var
  1731. tmpvalue: tregister;
  1732. begin
  1733. tmpvalue:=getintregister(list,destsize);
  1734. if (target_info.endian=endian_little) then
  1735. begin
  1736. a_load_const_reg(list,destsize,1,tmpvalue);
  1737. { rotate bit "bitnumber" bits to the left }
  1738. a_op_reg_reg(list,OP_SHL,destsize,bitnumber,tmpvalue);
  1739. end
  1740. else
  1741. begin
  1742. { highest (leftmost) bit = bit 0 -> "$80/$8000/$80000000/ ... }
  1743. { shr bitnumber" results in correct mask }
  1744. a_load_const_reg(list,destsize,1 shl (tcgsize2size[destsize]*8-1),tmpvalue);
  1745. a_op_reg_reg(list,OP_SHR,destsize,bitnumber,tmpvalue);
  1746. end;
  1747. { set/clear the bit we want }
  1748. if (doset) then
  1749. a_op_reg_reg(list,OP_OR,destsize,tmpvalue,dest)
  1750. else
  1751. begin
  1752. a_op_reg_reg(list,OP_NOT,destsize,tmpvalue,tmpvalue);
  1753. a_op_reg_reg(list,OP_AND,destsize,tmpvalue,dest)
  1754. end;
  1755. end;
  1756. procedure tcg.a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference);
  1757. begin
  1758. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_const_ref_sref(bitnumber,ref));
  1759. end;
  1760. procedure tcg.a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister);
  1761. begin
  1762. a_load_const_subsetreg(list,OS_8,ord(doset),get_bit_const_reg_sreg(destsize,bitnumber,destreg));
  1763. end;
  1764. procedure tcg.a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister);
  1765. var
  1766. tmpsreg: tsubsetregister;
  1767. begin
  1768. { the first parameter is used to calculate the bit offset in }
  1769. { case of big endian, and therefore must be the size of the }
  1770. { set and not of the whole subsetreg }
  1771. tmpsreg:=get_bit_const_reg_sreg(destsize,bitnumber,destreg.subsetreg);
  1772. { now fix the size of the subsetreg }
  1773. tmpsreg.subsetregsize:=destreg.subsetregsize;
  1774. { correct offset of the set in the subsetreg }
  1775. inc(tmpsreg.startbit,destreg.startbit);
  1776. a_load_const_subsetreg(list,OS_8,ord(doset),tmpsreg);
  1777. end;
  1778. procedure tcg.a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference);
  1779. begin
  1780. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref));
  1781. end;
  1782. procedure tcg.a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  1783. var
  1784. tmpreg: tregister;
  1785. begin
  1786. case loc.loc of
  1787. LOC_REFERENCE:
  1788. a_bit_set_reg_ref(list,doset,bitnumbersize,bitnumber,loc.reference);
  1789. LOC_CREGISTER:
  1790. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,loc.register);
  1791. { e.g. a 2-byte set in a record regvar }
  1792. LOC_CSUBSETREG:
  1793. begin
  1794. { hard to do in-place in a generic way, so operate on a copy }
  1795. tmpreg:=getintregister(list,loc.size);
  1796. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1797. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,tmpreg);
  1798. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  1799. end;
  1800. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1801. else
  1802. internalerror(2007051703)
  1803. end;
  1804. end;
  1805. procedure tcg.a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  1806. begin
  1807. case loc.loc of
  1808. LOC_REFERENCE:
  1809. a_bit_set_const_ref(list,doset,loc.size,bitnumber,loc.reference);
  1810. LOC_CREGISTER:
  1811. a_bit_set_const_reg(list,doset,loc.size,bitnumber,loc.register);
  1812. LOC_CSUBSETREG:
  1813. a_bit_set_const_subsetreg(list,doset,loc.size,bitnumber,loc.sreg);
  1814. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1815. else
  1816. internalerror(2007051704)
  1817. end;
  1818. end;
  1819. { memory/register loading }
  1820. procedure tcg.a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);
  1821. var
  1822. tmpref : treference;
  1823. tmpreg : tregister;
  1824. i : longint;
  1825. begin
  1826. if ref.alignment<tcgsize2size[fromsize] then
  1827. begin
  1828. tmpref:=ref;
  1829. { we take care of the alignment now }
  1830. tmpref.alignment:=0;
  1831. case FromSize of
  1832. OS_16,OS_S16:
  1833. begin
  1834. tmpreg:=getintregister(list,OS_16);
  1835. a_load_reg_reg(list,fromsize,OS_16,register,tmpreg);
  1836. if target_info.endian=endian_big then
  1837. inc(tmpref.offset);
  1838. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1839. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1840. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1841. a_op_const_reg(list,OP_SHR,OS_16,8,tmpreg);
  1842. if target_info.endian=endian_big then
  1843. dec(tmpref.offset)
  1844. else
  1845. inc(tmpref.offset);
  1846. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1847. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1848. end;
  1849. OS_32,OS_S32:
  1850. begin
  1851. { could add an optimised case for ref.alignment=2 }
  1852. tmpreg:=getintregister(list,OS_32);
  1853. a_load_reg_reg(list,fromsize,OS_32,register,tmpreg);
  1854. if target_info.endian=endian_big then
  1855. inc(tmpref.offset,3);
  1856. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1857. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1858. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1859. for i:=1 to 3 do
  1860. begin
  1861. a_op_const_reg(list,OP_SHR,OS_32,8,tmpreg);
  1862. if target_info.endian=endian_big then
  1863. dec(tmpref.offset)
  1864. else
  1865. inc(tmpref.offset);
  1866. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1867. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1868. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1869. end;
  1870. end
  1871. else
  1872. a_load_reg_ref(list,fromsize,tosize,register,tmpref);
  1873. end;
  1874. end
  1875. else
  1876. a_load_reg_ref(list,fromsize,tosize,register,ref);
  1877. end;
  1878. procedure tcg.a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);
  1879. var
  1880. tmpref : treference;
  1881. tmpreg,
  1882. tmpreg2 : tregister;
  1883. i : longint;
  1884. begin
  1885. if ref.alignment in [1,2] then
  1886. begin
  1887. tmpref:=ref;
  1888. { we take care of the alignment now }
  1889. tmpref.alignment:=0;
  1890. case FromSize of
  1891. OS_16,OS_S16:
  1892. if ref.alignment=2 then
  1893. a_load_ref_reg(list,fromsize,tosize,tmpref,register)
  1894. else
  1895. begin
  1896. { first load in tmpreg, because the target register }
  1897. { may be used in ref as well }
  1898. if target_info.endian=endian_little then
  1899. inc(tmpref.offset);
  1900. tmpreg:=getintregister(list,OS_8);
  1901. a_load_ref_reg(list,OS_8,OS_8,tmpref,tmpreg);
  1902. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1903. a_op_const_reg(list,OP_SHL,OS_16,8,tmpreg);
  1904. if target_info.endian=endian_little then
  1905. dec(tmpref.offset)
  1906. else
  1907. inc(tmpref.offset);
  1908. a_load_ref_reg(list,OS_8,OS_16,tmpref,register);
  1909. a_op_reg_reg(list,OP_OR,OS_16,tmpreg,register);
  1910. end;
  1911. OS_32,OS_S32:
  1912. if ref.alignment=2 then
  1913. begin
  1914. if target_info.endian=endian_little then
  1915. inc(tmpref.offset,2);
  1916. tmpreg:=getintregister(list,OS_32);
  1917. a_load_ref_reg(list,OS_16,OS_32,tmpref,tmpreg);
  1918. a_op_const_reg(list,OP_SHL,OS_32,16,tmpreg);
  1919. if target_info.endian=endian_little then
  1920. dec(tmpref.offset,2)
  1921. else
  1922. inc(tmpref.offset,2);
  1923. a_load_ref_reg(list,OS_16,OS_32,tmpref,register);
  1924. a_op_reg_reg(list,OP_OR,OS_32,tmpreg,register);
  1925. end
  1926. else
  1927. begin
  1928. if target_info.endian=endian_little then
  1929. inc(tmpref.offset,3);
  1930. tmpreg:=getintregister(list,OS_32);
  1931. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg);
  1932. tmpreg2:=getintregister(list,OS_32);
  1933. for i:=1 to 3 do
  1934. begin
  1935. a_op_const_reg(list,OP_SHL,OS_32,8,tmpreg);
  1936. if target_info.endian=endian_little then
  1937. dec(tmpref.offset)
  1938. else
  1939. inc(tmpref.offset);
  1940. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg2);
  1941. a_op_reg_reg(list,OP_OR,OS_32,tmpreg2,tmpreg);
  1942. end;
  1943. a_load_reg_reg(list,OS_32,OS_32,tmpreg,register);
  1944. end
  1945. else
  1946. a_load_ref_reg(list,fromsize,tosize,tmpref,register);
  1947. end;
  1948. end
  1949. else
  1950. a_load_ref_reg(list,fromsize,tosize,ref,register);
  1951. end;
  1952. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  1953. var
  1954. tmpreg: tregister;
  1955. begin
  1956. { verify if we have the same reference }
  1957. if references_equal(sref,dref) then
  1958. exit;
  1959. tmpreg:=getintregister(list,tosize);
  1960. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  1961. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  1962. end;
  1963. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);
  1964. var
  1965. tmpreg: tregister;
  1966. begin
  1967. tmpreg:=getintregister(list,size);
  1968. a_load_const_reg(list,size,a,tmpreg);
  1969. a_load_reg_ref(list,size,size,tmpreg,ref);
  1970. end;
  1971. procedure tcg.a_load_const_loc(list : TAsmList;a : aint;const loc: tlocation);
  1972. begin
  1973. case loc.loc of
  1974. LOC_REFERENCE,LOC_CREFERENCE:
  1975. a_load_const_ref(list,loc.size,a,loc.reference);
  1976. LOC_REGISTER,LOC_CREGISTER:
  1977. a_load_const_reg(list,loc.size,a,loc.register);
  1978. LOC_SUBSETREG,LOC_CSUBSETREG:
  1979. a_load_const_subsetreg(list,loc.size,a,loc.sreg);
  1980. LOC_SUBSETREF,LOC_CSUBSETREF:
  1981. a_load_const_subsetref(list,loc.size,a,loc.sref);
  1982. else
  1983. internalerror(200203272);
  1984. end;
  1985. end;
  1986. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  1987. begin
  1988. case loc.loc of
  1989. LOC_REFERENCE,LOC_CREFERENCE:
  1990. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1991. LOC_REGISTER,LOC_CREGISTER:
  1992. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1993. LOC_SUBSETREG,LOC_CSUBSETREG:
  1994. a_load_reg_subsetreg(list,fromsize,loc.size,reg,loc.sreg);
  1995. LOC_SUBSETREF,LOC_CSUBSETREF:
  1996. a_load_reg_subsetref(list,fromsize,loc.size,reg,loc.sref);
  1997. else
  1998. internalerror(200203271);
  1999. end;
  2000. end;
  2001. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  2002. begin
  2003. case loc.loc of
  2004. LOC_REFERENCE,LOC_CREFERENCE:
  2005. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2006. LOC_REGISTER,LOC_CREGISTER:
  2007. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  2008. LOC_CONSTANT:
  2009. a_load_const_reg(list,tosize,loc.value,reg);
  2010. LOC_SUBSETREG,LOC_CSUBSETREG:
  2011. a_load_subsetreg_reg(list,loc.size,tosize,loc.sreg,reg);
  2012. LOC_SUBSETREF,LOC_CSUBSETREF:
  2013. a_load_subsetref_reg(list,loc.size,tosize,loc.sref,reg);
  2014. else
  2015. internalerror(200109092);
  2016. end;
  2017. end;
  2018. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  2019. begin
  2020. case loc.loc of
  2021. LOC_REFERENCE,LOC_CREFERENCE:
  2022. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  2023. LOC_REGISTER,LOC_CREGISTER:
  2024. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  2025. LOC_CONSTANT:
  2026. a_load_const_ref(list,tosize,loc.value,ref);
  2027. LOC_SUBSETREG,LOC_CSUBSETREG:
  2028. a_load_subsetreg_ref(list,loc.size,tosize,loc.sreg,ref);
  2029. LOC_SUBSETREF,LOC_CSUBSETREF:
  2030. a_load_subsetref_ref(list,loc.size,tosize,loc.sref,ref);
  2031. else
  2032. internalerror(200109302);
  2033. end;
  2034. end;
  2035. procedure tcg.a_load_loc_subsetreg(list : TAsmList; subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  2036. begin
  2037. case loc.loc of
  2038. LOC_REFERENCE,LOC_CREFERENCE:
  2039. a_load_ref_subsetreg(list,loc.size,subsetsize,loc.reference,sreg);
  2040. LOC_REGISTER,LOC_CREGISTER:
  2041. a_load_reg_subsetreg(list,loc.size,subsetsize,loc.register,sreg);
  2042. LOC_CONSTANT:
  2043. a_load_const_subsetreg(list,subsetsize,loc.value,sreg);
  2044. LOC_SUBSETREG,LOC_CSUBSETREG:
  2045. a_load_subsetreg_subsetreg(list,loc.size,subsetsize,loc.sreg,sreg);
  2046. LOC_SUBSETREF,LOC_CSUBSETREF:
  2047. a_load_subsetref_subsetreg(list,loc.size,subsetsize,loc.sref,sreg);
  2048. else
  2049. internalerror(2006052310);
  2050. end;
  2051. end;
  2052. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation);
  2053. begin
  2054. case loc.loc of
  2055. LOC_REFERENCE,LOC_CREFERENCE:
  2056. a_load_subsetreg_ref(list,subsetsize,loc.size,sreg,loc.reference);
  2057. LOC_REGISTER,LOC_CREGISTER:
  2058. a_load_subsetreg_reg(list,subsetsize,loc.size,sreg,loc.register);
  2059. LOC_SUBSETREG,LOC_CSUBSETREG:
  2060. a_load_subsetreg_subsetreg(list,subsetsize,loc.size,sreg,loc.sreg);
  2061. LOC_SUBSETREF,LOC_CSUBSETREF:
  2062. a_load_subsetreg_subsetref(list,subsetsize,loc.size,sreg,loc.sref);
  2063. else
  2064. internalerror(2006051510);
  2065. end;
  2066. end;
  2067. procedure tcg.optimize_op_const(var op: topcg; var a : aint);
  2068. var
  2069. powerval : longint;
  2070. begin
  2071. case op of
  2072. OP_OR :
  2073. begin
  2074. { or with zero returns same result }
  2075. if a = 0 then
  2076. op:=OP_NONE
  2077. else
  2078. { or with max returns max }
  2079. if a = -1 then
  2080. op:=OP_MOVE;
  2081. end;
  2082. OP_AND :
  2083. begin
  2084. { and with max returns same result }
  2085. if (a = -1) then
  2086. op:=OP_NONE
  2087. else
  2088. { and with 0 returns 0 }
  2089. if a=0 then
  2090. op:=OP_MOVE;
  2091. end;
  2092. OP_DIV :
  2093. begin
  2094. { division by 1 returns result }
  2095. if a = 1 then
  2096. op:=OP_NONE
  2097. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2098. begin
  2099. a := powerval;
  2100. op:= OP_SHR;
  2101. end;
  2102. end;
  2103. OP_IDIV:
  2104. begin
  2105. if a = 1 then
  2106. op:=OP_NONE;
  2107. end;
  2108. OP_MUL,OP_IMUL:
  2109. begin
  2110. if a = 1 then
  2111. op:=OP_NONE
  2112. else
  2113. if a=0 then
  2114. op:=OP_MOVE
  2115. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2116. begin
  2117. a := powerval;
  2118. op:= OP_SHL;
  2119. end;
  2120. end;
  2121. OP_ADD,OP_SUB:
  2122. begin
  2123. if a = 0 then
  2124. op:=OP_NONE;
  2125. end;
  2126. OP_SAR,OP_SHL,OP_SHR,OP_ROL,OP_ROR:
  2127. begin
  2128. if a = 0 then
  2129. op:=OP_NONE;
  2130. end;
  2131. end;
  2132. end;
  2133. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  2134. begin
  2135. case loc.loc of
  2136. LOC_REFERENCE, LOC_CREFERENCE:
  2137. a_loadfpu_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2138. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2139. a_loadfpu_reg_reg(list,loc.size,tosize,loc.register,reg);
  2140. else
  2141. internalerror(200203301);
  2142. end;
  2143. end;
  2144. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  2145. begin
  2146. case loc.loc of
  2147. LOC_REFERENCE, LOC_CREFERENCE:
  2148. a_loadfpu_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  2149. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2150. a_loadfpu_reg_reg(list,fromsize,loc.size,reg,loc.register);
  2151. else
  2152. internalerror(48991);
  2153. end;
  2154. end;
  2155. procedure tcg.a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  2156. var
  2157. reg: tregister;
  2158. regsize: tcgsize;
  2159. begin
  2160. if (fromsize>=tosize) then
  2161. regsize:=fromsize
  2162. else
  2163. regsize:=tosize;
  2164. reg:=getfpuregister(list,regsize);
  2165. a_loadfpu_ref_reg(list,fromsize,regsize,ref1,reg);
  2166. a_loadfpu_reg_ref(list,regsize,tosize,reg,ref2);
  2167. end;
  2168. procedure tcg.a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  2169. var
  2170. ref : treference;
  2171. begin
  2172. case cgpara.location^.loc of
  2173. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2174. begin
  2175. cgpara.check_simple_location;
  2176. a_loadfpu_reg_reg(list,size,size,r,cgpara.location^.register);
  2177. end;
  2178. LOC_REFERENCE,LOC_CREFERENCE:
  2179. begin
  2180. cgpara.check_simple_location;
  2181. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2182. a_loadfpu_reg_ref(list,size,size,r,ref);
  2183. end;
  2184. LOC_REGISTER,LOC_CREGISTER:
  2185. begin
  2186. { paramfpu_ref does the check_simpe_location check here if necessary }
  2187. tg.GetTemp(list,TCGSize2Size[size],TCGSize2Size[size],tt_normal,ref);
  2188. a_loadfpu_reg_ref(list,size,size,r,ref);
  2189. a_paramfpu_ref(list,size,ref,cgpara);
  2190. tg.Ungettemp(list,ref);
  2191. end;
  2192. else
  2193. internalerror(2002071004);
  2194. end;
  2195. end;
  2196. procedure tcg.a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  2197. var
  2198. href : treference;
  2199. begin
  2200. cgpara.check_simple_location;
  2201. case cgpara.location^.loc of
  2202. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2203. a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
  2204. LOC_REFERENCE,LOC_CREFERENCE:
  2205. begin
  2206. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2207. { concatcopy should choose the best way to copy the data }
  2208. g_concatcopy(list,ref,href,tcgsize2size[size]);
  2209. end;
  2210. else
  2211. internalerror(200402201);
  2212. end;
  2213. end;
  2214. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  2215. var
  2216. tmpreg : tregister;
  2217. begin
  2218. tmpreg:=getintregister(list,size);
  2219. a_load_ref_reg(list,size,size,ref,tmpreg);
  2220. a_op_const_reg(list,op,size,a,tmpreg);
  2221. a_load_reg_ref(list,size,size,tmpreg,ref);
  2222. end;
  2223. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister);
  2224. var
  2225. tmpreg: tregister;
  2226. begin
  2227. tmpreg := getintregister(list, size);
  2228. a_load_subsetreg_reg(list,subsetsize,size,sreg,tmpreg);
  2229. a_op_const_reg(list,op,size,a,tmpreg);
  2230. a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
  2231. end;
  2232. procedure tcg.a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference);
  2233. var
  2234. tmpreg: tregister;
  2235. begin
  2236. tmpreg := getintregister(list, size);
  2237. a_load_subsetref_reg(list,subsetsize,size,sref,tmpreg);
  2238. a_op_const_reg(list,op,size,a,tmpreg);
  2239. a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
  2240. end;
  2241. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: aint; const loc: tlocation);
  2242. begin
  2243. case loc.loc of
  2244. LOC_REGISTER, LOC_CREGISTER:
  2245. a_op_const_reg(list,op,loc.size,a,loc.register);
  2246. LOC_REFERENCE, LOC_CREFERENCE:
  2247. a_op_const_ref(list,op,loc.size,a,loc.reference);
  2248. LOC_SUBSETREG, LOC_CSUBSETREG:
  2249. a_op_const_subsetreg(list,op,loc.size,loc.size,a,loc.sreg);
  2250. LOC_SUBSETREF, LOC_CSUBSETREF:
  2251. a_op_const_subsetref(list,op,loc.size,loc.size,a,loc.sref);
  2252. else
  2253. internalerror(200109061);
  2254. end;
  2255. end;
  2256. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  2257. var
  2258. tmpreg : tregister;
  2259. begin
  2260. tmpreg:=getintregister(list,size);
  2261. a_load_ref_reg(list,size,size,ref,tmpreg);
  2262. a_op_reg_reg(list,op,size,reg,tmpreg);
  2263. a_load_reg_ref(list,size,size,tmpreg,ref);
  2264. end;
  2265. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  2266. var
  2267. tmpreg: tregister;
  2268. begin
  2269. case op of
  2270. OP_NOT,OP_NEG:
  2271. { handle it as "load ref,reg; op reg" }
  2272. begin
  2273. a_load_ref_reg(list,size,size,ref,reg);
  2274. a_op_reg_reg(list,op,size,reg,reg);
  2275. end;
  2276. else
  2277. begin
  2278. tmpreg:=getintregister(list,size);
  2279. a_load_ref_reg(list,size,size,ref,tmpreg);
  2280. a_op_reg_reg(list,op,size,tmpreg,reg);
  2281. end;
  2282. end;
  2283. end;
  2284. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister);
  2285. var
  2286. tmpreg: tregister;
  2287. begin
  2288. tmpreg := getintregister(list, opsize);
  2289. a_load_subsetreg_reg(list,subsetsize,opsize,sreg,tmpreg);
  2290. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2291. a_load_reg_subsetreg(list,opsize,subsetsize,tmpreg,sreg);
  2292. end;
  2293. procedure tcg.a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference);
  2294. var
  2295. tmpreg: tregister;
  2296. begin
  2297. tmpreg := getintregister(list, opsize);
  2298. a_load_subsetref_reg(list,subsetsize,opsize,sref,tmpreg);
  2299. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2300. a_load_reg_subsetref(list,opsize,subsetsize,tmpreg,sref);
  2301. end;
  2302. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  2303. begin
  2304. case loc.loc of
  2305. LOC_REGISTER, LOC_CREGISTER:
  2306. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  2307. LOC_REFERENCE, LOC_CREFERENCE:
  2308. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  2309. LOC_SUBSETREG, LOC_CSUBSETREG:
  2310. a_op_reg_subsetreg(list,op,loc.size,loc.size,reg,loc.sreg);
  2311. LOC_SUBSETREF, LOC_CSUBSETREF:
  2312. a_op_reg_subsetref(list,op,loc.size,loc.size,reg,loc.sref);
  2313. else
  2314. internalerror(200109061);
  2315. end;
  2316. end;
  2317. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  2318. var
  2319. tmpreg: tregister;
  2320. begin
  2321. case loc.loc of
  2322. LOC_REGISTER,LOC_CREGISTER:
  2323. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  2324. LOC_REFERENCE,LOC_CREFERENCE:
  2325. begin
  2326. tmpreg:=getintregister(list,loc.size);
  2327. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  2328. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  2329. end;
  2330. LOC_SUBSETREG, LOC_CSUBSETREG:
  2331. begin
  2332. tmpreg:=getintregister(list,loc.size);
  2333. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  2334. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2335. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  2336. end;
  2337. LOC_SUBSETREF, LOC_CSUBSETREF:
  2338. begin
  2339. tmpreg:=getintregister(list,loc.size);
  2340. a_load_subsetreF_reg(list,loc.size,loc.size,loc.sref,tmpreg);
  2341. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2342. a_load_reg_subsetref(list,loc.size,loc.size,tmpreg,loc.sref);
  2343. end;
  2344. else
  2345. internalerror(200109061);
  2346. end;
  2347. end;
  2348. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  2349. a:aint;src,dst:Tregister);
  2350. begin
  2351. a_load_reg_reg(list,size,size,src,dst);
  2352. a_op_const_reg(list,op,size,a,dst);
  2353. end;
  2354. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  2355. size: tcgsize; src1, src2, dst: tregister);
  2356. var
  2357. tmpreg: tregister;
  2358. begin
  2359. if (dst<>src1) then
  2360. begin
  2361. a_load_reg_reg(list,size,size,src2,dst);
  2362. a_op_reg_reg(list,op,size,src1,dst);
  2363. end
  2364. else
  2365. begin
  2366. { can we do a direct operation on the target register ? }
  2367. if op in [OP_ADD,OP_MUL,OP_AND,OP_MOVE,OP_XOR,OP_IMUL,OP_OR] then
  2368. a_op_reg_reg(list,op,size,src2,dst)
  2369. else
  2370. begin
  2371. tmpreg:=getintregister(list,size);
  2372. a_load_reg_reg(list,size,size,src2,tmpreg);
  2373. a_op_reg_reg(list,op,size,src1,tmpreg);
  2374. a_load_reg_reg(list,size,size,tmpreg,dst);
  2375. end;
  2376. end;
  2377. end;
  2378. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2379. begin
  2380. a_op_const_reg_reg(list,op,size,a,src,dst);
  2381. ovloc.loc:=LOC_VOID;
  2382. end;
  2383. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2384. begin
  2385. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  2386. ovloc.loc:=LOC_VOID;
  2387. end;
  2388. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  2389. l : tasmlabel);
  2390. var
  2391. tmpreg: tregister;
  2392. begin
  2393. tmpreg:=getintregister(list,size);
  2394. a_load_ref_reg(list,size,size,ref,tmpreg);
  2395. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2396. end;
  2397. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  2398. l : tasmlabel);
  2399. var
  2400. tmpreg : tregister;
  2401. begin
  2402. case loc.loc of
  2403. LOC_REGISTER,LOC_CREGISTER:
  2404. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  2405. LOC_REFERENCE,LOC_CREFERENCE:
  2406. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  2407. LOC_SUBSETREG, LOC_CSUBSETREG:
  2408. begin
  2409. tmpreg:=getintregister(list,size);
  2410. a_load_subsetreg_reg(list,loc.size,size,loc.sreg,tmpreg);
  2411. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2412. end;
  2413. LOC_SUBSETREF, LOC_CSUBSETREF:
  2414. begin
  2415. tmpreg:=getintregister(list,size);
  2416. a_load_subsetref_reg(list,loc.size,size,loc.sref,tmpreg);
  2417. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2418. end;
  2419. else
  2420. internalerror(200109061);
  2421. end;
  2422. end;
  2423. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  2424. var
  2425. tmpreg: tregister;
  2426. begin
  2427. tmpreg:=getintregister(list,size);
  2428. a_load_ref_reg(list,size,size,ref,tmpreg);
  2429. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  2430. end;
  2431. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  2432. var
  2433. tmpreg: tregister;
  2434. begin
  2435. tmpreg:=getintregister(list,size);
  2436. a_load_ref_reg(list,size,size,ref,tmpreg);
  2437. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  2438. end;
  2439. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  2440. begin
  2441. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  2442. end;
  2443. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  2444. begin
  2445. case loc.loc of
  2446. LOC_REGISTER,
  2447. LOC_CREGISTER:
  2448. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  2449. LOC_REFERENCE,
  2450. LOC_CREFERENCE :
  2451. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  2452. LOC_CONSTANT:
  2453. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  2454. LOC_SUBSETREG,
  2455. LOC_CSUBSETREG:
  2456. a_cmp_subsetreg_reg_label(list,loc.size,size,cmp_op,loc.sreg,reg,l);
  2457. LOC_SUBSETREF,
  2458. LOC_CSUBSETREF:
  2459. a_cmp_subsetref_reg_label(list,loc.size,size,cmp_op,loc.sref,reg,l);
  2460. else
  2461. internalerror(200203231);
  2462. end;
  2463. end;
  2464. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel);
  2465. var
  2466. tmpreg: tregister;
  2467. begin
  2468. tmpreg:=getintregister(list, cmpsize);
  2469. a_load_subsetreg_reg(list,subsetsize,cmpsize,sreg,tmpreg);
  2470. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2471. end;
  2472. procedure tcg.a_cmp_subsetref_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel);
  2473. var
  2474. tmpreg: tregister;
  2475. begin
  2476. tmpreg:=getintregister(list, cmpsize);
  2477. a_load_subsetref_reg(list,subsetsize,cmpsize,sref,tmpreg);
  2478. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2479. end;
  2480. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  2481. l : tasmlabel);
  2482. var
  2483. tmpreg: tregister;
  2484. begin
  2485. case loc.loc of
  2486. LOC_REGISTER,LOC_CREGISTER:
  2487. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  2488. LOC_REFERENCE,LOC_CREFERENCE:
  2489. begin
  2490. tmpreg:=getintregister(list,size);
  2491. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2492. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  2493. end;
  2494. LOC_SUBSETREG, LOC_CSUBSETREG:
  2495. begin
  2496. tmpreg:=getintregister(list, size);
  2497. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2498. a_cmp_subsetreg_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sreg,tmpreg,l);
  2499. end;
  2500. LOC_SUBSETREF, LOC_CSUBSETREF:
  2501. begin
  2502. tmpreg:=getintregister(list, size);
  2503. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2504. a_cmp_subsetref_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sref,tmpreg,l);
  2505. end;
  2506. else
  2507. internalerror(200109061);
  2508. end;
  2509. end;
  2510. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  2511. begin
  2512. case loc.loc of
  2513. LOC_MMREGISTER,LOC_CMMREGISTER:
  2514. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2515. LOC_REFERENCE,LOC_CREFERENCE:
  2516. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  2517. else
  2518. internalerror(200310121);
  2519. end;
  2520. end;
  2521. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  2522. begin
  2523. case loc.loc of
  2524. LOC_MMREGISTER,LOC_CMMREGISTER:
  2525. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  2526. LOC_REFERENCE,LOC_CREFERENCE:
  2527. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  2528. else
  2529. internalerror(200310122);
  2530. end;
  2531. end;
  2532. procedure tcg.a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  2533. var
  2534. href : treference;
  2535. begin
  2536. cgpara.check_simple_location;
  2537. case cgpara.location^.loc of
  2538. LOC_MMREGISTER,LOC_CMMREGISTER:
  2539. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  2540. LOC_REFERENCE,LOC_CREFERENCE:
  2541. begin
  2542. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2543. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  2544. end
  2545. else
  2546. internalerror(200310123);
  2547. end;
  2548. end;
  2549. procedure tcg.a_parammm_ref(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  2550. var
  2551. hr : tregister;
  2552. hs : tmmshuffle;
  2553. begin
  2554. cgpara.check_simple_location;
  2555. hr:=getmmregister(list,cgpara.location^.size);
  2556. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  2557. if realshuffle(shuffle) then
  2558. begin
  2559. hs:=shuffle^;
  2560. removeshuffles(hs);
  2561. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,@hs);
  2562. end
  2563. else
  2564. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,shuffle);
  2565. end;
  2566. procedure tcg.a_parammm_loc(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  2567. begin
  2568. case loc.loc of
  2569. LOC_MMREGISTER,LOC_CMMREGISTER:
  2570. a_parammm_reg(list,loc.size,loc.register,cgpara,shuffle);
  2571. LOC_REFERENCE,LOC_CREFERENCE:
  2572. a_parammm_ref(list,loc.size,loc.reference,cgpara,shuffle);
  2573. else
  2574. internalerror(200310123);
  2575. end;
  2576. end;
  2577. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  2578. var
  2579. hr : tregister;
  2580. hs : tmmshuffle;
  2581. begin
  2582. hr:=getmmregister(list,size);
  2583. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2584. if realshuffle(shuffle) then
  2585. begin
  2586. hs:=shuffle^;
  2587. removeshuffles(hs);
  2588. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  2589. end
  2590. else
  2591. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  2592. end;
  2593. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  2594. var
  2595. hr : tregister;
  2596. hs : tmmshuffle;
  2597. begin
  2598. hr:=getmmregister(list,size);
  2599. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2600. if realshuffle(shuffle) then
  2601. begin
  2602. hs:=shuffle^;
  2603. removeshuffles(hs);
  2604. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  2605. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  2606. end
  2607. else
  2608. begin
  2609. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  2610. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  2611. end;
  2612. end;
  2613. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  2614. begin
  2615. case loc.loc of
  2616. LOC_CMMREGISTER,LOC_MMREGISTER:
  2617. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  2618. LOC_CREFERENCE,LOC_REFERENCE:
  2619. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  2620. else
  2621. internalerror(200312232);
  2622. end;
  2623. end;
  2624. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  2625. begin
  2626. g_concatcopy(list,source,dest,len);
  2627. end;
  2628. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  2629. var
  2630. cgpara1,cgpara2,cgpara3 : TCGPara;
  2631. begin
  2632. cgpara1.init;
  2633. cgpara2.init;
  2634. cgpara3.init;
  2635. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2636. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2637. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2638. paramanager.allocparaloc(list,cgpara3);
  2639. a_paramaddr_ref(list,dest,cgpara3);
  2640. paramanager.allocparaloc(list,cgpara2);
  2641. a_paramaddr_ref(list,source,cgpara2);
  2642. paramanager.allocparaloc(list,cgpara1);
  2643. a_param_const(list,OS_INT,len,cgpara1);
  2644. paramanager.freeparaloc(list,cgpara3);
  2645. paramanager.freeparaloc(list,cgpara2);
  2646. paramanager.freeparaloc(list,cgpara1);
  2647. allocallcpuregisters(list);
  2648. a_call_name(list,'FPC_SHORTSTR_ASSIGN',false);
  2649. deallocallcpuregisters(list);
  2650. cgpara3.done;
  2651. cgpara2.done;
  2652. cgpara1.done;
  2653. end;
  2654. procedure tcg.g_copyvariant(list : TAsmList;const source,dest : treference);
  2655. var
  2656. cgpara1,cgpara2 : TCGPara;
  2657. begin
  2658. cgpara1.init;
  2659. cgpara2.init;
  2660. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2661. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2662. paramanager.allocparaloc(list,cgpara2);
  2663. a_paramaddr_ref(list,dest,cgpara2);
  2664. paramanager.allocparaloc(list,cgpara1);
  2665. a_paramaddr_ref(list,source,cgpara1);
  2666. paramanager.freeparaloc(list,cgpara2);
  2667. paramanager.freeparaloc(list,cgpara1);
  2668. allocallcpuregisters(list);
  2669. a_call_name(list,'FPC_VARIANT_COPY_OVERWRITE',false);
  2670. deallocallcpuregisters(list);
  2671. cgpara2.done;
  2672. cgpara1.done;
  2673. end;
  2674. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2675. var
  2676. href : treference;
  2677. incrfunc : string;
  2678. cgpara1,cgpara2 : TCGPara;
  2679. begin
  2680. cgpara1.init;
  2681. cgpara2.init;
  2682. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2683. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2684. if is_interfacecom(t) then
  2685. incrfunc:='FPC_INTF_INCR_REF'
  2686. else if is_ansistring(t) then
  2687. incrfunc:='FPC_ANSISTR_INCR_REF'
  2688. else if is_widestring(t) then
  2689. incrfunc:='FPC_WIDESTR_INCR_REF'
  2690. else if is_unicodestring(t) then
  2691. incrfunc:='FPC_UNICODESTR_INCR_REF'
  2692. else if is_dynamic_array(t) then
  2693. incrfunc:='FPC_DYNARRAY_INCR_REF'
  2694. else
  2695. incrfunc:='';
  2696. { call the special incr function or the generic addref }
  2697. if incrfunc<>'' then
  2698. begin
  2699. paramanager.allocparaloc(list,cgpara1);
  2700. { widestrings aren't ref. counted on all platforms so we need the address
  2701. to create a real copy }
  2702. if is_widestring(t) then
  2703. a_paramaddr_ref(list,ref,cgpara1)
  2704. else
  2705. { these functions get the pointer by value }
  2706. a_param_ref(list,OS_ADDR,ref,cgpara1);
  2707. paramanager.freeparaloc(list,cgpara1);
  2708. allocallcpuregisters(list);
  2709. a_call_name(list,incrfunc,false);
  2710. deallocallcpuregisters(list);
  2711. end
  2712. else
  2713. begin
  2714. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2715. paramanager.allocparaloc(list,cgpara2);
  2716. a_paramaddr_ref(list,href,cgpara2);
  2717. paramanager.allocparaloc(list,cgpara1);
  2718. a_paramaddr_ref(list,ref,cgpara1);
  2719. paramanager.freeparaloc(list,cgpara1);
  2720. paramanager.freeparaloc(list,cgpara2);
  2721. allocallcpuregisters(list);
  2722. a_call_name(list,'FPC_ADDREF',false);
  2723. deallocallcpuregisters(list);
  2724. end;
  2725. cgpara2.done;
  2726. cgpara1.done;
  2727. end;
  2728. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2729. var
  2730. href : treference;
  2731. decrfunc : string;
  2732. needrtti : boolean;
  2733. cgpara1,cgpara2 : TCGPara;
  2734. tempreg1,tempreg2 : TRegister;
  2735. begin
  2736. cgpara1.init;
  2737. cgpara2.init;
  2738. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2739. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2740. needrtti:=false;
  2741. if is_interfacecom(t) then
  2742. decrfunc:='FPC_INTF_DECR_REF'
  2743. else if is_ansistring(t) then
  2744. decrfunc:='FPC_ANSISTR_DECR_REF'
  2745. else if is_widestring(t) then
  2746. decrfunc:='FPC_WIDESTR_DECR_REF'
  2747. else if is_unicodestring(t) then
  2748. decrfunc:='FPC_UNICODESTR_DECR_REF'
  2749. else if is_dynamic_array(t) then
  2750. begin
  2751. decrfunc:='FPC_DYNARRAY_DECR_REF';
  2752. needrtti:=true;
  2753. end
  2754. else
  2755. decrfunc:='';
  2756. { call the special decr function or the generic decref }
  2757. if decrfunc<>'' then
  2758. begin
  2759. if needrtti then
  2760. begin
  2761. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2762. tempreg2:=getaddressregister(list);
  2763. a_loadaddr_ref_reg(list,href,tempreg2);
  2764. end;
  2765. tempreg1:=getaddressregister(list);
  2766. a_loadaddr_ref_reg(list,ref,tempreg1);
  2767. if needrtti then
  2768. begin
  2769. paramanager.allocparaloc(list,cgpara2);
  2770. a_param_reg(list,OS_ADDR,tempreg2,cgpara2);
  2771. paramanager.freeparaloc(list,cgpara2);
  2772. end;
  2773. paramanager.allocparaloc(list,cgpara1);
  2774. a_param_reg(list,OS_ADDR,tempreg1,cgpara1);
  2775. paramanager.freeparaloc(list,cgpara1);
  2776. allocallcpuregisters(list);
  2777. a_call_name(list,decrfunc,false);
  2778. deallocallcpuregisters(list);
  2779. end
  2780. else
  2781. begin
  2782. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2783. paramanager.allocparaloc(list,cgpara2);
  2784. a_paramaddr_ref(list,href,cgpara2);
  2785. paramanager.allocparaloc(list,cgpara1);
  2786. a_paramaddr_ref(list,ref,cgpara1);
  2787. paramanager.freeparaloc(list,cgpara1);
  2788. paramanager.freeparaloc(list,cgpara2);
  2789. allocallcpuregisters(list);
  2790. a_call_name(list,'FPC_DECREF',false);
  2791. deallocallcpuregisters(list);
  2792. end;
  2793. cgpara2.done;
  2794. cgpara1.done;
  2795. end;
  2796. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  2797. var
  2798. href : treference;
  2799. cgpara1,cgpara2 : TCGPara;
  2800. begin
  2801. cgpara1.init;
  2802. cgpara2.init;
  2803. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2804. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2805. if is_ansistring(t) or
  2806. is_widestring(t) or
  2807. is_unicodestring(t) or
  2808. is_interfacecom(t) or
  2809. is_dynamic_array(t) then
  2810. a_load_const_ref(list,OS_ADDR,0,ref)
  2811. else
  2812. begin
  2813. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2814. paramanager.allocparaloc(list,cgpara2);
  2815. a_paramaddr_ref(list,href,cgpara2);
  2816. paramanager.allocparaloc(list,cgpara1);
  2817. a_paramaddr_ref(list,ref,cgpara1);
  2818. paramanager.freeparaloc(list,cgpara1);
  2819. paramanager.freeparaloc(list,cgpara2);
  2820. allocallcpuregisters(list);
  2821. a_call_name(list,'FPC_INITIALIZE',false);
  2822. deallocallcpuregisters(list);
  2823. end;
  2824. cgpara1.done;
  2825. cgpara2.done;
  2826. end;
  2827. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  2828. var
  2829. href : treference;
  2830. cgpara1,cgpara2 : TCGPara;
  2831. begin
  2832. cgpara1.init;
  2833. cgpara2.init;
  2834. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2835. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2836. if is_ansistring(t) or
  2837. is_widestring(t) or
  2838. is_unicodestring(t) or
  2839. is_interfacecom(t) then
  2840. begin
  2841. g_decrrefcount(list,t,ref);
  2842. a_load_const_ref(list,OS_ADDR,0,ref);
  2843. end
  2844. else
  2845. begin
  2846. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2847. paramanager.allocparaloc(list,cgpara2);
  2848. a_paramaddr_ref(list,href,cgpara2);
  2849. paramanager.allocparaloc(list,cgpara1);
  2850. a_paramaddr_ref(list,ref,cgpara1);
  2851. paramanager.freeparaloc(list,cgpara1);
  2852. paramanager.freeparaloc(list,cgpara2);
  2853. allocallcpuregisters(list);
  2854. a_call_name(list,'FPC_FINALIZE',false);
  2855. deallocallcpuregisters(list);
  2856. end;
  2857. cgpara1.done;
  2858. cgpara2.done;
  2859. end;
  2860. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  2861. { generate range checking code for the value at location p. The type }
  2862. { type used is checked against todefs ranges. fromdef (p.resultdef) }
  2863. { is the original type used at that location. When both defs are equal }
  2864. { the check is also insert (needed for succ,pref,inc,dec) }
  2865. const
  2866. aintmax=high(aint);
  2867. var
  2868. neglabel : tasmlabel;
  2869. hreg : tregister;
  2870. lto,hto,
  2871. lfrom,hfrom : TConstExprInt;
  2872. fromsize, tosize: cardinal;
  2873. from_signed, to_signed: boolean;
  2874. begin
  2875. { range checking on and range checkable value? }
  2876. if not(cs_check_range in current_settings.localswitches) or
  2877. not(fromdef.typ in [orddef,enumdef]) or
  2878. { C-style booleans can't really fail range checks, }
  2879. { all values are always valid }
  2880. is_cbool(todef) then
  2881. exit;
  2882. {$ifndef cpu64bitalu}
  2883. { handle 64bit rangechecks separate for 32bit processors }
  2884. if is_64bit(fromdef) or is_64bit(todef) then
  2885. begin
  2886. cg64.g_rangecheck64(list,l,fromdef,todef);
  2887. exit;
  2888. end;
  2889. {$endif cpu64bitalu}
  2890. { only check when assigning to scalar, subranges are different, }
  2891. { when todef=fromdef then the check is always generated }
  2892. getrange(fromdef,lfrom,hfrom);
  2893. getrange(todef,lto,hto);
  2894. from_signed := is_signed(fromdef);
  2895. to_signed := is_signed(todef);
  2896. { check the rangedef of the array, not the array itself }
  2897. { (only change now, since getrange needs the arraydef) }
  2898. if (todef.typ = arraydef) then
  2899. todef := tarraydef(todef).rangedef;
  2900. { no range check if from and to are equal and are both longint/dword }
  2901. { (if we have a 32bit processor) or int64/qword, since such }
  2902. { operations can at most cause overflows (JM) }
  2903. { Note that these checks are mostly processor independent, they only }
  2904. { have to be changed once we introduce 64bit subrange types }
  2905. {$ifdef cpu64bitalu}
  2906. if (fromdef = todef) and
  2907. (fromdef.typ=orddef) and
  2908. (((((torddef(fromdef).ordtype = s64bit) and
  2909. (lfrom = low(int64)) and
  2910. (hfrom = high(int64))) or
  2911. ((torddef(fromdef).ordtype = u64bit) and
  2912. (lfrom = low(qword)) and
  2913. (hfrom = high(qword))) or
  2914. ((torddef(fromdef).ordtype = scurrency) and
  2915. (lfrom = low(int64)) and
  2916. (hfrom = high(int64)))))) then
  2917. exit;
  2918. {$else cpu64bitalu}
  2919. if (fromdef = todef) and
  2920. (fromdef.typ=orddef) and
  2921. (((((torddef(fromdef).ordtype = s32bit) and
  2922. (lfrom = int64(low(longint))) and
  2923. (hfrom = int64(high(longint)))) or
  2924. ((torddef(fromdef).ordtype = u32bit) and
  2925. (lfrom = low(cardinal)) and
  2926. (hfrom = high(cardinal)))))) then
  2927. exit;
  2928. {$endif cpu64bitalu}
  2929. { optimize some range checks away in safe cases }
  2930. fromsize := fromdef.size;
  2931. tosize := todef.size;
  2932. if ((from_signed = to_signed) or
  2933. (not from_signed)) and
  2934. (lto<=lfrom) and (hto>=hfrom) and
  2935. (fromsize <= tosize) then
  2936. begin
  2937. { if fromsize < tosize, and both have the same signed-ness or }
  2938. { fromdef is unsigned, then all bit patterns from fromdef are }
  2939. { valid for todef as well }
  2940. if (fromsize < tosize) then
  2941. exit;
  2942. if (fromsize = tosize) and
  2943. (from_signed = to_signed) then
  2944. { only optimize away if all bit patterns which fit in fromsize }
  2945. { are valid for the todef }
  2946. begin
  2947. {$ifopt Q+}
  2948. {$define overflowon}
  2949. {$Q-}
  2950. {$endif}
  2951. if to_signed then
  2952. begin
  2953. { calculation of the low/high ranges must not overflow 64 bit
  2954. otherwise we end up comparing with zero for 64 bit data types on
  2955. 64 bit processors }
  2956. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  2957. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  2958. exit
  2959. end
  2960. else
  2961. begin
  2962. { calculation of the low/high ranges must not overflow 64 bit
  2963. otherwise we end up having all zeros for 64 bit data types on
  2964. 64 bit processors }
  2965. if (lto = 0) and
  2966. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  2967. exit
  2968. end;
  2969. {$ifdef overflowon}
  2970. {$Q+}
  2971. {$undef overflowon}
  2972. {$endif}
  2973. end
  2974. end;
  2975. { generate the rangecheck code for the def where we are going to }
  2976. { store the result }
  2977. { use the trick that }
  2978. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  2979. { To be able to do that, we have to make sure however that either }
  2980. { fromdef and todef are both signed or unsigned, or that we leave }
  2981. { the parts < 0 and > maxlongint out }
  2982. if from_signed xor to_signed then
  2983. begin
  2984. if from_signed then
  2985. { from is signed, to is unsigned }
  2986. begin
  2987. { if high(from) < 0 -> always range error }
  2988. if (hfrom < 0) or
  2989. { if low(to) > maxlongint also range error }
  2990. (lto > aintmax) then
  2991. begin
  2992. a_call_name(list,'FPC_RANGEERROR',false);
  2993. exit
  2994. end;
  2995. { from is signed and to is unsigned -> when looking at to }
  2996. { as an signed value, it must be < maxaint (otherwise }
  2997. { it will become negative, which is invalid since "to" is unsigned) }
  2998. if hto > aintmax then
  2999. hto := aintmax;
  3000. end
  3001. else
  3002. { from is unsigned, to is signed }
  3003. begin
  3004. if (lfrom > aintmax) or
  3005. (hto < 0) then
  3006. begin
  3007. a_call_name(list,'FPC_RANGEERROR',false);
  3008. exit
  3009. end;
  3010. { from is unsigned and to is signed -> when looking at to }
  3011. { as an unsigned value, it must be >= 0 (since negative }
  3012. { values are the same as values > maxlongint) }
  3013. if lto < 0 then
  3014. lto := 0;
  3015. end;
  3016. end;
  3017. hreg:=getintregister(list,OS_INT);
  3018. a_load_loc_reg(list,OS_INT,l,hreg);
  3019. a_op_const_reg(list,OP_SUB,OS_INT,aint(int64(lto)),hreg);
  3020. current_asmdata.getjumplabel(neglabel);
  3021. {
  3022. if from_signed then
  3023. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  3024. else
  3025. }
  3026. {$ifdef cpu64bitalu}
  3027. if qword(hto-lto)>qword(aintmax) then
  3028. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  3029. else
  3030. {$endif cpu64bitalu}
  3031. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(int64(hto-lto)),hreg,neglabel);
  3032. a_call_name(list,'FPC_RANGEERROR',false);
  3033. a_label(list,neglabel);
  3034. end;
  3035. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  3036. begin
  3037. g_overflowCheck(list,loc,def);
  3038. end;
  3039. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  3040. var
  3041. tmpreg : tregister;
  3042. begin
  3043. tmpreg:=getintregister(list,size);
  3044. g_flags2reg(list,size,f,tmpreg);
  3045. a_load_reg_ref(list,size,size,tmpreg,ref);
  3046. end;
  3047. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  3048. var
  3049. OKLabel : tasmlabel;
  3050. cgpara1 : TCGPara;
  3051. begin
  3052. if (cs_check_object in current_settings.localswitches) or
  3053. (cs_check_range in current_settings.localswitches) then
  3054. begin
  3055. current_asmdata.getjumplabel(oklabel);
  3056. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  3057. cgpara1.init;
  3058. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3059. paramanager.allocparaloc(list,cgpara1);
  3060. a_param_const(list,OS_INT,210,cgpara1);
  3061. paramanager.freeparaloc(list,cgpara1);
  3062. a_call_name(list,'FPC_HANDLEERROR',false);
  3063. a_label(list,oklabel);
  3064. cgpara1.done;
  3065. end;
  3066. end;
  3067. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  3068. var
  3069. hrefvmt : treference;
  3070. cgpara1,cgpara2 : TCGPara;
  3071. begin
  3072. cgpara1.init;
  3073. cgpara2.init;
  3074. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3075. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3076. if (cs_check_object in current_settings.localswitches) then
  3077. begin
  3078. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0,sizeof(pint));
  3079. paramanager.allocparaloc(list,cgpara2);
  3080. a_paramaddr_ref(list,hrefvmt,cgpara2);
  3081. paramanager.allocparaloc(list,cgpara1);
  3082. a_param_reg(list,OS_ADDR,reg,cgpara1);
  3083. paramanager.freeparaloc(list,cgpara1);
  3084. paramanager.freeparaloc(list,cgpara2);
  3085. allocallcpuregisters(list);
  3086. a_call_name(list,'FPC_CHECK_OBJECT_EXT',false);
  3087. deallocallcpuregisters(list);
  3088. end
  3089. else
  3090. if (cs_check_range in current_settings.localswitches) then
  3091. begin
  3092. paramanager.allocparaloc(list,cgpara1);
  3093. a_param_reg(list,OS_ADDR,reg,cgpara1);
  3094. paramanager.freeparaloc(list,cgpara1);
  3095. allocallcpuregisters(list);
  3096. a_call_name(list,'FPC_CHECK_OBJECT',false);
  3097. deallocallcpuregisters(list);
  3098. end;
  3099. cgpara1.done;
  3100. cgpara2.done;
  3101. end;
  3102. {*****************************************************************************
  3103. Entry/Exit Code Functions
  3104. *****************************************************************************}
  3105. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  3106. var
  3107. sizereg,sourcereg,lenreg : tregister;
  3108. cgpara1,cgpara2,cgpara3 : TCGPara;
  3109. begin
  3110. { because some abis don't support dynamic stack allocation properly
  3111. open array value parameters are copied onto the heap
  3112. }
  3113. { calculate necessary memory }
  3114. { read/write operations on one register make the life of the register allocator hard }
  3115. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  3116. begin
  3117. lenreg:=getintregister(list,OS_INT);
  3118. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  3119. end
  3120. else
  3121. lenreg:=lenloc.register;
  3122. sizereg:=getintregister(list,OS_INT);
  3123. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  3124. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  3125. { load source }
  3126. sourcereg:=getaddressregister(list);
  3127. a_loadaddr_ref_reg(list,ref,sourcereg);
  3128. { do getmem call }
  3129. cgpara1.init;
  3130. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3131. paramanager.allocparaloc(list,cgpara1);
  3132. a_param_reg(list,OS_INT,sizereg,cgpara1);
  3133. paramanager.freeparaloc(list,cgpara1);
  3134. allocallcpuregisters(list);
  3135. a_call_name(list,'FPC_GETMEM',false);
  3136. deallocallcpuregisters(list);
  3137. cgpara1.done;
  3138. { return the new address }
  3139. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  3140. { do move call }
  3141. cgpara1.init;
  3142. cgpara2.init;
  3143. cgpara3.init;
  3144. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3145. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3146. paramanager.getintparaloc(pocall_default,3,cgpara3);
  3147. { load size }
  3148. paramanager.allocparaloc(list,cgpara3);
  3149. a_param_reg(list,OS_INT,sizereg,cgpara3);
  3150. { load destination }
  3151. paramanager.allocparaloc(list,cgpara2);
  3152. a_param_reg(list,OS_ADDR,destreg,cgpara2);
  3153. { load source }
  3154. paramanager.allocparaloc(list,cgpara1);
  3155. a_param_reg(list,OS_ADDR,sourcereg,cgpara1);
  3156. paramanager.freeparaloc(list,cgpara3);
  3157. paramanager.freeparaloc(list,cgpara2);
  3158. paramanager.freeparaloc(list,cgpara1);
  3159. allocallcpuregisters(list);
  3160. a_call_name(list,'FPC_MOVE',false);
  3161. deallocallcpuregisters(list);
  3162. cgpara3.done;
  3163. cgpara2.done;
  3164. cgpara1.done;
  3165. end;
  3166. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  3167. var
  3168. cgpara1 : TCGPara;
  3169. begin
  3170. { do move call }
  3171. cgpara1.init;
  3172. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3173. { load source }
  3174. paramanager.allocparaloc(list,cgpara1);
  3175. a_param_loc(list,l,cgpara1);
  3176. paramanager.freeparaloc(list,cgpara1);
  3177. allocallcpuregisters(list);
  3178. a_call_name(list,'FPC_FREEMEM',false);
  3179. deallocallcpuregisters(list);
  3180. cgpara1.done;
  3181. end;
  3182. procedure tcg.g_save_registers(list:TAsmList);
  3183. var
  3184. href : treference;
  3185. size : longint;
  3186. r : integer;
  3187. begin
  3188. { calculate temp. size }
  3189. size:=0;
  3190. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3191. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3192. inc(size,sizeof(aint));
  3193. { mm registers }
  3194. if uses_registers(R_MMREGISTER) then
  3195. begin
  3196. { Make sure we reserve enough space to do the alignment based on the offset
  3197. later on. We can't use the size for this, because the alignment of the start
  3198. of the temp is smaller than needed for an OS_VECTOR }
  3199. inc(size,tcgsize2size[OS_VECTOR]);
  3200. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3201. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3202. inc(size,tcgsize2size[OS_VECTOR]);
  3203. end;
  3204. if size>0 then
  3205. begin
  3206. tg.GetTemp(list,size,sizeof(aint),tt_noreuse,current_procinfo.save_regs_ref);
  3207. include(current_procinfo.flags,pi_has_saved_regs);
  3208. { Copy registers to temp }
  3209. href:=current_procinfo.save_regs_ref;
  3210. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3211. begin
  3212. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3213. begin
  3214. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  3215. inc(href.offset,sizeof(aint));
  3216. end;
  3217. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  3218. end;
  3219. if uses_registers(R_MMREGISTER) then
  3220. begin
  3221. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3222. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3223. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3224. begin
  3225. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3226. begin
  3227. a_loadmm_reg_ref(list,OS_VECTOR,OS_VECTOR,newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE),href,nil);
  3228. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3229. end;
  3230. include(rg[R_MMREGISTER].preserved_by_proc,saved_mm_registers[r]);
  3231. end;
  3232. end;
  3233. end;
  3234. end;
  3235. procedure tcg.g_restore_registers(list:TAsmList);
  3236. var
  3237. href : treference;
  3238. r : integer;
  3239. hreg : tregister;
  3240. begin
  3241. if not(pi_has_saved_regs in current_procinfo.flags) then
  3242. exit;
  3243. { Copy registers from temp }
  3244. href:=current_procinfo.save_regs_ref;
  3245. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3246. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3247. begin
  3248. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  3249. { Allocate register so the optimizer does not remove the load }
  3250. a_reg_alloc(list,hreg);
  3251. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  3252. inc(href.offset,sizeof(aint));
  3253. end;
  3254. if uses_registers(R_MMREGISTER) then
  3255. begin
  3256. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3257. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3258. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3259. begin
  3260. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3261. begin
  3262. hreg:=newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE);
  3263. { Allocate register so the optimizer does not remove the load }
  3264. a_reg_alloc(list,hreg);
  3265. a_loadmm_ref_reg(list,OS_VECTOR,OS_VECTOR,href,hreg,nil);
  3266. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3267. end;
  3268. end;
  3269. end;
  3270. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  3271. end;
  3272. procedure tcg.g_profilecode(list : TAsmList);
  3273. begin
  3274. end;
  3275. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  3276. begin
  3277. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  3278. end;
  3279. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);
  3280. begin
  3281. a_load_const_ref(list, OS_INT, a, href);
  3282. end;
  3283. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  3284. begin
  3285. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  3286. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  3287. end;
  3288. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);
  3289. var
  3290. hsym : tsym;
  3291. href : treference;
  3292. paraloc : Pcgparalocation;
  3293. begin
  3294. { calculate the parameter info for the procdef }
  3295. if not procdef.has_paraloc_info then
  3296. begin
  3297. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  3298. procdef.has_paraloc_info:=true;
  3299. end;
  3300. hsym:=tsym(procdef.parast.Find('self'));
  3301. if not(assigned(hsym) and
  3302. (hsym.typ=paravarsym)) then
  3303. internalerror(200305251);
  3304. paraloc:=tparavarsym(hsym).paraloc[callerside].location;
  3305. while paraloc<>nil do
  3306. with paraloc^ do
  3307. begin
  3308. case loc of
  3309. LOC_REGISTER:
  3310. a_op_const_reg(list,OP_SUB,size,ioffset,register);
  3311. LOC_REFERENCE:
  3312. begin
  3313. { offset in the wrapper needs to be adjusted for the stored
  3314. return address }
  3315. reference_reset_base(href,reference.index,reference.offset+sizeof(pint),sizeof(pint));
  3316. a_op_const_ref(list,OP_SUB,size,ioffset,href);
  3317. end
  3318. else
  3319. internalerror(200309189);
  3320. end;
  3321. paraloc:=next;
  3322. end;
  3323. end;
  3324. procedure tcg.g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string);
  3325. begin
  3326. a_jmp_name(list,externalname);
  3327. end;
  3328. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  3329. begin
  3330. a_call_name(list,s,false);
  3331. end;
  3332. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string; weak: boolean): tregister;
  3333. var
  3334. l: tasmsymbol;
  3335. ref: treference;
  3336. begin
  3337. result := NR_NO;
  3338. case target_info.system of
  3339. system_powerpc_darwin,
  3340. system_i386_darwin,
  3341. system_powerpc64_darwin,
  3342. system_arm_darwin:
  3343. begin
  3344. l:=current_asmdata.getasmsymbol('L'+symname+'$non_lazy_ptr');
  3345. if not(assigned(l)) then
  3346. begin
  3347. l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_LOCAL,AT_DATA);
  3348. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  3349. if not(weak) then
  3350. current_asmdata.asmlists[al_picdata].concat(tai_const.create_indirect_sym(current_asmdata.RefAsmSymbol(symname)))
  3351. else
  3352. current_asmdata.asmlists[al_picdata].concat(tai_const.create_indirect_sym(current_asmdata.WeakRefAsmSymbol(symname)));
  3353. {$ifdef cpu64bitaddr}
  3354. current_asmdata.asmlists[al_picdata].concat(tai_const.create_64bit(0));
  3355. {$else cpu64bitaddr}
  3356. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  3357. {$endif cpu64bitaddr}
  3358. end;
  3359. result := getaddressregister(list);
  3360. reference_reset_symbol(ref,l,0,sizeof(pint));
  3361. { a_load_ref_reg will turn this into a pic-load if needed }
  3362. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  3363. end;
  3364. end;
  3365. end;
  3366. procedure tcg.g_maybe_got_init(list: TAsmList);
  3367. begin
  3368. end;
  3369. procedure tcg.a_loadmm_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister; shuffle: pmmshuffle);
  3370. begin
  3371. internalerror(200807231);
  3372. end;
  3373. procedure tcg.a_loadmm_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister; shuffle: pmmshuffle);
  3374. begin
  3375. internalerror(200807232);
  3376. end;
  3377. procedure tcg.a_loadmm_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference; shuffle: pmmshuffle);
  3378. begin
  3379. internalerror(200807233);
  3380. end;
  3381. procedure tcg.a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size: tcgsize; src, dst: tregister; shuffle: pmmshuffle);
  3382. begin
  3383. internalerror(200807234);
  3384. end;
  3385. function tcg.getflagregister(list: TAsmList; size: Tcgsize): Tregister;
  3386. begin
  3387. Result:=TRegister(0);
  3388. internalerror(200807238);
  3389. end;
  3390. {*****************************************************************************
  3391. TCG64
  3392. *****************************************************************************}
  3393. {$ifndef cpu64bitalu}
  3394. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  3395. begin
  3396. a_load64_reg_reg(list,regsrc,regdst);
  3397. a_op64_const_reg(list,op,size,value,regdst);
  3398. end;
  3399. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  3400. var
  3401. tmpreg64 : tregister64;
  3402. begin
  3403. { when src1=dst then we need to first create a temp to prevent
  3404. overwriting src1 with src2 }
  3405. if (regsrc1.reghi=regdst.reghi) or
  3406. (regsrc1.reglo=regdst.reghi) or
  3407. (regsrc1.reghi=regdst.reglo) or
  3408. (regsrc1.reglo=regdst.reglo) then
  3409. begin
  3410. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3411. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3412. a_load64_reg_reg(list,regsrc2,tmpreg64);
  3413. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  3414. a_load64_reg_reg(list,tmpreg64,regdst);
  3415. end
  3416. else
  3417. begin
  3418. a_load64_reg_reg(list,regsrc2,regdst);
  3419. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  3420. end;
  3421. end;
  3422. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  3423. var
  3424. tmpreg64 : tregister64;
  3425. begin
  3426. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3427. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3428. a_load64_subsetref_reg(list,sref,tmpreg64);
  3429. a_op64_const_reg(list,op,size,a,tmpreg64);
  3430. a_load64_reg_subsetref(list,tmpreg64,sref);
  3431. end;
  3432. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  3433. var
  3434. tmpreg64 : tregister64;
  3435. begin
  3436. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3437. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3438. a_load64_subsetref_reg(list,sref,tmpreg64);
  3439. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  3440. a_load64_reg_subsetref(list,tmpreg64,sref);
  3441. end;
  3442. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  3443. var
  3444. tmpreg64 : tregister64;
  3445. begin
  3446. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3447. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3448. a_load64_subsetref_reg(list,sref,tmpreg64);
  3449. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  3450. a_load64_reg_subsetref(list,tmpreg64,sref);
  3451. end;
  3452. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  3453. var
  3454. tmpreg64 : tregister64;
  3455. begin
  3456. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3457. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3458. a_load64_subsetref_reg(list,ssref,tmpreg64);
  3459. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  3460. end;
  3461. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3462. begin
  3463. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  3464. ovloc.loc:=LOC_VOID;
  3465. end;
  3466. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3467. begin
  3468. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  3469. ovloc.loc:=LOC_VOID;
  3470. end;
  3471. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  3472. begin
  3473. case l.loc of
  3474. LOC_REFERENCE, LOC_CREFERENCE:
  3475. a_load64_ref_subsetref(list,l.reference,sref);
  3476. LOC_REGISTER,LOC_CREGISTER:
  3477. a_load64_reg_subsetref(list,l.register64,sref);
  3478. LOC_CONSTANT :
  3479. a_load64_const_subsetref(list,l.value64,sref);
  3480. LOC_SUBSETREF,LOC_CSUBSETREF:
  3481. a_load64_subsetref_subsetref(list,l.sref,sref);
  3482. else
  3483. internalerror(2006082210);
  3484. end;
  3485. end;
  3486. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  3487. begin
  3488. case l.loc of
  3489. LOC_REFERENCE, LOC_CREFERENCE:
  3490. a_load64_subsetref_ref(list,sref,l.reference);
  3491. LOC_REGISTER,LOC_CREGISTER:
  3492. a_load64_subsetref_reg(list,sref,l.register64);
  3493. LOC_SUBSETREF,LOC_CSUBSETREF:
  3494. a_load64_subsetref_subsetref(list,sref,l.sref);
  3495. else
  3496. internalerror(2006082211);
  3497. end;
  3498. end;
  3499. {$endif cpu64bitalu}
  3500. procedure destroy_codegen;
  3501. begin
  3502. cg.free;
  3503. cg:=nil;
  3504. {$ifndef cpu64bitalu}
  3505. cg64.free;
  3506. cg64:=nil;
  3507. {$endif cpu64bitalu}
  3508. end;
  3509. end.