daopt386.pas 96 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  3. development team
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. unit daopt386;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. cclasses,aasmbase,aasmtai,aasmdata,aasmcpu,cgbase,cgutils,
  25. cpubase;
  26. {******************************* Constants *******************************}
  27. const
  28. { Possible register content types }
  29. con_Unknown = 0;
  30. con_ref = 1;
  31. con_const = 2;
  32. { The contents aren't usable anymore for CSE, but they may still be }
  33. { usefull for detecting whether the result of a load is actually used }
  34. con_invalid = 3;
  35. { the reverse of the above (in case a (conditional) jump is encountered): }
  36. { CSE is still possible, but the original instruction can't be removed }
  37. con_noRemoveRef = 4;
  38. { same, but for constants }
  39. con_noRemoveConst = 5;
  40. const
  41. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  42. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  43. OS_16,OS_32,OS_64,
  44. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  45. OS_M32,
  46. OS_ADDR,OS_NO,OS_NO,
  47. OS_NO,
  48. OS_NO);
  49. {********************************* Types *********************************}
  50. type
  51. TRegEnum = RS_EAX..RS_ESP;
  52. TRegArray = Array[TRegEnum] of tsuperregister;
  53. TRegSet = Set of TRegEnum;
  54. toptreginfo = Record
  55. NewRegsEncountered, OldRegsEncountered: TRegSet;
  56. RegsLoadedForRef: TRegSet;
  57. lastReload: array[RS_EAX..RS_ESP] of tai;
  58. New2OldReg: TRegArray;
  59. end;
  60. {possible actions on an operand: read, write or modify (= read & write)}
  61. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  62. {the possible states of a flag}
  63. TFlagContents = (F_Unknown, F_notSet, F_Set);
  64. TContent = Packed Record
  65. {start and end of block instructions that defines the
  66. content of this register.}
  67. StartMod: tai;
  68. MemWrite: taicpu;
  69. {how many instructions starting with StarMod does the block consist of}
  70. NrOfMods: Word;
  71. {the type of the content of the register: unknown, memory, constant}
  72. Typ: Byte;
  73. case byte of
  74. {starts at 0, gets increased everytime the register is written to}
  75. 1: (WState: Byte;
  76. {starts at 0, gets increased everytime the register is read from}
  77. RState: Byte);
  78. { to compare both states in one operation }
  79. 2: (state: word);
  80. end;
  81. {Contents of the integer registers}
  82. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  83. {contents of the FPU registers}
  84. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  85. {$ifdef tempOpts}
  86. { linked list which allows searching/deleting based on value, no extra frills}
  87. PSearchLinkedListItem = ^TSearchLinkedListItem;
  88. TSearchLinkedListItem = object(TLinkedList_Item)
  89. constructor init;
  90. function equals(p: PSearchLinkedListItem): boolean; virtual;
  91. end;
  92. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  93. TSearchDoubleIntItem = object(TLinkedList_Item)
  94. constructor init(_int1,_int2: longint);
  95. function equals(p: PSearchLinkedListItem): boolean; virtual;
  96. private
  97. int1, int2: longint;
  98. end;
  99. PSearchLinkedList = ^TSearchLinkedList;
  100. TSearchLinkedList = object(TLinkedList)
  101. function searchByValue(p: PSearchLinkedListItem): boolean;
  102. procedure removeByValue(p: PSearchLinkedListItem);
  103. end;
  104. {$endif tempOpts}
  105. {information record with the contents of every register. Every tai object
  106. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  107. TtaiProp = Record
  108. Regs: TRegContent;
  109. { FPURegs: TRegFPUContent;} {currently not yet used}
  110. { allocated Registers }
  111. UsedRegs: TRegSet;
  112. { status of the direction flag }
  113. DirFlag: TFlagContents;
  114. {$ifdef tempOpts}
  115. { currently used temps }
  116. tempAllocs: PSearchLinkedList;
  117. {$endif tempOpts}
  118. { can this instruction be removed? }
  119. CanBeRemoved: Boolean;
  120. { are the resultflags set by this instruction used? }
  121. FlagsUsed: Boolean;
  122. end;
  123. ptaiprop = ^TtaiProp;
  124. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  125. PtaiPropBlock = ^TtaiPropBlock;
  126. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  127. TLabelTableItem = Record
  128. taiObj: tai;
  129. {$ifDef JumpAnal}
  130. InstrNr: Longint;
  131. RefsFound: Word;
  132. JmpsProcessed: Word
  133. {$endif JumpAnal}
  134. end;
  135. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  136. PLabelTable = ^TLabelTable;
  137. {*********************** procedures and functions ************************}
  138. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  139. function RefsEqual(const R1, R2: TReference): Boolean;
  140. function isgp32reg(supreg: tsuperregister): Boolean;
  141. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  142. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  143. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  144. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  145. function reginop(supreg: tsuperregister; const o:toper): boolean;
  146. function instrWritesFlags(p: tai): boolean;
  147. function instrReadsFlags(p: tai): boolean;
  148. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  149. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  150. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  151. const c: tcontent): boolean;
  152. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  153. const c: tcontent; var memwritedestroyed: boolean): boolean;
  154. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  155. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  156. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  157. procedure SkipHead(var p: tai);
  158. function labelCanBeSkipped(p: tai_label): boolean;
  159. procedure RemoveLastDeallocForFuncRes(asmL: TAsmList; p: tai);
  160. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  161. hp: tai): boolean;
  162. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  163. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; var initialusedregs: tregset);
  164. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  165. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  166. function sizescompatible(loadsize,newsize: topsize): boolean;
  167. function OpsEqual(const o1,o2:toper): Boolean;
  168. type
  169. tdfaobj = class
  170. constructor create(_list: TAsmList); virtual;
  171. function pass_1(_blockstart: tai): tai;
  172. function pass_generate_code: boolean;
  173. procedure clear;
  174. function getlabelwithsym(sym: tasmlabel): tai;
  175. private
  176. { asm list we're working on }
  177. list: TAsmList;
  178. { current part of the asm list }
  179. blockstart, blockend: tai;
  180. { the amount of taiObjects in the current part of the assembler list }
  181. nroftaiobjs: longint;
  182. { Array which holds all TtaiProps }
  183. taipropblock: ptaipropblock;
  184. { all labels in the current block: their value mapped to their location }
  185. lolab, hilab, labdif: longint;
  186. labeltable: plabeltable;
  187. { Walks through the list to find the lowest and highest label number, inits the }
  188. { labeltable and fixes/optimizes some regallocs }
  189. procedure initlabeltable;
  190. function initdfapass2: boolean;
  191. procedure dodfapass2;
  192. end;
  193. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  194. procedure incState(var S: Byte; amount: longint);
  195. {******************************* Variables *******************************}
  196. var
  197. dfa: tdfaobj;
  198. {*********************** end of Interface section ************************}
  199. Implementation
  200. Uses
  201. {$ifdef csdebug}
  202. cutils,
  203. {$else}
  204. {$ifdef statedebug}
  205. cutils,
  206. {$else}
  207. {$ifdef allocregdebug}
  208. cutils,
  209. {$endif}
  210. {$endif}
  211. {$endif}
  212. globals, systems, verbose, symconst, cgobj,procinfo;
  213. Type
  214. TRefCompare = function(const r1, r2: treference; size1, size2: tcgsize): boolean;
  215. var
  216. {How many instructions are between the current instruction and the last one
  217. that modified the register}
  218. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  219. {$ifdef tempOpts}
  220. constructor TSearchLinkedListItem.init;
  221. begin
  222. end;
  223. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  224. begin
  225. equals := false;
  226. end;
  227. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  228. begin
  229. int1 := _int1;
  230. int2 := _int2;
  231. end;
  232. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  233. begin
  234. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  235. (TSearchDoubleIntItem(p).int2 = int2);
  236. end;
  237. function TSearchLinkedList.FindByValue(p: PSearchLinkedListItem): boolean;
  238. var temp: PSearchLinkedListItem;
  239. begin
  240. temp := first;
  241. while (temp <> last.next) and
  242. not(temp.equals(p)) do
  243. temp := temp.next;
  244. searchByValue := temp <> last.next;
  245. end;
  246. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  247. begin
  248. temp := first;
  249. while (temp <> last.next) and
  250. not(temp.equals(p)) do
  251. temp := temp.next;
  252. if temp <> last.next then
  253. begin
  254. remove(temp);
  255. dispose(temp,done);
  256. end;
  257. end;
  258. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  259. {updates UsedRegs with the RegAlloc Information coming after p}
  260. begin
  261. repeat
  262. while assigned(p) and
  263. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  264. ((p.typ = ait_label) and
  265. labelCanBeSkipped(tai_label(current)))) Do
  266. p := tai(p.next);
  267. while assigned(p) and
  268. (p.typ=ait_RegAlloc) Do
  269. begin
  270. case tai_regalloc(p).ratype of
  271. ra_alloc :
  272. Include(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  273. ra_dealloc :
  274. Exclude(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  275. end;
  276. p := tai(p.next);
  277. end;
  278. until not(assigned(p)) or
  279. (not(p.typ in SkipInstr) and
  280. not((p.typ = ait_label) and
  281. labelCanBeSkipped(tai_label(current))));
  282. end;
  283. {$endif tempOpts}
  284. {************************ Create the Label table ************************}
  285. function findregalloc(supreg: tsuperregister; starttai: tai; ratyp: tregalloctype): boolean;
  286. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  287. { starting with Starttai and ending with the next "real" instruction }
  288. begin
  289. findregalloc := false;
  290. repeat
  291. while assigned(starttai) and
  292. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  293. ((starttai.typ = ait_label) and
  294. labelcanbeskipped(tai_label(starttai)))) do
  295. starttai := tai(starttai.next);
  296. if assigned(starttai) and
  297. (starttai.typ = ait_regalloc) then
  298. begin
  299. if (tai_regalloc(Starttai).ratype = ratyp) and
  300. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  301. begin
  302. findregalloc:=true;
  303. break;
  304. end;
  305. starttai := tai(starttai.next);
  306. end
  307. else
  308. break;
  309. until false;
  310. end;
  311. procedure RemoveLastDeallocForFuncRes(asml: TAsmList; p: tai);
  312. procedure DoRemoveLastDeallocForFuncRes(asml: TAsmList; supreg: tsuperregister);
  313. var
  314. hp2: tai;
  315. begin
  316. hp2 := p;
  317. repeat
  318. hp2 := tai(hp2.previous);
  319. if assigned(hp2) and
  320. (hp2.typ = ait_regalloc) and
  321. (tai_regalloc(hp2).ratype=ra_dealloc) and
  322. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  323. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  324. begin
  325. asml.remove(hp2);
  326. hp2.free;
  327. break;
  328. end;
  329. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  330. end;
  331. begin
  332. case current_procinfo.procdef.returndef.typ of
  333. arraydef,recorddef,pointerdef,
  334. stringdef,enumdef,procdef,objectdef,errordef,
  335. filedef,setdef,procvardef,
  336. classrefdef,forwarddef:
  337. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  338. orddef:
  339. if current_procinfo.procdef.returndef.size <> 0 then
  340. begin
  341. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  342. { for int64/qword }
  343. if current_procinfo.procdef.returndef.size = 8 then
  344. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  345. end;
  346. end;
  347. end;
  348. procedure getNoDeallocRegs(var regs: tregset);
  349. var
  350. regCounter: TSuperRegister;
  351. begin
  352. regs := [];
  353. case current_procinfo.procdef.returndef.typ of
  354. arraydef,recorddef,pointerdef,
  355. stringdef,enumdef,procdef,objectdef,errordef,
  356. filedef,setdef,procvardef,
  357. classrefdef,forwarddef:
  358. regs := [RS_EAX];
  359. orddef:
  360. if current_procinfo.procdef.returndef.size <> 0 then
  361. begin
  362. regs := [RS_EAX];
  363. { for int64/qword }
  364. if current_procinfo.procdef.returndef.size = 8 then
  365. regs := regs + [RS_EDX];
  366. end;
  367. end;
  368. for regCounter := RS_EAX to RS_EBX do
  369. { if not(regCounter in rg.usableregsint) then}
  370. include(regs,regcounter);
  371. end;
  372. procedure AddRegDeallocFor(asml: TAsmList; reg: tregister; p: tai);
  373. var
  374. hp1: tai;
  375. funcResRegs: tregset;
  376. { funcResReg: boolean;}
  377. begin
  378. { if not(supreg in rg.usableregsint) then
  379. exit;}
  380. { if not(supreg in [RS_EDI]) then
  381. exit;}
  382. getNoDeallocRegs(funcresregs);
  383. { funcResRegs := funcResRegs - rg.usableregsint;}
  384. { funcResRegs := funcResRegs - [RS_EDI];}
  385. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  386. { funcResReg := getsupreg(reg) in funcresregs;}
  387. hp1 := p;
  388. {
  389. while not(funcResReg and
  390. (p.typ = ait_instruction) and
  391. (taicpu(p).opcode = A_JMP) and
  392. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  393. getLastInstruction(p, p) and
  394. not(regInInstruction(supreg, p)) do
  395. hp1 := p;
  396. }
  397. { don't insert a dealloc for registers which contain the function result }
  398. { if they are followed by a jump to the exit label (for exit(...)) }
  399. { if not(funcResReg) or
  400. not((hp1.typ = ait_instruction) and
  401. (taicpu(hp1).opcode = A_JMP) and
  402. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  403. begin
  404. p := tai_regalloc.deAlloc(reg,nil);
  405. insertLLItem(AsmL, hp1.previous, hp1, p);
  406. end;
  407. end;
  408. {************************ Search the Label table ************************}
  409. function findlabel(l: tasmlabel; var hp: tai): boolean;
  410. {searches for the specified label starting from hp as long as the
  411. encountered instructions are labels, to be able to optimize constructs like
  412. jne l2 jmp l2
  413. jmp l3 and l1:
  414. l1: l2:
  415. l2:}
  416. var
  417. p: tai;
  418. begin
  419. p := hp;
  420. while assigned(p) and
  421. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  422. if (p.typ <> ait_Label) or
  423. (tai_label(p).labsym <> l) then
  424. GetNextInstruction(p, p)
  425. else
  426. begin
  427. hp := p;
  428. findlabel := true;
  429. exit
  430. end;
  431. findlabel := false;
  432. end;
  433. {************************ Some general functions ************************}
  434. function tch2reg(ch: tinschange): tsuperregister;
  435. {converts a TChange variable to a TRegister}
  436. const
  437. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  438. begin
  439. if (ch <= CH_REDI) then
  440. tch2reg := ch2reg[ch]
  441. else if (ch <= CH_WEDI) then
  442. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  443. else if (ch <= CH_RWEDI) then
  444. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  445. else if (ch <= CH_MEDI) then
  446. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  447. else
  448. InternalError($db)
  449. end;
  450. { inserts new_one between prev and foll }
  451. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  452. begin
  453. if assigned(prev) then
  454. if assigned(foll) then
  455. begin
  456. if assigned(new_one) then
  457. begin
  458. new_one.previous := prev;
  459. new_one.next := foll;
  460. prev.next := new_one;
  461. foll.previous := new_one;
  462. { shgould we update line information }
  463. if (not (tai(new_one).typ in SkipLineInfo)) and
  464. (not (tai(foll).typ in SkipLineInfo)) then
  465. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  466. end;
  467. end
  468. else
  469. asml.Concat(new_one)
  470. else
  471. if assigned(foll) then
  472. asml.Insert(new_one)
  473. end;
  474. {********************* Compare parts of tai objects *********************}
  475. function regssamesize(reg1, reg2: tregister): boolean;
  476. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  477. 8bit, 16bit or 32bit)}
  478. begin
  479. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  480. internalerror(2003111602);
  481. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  482. end;
  483. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  484. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  485. OldReg and NewReg have the same size (has to be chcked in advance with
  486. RegsSameSize) and that neither equals RS_INVALID}
  487. var
  488. newsupreg, oldsupreg: tsuperregister;
  489. begin
  490. if (newreg = NR_NO) or (oldreg = NR_NO) then
  491. internalerror(2003111601);
  492. newsupreg := getsupreg(newreg);
  493. oldsupreg := getsupreg(oldreg);
  494. with RegInfo Do
  495. begin
  496. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  497. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  498. New2OldReg[newsupreg] := oldsupreg;
  499. end;
  500. end;
  501. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  502. begin
  503. case o.typ Of
  504. top_reg:
  505. if (o.reg <> NR_NO) then
  506. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  507. top_ref:
  508. begin
  509. if o.ref^.base <> NR_NO then
  510. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  511. if o.ref^.index <> NR_NO then
  512. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  513. end;
  514. end;
  515. end;
  516. function RegsEquivalent(oldreg, newreg: tregister; const oldinst, newinst: taicpu; var reginfo: toptreginfo; opact: topaction): Boolean;
  517. begin
  518. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  519. if RegsSameSize(oldreg, newreg) then
  520. with reginfo do
  521. {here we always check for the 32 bit component, because it is possible that
  522. the 8 bit component has not been set, event though NewReg already has been
  523. processed. This happens if it has been compared with a register that doesn't
  524. have an 8 bit component (such as EDI). in that case the 8 bit component is
  525. still set to RS_NO and the comparison in the else-part will fail}
  526. if (getsupreg(oldReg) in OldRegsEncountered) then
  527. if (getsupreg(NewReg) in NewRegsEncountered) then
  528. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  529. { if we haven't encountered the new register yet, but we have encountered the
  530. old one already, the new one can only be correct if it's being written to
  531. (and consequently the old one is also being written to), otherwise
  532. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  533. movl (%eax), %eax movl (%edx), %edx
  534. are considered equivalent}
  535. else
  536. if (opact = opact_write) then
  537. begin
  538. AddReg2RegInfo(oldreg, newreg, reginfo);
  539. RegsEquivalent := true
  540. end
  541. else
  542. Regsequivalent := false
  543. else
  544. if not(getsupreg(newreg) in NewRegsEncountered) and
  545. ((opact = opact_write) or
  546. ((newreg = oldreg) and
  547. (ptaiprop(oldinst.optinfo)^.regs[getsupreg(oldreg)].wstate =
  548. ptaiprop(newinst.optinfo)^.regs[getsupreg(oldreg)].wstate) and
  549. not(regmodifiedbyinstruction(getsupreg(oldreg),oldinst)))) then
  550. begin
  551. AddReg2RegInfo(oldreg, newreg, reginfo);
  552. RegsEquivalent := true
  553. end
  554. else
  555. RegsEquivalent := false
  556. else
  557. RegsEquivalent := false
  558. else
  559. RegsEquivalent := oldreg = newreg
  560. end;
  561. function RefsEquivalent(const r1, r2: treference; const oldinst, newinst: taicpu; var regInfo: toptreginfo): boolean;
  562. begin
  563. RefsEquivalent :=
  564. (r1.offset = r2.offset) and
  565. RegsEquivalent(r1.base, r2.base, oldinst, newinst, reginfo, OpAct_Read) and
  566. RegsEquivalent(r1.index, r2.index, oldinst, newinst, reginfo, OpAct_Read) and
  567. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  568. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  569. (r1.relsymbol = r2.relsymbol);
  570. end;
  571. function refsequal(const r1, r2: treference): boolean;
  572. begin
  573. refsequal :=
  574. (r1.offset = r2.offset) and
  575. (r1.segment = r2.segment) and (r1.base = r2.base) and
  576. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  577. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  578. (r1.relsymbol = r2.relsymbol);
  579. end;
  580. {$ifdef q+}
  581. {$q-}
  582. {$define overflowon}
  583. {$endif q+}
  584. // checks whether a write to r2 of size "size" contains address r1
  585. function refsoverlapping(const r1, r2: treference; size1, size2: tcgsize): boolean;
  586. var
  587. realsize1, realsize2: aint;
  588. begin
  589. realsize1 := tcgsize2size[size1];
  590. realsize2 := tcgsize2size[size2];
  591. refsoverlapping :=
  592. (r2.offset <= r1.offset+realsize1) and
  593. (r1.offset <= r2.offset+realsize2) and
  594. (r1.segment = r2.segment) and (r1.base = r2.base) and
  595. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  596. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  597. (r1.relsymbol = r2.relsymbol);
  598. end;
  599. {$ifdef overflowon}
  600. {$q+}
  601. {$undef overflowon}
  602. {$endif overflowon}
  603. function isgp32reg(supreg: tsuperregister): boolean;
  604. {Checks if the register is a 32 bit general purpose register}
  605. begin
  606. isgp32reg := false;
  607. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  608. isgp32reg := true
  609. end;
  610. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  611. begin {checks whether ref contains a reference to reg}
  612. reginref :=
  613. ((ref.base <> NR_NO) and
  614. (getsupreg(ref.base) = supreg)) or
  615. ((ref.index <> NR_NO) and
  616. (getsupreg(ref.index) = supreg))
  617. end;
  618. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  619. var
  620. p: taicpu;
  621. opcount: longint;
  622. begin
  623. RegReadByInstruction := false;
  624. if hp.typ <> ait_instruction then
  625. exit;
  626. p := taicpu(hp);
  627. case p.opcode of
  628. A_CALL:
  629. regreadbyinstruction := true;
  630. A_IMUL:
  631. case p.ops of
  632. 1:
  633. regReadByInstruction :=
  634. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  635. 2,3:
  636. regReadByInstruction :=
  637. reginop(supreg,p.oper[0]^) or
  638. reginop(supreg,p.oper[1]^);
  639. end;
  640. A_IDIV,A_DIV,A_MUL:
  641. begin
  642. regReadByInstruction :=
  643. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  644. end;
  645. else
  646. begin
  647. for opcount := 0 to p.ops-1 do
  648. if (p.oper[opCount]^.typ = top_ref) and
  649. reginref(supreg,p.oper[opcount]^.ref^) then
  650. begin
  651. RegReadByInstruction := true;
  652. exit
  653. end;
  654. for opcount := 1 to maxinschanges do
  655. case insprop[p.opcode].ch[opcount] of
  656. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  657. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  658. begin
  659. RegReadByInstruction := true;
  660. exit
  661. end;
  662. CH_RWOP1,CH_ROP1,CH_MOP1:
  663. if //(p.oper[0]^.typ = top_reg) and
  664. reginop(supreg,p.oper[0]^) then
  665. begin
  666. RegReadByInstruction := true;
  667. exit
  668. end;
  669. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  670. if //(p.oper[1]^.typ = top_reg) and
  671. reginop(supreg,p.oper[1]^) then
  672. begin
  673. RegReadByInstruction := true;
  674. exit
  675. end;
  676. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  677. if //(p.oper[2]^.typ = top_reg) and
  678. reginop(supreg,p.oper[2]^) then
  679. begin
  680. RegReadByInstruction := true;
  681. exit
  682. end;
  683. end;
  684. end;
  685. end;
  686. end;
  687. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  688. { Checks if reg is used by the instruction p1 }
  689. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  690. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  691. var
  692. p: taicpu;
  693. opcount: longint;
  694. begin
  695. regInInstruction := false;
  696. if p1.typ <> ait_instruction then
  697. exit;
  698. p := taicpu(p1);
  699. case p.opcode of
  700. A_CALL:
  701. regininstruction := true;
  702. A_IMUL:
  703. case p.ops of
  704. 1:
  705. regInInstruction :=
  706. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  707. 2,3:
  708. regInInstruction :=
  709. reginop(supreg,p.oper[0]^) or
  710. reginop(supreg,p.oper[1]^) or
  711. (assigned(p.oper[2]) and
  712. reginop(supreg,p.oper[2]^));
  713. end;
  714. A_IDIV,A_DIV,A_MUL:
  715. regInInstruction :=
  716. reginop(supreg,p.oper[0]^) or
  717. (supreg in [RS_EAX,RS_EDX])
  718. else
  719. begin
  720. for opcount := 0 to p.ops-1 do
  721. if (p.oper[opCount]^.typ = top_ref) and
  722. reginref(supreg,p.oper[opcount]^.ref^) then
  723. begin
  724. regInInstruction := true;
  725. exit
  726. end;
  727. for opcount := 1 to maxinschanges do
  728. case insprop[p.opcode].Ch[opCount] of
  729. CH_REAX..CH_MEDI:
  730. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  731. begin
  732. regInInstruction := true;
  733. exit;
  734. end;
  735. CH_ROp1..CH_MOp1:
  736. if reginop(supreg,p.oper[0]^) then
  737. begin
  738. regInInstruction := true;
  739. exit
  740. end;
  741. Ch_ROp2..Ch_MOp2:
  742. if reginop(supreg,p.oper[1]^) then
  743. begin
  744. regInInstruction := true;
  745. exit
  746. end;
  747. Ch_ROp3..Ch_MOp3:
  748. if reginop(supreg,p.oper[2]^) then
  749. begin
  750. regInInstruction := true;
  751. exit
  752. end;
  753. end;
  754. end;
  755. end;
  756. end;
  757. function reginop(supreg: tsuperregister; const o:toper): boolean;
  758. begin
  759. reginop := false;
  760. case o.typ Of
  761. top_reg:
  762. reginop :=
  763. (getregtype(o.reg) = R_INTREGISTER) and
  764. (supreg = getsupreg(o.reg));
  765. top_ref:
  766. reginop :=
  767. ((o.ref^.base <> NR_NO) and
  768. (supreg = getsupreg(o.ref^.base))) or
  769. ((o.ref^.index <> NR_NO) and
  770. (supreg = getsupreg(o.ref^.index)));
  771. end;
  772. end;
  773. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  774. var
  775. InstrProp: TInsProp;
  776. TmpResult: Boolean;
  777. Cnt: Word;
  778. begin
  779. TmpResult := False;
  780. if supreg = RS_INVALID then
  781. exit;
  782. if (p1.typ = ait_instruction) then
  783. case taicpu(p1).opcode of
  784. A_IMUL:
  785. With taicpu(p1) Do
  786. TmpResult :=
  787. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  788. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  789. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  790. A_DIV, A_IDIV, A_MUL:
  791. With taicpu(p1) Do
  792. TmpResult :=
  793. (supreg in [RS_EAX,RS_EDX]);
  794. else
  795. begin
  796. Cnt := 1;
  797. InstrProp := InsProp[taicpu(p1).OpCode];
  798. while (Cnt <= maxinschanges) and
  799. (InstrProp.Ch[Cnt] <> Ch_None) and
  800. not(TmpResult) Do
  801. begin
  802. case InstrProp.Ch[Cnt] Of
  803. Ch_WEAX..Ch_MEDI:
  804. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  805. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  806. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  807. reginop(supreg,taicpu(p1).oper[0]^);
  808. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  809. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  810. reginop(supreg,taicpu(p1).oper[1]^);
  811. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  812. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  813. reginop(supreg,taicpu(p1).oper[2]^);
  814. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  815. Ch_ALL: TmpResult := true;
  816. end;
  817. inc(Cnt)
  818. end
  819. end
  820. end;
  821. RegModifiedByInstruction := TmpResult
  822. end;
  823. function instrWritesFlags(p: tai): boolean;
  824. var
  825. l: longint;
  826. begin
  827. instrWritesFlags := true;
  828. case p.typ of
  829. ait_instruction:
  830. begin
  831. for l := 1 to maxinschanges do
  832. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  833. exit;
  834. end;
  835. ait_label:
  836. exit;
  837. end;
  838. instrWritesFlags := false;
  839. end;
  840. function instrReadsFlags(p: tai): boolean;
  841. var
  842. l: longint;
  843. begin
  844. instrReadsFlags := true;
  845. case p.typ of
  846. ait_instruction:
  847. begin
  848. for l := 1 to maxinschanges do
  849. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  850. exit;
  851. end;
  852. ait_label:
  853. exit;
  854. end;
  855. instrReadsFlags := false;
  856. end;
  857. {********************* GetNext and GetLastInstruction *********************}
  858. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  859. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  860. { next tai object in Next. Returns false if there isn't any }
  861. begin
  862. repeat
  863. if (Current.typ = ait_marker) and
  864. (tai_Marker(current).Kind = mark_AsmBlockStart) then
  865. begin
  866. GetNextInstruction := False;
  867. Next := Nil;
  868. Exit
  869. end;
  870. Current := tai(current.Next);
  871. while assigned(Current) and
  872. ((current.typ in skipInstr) or
  873. ((current.typ = ait_label) and
  874. labelCanBeSkipped(tai_label(current)))) do
  875. Current := tai(current.Next);
  876. { if assigned(Current) and
  877. (current.typ = ait_Marker) and
  878. (tai_Marker(current).Kind = mark_NoPropInfoStart) then
  879. begin
  880. while assigned(Current) and
  881. ((current.typ <> ait_Marker) or
  882. (tai_Marker(current).Kind <> mark_NoPropInfoEnd)) Do
  883. Current := tai(current.Next);
  884. end;}
  885. until not(assigned(Current)) or
  886. (current.typ <> ait_Marker) or
  887. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  888. Next := Current;
  889. if assigned(Current) and
  890. not((current.typ in SkipInstr) or
  891. ((current.typ = ait_label) and
  892. labelCanBeSkipped(tai_label(current))))
  893. then
  894. GetNextInstruction :=
  895. not((current.typ = ait_marker) and
  896. (tai_marker(current).kind = mark_AsmBlockStart))
  897. else
  898. begin
  899. GetNextInstruction := False;
  900. Next := nil;
  901. end;
  902. end;
  903. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  904. {skips the ait-types in SkipInstr puts the previous tai object in
  905. Last. Returns false if there isn't any}
  906. begin
  907. repeat
  908. Current := tai(current.previous);
  909. while assigned(Current) and
  910. (((current.typ = ait_Marker) and
  911. not(tai_Marker(current).Kind in [mark_AsmBlockEnd{,mark_NoPropInfoEnd}])) or
  912. (current.typ in SkipInstr) or
  913. ((current.typ = ait_label) and
  914. labelCanBeSkipped(tai_label(current)))) Do
  915. Current := tai(current.previous);
  916. { if assigned(Current) and
  917. (current.typ = ait_Marker) and
  918. (tai_Marker(current).Kind = mark_NoPropInfoEnd) then
  919. begin
  920. while assigned(Current) and
  921. ((current.typ <> ait_Marker) or
  922. (tai_Marker(current).Kind <> mark_NoPropInfoStart)) Do
  923. Current := tai(current.previous);
  924. end;}
  925. until not(assigned(Current)) or
  926. (current.typ <> ait_Marker) or
  927. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  928. if not(assigned(Current)) or
  929. (current.typ in SkipInstr) or
  930. ((current.typ = ait_label) and
  931. labelCanBeSkipped(tai_label(current))) or
  932. ((current.typ = ait_Marker) and
  933. (tai_Marker(current).Kind = mark_AsmBlockEnd))
  934. then
  935. begin
  936. Last := nil;
  937. GetLastInstruction := False
  938. end
  939. else
  940. begin
  941. Last := Current;
  942. GetLastInstruction := True;
  943. end;
  944. end;
  945. procedure SkipHead(var p: tai);
  946. var
  947. oldp: tai;
  948. begin
  949. repeat
  950. oldp := p;
  951. if (p.typ in SkipInstr) or
  952. ((p.typ = ait_marker) and
  953. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_InlineStart,mark_InlineEnd])) then
  954. GetNextInstruction(p,p)
  955. else if ((p.Typ = Ait_Marker) and
  956. (tai_Marker(p).Kind = mark_NoPropInfoStart)) then
  957. {a marker of the mark_NoPropInfoStart can't be the first instruction of a
  958. TAsmList list}
  959. GetNextInstruction(tai(p.previous),p);
  960. until p = oldp
  961. end;
  962. function labelCanBeSkipped(p: tai_label): boolean;
  963. begin
  964. labelCanBeSkipped := not(p.labsym.is_used) or (p.labsym.labeltype<>alt_jump);
  965. end;
  966. {******************* The Data Flow Analyzer functions ********************}
  967. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  968. hp: tai): boolean;
  969. { assumes reg is a 32bit register }
  970. var
  971. p: taicpu;
  972. begin
  973. if not assigned(hp) or
  974. (hp.typ <> ait_instruction) then
  975. begin
  976. regLoadedWithNewValue := false;
  977. exit;
  978. end;
  979. p := taicpu(hp);
  980. regLoadedWithNewValue :=
  981. (((p.opcode = A_MOV) or
  982. (p.opcode = A_MOVZX) or
  983. (p.opcode = A_MOVSX) or
  984. (p.opcode = A_LEA)) and
  985. (p.oper[1]^.typ = top_reg) and
  986. (getsupreg(p.oper[1]^.reg) = supreg) and
  987. (canDependOnPrevValue or
  988. (p.oper[0]^.typ = top_const) or
  989. ((p.oper[0]^.typ = top_reg) and
  990. (getsupreg(p.oper[0]^.reg) <> supreg)) or
  991. ((p.oper[0]^.typ = top_ref) and
  992. not regInRef(supreg,p.oper[0]^.ref^)))) or
  993. ((p.opcode = A_POP) and
  994. (getsupreg(p.oper[0]^.reg) = supreg));
  995. end;
  996. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  997. {updates UsedRegs with the RegAlloc Information coming after p}
  998. begin
  999. repeat
  1000. while assigned(p) and
  1001. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  1002. ((p.typ = ait_label) and
  1003. labelCanBeSkipped(tai_label(p))) or
  1004. ((p.typ = ait_marker) and
  1005. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_InlineStart,mark_InlineEnd]))) do
  1006. p := tai(p.next);
  1007. while assigned(p) and
  1008. (p.typ=ait_RegAlloc) Do
  1009. begin
  1010. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1011. begin
  1012. case tai_regalloc(p).ratype of
  1013. ra_alloc :
  1014. Include(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  1015. ra_dealloc :
  1016. Exclude(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  1017. end;
  1018. end;
  1019. p := tai(p.next);
  1020. end;
  1021. until not(assigned(p)) or
  1022. (not(p.typ in SkipInstr) and
  1023. not((p.typ = ait_label) and
  1024. labelCanBeSkipped(tai_label(p))));
  1025. end;
  1026. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; var initialusedregs: tregset);
  1027. { allocates register reg between (and including) instructions p1 and p2 }
  1028. { the type of p1 and p2 must not be in SkipInstr }
  1029. { note that this routine is both called from the peephole optimizer }
  1030. { where optinfo is not yet initialised) and from the cse (where it is) }
  1031. var
  1032. hp, start: tai;
  1033. removedsomething,
  1034. firstRemovedWasAlloc,
  1035. lastRemovedWasDealloc: boolean;
  1036. supreg: tsuperregister;
  1037. begin
  1038. {$ifdef EXTDEBUG}
  1039. if assigned(p1.optinfo) and
  1040. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1041. internalerror(2004101010);
  1042. {$endif EXTDEBUG}
  1043. start := p1;
  1044. if (reg = NR_ESP) or
  1045. (reg = current_procinfo.framepointer) or
  1046. not(assigned(p1)) then
  1047. { this happens with registers which are loaded implicitely, outside the }
  1048. { current block (e.g. esi with self) }
  1049. exit;
  1050. supreg := getsupreg(reg);
  1051. { make sure we allocate it for this instruction }
  1052. getnextinstruction(p2,p2);
  1053. lastRemovedWasDealloc := false;
  1054. removedSomething := false;
  1055. firstRemovedWasAlloc := false;
  1056. {$ifdef allocregdebug}
  1057. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1058. ' from here...'));
  1059. insertllitem(asml,p1.previous,p1,hp);
  1060. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1061. ' till here...'));
  1062. insertllitem(asml,p2,p2.next,hp);
  1063. {$endif allocregdebug}
  1064. if not(supreg in initialusedregs) then
  1065. begin
  1066. hp := tai_regalloc.alloc(reg,nil);
  1067. insertllItem(asmL,p1.previous,p1,hp);
  1068. include(initialusedregs,supreg);
  1069. end;
  1070. while assigned(p1) and
  1071. (p1 <> p2) do
  1072. begin
  1073. if assigned(p1.optinfo) then
  1074. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1075. p1 := tai(p1.next);
  1076. repeat
  1077. while assigned(p1) and
  1078. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1079. p1 := tai(p1.next);
  1080. { remove all allocation/deallocation info about the register in between }
  1081. if assigned(p1) and
  1082. (p1.typ = ait_regalloc) then
  1083. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1084. begin
  1085. if not removedSomething then
  1086. begin
  1087. firstRemovedWasAlloc := tai_regalloc(p1).ratype=ra_alloc;
  1088. removedSomething := true;
  1089. end;
  1090. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1091. hp := tai(p1.Next);
  1092. asml.Remove(p1);
  1093. p1.free;
  1094. p1 := hp;
  1095. end
  1096. else p1 := tai(p1.next);
  1097. until not(assigned(p1)) or
  1098. not(p1.typ in SkipInstr);
  1099. end;
  1100. if assigned(p1) then
  1101. begin
  1102. if firstRemovedWasAlloc then
  1103. begin
  1104. hp := tai_regalloc.Alloc(reg,nil);
  1105. insertLLItem(asmL,start.previous,start,hp);
  1106. end;
  1107. if lastRemovedWasDealloc then
  1108. begin
  1109. hp := tai_regalloc.DeAlloc(reg,nil);
  1110. insertLLItem(asmL,p1.previous,p1,hp);
  1111. end;
  1112. end;
  1113. end;
  1114. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1115. var
  1116. hp: tai;
  1117. first: boolean;
  1118. begin
  1119. findregdealloc := false;
  1120. first := true;
  1121. while assigned(p.previous) and
  1122. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1123. ((tai(p.previous).typ = ait_label) and
  1124. labelCanBeSkipped(tai_label(p.previous)))) do
  1125. begin
  1126. p := tai(p.previous);
  1127. if (p.typ = ait_regalloc) and
  1128. (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) and
  1129. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1130. if (tai_regalloc(p).ratype=ra_dealloc) then
  1131. if first then
  1132. begin
  1133. findregdealloc := true;
  1134. break;
  1135. end
  1136. else
  1137. begin
  1138. findRegDealloc :=
  1139. getNextInstruction(p,hp) and
  1140. regLoadedWithNewValue(supreg,false,hp);
  1141. break
  1142. end
  1143. else
  1144. first := false;
  1145. end
  1146. end;
  1147. procedure incState(var S: Byte; amount: longint);
  1148. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1149. errors}
  1150. begin
  1151. if (s <= $ff - amount) then
  1152. inc(s, amount)
  1153. else s := longint(s) + amount - $ff;
  1154. end;
  1155. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1156. { Content is the sequence of instructions that describes the contents of }
  1157. { seqReg. reg is being overwritten by the current instruction. if the }
  1158. { content of seqReg depends on reg (ie. because of a }
  1159. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1160. var
  1161. p: tai;
  1162. Counter: Word;
  1163. TmpResult: Boolean;
  1164. RegsChecked: TRegSet;
  1165. begin
  1166. RegsChecked := [];
  1167. p := Content.StartMod;
  1168. TmpResult := False;
  1169. Counter := 1;
  1170. while not(TmpResult) and
  1171. (Counter <= Content.NrOfMods) Do
  1172. begin
  1173. if (p.typ = ait_instruction) and
  1174. ((taicpu(p).opcode = A_MOV) or
  1175. (taicpu(p).opcode = A_MOVZX) or
  1176. (taicpu(p).opcode = A_MOVSX) or
  1177. (taicpu(p).opcode = A_LEA)) and
  1178. (taicpu(p).oper[0]^.typ = top_ref) then
  1179. With taicpu(p).oper[0]^.ref^ Do
  1180. if ((base = current_procinfo.FramePointer) or
  1181. (assigned(symbol) and (base = NR_NO))) and
  1182. (index = NR_NO) then
  1183. begin
  1184. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1185. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1186. break;
  1187. end
  1188. else
  1189. tmpResult :=
  1190. regReadByInstruction(supreg,p) and
  1191. regModifiedByInstruction(seqReg,p)
  1192. else
  1193. tmpResult :=
  1194. regReadByInstruction(supreg,p) and
  1195. regModifiedByInstruction(seqReg,p);
  1196. inc(Counter);
  1197. GetNextInstruction(p,p)
  1198. end;
  1199. sequenceDependsonReg := TmpResult
  1200. end;
  1201. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1202. var
  1203. counter: tsuperregister;
  1204. begin
  1205. for counter := RS_EAX to RS_EDI do
  1206. if counter <> supreg then
  1207. with p1^.regs[counter] Do
  1208. begin
  1209. if (typ in [con_ref,con_noRemoveRef]) and
  1210. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1211. if typ in [con_ref, con_invalid] then
  1212. typ := con_invalid
  1213. { con_noRemoveRef = con_unknown }
  1214. else
  1215. typ := con_unknown;
  1216. if assigned(memwrite) and
  1217. regInRef(counter,memwrite.oper[1]^.ref^) then
  1218. memwrite := nil;
  1219. end;
  1220. end;
  1221. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1222. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1223. contents of registers are loaded with a memory location based on reg.
  1224. doincState is false when this register has to be destroyed not because
  1225. it's contents are directly modified/overwritten, but because of an indirect
  1226. action (e.g. this register holds the contents of a variable and the value
  1227. of the variable in memory is changed) }
  1228. begin
  1229. { the following happens for fpu registers }
  1230. if (supreg < low(NrOfInstrSinceLastMod)) or
  1231. (supreg > high(NrOfInstrSinceLastMod)) then
  1232. exit;
  1233. NrOfInstrSinceLastMod[supreg] := 0;
  1234. with p1^.regs[supreg] do
  1235. begin
  1236. if doincState then
  1237. begin
  1238. incState(wstate,1);
  1239. typ := con_unknown;
  1240. startmod := nil;
  1241. end
  1242. else
  1243. if typ in [con_ref,con_const,con_invalid] then
  1244. typ := con_invalid
  1245. { con_noRemoveRef = con_unknown }
  1246. else
  1247. typ := con_unknown;
  1248. memwrite := nil;
  1249. end;
  1250. invalidateDependingRegs(p1,supreg);
  1251. end;
  1252. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1253. begin
  1254. if (p.typ = ait_instruction) then
  1255. begin
  1256. case taicpu(p).oper[0]^.typ Of
  1257. top_reg:
  1258. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1259. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1260. top_ref:
  1261. With TReference(taicpu(p).oper[0]^) Do
  1262. begin
  1263. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1264. then RegSet := RegSet + [base];
  1265. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1266. then RegSet := RegSet + [index];
  1267. end;
  1268. end;
  1269. case taicpu(p).oper[1]^.typ Of
  1270. top_reg:
  1271. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1272. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1273. top_ref:
  1274. With TReference(taicpu(p).oper[1]^) Do
  1275. begin
  1276. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1277. then RegSet := RegSet + [base];
  1278. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1279. then RegSet := RegSet + [index];
  1280. end;
  1281. end;
  1282. end;
  1283. end;}
  1284. function OpsEquivalent(const o1, o2: toper; const oldinst, newinst: taicpu; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1285. begin {checks whether the two ops are equivalent}
  1286. OpsEquivalent := False;
  1287. if o1.typ=o2.typ then
  1288. case o1.typ Of
  1289. top_reg:
  1290. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, oldinst, newinst, RegInfo, OpAct);
  1291. top_ref:
  1292. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, oldinst, newinst, RegInfo);
  1293. Top_Const:
  1294. OpsEquivalent := o1.val = o2.val;
  1295. Top_None:
  1296. OpsEquivalent := True
  1297. end;
  1298. end;
  1299. function OpsEqual(const o1,o2:toper): Boolean;
  1300. begin {checks whether the two ops are equal}
  1301. OpsEqual := False;
  1302. if o1.typ=o2.typ then
  1303. case o1.typ Of
  1304. top_reg :
  1305. OpsEqual:=o1.reg=o2.reg;
  1306. top_ref :
  1307. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1308. Top_Const :
  1309. OpsEqual:=o1.val=o2.val;
  1310. Top_None :
  1311. OpsEqual := True
  1312. end;
  1313. end;
  1314. function sizescompatible(loadsize,newsize: topsize): boolean;
  1315. begin
  1316. case loadsize of
  1317. S_B,S_BW,S_BL:
  1318. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1319. S_W,S_WL:
  1320. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1321. else
  1322. sizescompatible := newsize = S_L;
  1323. end;
  1324. end;
  1325. function opscompatible(p1,p2: taicpu): boolean;
  1326. begin
  1327. case p1.opcode of
  1328. A_MOVZX,A_MOVSX:
  1329. opscompatible :=
  1330. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1331. sizescompatible(p1.opsize,p2.opsize);
  1332. else
  1333. opscompatible :=
  1334. (p1.opcode = p2.opcode) and
  1335. (p1.ops = p2.ops) and
  1336. (p1.opsize = p2.opsize);
  1337. end;
  1338. end;
  1339. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1340. {$ifdef csdebug}
  1341. var
  1342. hp: tai;
  1343. {$endif csdebug}
  1344. begin {checks whether two taicpu instructions are equal}
  1345. if assigned(p1) and assigned(p2) and
  1346. (tai(p1).typ = ait_instruction) and
  1347. (tai(p2).typ = ait_instruction) and
  1348. opscompatible(taicpu(p1),taicpu(p2)) and
  1349. (not(assigned(taicpu(p1).oper[0])) or
  1350. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1351. (not(assigned(taicpu(p1).oper[1])) or
  1352. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1353. (not(assigned(taicpu(p1).oper[2])) or
  1354. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1355. {both instructions have the same structure:
  1356. "<operator> <operand of type1>, <operand of type 2>"}
  1357. if ((taicpu(p1).opcode = A_MOV) or
  1358. (taicpu(p1).opcode = A_MOVZX) or
  1359. (taicpu(p1).opcode = A_MOVSX) or
  1360. (taicpu(p1).opcode = A_LEA)) and
  1361. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1362. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1363. {the "old" instruction is a load of a register with a new value, not with
  1364. a value based on the contents of this register (so no "mov (reg), reg")}
  1365. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1366. RefsEquivalent(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^,taicpu(p1), taicpu(p2), reginfo) then
  1367. {the "new" instruction is also a load of a register with a new value, and
  1368. this value is fetched from the same memory location}
  1369. begin
  1370. With taicpu(p2).oper[0]^.ref^ Do
  1371. begin
  1372. if (base <> NR_NO) and
  1373. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1374. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1375. if (index <> NR_NO) and
  1376. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1377. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1378. end;
  1379. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1380. from the reference are the same in the old and in the new instruction
  1381. sequence}
  1382. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1383. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1384. InstructionsEquivalent :=
  1385. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1386. taicpu(p2).oper[1]^.reg, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write);
  1387. end
  1388. {the registers are loaded with values from different memory locations. if
  1389. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1390. would be considered equivalent}
  1391. else
  1392. InstructionsEquivalent := False
  1393. else
  1394. {load register with a value based on the current value of this register}
  1395. begin
  1396. With taicpu(p2).oper[0]^.ref^ Do
  1397. begin
  1398. if (base <> NR_NO) and
  1399. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1400. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1401. {it won't do any harm if the register is already in RegsLoadedForRef}
  1402. begin
  1403. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1404. {$ifdef csdebug}
  1405. Writeln(std_regname(base), ' added');
  1406. {$endif csdebug}
  1407. end;
  1408. if (index <> NR_NO) and
  1409. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1410. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1411. begin
  1412. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1413. {$ifdef csdebug}
  1414. Writeln(std_regname(index), ' added');
  1415. {$endif csdebug}
  1416. end;
  1417. end;
  1418. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1419. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1420. begin
  1421. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1422. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1423. {$ifdef csdebug}
  1424. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1425. {$endif csdebug}
  1426. end;
  1427. InstructionsEquivalent :=
  1428. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Read) and
  1429. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write)
  1430. end
  1431. else
  1432. {an instruction <> mov, movzx, movsx}
  1433. begin
  1434. {$ifdef csdebug}
  1435. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1436. hp.previous := p2;
  1437. hp.next := p2.next;
  1438. p2.next.previous := hp;
  1439. p2.next := hp;
  1440. {$endif csdebug}
  1441. InstructionsEquivalent :=
  1442. (not(assigned(taicpu(p1).oper[0])) or
  1443. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1444. (not(assigned(taicpu(p1).oper[1])) or
  1445. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1446. (not(assigned(taicpu(p1).oper[2])) or
  1447. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown))
  1448. end
  1449. {the instructions haven't even got the same structure, so they're certainly
  1450. not equivalent}
  1451. else
  1452. begin
  1453. {$ifdef csdebug}
  1454. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1455. hp.previous := p2;
  1456. hp.next := p2.next;
  1457. p2.next.previous := hp;
  1458. p2.next := hp;
  1459. {$endif csdebug}
  1460. InstructionsEquivalent := False;
  1461. end;
  1462. {$ifdef csdebug}
  1463. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1464. hp.previous := p2;
  1465. hp.next := p2.next;
  1466. p2.next.previous := hp;
  1467. p2.next := hp;
  1468. {$endif csdebug}
  1469. end;
  1470. (*
  1471. function InstructionsEqual(p1, p2: tai): Boolean;
  1472. begin {checks whether two taicpu instructions are equal}
  1473. InstructionsEqual :=
  1474. assigned(p1) and assigned(p2) and
  1475. ((tai(p1).typ = ait_instruction) and
  1476. (tai(p1).typ = ait_instruction) and
  1477. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1478. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1479. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1480. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1481. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1482. end;
  1483. *)
  1484. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1485. begin
  1486. if supreg in [RS_EAX..RS_EDI] then
  1487. incState(p^.regs[supreg].rstate,1)
  1488. end;
  1489. procedure readref(p: ptaiprop; const ref: preference);
  1490. begin
  1491. if ref^.base <> NR_NO then
  1492. readreg(p, getsupreg(ref^.base));
  1493. if ref^.index <> NR_NO then
  1494. readreg(p, getsupreg(ref^.index));
  1495. end;
  1496. procedure ReadOp(p: ptaiprop;const o:toper);
  1497. begin
  1498. case o.typ Of
  1499. top_reg: readreg(p, getsupreg(o.reg));
  1500. top_ref: readref(p, o.ref);
  1501. end;
  1502. end;
  1503. function RefInInstruction(const ref: TReference; p: tai;
  1504. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1505. {checks whehter ref is used in p}
  1506. var
  1507. mysize: tcgsize;
  1508. TmpResult: Boolean;
  1509. begin
  1510. TmpResult := False;
  1511. if (p.typ = ait_instruction) then
  1512. begin
  1513. mysize := topsize2tcgsize[taicpu(p).opsize];
  1514. if (taicpu(p).ops >= 1) and
  1515. (taicpu(p).oper[0]^.typ = top_ref) then
  1516. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,mysize,size);
  1517. if not(TmpResult) and
  1518. (taicpu(p).ops >= 2) and
  1519. (taicpu(p).oper[1]^.typ = top_ref) then
  1520. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,mysize,size);
  1521. if not(TmpResult) and
  1522. (taicpu(p).ops >= 3) and
  1523. (taicpu(p).oper[2]^.typ = top_ref) then
  1524. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,mysize,size);
  1525. end;
  1526. RefInInstruction := TmpResult;
  1527. end;
  1528. function RefInSequence(const ref: TReference; Content: TContent;
  1529. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1530. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1531. tai objects) to see whether ref is used somewhere}
  1532. var p: tai;
  1533. Counter: Word;
  1534. TmpResult: Boolean;
  1535. begin
  1536. p := Content.StartMod;
  1537. TmpResult := False;
  1538. Counter := 1;
  1539. while not(TmpResult) and
  1540. (Counter <= Content.NrOfMods) Do
  1541. begin
  1542. if (p.typ = ait_instruction) and
  1543. RefInInstruction(ref, p, RefsEq, size)
  1544. then TmpResult := True;
  1545. inc(Counter);
  1546. GetNextInstruction(p,p)
  1547. end;
  1548. RefInSequence := TmpResult
  1549. end;
  1550. {$ifdef q+}
  1551. {$q-}
  1552. {$define overflowon}
  1553. {$endif q+}
  1554. // checks whether a write to r2 of size "size" contains address r1
  1555. function arrayrefsoverlapping(const r1, r2: treference; size1, size2: tcgsize): Boolean;
  1556. var
  1557. realsize1, realsize2: aint;
  1558. begin
  1559. realsize1 := tcgsize2size[size1];
  1560. realsize2 := tcgsize2size[size2];
  1561. arrayrefsoverlapping :=
  1562. (r2.offset <= r1.offset+realsize1) and
  1563. (r1.offset <= r2.offset+realsize2) and
  1564. (r1.segment = r2.segment) and
  1565. (r1.symbol=r2.symbol) and
  1566. (r1.base = r2.base)
  1567. end;
  1568. {$ifdef overflowon}
  1569. {$q+}
  1570. {$undef overflowon}
  1571. {$endif overflowon}
  1572. function isSimpleRef(const ref: treference): boolean;
  1573. { returns true if ref is reference to a local or global variable, to a }
  1574. { parameter or to an object field (this includes arrays). Returns false }
  1575. { otherwise. }
  1576. begin
  1577. isSimpleRef :=
  1578. assigned(ref.symbol) or
  1579. (ref.base = current_procinfo.framepointer);
  1580. end;
  1581. function containsPointerRef(p: tai): boolean;
  1582. { checks if an instruction contains a reference which is a pointer location }
  1583. var
  1584. hp: taicpu;
  1585. count: longint;
  1586. begin
  1587. containsPointerRef := false;
  1588. if p.typ <> ait_instruction then
  1589. exit;
  1590. hp := taicpu(p);
  1591. for count := 0 to hp.ops-1 do
  1592. begin
  1593. case hp.oper[count]^.typ of
  1594. top_ref:
  1595. if not isSimpleRef(hp.oper[count]^.ref^) then
  1596. begin
  1597. containsPointerRef := true;
  1598. exit;
  1599. end;
  1600. top_none:
  1601. exit;
  1602. end;
  1603. end;
  1604. end;
  1605. function containsPointerLoad(c: tcontent): boolean;
  1606. { checks whether the contents of a register contain a pointer reference }
  1607. var
  1608. p: tai;
  1609. count: longint;
  1610. begin
  1611. containsPointerLoad := false;
  1612. p := c.startmod;
  1613. for count := c.nrOfMods downto 1 do
  1614. begin
  1615. if containsPointerRef(p) then
  1616. begin
  1617. containsPointerLoad := true;
  1618. exit;
  1619. end;
  1620. getnextinstruction(p,p);
  1621. end;
  1622. end;
  1623. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1624. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1625. { returns whether the contents c of reg are invalid after regWritten is }
  1626. { is written to ref }
  1627. var
  1628. refsEq: trefCompare;
  1629. begin
  1630. if isSimpleRef(ref) then
  1631. begin
  1632. if (ref.index <> NR_NO) or
  1633. (assigned(ref.symbol) and
  1634. (ref.base <> NR_NO)) then
  1635. { local/global variable or parameter which is an array }
  1636. refsEq := @arrayRefsOverlapping
  1637. else
  1638. { local/global variable or parameter which is not an array }
  1639. refsEq := @refsOverlapping;
  1640. invalsmemwrite :=
  1641. assigned(c.memwrite) and
  1642. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1643. containsPointerRef(c.memwrite)) or
  1644. refsEq(c.memwrite.oper[1]^.ref^,ref,topsize2tcgsize[c.memwrite.opsize],size));
  1645. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1646. begin
  1647. writeToMemDestroysContents := false;
  1648. exit;
  1649. end;
  1650. { write something to a parameter, a local or global variable, so }
  1651. { * with uncertain optimizations on: }
  1652. { - destroy the contents of registers whose contents have somewhere a }
  1653. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1654. { are being written to memory) is not destroyed if it's StartMod is }
  1655. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1656. { expression based on ref) }
  1657. { * with uncertain optimizations off: }
  1658. { - also destroy registers that contain any pointer }
  1659. with c do
  1660. writeToMemDestroysContents :=
  1661. (typ in [con_ref,con_noRemoveRef]) and
  1662. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1663. containsPointerLoad(c)
  1664. ) or
  1665. (refInSequence(ref,c,refsEq,size) and
  1666. ((supreg <> regWritten) or
  1667. not((nrOfMods = 1) and
  1668. {StarMod is always of the type ait_instruction}
  1669. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1670. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, topsize2tcgsize[taicpu(StartMod).opsize],size)
  1671. )
  1672. )
  1673. )
  1674. );
  1675. end
  1676. else
  1677. { write something to a pointer location, so }
  1678. { * with uncertain optimzations on: }
  1679. { - do not destroy registers which contain a local/global variable or }
  1680. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1681. { * with uncertain optimzations off: }
  1682. { - destroy every register which contains a memory location }
  1683. begin
  1684. invalsmemwrite :=
  1685. assigned(c.memwrite) and
  1686. (not(cs_opt_size in current_settings.optimizerswitches) or
  1687. containsPointerRef(c.memwrite));
  1688. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1689. begin
  1690. writeToMemDestroysContents := false;
  1691. exit;
  1692. end;
  1693. with c do
  1694. writeToMemDestroysContents :=
  1695. (typ in [con_ref,con_noRemoveRef]) and
  1696. (not(cs_opt_size in current_settings.optimizerswitches) or
  1697. { for movsl }
  1698. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1699. { don't destroy if reg contains a parameter, local or global variable }
  1700. containsPointerLoad(c)
  1701. );
  1702. end;
  1703. end;
  1704. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1705. const c: tcontent): boolean;
  1706. { returns whether the contents c of reg are invalid after destReg is }
  1707. { modified }
  1708. begin
  1709. writeToRegDestroysContents :=
  1710. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1711. sequenceDependsOnReg(c,supreg,destReg);
  1712. end;
  1713. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1714. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1715. { returns whether the contents c of reg are invalid after regWritten is }
  1716. { is written to op }
  1717. begin
  1718. memwritedestroyed := false;
  1719. case op.typ of
  1720. top_reg:
  1721. writeDestroysContents :=
  1722. (getregtype(op.reg) = R_INTREGISTER) and
  1723. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1724. top_ref:
  1725. writeDestroysContents :=
  1726. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1727. else
  1728. writeDestroysContents := false;
  1729. end;
  1730. end;
  1731. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1732. { destroys all registers which possibly contain a reference to ref, regWritten }
  1733. { is the register whose contents are being written to memory (if this proc }
  1734. { is called because of a "mov?? %reg, (mem)" instruction) }
  1735. var
  1736. counter: tsuperregister;
  1737. destroymemwrite: boolean;
  1738. begin
  1739. for counter := RS_EAX to RS_EDI Do
  1740. begin
  1741. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1742. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1743. destroyReg(ptaiprop(p.optInfo), counter, false)
  1744. else if destroymemwrite then
  1745. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1746. end;
  1747. end;
  1748. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1749. var Counter: tsuperregister;
  1750. begin {initializes/desrtoys all registers}
  1751. For Counter := RS_EAX To RS_EDI Do
  1752. begin
  1753. if read then
  1754. readreg(p, Counter);
  1755. DestroyReg(p, Counter, written);
  1756. p^.regs[counter].MemWrite := nil;
  1757. end;
  1758. p^.DirFlag := F_Unknown;
  1759. end;
  1760. procedure DestroyOp(taiObj: tai; const o:Toper);
  1761. {$ifdef statedebug}
  1762. var
  1763. hp: tai;
  1764. {$endif statedebug}
  1765. begin
  1766. case o.typ Of
  1767. top_reg:
  1768. begin
  1769. {$ifdef statedebug}
  1770. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1771. hp.next := taiobj.next;
  1772. hp.previous := taiobj;
  1773. taiobj.next := hp;
  1774. if assigned(hp.next) then
  1775. hp.next.previous := hp;
  1776. {$endif statedebug}
  1777. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1778. end;
  1779. top_ref:
  1780. begin
  1781. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1782. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1783. end;
  1784. end;
  1785. end;
  1786. procedure AddInstr2RegContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1787. p: taicpu; supreg: tsuperregister);
  1788. {$ifdef statedebug}
  1789. var
  1790. hp: tai;
  1791. {$endif statedebug}
  1792. begin
  1793. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1794. if (typ in [con_ref,con_noRemoveRef]) then
  1795. begin
  1796. incState(wstate,1);
  1797. { also store how many instructions are part of the sequence in the first }
  1798. { instructions ptaiprop, so it can be easily accessed from within }
  1799. { CheckSequence}
  1800. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1801. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1802. NrOfInstrSinceLastMod[supreg] := 0;
  1803. invalidateDependingRegs(p.optinfo,supreg);
  1804. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1805. {$ifdef StateDebug}
  1806. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1807. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1808. InsertLLItem(AsmL, p, p.next, hp);
  1809. {$endif StateDebug}
  1810. end
  1811. else
  1812. begin
  1813. {$ifdef statedebug}
  1814. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1815. insertllitem(asml,p,p.next,hp);
  1816. {$endif statedebug}
  1817. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1818. {$ifdef StateDebug}
  1819. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1820. InsertLLItem(AsmL, p, p.next, hp);
  1821. {$endif StateDebug}
  1822. end
  1823. end;
  1824. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1825. p: taicpu; const oper: TOper);
  1826. begin
  1827. if oper.typ = top_reg then
  1828. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1829. else
  1830. begin
  1831. ReadOp(ptaiprop(p.optinfo), oper);
  1832. DestroyOp(p, oper);
  1833. end
  1834. end;
  1835. {*************************************************************************************}
  1836. {************************************** TDFAOBJ **************************************}
  1837. {*************************************************************************************}
  1838. constructor tdfaobj.create(_list: TAsmList);
  1839. begin
  1840. list := _list;
  1841. blockstart := nil;
  1842. blockend := nil;
  1843. nroftaiobjs := 0;
  1844. taipropblock := nil;
  1845. lolab := 0;
  1846. hilab := 0;
  1847. labdif := 0;
  1848. labeltable := nil;
  1849. end;
  1850. procedure tdfaobj.initlabeltable;
  1851. var
  1852. labelfound: boolean;
  1853. p, prev: tai;
  1854. hp1, hp2: tai;
  1855. {$ifdef i386}
  1856. regcounter,
  1857. supreg : tsuperregister;
  1858. {$endif i386}
  1859. usedregs, nodeallocregs: tregset;
  1860. begin
  1861. labelfound := false;
  1862. lolab := maxlongint;
  1863. hilab := 0;
  1864. p := blockstart;
  1865. prev := p;
  1866. while assigned(p) do
  1867. begin
  1868. if (tai(p).typ = ait_label) then
  1869. if not labelcanbeskipped(tai_label(p)) then
  1870. begin
  1871. labelfound := true;
  1872. if (tai_Label(p).labsym.labelnr < lolab) then
  1873. lolab := tai_label(p).labsym.labelnr;
  1874. if (tai_Label(p).labsym.labelnr > hilab) then
  1875. hilab := tai_label(p).labsym.labelnr;
  1876. end;
  1877. prev := p;
  1878. getnextinstruction(p, p);
  1879. end;
  1880. if (prev.typ = ait_marker) and
  1881. (tai_marker(prev).kind = mark_AsmBlockStart) then
  1882. blockend := prev
  1883. else blockend := nil;
  1884. if labelfound then
  1885. labdif := hilab+1-lolab
  1886. else labdif := 0;
  1887. usedregs := [];
  1888. if (labdif <> 0) then
  1889. begin
  1890. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1891. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1892. end;
  1893. p := blockstart;
  1894. prev := p;
  1895. while (p <> blockend) do
  1896. begin
  1897. case p.typ of
  1898. ait_label:
  1899. if not labelcanbeskipped(tai_label(p)) then
  1900. labeltable^[tai_label(p).labsym.labelnr-lolab].taiobj := p;
  1901. {$ifdef i386}
  1902. ait_regalloc:
  1903. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1904. begin
  1905. supreg:=getsupreg(tai_regalloc(p).reg);
  1906. case tai_regalloc(p).ratype of
  1907. ra_alloc :
  1908. begin
  1909. if not(supreg in usedregs) then
  1910. include(usedregs, supreg)
  1911. else
  1912. begin
  1913. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1914. hp1 := tai(p.previous);
  1915. list.remove(p);
  1916. p.free;
  1917. p := hp1;
  1918. end;
  1919. end;
  1920. ra_dealloc :
  1921. begin
  1922. exclude(usedregs, supreg);
  1923. hp1 := p;
  1924. hp2 := nil;
  1925. while not(findregalloc(supreg,tai(hp1.next),ra_alloc)) and
  1926. getnextinstruction(hp1, hp1) and
  1927. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1928. hp2 := hp1;
  1929. if hp2 <> nil then
  1930. begin
  1931. hp1 := tai(p.previous);
  1932. list.remove(p);
  1933. insertllitem(list, hp2, tai(hp2.next), p);
  1934. p := hp1;
  1935. end
  1936. else if findregalloc(getsupreg(tai_regalloc(p).reg), tai(p.next),ra_alloc)
  1937. and getnextinstruction(p,hp1) then
  1938. begin
  1939. hp1 := tai(p.previous);
  1940. list.remove(p);
  1941. p.free;
  1942. p := hp1;
  1943. // don't include here, since then the allocation will be removed when it's processed
  1944. // include(usedregs,supreg);
  1945. end;
  1946. end;
  1947. end;
  1948. end;
  1949. {$endif i386}
  1950. end;
  1951. repeat
  1952. prev := p;
  1953. p := tai(p.next);
  1954. until not(assigned(p)) or
  1955. (p = blockend) or
  1956. not(p.typ in (skipinstr - [ait_regalloc]));
  1957. end;
  1958. {$ifdef i386}
  1959. { don't add deallocation for function result variable or for regvars}
  1960. getNoDeallocRegs(noDeallocRegs);
  1961. usedRegs := usedRegs - noDeallocRegs;
  1962. for regCounter := RS_EAX to RS_EDI do
  1963. if regCounter in usedRegs then
  1964. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1965. {$endif i386}
  1966. end;
  1967. function tdfaobj.pass_1(_blockstart: tai): tai;
  1968. begin
  1969. blockstart := _blockstart;
  1970. initlabeltable;
  1971. pass_1 := blockend;
  1972. end;
  1973. function tdfaobj.initdfapass2: boolean;
  1974. {reserves memory for the PtaiProps in one big memory block when not using
  1975. TP, returns False if not enough memory is available for the optimizer in all
  1976. cases}
  1977. var
  1978. p: tai;
  1979. count: Longint;
  1980. { TmpStr: String; }
  1981. begin
  1982. p := blockstart;
  1983. skiphead(p);
  1984. nroftaiobjs := 0;
  1985. while (p <> blockend) do
  1986. begin
  1987. {$ifDef JumpAnal}
  1988. case p.typ of
  1989. ait_label:
  1990. begin
  1991. if not labelcanbeskipped(tai_label(p)) then
  1992. labeltable^[tai_label(p).labsym.labelnr-lolab].instrnr := nroftaiobjs
  1993. end;
  1994. ait_instruction:
  1995. begin
  1996. if taicpu(p).is_jmp then
  1997. begin
  1998. if (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr >= lolab) and
  1999. (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr <= hilab) then
  2000. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-lolab].refsfound);
  2001. end;
  2002. end;
  2003. { ait_instruction:
  2004. begin
  2005. if (taicpu(p).opcode = A_PUSH) and
  2006. (taicpu(p).oper[0]^.typ = top_symbol) and
  2007. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  2008. begin
  2009. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  2010. if}
  2011. end;
  2012. {$endif JumpAnal}
  2013. inc(NrOftaiObjs);
  2014. getnextinstruction(p,p);
  2015. end;
  2016. if nroftaiobjs <> 0 then
  2017. begin
  2018. initdfapass2 := True;
  2019. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2020. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  2021. p := blockstart;
  2022. skiphead(p);
  2023. for count := 1 To nroftaiobjs do
  2024. begin
  2025. ptaiprop(p.optinfo) := @taipropblock^[count];
  2026. getnextinstruction(p, p);
  2027. end;
  2028. end
  2029. else
  2030. initdfapass2 := false;
  2031. end;
  2032. procedure tdfaobj.dodfapass2;
  2033. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  2034. contents for the instructions starting with p. Returns the last tai which has
  2035. been processed}
  2036. var
  2037. curprop, LastFlagsChangeProp: ptaiprop;
  2038. Cnt, InstrCnt : Longint;
  2039. InstrProp: TInsProp;
  2040. UsedRegs: TRegSet;
  2041. prev,p : tai;
  2042. tmpref: TReference;
  2043. tmpsupreg: tsuperregister;
  2044. {$ifdef statedebug}
  2045. hp : tai;
  2046. {$endif}
  2047. {$ifdef AnalyzeLoops}
  2048. hp : tai;
  2049. TmpState: Byte;
  2050. {$endif AnalyzeLoops}
  2051. begin
  2052. p := BlockStart;
  2053. LastFlagsChangeProp := nil;
  2054. prev := nil;
  2055. UsedRegs := [];
  2056. UpdateUsedregs(UsedRegs, p);
  2057. SkipHead(p);
  2058. BlockStart := p;
  2059. InstrCnt := 1;
  2060. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2061. while (p <> Blockend) Do
  2062. begin
  2063. curprop := @taiPropBlock^[InstrCnt];
  2064. if assigned(prev)
  2065. then
  2066. begin
  2067. {$ifdef JumpAnal}
  2068. if (p.Typ <> ait_label) then
  2069. {$endif JumpAnal}
  2070. begin
  2071. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2072. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2073. curprop^.FlagsUsed := false;
  2074. end
  2075. end
  2076. else
  2077. begin
  2078. fillchar(curprop^, SizeOf(curprop^), 0);
  2079. { For tmpreg := RS_EAX to RS_EDI Do
  2080. curprop^.regs[tmpreg].WState := 1;}
  2081. end;
  2082. curprop^.UsedRegs := UsedRegs;
  2083. curprop^.CanBeRemoved := False;
  2084. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2085. For tmpsupreg := RS_EAX To RS_EDI Do
  2086. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2087. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2088. else
  2089. begin
  2090. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2091. curprop^.regs[tmpsupreg].typ := con_unknown;
  2092. end;
  2093. case p.typ Of
  2094. ait_marker:;
  2095. ait_label:
  2096. {$ifndef JumpAnal}
  2097. if not labelCanBeSkipped(tai_label(p)) then
  2098. DestroyAllRegs(curprop,false,false);
  2099. {$else JumpAnal}
  2100. begin
  2101. if not labelCanBeSkipped(tai_label(p)) then
  2102. With LTable^[tai_Label(p).labsym^.labelnr-LoLab] Do
  2103. {$ifDef AnalyzeLoops}
  2104. if (RefsFound = tai_Label(p).labsym^.RefCount)
  2105. {$else AnalyzeLoops}
  2106. if (JmpsProcessed = tai_Label(p).labsym^.RefCount)
  2107. {$endif AnalyzeLoops}
  2108. then
  2109. {all jumps to this label have been found}
  2110. {$ifDef AnalyzeLoops}
  2111. if (JmpsProcessed > 0)
  2112. then
  2113. {$endif AnalyzeLoops}
  2114. {we've processed at least one jump to this label}
  2115. begin
  2116. if (GetLastInstruction(p, hp) and
  2117. not(((hp.typ = ait_instruction)) and
  2118. (taicpu_labeled(hp).is_jmp))
  2119. then
  2120. {previous instruction not a JMP -> the contents of the registers after the
  2121. previous intruction has been executed have to be taken into account as well}
  2122. For tmpsupreg := RS_EAX to RS_EDI Do
  2123. begin
  2124. if (curprop^.regs[tmpsupreg].WState <>
  2125. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2126. then DestroyReg(curprop, tmpsupreg, true)
  2127. end
  2128. end
  2129. {$ifDef AnalyzeLoops}
  2130. else
  2131. {a label from a backward jump (e.g. a loop), no jump to this label has
  2132. already been processed}
  2133. if GetLastInstruction(p, hp) and
  2134. not(hp.typ = ait_instruction) and
  2135. (taicpu_labeled(hp).opcode = A_JMP))
  2136. then
  2137. {previous instruction not a jmp, so keep all the registers' contents from the
  2138. previous instruction}
  2139. begin
  2140. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2141. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2142. end
  2143. else
  2144. {previous instruction a jmp and no jump to this label processed yet}
  2145. begin
  2146. hp := p;
  2147. Cnt := InstrCnt;
  2148. {continue until we find a jump to the label or a label which has already
  2149. been processed}
  2150. while GetNextInstruction(hp, hp) and
  2151. not((hp.typ = ait_instruction) and
  2152. (taicpu(hp).is_jmp) and
  2153. (tasmlabel(taicpu(hp).oper[0]^.sym).labsymabelnr = tai_Label(p).labsym^.labelnr)) and
  2154. not((hp.typ = ait_label) and
  2155. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].RefsFound
  2156. = tai_Label(hp).labsym^.RefCount) and
  2157. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2158. inc(Cnt);
  2159. if (hp.typ = ait_label)
  2160. then
  2161. {there's a processed label after the current one}
  2162. begin
  2163. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2164. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2165. end
  2166. else
  2167. {there's no label anymore after the current one, or they haven't been
  2168. processed yet}
  2169. begin
  2170. GetLastInstruction(p, hp);
  2171. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2172. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2173. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2174. end
  2175. end
  2176. {$endif AnalyzeLoops}
  2177. else
  2178. {not all references to this label have been found, so destroy all registers}
  2179. begin
  2180. GetLastInstruction(p, hp);
  2181. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2182. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2183. DestroyAllRegs(curprop,true,true)
  2184. end;
  2185. end;
  2186. {$endif JumpAnal}
  2187. ait_stab, ait_force_line, ait_function_name:;
  2188. ait_align: ; { may destroy flags !!! }
  2189. ait_instruction:
  2190. begin
  2191. if taicpu(p).is_jmp or
  2192. (taicpu(p).opcode = A_JMP) then
  2193. begin
  2194. {$ifNDef JumpAnal}
  2195. for tmpsupreg := RS_EAX to RS_EDI do
  2196. with curprop^.regs[tmpsupreg] do
  2197. case typ of
  2198. con_ref: typ := con_noRemoveRef;
  2199. con_const: typ := con_noRemoveConst;
  2200. con_invalid: typ := con_unknown;
  2201. end;
  2202. {$else JumpAnal}
  2203. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-LoLab] Do
  2204. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2205. begin
  2206. if (InstrCnt < InstrNr)
  2207. then
  2208. {forward jump}
  2209. if (JmpsProcessed = 0) then
  2210. {no jump to this label has been processed yet}
  2211. begin
  2212. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2213. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2214. inc(JmpsProcessed);
  2215. end
  2216. else
  2217. begin
  2218. For tmpreg := RS_EAX to RS_EDI Do
  2219. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2220. curprop^.regs[tmpreg].WState) then
  2221. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2222. inc(JmpsProcessed);
  2223. end
  2224. {$ifdef AnalyzeLoops}
  2225. else
  2226. { backward jump, a loop for example}
  2227. { if (JmpsProcessed > 0) or
  2228. not(GetLastInstruction(taiObj, hp) and
  2229. (hp.typ = ait_labeled_instruction) and
  2230. (taicpu_labeled(hp).opcode = A_JMP))
  2231. then}
  2232. {instruction prior to label is not a jmp, or at least one jump to the label
  2233. has yet been processed}
  2234. begin
  2235. inc(JmpsProcessed);
  2236. For tmpreg := RS_EAX to RS_EDI Do
  2237. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2238. curprop^.regs[tmpreg].WState)
  2239. then
  2240. begin
  2241. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2242. Cnt := InstrNr;
  2243. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2244. begin
  2245. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2246. inc(Cnt);
  2247. end;
  2248. while (Cnt <= InstrCnt) Do
  2249. begin
  2250. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2251. inc(Cnt)
  2252. end
  2253. end;
  2254. end
  2255. { else }
  2256. {instruction prior to label is a jmp and no jumps to the label have yet been
  2257. processed}
  2258. { begin
  2259. inc(JmpsProcessed);
  2260. For tmpreg := RS_EAX to RS_EDI Do
  2261. begin
  2262. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2263. Cnt := InstrNr;
  2264. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2265. begin
  2266. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2267. inc(Cnt);
  2268. end;
  2269. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2270. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2271. begin
  2272. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2273. inc(Cnt);
  2274. end;
  2275. while (Cnt <= InstrCnt) Do
  2276. begin
  2277. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2278. inc(Cnt)
  2279. end
  2280. end
  2281. end}
  2282. {$endif AnalyzeLoops}
  2283. end;
  2284. {$endif JumpAnal}
  2285. end
  2286. else
  2287. begin
  2288. InstrProp := InsProp[taicpu(p).opcode];
  2289. case taicpu(p).opcode Of
  2290. A_MOV, A_MOVZX, A_MOVSX:
  2291. begin
  2292. case taicpu(p).oper[0]^.typ Of
  2293. top_ref, top_reg:
  2294. case taicpu(p).oper[1]^.typ Of
  2295. top_reg:
  2296. begin
  2297. {$ifdef statedebug}
  2298. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2299. insertllitem(list,p,p.next,hp);
  2300. {$endif statedebug}
  2301. readOp(curprop, taicpu(p).oper[0]^);
  2302. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2303. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2304. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2305. begin
  2306. with curprop^.regs[tmpsupreg] Do
  2307. begin
  2308. incState(wstate,1);
  2309. { also store how many instructions are part of the sequence in the first }
  2310. { instruction's ptaiprop, so it can be easily accessed from within }
  2311. { CheckSequence }
  2312. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2313. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2314. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2315. { Destroy the contents of the registers }
  2316. { that depended on the previous value of }
  2317. { this register }
  2318. invalidateDependingRegs(curprop,tmpsupreg);
  2319. curprop^.regs[tmpsupreg].memwrite := nil;
  2320. end;
  2321. end
  2322. else
  2323. begin
  2324. {$ifdef statedebug}
  2325. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2326. insertllitem(list,p,p.next,hp);
  2327. {$endif statedebug}
  2328. destroyReg(curprop, tmpsupreg, true);
  2329. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2330. with curprop^.regs[tmpsupreg] Do
  2331. begin
  2332. typ := con_ref;
  2333. startmod := p;
  2334. nrOfMods := 1;
  2335. end
  2336. end;
  2337. {$ifdef StateDebug}
  2338. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2339. insertllitem(list,p,p.next,hp);
  2340. {$endif StateDebug}
  2341. end;
  2342. top_ref:
  2343. begin
  2344. readref(curprop, taicpu(p).oper[1]^.ref);
  2345. if taicpu(p).oper[0]^.typ = top_reg then
  2346. begin
  2347. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2348. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2349. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2350. taicpu(p);
  2351. end
  2352. else
  2353. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2354. end;
  2355. end;
  2356. top_Const:
  2357. begin
  2358. case taicpu(p).oper[1]^.typ Of
  2359. top_reg:
  2360. begin
  2361. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2362. {$ifdef statedebug}
  2363. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2364. insertllitem(list,p,p.next,hp);
  2365. {$endif statedebug}
  2366. With curprop^.regs[tmpsupreg] Do
  2367. begin
  2368. DestroyReg(curprop, tmpsupreg, true);
  2369. typ := Con_Const;
  2370. StartMod := p;
  2371. nrOfMods := 1;
  2372. end
  2373. end;
  2374. top_ref:
  2375. begin
  2376. readref(curprop, taicpu(p).oper[1]^.ref);
  2377. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2378. end;
  2379. end;
  2380. end;
  2381. end;
  2382. end;
  2383. A_DIV, A_IDIV, A_MUL:
  2384. begin
  2385. ReadOp(curprop, taicpu(p).oper[0]^);
  2386. readreg(curprop,RS_EAX);
  2387. if (taicpu(p).OpCode = A_IDIV) or
  2388. (taicpu(p).OpCode = A_DIV) then
  2389. begin
  2390. readreg(curprop,RS_EDX);
  2391. end;
  2392. {$ifdef statedebug}
  2393. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2394. insertllitem(list,p,p.next,hp);
  2395. {$endif statedebug}
  2396. { DestroyReg(curprop, RS_EAX, true);}
  2397. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2398. taicpu(p), RS_EAX);
  2399. DestroyReg(curprop, RS_EDX, true);
  2400. LastFlagsChangeProp := curprop;
  2401. end;
  2402. A_IMUL:
  2403. begin
  2404. ReadOp(curprop,taicpu(p).oper[0]^);
  2405. if (taicpu(p).ops >= 2) then
  2406. ReadOp(curprop,taicpu(p).oper[1]^);
  2407. if (taicpu(p).ops <= 2) then
  2408. if (taicpu(p).ops=1) then
  2409. begin
  2410. readreg(curprop,RS_EAX);
  2411. {$ifdef statedebug}
  2412. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2413. insertllitem(list,p,p.next,hp);
  2414. {$endif statedebug}
  2415. { DestroyReg(curprop, RS_EAX, true); }
  2416. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2417. taicpu(p), RS_EAX);
  2418. DestroyReg(curprop,RS_EDX, true)
  2419. end
  2420. else
  2421. AddInstr2OpContents(
  2422. {$ifdef statedebug}list,{$endif}
  2423. taicpu(p), taicpu(p).oper[1]^)
  2424. else
  2425. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2426. taicpu(p), taicpu(p).oper[2]^);
  2427. LastFlagsChangeProp := curprop;
  2428. end;
  2429. A_LEA:
  2430. begin
  2431. readop(curprop,taicpu(p).oper[0]^);
  2432. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2433. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2434. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2435. else
  2436. begin
  2437. {$ifdef statedebug}
  2438. hp := tai_comment.Create(strpnew('destroying & initing'+
  2439. std_regname(taicpu(p).oper[1]^.reg)));
  2440. insertllitem(list,p,p.next,hp);
  2441. {$endif statedebug}
  2442. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2443. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2444. begin
  2445. typ := con_ref;
  2446. startmod := p;
  2447. nrOfMods := 1;
  2448. end
  2449. end;
  2450. end;
  2451. else
  2452. begin
  2453. Cnt := 1;
  2454. while (Cnt <= maxinschanges) and
  2455. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2456. begin
  2457. case InstrProp.Ch[Cnt] Of
  2458. Ch_REAX..Ch_REDI:
  2459. begin
  2460. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2461. readreg(curprop,tmpsupreg);
  2462. end;
  2463. Ch_WEAX..Ch_RWEDI:
  2464. begin
  2465. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2466. begin
  2467. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2468. readreg(curprop,tmpsupreg);
  2469. end;
  2470. {$ifdef statedebug}
  2471. hp := tai_comment.Create(strpnew('destroying '+
  2472. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2473. insertllitem(list,p,p.next,hp);
  2474. {$endif statedebug}
  2475. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2476. DestroyReg(curprop,tmpsupreg, true);
  2477. end;
  2478. Ch_MEAX..Ch_MEDI:
  2479. begin
  2480. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2481. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2482. taicpu(p),tmpsupreg);
  2483. end;
  2484. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2485. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2486. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2487. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2488. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2489. Ch_Wop1..Ch_RWop1:
  2490. begin
  2491. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2492. ReadOp(curprop, taicpu(p).oper[0]^);
  2493. DestroyOp(p, taicpu(p).oper[0]^);
  2494. end;
  2495. Ch_Mop1:
  2496. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2497. taicpu(p), taicpu(p).oper[0]^);
  2498. Ch_Wop2..Ch_RWop2:
  2499. begin
  2500. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2501. ReadOp(curprop, taicpu(p).oper[1]^);
  2502. DestroyOp(p, taicpu(p).oper[1]^);
  2503. end;
  2504. Ch_Mop2:
  2505. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2506. taicpu(p), taicpu(p).oper[1]^);
  2507. Ch_WOp3..Ch_RWOp3:
  2508. begin
  2509. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2510. ReadOp(curprop, taicpu(p).oper[2]^);
  2511. DestroyOp(p, taicpu(p).oper[2]^);
  2512. end;
  2513. Ch_Mop3:
  2514. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2515. taicpu(p), taicpu(p).oper[2]^);
  2516. Ch_WMemEDI:
  2517. begin
  2518. readreg(curprop, RS_EDI);
  2519. fillchar(tmpref, SizeOf(tmpref), 0);
  2520. tmpref.base := NR_EDI;
  2521. tmpref.index := NR_EDI;
  2522. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2523. end;
  2524. Ch_RFlags:
  2525. if assigned(LastFlagsChangeProp) then
  2526. LastFlagsChangeProp^.FlagsUsed := true;
  2527. Ch_WFlags:
  2528. LastFlagsChangeProp := curprop;
  2529. Ch_RWFlags:
  2530. begin
  2531. if assigned(LastFlagsChangeProp) then
  2532. LastFlagsChangeProp^.FlagsUsed := true;
  2533. LastFlagsChangeProp := curprop;
  2534. end;
  2535. Ch_FPU:;
  2536. else
  2537. begin
  2538. {$ifdef statedebug}
  2539. hp := tai_comment.Create(strpnew(
  2540. 'destroying all regs for prev instruction'));
  2541. insertllitem(list,p, p.next,hp);
  2542. {$endif statedebug}
  2543. DestroyAllRegs(curprop,true,true);
  2544. LastFlagsChangeProp := curprop;
  2545. end;
  2546. end;
  2547. inc(Cnt);
  2548. end
  2549. end;
  2550. end;
  2551. end;
  2552. end
  2553. else
  2554. begin
  2555. {$ifdef statedebug}
  2556. hp := tai_comment.Create(strpnew(
  2557. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2558. insertllitem(list,p, p.next,hp);
  2559. {$endif statedebug}
  2560. DestroyAllRegs(curprop,true,true);
  2561. end;
  2562. end;
  2563. inc(InstrCnt);
  2564. prev := p;
  2565. GetNextInstruction(p, p);
  2566. end;
  2567. end;
  2568. function tdfaobj.pass_generate_code: boolean;
  2569. begin
  2570. if initdfapass2 then
  2571. begin
  2572. dodfapass2;
  2573. pass_generate_code := true
  2574. end
  2575. else
  2576. pass_generate_code := false;
  2577. end;
  2578. {$ifopt r+}
  2579. {$define rangewason}
  2580. {$r-}
  2581. {$endif}
  2582. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2583. begin
  2584. if (sym.labelnr >= lolab) and
  2585. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2586. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2587. else
  2588. getlabelwithsym := nil;
  2589. end;
  2590. {$ifdef rangewason}
  2591. {$r+}
  2592. {$undef rangewason}
  2593. {$endif}
  2594. procedure tdfaobj.clear;
  2595. begin
  2596. if labdif <> 0 then
  2597. begin
  2598. freemem(labeltable);
  2599. labeltable := nil;
  2600. end;
  2601. if assigned(taipropblock) then
  2602. begin
  2603. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2604. taipropblock := nil;
  2605. end;
  2606. end;
  2607. end.