ncpucnv.pas 15 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate SPARC assembler for type converting nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************}
  16. unit ncpucnv;
  17. {$i fpcdefs.inc}
  18. interface
  19. uses
  20. node,ncnv,ncgcnv,defcmp;
  21. type
  22. tsparctypeconvnode = class(TCgTypeConvNode)
  23. protected
  24. { procedure second_int_to_int;override; }
  25. { procedure second_string_to_string;override; }
  26. { procedure second_cstring_to_pchar;override; }
  27. { procedure second_string_to_chararray;override; }
  28. { procedure second_array_to_pointer;override; }
  29. function first_int_to_real: tnode; override;
  30. { procedure second_pointer_to_array;override; }
  31. { procedure second_chararray_to_string;override; }
  32. { procedure second_char_to_string;override; }
  33. procedure second_int_to_real;override;
  34. { procedure second_real_to_real;override; }
  35. { procedure second_cord_to_pointer;override; }
  36. { procedure second_proc_to_procvar;override; }
  37. { procedure second_bool_to_int;override; }
  38. procedure second_int_to_bool;override;
  39. { procedure second_load_smallset;override; }
  40. { procedure second_ansistring_to_pchar;override; }
  41. { procedure second_pchar_to_string;override; }
  42. { procedure second_class_to_intf;override; }
  43. { procedure second_char_to_char;override; }
  44. end;
  45. implementation
  46. uses
  47. verbose,globals,systems,globtype,
  48. symconst,symdef,aasmbase,aasmtai,aasmdata,
  49. defutil,
  50. cgbase,cgutils,pass_1,pass_2,
  51. ncon,ncal,procinfo,
  52. ncgutil,
  53. cpubase,aasmcpu,
  54. tgobj,cgobj;
  55. {*****************************************************************************
  56. FirstTypeConv
  57. *****************************************************************************}
  58. function tsparctypeconvnode.first_int_to_real: tnode;
  59. var
  60. fname: string[19];
  61. begin
  62. { converting a 64bit integer to a float requires a helper }
  63. if is_64bitint(left.resultdef) or
  64. is_currency(left.resultdef) then
  65. begin
  66. { hack to avoid double division by 10000, as it's
  67. already done by typecheckpass.resultdef_int_to_real }
  68. if is_currency(left.resultdef) then
  69. left.resultdef := s64inttype;
  70. if is_signed(left.resultdef) then
  71. fname := 'fpc_int64_to_double'
  72. else
  73. fname := 'fpc_qword_to_double';
  74. result := ccallnode.createintern(fname,ccallparanode.create(
  75. left,nil));
  76. left:=nil;
  77. firstpass(result);
  78. exit;
  79. end
  80. else
  81. { other integers are supposed to be 32 bit }
  82. begin
  83. if is_signed(left.resultdef) then
  84. inserttypeconv(left,s32inttype)
  85. else
  86. inserttypeconv(left,u32inttype);
  87. firstpass(left);
  88. end;
  89. result := nil;
  90. expectloc:=LOC_FPUREGISTER;
  91. end;
  92. {*****************************************************************************
  93. SecondTypeConv
  94. *****************************************************************************}
  95. procedure tsparctypeconvnode.second_int_to_real;
  96. procedure loadsigned;
  97. begin
  98. location_force_mem(current_asmdata.CurrAsmList,left.location);
  99. { Load memory in fpu register }
  100. cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList,OS_F32,OS_F32,left.location.reference,location.register);
  101. tg.ungetiftemp(current_asmdata.CurrAsmList,left.location.reference);
  102. { Convert value in fpu register from integer to float }
  103. case tfloatdef(resultdef).floattype of
  104. s32real:
  105. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FiTOs,location.register,location.register));
  106. s64real:
  107. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FiTOd,location.register,location.register));
  108. s128real:
  109. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FiTOq,location.register,location.register));
  110. else
  111. internalerror(200408011);
  112. end;
  113. end;
  114. var
  115. href : treference;
  116. hregister : tregister;
  117. l1,l2 : tasmlabel;
  118. begin
  119. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  120. if is_signed(left.resultdef) then
  121. begin
  122. location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
  123. loadsigned;
  124. end
  125. else
  126. begin
  127. current_asmdata.getdatalabel(l1);
  128. current_asmdata.getjumplabel(l2);
  129. reference_reset_symbol(href,l1,0,8);
  130. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  131. cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_32,left.location,hregister);
  132. { here we need always an 64 bit register }
  133. location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,OS_F64);
  134. location_force_mem(current_asmdata.CurrAsmList,left.location);
  135. { Load memory in fpu register }
  136. cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList,OS_F32,OS_F32,left.location.reference,location.register);
  137. tg.ungetiftemp(current_asmdata.CurrAsmList,left.location.reference);
  138. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FiTOd,location.register,location.register));
  139. current_asmdata.CurrAsmList.concat(Taicpu.op_reg_reg(A_CMP,hregister,NR_G0));
  140. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_GE,l2);
  141. case tfloatdef(resultdef).floattype of
  142. { converting dword to s64real first and cut off at the end avoids precision loss }
  143. s32real,
  144. s64real:
  145. begin
  146. hregister:=cg.getfpuregister(current_asmdata.CurrAsmList,OS_F64);
  147. current_asmdata.asmlists[al_typedconsts].concat(tai_align.create(const_align(8)));
  148. current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(l1));
  149. { I got this constant from a test program (FK) }
  150. current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit($41f00000));
  151. current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit(0));
  152. cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList,OS_F64,OS_F64,href,hregister);
  153. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_FADDD,location.register,hregister,location.register));
  154. cg.a_label(current_asmdata.CurrAsmList,l2);
  155. { cut off if we should convert to single }
  156. if tfloatdef(resultdef).floattype=s32real then
  157. begin
  158. hregister:=location.register;
  159. location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
  160. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FDTOS,hregister,location.register));
  161. end;
  162. end;
  163. else
  164. internalerror(200410031);
  165. end;
  166. end;
  167. end;
  168. (*
  169. procedure tsparctypeconvnode.second_real_to_real;
  170. const
  171. conv_op : array[tfloattype,tfloattype] of tasmop = (
  172. { from: s32 s64 s80 c64 cur f128 }
  173. { s32 } ( A_FMOVS,A_FDTOS,A_NONE, A_NONE, A_NONE, A_NONE ),
  174. { s64 } ( A_FSTOD,A_FMOVD,A_NONE, A_NONE, A_NONE, A_NONE ),
  175. { s80 } ( A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE ),
  176. { c64 } ( A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE ),
  177. { cur } ( A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE ),
  178. { f128 } ( A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE )
  179. );
  180. var
  181. op : tasmop;
  182. begin
  183. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  184. location_force_fpureg(current_asmdata.CurrAsmList,left.location,false);
  185. { Convert value in fpu register from integer to float }
  186. op:=conv_op[tfloatdef(resultdef).floattype,tfloatdef(left.resultdef).floattype];
  187. if op=A_NONE then
  188. internalerror(200401121);
  189. location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
  190. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(op,left.location.register,location.register));
  191. end;
  192. *)
  193. procedure tsparctypeconvnode.second_int_to_bool;
  194. var
  195. href: treference;
  196. hreg1,hreg2 : tregister;
  197. resflags : tresflags;
  198. opsize : tcgsize;
  199. hlabel,oldTrueLabel,oldFalseLabel : tasmlabel;
  200. newsize : tcgsize;
  201. begin
  202. oldTrueLabel:=current_procinfo.CurrTrueLabel;
  203. oldFalseLabel:=current_procinfo.CurrFalseLabel;
  204. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  205. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  206. secondpass(left);
  207. if codegenerror then
  208. exit;
  209. { Explicit typecasts from any ordinal type to a boolean type }
  210. { must not change the ordinal value }
  211. if (nf_explicit in flags) and
  212. not(left.location.loc in [LOC_FLAGS,LOC_JUMP]) then
  213. begin
  214. location_copy(location,left.location);
  215. newsize:=def_cgsize(resultdef);
  216. { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
  217. if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
  218. ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
  219. location_force_reg(current_asmdata.CurrAsmList,location,newsize,true)
  220. else
  221. location.size:=newsize;
  222. current_procinfo.CurrTrueLabel:=oldTrueLabel;
  223. current_procinfo.CurrFalseLabel:=oldFalseLabel;
  224. exit;
  225. end;
  226. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  227. opsize:=def_cgsize(left.resultdef);
  228. case left.location.loc of
  229. LOC_CREFERENCE,LOC_REFERENCE,LOC_REGISTER,LOC_CREGISTER:
  230. begin
  231. if left.location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
  232. begin
  233. hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  234. {$ifndef cpu64bitalu}
  235. if left.location.size in [OS_64,OS_S64] then
  236. begin
  237. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,left.location.reference,hreg2);
  238. hreg1:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  239. href:=left.location.reference;
  240. inc(href.offset,4);
  241. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,href,hreg1);
  242. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,hreg1,hreg2,hreg2);
  243. end
  244. else
  245. {$endif not cpu64bitalu}
  246. cg.a_load_ref_reg(current_asmdata.CurrAsmList,opsize,opsize,left.location.reference,hreg2);
  247. end
  248. else
  249. begin
  250. hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  251. {$ifndef cpu64bitalu}
  252. if left.location.size in [OS_64,OS_S64] then
  253. begin
  254. hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  255. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,left.location.register64.reghi,left.location.register64.reglo,hreg2);
  256. end
  257. else
  258. {$endif not cpu64bitalu}
  259. cg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,opsize,left.location.register,hreg2);
  260. end;
  261. hreg1:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
  262. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SUBCC,NR_G0,hreg2,NR_G0));
  263. if is_pasbool(resultdef) then
  264. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ADDX,NR_G0,NR_G0,hreg1))
  265. else
  266. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SUBX,NR_G0,NR_G0,hreg1));
  267. end;
  268. LOC_FLAGS :
  269. begin
  270. hreg1:=cg.GetIntRegister(current_asmdata.CurrAsmList,location.size);
  271. resflags:=left.location.resflags;
  272. cg.g_flags2reg(current_asmdata.CurrAsmList,location.size,resflags,hreg1);
  273. if (is_cbool(resultdef)) then
  274. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,location.size,hreg1,hreg1);
  275. end;
  276. LOC_JUMP :
  277. begin
  278. hreg1:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  279. current_asmdata.getjumplabel(hlabel);
  280. cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrTrueLabel);
  281. if not(is_cbool(resultdef)) then
  282. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,1,hreg1)
  283. else
  284. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,-1,hreg1);
  285. cg.a_jmp_always(current_asmdata.CurrAsmList,hlabel);
  286. cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
  287. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,0,hreg1);
  288. cg.a_label(current_asmdata.CurrAsmList,hlabel);
  289. end;
  290. else
  291. internalerror(10062);
  292. end;
  293. {$ifndef cpu64bitalu}
  294. if (location.size in [OS_64,OS_S64]) then
  295. begin
  296. location.register64.reglo:=hreg1;
  297. location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  298. if (is_cbool(resultdef)) then
  299. { reglo is either 0 or -1 -> reghi has to become the same }
  300. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,location.register64.reglo,location.register64.reghi)
  301. else
  302. { unsigned }
  303. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,location.register64.reghi);
  304. end
  305. else
  306. {$endif not cpu64bitalu}
  307. location.register:=hreg1;
  308. current_procinfo.CurrTrueLabel:=oldTrueLabel;
  309. current_procinfo.CurrFalseLabel:=oldFalseLabel;
  310. end;
  311. begin
  312. ctypeconvnode:=tsparctypeconvnode;
  313. end.