powerpc.inc 37 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229
  1. {
  2. This file is part of the Free Pascal run time library.
  3. Copyright (c) 2000-2006 by the Free Pascal development team.
  4. Portions Copyright (c) 2000 by Casey Duncan ([email protected])
  5. Processor dependent implementation for the system unit for
  6. PowerPC
  7. See the file COPYING.FPC, included in this distribution,
  8. for details about the copyright.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  12. **********************************************************************}
  13. {$IFNDEF LINUX}
  14. {$DEFINE USE_DCBZ}
  15. {$ENDIF LINUX}
  16. {****************************************************************************
  17. PowerPC specific stuff
  18. ****************************************************************************}
  19. {
  20. const
  21. ppc_fpu_overflow = (1 shl (32-3));
  22. ppc_fpu_underflow = (1 shl (32-4));
  23. ppc_fpu_divbyzero = (1 shl (32-5));
  24. ppc_fpu_inexact = (1 shl (32-6));
  25. ppc_fpu_invalid_snan = (1 shl (32-7));
  26. }
  27. {$ifndef FPUNONE}
  28. procedure fpc_enable_ppc_fpu_exceptions;
  29. assembler; nostackframe;
  30. asm
  31. { clear all "exception happened" flags we care about}
  32. mtfsfi 0,0
  33. mtfsfi 1,0
  34. mtfsfi 2,0
  35. mtfsfi 3,0
  36. mtfsb0 21
  37. mtfsb0 22
  38. mtfsb0 23
  39. { enable invalid operations and division by zero exceptions. }
  40. { No overflow/underflow, since those give some spurious }
  41. { exceptions }
  42. mtfsfi 6,9
  43. end;
  44. procedure fpc_cpuinit;
  45. begin
  46. fpc_enable_ppc_fpu_exceptions;
  47. end;
  48. function fpc_get_ppc_fpscr: cardinal;
  49. assembler;
  50. var
  51. temp: record a,b:longint; end;
  52. asm
  53. mffs f0
  54. stfd f0,temp
  55. lwz r3,temp.b
  56. { clear all exception flags }
  57. {
  58. rlwinm r4,r3,0,16,31
  59. stw r4,temp.b
  60. lfd f0,temp
  61. a_mtfsf f0
  62. }
  63. end;
  64. { This function is never called directly, it's a dummy to hold the register save/
  65. load subroutines
  66. }
  67. {$ifndef MACOS}
  68. label
  69. _restfpr_14_x,
  70. _restfpr_15_x,
  71. _restfpr_16_x,
  72. _restfpr_17_x,
  73. _restfpr_18_x,
  74. _restfpr_19_x,
  75. _restfpr_20_x,
  76. _restfpr_21_x,
  77. _restfpr_22_x,
  78. _restfpr_23_x,
  79. _restfpr_24_x,
  80. _restfpr_25_x,
  81. _restfpr_26_x,
  82. _restfpr_27_x,
  83. _restfpr_28_x,
  84. _restfpr_29_x,
  85. _restfpr_30_x,
  86. _restfpr_31_x,
  87. _restfpr_14_l,
  88. _restfpr_15_l,
  89. _restfpr_16_l,
  90. _restfpr_17_l,
  91. _restfpr_18_l,
  92. _restfpr_19_l,
  93. _restfpr_20_l,
  94. _restfpr_21_l,
  95. _restfpr_22_l,
  96. _restfpr_23_l,
  97. _restfpr_24_l,
  98. _restfpr_25_l,
  99. _restfpr_26_l,
  100. _restfpr_27_l,
  101. _restfpr_28_l,
  102. _restfpr_29_l,
  103. _restfpr_30_l,
  104. _restfpr_31_l;
  105. procedure saverestorereg;assembler; nostackframe;
  106. asm
  107. { exit }
  108. .globl _restfpr_14_x
  109. _restfpr_14_x: lfd f14, -144(r11)
  110. .globl _restfpr_15_x
  111. _restfpr_15_x: lfd f15, -136(r11)
  112. .globl _restfpr_16_x
  113. _restfpr_16_x: lfd f16, -128(r11)
  114. .globl _restfpr_17_x
  115. _restfpr_17_x: lfd f17, -120(r11)
  116. .globl _restfpr_18_x
  117. _restfpr_18_x: lfd f18, -112(r11)
  118. .globl _restfpr_19_x
  119. _restfpr_19_x: lfd f19, -104(r11)
  120. .globl _restfpr_20_x
  121. _restfpr_20_x: lfd f20, -96(r11)
  122. .globl _restfpr_21_x
  123. _restfpr_21_x: lfd f21, -88(r11)
  124. .globl _restfpr_22_x
  125. _restfpr_22_x: lfd f22, -80(r11)
  126. .globl _restfpr_23_x
  127. _restfpr_23_x: lfd f23, -72(r11)
  128. .globl _restfpr_24_x
  129. _restfpr_24_x: lfd f24, -64(r11)
  130. .globl _restfpr_25_x
  131. _restfpr_25_x: lfd f25, -56(r11)
  132. .globl _restfpr_26_x
  133. _restfpr_26_x: lfd f26, -48(r11)
  134. .globl _restfpr_27_x
  135. _restfpr_27_x: lfd f27, -40(r11)
  136. .globl _restfpr_28_x
  137. _restfpr_28_x: lfd f28, -32(r11)
  138. .globl _restfpr_29_x
  139. _restfpr_29_x: lfd f29, -24(r11)
  140. .globl _restfpr_30_x
  141. _restfpr_30_x: lfd f30, -16(r11)
  142. .globl _restfpr_31_x
  143. _restfpr_31_x: lwz r0, 4(r11)
  144. lfd f31, -8(r11)
  145. mtlr r0
  146. ori r1, r11, 0
  147. blr
  148. { exit with restoring lr }
  149. .globl _restfpr_14_l
  150. _restfpr_14_l: lfd f14, -144(r11)
  151. .globl _restfpr_15_l
  152. _restfpr_15_l: lfd f15, -136(r11)
  153. .globl _restfpr_16_l
  154. _restfpr_16_l: lfd f16, -128(r11)
  155. .globl _restfpr_17_l
  156. _restfpr_17_l: lfd f17, -120(r11)
  157. .globl _restfpr_18_l
  158. _restfpr_18_l: lfd f18, -112(r11)
  159. .globl _restfpr_19_l
  160. _restfpr_19_l: lfd f19, -104(r11)
  161. .globl _restfpr_20_l
  162. _restfpr_20_l: lfd f20, -96(r11)
  163. .globl _restfpr_21_l
  164. _restfpr_21_l: lfd f21, -88(r11)
  165. .globl _restfpr_22_l
  166. _restfpr_22_l: lfd f22, -80(r11)
  167. .globl _restfpr_23_l
  168. _restfpr_23_l: lfd f23, -72(r11)
  169. .globl _restfpr_24_l
  170. _restfpr_24_l: lfd f24, -64(r11)
  171. .globl _restfpr_25_l
  172. _restfpr_25_l: lfd f25, -56(r11)
  173. .globl _restfpr_26_l
  174. _restfpr_26_l: lfd f26, -48(r11)
  175. .globl _restfpr_27_l
  176. _restfpr_27_l: lfd f27, -40(r11)
  177. .globl _restfpr_28_l
  178. _restfpr_28_l: lfd f28, -32(r11)
  179. .globl _restfpr_29_l
  180. _restfpr_29_l: lfd f29, -24(r11)
  181. .globl _restfpr_30_l
  182. _restfpr_30_l: lfd f30, -16(r11)
  183. .globl _restfpr_31_l
  184. _restfpr_31_l: lwz r0, 4(r11)
  185. lfd f31, -8(r11)
  186. mtlr r0
  187. ori r1, r11, 0
  188. blr
  189. end;
  190. {$endif MACOS}
  191. {$else}
  192. procedure fpc_cpuinit;
  193. begin
  194. end;
  195. {$endif}
  196. {****************************************************************************
  197. Move / Fill
  198. ****************************************************************************}
  199. {$ifndef FPC_SYSTEM_HAS_MOVE}
  200. {$define FPC_SYSTEM_HAS_MOVE}
  201. procedure Move(const source;var dest;count:longint);[public, alias: 'FPC_MOVE'];assembler; nostackframe;
  202. asm
  203. { count <= 0 ? }
  204. cmpwi cr0,r5,0
  205. { check if we have to do the move backwards because of overlap }
  206. sub r10,r4,r3
  207. { carry := boolean(dest-source < count) = boolean(overlap) }
  208. subc r10,r10,r5
  209. { count < 15 ? (to decide whether we will move dwords or bytes }
  210. cmpwi cr1,r5,15
  211. { if overlap, then r10 := -1 else r10 := 0 }
  212. subfe r10,r10,r10
  213. { count < 63 ? (32 + max. alignment (31) }
  214. cmpwi cr7,r5,63
  215. { if count <= 0, stop }
  216. ble cr0,.LMoveDone
  217. { load the begin of the source in the data cache }
  218. dcbt 0,r3
  219. { and the dest as well }
  220. dcbtst 0,r4
  221. { if overlap, then r0 := count else r0 := 0 }
  222. and r0,r5,r10
  223. { if overlap, then point source and dest to the end }
  224. add r3,r3,r0
  225. add r4,r4,r0
  226. { if overlap, then r6 := 0, else r6 := -1 }
  227. not r6,r10
  228. { if overlap, then r10 := -2, else r10 := 0 }
  229. slwi r10,r10,1
  230. { if overlap, then r10 := -1, else r10 := 1 }
  231. addi r10,r10,1
  232. { if count < 15, copy everything byte by byte }
  233. blt cr1,.LMoveBytes
  234. { if no overlap, then source/dest += -1, otherwise they stay }
  235. { After the next instruction, r3/r4 + r10 = next position to }
  236. { load/store from/to }
  237. add r3,r3,r6
  238. add r4,r4,r6
  239. { otherwise, guarantee 4 byte alignment for dest for starters }
  240. .LMove4ByteAlignLoop:
  241. lbzux r0,r3,r10
  242. stbux r0,r4,r10
  243. { is dest now 4 aligned? }
  244. andi. r0,r4,3
  245. subi r5,r5,1
  246. { while not aligned, continue }
  247. bne cr0,.LMove4ByteAlignLoop
  248. {$ifndef ppc603}
  249. { check for 32 byte alignment }
  250. andi. r7,r4,31
  251. {$endif non ppc603}
  252. { we are going to copy one byte again (the one at the newly }
  253. { aligned address), so increase count byte 1 }
  254. addi r5,r5,1
  255. { count div 4 for number of dwords to copy }
  256. srwi r0,r5,2
  257. { if 11 <= count < 63, copy using dwords }
  258. blt cr7,.LMoveDWords
  259. {$ifndef ppc603}
  260. { # of dwords to copy to reach 32 byte alignment (*4) }
  261. { (depends on forward/backward copy) }
  262. { if forward copy, r6 = -1 -> r8 := 32 }
  263. { if backward copy, r6 = 0 -> r8 := 0 }
  264. rlwinm r8,r6,0,31-6+1,31-6+1
  265. { if forward copy, we have to copy 32 - unaligned count bytes }
  266. { if backward copy unaligned count bytes }
  267. sub r7,r8,r7
  268. { if backward copy, the calculated value is now negate -> }
  269. { make it positive again }
  270. not r8, r6
  271. add r7, r7, r8
  272. xor r7, r7, r8
  273. {$endif not ppc603}
  274. { multiply the update count with 4 }
  275. slwi r10,r10,2
  276. slwi r6,r6,2
  277. { and adapt the source and dest }
  278. add r3,r3,r6
  279. add r4,r4,r6
  280. {$ifndef ppc603}
  281. beq cr0,.LMove32BytesAligned
  282. .L32BytesAlignMoveLoop:
  283. { count >= 39 -> align to 8 byte boundary and then use the FPU }
  284. { since we're already at 4 byte alignment, use dword store }
  285. subic. r7,r7,4
  286. lwzux r0,r3,r10
  287. subi r5,r5,4
  288. stwux r0,r4,r10
  289. bne .L32BytesAlignMoveLoop
  290. .LMove32BytesAligned:
  291. { count div 32 ( >= 1, since count was >=63 }
  292. srwi r0,r5,5
  293. { remainder }
  294. andi. r5,r5,31
  295. { to decide if we will do some dword stores (instead of only }
  296. { byte stores) afterwards or not }
  297. {$else not ppc603}
  298. srwi r0,r5,4
  299. andi. r5,r5,15
  300. {$endif not ppc603}
  301. cmpwi cr1,r5,11
  302. mtctr r0
  303. { r0 := count div 4, will be moved to ctr when copying dwords }
  304. srwi r0,r5,2
  305. {$if not defined(ppc603) and not defined(FPUNONE)}
  306. { adjust the update count: it will now be 8 or -8 depending on overlap }
  307. slwi r10,r10,1
  308. { adjust source and dest pointers: because of the above loop, dest is now }
  309. { aligned to 8 bytes. So if we add r6 we will still have an 8 bytes }
  310. { aligned address) }
  311. add r3,r3,r6
  312. add r4,r4,r6
  313. slwi r6,r6,1
  314. {$IFDEF USE_DCBZ}
  315. { the dcbz offset must give a 32 byte aligned address when added }
  316. { to the current dest address and its address must point to the }
  317. { bytes that will be overwritten in the current iteration. In case }
  318. { of a forward loop, the dest address has currently an offset of }
  319. { -8 compared to the bytes that will be overwritten (and r6 = -8). }
  320. { In case of a backward of a loop, the dest address currently has }
  321. { an offset of +32 compared to the bytes that will be overwritten }
  322. { (and r6 = 0). So the forward dcbz offset must become +8 and the }
  323. { backward -32 -> (-r6 * 5) - 32 gives the correct offset }
  324. slwi r7,r6,2
  325. add r7,r7,r6
  326. neg r7,r7
  327. subi r7,r7,32
  328. {$ENDIF USE_DCBZ}
  329. .LMove32ByteDcbz:
  330. lfdux f0,r3,r10
  331. lfdux f1,r3,r10
  332. lfdux f2,r3,r10
  333. lfdux f3,r3,r10
  334. {$IFDEF USE_DCBZ}
  335. { must be done only now, in case source and dest are less than }
  336. { 32 bytes apart! }
  337. dcbz r4,r7
  338. {$ENDIF USE_DCBZ}
  339. stfdux f0,r4,r10
  340. stfdux f1,r4,r10
  341. stfdux f2,r4,r10
  342. stfdux f3,r4,r10
  343. bdnz .LMove32ByteDcbz
  344. .LMove32ByteLoopDone:
  345. {$else not ppc603}
  346. .LMove16ByteLoop:
  347. lwzux r11,r3,r10
  348. lwzux r7,r3,r10
  349. lwzux r8,r3,r10
  350. lwzux r9,r3,r10
  351. stwux r11,r4,r10
  352. stwux r7,r4,r10
  353. stwux r8,r4,r10
  354. stwux r9,r4,r10
  355. bdnz .LMove16ByteLoop
  356. {$endif not ppc603}
  357. { cr0*4+eq is true if "count and 31" = 0 }
  358. beq cr0,.LMoveDone
  359. { make r10 again -1 or 1, but first adjust source/dest pointers }
  360. sub r3,r3,r6
  361. sub r4,r4,r6
  362. {$ifndef ppc603}
  363. srawi r10,r10,3
  364. srawi r6,r6,3
  365. {$else not ppc603}
  366. srawi r10,r10,2
  367. srawi r6,r6,2
  368. {$endif not ppc603}
  369. { cr1 contains whether count <= 11 }
  370. ble cr1,.LMoveBytes
  371. .LMoveDWords:
  372. mtctr r0
  373. andi. r5,r5,3
  374. { r10 * 4 }
  375. slwi r10,r10,2
  376. slwi r6,r6,2
  377. add r3,r3,r6
  378. add r4,r4,r6
  379. .LMoveDWordsLoop:
  380. lwzux r0,r3,r10
  381. stwux r0,r4,r10
  382. bdnz .LMoveDWordsLoop
  383. beq cr0,.LMoveDone
  384. { make r10 again -1 or 1 }
  385. sub r3,r3,r6
  386. sub r4,r4,r6
  387. srawi r10,r10,2
  388. srawi r6,r6,2
  389. .LMoveBytes:
  390. add r3,r3,r6
  391. add r4,r4,r6
  392. mtctr r5
  393. .LMoveBytesLoop:
  394. lbzux r0,r3,r10
  395. stbux r0,r4,r10
  396. bdnz .LMoveBytesLoop
  397. .LMoveDone:
  398. end;
  399. {$endif FPC_SYSTEM_HAS_MOVE}
  400. {$ifndef FPC_SYSTEM_HAS_FILLCHAR}
  401. {$define FPC_SYSTEM_HAS_FILLCHAR}
  402. Procedure FillChar(var x;count:longint;value:byte);assembler;
  403. { input: x in r3, count in r4, value in r5 }
  404. {$ifndef FPC_ABI_AIX}
  405. { in the AIX ABI, we can use te red zone for temp storage, otherwise we have }
  406. { to explicitely allocate room }
  407. var
  408. temp : packed record
  409. case byte of
  410. 0: (l1,l2: longint);
  411. {$ifndef FPUNONE}
  412. 1: (d: double);
  413. {$endif}
  414. end;
  415. {$endif FPC_ABI_AIX}
  416. asm
  417. { no bytes? }
  418. cmpwi cr6,r4,0
  419. { less than 15 bytes? }
  420. cmpwi cr7,r4,15
  421. { less than 64 bytes? }
  422. cmpwi cr1,r4,64
  423. { fill r5 with ValueValueValueValue }
  424. rlwimi r5,r5,8,16,23
  425. { setup for aligning x to multiple of 4}
  426. rlwinm r10,r3,0,31-2+1,31
  427. rlwimi r5,r5,16,0,15
  428. ble cr6,.LFillCharDone
  429. { get the start of the data in the cache (and mark it as "will be }
  430. { modified") }
  431. dcbtst 0,r3
  432. subfic r10,r10,4
  433. blt cr7,.LFillCharVerySmall
  434. { just store 4 bytes instead of using a loop to align (there are }
  435. { plenty of other instructions now to keep the processor busy }
  436. { while it handles the (possibly unaligned) store) }
  437. stw r5,0(r3)
  438. { r3 := align(r3,4) }
  439. add r3,r3,r10
  440. { decrease count with number of bytes already stored }
  441. sub r4,r4,r10
  442. {$IFNDEF FPUNONE}
  443. blt cr1,.LFillCharSmall
  444. {$IFDEF USE_DCBZ}
  445. { if we have to fill with 0 (which happens a lot), we can simply use }
  446. { dcbz for the most part, which is very fast, so make a special case }
  447. { for that }
  448. cmplwi cr1,r5,0
  449. {$ENDIF}
  450. { align to a multiple of 32 (and immediately check whether we aren't }
  451. { already 32 byte aligned) }
  452. rlwinm. r10,r3,0,31-5+1,31
  453. { setup r3 for using update forms of store instructions }
  454. subi r3,r3,4
  455. { get number of bytes to store }
  456. subfic r10,r10,32
  457. { if already 32byte aligned, skip align loop }
  458. beq .L32ByteAlignLoopDone
  459. { substract from the total count }
  460. sub r4,r4,r10
  461. .L32ByteAlignLoop:
  462. { we were already aligned to 4 byres, so this will count down to }
  463. { exactly 0 }
  464. subic. r10,r10,4
  465. stwu r5,4(r3)
  466. bne .L32ByteAlignLoop
  467. .L32ByteAlignLoopDone:
  468. { get the amount of 32 byte blocks }
  469. srwi r10,r4,5
  470. { and keep the rest in r4 (recording whether there is any rest) }
  471. rlwinm. r4,r4,0,31-5+1,31
  472. { move to ctr }
  473. mtctr r10
  474. { check how many rest there is (to decide whether we'll use }
  475. { FillCharSmall or FillCharVerySmall) }
  476. cmplwi cr7,r4,11
  477. {$IFDEF USE_DCBZ}
  478. { if filling with zero, only use dcbz }
  479. bne cr1, .LFillCharNoZero
  480. { make r3 point again to the actual store position }
  481. addi r3,r3,4
  482. .LFillCharDCBZLoop:
  483. dcbz 0,r3
  484. addi r3,r3,32
  485. bdnz .LFillCharDCBZLoop
  486. { if there was no rest, we're finished }
  487. beq .LFillCharDone
  488. b .LFillCharVerySmall
  489. {$ENDIF USE_DCBZ}
  490. .LFillCharNoZero:
  491. {$ifdef FPC_ABI_AIX}
  492. stw r5,-4(r1)
  493. stw r5,-8(r1)
  494. lfd f0,-8(r1)
  495. {$else FPC_ABI_AIX}
  496. stw r5,temp
  497. stw r5,temp+4
  498. lfd f0,temp
  499. {$endif FPC_ABI_AIX}
  500. { make r3 point to address-8, so we're able to use fp double stores }
  501. { with update (it's already -4 now) }
  502. subi r3,r3,4
  503. {$IFDEF USE_DCBZ}
  504. { load r10 with 8, so that dcbz uses the correct address }
  505. li r10, 8
  506. {$ENDIF}
  507. .LFillChar32ByteLoop:
  508. {$IFDEF USE_DCBZ}
  509. dcbz r3,r10
  510. {$ENDIF USE_DCBZ}
  511. stfdu f0,8(r3)
  512. stfdu f0,8(r3)
  513. stfdu f0,8(r3)
  514. stfdu f0,8(r3)
  515. bdnz .LFillChar32ByteLoop
  516. { if there was no rest, we're finished }
  517. beq .LFillCharDone
  518. { make r3 point again to the actual next byte that must be written }
  519. addi r3,r3,8
  520. b .LFillCharVerySmall
  521. .LFillCharSmall:
  522. {$ENDIF FPUNONE}
  523. { when we arrive here, we're already 4 byte aligned }
  524. { get count div 4 to store dwords }
  525. srwi r10,r4,2
  526. { get ready for use of update stores }
  527. subi r3,r3,4
  528. mtctr r10
  529. rlwinm. r4,r4,0,31-2+1,31
  530. .LFillCharSmallLoop:
  531. stwu r5,4(r3)
  532. bdnz .LFillCharSmallLoop
  533. { if nothing left, stop }
  534. beq .LFillCharDone
  535. { get ready to store bytes }
  536. addi r3,r3,4
  537. .LFillCharVerySmall:
  538. mtctr r4
  539. subi r3,r3,1
  540. .LFillCharVerySmallLoop:
  541. stbu r5,1(r3)
  542. bdnz .LFillCharVerySmallLoop
  543. .LFillCharDone:
  544. end;
  545. {$endif FPC_SYSTEM_HAS_FILLCHAR}
  546. {$ifndef FPC_SYSTEM_HAS_FILLDWORD}
  547. {$define FPC_SYSTEM_HAS_FILLDWORD}
  548. procedure filldword(var x;count : longint;value : dword);
  549. assembler; nostackframe;
  550. asm
  551. { registers:
  552. r3 x
  553. r4 count
  554. r5 value
  555. }
  556. cmpwi cr0,r4,0
  557. mtctr r4
  558. subi r3,r3,4
  559. ble .LFillDWordEnd //if count<=0 Then Exit
  560. .LFillDWordLoop:
  561. stwu r5,4(r3)
  562. bdnz .LFillDWordLoop
  563. .LFillDWordEnd:
  564. end;
  565. {$endif FPC_SYSTEM_HAS_FILLDWORD}
  566. {$ifndef FPC_SYSTEM_HAS_INDEXBYTE}
  567. {$define FPC_SYSTEM_HAS_INDEXBYTE}
  568. function IndexByte(const buf;len:longint;b:byte):longint; assembler; nostackframe;
  569. { input: r3 = buf, r4 = len, r5 = b }
  570. { output: r3 = position of b in buf (-1 if not found) }
  571. asm
  572. { load the begin of the buffer in the data cache }
  573. dcbt 0,r3
  574. cmplwi r4,0
  575. mtctr r4
  576. subi r10,r3,1
  577. mr r0,r3
  578. { assume not found }
  579. li r3,-1
  580. ble .LIndexByteDone
  581. .LIndexByteLoop:
  582. lbzu r9,1(r10)
  583. cmplw r9,r5
  584. bdnzf cr0*4+eq,.LIndexByteLoop
  585. { r3 still contains -1 here }
  586. bne .LIndexByteDone
  587. sub r3,r10,r0
  588. .LIndexByteDone:
  589. end;
  590. {$endif FPC_SYSTEM_HAS_INDEXBYTE}
  591. {$ifndef FPC_SYSTEM_HAS_INDEXWORD}
  592. {$define FPC_SYSTEM_HAS_INDEXWORD}
  593. function IndexWord(const buf;len:longint;b:word):longint; assembler; nostackframe;
  594. { input: r3 = buf, r4 = len, r5 = b }
  595. { output: r3 = position of b in buf (-1 if not found) }
  596. asm
  597. { load the begin of the buffer in the data cache }
  598. dcbt 0,r3
  599. cmplwi r4,0
  600. mtctr r4
  601. subi r10,r3,2
  602. mr r0,r3
  603. { assume not found }
  604. li r3,-1
  605. ble .LIndexWordDone
  606. .LIndexWordLoop:
  607. lhzu r9,2(r10)
  608. cmplw r9,r5
  609. bdnzf cr0*4+eq,.LIndexWordLoop
  610. { r3 still contains -1 here }
  611. bne .LIndexWordDone
  612. sub r3,r10,r0
  613. srawi r3,r3,1
  614. .LIndexWordDone:
  615. end;
  616. {$endif FPC_SYSTEM_HAS_INDEXWORD}
  617. {$ifndef FPC_SYSTEM_HAS_INDEXDWORD}
  618. {$define FPC_SYSTEM_HAS_INDEXDWORD}
  619. function IndexDWord(const buf;len:longint;b:DWord):longint; assembler; nostackframe;
  620. { input: r3 = buf, r4 = len, r5 = b }
  621. { output: r3 = position of b in buf (-1 if not found) }
  622. asm
  623. { load the begin of the buffer in the data cache }
  624. dcbt 0,r3
  625. cmplwi r4,0
  626. mtctr r4
  627. subi r10,r3,4
  628. mr r0,r3
  629. { assume not found }
  630. li r3,-1
  631. ble .LIndexDWordDone
  632. .LIndexDWordLoop:
  633. lwzu r9,4(r10)
  634. cmplw r9,r5
  635. bdnzf cr0*4+eq, .LIndexDWordLoop
  636. { r3 still contains -1 here }
  637. bne .LIndexDWordDone
  638. sub r3,r10,r0
  639. srawi r3,r3,2
  640. .LIndexDWordDone:
  641. end;
  642. {$endif FPC_SYSTEM_HAS_INDEXDWORD}
  643. {$ifndef FPC_SYSTEM_HAS_COMPAREBYTE}
  644. {$define FPC_SYSTEM_HAS_COMPAREBYTE}
  645. function CompareByte(const buf1,buf2;len:longint):longint; assembler; nostackframe;
  646. { input: r3 = buf1, r4 = buf2, r5 = len }
  647. { output: r3 = 0 if equal, < 0 if buf1 < str2, > 0 if buf1 > str2 }
  648. { note: almost direct copy of strlcomp() from strings.inc }
  649. asm
  650. { load the begin of the first buffer in the data cache }
  651. dcbt 0,r3
  652. { use r0 instead of r3 for buf1 since r3 contains result }
  653. cmplwi r5,0
  654. mtctr r5
  655. subi r11,r3,1
  656. subi r4,r4,1
  657. li r3,0
  658. ble .LCompByteDone
  659. .LCompByteLoop:
  660. { load next chars }
  661. lbzu r9,1(r11)
  662. lbzu r10,1(r4)
  663. { calculate difference }
  664. sub. r3,r9,r10
  665. { if chars not equal or at the end, we're ready }
  666. bdnzt cr0*4+eq, .LCompByteLoop
  667. .LCompByteDone:
  668. end;
  669. {$endif FPC_SYSTEM_HAS_COMPAREBYTE}
  670. {$ifndef FPC_SYSTEM_HAS_COMPAREWORD}
  671. {$define FPC_SYSTEM_HAS_COMPAREWORD}
  672. function CompareWord(const buf1,buf2;len:longint):longint; assembler; nostackframe;
  673. { input: r3 = buf1, r4 = buf2, r5 = len }
  674. { output: r3 = 0 if equal, < 0 if buf1 < str2, > 0 if buf1 > str2 }
  675. { note: almost direct copy of strlcomp() from strings.inc }
  676. asm
  677. { load the begin of the first buffer in the data cache }
  678. dcbt 0,r3
  679. { use r0 instead of r3 for buf1 since r3 contains result }
  680. cmplwi r5,0
  681. mtctr r5
  682. subi r11,r3,2
  683. subi r4,r4,2
  684. li r3,0
  685. ble .LCompWordDone
  686. .LCompWordLoop:
  687. { load next chars }
  688. lhzu r9,2(r11)
  689. lhzu r10,2(r4)
  690. { calculate difference }
  691. sub. r3,r9,r10
  692. { if chars not equal or at the end, we're ready }
  693. bdnzt cr0*4+eq, .LCompWordLoop
  694. .LCompWordDone:
  695. end;
  696. {$endif FPC_SYSTEM_HAS_COMPAREWORD}
  697. {$ifndef FPC_SYSTEM_HAS_COMPAREDWORD}
  698. {$define FPC_SYSTEM_HAS_COMPAREDWORD}
  699. function CompareDWord(const buf1,buf2;len:longint):longint; assembler; nostackframe;
  700. { input: r3 = buf1, r4 = buf2, r5 = len }
  701. { output: r3 = 0 if equal, < 0 if buf1 < str2, > 0 if buf1 > str2 }
  702. { note: almost direct copy of strlcomp() from strings.inc }
  703. asm
  704. { load the begin of the first buffer in the data cache }
  705. dcbt 0,r3
  706. { use r0 instead of r3 for buf1 since r3 contains result }
  707. cmplwi r5,0
  708. mtctr r5
  709. subi r11,r3,4
  710. subi r4,r4,4
  711. li r3,0
  712. ble .LCompDWordDone
  713. .LCompDWordLoop:
  714. { load next chars }
  715. lwzu r9,4(r11)
  716. lwzu r10,4(r4)
  717. { calculate difference }
  718. sub. r0,r9,r10
  719. { if chars not equal or at the end, we're ready }
  720. bdnzt cr0*4+eq, .LCompDWordLoop
  721. .LCompDWordDone:
  722. cmplw cr1,r9,r10
  723. beq .Ldone
  724. { since these were two dwords, we have to perform an additional }
  725. { unsigned comparison and set the result accordingly }
  726. bgt cr1,.Lpos
  727. li r3,-2
  728. .Lpos:
  729. addi r3,r3,1
  730. .Ldone:
  731. end;
  732. {$endif FPC_SYSTEM_HAS_COMPAREDWORD}
  733. {$ifndef FPC_SYSTEM_HAS_INDEXCHAR0}
  734. {$define FPC_SYSTEM_HAS_INDEXCHAR0}
  735. function IndexChar0(const buf;len:longint;b:Char):longint; assembler; nostackframe;
  736. { input: r3 = buf, r4 = len, r5 = b }
  737. { output: r3 = position of found position (-1 if not found) }
  738. asm
  739. { load the begin of the buffer in the data cache }
  740. dcbt 0,r3
  741. { length = 0? }
  742. cmplwi r4,0
  743. mtctr r4
  744. subi r9,r3,1
  745. subi r0,r3,1
  746. { assume not found }
  747. li r3,-1
  748. { if yes, do nothing }
  749. ble .LIndexChar0Done
  750. .LIndexChar0Loop:
  751. lbzu r10,1(r9)
  752. cmplwi cr1,r10,0
  753. cmplw r10,r5
  754. beq cr1,.LIndexChar0Done
  755. bdnzf cr0*4+eq, .LIndexChar0Loop
  756. bne .LIndexChar0Done
  757. sub r3,r9,r0
  758. .LIndexChar0Done:
  759. end;
  760. {$endif FPC_SYSTEM_HAS_INDEXCHAR0}
  761. {****************************************************************************
  762. String
  763. ****************************************************************************}
  764. {$ifndef STR_CONCAT_PROCS}
  765. (*
  766. {$ifndef FPC_SYSTEM_HAS_FPC_SHORTSTR_CONCAT}
  767. {$define FPC_SYSTEM_HAS_FPC_SHORTSTR_CONCAT}
  768. function fpc_shortstr_concat(const s1, s2: shortstring): shortstring; compilerproc; [public, alias: 'FPC_SHORTSTR_CONCAT'];
  769. { expects that (r3) contains a pointer to the result r4 to s1, r5 to s2 }
  770. assembler;
  771. asm
  772. { load length s1 }
  773. lbz r6, 0(r4)
  774. { load length s2 }
  775. lbz r10, 0(r5)
  776. { length 0 for s1? }
  777. cmplwi cr7,r6,0
  778. { length 255 for s1? }
  779. subfic. r7,r6,255
  780. { length 0 for s2? }
  781. cmplwi cr1,r10,0
  782. { calculate min(length(s2),255-length(s1)) }
  783. subc r8,r7,r10 { r8 := r7 - r10 }
  784. cror 4*6+2,4*1+2,4*7+2
  785. subfe r7,r7,r7 { if r7 >= r10 then r7' := 0 else r7' := -1 }
  786. mtctr r6
  787. and r7,r8,r7 { if r7 >= r10 then r7' := 0 else r7' := r7-r10 }
  788. add r7,r7,r10 { if r7 >= r10 then r7' := r10 else r7' := r7 }
  789. mr r9,r3
  790. { calculate length of final string }
  791. add r8,r7,r6
  792. stb r8,0(r3)
  793. beq cr7, .Lcopys1loopDone
  794. .Lcopys1loop:
  795. lbzu r0,1(r4)
  796. stbu r0,1(r9)
  797. bdnz .Lcopys1loop
  798. .Lcopys1loopDone:
  799. mtctr r7
  800. beq cr6, .LconcatDone
  801. .Lcopys2loop:
  802. lbzu r0,1(r5)
  803. stbu r0,1(r9)
  804. bdnz .Lcopys2loop
  805. end;
  806. {$endif FPC_SYSTEM_HAS_FPC_SHORTSTR_CONCAT}
  807. *)
  808. {$ifndef FPC_SYSTEM_HAS_FPC_SHORTSTR_APPEND_SHORTSTR}
  809. {$define FPC_SYSTEM_HAS_FPC_SHORTSTR_APPEND_SHORTSTR}
  810. procedure fpc_shortstr_append_shortstr(var s1: shortstring; const s2: shortstring); compilerproc;
  811. { expects that results (r3) contains a pointer to the current string s1, r4 }
  812. { high(s1) and (r5) a pointer to the one that has to be concatenated }
  813. assembler; nostackframe;
  814. asm
  815. { load length s1 }
  816. lbz r6, 0(r3)
  817. { load length s2 }
  818. lbz r10, 0(r5)
  819. { length 0? }
  820. cmplw cr1,r6,r4
  821. cmplwi r10,0
  822. { calculate min(length(s2),high(result)-length(result)) }
  823. sub r9,r4,r6
  824. subc r8,r9,r10 { r8 := r9 - r10 }
  825. cror 4*7+2,4*0+2,4*1+2
  826. subfe r9,r9,r9 { if r9 >= r10 then r9' := 0 else r9' := -1 }
  827. and r9,r8,r9 { if r9 >= r10 then r9' := 0 else r9' := r9-r10 }
  828. add r9,r9,r10 { if r9 >= r10 then r9' := r10 else r9' := r9 }
  829. { calculate new length }
  830. add r10,r6,r9
  831. { load value to copy in ctr }
  832. mtctr r9
  833. { store new length }
  834. stb r10,0(r3)
  835. { go to last current character of result }
  836. add r3,r6,r3
  837. { if nothing to do, exit }
  838. beq cr7, .LShortStrAppendDone
  839. { and concatenate }
  840. .LShortStrAppendLoop:
  841. lbzu r10,1(r5)
  842. stbu r10,1(r3)
  843. bdnz .LShortStrAppendLoop
  844. .LShortStrAppendDone:
  845. end;
  846. {$endif FPC_SYSTEM_HAS_FPC_SHORTSTR_APPEND_SHORTSTR}
  847. {$endif STR_CONCAT_PROCS}
  848. (*
  849. {$define FPC_SYSTEM_HAS_FPC_SHORTSTR_COMPARE}
  850. function fpc_shortstr_compare(const dstr,sstr:shortstring): longint; [public,alias:'FPC_SHORTSTR_COMPARE']; compilerproc;
  851. assembler;
  852. asm
  853. { load length sstr }
  854. lbz r9,0(r4)
  855. { load length dstr }
  856. lbz r10,0(r3)
  857. { save their difference for later and }
  858. { calculate min(length(sstr),length(dstr)) }
  859. subfc r7,r10,r9 { r0 := r9 - r10 }
  860. subfe r9,r9,r9 { if r9 >= r10 then r9' := 0 else r9' := -1 }
  861. and r7,r7,r9 { if r9 >= r10 then r9' := 0 else r9' := r9-r8 }
  862. add r9,r10,r7 { if r9 >= r10 then r9' := r10 else r9' := r9 }
  863. { first compare dwords (length/4) }
  864. srwi. r5,r9,2
  865. { keep length mod 4 for the ends }
  866. rlwinm r9,r9,0,30,31
  867. { already check whether length mod 4 = 0 }
  868. cmplwi cr1,r9,0
  869. { so we can load r3 with 0, in case the strings both have length 0 }
  870. mr r8,r3
  871. li r3, 0
  872. { length div 4 in ctr for loop }
  873. mtctr r5
  874. { if length < 3, goto byte comparing }
  875. beq LShortStrCompare1
  876. { setup for use of update forms of load/store with dwords }
  877. subi r4,r4,3
  878. subi r8,r8,3
  879. LShortStrCompare4Loop:
  880. lwzu r3,4(r4)
  881. lwzu r10,4(r8)
  882. sub. r3,r3,r10
  883. bdnzt cr0+eq,LShortStrCompare4Loop
  884. { r3 contains result if we stopped because of "ne" flag }
  885. bne LShortStrCompareDone
  886. { setup for use of update forms of load/store with bytes }
  887. addi r4,r4,3
  888. addi r8,r8,3
  889. LShortStrCompare1:
  890. { if comparelen mod 4 = 0, skip this and return the difference in }
  891. { lengths }
  892. beq cr1,LShortStrCompareLen
  893. mtctr r9
  894. LShortStrCompare1Loop:
  895. lbzu r3,1(r4)
  896. lbzu r10,1(r8)
  897. sub. r3,r3,r10
  898. bdnzt cr0+eq,LShortStrCompare1Loop
  899. bne LShortStrCompareDone
  900. LShortStrCompareLen:
  901. { also return result in flags, maybe we can use this in the CG }
  902. mr. r3,r3
  903. LShortStrCompareDone:
  904. end;
  905. *)
  906. {$ifndef FPC_SYSTEM_HAS_FPC_PCHAR_TO_SHORTSTR}
  907. {$define FPC_SYSTEM_HAS_FPC_PCHAR_TO_SHORTSTR}
  908. {$ifndef FPC_STRTOSHORTSTRINGPROC}
  909. function fpc_pchar_to_shortstr(p:pchar):shortstring;[public,alias:'FPC_PCHAR_TO_SHORTSTR']; compilerproc; assembler; nostackframe;
  910. {$else FPC_STRTOSHORTSTRINGPROC}
  911. procedure fpc_pchar_to_shortstr(out res : shortstring;p:pchar);assembler;[public,alias:'FPC_PCHAR_TO_SHORTSTR']; compilerproc; nostackframe;
  912. {$define FPC_STRPASPROC}
  913. {$endif FPC_STRTOSHORTSTRINGPROC}
  914. {$include strpas.inc}
  915. {$undef FPC_STRPASPROC}
  916. {$endif FPC_SYSTEM_HAS_FPC_PCHAR_TO_SHORTSTR}
  917. {$ifndef FPC_SYSTEM_HAS_FPC_PCHAR_LENGTH}
  918. {$define FPC_SYSTEM_HAS_FPC_PCHAR_LENGTH}
  919. function fpc_pchar_length(p:pchar):longint;assembler;[public,alias:'FPC_PCHAR_LENGTH']; compilerproc; nostackframe;
  920. {$include strlen.inc}
  921. {$endif FPC_SYSTEM_HAS_FPC_PCHAR_LENGTH}
  922. {$define FPC_SYSTEM_HAS_GET_FRAME}
  923. function get_frame:pointer;assembler;{$ifdef SYSTEMINLINE}inline;{$endif} nostackframe;
  924. asm
  925. { all abi's I know use r1 as stack pointer }
  926. mr r3, r1
  927. end;
  928. {NOTE: On MACOS, 68000 code might call powerpc code, through the MixedMode manager,
  929. (even in the OS in system 9). The pointer to the switching stack frame is then
  930. indicated by the first bit set to 1. This is checked below.}
  931. {Both routines below assumes that framebp is a valid framepointer or nil.}
  932. {$define FPC_SYSTEM_HAS_GET_CALLER_ADDR}
  933. function get_caller_addr(framebp:pointer):pointer;assembler;{$ifdef SYSTEMINLINE}inline;{$endif} nostackframe;
  934. asm
  935. cmplwi r3,0
  936. beq .Lcaller_addr_invalid
  937. lwz r3,0(r3)
  938. cmplwi r3,0
  939. beq .Lcaller_addr_invalid
  940. {$ifdef MACOS}
  941. rlwinm r4,r3,0,31,31
  942. cmpwi r4,0
  943. bne cr0,.Lcaller_addr_invalid
  944. {$endif MACOS}
  945. {$ifdef FPC_ABI_AIX}
  946. lwz r3,8(r3)
  947. {$else FPC_ABI_AIX}
  948. lwz r3,4(r3)
  949. {$endif FPC_ABI_AIX}
  950. blr
  951. .Lcaller_addr_invalid:
  952. li r3,0
  953. end;
  954. {$define FPC_SYSTEM_HAS_GET_CALLER_FRAME}
  955. function get_caller_frame(framebp:pointer):pointer;assembler;{$ifdef SYSTEMINLINE}inline;{$endif} nostackframe;
  956. asm
  957. cmplwi r3,0
  958. beq .Lcaller_frame_invalid
  959. lwz r3,0(r3)
  960. {$ifdef MACOS}
  961. rlwinm r4,r3,0,31,31
  962. cmpwi r4,0
  963. bne cr0,.Lcaller_frame_invalid
  964. {$endif MACOS}
  965. blr
  966. .Lcaller_frame_invalid:
  967. li r3,0
  968. end;
  969. {$define FPC_SYSTEM_HAS_SPTR}
  970. Function Sptr : Pointer;assembler;{$ifdef SYSTEMINLINE}inline;{$endif} nostackframe;
  971. asm
  972. mr r3,r1
  973. end;
  974. {****************************************************************************
  975. Str()
  976. ****************************************************************************}
  977. { int_str: generic implementation is used for now }
  978. {****************************************************************************
  979. Multithreading
  980. ****************************************************************************}
  981. { do a thread save inc/dec }
  982. {$define FPC_SYSTEM_HAS_DECLOCKED_LONGINT}
  983. function declocked(var l : longint) : boolean;assembler;nostackframe;
  984. { input: address of l in r3 }
  985. { output: boolean indicating whether l is zero after decrementing }
  986. asm
  987. .LDecLockedLoop:
  988. lwarx r10,0,r3
  989. subi r10,r10,1
  990. stwcx. r10,0,r3
  991. bne- .LDecLockedLoop
  992. cntlzw r3,r10
  993. srwi r3,r3,5
  994. end;
  995. {$define FPC_SYSTEM_HAS_INCLOCKED_LONGINT}
  996. procedure inclocked(var l : longint);assembler;nostackframe;
  997. asm
  998. .LIncLockedLoop:
  999. lwarx r10,0,r3
  1000. addi r10,r10,1
  1001. stwcx. r10,0,r3
  1002. bne- .LIncLockedLoop
  1003. end;
  1004. function InterLockedDecrement (var Target: longint) : longint; assembler; nostackframe;
  1005. { input: address of target in r3 }
  1006. { output: target-1 in r3 }
  1007. { side-effect: target := target-1 }
  1008. asm
  1009. .LInterLockedDecLoop:
  1010. lwarx r10,0,r3
  1011. subi r10,r10,1
  1012. stwcx. r10,0,r3
  1013. bne .LInterLockedDecLoop
  1014. mr r3,r10
  1015. end;
  1016. function InterLockedIncrement (var Target: longint) : longint; assembler; nostackframe;
  1017. { input: address of target in r3 }
  1018. { output: target+1 in r3 }
  1019. { side-effect: target := target+1 }
  1020. asm
  1021. .LInterLockedIncLoop:
  1022. lwarx r10,0,r3
  1023. addi r10,r10,1
  1024. stwcx. r10,0,r3
  1025. bne .LInterLockedIncLoop
  1026. mr r3,r10
  1027. end;
  1028. function InterLockedExchange (var Target: longint;Source : longint) : longint; assembler; nostackframe;
  1029. { input: address of target in r3, source in r4 }
  1030. { output: target in r3 }
  1031. { side-effect: target := source }
  1032. asm
  1033. .LInterLockedXchgLoop:
  1034. lwarx r10,0,r3
  1035. stwcx. r4,0,r3
  1036. bne .LInterLockedXchgLoop
  1037. mr r3,r10
  1038. end;
  1039. function InterLockedExchangeAdd (var Target: longint;Source : longint) : longint; assembler; nostackframe;
  1040. asm
  1041. .LInterLockedXchgAddLoop:
  1042. lwarx r10,0,r3
  1043. add r10,r10,r4
  1044. stwcx. r10,0,r3
  1045. bne .LInterLockedXchgAddLoop
  1046. sub r3,r10,r4
  1047. end;
  1048. function InterlockedCompareExchange(var Target: longint; NewValue: longint; Comperand: longint): longint; assembler; nostackframe;
  1049. { input: address of target in r3, newvalue in r4, comparand in r5 }
  1050. { output: value stored in target before entry of the function }
  1051. { side-effect: NewValue stored in target if (target = comparand) }
  1052. asm
  1053. .LInterlockedCompareExchangeLoop:
  1054. lwarx r10,0,r3
  1055. sub r9,r10,r5
  1056. addic r9,r9,-1
  1057. subfe r9,r9,r9
  1058. and r8,r4,r9
  1059. andc r7,r5,r9
  1060. or r6,r7,r8
  1061. stwcx. r6,0,r3
  1062. bne .LInterlockedCompareExchangeLoop
  1063. mr r3, r10
  1064. end;
  1065. {$IFDEF MORPHOS}
  1066. { this is only required for MorphOS }
  1067. {$define FPC_SYSTEM_HAS_SYSINITFPU}
  1068. procedure SysInitFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  1069. var tmp: array[0..1] of dword;
  1070. begin
  1071. asm
  1072. { setting fpu to round to nearest mode }
  1073. li r3,0
  1074. stw r3,8(r1)
  1075. stw r3,12(r1)
  1076. lfd f1,8(r1)
  1077. mtfsf 7,f1
  1078. end;
  1079. { powerpc might use softfloat code }
  1080. softfloat_exception_flags:=0;
  1081. softfloat_exception_mask:=float_flag_underflow or float_flag_inexact or float_flag_denormal;
  1082. end;
  1083. {$define FPC_SYSTEM_HAS_SYSRESETFPU}
  1084. procedure SysResetFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  1085. begin
  1086. softfloat_exception_flags:=0;
  1087. end;
  1088. {$ENDIF}
  1089. {$ifndef FPC_SYSTEM_HAS_MEM_BARRIER}
  1090. {$define FPC_SYSTEM_HAS_MEM_BARRIER}
  1091. procedure ReadBarrier;assembler;nostackframe;{$ifdef SYSTEMINLINE}inline;{$endif}
  1092. asm
  1093. sync
  1094. end;
  1095. procedure ReadDependencyBarrier;{$ifdef SYSTEMINLINE}inline;{$endif}
  1096. begin
  1097. { reads imply barrier on earlier reads depended on }
  1098. end;
  1099. procedure ReadWriteBarrier;assembler;nostackframe;{$ifdef SYSTEMINLINE}inline;{$endif}
  1100. asm
  1101. sync
  1102. end;
  1103. procedure WriteBarrier;assembler;nostackframe;{$ifdef SYSTEMINLINE}inline;{$endif}
  1104. asm
  1105. eieio
  1106. end;
  1107. {$endif}