daopt386.pas 95 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  3. development team
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. unit daopt386;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. cclasses,aasmbase,aasmtai,aasmcpu,cgbase,cgutils,
  25. cpubase,optbase;
  26. {******************************* Constants *******************************}
  27. const
  28. { Possible register content types }
  29. con_Unknown = 0;
  30. con_ref = 1;
  31. con_const = 2;
  32. { The contents aren't usable anymore for CSE, but they may still be }
  33. { usefull for detecting whether the result of a load is actually used }
  34. con_invalid = 3;
  35. { the reverse of the above (in case a (conditional) jump is encountered): }
  36. { CSE is still possible, but the original instruction can't be removed }
  37. con_noRemoveRef = 4;
  38. { same, but for constants }
  39. con_noRemoveConst = 5;
  40. const
  41. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  42. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  43. OS_16,OS_32,OS_64,
  44. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  45. OS_M32,
  46. OS_ADDR,OS_NO,OS_NO,
  47. OS_NO,OS_NO);
  48. {********************************* Types *********************************}
  49. type
  50. TRegArray = Array[RS_EAX..RS_ESP] of tsuperregister;
  51. TRegSet = Set of RS_EAX..RS_ESP;
  52. toptreginfo = Record
  53. NewRegsEncountered, OldRegsEncountered: TRegSet;
  54. RegsLoadedForRef: TRegSet;
  55. lastReload: array[RS_EAX..RS_ESP] of tai;
  56. New2OldReg: TRegArray;
  57. end;
  58. {possible actions on an operand: read, write or modify (= read & write)}
  59. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  60. {the possible states of a flag}
  61. TFlagContents = (F_Unknown, F_notSet, F_Set);
  62. TContent = Packed Record
  63. {start and end of block instructions that defines the
  64. content of this register.}
  65. StartMod: tai;
  66. MemWrite: taicpu;
  67. {how many instructions starting with StarMod does the block consist of}
  68. NrOfMods: Word;
  69. {the type of the content of the register: unknown, memory, constant}
  70. Typ: Byte;
  71. case byte of
  72. {starts at 0, gets increased everytime the register is written to}
  73. 1: (WState: Byte;
  74. {starts at 0, gets increased everytime the register is read from}
  75. RState: Byte);
  76. { to compare both states in one operation }
  77. 2: (state: word);
  78. end;
  79. {Contents of the integer registers}
  80. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  81. {contents of the FPU registers}
  82. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  83. {$ifdef tempOpts}
  84. { linked list which allows searching/deleting based on value, no extra frills}
  85. PSearchLinkedListItem = ^TSearchLinkedListItem;
  86. TSearchLinkedListItem = object(TLinkedList_Item)
  87. constructor init;
  88. function equals(p: PSearchLinkedListItem): boolean; virtual;
  89. end;
  90. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  91. TSearchDoubleIntItem = object(TLinkedList_Item)
  92. constructor init(_int1,_int2: longint);
  93. function equals(p: PSearchLinkedListItem): boolean; virtual;
  94. private
  95. int1, int2: longint;
  96. end;
  97. PSearchLinkedList = ^TSearchLinkedList;
  98. TSearchLinkedList = object(TLinkedList)
  99. function searchByValue(p: PSearchLinkedListItem): boolean;
  100. procedure removeByValue(p: PSearchLinkedListItem);
  101. end;
  102. {$endif tempOpts}
  103. {information record with the contents of every register. Every tai object
  104. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  105. TtaiProp = Record
  106. Regs: TRegContent;
  107. { FPURegs: TRegFPUContent;} {currently not yet used}
  108. { allocated Registers }
  109. UsedRegs: TRegSet;
  110. { status of the direction flag }
  111. DirFlag: TFlagContents;
  112. {$ifdef tempOpts}
  113. { currently used temps }
  114. tempAllocs: PSearchLinkedList;
  115. {$endif tempOpts}
  116. { can this instruction be removed? }
  117. CanBeRemoved: Boolean;
  118. { are the resultflags set by this instruction used? }
  119. FlagsUsed: Boolean;
  120. end;
  121. ptaiprop = ^TtaiProp;
  122. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  123. PtaiPropBlock = ^TtaiPropBlock;
  124. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  125. TLabelTableItem = Record
  126. taiObj: tai;
  127. {$ifDef JumpAnal}
  128. InstrNr: Longint;
  129. RefsFound: Word;
  130. JmpsProcessed: Word
  131. {$endif JumpAnal}
  132. end;
  133. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  134. PLabelTable = ^TLabelTable;
  135. {*********************** procedures and functions ************************}
  136. procedure InsertLLItem(AsmL: TAAsmOutput; prev, foll, new_one: TLinkedListItem);
  137. function RefsEqual(const R1, R2: TReference): Boolean;
  138. function isgp32reg(supreg: tsuperregister): Boolean;
  139. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  140. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  141. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  142. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  143. function reginop(supreg: tsuperregister; const o:toper): boolean;
  144. function instrWritesFlags(p: tai): boolean;
  145. function instrReadsFlags(p: tai): boolean;
  146. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  147. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  148. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  149. const c: tcontent): boolean;
  150. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  151. const c: tcontent; var memwritedestroyed: boolean): boolean;
  152. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  153. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  154. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  155. procedure SkipHead(var p: tai);
  156. function labelCanBeSkipped(p: tai_label): boolean;
  157. procedure RemoveLastDeallocForFuncRes(asmL: TAAsmOutput; p: tai);
  158. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  159. hp: tai): boolean;
  160. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  161. procedure AllocRegBetween(asml: taasmoutput; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  162. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  163. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  164. function sizescompatible(loadsize,newsize: topsize): boolean;
  165. function OpsEqual(const o1,o2:toper): Boolean;
  166. type
  167. tdfaobj = class
  168. constructor create(_list: taasmoutput); virtual;
  169. function pass_1(_blockstart: tai): tai;
  170. function pass_2: boolean;
  171. procedure clear;
  172. function getlabelwithsym(sym: tasmlabel): tai;
  173. private
  174. { Walks through the list to find the lowest and highest label number, inits the }
  175. { labeltable and fixes/optimizes some regallocs }
  176. procedure initlabeltable;
  177. function initdfapass2: boolean;
  178. procedure dodfapass2;
  179. { asm list we're working on }
  180. list: taasmoutput;
  181. { current part of the asm list }
  182. blockstart, blockend: tai;
  183. { the amount of taiObjects in the current part of the assembler list }
  184. nroftaiobjs: longint;
  185. { Array which holds all TtaiProps }
  186. taipropblock: ptaipropblock;
  187. { all labels in the current block: their value mapped to their location }
  188. lolab, hilab, labdif: longint;
  189. labeltable: plabeltable;
  190. end;
  191. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  192. procedure incState(var S: Byte; amount: longint);
  193. {******************************* Variables *******************************}
  194. var
  195. dfa: tdfaobj;
  196. {*********************** end of Interface section ************************}
  197. Implementation
  198. Uses
  199. {$ifdef csdebug}
  200. cutils,
  201. {$else}
  202. {$ifdef statedebug}
  203. cutils,
  204. {$else}
  205. {$ifdef allocregdebug}
  206. cutils,
  207. {$endif}
  208. {$endif}
  209. {$endif}
  210. globals, systems, verbose, symconst, cgobj,procinfo;
  211. Type
  212. TRefCompare = function(const r1, r2: treference; size1, size2: tcgsize): boolean;
  213. var
  214. {How many instructions are between the current instruction and the last one
  215. that modified the register}
  216. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  217. {$ifdef tempOpts}
  218. constructor TSearchLinkedListItem.init;
  219. begin
  220. end;
  221. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  222. begin
  223. equals := false;
  224. end;
  225. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  226. begin
  227. int1 := _int1;
  228. int2 := _int2;
  229. end;
  230. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  231. begin
  232. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  233. (TSearchDoubleIntItem(p).int2 = int2);
  234. end;
  235. function TSearchLinkedList.searchByValue(p: PSearchLinkedListItem): boolean;
  236. var temp: PSearchLinkedListItem;
  237. begin
  238. temp := first;
  239. while (temp <> last.next) and
  240. not(temp.equals(p)) do
  241. temp := temp.next;
  242. searchByValue := temp <> last.next;
  243. end;
  244. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  245. begin
  246. temp := first;
  247. while (temp <> last.next) and
  248. not(temp.equals(p)) do
  249. temp := temp.next;
  250. if temp <> last.next then
  251. begin
  252. remove(temp);
  253. dispose(temp,done);
  254. end;
  255. end;
  256. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  257. {updates UsedRegs with the RegAlloc Information coming after p}
  258. begin
  259. repeat
  260. while assigned(p) and
  261. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  262. ((p.typ = ait_label) and
  263. labelCanBeSkipped(tai_label(current)))) Do
  264. p := tai(p.next);
  265. while assigned(p) and
  266. (p.typ=ait_RegAlloc) Do
  267. begin
  268. case tai_regalloc(p).ratype of
  269. ra_alloc :
  270. UsedRegs := UsedRegs + [tai_regalloc(p).reg];
  271. ra_dealloc :
  272. UsedRegs := UsedRegs - [tai_regalloc(p).reg];
  273. end;
  274. p := tai(p.next);
  275. end;
  276. until not(assigned(p)) or
  277. (not(p.typ in SkipInstr) and
  278. not((p.typ = ait_label) and
  279. labelCanBeSkipped(tai_label(current))));
  280. end;
  281. {$endif tempOpts}
  282. {************************ Create the Label table ************************}
  283. function findregalloc(supreg: tsuperregister; starttai: tai; ratyp: tregalloctype): boolean;
  284. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  285. { starting with Starttai and ending with the next "real" instruction }
  286. begin
  287. findregalloc := false;
  288. repeat
  289. while assigned(starttai) and
  290. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  291. ((starttai.typ = ait_label) and
  292. labelcanbeskipped(tai_label(starttai)))) do
  293. starttai := tai(starttai.next);
  294. if assigned(starttai) and
  295. (starttai.typ = ait_regalloc) then
  296. begin
  297. if (tai_regalloc(Starttai).ratype = ratyp) and
  298. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  299. begin
  300. findregalloc:=true;
  301. break;
  302. end;
  303. starttai := tai(starttai.next);
  304. end
  305. else
  306. break;
  307. until false;
  308. end;
  309. procedure RemoveLastDeallocForFuncRes(asml: taasmoutput; p: tai);
  310. procedure DoRemoveLastDeallocForFuncRes(asml: taasmoutput; supreg: tsuperregister);
  311. var
  312. hp2: tai;
  313. begin
  314. hp2 := p;
  315. repeat
  316. hp2 := tai(hp2.previous);
  317. if assigned(hp2) and
  318. (hp2.typ = ait_regalloc) and
  319. (tai_regalloc(hp2).ratype=ra_dealloc) and
  320. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  321. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  322. begin
  323. asml.remove(hp2);
  324. hp2.free;
  325. break;
  326. end;
  327. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  328. end;
  329. begin
  330. case current_procinfo.procdef.rettype.def.deftype of
  331. arraydef,recorddef,pointerdef,
  332. stringdef,enumdef,procdef,objectdef,errordef,
  333. filedef,setdef,procvardef,
  334. classrefdef,forwarddef:
  335. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  336. orddef:
  337. if current_procinfo.procdef.rettype.def.size <> 0 then
  338. begin
  339. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  340. { for int64/qword }
  341. if current_procinfo.procdef.rettype.def.size = 8 then
  342. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  343. end;
  344. end;
  345. end;
  346. procedure getNoDeallocRegs(var regs: tregset);
  347. var
  348. regCounter: TSuperRegister;
  349. begin
  350. regs := [];
  351. case current_procinfo.procdef.rettype.def.deftype of
  352. arraydef,recorddef,pointerdef,
  353. stringdef,enumdef,procdef,objectdef,errordef,
  354. filedef,setdef,procvardef,
  355. classrefdef,forwarddef:
  356. regs := [RS_EAX];
  357. orddef:
  358. if current_procinfo.procdef.rettype.def.size <> 0 then
  359. begin
  360. regs := [RS_EAX];
  361. { for int64/qword }
  362. if current_procinfo.procdef.rettype.def.size = 8 then
  363. regs := regs + [RS_EDX];
  364. end;
  365. end;
  366. for regCounter := RS_EAX to RS_EBX do
  367. { if not(regCounter in rg.usableregsint) then}
  368. include(regs,regcounter);
  369. end;
  370. procedure AddRegDeallocFor(asml: taasmoutput; reg: tregister; p: tai);
  371. var
  372. hp1: tai;
  373. funcResRegs: tregset;
  374. funcResReg: boolean;
  375. begin
  376. { if not(supreg in rg.usableregsint) then
  377. exit;}
  378. { if not(supreg in [RS_EDI]) then
  379. exit;}
  380. getNoDeallocRegs(funcresregs);
  381. { funcResRegs := funcResRegs - rg.usableregsint;}
  382. { funcResRegs := funcResRegs - [RS_EDI];}
  383. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  384. funcResReg := getsupreg(reg) in funcresregs;
  385. hp1 := p;
  386. {
  387. while not(funcResReg and
  388. (p.typ = ait_instruction) and
  389. (taicpu(p).opcode = A_JMP) and
  390. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  391. getLastInstruction(p, p) and
  392. not(regInInstruction(supreg, p)) do
  393. hp1 := p;
  394. }
  395. { don't insert a dealloc for registers which contain the function result }
  396. { if they are followed by a jump to the exit label (for exit(...)) }
  397. { if not(funcResReg) or
  398. not((hp1.typ = ait_instruction) and
  399. (taicpu(hp1).opcode = A_JMP) and
  400. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  401. begin
  402. p := tai_regalloc.deAlloc(reg,nil);
  403. insertLLItem(AsmL, hp1.previous, hp1, p);
  404. end;
  405. end;
  406. {************************ Search the Label table ************************}
  407. function findlabel(l: tasmlabel; var hp: tai): boolean;
  408. {searches for the specified label starting from hp as long as the
  409. encountered instructions are labels, to be able to optimize constructs like
  410. jne l2 jmp l2
  411. jmp l3 and l1:
  412. l1: l2:
  413. l2:}
  414. var
  415. p: tai;
  416. begin
  417. p := hp;
  418. while assigned(p) and
  419. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  420. if (p.typ <> ait_Label) or
  421. (tai_label(p).l <> l) then
  422. GetNextInstruction(p, p)
  423. else
  424. begin
  425. hp := p;
  426. findlabel := true;
  427. exit
  428. end;
  429. findlabel := false;
  430. end;
  431. {************************ Some general functions ************************}
  432. function tch2reg(ch: tinschange): tsuperregister;
  433. {converts a TChange variable to a TRegister}
  434. const
  435. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  436. begin
  437. if (ch <= CH_REDI) then
  438. tch2reg := ch2reg[ch]
  439. else if (ch <= CH_WEDI) then
  440. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  441. else if (ch <= CH_RWEDI) then
  442. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  443. else if (ch <= CH_MEDI) then
  444. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  445. else
  446. InternalError($db)
  447. end;
  448. { inserts new_one between prev and foll }
  449. procedure InsertLLItem(AsmL: TAAsmOutput; prev, foll, new_one: TLinkedListItem);
  450. begin
  451. if assigned(prev) then
  452. if assigned(foll) then
  453. begin
  454. if assigned(new_one) then
  455. begin
  456. new_one.previous := prev;
  457. new_one.next := foll;
  458. prev.next := new_one;
  459. foll.previous := new_one;
  460. { shgould we update line information }
  461. if (not (tai(new_one).typ in SkipLineInfo)) and
  462. (not (tai(foll).typ in SkipLineInfo)) then
  463. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  464. end;
  465. end
  466. else
  467. asml.Concat(new_one)
  468. else
  469. if assigned(foll) then
  470. asml.Insert(new_one)
  471. end;
  472. {********************* Compare parts of tai objects *********************}
  473. function regssamesize(reg1, reg2: tregister): boolean;
  474. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  475. 8bit, 16bit or 32bit)}
  476. begin
  477. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  478. internalerror(2003111602);
  479. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  480. end;
  481. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  482. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  483. OldReg and NewReg have the same size (has to be chcked in advance with
  484. RegsSameSize) and that neither equals RS_INVALID}
  485. var
  486. newsupreg, oldsupreg: tsuperregister;
  487. begin
  488. if (newreg = NR_NO) or (oldreg = NR_NO) then
  489. internalerror(2003111601);
  490. newsupreg := getsupreg(newreg);
  491. oldsupreg := getsupreg(oldreg);
  492. with RegInfo Do
  493. begin
  494. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  495. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  496. New2OldReg[newsupreg] := oldsupreg;
  497. end;
  498. end;
  499. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  500. begin
  501. case o.typ Of
  502. top_reg:
  503. if (o.reg <> NR_NO) then
  504. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  505. top_ref:
  506. begin
  507. if o.ref^.base <> NR_NO then
  508. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  509. if o.ref^.index <> NR_NO then
  510. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  511. end;
  512. end;
  513. end;
  514. function RegsEquivalent(oldreg, newreg: tregister; const oldinst, newinst: taicpu; var reginfo: toptreginfo; opact: topaction): Boolean;
  515. begin
  516. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  517. if RegsSameSize(oldreg, newreg) then
  518. with reginfo do
  519. {here we always check for the 32 bit component, because it is possible that
  520. the 8 bit component has not been set, event though NewReg already has been
  521. processed. This happens if it has been compared with a register that doesn't
  522. have an 8 bit component (such as EDI). in that case the 8 bit component is
  523. still set to RS_NO and the comparison in the else-part will fail}
  524. if (getsupreg(oldReg) in OldRegsEncountered) then
  525. if (getsupreg(NewReg) in NewRegsEncountered) then
  526. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  527. { if we haven't encountered the new register yet, but we have encountered the
  528. old one already, the new one can only be correct if it's being written to
  529. (and consequently the old one is also being written to), otherwise
  530. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  531. movl (%eax), %eax movl (%edx), %edx
  532. are considered equivalent}
  533. else
  534. if (opact = opact_write) then
  535. begin
  536. AddReg2RegInfo(oldreg, newreg, reginfo);
  537. RegsEquivalent := true
  538. end
  539. else
  540. Regsequivalent := false
  541. else
  542. if not(getsupreg(newreg) in NewRegsEncountered) and
  543. ((opact = opact_write) or
  544. ((newreg = oldreg) and
  545. (ptaiprop(oldinst.optinfo)^.regs[getsupreg(oldreg)].wstate =
  546. ptaiprop(newinst.optinfo)^.regs[getsupreg(oldreg)].wstate) and
  547. not(regmodifiedbyinstruction(getsupreg(oldreg),oldinst)))) then
  548. begin
  549. AddReg2RegInfo(oldreg, newreg, reginfo);
  550. RegsEquivalent := true
  551. end
  552. else
  553. RegsEquivalent := false
  554. else
  555. RegsEquivalent := false
  556. else
  557. RegsEquivalent := oldreg = newreg
  558. end;
  559. function RefsEquivalent(const r1, r2: treference; const oldinst, newinst: taicpu; var regInfo: toptreginfo): boolean;
  560. begin
  561. RefsEquivalent :=
  562. (r1.offset = r2.offset) and
  563. RegsEquivalent(r1.base, r2.base, oldinst, newinst, reginfo, OpAct_Read) and
  564. RegsEquivalent(r1.index, r2.index, oldinst, newinst, reginfo, OpAct_Read) and
  565. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  566. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  567. (r1.relsymbol = r2.relsymbol);
  568. end;
  569. function refsequal(const r1, r2: treference): boolean;
  570. begin
  571. refsequal :=
  572. (r1.offset = r2.offset) and
  573. (r1.segment = r2.segment) and (r1.base = r2.base) and
  574. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  575. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  576. (r1.relsymbol = r2.relsymbol);
  577. end;
  578. {$ifdef q+}
  579. {$q-}
  580. {$define overflowon}
  581. {$endif q+}
  582. // checks whether a write to r2 of size "size" contains address r1
  583. function refsoverlapping(const r1, r2: treference; size1, size2: tcgsize): boolean;
  584. var
  585. realsize1, realsize2: aint;
  586. begin
  587. realsize1 := tcgsize2size[size1];
  588. realsize2 := tcgsize2size[size2];
  589. refsoverlapping :=
  590. (r2.offset <= r1.offset+realsize1) and
  591. (r1.offset <= r2.offset+realsize2) and
  592. (r1.segment = r2.segment) and (r1.base = r2.base) and
  593. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  594. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  595. (r1.relsymbol = r2.relsymbol);
  596. end;
  597. {$ifdef overflowon}
  598. {$q+}
  599. {$undef overflowon}
  600. {$endif overflowon}
  601. function isgp32reg(supreg: tsuperregister): boolean;
  602. {Checks if the register is a 32 bit general purpose register}
  603. begin
  604. isgp32reg := false;
  605. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  606. isgp32reg := true
  607. end;
  608. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  609. begin {checks whether ref contains a reference to reg}
  610. reginref :=
  611. ((ref.base <> NR_NO) and
  612. (getsupreg(ref.base) = supreg)) or
  613. ((ref.index <> NR_NO) and
  614. (getsupreg(ref.index) = supreg))
  615. end;
  616. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  617. var
  618. p: taicpu;
  619. opcount: longint;
  620. begin
  621. RegReadByInstruction := false;
  622. if hp.typ <> ait_instruction then
  623. exit;
  624. p := taicpu(hp);
  625. case p.opcode of
  626. A_CALL:
  627. regreadbyinstruction := true;
  628. A_IMUL:
  629. case p.ops of
  630. 1:
  631. regReadByInstruction :=
  632. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  633. 2,3:
  634. regReadByInstruction :=
  635. reginop(supreg,p.oper[0]^) or
  636. reginop(supreg,p.oper[1]^);
  637. end;
  638. A_IDIV,A_DIV,A_MUL:
  639. begin
  640. regReadByInstruction :=
  641. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  642. end;
  643. else
  644. begin
  645. for opcount := 0 to p.ops-1 do
  646. if (p.oper[opCount]^.typ = top_ref) and
  647. reginref(supreg,p.oper[opcount]^.ref^) then
  648. begin
  649. RegReadByInstruction := true;
  650. exit
  651. end;
  652. for opcount := 1 to maxinschanges do
  653. case insprop[p.opcode].ch[opcount] of
  654. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  655. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  656. begin
  657. RegReadByInstruction := true;
  658. exit
  659. end;
  660. CH_RWOP1,CH_ROP1,CH_MOP1:
  661. if //(p.oper[0]^.typ = top_reg) and
  662. reginop(supreg,p.oper[0]^) then
  663. begin
  664. RegReadByInstruction := true;
  665. exit
  666. end;
  667. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  668. if //(p.oper[1]^.typ = top_reg) and
  669. reginop(supreg,p.oper[1]^) then
  670. begin
  671. RegReadByInstruction := true;
  672. exit
  673. end;
  674. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  675. if //(p.oper[2]^.typ = top_reg) and
  676. reginop(supreg,p.oper[2]^) then
  677. begin
  678. RegReadByInstruction := true;
  679. exit
  680. end;
  681. end;
  682. end;
  683. end;
  684. end;
  685. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  686. { Checks if reg is used by the instruction p1 }
  687. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  688. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  689. var
  690. p: taicpu;
  691. opcount: longint;
  692. begin
  693. regInInstruction := false;
  694. if p1.typ <> ait_instruction then
  695. exit;
  696. p := taicpu(p1);
  697. case p.opcode of
  698. A_CALL:
  699. regininstruction := true;
  700. A_IMUL:
  701. case p.ops of
  702. 1:
  703. regInInstruction :=
  704. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  705. 2,3:
  706. regInInstruction :=
  707. reginop(supreg,p.oper[0]^) or
  708. reginop(supreg,p.oper[1]^) or
  709. (assigned(p.oper[2]) and
  710. reginop(supreg,p.oper[2]^));
  711. end;
  712. A_IDIV,A_DIV,A_MUL:
  713. regInInstruction :=
  714. reginop(supreg,p.oper[0]^) or
  715. (supreg in [RS_EAX,RS_EDX])
  716. else
  717. begin
  718. for opcount := 0 to p.ops-1 do
  719. if (p.oper[opCount]^.typ = top_ref) and
  720. reginref(supreg,p.oper[opcount]^.ref^) then
  721. begin
  722. regInInstruction := true;
  723. exit
  724. end;
  725. for opcount := 1 to maxinschanges do
  726. case insprop[p.opcode].Ch[opCount] of
  727. CH_REAX..CH_MEDI:
  728. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  729. begin
  730. regInInstruction := true;
  731. exit;
  732. end;
  733. CH_ROp1..CH_MOp1:
  734. if reginop(supreg,p.oper[0]^) then
  735. begin
  736. regInInstruction := true;
  737. exit
  738. end;
  739. Ch_ROp2..Ch_MOp2:
  740. if reginop(supreg,p.oper[1]^) then
  741. begin
  742. regInInstruction := true;
  743. exit
  744. end;
  745. Ch_ROp3..Ch_MOp3:
  746. if reginop(supreg,p.oper[2]^) then
  747. begin
  748. regInInstruction := true;
  749. exit
  750. end;
  751. end;
  752. end;
  753. end;
  754. end;
  755. function reginop(supreg: tsuperregister; const o:toper): boolean;
  756. begin
  757. reginop := false;
  758. case o.typ Of
  759. top_reg:
  760. reginop :=
  761. (getregtype(o.reg) = R_INTREGISTER) and
  762. (supreg = getsupreg(o.reg));
  763. top_ref:
  764. reginop :=
  765. ((o.ref^.base <> NR_NO) and
  766. (supreg = getsupreg(o.ref^.base))) or
  767. ((o.ref^.index <> NR_NO) and
  768. (supreg = getsupreg(o.ref^.index)));
  769. end;
  770. end;
  771. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  772. var
  773. InstrProp: TInsProp;
  774. TmpResult: Boolean;
  775. Cnt: Word;
  776. begin
  777. TmpResult := False;
  778. if supreg = RS_INVALID then
  779. exit;
  780. if (p1.typ = ait_instruction) then
  781. case taicpu(p1).opcode of
  782. A_IMUL:
  783. With taicpu(p1) Do
  784. TmpResult :=
  785. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  786. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  787. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  788. A_DIV, A_IDIV, A_MUL:
  789. With taicpu(p1) Do
  790. TmpResult :=
  791. (supreg in [RS_EAX,RS_EDX]);
  792. else
  793. begin
  794. Cnt := 1;
  795. InstrProp := InsProp[taicpu(p1).OpCode];
  796. while (Cnt <= maxinschanges) and
  797. (InstrProp.Ch[Cnt] <> Ch_None) and
  798. not(TmpResult) Do
  799. begin
  800. case InstrProp.Ch[Cnt] Of
  801. Ch_WEAX..Ch_MEDI:
  802. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  803. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  804. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  805. reginop(supreg,taicpu(p1).oper[0]^);
  806. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  807. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  808. reginop(supreg,taicpu(p1).oper[1]^);
  809. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  810. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  811. reginop(supreg,taicpu(p1).oper[2]^);
  812. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  813. Ch_ALL: TmpResult := true;
  814. end;
  815. inc(Cnt)
  816. end
  817. end
  818. end;
  819. RegModifiedByInstruction := TmpResult
  820. end;
  821. function instrWritesFlags(p: tai): boolean;
  822. var
  823. l: longint;
  824. begin
  825. instrWritesFlags := true;
  826. case p.typ of
  827. ait_instruction:
  828. begin
  829. for l := 1 to maxinschanges do
  830. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  831. exit;
  832. end;
  833. ait_label:
  834. exit;
  835. end;
  836. instrWritesFlags := false;
  837. end;
  838. function instrReadsFlags(p: tai): boolean;
  839. var
  840. l: longint;
  841. begin
  842. instrReadsFlags := true;
  843. case p.typ of
  844. ait_instruction:
  845. begin
  846. for l := 1 to maxinschanges do
  847. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  848. exit;
  849. end;
  850. ait_label:
  851. exit;
  852. end;
  853. instrReadsFlags := false;
  854. end;
  855. {********************* GetNext and GetLastInstruction *********************}
  856. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  857. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  858. { next tai object in Next. Returns false if there isn't any }
  859. begin
  860. repeat
  861. if (Current.typ = ait_marker) and
  862. (tai_Marker(current).Kind = AsmBlockStart) then
  863. begin
  864. GetNextInstruction := False;
  865. Next := Nil;
  866. Exit
  867. end;
  868. Current := tai(current.Next);
  869. while assigned(Current) and
  870. ((current.typ in skipInstr) or
  871. ((current.typ = ait_label) and
  872. labelCanBeSkipped(tai_label(current)))) do
  873. Current := tai(current.Next);
  874. { if assigned(Current) and
  875. (current.typ = ait_Marker) and
  876. (tai_Marker(current).Kind = NoPropInfoStart) then
  877. begin
  878. while assigned(Current) and
  879. ((current.typ <> ait_Marker) or
  880. (tai_Marker(current).Kind <> NoPropInfoend)) Do
  881. Current := tai(current.Next);
  882. end;}
  883. until not(assigned(Current)) or
  884. (current.typ <> ait_Marker) or
  885. not(tai_Marker(current).Kind in [NoPropInfoStart,NoPropInfoend]);
  886. Next := Current;
  887. if assigned(Current) and
  888. not((current.typ in SkipInstr) or
  889. ((current.typ = ait_label) and
  890. labelCanBeSkipped(tai_label(current))))
  891. then
  892. GetNextInstruction :=
  893. not((current.typ = ait_marker) and
  894. (tai_marker(current).kind = asmBlockStart))
  895. else
  896. begin
  897. GetNextInstruction := False;
  898. Next := nil;
  899. end;
  900. end;
  901. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  902. {skips the ait-types in SkipInstr puts the previous tai object in
  903. Last. Returns false if there isn't any}
  904. begin
  905. repeat
  906. Current := tai(current.previous);
  907. while assigned(Current) and
  908. (((current.typ = ait_Marker) and
  909. not(tai_Marker(current).Kind in [AsmBlockend{,NoPropInfoend}])) or
  910. (current.typ in SkipInstr) or
  911. ((current.typ = ait_label) and
  912. labelCanBeSkipped(tai_label(current)))) Do
  913. Current := tai(current.previous);
  914. { if assigned(Current) and
  915. (current.typ = ait_Marker) and
  916. (tai_Marker(current).Kind = NoPropInfoend) then
  917. begin
  918. while assigned(Current) and
  919. ((current.typ <> ait_Marker) or
  920. (tai_Marker(current).Kind <> NoPropInfoStart)) Do
  921. Current := tai(current.previous);
  922. end;}
  923. until not(assigned(Current)) or
  924. (current.typ <> ait_Marker) or
  925. not(tai_Marker(current).Kind in [NoPropInfoStart,NoPropInfoend]);
  926. if not(assigned(Current)) or
  927. (current.typ in SkipInstr) or
  928. ((current.typ = ait_label) and
  929. labelCanBeSkipped(tai_label(current))) or
  930. ((current.typ = ait_Marker) and
  931. (tai_Marker(current).Kind = AsmBlockend))
  932. then
  933. begin
  934. Last := nil;
  935. GetLastInstruction := False
  936. end
  937. else
  938. begin
  939. Last := Current;
  940. GetLastInstruction := True;
  941. end;
  942. end;
  943. procedure SkipHead(var p: tai);
  944. var
  945. oldp: tai;
  946. begin
  947. repeat
  948. oldp := p;
  949. if (p.typ in SkipInstr) or
  950. ((p.typ = ait_marker) and
  951. (tai_Marker(p).Kind in [AsmBlockend,inlinestart,inlineend])) then
  952. GetNextInstruction(p,p)
  953. else if ((p.Typ = Ait_Marker) and
  954. (tai_Marker(p).Kind = nopropinfostart)) then
  955. {a marker of the NoPropInfoStart can't be the first instruction of a
  956. TAAsmoutput list}
  957. GetNextInstruction(tai(p.previous),p);
  958. until p = oldp
  959. end;
  960. function labelCanBeSkipped(p: tai_label): boolean;
  961. begin
  962. labelCanBeSkipped := not(p.l.is_used) or p.l.is_addr;
  963. end;
  964. {******************* The Data Flow Analyzer functions ********************}
  965. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  966. hp: tai): boolean;
  967. { assumes reg is a 32bit register }
  968. var
  969. p: taicpu;
  970. begin
  971. if not assigned(hp) or
  972. (hp.typ <> ait_instruction) then
  973. begin
  974. regLoadedWithNewValue := false;
  975. exit;
  976. end;
  977. p := taicpu(hp);
  978. regLoadedWithNewValue :=
  979. (((p.opcode = A_MOV) or
  980. (p.opcode = A_MOVZX) or
  981. (p.opcode = A_MOVSX) or
  982. (p.opcode = A_LEA)) and
  983. (p.oper[1]^.typ = top_reg) and
  984. (getsupreg(p.oper[1]^.reg) = supreg) and
  985. (canDependOnPrevValue or
  986. (p.oper[0]^.typ <> top_ref) or
  987. not regInRef(supreg,p.oper[0]^.ref^)) or
  988. ((p.opcode = A_POP) and
  989. (getsupreg(p.oper[0]^.reg) = supreg)));
  990. end;
  991. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  992. {updates UsedRegs with the RegAlloc Information coming after p}
  993. begin
  994. repeat
  995. while assigned(p) and
  996. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  997. ((p.typ = ait_label) and
  998. labelCanBeSkipped(tai_label(p))) or
  999. ((p.typ = ait_marker) and
  1000. (tai_Marker(p).Kind in [AsmBlockend,inlinestart,inlineend]))) do
  1001. p := tai(p.next);
  1002. while assigned(p) and
  1003. (p.typ=ait_RegAlloc) Do
  1004. begin
  1005. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1006. begin
  1007. case tai_regalloc(p).ratype of
  1008. ra_alloc :
  1009. UsedRegs := UsedRegs + [getsupreg(tai_regalloc(p).reg)];
  1010. ra_dealloc :
  1011. UsedRegs := UsedRegs - [getsupreg(tai_regalloc(p).reg)];
  1012. end;
  1013. end;
  1014. p := tai(p.next);
  1015. end;
  1016. until not(assigned(p)) or
  1017. (not(p.typ in SkipInstr) and
  1018. not((p.typ = ait_label) and
  1019. labelCanBeSkipped(tai_label(p))));
  1020. end;
  1021. procedure AllocRegBetween(asml: taasmoutput; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  1022. { allocates register reg between (and including) instructions p1 and p2 }
  1023. { the type of p1 and p2 must not be in SkipInstr }
  1024. { note that this routine is both called from the peephole optimizer }
  1025. { where optinfo is not yet initialised) and from the cse (where it is) }
  1026. var
  1027. hp, start: tai;
  1028. removedsomething,
  1029. firstRemovedWasAlloc,
  1030. lastRemovedWasDealloc: boolean;
  1031. supreg: tsuperregister;
  1032. begin
  1033. {$ifdef EXTDEBUG}
  1034. if assigned(p1.optinfo) and
  1035. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1036. internalerror(2004101010);
  1037. {$endif EXTDEBUG}
  1038. start := p1;
  1039. if (reg = NR_ESP) or
  1040. (reg = current_procinfo.framepointer) or
  1041. not(assigned(p1)) then
  1042. { this happens with registers which are loaded implicitely, outside the }
  1043. { current block (e.g. esi with self) }
  1044. exit;
  1045. supreg := getsupreg(reg);
  1046. { make sure we allocate it for this instruction }
  1047. getnextinstruction(p2,p2);
  1048. lastRemovedWasDealloc := false;
  1049. removedSomething := false;
  1050. firstRemovedWasAlloc := false;
  1051. {$ifdef allocregdebug}
  1052. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1053. ' from here...'));
  1054. insertllitem(asml,p1.previous,p1,hp);
  1055. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1056. ' till here...'));
  1057. insertllitem(asml,p2,p2.next,hp);
  1058. {$endif allocregdebug}
  1059. if not(supreg in initialusedregs) then
  1060. begin
  1061. hp := tai_regalloc.alloc(reg,nil);
  1062. insertllItem(asmL,p1.previous,p1,hp);
  1063. end;
  1064. while assigned(p1) and
  1065. (p1 <> p2) do
  1066. begin
  1067. if assigned(p1.optinfo) then
  1068. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1069. p1 := tai(p1.next);
  1070. repeat
  1071. while assigned(p1) and
  1072. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1073. p1 := tai(p1.next);
  1074. { remove all allocation/deallocation info about the register in between }
  1075. if assigned(p1) and
  1076. (p1.typ = ait_regalloc) then
  1077. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1078. begin
  1079. if not removedSomething then
  1080. begin
  1081. firstRemovedWasAlloc := tai_regalloc(p1).ratype=ra_alloc;
  1082. removedSomething := true;
  1083. end;
  1084. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1085. hp := tai(p1.Next);
  1086. asml.Remove(p1);
  1087. p1.free;
  1088. p1 := hp;
  1089. end
  1090. else p1 := tai(p1.next);
  1091. until not(assigned(p1)) or
  1092. not(p1.typ in SkipInstr);
  1093. end;
  1094. if assigned(p1) then
  1095. begin
  1096. if firstRemovedWasAlloc then
  1097. begin
  1098. hp := tai_regalloc.Alloc(reg,nil);
  1099. insertLLItem(asmL,start.previous,start,hp);
  1100. end;
  1101. if lastRemovedWasDealloc then
  1102. begin
  1103. hp := tai_regalloc.DeAlloc(reg,nil);
  1104. insertLLItem(asmL,p1.previous,p1,hp);
  1105. end;
  1106. end;
  1107. end;
  1108. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1109. var
  1110. hp: tai;
  1111. first: boolean;
  1112. begin
  1113. findregdealloc := false;
  1114. first := true;
  1115. while assigned(p.previous) and
  1116. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1117. ((tai(p.previous).typ = ait_label) and
  1118. labelCanBeSkipped(tai_label(p.previous)))) do
  1119. begin
  1120. p := tai(p.previous);
  1121. if (p.typ = ait_regalloc) and
  1122. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1123. if (tai_regalloc(p).ratype=ra_dealloc) then
  1124. if first then
  1125. begin
  1126. findregdealloc := true;
  1127. break;
  1128. end
  1129. else
  1130. begin
  1131. findRegDealloc :=
  1132. getNextInstruction(p,hp) and
  1133. regLoadedWithNewValue(supreg,false,hp);
  1134. break
  1135. end
  1136. else
  1137. first := false;
  1138. end
  1139. end;
  1140. procedure incState(var S: Byte; amount: longint);
  1141. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1142. errors}
  1143. begin
  1144. if (s <= $ff - amount) then
  1145. inc(s, amount)
  1146. else s := longint(s) + amount - $ff;
  1147. end;
  1148. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1149. { Content is the sequence of instructions that describes the contents of }
  1150. { seqReg. reg is being overwritten by the current instruction. if the }
  1151. { content of seqReg depends on reg (ie. because of a }
  1152. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1153. var
  1154. p: tai;
  1155. Counter: Word;
  1156. TmpResult: Boolean;
  1157. RegsChecked: TRegSet;
  1158. begin
  1159. RegsChecked := [];
  1160. p := Content.StartMod;
  1161. TmpResult := False;
  1162. Counter := 1;
  1163. while not(TmpResult) and
  1164. (Counter <= Content.NrOfMods) Do
  1165. begin
  1166. if (p.typ = ait_instruction) and
  1167. ((taicpu(p).opcode = A_MOV) or
  1168. (taicpu(p).opcode = A_MOVZX) or
  1169. (taicpu(p).opcode = A_MOVSX) or
  1170. (taicpu(p).opcode = A_LEA)) and
  1171. (taicpu(p).oper[0]^.typ = top_ref) then
  1172. With taicpu(p).oper[0]^.ref^ Do
  1173. if ((base = current_procinfo.FramePointer) or
  1174. (assigned(symbol) and (base = NR_NO))) and
  1175. (index = NR_NO) then
  1176. begin
  1177. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1178. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1179. break;
  1180. end
  1181. else
  1182. tmpResult :=
  1183. regReadByInstruction(supreg,p) and
  1184. regModifiedByInstruction(seqReg,p)
  1185. else
  1186. tmpResult :=
  1187. regReadByInstruction(supreg,p) and
  1188. regModifiedByInstruction(seqReg,p);
  1189. inc(Counter);
  1190. GetNextInstruction(p,p)
  1191. end;
  1192. sequenceDependsonReg := TmpResult
  1193. end;
  1194. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1195. var
  1196. counter: tsuperregister;
  1197. begin
  1198. for counter := RS_EAX to RS_EDI do
  1199. if counter <> supreg then
  1200. with p1^.regs[counter] Do
  1201. begin
  1202. if (typ in [con_ref,con_noRemoveRef]) and
  1203. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1204. if typ in [con_ref, con_invalid] then
  1205. typ := con_invalid
  1206. { con_noRemoveRef = con_unknown }
  1207. else
  1208. typ := con_unknown;
  1209. if assigned(memwrite) and
  1210. regInRef(counter,memwrite.oper[1]^.ref^) then
  1211. memwrite := nil;
  1212. end;
  1213. end;
  1214. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1215. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1216. contents of registers are loaded with a memory location based on reg.
  1217. doincState is false when this register has to be destroyed not because
  1218. it's contents are directly modified/overwritten, but because of an indirect
  1219. action (e.g. this register holds the contents of a variable and the value
  1220. of the variable in memory is changed) }
  1221. begin
  1222. { the following happens for fpu registers }
  1223. if (supreg < low(NrOfInstrSinceLastMod)) or
  1224. (supreg > high(NrOfInstrSinceLastMod)) then
  1225. exit;
  1226. NrOfInstrSinceLastMod[supreg] := 0;
  1227. with p1^.regs[supreg] do
  1228. begin
  1229. if doincState then
  1230. begin
  1231. incState(wstate,1);
  1232. typ := con_unknown;
  1233. startmod := nil;
  1234. end
  1235. else
  1236. if typ in [con_ref,con_const,con_invalid] then
  1237. typ := con_invalid
  1238. { con_noRemoveRef = con_unknown }
  1239. else
  1240. typ := con_unknown;
  1241. memwrite := nil;
  1242. end;
  1243. invalidateDependingRegs(p1,supreg);
  1244. end;
  1245. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1246. begin
  1247. if (p.typ = ait_instruction) then
  1248. begin
  1249. case taicpu(p).oper[0]^.typ Of
  1250. top_reg:
  1251. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1252. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1253. top_ref:
  1254. With TReference(taicpu(p).oper[0]^) Do
  1255. begin
  1256. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1257. then RegSet := RegSet + [base];
  1258. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1259. then RegSet := RegSet + [index];
  1260. end;
  1261. end;
  1262. case taicpu(p).oper[1]^.typ Of
  1263. top_reg:
  1264. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1265. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1266. top_ref:
  1267. With TReference(taicpu(p).oper[1]^) Do
  1268. begin
  1269. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1270. then RegSet := RegSet + [base];
  1271. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1272. then RegSet := RegSet + [index];
  1273. end;
  1274. end;
  1275. end;
  1276. end;}
  1277. function OpsEquivalent(const o1, o2: toper; const oldinst, newinst: taicpu; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1278. begin {checks whether the two ops are equivalent}
  1279. OpsEquivalent := False;
  1280. if o1.typ=o2.typ then
  1281. case o1.typ Of
  1282. top_reg:
  1283. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, oldinst, newinst, RegInfo, OpAct);
  1284. top_ref:
  1285. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, oldinst, newinst, RegInfo);
  1286. Top_Const:
  1287. OpsEquivalent := o1.val = o2.val;
  1288. Top_None:
  1289. OpsEquivalent := True
  1290. end;
  1291. end;
  1292. function OpsEqual(const o1,o2:toper): Boolean;
  1293. begin {checks whether the two ops are equal}
  1294. OpsEqual := False;
  1295. if o1.typ=o2.typ then
  1296. case o1.typ Of
  1297. top_reg :
  1298. OpsEqual:=o1.reg=o2.reg;
  1299. top_ref :
  1300. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1301. Top_Const :
  1302. OpsEqual:=o1.val=o2.val;
  1303. Top_None :
  1304. OpsEqual := True
  1305. end;
  1306. end;
  1307. function sizescompatible(loadsize,newsize: topsize): boolean;
  1308. begin
  1309. case loadsize of
  1310. S_B,S_BW,S_BL:
  1311. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1312. S_W,S_WL:
  1313. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1314. else
  1315. sizescompatible := newsize = S_L;
  1316. end;
  1317. end;
  1318. function opscompatible(p1,p2: taicpu): boolean;
  1319. begin
  1320. case p1.opcode of
  1321. A_MOVZX,A_MOVSX:
  1322. opscompatible :=
  1323. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1324. sizescompatible(p1.opsize,p2.opsize);
  1325. else
  1326. opscompatible :=
  1327. (p1.opcode = p2.opcode) and
  1328. (p1.ops = p2.ops) and
  1329. (p1.opsize = p2.opsize);
  1330. end;
  1331. end;
  1332. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1333. {$ifdef csdebug}
  1334. var
  1335. hp: tai;
  1336. {$endif csdebug}
  1337. begin {checks whether two taicpu instructions are equal}
  1338. if assigned(p1) and assigned(p2) and
  1339. (tai(p1).typ = ait_instruction) and
  1340. (tai(p2).typ = ait_instruction) and
  1341. opscompatible(taicpu(p1),taicpu(p2)) and
  1342. (not(assigned(taicpu(p1).oper[0])) or
  1343. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1344. (not(assigned(taicpu(p1).oper[1])) or
  1345. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1346. (not(assigned(taicpu(p1).oper[2])) or
  1347. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1348. {both instructions have the same structure:
  1349. "<operator> <operand of type1>, <operand of type 2>"}
  1350. if ((taicpu(p1).opcode = A_MOV) or
  1351. (taicpu(p1).opcode = A_MOVZX) or
  1352. (taicpu(p1).opcode = A_MOVSX) or
  1353. (taicpu(p1).opcode = A_LEA)) and
  1354. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1355. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1356. {the "old" instruction is a load of a register with a new value, not with
  1357. a value based on the contents of this register (so no "mov (reg), reg")}
  1358. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1359. RefsEquivalent(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^,taicpu(p1), taicpu(p2), reginfo) then
  1360. {the "new" instruction is also a load of a register with a new value, and
  1361. this value is fetched from the same memory location}
  1362. begin
  1363. With taicpu(p2).oper[0]^.ref^ Do
  1364. begin
  1365. if (base <> NR_NO) and
  1366. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1367. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1368. if (index <> NR_NO) and
  1369. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1370. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1371. end;
  1372. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1373. from the reference are the same in the old and in the new instruction
  1374. sequence}
  1375. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1376. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1377. InstructionsEquivalent :=
  1378. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1379. taicpu(p2).oper[1]^.reg, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write);
  1380. end
  1381. {the registers are loaded with values from different memory locations. if
  1382. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1383. would be considered equivalent}
  1384. else
  1385. InstructionsEquivalent := False
  1386. else
  1387. {load register with a value based on the current value of this register}
  1388. begin
  1389. With taicpu(p2).oper[0]^.ref^ Do
  1390. begin
  1391. if (base <> NR_NO) and
  1392. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1393. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1394. {it won't do any harm if the register is already in RegsLoadedForRef}
  1395. begin
  1396. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1397. {$ifdef csdebug}
  1398. Writeln(std_regname(base), ' added');
  1399. {$endif csdebug}
  1400. end;
  1401. if (index <> NR_NO) and
  1402. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1403. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1404. begin
  1405. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1406. {$ifdef csdebug}
  1407. Writeln(std_regname(index), ' added');
  1408. {$endif csdebug}
  1409. end;
  1410. end;
  1411. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1412. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1413. begin
  1414. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1415. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1416. {$ifdef csdebug}
  1417. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1418. {$endif csdebug}
  1419. end;
  1420. InstructionsEquivalent :=
  1421. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Read) and
  1422. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write)
  1423. end
  1424. else
  1425. {an instruction <> mov, movzx, movsx}
  1426. begin
  1427. {$ifdef csdebug}
  1428. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1429. hp.previous := p2;
  1430. hp.next := p2.next;
  1431. p2.next.previous := hp;
  1432. p2.next := hp;
  1433. {$endif csdebug}
  1434. InstructionsEquivalent :=
  1435. (not(assigned(taicpu(p1).oper[0])) or
  1436. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1437. (not(assigned(taicpu(p1).oper[1])) or
  1438. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1439. (not(assigned(taicpu(p1).oper[2])) or
  1440. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown))
  1441. end
  1442. {the instructions haven't even got the same structure, so they're certainly
  1443. not equivalent}
  1444. else
  1445. begin
  1446. {$ifdef csdebug}
  1447. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1448. hp.previous := p2;
  1449. hp.next := p2.next;
  1450. p2.next.previous := hp;
  1451. p2.next := hp;
  1452. {$endif csdebug}
  1453. InstructionsEquivalent := False;
  1454. end;
  1455. {$ifdef csdebug}
  1456. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1457. hp.previous := p2;
  1458. hp.next := p2.next;
  1459. p2.next.previous := hp;
  1460. p2.next := hp;
  1461. {$endif csdebug}
  1462. end;
  1463. (*
  1464. function InstructionsEqual(p1, p2: tai): Boolean;
  1465. begin {checks whether two taicpu instructions are equal}
  1466. InstructionsEqual :=
  1467. assigned(p1) and assigned(p2) and
  1468. ((tai(p1).typ = ait_instruction) and
  1469. (tai(p1).typ = ait_instruction) and
  1470. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1471. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1472. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1473. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1474. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1475. end;
  1476. *)
  1477. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1478. begin
  1479. if supreg in [RS_EAX..RS_EDI] then
  1480. incState(p^.regs[supreg].rstate,1)
  1481. end;
  1482. procedure readref(p: ptaiprop; const ref: preference);
  1483. begin
  1484. if ref^.base <> NR_NO then
  1485. readreg(p, getsupreg(ref^.base));
  1486. if ref^.index <> NR_NO then
  1487. readreg(p, getsupreg(ref^.index));
  1488. end;
  1489. procedure ReadOp(p: ptaiprop;const o:toper);
  1490. begin
  1491. case o.typ Of
  1492. top_reg: readreg(p, getsupreg(o.reg));
  1493. top_ref: readref(p, o.ref);
  1494. end;
  1495. end;
  1496. function RefInInstruction(const ref: TReference; p: tai;
  1497. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1498. {checks whehter ref is used in p}
  1499. var
  1500. mysize: tcgsize;
  1501. TmpResult: Boolean;
  1502. begin
  1503. TmpResult := False;
  1504. if (p.typ = ait_instruction) then
  1505. begin
  1506. mysize := topsize2tcgsize[taicpu(p).opsize];
  1507. if (taicpu(p).ops >= 1) and
  1508. (taicpu(p).oper[0]^.typ = top_ref) then
  1509. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,mysize,size);
  1510. if not(TmpResult) and
  1511. (taicpu(p).ops >= 2) and
  1512. (taicpu(p).oper[1]^.typ = top_ref) then
  1513. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,mysize,size);
  1514. if not(TmpResult) and
  1515. (taicpu(p).ops >= 3) and
  1516. (taicpu(p).oper[2]^.typ = top_ref) then
  1517. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,mysize,size);
  1518. end;
  1519. RefInInstruction := TmpResult;
  1520. end;
  1521. function RefInSequence(const ref: TReference; Content: TContent;
  1522. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1523. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1524. tai objects) to see whether ref is used somewhere}
  1525. var p: tai;
  1526. Counter: Word;
  1527. TmpResult: Boolean;
  1528. begin
  1529. p := Content.StartMod;
  1530. TmpResult := False;
  1531. Counter := 1;
  1532. while not(TmpResult) and
  1533. (Counter <= Content.NrOfMods) Do
  1534. begin
  1535. if (p.typ = ait_instruction) and
  1536. RefInInstruction(ref, p, RefsEq, size)
  1537. then TmpResult := True;
  1538. inc(Counter);
  1539. GetNextInstruction(p,p)
  1540. end;
  1541. RefInSequence := TmpResult
  1542. end;
  1543. {$ifdef q+}
  1544. {$q-}
  1545. {$define overflowon}
  1546. {$endif q+}
  1547. // checks whether a write to r2 of size "size" contains address r1
  1548. function arrayrefsoverlapping(const r1, r2: treference; size1, size2: tcgsize): Boolean;
  1549. var
  1550. realsize1, realsize2: aint;
  1551. begin
  1552. realsize1 := tcgsize2size[size1];
  1553. realsize2 := tcgsize2size[size2];
  1554. arrayrefsoverlapping :=
  1555. (r2.offset <= r1.offset+realsize1) and
  1556. (r1.offset <= r2.offset+realsize2) and
  1557. (r1.segment = r2.segment) and
  1558. (r1.symbol=r2.symbol) and
  1559. (r1.base = r2.base)
  1560. end;
  1561. {$ifdef overflowon}
  1562. {$q+}
  1563. {$undef overflowon}
  1564. {$endif overflowon}
  1565. function isSimpleRef(const ref: treference): boolean;
  1566. { returns true if ref is reference to a local or global variable, to a }
  1567. { parameter or to an object field (this includes arrays). Returns false }
  1568. { otherwise. }
  1569. begin
  1570. isSimpleRef :=
  1571. assigned(ref.symbol) or
  1572. (ref.base = current_procinfo.framepointer);
  1573. end;
  1574. function containsPointerRef(p: tai): boolean;
  1575. { checks if an instruction contains a reference which is a pointer location }
  1576. var
  1577. hp: taicpu;
  1578. count: longint;
  1579. begin
  1580. containsPointerRef := false;
  1581. if p.typ <> ait_instruction then
  1582. exit;
  1583. hp := taicpu(p);
  1584. for count := 0 to hp.ops-1 do
  1585. begin
  1586. case hp.oper[count]^.typ of
  1587. top_ref:
  1588. if not isSimpleRef(hp.oper[count]^.ref^) then
  1589. begin
  1590. containsPointerRef := true;
  1591. exit;
  1592. end;
  1593. top_none:
  1594. exit;
  1595. end;
  1596. end;
  1597. end;
  1598. function containsPointerLoad(c: tcontent): boolean;
  1599. { checks whether the contents of a register contain a pointer reference }
  1600. var
  1601. p: tai;
  1602. count: longint;
  1603. begin
  1604. containsPointerLoad := false;
  1605. p := c.startmod;
  1606. for count := c.nrOfMods downto 1 do
  1607. begin
  1608. if containsPointerRef(p) then
  1609. begin
  1610. containsPointerLoad := true;
  1611. exit;
  1612. end;
  1613. getnextinstruction(p,p);
  1614. end;
  1615. end;
  1616. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1617. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1618. { returns whether the contents c of reg are invalid after regWritten is }
  1619. { is written to ref }
  1620. var
  1621. refsEq: trefCompare;
  1622. begin
  1623. if isSimpleRef(ref) then
  1624. begin
  1625. if (ref.index <> NR_NO) or
  1626. (assigned(ref.symbol) and
  1627. (ref.base <> NR_NO)) then
  1628. { local/global variable or parameter which is an array }
  1629. refsEq := {$ifdef fpc}@{$endif}arrayRefsOverlapping
  1630. else
  1631. { local/global variable or parameter which is not an array }
  1632. refsEq := {$ifdef fpc}@{$endif}refsOverlapping;
  1633. invalsmemwrite :=
  1634. assigned(c.memwrite) and
  1635. ((not(cs_uncertainOpts in aktglobalswitches) and
  1636. containsPointerRef(c.memwrite)) or
  1637. refsEq(c.memwrite.oper[1]^.ref^,ref,topsize2tcgsize[c.memwrite.opsize],size));
  1638. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1639. begin
  1640. writeToMemDestroysContents := false;
  1641. exit;
  1642. end;
  1643. { write something to a parameter, a local or global variable, so }
  1644. { * with uncertain optimizations on: }
  1645. { - destroy the contents of registers whose contents have somewhere a }
  1646. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1647. { are being written to memory) is not destroyed if it's StartMod is }
  1648. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1649. { expression based on ref) }
  1650. { * with uncertain optimizations off: }
  1651. { - also destroy registers that contain any pointer }
  1652. with c do
  1653. writeToMemDestroysContents :=
  1654. (typ in [con_ref,con_noRemoveRef]) and
  1655. ((not(cs_uncertainOpts in aktglobalswitches) and
  1656. containsPointerLoad(c)
  1657. ) or
  1658. (refInSequence(ref,c,refsEq,size) and
  1659. ((supreg <> regWritten) or
  1660. not((nrOfMods = 1) and
  1661. {StarMod is always of the type ait_instruction}
  1662. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1663. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, topsize2tcgsize[taicpu(StartMod).opsize],size)
  1664. )
  1665. )
  1666. )
  1667. );
  1668. end
  1669. else
  1670. { write something to a pointer location, so }
  1671. { * with uncertain optimzations on: }
  1672. { - do not destroy registers which contain a local/global variable or }
  1673. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1674. { * with uncertain optimzations off: }
  1675. { - destroy every register which contains a memory location }
  1676. begin
  1677. invalsmemwrite :=
  1678. assigned(c.memwrite) and
  1679. (not(cs_UncertainOpts in aktglobalswitches) or
  1680. containsPointerRef(c.memwrite));
  1681. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1682. begin
  1683. writeToMemDestroysContents := false;
  1684. exit;
  1685. end;
  1686. with c do
  1687. writeToMemDestroysContents :=
  1688. (typ in [con_ref,con_noRemoveRef]) and
  1689. (not(cs_UncertainOpts in aktglobalswitches) or
  1690. { for movsl }
  1691. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1692. { don't destroy if reg contains a parameter, local or global variable }
  1693. containsPointerLoad(c)
  1694. );
  1695. end;
  1696. end;
  1697. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1698. const c: tcontent): boolean;
  1699. { returns whether the contents c of reg are invalid after destReg is }
  1700. { modified }
  1701. begin
  1702. writeToRegDestroysContents :=
  1703. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1704. sequenceDependsOnReg(c,supreg,destReg);
  1705. end;
  1706. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1707. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1708. { returns whether the contents c of reg are invalid after regWritten is }
  1709. { is written to op }
  1710. begin
  1711. memwritedestroyed := false;
  1712. case op.typ of
  1713. top_reg:
  1714. writeDestroysContents :=
  1715. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1716. top_ref:
  1717. writeDestroysContents :=
  1718. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1719. else
  1720. writeDestroysContents := false;
  1721. end;
  1722. end;
  1723. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1724. { destroys all registers which possibly contain a reference to ref, regWritten }
  1725. { is the register whose contents are being written to memory (if this proc }
  1726. { is called because of a "mov?? %reg, (mem)" instruction) }
  1727. var
  1728. counter: tsuperregister;
  1729. destroymemwrite: boolean;
  1730. begin
  1731. for counter := RS_EAX to RS_EDI Do
  1732. begin
  1733. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1734. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1735. destroyReg(ptaiprop(p.optInfo), counter, false)
  1736. else if destroymemwrite then
  1737. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1738. end;
  1739. end;
  1740. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1741. var Counter: tsuperregister;
  1742. begin {initializes/desrtoys all registers}
  1743. For Counter := RS_EAX To RS_EDI Do
  1744. begin
  1745. if read then
  1746. readreg(p, Counter);
  1747. DestroyReg(p, Counter, written);
  1748. p^.regs[counter].MemWrite := nil;
  1749. end;
  1750. p^.DirFlag := F_Unknown;
  1751. end;
  1752. procedure DestroyOp(taiObj: tai; const o:Toper);
  1753. {$ifdef statedebug}
  1754. var
  1755. hp: tai;
  1756. {$endif statedebug}
  1757. begin
  1758. case o.typ Of
  1759. top_reg:
  1760. begin
  1761. {$ifdef statedebug}
  1762. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1763. hp.next := taiobj.next;
  1764. hp.previous := taiobj;
  1765. taiobj.next := hp;
  1766. if assigned(hp.next) then
  1767. hp.next.previous := hp;
  1768. {$endif statedebug}
  1769. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1770. end;
  1771. top_ref:
  1772. begin
  1773. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1774. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1775. end;
  1776. end;
  1777. end;
  1778. procedure AddInstr2RegContents({$ifdef statedebug} asml: taasmoutput; {$endif}
  1779. p: taicpu; supreg: tsuperregister);
  1780. {$ifdef statedebug}
  1781. var
  1782. hp: tai;
  1783. {$endif statedebug}
  1784. begin
  1785. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1786. if (typ in [con_ref,con_noRemoveRef]) then
  1787. begin
  1788. incState(wstate,1);
  1789. { also store how many instructions are part of the sequence in the first }
  1790. { instructions ptaiprop, so it can be easily accessed from within }
  1791. { CheckSequence}
  1792. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1793. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1794. NrOfInstrSinceLastMod[supreg] := 0;
  1795. invalidateDependingRegs(p.optinfo,supreg);
  1796. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1797. {$ifdef StateDebug}
  1798. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1799. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1800. InsertLLItem(AsmL, p, p.next, hp);
  1801. {$endif StateDebug}
  1802. end
  1803. else
  1804. begin
  1805. {$ifdef statedebug}
  1806. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1807. insertllitem(asml,p,p.next,hp);
  1808. {$endif statedebug}
  1809. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1810. {$ifdef StateDebug}
  1811. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1812. InsertLLItem(AsmL, p, p.next, hp);
  1813. {$endif StateDebug}
  1814. end
  1815. end;
  1816. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAAsmoutput; {$endif}
  1817. p: taicpu; const oper: TOper);
  1818. begin
  1819. if oper.typ = top_reg then
  1820. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1821. else
  1822. begin
  1823. ReadOp(ptaiprop(p.optinfo), oper);
  1824. DestroyOp(p, oper);
  1825. end
  1826. end;
  1827. {*************************************************************************************}
  1828. {************************************** TDFAOBJ **************************************}
  1829. {*************************************************************************************}
  1830. constructor tdfaobj.create(_list: taasmoutput);
  1831. begin
  1832. list := _list;
  1833. blockstart := nil;
  1834. blockend := nil;
  1835. nroftaiobjs := 0;
  1836. taipropblock := nil;
  1837. lolab := 0;
  1838. hilab := 0;
  1839. labdif := 0;
  1840. labeltable := nil;
  1841. end;
  1842. procedure tdfaobj.initlabeltable;
  1843. var
  1844. labelfound: boolean;
  1845. p, prev: tai;
  1846. hp1, hp2: tai;
  1847. {$ifdef i386}
  1848. regcounter,
  1849. supreg : tsuperregister;
  1850. {$endif i386}
  1851. usedregs, nodeallocregs: tregset;
  1852. begin
  1853. labelfound := false;
  1854. lolab := maxlongint;
  1855. hilab := 0;
  1856. p := blockstart;
  1857. prev := p;
  1858. while assigned(p) do
  1859. begin
  1860. if (tai(p).typ = ait_label) then
  1861. if not labelcanbeskipped(tai_label(p)) then
  1862. begin
  1863. labelfound := true;
  1864. if (tai_Label(p).l.labelnr < lolab) then
  1865. lolab := tai_label(p).l.labelnr;
  1866. if (tai_Label(p).l.labelnr > hilab) then
  1867. hilab := tai_label(p).l.labelnr;
  1868. end;
  1869. prev := p;
  1870. getnextinstruction(p, p);
  1871. end;
  1872. if (prev.typ = ait_marker) and
  1873. (tai_marker(prev).kind = asmblockstart) then
  1874. blockend := prev
  1875. else blockend := nil;
  1876. if labelfound then
  1877. labdif := hilab+1-lolab
  1878. else labdif := 0;
  1879. usedregs := [];
  1880. if (labdif <> 0) then
  1881. begin
  1882. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1883. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1884. end;
  1885. p := blockstart;
  1886. prev := p;
  1887. while (p <> blockend) do
  1888. begin
  1889. case p.typ of
  1890. ait_label:
  1891. if not labelcanbeskipped(tai_label(p)) then
  1892. labeltable^[tai_label(p).l.labelnr-lolab].taiobj := p;
  1893. {$ifdef i386}
  1894. ait_regalloc:
  1895. begin
  1896. supreg:=getsupreg(tai_regalloc(p).reg);
  1897. case tai_regalloc(p).ratype of
  1898. ra_alloc :
  1899. begin
  1900. if not(supreg in usedregs) then
  1901. include(usedregs, supreg)
  1902. else
  1903. begin
  1904. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1905. hp1 := tai(p.previous);
  1906. list.remove(p);
  1907. p.free;
  1908. p := hp1;
  1909. end;
  1910. end;
  1911. ra_dealloc :
  1912. begin
  1913. exclude(usedregs, supreg);
  1914. hp1 := p;
  1915. hp2 := nil;
  1916. while not(findregalloc(supreg,tai(hp1.next),ra_alloc)) and
  1917. getnextinstruction(hp1, hp1) and
  1918. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1919. hp2 := hp1;
  1920. if hp2 <> nil then
  1921. begin
  1922. hp1 := tai(p.previous);
  1923. list.remove(p);
  1924. insertllitem(list, hp2, tai(hp2.next), p);
  1925. p := hp1;
  1926. end
  1927. else if findregalloc(getsupreg(tai_regalloc(p).reg), tai(p.next),ra_alloc)
  1928. and getnextinstruction(p,hp1) then
  1929. begin
  1930. hp1 := tai(p.previous);
  1931. list.remove(p);
  1932. p.free;
  1933. p := hp1;
  1934. // don't include here, since then the allocation will be removed when it's processed
  1935. // include(usedregs,supreg);
  1936. end;
  1937. end;
  1938. end;
  1939. end;
  1940. {$endif i386}
  1941. end;
  1942. repeat
  1943. prev := p;
  1944. p := tai(p.next);
  1945. until not(assigned(p)) or
  1946. (p = blockend) or
  1947. not(p.typ in (skipinstr - [ait_regalloc]));
  1948. end;
  1949. {$ifdef i386}
  1950. { don't add deallocation for function result variable or for regvars}
  1951. getNoDeallocRegs(noDeallocRegs);
  1952. usedRegs := usedRegs - noDeallocRegs;
  1953. for regCounter := RS_EAX to RS_EDI do
  1954. if regCounter in usedRegs then
  1955. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1956. {$endif i386}
  1957. end;
  1958. function tdfaobj.pass_1(_blockstart: tai): tai;
  1959. begin
  1960. blockstart := _blockstart;
  1961. initlabeltable;
  1962. pass_1 := blockend;
  1963. end;
  1964. function tdfaobj.initdfapass2: boolean;
  1965. {reserves memory for the PtaiProps in one big memory block when not using
  1966. TP, returns False if not enough memory is available for the optimizer in all
  1967. cases}
  1968. var
  1969. p: tai;
  1970. count: Longint;
  1971. { TmpStr: String; }
  1972. begin
  1973. p := blockstart;
  1974. skiphead(p);
  1975. nroftaiobjs := 0;
  1976. while (p <> blockend) do
  1977. begin
  1978. {$ifDef JumpAnal}
  1979. case p.typ of
  1980. ait_label:
  1981. begin
  1982. if not labelcanbeskipped(tai_label(p)) then
  1983. labeltable^[tai_label(p).l.labelnr-lolab].instrnr := nroftaiobjs
  1984. end;
  1985. ait_instruction:
  1986. begin
  1987. if taicpu(p).is_jmp then
  1988. begin
  1989. if (tasmlabel(taicpu(p).oper[0]^.sym).labelnr >= lolab) and
  1990. (tasmlabel(taicpu(p).oper[0]^.sym).labelnr <= hilab) then
  1991. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labelnr-lolab].refsfound);
  1992. end;
  1993. end;
  1994. { ait_instruction:
  1995. begin
  1996. if (taicpu(p).opcode = A_PUSH) and
  1997. (taicpu(p).oper[0]^.typ = top_symbol) and
  1998. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  1999. begin
  2000. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  2001. if}
  2002. end;
  2003. {$endif JumpAnal}
  2004. inc(NrOftaiObjs);
  2005. getnextinstruction(p,p);
  2006. end;
  2007. if nroftaiobjs <> 0 then
  2008. begin
  2009. initdfapass2 := True;
  2010. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2011. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  2012. p := blockstart;
  2013. skiphead(p);
  2014. for count := 1 To nroftaiobjs do
  2015. begin
  2016. ptaiprop(p.optinfo) := @taipropblock^[count];
  2017. getnextinstruction(p, p);
  2018. end;
  2019. end
  2020. else
  2021. initdfapass2 := false;
  2022. end;
  2023. procedure tdfaobj.dodfapass2;
  2024. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  2025. contents for the instructions starting with p. Returns the last tai which has
  2026. been processed}
  2027. var
  2028. curprop, LastFlagsChangeProp: ptaiprop;
  2029. Cnt, InstrCnt : Longint;
  2030. InstrProp: TInsProp;
  2031. UsedRegs: TRegSet;
  2032. prev,p : tai;
  2033. tmpref: TReference;
  2034. tmpsupreg: tsuperregister;
  2035. {$ifdef statedebug}
  2036. hp : tai;
  2037. {$endif}
  2038. {$ifdef AnalyzeLoops}
  2039. hp : tai;
  2040. TmpState: Byte;
  2041. {$endif AnalyzeLoops}
  2042. begin
  2043. p := BlockStart;
  2044. LastFlagsChangeProp := nil;
  2045. prev := nil;
  2046. UsedRegs := [];
  2047. UpdateUsedregs(UsedRegs, p);
  2048. SkipHead(p);
  2049. BlockStart := p;
  2050. InstrCnt := 1;
  2051. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2052. while (p <> Blockend) Do
  2053. begin
  2054. curprop := @taiPropBlock^[InstrCnt];
  2055. if assigned(prev)
  2056. then
  2057. begin
  2058. {$ifdef JumpAnal}
  2059. if (p.Typ <> ait_label) then
  2060. {$endif JumpAnal}
  2061. begin
  2062. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2063. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2064. curprop^.FlagsUsed := false;
  2065. end
  2066. end
  2067. else
  2068. begin
  2069. fillchar(curprop^, SizeOf(curprop^), 0);
  2070. { For tmpreg := RS_EAX to RS_EDI Do
  2071. curprop^.regs[tmpreg].WState := 1;}
  2072. end;
  2073. curprop^.UsedRegs := UsedRegs;
  2074. curprop^.CanBeRemoved := False;
  2075. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2076. For tmpsupreg := RS_EAX To RS_EDI Do
  2077. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2078. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2079. else
  2080. begin
  2081. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2082. curprop^.regs[tmpsupreg].typ := con_unknown;
  2083. end;
  2084. case p.typ Of
  2085. ait_marker:;
  2086. ait_label:
  2087. {$ifndef JumpAnal}
  2088. if not labelCanBeSkipped(tai_label(p)) then
  2089. DestroyAllRegs(curprop,false,false);
  2090. {$else JumpAnal}
  2091. begin
  2092. if not labelCanBeSkipped(tai_label(p)) then
  2093. With LTable^[tai_Label(p).l^.labelnr-LoLab] Do
  2094. {$ifDef AnalyzeLoops}
  2095. if (RefsFound = tai_Label(p).l^.RefCount)
  2096. {$else AnalyzeLoops}
  2097. if (JmpsProcessed = tai_Label(p).l^.RefCount)
  2098. {$endif AnalyzeLoops}
  2099. then
  2100. {all jumps to this label have been found}
  2101. {$ifDef AnalyzeLoops}
  2102. if (JmpsProcessed > 0)
  2103. then
  2104. {$endif AnalyzeLoops}
  2105. {we've processed at least one jump to this label}
  2106. begin
  2107. if (GetLastInstruction(p, hp) and
  2108. not(((hp.typ = ait_instruction)) and
  2109. (taicpu_labeled(hp).is_jmp))
  2110. then
  2111. {previous instruction not a JMP -> the contents of the registers after the
  2112. previous intruction has been executed have to be taken into account as well}
  2113. For tmpsupreg := RS_EAX to RS_EDI Do
  2114. begin
  2115. if (curprop^.regs[tmpsupreg].WState <>
  2116. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2117. then DestroyReg(curprop, tmpsupreg, true)
  2118. end
  2119. end
  2120. {$ifDef AnalyzeLoops}
  2121. else
  2122. {a label from a backward jump (e.g. a loop), no jump to this label has
  2123. already been processed}
  2124. if GetLastInstruction(p, hp) and
  2125. not(hp.typ = ait_instruction) and
  2126. (taicpu_labeled(hp).opcode = A_JMP))
  2127. then
  2128. {previous instruction not a jmp, so keep all the registers' contents from the
  2129. previous instruction}
  2130. begin
  2131. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2132. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2133. end
  2134. else
  2135. {previous instruction a jmp and no jump to this label processed yet}
  2136. begin
  2137. hp := p;
  2138. Cnt := InstrCnt;
  2139. {continue until we find a jump to the label or a label which has already
  2140. been processed}
  2141. while GetNextInstruction(hp, hp) and
  2142. not((hp.typ = ait_instruction) and
  2143. (taicpu(hp).is_jmp) and
  2144. (tasmlabel(taicpu(hp).oper[0]^.sym).labelnr = tai_Label(p).l^.labelnr)) and
  2145. not((hp.typ = ait_label) and
  2146. (LTable^[tai_Label(hp).l^.labelnr-LoLab].RefsFound
  2147. = tai_Label(hp).l^.RefCount) and
  2148. (LTable^[tai_Label(hp).l^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2149. inc(Cnt);
  2150. if (hp.typ = ait_label)
  2151. then
  2152. {there's a processed label after the current one}
  2153. begin
  2154. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2155. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2156. end
  2157. else
  2158. {there's no label anymore after the current one, or they haven't been
  2159. processed yet}
  2160. begin
  2161. GetLastInstruction(p, hp);
  2162. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2163. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2164. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2165. end
  2166. end
  2167. {$endif AnalyzeLoops}
  2168. else
  2169. {not all references to this label have been found, so destroy all registers}
  2170. begin
  2171. GetLastInstruction(p, hp);
  2172. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2173. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2174. DestroyAllRegs(curprop,true,true)
  2175. end;
  2176. end;
  2177. {$endif JumpAnal}
  2178. {$ifdef GDB}
  2179. ait_stabs, ait_stabn, ait_stab_function_name:;
  2180. {$endif GDB}
  2181. ait_align: ; { may destroy flags !!! }
  2182. ait_instruction:
  2183. begin
  2184. if taicpu(p).is_jmp or
  2185. (taicpu(p).opcode = A_JMP) then
  2186. begin
  2187. {$ifNDef JumpAnal}
  2188. for tmpsupreg := RS_EAX to RS_EDI do
  2189. with curprop^.regs[tmpsupreg] do
  2190. case typ of
  2191. con_ref: typ := con_noRemoveRef;
  2192. con_const: typ := con_noRemoveConst;
  2193. con_invalid: typ := con_unknown;
  2194. end;
  2195. {$else JumpAnal}
  2196. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labelnr-LoLab] Do
  2197. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2198. begin
  2199. if (InstrCnt < InstrNr)
  2200. then
  2201. {forward jump}
  2202. if (JmpsProcessed = 0) then
  2203. {no jump to this label has been processed yet}
  2204. begin
  2205. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2206. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2207. inc(JmpsProcessed);
  2208. end
  2209. else
  2210. begin
  2211. For tmpreg := RS_EAX to RS_EDI Do
  2212. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2213. curprop^.regs[tmpreg].WState) then
  2214. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2215. inc(JmpsProcessed);
  2216. end
  2217. {$ifdef AnalyzeLoops}
  2218. else
  2219. { backward jump, a loop for example}
  2220. { if (JmpsProcessed > 0) or
  2221. not(GetLastInstruction(taiObj, hp) and
  2222. (hp.typ = ait_labeled_instruction) and
  2223. (taicpu_labeled(hp).opcode = A_JMP))
  2224. then}
  2225. {instruction prior to label is not a jmp, or at least one jump to the label
  2226. has yet been processed}
  2227. begin
  2228. inc(JmpsProcessed);
  2229. For tmpreg := RS_EAX to RS_EDI Do
  2230. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2231. curprop^.regs[tmpreg].WState)
  2232. then
  2233. begin
  2234. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2235. Cnt := InstrNr;
  2236. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2237. begin
  2238. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2239. inc(Cnt);
  2240. end;
  2241. while (Cnt <= InstrCnt) Do
  2242. begin
  2243. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2244. inc(Cnt)
  2245. end
  2246. end;
  2247. end
  2248. { else }
  2249. {instruction prior to label is a jmp and no jumps to the label have yet been
  2250. processed}
  2251. { begin
  2252. inc(JmpsProcessed);
  2253. For tmpreg := RS_EAX to RS_EDI Do
  2254. begin
  2255. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2256. Cnt := InstrNr;
  2257. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2258. begin
  2259. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2260. inc(Cnt);
  2261. end;
  2262. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2263. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2264. begin
  2265. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2266. inc(Cnt);
  2267. end;
  2268. while (Cnt <= InstrCnt) Do
  2269. begin
  2270. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2271. inc(Cnt)
  2272. end
  2273. end
  2274. end}
  2275. {$endif AnalyzeLoops}
  2276. end;
  2277. {$endif JumpAnal}
  2278. end
  2279. else
  2280. begin
  2281. InstrProp := InsProp[taicpu(p).opcode];
  2282. case taicpu(p).opcode Of
  2283. A_MOV, A_MOVZX, A_MOVSX:
  2284. begin
  2285. case taicpu(p).oper[0]^.typ Of
  2286. top_ref, top_reg:
  2287. case taicpu(p).oper[1]^.typ Of
  2288. top_reg:
  2289. begin
  2290. {$ifdef statedebug}
  2291. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2292. insertllitem(list,p,p.next,hp);
  2293. {$endif statedebug}
  2294. readOp(curprop, taicpu(p).oper[0]^);
  2295. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2296. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2297. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2298. begin
  2299. with curprop^.regs[tmpsupreg] Do
  2300. begin
  2301. incState(wstate,1);
  2302. { also store how many instructions are part of the sequence in the first }
  2303. { instruction's ptaiprop, so it can be easily accessed from within }
  2304. { CheckSequence }
  2305. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2306. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2307. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2308. { Destroy the contents of the registers }
  2309. { that depended on the previous value of }
  2310. { this register }
  2311. invalidateDependingRegs(curprop,tmpsupreg);
  2312. curprop^.regs[tmpsupreg].memwrite := nil;
  2313. end;
  2314. end
  2315. else
  2316. begin
  2317. {$ifdef statedebug}
  2318. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2319. insertllitem(list,p,p.next,hp);
  2320. {$endif statedebug}
  2321. destroyReg(curprop, tmpsupreg, true);
  2322. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2323. with curprop^.regs[tmpsupreg] Do
  2324. begin
  2325. typ := con_ref;
  2326. startmod := p;
  2327. nrOfMods := 1;
  2328. end
  2329. end;
  2330. {$ifdef StateDebug}
  2331. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2332. insertllitem(list,p,p.next,hp);
  2333. {$endif StateDebug}
  2334. end;
  2335. top_ref:
  2336. begin
  2337. readref(curprop, taicpu(p).oper[1]^.ref);
  2338. if taicpu(p).oper[0]^.typ = top_reg then
  2339. begin
  2340. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2341. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2342. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2343. taicpu(p);
  2344. end
  2345. else
  2346. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2347. end;
  2348. end;
  2349. top_Const:
  2350. begin
  2351. case taicpu(p).oper[1]^.typ Of
  2352. top_reg:
  2353. begin
  2354. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2355. {$ifdef statedebug}
  2356. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2357. insertllitem(list,p,p.next,hp);
  2358. {$endif statedebug}
  2359. With curprop^.regs[tmpsupreg] Do
  2360. begin
  2361. DestroyReg(curprop, tmpsupreg, true);
  2362. typ := Con_Const;
  2363. StartMod := p;
  2364. nrOfMods := 1;
  2365. end
  2366. end;
  2367. top_ref:
  2368. begin
  2369. readref(curprop, taicpu(p).oper[1]^.ref);
  2370. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2371. end;
  2372. end;
  2373. end;
  2374. end;
  2375. end;
  2376. A_DIV, A_IDIV, A_MUL:
  2377. begin
  2378. ReadOp(curprop, taicpu(p).oper[0]^);
  2379. readreg(curprop,RS_EAX);
  2380. if (taicpu(p).OpCode = A_IDIV) or
  2381. (taicpu(p).OpCode = A_DIV) then
  2382. begin
  2383. readreg(curprop,RS_EDX);
  2384. end;
  2385. {$ifdef statedebug}
  2386. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2387. insertllitem(list,p,p.next,hp);
  2388. {$endif statedebug}
  2389. { DestroyReg(curprop, RS_EAX, true);}
  2390. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2391. taicpu(p), RS_EAX);
  2392. DestroyReg(curprop, RS_EDX, true);
  2393. LastFlagsChangeProp := curprop;
  2394. end;
  2395. A_IMUL:
  2396. begin
  2397. ReadOp(curprop,taicpu(p).oper[0]^);
  2398. if (taicpu(p).ops >= 2) then
  2399. ReadOp(curprop,taicpu(p).oper[1]^);
  2400. if (taicpu(p).ops <= 2) then
  2401. if (taicpu(p).ops=1) then
  2402. begin
  2403. readreg(curprop,RS_EAX);
  2404. {$ifdef statedebug}
  2405. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2406. insertllitem(list,p,p.next,hp);
  2407. {$endif statedebug}
  2408. { DestroyReg(curprop, RS_EAX, true); }
  2409. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2410. taicpu(p), RS_EAX);
  2411. DestroyReg(curprop,RS_EDX, true)
  2412. end
  2413. else
  2414. AddInstr2OpContents(
  2415. {$ifdef statedebug}list,{$endif}
  2416. taicpu(p), taicpu(p).oper[1]^)
  2417. else
  2418. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2419. taicpu(p), taicpu(p).oper[2]^);
  2420. LastFlagsChangeProp := curprop;
  2421. end;
  2422. A_LEA:
  2423. begin
  2424. readop(curprop,taicpu(p).oper[0]^);
  2425. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2426. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2427. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2428. else
  2429. begin
  2430. {$ifdef statedebug}
  2431. hp := tai_comment.Create(strpnew('destroying & initing'+
  2432. std_regname(taicpu(p).oper[1]^.reg)));
  2433. insertllitem(list,p,p.next,hp);
  2434. {$endif statedebug}
  2435. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2436. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2437. begin
  2438. typ := con_ref;
  2439. startmod := p;
  2440. nrOfMods := 1;
  2441. end
  2442. end;
  2443. end;
  2444. else
  2445. begin
  2446. Cnt := 1;
  2447. while (Cnt <= maxinschanges) and
  2448. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2449. begin
  2450. case InstrProp.Ch[Cnt] Of
  2451. Ch_REAX..Ch_REDI:
  2452. begin
  2453. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2454. readreg(curprop,tmpsupreg);
  2455. end;
  2456. Ch_WEAX..Ch_RWEDI:
  2457. begin
  2458. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2459. begin
  2460. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2461. readreg(curprop,tmpsupreg);
  2462. end;
  2463. {$ifdef statedebug}
  2464. hp := tai_comment.Create(strpnew('destroying '+
  2465. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2466. insertllitem(list,p,p.next,hp);
  2467. {$endif statedebug}
  2468. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2469. DestroyReg(curprop,tmpsupreg, true);
  2470. end;
  2471. Ch_MEAX..Ch_MEDI:
  2472. begin
  2473. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2474. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2475. taicpu(p),tmpsupreg);
  2476. end;
  2477. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2478. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2479. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2480. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2481. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2482. Ch_Wop1..Ch_RWop1:
  2483. begin
  2484. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2485. ReadOp(curprop, taicpu(p).oper[0]^);
  2486. DestroyOp(p, taicpu(p).oper[0]^);
  2487. end;
  2488. Ch_Mop1:
  2489. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2490. taicpu(p), taicpu(p).oper[0]^);
  2491. Ch_Wop2..Ch_RWop2:
  2492. begin
  2493. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2494. ReadOp(curprop, taicpu(p).oper[1]^);
  2495. DestroyOp(p, taicpu(p).oper[1]^);
  2496. end;
  2497. Ch_Mop2:
  2498. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2499. taicpu(p), taicpu(p).oper[1]^);
  2500. Ch_WOp3..Ch_RWOp3:
  2501. begin
  2502. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2503. ReadOp(curprop, taicpu(p).oper[2]^);
  2504. DestroyOp(p, taicpu(p).oper[2]^);
  2505. end;
  2506. Ch_Mop3:
  2507. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2508. taicpu(p), taicpu(p).oper[2]^);
  2509. Ch_WMemEDI:
  2510. begin
  2511. readreg(curprop, RS_EDI);
  2512. fillchar(tmpref, SizeOf(tmpref), 0);
  2513. tmpref.base := NR_EDI;
  2514. tmpref.index := NR_EDI;
  2515. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2516. end;
  2517. Ch_RFlags:
  2518. if assigned(LastFlagsChangeProp) then
  2519. LastFlagsChangeProp^.FlagsUsed := true;
  2520. Ch_WFlags:
  2521. LastFlagsChangeProp := curprop;
  2522. Ch_RWFlags:
  2523. begin
  2524. if assigned(LastFlagsChangeProp) then
  2525. LastFlagsChangeProp^.FlagsUsed := true;
  2526. LastFlagsChangeProp := curprop;
  2527. end;
  2528. Ch_FPU:;
  2529. else
  2530. begin
  2531. {$ifdef statedebug}
  2532. hp := tai_comment.Create(strpnew(
  2533. 'destroying all regs for prev instruction'));
  2534. insertllitem(list,p, p.next,hp);
  2535. {$endif statedebug}
  2536. DestroyAllRegs(curprop,true,true);
  2537. LastFlagsChangeProp := curprop;
  2538. end;
  2539. end;
  2540. inc(Cnt);
  2541. end
  2542. end;
  2543. end;
  2544. end;
  2545. end
  2546. else
  2547. begin
  2548. {$ifdef statedebug}
  2549. hp := tai_comment.Create(strpnew(
  2550. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2551. insertllitem(list,p, p.next,hp);
  2552. {$endif statedebug}
  2553. DestroyAllRegs(curprop,true,true);
  2554. end;
  2555. end;
  2556. inc(InstrCnt);
  2557. prev := p;
  2558. GetNextInstruction(p, p);
  2559. end;
  2560. end;
  2561. function tdfaobj.pass_2: boolean;
  2562. begin
  2563. if initdfapass2 then
  2564. begin
  2565. dodfapass2;
  2566. pass_2 := true
  2567. end
  2568. else
  2569. pass_2 := false;
  2570. end;
  2571. {$ifopt r+}
  2572. {$define rangewason}
  2573. {$r-}
  2574. {$endif}
  2575. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2576. begin
  2577. if (sym.labelnr >= lolab) and
  2578. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2579. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2580. else
  2581. getlabelwithsym := nil;
  2582. end;
  2583. {$ifdef rangewason}
  2584. {$r+}
  2585. {$undef rangewason}
  2586. {$endif}
  2587. procedure tdfaobj.clear;
  2588. begin
  2589. if labdif <> 0 then
  2590. begin
  2591. freemem(labeltable);
  2592. labeltable := nil;
  2593. end;
  2594. if assigned(taipropblock) then
  2595. begin
  2596. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2597. taipropblock := nil;
  2598. end;
  2599. end;
  2600. end.