Jonas Maebe decff7ad16 * merged the fixes_3_0-relevant parts of r31808, r31830, r31879: add support 10 éve
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aasmcpu.pas 8c6eec12f6 --- Merging r30027 into '.': 10 éve
agarmgas.pas decff7ad16 * merged the fixes_3_0-relevant parts of r31808, r31830, r31879: add support 10 éve
aoptcpu.pas 3bc1db9612 Fixed breakage in the ARM peephole optimizer indirectly brought to light by r29189. 11 éve
aoptcpub.pas d37e72dbf9 * ARM: instructions do modify the base register of pre/postindexed references. Report this fact in spilling_get_operation_type_ref and RegModifiedByInstruction functions. 11 éve
aoptcpuc.pas 790a4fe2d3 * log and id tags removed 20 éve
aoptcpud.pas 790a4fe2d3 * log and id tags removed 20 éve
armatt.inc b67e4fb8b3 added the ADR ARM pseudo instruction to instruction list 12 éve
armatts.inc b67e4fb8b3 added the ADR ARM pseudo instruction to instruction list 12 éve
armins.dat b67e4fb8b3 added the ADR ARM pseudo instruction to instruction list 12 éve
armnop.inc 666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) 13 éve
armop.inc b67e4fb8b3 added the ADR ARM pseudo instruction to instruction list 12 éve
armreg.dat 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
armtab.inc 666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) 13 éve
cgcpu.pas bf34c6bcd1 --- Merging r29580 into '.': 11 éve
cpubase.pas fb52392e20 Reformat and comment is_thumb32_imm 12 éve
cpuelf.pas 4a90d7e3de + ARM internal linker: very initial support for Thumb mode, helloworld-class programs compiled with "-Cparmv6m -CIthumb" can now run. 11 éve
cpuinfo.pas 5c67fcc43f + change always floating point divisions into multiplications if they are a power of two, 11 éve
cpunode.pas b57c95043f + support overriding tdef/tsym methods with target-specific functionality: 11 éve
cpupara.pas 5053a39501 * moved ARM-specific tprocdef.total_stackframe_size field to cpu-specific 11 éve
cpupi.pas eeb15fc445 * Added virtual method tprocinfo.postprocess_code and moved target-specific processing from base class into target-specific descendant classes (ARM and AVR, other targets still to do). 11 éve
cputarg.pas d26f0552a0 * Sync with trunk r23404. 13 éve
hlcgcpu.pas 72e9cfee24 * create/destroy also the high level code generator for all architectures, 14 éve
itcpugas.pas 47d43750e4 * remove unused units from uses statements 13 éve
narmadd.pas 2fa7171a45 * generate AND for small set comparisons also when only set vars are involved using the cg class, so it works for arm thumb as well 11 éve
narmcal.pas 8b8a786823 * moved ARM/x86 ifdef'ed code from ncgcal to virtual methods 12 éve
narmcnv.pas 5051453806 + support for LOC_(C)MMREGISTER in hlcg 12 éve
narmcon.pas 196436b7e7 * ARM: Test if range check of floating point constants is necessary in the same way as on other targets. This should have been part of r10940 6 years ago... 11 éve
narminl.pas 96b73b0076 Fixed generation of abs calls for thumb and thumb-2 targets. 11 éve
narmmat.pas 0cb1a129b3 {ARM} Implement usage of generic division-by-const optimization 11 éve
narmmem.pas d4968e054b + arm: tsettings.instructionset 12 éve
narmset.pas db01c50a4f * fixes jump table generate for arm thumb 11 éve
pp.lpi.template 1f032375c3 * improved template with help from Mattias Gaertner 19 éve
raarm.pas 780e75bfac o patch by Jeppe Johansen to fix mantis #17472: 15 éve
raarmgas.pas 09608a1c28 * fix warnings when compiling the compiler with DFA optimizer enabled on ARM 11 éve
rarmcon.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rarmdwa.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rarmnor.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rarmnum.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rarmrni.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rarmsri.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rarmsta.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rarmstd.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rarmsup.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 13 éve
rgcpu.pas 09728a9ae2 * improved r28534: LDR/STR on thumb do not support registers >r7 as destination/source 11 éve
symcpu.pas 02495c17bd Fix a typo. The CPU specific version of "ttypesym" should be called "tcputypesym" and not "tcpuypesym". 11 éve