marco 32124fd64c --- Merging r35545 into '.': 8 anni fa
..
aasmcpu.pas c7b40a6436 --- Merging r31191 into '.': 9 anni fa
agarmgas.pas decff7ad16 * merged the fixes_3_0-relevant parts of r31808, r31830, r31879: add support 9 anni fa
aoptcpu.pas 32124fd64c --- Merging r35545 into '.': 8 anni fa
aoptcpub.pas d37e72dbf9 * ARM: instructions do modify the base register of pre/postindexed references. Report this fact in spilling_get_operation_type_ref and RegModifiedByInstruction functions. 11 anni fa
aoptcpuc.pas 790a4fe2d3 * log and id tags removed 20 anni fa
aoptcpud.pas 790a4fe2d3 * log and id tags removed 20 anni fa
armatt.inc b67e4fb8b3 added the ADR ARM pseudo instruction to instruction list 11 anni fa
armatts.inc b67e4fb8b3 added the ADR ARM pseudo instruction to instruction list 11 anni fa
armins.dat b67e4fb8b3 added the ADR ARM pseudo instruction to instruction list 11 anni fa
armnop.inc 666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) 12 anni fa
armop.inc b67e4fb8b3 added the ADR ARM pseudo instruction to instruction list 11 anni fa
armreg.dat 7150832ec9 + Cortex-M3 special registers, resolves #23185 12 anni fa
armtab.inc 666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) 12 anni fa
cgcpu.pas 463152d34b Merged revision(s) 31681, 31706, 31712, 31728, 31730, 31755 from trunk (ARM PIC): 9 anni fa
cpubase.pas fb52392e20 Reformat and comment is_thumb32_imm 11 anni fa
cpuelf.pas 4a90d7e3de + ARM internal linker: very initial support for Thumb mode, helloworld-class programs compiled with "-Cparmv6m -CIthumb" can now run. 11 anni fa
cpuinfo.pas c0cfae7867 --- Merging r30276 into '.': 9 anni fa
cpunode.pas b57c95043f + support overriding tdef/tsym methods with target-specific functionality: 11 anni fa
cpupara.pas 5053a39501 * moved ARM-specific tprocdef.total_stackframe_size field to cpu-specific 11 anni fa
cpupi.pas eeb15fc445 * Added virtual method tprocinfo.postprocess_code and moved target-specific processing from base class into target-specific descendant classes (ARM and AVR, other targets still to do). 11 anni fa
cputarg.pas d26f0552a0 * Sync with trunk r23404. 12 anni fa
hlcgcpu.pas 72e9cfee24 * create/destroy also the high level code generator for all architectures, 14 anni fa
itcpugas.pas 47d43750e4 * remove unused units from uses statements 12 anni fa
narmadd.pas 2fa7171a45 * generate AND for small set comparisons also when only set vars are involved using the cg class, so it works for arm thumb as well 11 anni fa
narmcal.pas 8b8a786823 * moved ARM/x86 ifdef'ed code from ncgcal to virtual methods 12 anni fa
narmcnv.pas e0ca083cce --- Merging r30038 into '.': 9 anni fa
narmcon.pas 196436b7e7 * ARM: Test if range check of floating point constants is necessary in the same way as on other targets. This should have been part of r10940 6 years ago... 11 anni fa
narminl.pas e0ca083cce --- Merging r30038 into '.': 9 anni fa
narmmat.pas 0cb1a129b3 {ARM} Implement usage of generic division-by-const optimization 11 anni fa
narmmem.pas d4968e054b + arm: tsettings.instructionset 12 anni fa
narmset.pas c7b40a6436 --- Merging r31191 into '.': 9 anni fa
pp.lpi.template 1f032375c3 * improved template with help from Mattias Gaertner 19 anni fa
raarm.pas 780e75bfac o patch by Jeppe Johansen to fix mantis #17472: 14 anni fa
raarmgas.pas 09608a1c28 * fix warnings when compiling the compiler with DFA optimizer enabled on ARM 11 anni fa
rarmcon.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 12 anni fa
rarmdwa.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 12 anni fa
rarmnor.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 12 anni fa
rarmnum.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 12 anni fa
rarmrni.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 12 anni fa
rarmsri.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 12 anni fa
rarmsta.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 12 anni fa
rarmstd.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 12 anni fa
rarmsup.inc 7150832ec9 + Cortex-M3 special registers, resolves #23185 12 anni fa
rgcpu.pas c0cfae7867 --- Merging r30276 into '.': 9 anni fa
symcpu.pas 5f8057775b --- Merging r30757 into '.': 9 anni fa