ncgmem.pas 49 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cpuinfo,cpubase,
  23. node,nmem;
  24. type
  25. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  26. procedure pass_generate_code;override;
  27. end;
  28. tcgloadparentfpnode = class(tloadparentfpnode)
  29. procedure pass_generate_code;override;
  30. end;
  31. tcgaddrnode = class(taddrnode)
  32. procedure pass_generate_code;override;
  33. end;
  34. tcgderefnode = class(tderefnode)
  35. procedure pass_generate_code;override;
  36. end;
  37. tcgsubscriptnode = class(tsubscriptnode)
  38. procedure pass_generate_code;override;
  39. end;
  40. tcgwithnode = class(twithnode)
  41. procedure pass_generate_code;override;
  42. end;
  43. tcgvecnode = class(tvecnode)
  44. function get_mul_size : aint;
  45. private
  46. procedure rangecheck_array;
  47. procedure rangecheck_string;
  48. protected
  49. {# This routine is used to calculate the address of the reference.
  50. On entry reg contains the index in the array,
  51. and l contains the size of each element in the array.
  52. This routine should update location.reference correctly,
  53. so it points to the correct address.
  54. }
  55. procedure update_reference_reg_mul(maybe_const_reg:tregister;l:aint);virtual;
  56. procedure update_reference_reg_packed(maybe_const_reg:tregister;l:aint);virtual;
  57. procedure second_wideansistring;virtual;
  58. procedure second_dynamicarray;virtual;
  59. public
  60. procedure pass_generate_code;override;
  61. end;
  62. implementation
  63. uses
  64. systems,
  65. cutils,cclasses,verbose,globals,constexp,
  66. symconst,symbase,symtype,symdef,symsym,symcpu,symtable,defutil,paramgr,
  67. aasmbase,aasmtai,aasmdata,
  68. procinfo,pass_2,parabase,
  69. pass_1,nld,ncon,nadd,ncnv,nutils,
  70. cgutils,cgobj,hlcgobj,
  71. tgobj,ncgutil,objcgutl,
  72. defcmp
  73. ;
  74. {*****************************************************************************
  75. TCGLOADVMTADDRNODE
  76. *****************************************************************************}
  77. procedure tcgloadvmtaddrnode.pass_generate_code;
  78. var
  79. href : treference;
  80. pool : THashSet;
  81. entry : PHashSetItem;
  82. begin
  83. location_reset(location,LOC_REGISTER,def_cgsize(voidpointertype));
  84. if (left.nodetype=typen) then
  85. begin
  86. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,voidpointertype);
  87. if not is_objcclass(left.resultdef) then
  88. begin
  89. reference_reset_symbol(href,
  90. current_asmdata.RefAsmSymbol(tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname,AT_DATA),0,
  91. voidpointertype.size);
  92. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,href,location.register);
  93. end
  94. else
  95. begin
  96. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  97. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  98. if (target_info.system in systems_objc_nfabi) then
  99. begin
  100. { find/add necessary classref/classname pool entries }
  101. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  102. end
  103. else
  104. begin
  105. { find/add necessary classref/classname pool entries }
  106. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  107. end;
  108. reference_reset_symbol(href,tasmlabel(entry^.Data),0,voidpointertype.size);
  109. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,href,location.register);
  110. end;
  111. end
  112. else
  113. begin
  114. { left contains self, load vmt from self }
  115. secondpass(left);
  116. gen_load_vmt_register(current_asmdata.CurrAsmList,tobjectdef(left.resultdef),left.location,location.register);
  117. end;
  118. end;
  119. {*****************************************************************************
  120. TCGLOADPARENTFPNODE
  121. *****************************************************************************}
  122. procedure tcgloadparentfpnode.pass_generate_code;
  123. var
  124. currpi : tprocinfo;
  125. hsym : tparavarsym;
  126. href : treference;
  127. begin
  128. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  129. begin
  130. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  131. location.register:=current_procinfo.framepointer;
  132. end
  133. else
  134. begin
  135. currpi:=current_procinfo;
  136. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  137. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,parentfpvoidpointertype);
  138. { load framepointer of current proc }
  139. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  140. if not assigned(hsym) then
  141. internalerror(200309281);
  142. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,hsym.localloc,location.register);
  143. { walk parents }
  144. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  145. begin
  146. currpi:=currpi.parent;
  147. if not assigned(currpi) then
  148. internalerror(200311201);
  149. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  150. if not assigned(hsym) then
  151. internalerror(200309282);
  152. if hsym.localloc.loc<>LOC_REFERENCE then
  153. internalerror(200309283);
  154. hlcg.reference_reset_base(href,parentfpvoidpointertype,location.register,hsym.localloc.reference.offset,sizeof(pint));
  155. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,href,location.register);
  156. end;
  157. end;
  158. end;
  159. {*****************************************************************************
  160. TCGADDRNODE
  161. *****************************************************************************}
  162. procedure tcgaddrnode.pass_generate_code;
  163. begin
  164. secondpass(left);
  165. location_reset(location,LOC_REGISTER,int_cgsize(resultdef.size));
  166. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,resultdef);
  167. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  168. { on x86_64-win64, array of chars can be returned in registers, however,
  169. when passing these arrays to other functions, the compiler wants to take
  170. the address of the array so when the addrnode has been created internally,
  171. we have to force the data into memory, see also tw14388.pp
  172. }
  173. if nf_internal in flags then
  174. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
  175. else
  176. internalerror(2006111510);
  177. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.resultdef,resultdef,left.location.reference,location.register);
  178. end;
  179. {*****************************************************************************
  180. TCGDEREFNODE
  181. *****************************************************************************}
  182. procedure tcgderefnode.pass_generate_code;
  183. var
  184. paraloc1 : tcgpara;
  185. pd : tprocdef;
  186. sym : tsym;
  187. st : tsymtable;
  188. hp : pnode;
  189. hp2 : tnode;
  190. extraoffset : tcgint;
  191. begin
  192. sym:=nil;
  193. { assume natural alignment, except for packed records }
  194. if not(resultdef.typ in [recorddef,objectdef]) or
  195. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  196. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment)
  197. else
  198. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1);
  199. { can we fold an add/sub node into the offset of the deref node? }
  200. extraoffset:=0;
  201. hp:=actualtargetnode(@left);
  202. if (hp^.nodetype=subn) and is_constintnode(taddnode(hp^).right) then
  203. begin
  204. extraoffset:=-tcgint(tordconstnode(taddnode(hp^).right).value);
  205. replacenode(hp^,taddnode(hp^).left);
  206. end
  207. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).right) then
  208. begin
  209. extraoffset:=tcgint(tordconstnode(taddnode(hp^).right).value);
  210. replacenode(hp^,taddnode(hp^).left);
  211. end
  212. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).left) then
  213. begin
  214. extraoffset:=tcgint(tordconstnode(taddnode(hp^).left).value);
  215. replacenode(hp^,taddnode(hp^).right);
  216. end;
  217. secondpass(left);
  218. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  219. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  220. case left.location.loc of
  221. LOC_CREGISTER,
  222. LOC_REGISTER:
  223. begin
  224. hlcg.maybe_change_load_node_reg(current_asmdata.CurrAsmList,left,true);
  225. {$ifdef cpu_uses_separate_address_registers}
  226. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  227. begin
  228. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  229. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  230. location.reference.base);
  231. end
  232. else
  233. {$endif}
  234. location.reference.base := left.location.register;
  235. end;
  236. LOC_CREFERENCE,
  237. LOC_REFERENCE:
  238. begin
  239. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  240. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  241. end;
  242. LOC_CONSTANT:
  243. begin
  244. location.reference.offset:=left.location.value;
  245. end;
  246. else
  247. internalerror(200507031);
  248. end;
  249. location.reference.offset:=location.reference.offset+extraoffset;
  250. if (cs_use_heaptrc in current_settings.globalswitches) and
  251. (cs_checkpointer in current_settings.localswitches) and
  252. not(cs_compilesystem in current_settings.moduleswitches) and
  253. {$ifdef x86}
  254. (tcpupointerdef(left.resultdef).x86pointertyp = tcpupointerdefclass(cpointerdef).default_x86_data_pointer_type) and
  255. {$endif x86}
  256. not(nf_no_checkpointer in flags) and
  257. { can be NR_NO in case of LOC_CONSTANT }
  258. (location.reference.base<>NR_NO) then
  259. begin
  260. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  261. (sym.typ<>procsym) then
  262. internalerror(2012010601);
  263. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  264. paraloc1.init;
  265. paramanager.getintparaloc(pd,1,paraloc1);
  266. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  267. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  268. paraloc1.done;
  269. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  270. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',nil,false);
  271. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  272. end;
  273. end;
  274. {*****************************************************************************
  275. TCGSUBSCRIPTNODE
  276. *****************************************************************************}
  277. procedure tcgsubscriptnode.pass_generate_code;
  278. var
  279. asmsym: tasmsymbol;
  280. paraloc1 : tcgpara;
  281. tmpref: treference;
  282. sref: tsubsetreference;
  283. awordoffset,
  284. offsetcorrection : aint;
  285. pd : tprocdef;
  286. sym : tsym;
  287. st : tsymtable;
  288. begin
  289. sym:=nil;
  290. secondpass(left);
  291. if codegenerror then
  292. exit;
  293. paraloc1.init;
  294. { several object types must be dereferenced implicitly }
  295. if is_implicit_pointer_object_type(left.resultdef) then
  296. begin
  297. if (not is_managed_type(left.resultdef)) or
  298. (target_info.system in systems_garbage_collected_managed_types) then
  299. begin
  300. { the contents of a class are aligned to a sizeof(pointer) }
  301. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),voidpointertype.size);
  302. case left.location.loc of
  303. LOC_CREGISTER,
  304. LOC_REGISTER:
  305. begin
  306. {$ifdef cpu_uses_separate_address_registers}
  307. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  308. begin
  309. location.reference.base:=rg.getaddressregister(current_asmdata.CurrAsmList);
  310. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  311. left.location.register,location.reference.base);
  312. end
  313. else
  314. {$endif}
  315. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  316. end;
  317. LOC_CREFERENCE,
  318. LOC_REFERENCE,
  319. { tricky type casting of parameters can cause these locations, see tb0592.pp on x86_64-linux }
  320. LOC_SUBSETREG,
  321. LOC_CSUBSETREG,
  322. LOC_SUBSETREF,
  323. LOC_CSUBSETREF:
  324. begin
  325. hlcg.reference_reset_base(location.reference,left.resultdef,
  326. hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  327. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  328. end;
  329. LOC_CONSTANT:
  330. begin
  331. { can happen with @classtype(pointerconst).field }
  332. location.reference.offset:=left.location.value;
  333. end;
  334. else
  335. internalerror(2009092401);
  336. end;
  337. { implicit deferencing }
  338. if (cs_use_heaptrc in current_settings.globalswitches) and
  339. (cs_checkpointer in current_settings.localswitches) and
  340. not(cs_compilesystem in current_settings.moduleswitches) then
  341. begin
  342. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  343. (sym.typ<>procsym) then
  344. internalerror(2012010602);
  345. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  346. paramanager.getintparaloc(pd,1,paraloc1);
  347. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  348. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  349. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  350. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',nil,false);
  351. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  352. end;
  353. end
  354. else
  355. { reference-counted implicit pointer object types don't have
  356. fields -> cannot be subscripted (calls are handled via call
  357. nodes) }
  358. internalerror(2011011901);
  359. end
  360. else
  361. begin
  362. location_copy(location,left.location);
  363. { some abi's require that functions return (some) records in }
  364. { registers }
  365. case location.loc of
  366. LOC_REFERENCE,
  367. LOC_CREFERENCE:
  368. ;
  369. LOC_CONSTANT,
  370. LOC_REGISTER,
  371. LOC_CREGISTER,
  372. { if a floating point value is casted into a record, it
  373. can happen that we get here an fpu or mm register }
  374. LOC_MMREGISTER,
  375. LOC_FPUREGISTER,
  376. LOC_CMMREGISTER,
  377. LOC_CFPUREGISTER:
  378. begin
  379. { in case the result is not something that can be put
  380. into an integer register (e.g.
  381. function_returning_record().non_regable_field, or
  382. a function returning a value > sizeof(intreg))
  383. -> force to memory
  384. }
  385. if not tstoreddef(left.resultdef).is_intregable or
  386. not tstoreddef(resultdef).is_intregable or
  387. { if the field spans multiple registers, we must force the record into
  388. memory as well }
  389. ((left.location.size in [OS_PAIR,OS_SPAIR]) and
  390. (vs.fieldoffset div sizeof(aword)<>(vs.fieldoffset+vs.getsize-1) div sizeof(aword))) or
  391. (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER,LOC_CMMREGISTER,LOC_CFPUREGISTER,
  392. { actually, we should be able to "subscript" a constant, but this would require some code
  393. which enables dumping and reading constants from a temporary memory buffer. This
  394. must be done a CPU dependent way, so it is not easy and probably not worth the effort (FK)
  395. }
  396. LOC_CONSTANT]) then
  397. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef)
  398. else
  399. begin
  400. if (left.location.loc = LOC_REGISTER) then
  401. location.loc := LOC_SUBSETREG
  402. else
  403. location.loc := LOC_CSUBSETREG;
  404. location.size:=def_cgsize(resultdef);
  405. offsetcorrection:=0;
  406. if (left.location.size in [OS_PAIR,OS_SPAIR]) then
  407. begin
  408. if not is_packed_record_or_object(left.resultdef) then
  409. awordoffset:=sizeof(aword)
  410. else
  411. awordoffset:=sizeof(aword)*8;
  412. if (vs.fieldoffset>=awordoffset) xor (target_info.endian=endian_big) then
  413. location.sreg.subsetreg := left.location.registerhi
  414. else
  415. location.sreg.subsetreg := left.location.register;
  416. if vs.fieldoffset>=awordoffset then
  417. offsetcorrection := sizeof(aword)*8;
  418. location.sreg.subsetregsize := OS_INT;
  419. end
  420. else
  421. begin
  422. location.sreg.subsetreg := left.location.register;
  423. location.sreg.subsetregsize := left.location.size;
  424. end;
  425. if not is_packed_record_or_object(left.resultdef) then
  426. begin
  427. if (target_info.endian = ENDIAN_BIG) then
  428. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8+offsetcorrection
  429. else
  430. location.sreg.startbit := (vs.fieldoffset * 8)-offsetcorrection;
  431. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  432. end
  433. else
  434. begin
  435. location.sreg.bitlen := resultdef.packedbitsize;
  436. if (target_info.endian = ENDIAN_BIG) then
  437. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset+offsetcorrection
  438. else
  439. location.sreg.startbit := vs.fieldoffset-offsetcorrection;
  440. end;
  441. end;
  442. end;
  443. LOC_SUBSETREG,
  444. LOC_CSUBSETREG:
  445. begin
  446. location.size:=def_cgsize(resultdef);
  447. if not is_packed_record_or_object(left.resultdef) then
  448. begin
  449. if (target_info.endian = ENDIAN_BIG) then
  450. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  451. else
  452. inc(location.sreg.startbit, vs.fieldoffset * 8);
  453. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  454. end
  455. else
  456. begin
  457. location.sreg.bitlen := resultdef.packedbitsize;
  458. if (target_info.endian = ENDIAN_BIG) then
  459. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  460. else
  461. inc(location.sreg.startbit, vs.fieldoffset);
  462. end;
  463. end;
  464. else
  465. internalerror(2006031901);
  466. end;
  467. end;
  468. if is_objc_class_or_protocol(left.resultdef) and
  469. (target_info.system in systems_objc_nfabi) then
  470. begin
  471. if (location.loc<>LOC_REFERENCE) or
  472. (location.reference.index<>NR_NO) then
  473. internalerror(2009092402);
  474. { the actual field offset is stored in memory (to solve the
  475. "fragile base class" problem: this way the layout of base
  476. classes can be changed without breaking programs compiled against
  477. earlier versions)
  478. }
  479. asmsym:=current_asmdata.RefAsmSymbol(vs.mangledname);
  480. reference_reset_symbol(tmpref,asmsym,0,sizeof(pint));
  481. location.reference.index:=cg.getaddressregister(current_asmdata.CurrAsmList);
  482. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,tmpref,location.reference.index);
  483. { always packrecords C -> natural alignment }
  484. location.reference.alignment:=vs.vardef.alignment;
  485. end
  486. else if is_java_class_or_interface(left.resultdef) or
  487. ((target_info.system in systems_jvm) and
  488. (left.resultdef.typ=recorddef)) then
  489. begin
  490. if (location.loc<>LOC_REFERENCE) or
  491. (location.reference.index<>NR_NO) or
  492. assigned(location.reference.symbol) then
  493. internalerror(2011011301);
  494. location.reference.symbol:=current_asmdata.RefAsmSymbol(vs.mangledname);
  495. end
  496. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  497. begin
  498. if not is_packed_record_or_object(left.resultdef) then
  499. begin
  500. inc(location.reference.offset,vs.fieldoffset);
  501. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  502. end
  503. else if (vs.fieldoffset mod 8 = 0) and
  504. (resultdef.packedbitsize mod 8 = 0) and
  505. { is different in case of e.g. packenum 2 and an enum }
  506. { which fits in 8 bits }
  507. (resultdef.size*8 = resultdef.packedbitsize) then
  508. begin
  509. inc(location.reference.offset,vs.fieldoffset div 8);
  510. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  511. end
  512. else
  513. begin
  514. sref.ref:=location.reference;
  515. sref.ref.alignment:=1;
  516. sref.bitindexreg:=NR_NO;
  517. inc(sref.ref.offset,vs.fieldoffset div 8);
  518. sref.startbit:=vs.fieldoffset mod 8;
  519. sref.bitlen:=resultdef.packedbitsize;
  520. if (left.location.loc=LOC_REFERENCE) then
  521. location.loc:=LOC_SUBSETREF
  522. else
  523. location.loc:=LOC_CSUBSETREF;
  524. location.sref:=sref;
  525. end;
  526. { also update the size of the location }
  527. location.size:=def_cgsize(resultdef);
  528. end;
  529. paraloc1.done;
  530. end;
  531. {*****************************************************************************
  532. TCGWITHNODE
  533. *****************************************************************************}
  534. procedure tcgwithnode.pass_generate_code;
  535. begin
  536. location_reset(location,LOC_VOID,OS_NO);
  537. if assigned(left) then
  538. secondpass(left);
  539. end;
  540. {*****************************************************************************
  541. TCGVECNODE
  542. *****************************************************************************}
  543. function tcgvecnode.get_mul_size : aint;
  544. begin
  545. if nf_memindex in flags then
  546. get_mul_size:=1
  547. else
  548. begin
  549. if (left.resultdef.typ=arraydef) then
  550. if not is_packed_array(left.resultdef) then
  551. get_mul_size:=tarraydef(left.resultdef).elesize
  552. else
  553. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  554. else
  555. get_mul_size:=resultdef.size;
  556. end
  557. end;
  558. { this routine must, like any other routine, not change the contents }
  559. { of base/index registers of references, as these may be regvars. }
  560. { The register allocator can coalesce one LOC_REGISTER being moved }
  561. { into another (as their live ranges won't overlap), but not a }
  562. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  563. { the live range of the LOC_CREGISTER will most likely overlap the }
  564. { the live range of the target LOC_(C)REGISTER) }
  565. { The passed register may be a LOC_CREGISTER as well. }
  566. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg:tregister;l:aint);
  567. var
  568. hreg: tregister;
  569. begin
  570. if l<>1 then
  571. begin
  572. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  573. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  574. maybe_const_reg:=hreg;
  575. end;
  576. if location.reference.base=NR_NO then
  577. location.reference.base:=maybe_const_reg
  578. else if location.reference.index=NR_NO then
  579. location.reference.index:=maybe_const_reg
  580. else
  581. begin
  582. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  583. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  584. reference_reset_base(location.reference,hreg,0,location.reference.alignment);
  585. { insert new index register }
  586. location.reference.index:=maybe_const_reg;
  587. end;
  588. { update alignment }
  589. if (location.reference.alignment=0) then
  590. internalerror(2009020704);
  591. location.reference.alignment:=newalignment(location.reference.alignment,l);
  592. end;
  593. { see remarks for tcgvecnode.update_reference_reg_mul above }
  594. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg:tregister;l:aint);
  595. var
  596. sref: tsubsetreference;
  597. offsetreg, hreg: tregister;
  598. alignpower: aint;
  599. temp : longint;
  600. begin
  601. { only orddefs are bitpacked. Even then we only need special code in }
  602. { case the bitpacked *byte size* is not a power of two, otherwise }
  603. { everything can be handled using the the regular array code. }
  604. if ((l mod 8) = 0) and
  605. (ispowerof2(l div 8,temp) or
  606. not is_ordinal(resultdef)
  607. {$ifndef cpu64bitalu}
  608. or is_64bitint(resultdef)
  609. {$endif not cpu64bitalu}
  610. ) then
  611. begin
  612. update_reference_reg_mul(maybe_const_reg,l div 8);
  613. exit;
  614. end;
  615. if (l > 8*sizeof(aint)) then
  616. internalerror(200608051);
  617. sref.ref := location.reference;
  618. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  619. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_INT,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  620. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_INT,l,hreg);
  621. { keep alignment for index }
  622. sref.ref.alignment := left.resultdef.alignment;
  623. if not ispowerof2(sref.ref.alignment,temp) then
  624. internalerror(2006081201);
  625. alignpower:=temp;
  626. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  627. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  628. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  629. if (sref.ref.base = NR_NO) then
  630. sref.ref.base := offsetreg
  631. else if (sref.ref.index = NR_NO) then
  632. sref.ref.index := offsetreg
  633. else
  634. begin
  635. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  636. sref.ref.base := offsetreg;
  637. end;
  638. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,hreg);
  639. sref.bitindexreg := hreg;
  640. sref.startbit := 0;
  641. sref.bitlen := resultdef.packedbitsize;
  642. if (left.location.loc = LOC_REFERENCE) then
  643. location.loc := LOC_SUBSETREF
  644. else
  645. location.loc := LOC_CSUBSETREF;
  646. location.sref := sref;
  647. end;
  648. procedure tcgvecnode.second_wideansistring;
  649. begin
  650. end;
  651. procedure tcgvecnode.second_dynamicarray;
  652. begin
  653. end;
  654. procedure tcgvecnode.rangecheck_array;
  655. var
  656. hightree : tnode;
  657. poslabel,
  658. neglabel : tasmlabel;
  659. hreg : tregister;
  660. paraloc1,paraloc2 : tcgpara;
  661. pd : tprocdef;
  662. begin
  663. { omit range checking when this is an array access to a pointer which has been
  664. typecasted from an array }
  665. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  666. exit;
  667. paraloc1.init;
  668. paraloc2.init;
  669. if is_open_array(left.resultdef) or
  670. is_array_of_const(left.resultdef) then
  671. begin
  672. { cdecl functions don't have high() so we can not check the range }
  673. { (can't use current_procdef, since it may be a nested procedure) }
  674. if not(tprocdef(tparasymtable(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry).owner).defowner).proccalloption in cdecl_pocalls) then
  675. begin
  676. { Get high value }
  677. hightree:=load_high_value_node(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry));
  678. { it must be available }
  679. if not assigned(hightree) then
  680. internalerror(200212201);
  681. firstpass(hightree);
  682. secondpass(hightree);
  683. { generate compares }
  684. if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  685. hreg:=cg.makeregsize(current_asmdata.CurrAsmList,right.location.register,OS_INT)
  686. else
  687. begin
  688. hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  689. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,hreg);
  690. end;
  691. current_asmdata.getjumplabel(neglabel);
  692. current_asmdata.getjumplabel(poslabel);
  693. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_LT,0,hreg,poslabel);
  694. cg.a_cmp_loc_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_BE,hightree.location,hreg,neglabel);
  695. cg.a_label(current_asmdata.CurrAsmList,poslabel);
  696. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_RANGEERROR',false);
  697. cg.a_label(current_asmdata.CurrAsmList,neglabel);
  698. { release hightree }
  699. hightree.free;
  700. end;
  701. end
  702. else
  703. if is_dynamic_array(left.resultdef) then
  704. begin
  705. pd:=search_system_proc('fpc_dynarray_rangecheck');
  706. paramanager.getintparaloc(pd,1,paraloc1);
  707. paramanager.getintparaloc(pd,2,paraloc2);
  708. if pd.is_pushleftright then
  709. begin
  710. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  711. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  712. end
  713. else
  714. begin
  715. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  716. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  717. end;
  718. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  719. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  720. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  721. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_DYNARRAY_RANGECHECK',false);
  722. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  723. end;
  724. { for regular arrays, we don't have to do anything because the index has been
  725. type converted to the index type, which already inserted a range check if
  726. necessary }
  727. paraloc1.done;
  728. paraloc2.done;
  729. end;
  730. procedure tcgvecnode.rangecheck_string;
  731. var
  732. paraloc1,
  733. paraloc2: tcgpara;
  734. helpername: TIDString;
  735. pd: tprocdef;
  736. begin
  737. paraloc1.init;
  738. paraloc2.init;
  739. case tstringdef(left.resultdef).stringtype of
  740. { it's the same for ansi- and wide strings }
  741. st_unicodestring,
  742. st_widestring,
  743. st_ansistring:
  744. begin
  745. helpername:='fpc_'+tstringdef(left.resultdef).stringtypname+'_rangecheck';
  746. pd:=search_system_proc(helpername);
  747. paramanager.getintparaloc(pd,1,paraloc1);
  748. paramanager.getintparaloc(pd,2,paraloc2);
  749. if pd.is_pushleftright then
  750. begin
  751. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  752. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  753. end
  754. else
  755. begin
  756. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  757. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  758. end;
  759. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  760. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  761. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  762. cg.a_call_name(current_asmdata.CurrAsmList,helpername,false);
  763. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  764. end;
  765. st_shortstring:
  766. begin
  767. {!!!!!!!!!!!!!!!!!}
  768. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  769. end;
  770. st_longstring:
  771. begin
  772. {!!!!!!!!!!!!!!!!!}
  773. end;
  774. end;
  775. paraloc1.done;
  776. paraloc2.done;
  777. end;
  778. procedure tcgvecnode.pass_generate_code;
  779. var
  780. offsetdec,
  781. extraoffset : aint;
  782. rightp : pnode;
  783. otl,ofl : tasmlabel;
  784. newsize : tcgsize;
  785. mulsize,
  786. bytemulsize,
  787. alignpow : aint;
  788. isjump : boolean;
  789. paraloc1,
  790. paraloc2 : tcgpara;
  791. subsetref : tsubsetreference;
  792. temp : longint;
  793. begin
  794. paraloc1.init;
  795. paraloc2.init;
  796. mulsize:=get_mul_size;
  797. if not is_packed_array(left.resultdef) then
  798. bytemulsize:=mulsize
  799. else
  800. bytemulsize:=mulsize div 8;
  801. newsize:=def_cgsize(resultdef);
  802. secondpass(left);
  803. if left.location.loc=LOC_CREFERENCE then
  804. location_reset_ref(location,LOC_CREFERENCE,newsize,left.location.reference.alignment)
  805. else
  806. location_reset_ref(location,LOC_REFERENCE,newsize,left.location.reference.alignment);
  807. { an ansistring needs to be dereferenced }
  808. if is_ansistring(left.resultdef) or
  809. is_wide_or_unicode_string(left.resultdef) then
  810. begin
  811. if nf_callunique in flags then
  812. internalerror(200304236);
  813. {DM!!!!!}
  814. case left.location.loc of
  815. LOC_REGISTER,
  816. LOC_CREGISTER :
  817. begin
  818. {$ifdef m68k}
  819. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  820. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,location.reference.base);
  821. {$else m68k}
  822. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  823. {$endif m68k}
  824. end;
  825. LOC_CREFERENCE,
  826. LOC_REFERENCE :
  827. begin
  828. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  829. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location.reference,location.reference.base);
  830. end;
  831. LOC_CONSTANT:
  832. begin
  833. hlcg.reference_reset_base(location.reference,left.resultdef,NR_NO,left.location.value,location.reference.alignment);
  834. end;
  835. else
  836. internalerror(2002032218);
  837. end;
  838. if is_ansistring(left.resultdef) then
  839. offsetdec:=1
  840. else
  841. offsetdec:=2;
  842. location.reference.alignment:=offsetdec;
  843. { in ansistrings/widestrings S[1] is p<w>char(S)[0] }
  844. if not(cs_zerobasedstrings in current_settings.localswitches) then
  845. dec(location.reference.offset,offsetdec);
  846. end
  847. else if is_dynamic_array(left.resultdef) then
  848. begin
  849. case left.location.loc of
  850. LOC_REGISTER,
  851. LOC_CREGISTER :
  852. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  853. LOC_REFERENCE,
  854. LOC_CREFERENCE :
  855. begin
  856. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  857. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  858. left.location.reference,location.reference.base);
  859. end;
  860. else
  861. internalerror(2002032219);
  862. end;
  863. { a dynarray points to the start of a memory block, which
  864. we assume to be always aligned to a multiple of the
  865. pointer size
  866. }
  867. location.reference.alignment:=voidpointertype.size;
  868. end
  869. else
  870. begin
  871. { may happen in case of function results }
  872. case left.location.loc of
  873. LOC_CSUBSETREG,
  874. LOC_CREGISTER,
  875. LOC_CMMREGISTER,
  876. LOC_SUBSETREG,
  877. LOC_REGISTER,
  878. LOC_MMREGISTER:
  879. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  880. end;
  881. location_copy(location,left.location);
  882. end;
  883. { location must be memory }
  884. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  885. internalerror(200411013);
  886. { offset can only differ from 0 if arraydef }
  887. if (left.resultdef.typ=arraydef) and
  888. not(is_dynamic_array(left.resultdef)) and
  889. (not(is_packed_array(left.resultdef)) or
  890. ((mulsize mod 8 = 0) and
  891. ispowerof2(mulsize div 8,temp)) or
  892. { only orddefs are bitpacked }
  893. not is_ordinal(resultdef)
  894. {$ifndef cpu64bitalu}
  895. or is_64bitint(resultdef)
  896. {$endif not cpu64bitalu}
  897. ) then
  898. dec(location.reference.offset,bytemulsize*tarraydef(left.resultdef).lowrange);
  899. if right.nodetype=ordconstn then
  900. begin
  901. { offset can only differ from 0 if arraydef }
  902. if cs_check_range in current_settings.localswitches then
  903. begin
  904. secondpass(right);
  905. case left.resultdef.typ of
  906. arraydef :
  907. rangecheck_array;
  908. stringdef :
  909. rangecheck_string;
  910. end;
  911. end;
  912. if not(is_packed_array(left.resultdef)) or
  913. ((mulsize mod 8 = 0) and
  914. (ispowerof2(mulsize div 8,temp) or
  915. { only orddefs are bitpacked }
  916. not is_ordinal(resultdef))) then
  917. begin
  918. extraoffset:=bytemulsize*tordconstnode(right).value.svalue;
  919. inc(location.reference.offset,extraoffset);
  920. { adjust alignment after to this change }
  921. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset);
  922. { don't do this for floats etc.; needed to properly set the }
  923. { size for bitpacked arrays (e.g. a bitpacked array of }
  924. { enums who are size 2 but fit in one byte -> in the array }
  925. { they will be one byte and have to be stored like that) }
  926. if is_packed_array(left.resultdef) and
  927. (tcgsize2size[newsize] <> bytemulsize) then
  928. newsize:=int_cgsize(bytemulsize);
  929. end
  930. else
  931. begin
  932. subsetref.ref := location.reference;
  933. subsetref.ref.alignment := left.resultdef.alignment;
  934. if not ispowerof2(subsetref.ref.alignment,temp) then
  935. internalerror(2006081212);
  936. alignpow:=temp;
  937. inc(subsetref.ref.offset,((mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow)) shl alignpow);
  938. subsetref.bitindexreg := NR_NO;
  939. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  940. subsetref.bitlen := resultdef.packedbitsize;
  941. if (left.location.loc = LOC_REFERENCE) then
  942. location.loc := LOC_SUBSETREF
  943. else
  944. location.loc := LOC_CSUBSETREF;
  945. location.sref := subsetref;
  946. end;
  947. end
  948. else
  949. { not nodetype=ordconstn }
  950. begin
  951. if (cs_opt_level1 in current_settings.optimizerswitches) and
  952. { if we do range checking, we don't }
  953. { need that fancy code (it would be }
  954. { buggy) }
  955. not(cs_check_range in current_settings.localswitches) and
  956. (left.resultdef.typ=arraydef) and
  957. not is_packed_array(left.resultdef) then
  958. begin
  959. extraoffset:=0;
  960. rightp:=actualtargetnode(@right);
  961. if rightp^.nodetype=addn then
  962. begin
  963. if taddnode(rightp^).right.nodetype=ordconstn then
  964. begin
  965. extraoffset:=tordconstnode(taddnode(rightp^).right).value.svalue;
  966. replacenode(rightp^,taddnode(rightp^).left);
  967. end
  968. else if taddnode(rightp^).left.nodetype=ordconstn then
  969. begin
  970. extraoffset:=tordconstnode(taddnode(rightp^).left).value.svalue;
  971. replacenode(rightp^,taddnode(rightp^).right);
  972. end;
  973. end
  974. else if rightp^.nodetype=subn then
  975. begin
  976. if taddnode(rightp^).right.nodetype=ordconstn then
  977. begin
  978. extraoffset:=-tordconstnode(taddnode(rightp^).right).value.svalue;
  979. replacenode(rightp^,taddnode(rightp^).left);
  980. end;
  981. end;
  982. inc(location.reference.offset,
  983. mulsize*extraoffset);
  984. end;
  985. { calculate from left to right }
  986. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  987. internalerror(200304237);
  988. isjump:=(right.expectloc=LOC_JUMP);
  989. otl:=nil;
  990. ofl:=nil;
  991. if isjump then
  992. begin
  993. otl:=current_procinfo.CurrTrueLabel;
  994. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  995. ofl:=current_procinfo.CurrFalseLabel;
  996. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  997. end;
  998. secondpass(right);
  999. { if mulsize = 1, we won't have to modify the index }
  1000. if not(right.location.loc in [LOC_CREGISTER,LOC_REGISTER]) or (right.location.size<>OS_ADDR) then
  1001. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,ptruinttype,true);
  1002. if isjump then
  1003. begin
  1004. current_procinfo.CurrTrueLabel:=otl;
  1005. current_procinfo.CurrFalseLabel:=ofl;
  1006. end
  1007. else if (right.location.loc = LOC_JUMP) then
  1008. internalerror(2006010801);
  1009. { produce possible range check code: }
  1010. if cs_check_range in current_settings.localswitches then
  1011. begin
  1012. if left.resultdef.typ=arraydef then
  1013. rangecheck_array
  1014. else if (left.resultdef.typ=stringdef) then
  1015. rangecheck_string;
  1016. end;
  1017. { insert the register and the multiplication factor in the
  1018. reference }
  1019. if not is_packed_array(left.resultdef) then
  1020. update_reference_reg_mul(right.location.register,mulsize)
  1021. else
  1022. update_reference_reg_packed(right.location.register,mulsize);
  1023. end;
  1024. location.size:=newsize;
  1025. paraloc1.done;
  1026. paraloc2.done;
  1027. end;
  1028. begin
  1029. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  1030. cloadparentfpnode:=tcgloadparentfpnode;
  1031. caddrnode:=tcgaddrnode;
  1032. cderefnode:=tcgderefnode;
  1033. csubscriptnode:=tcgsubscriptnode;
  1034. cwithnode:=tcgwithnode;
  1035. cvecnode:=tcgvecnode;
  1036. end.