florian 56a99d2512 + sanity checks in mips and sparc register allocator 3 gadi atpakaļ
..
aasmcpu.pas e23ed15634 * MIPS: reworked and fixed procedure fixup_jmps: 9 gadi atpakaļ
aoptcpu.pas 5165497498 * MIPS: fixed TCpuAsmOptimizer.InstructionLoadsFromReg, it now correctly considers instructions that read their first operand. 8 gadi atpakaļ
aoptcpub.pas 93e0dd9c2f * Patch from Fuxin Zhang: other mips and mipsel CPUs changes 13 gadi atpakaļ
aoptcpud.pas 0c8546f94c * more MIPS code of David Zhang integrated 15 gadi atpakaļ
cgcpu.pas caf964ac31 Fix storing of unaligned 64-bit to memory 2 gadi atpakaļ
cpubase.pas 36f9ce1cb2 Merge of trunk commits 39983,39986,40109 6 gadi atpakaļ
cpuelf.pas 578348817b * MIPS: some progress with linker: 9 gadi atpakaļ
cpugas.pas 74a49b5f91 * restructured the the TExternalAssembler constructors so that the 8 gadi atpakaļ
cpuinfo.pas 1f20cfe991 Merge of several commits related to enhancements in PPU writing 5 gadi atpakaļ
cpunode.pas a0efde8167 * automatically generate necessary indirect symbols when a new assembler 9 gadi atpakaļ
cpupara.pas 518cdf9674 * replaced the saved_XXX_registers arrays with virtual methods inside 7 gadi atpakaļ
cpupi.pas 880d438704 * renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can 8 gadi atpakaļ
cputarg.pas b2b26f84cf * partially merged the mips-embedded branch of Michael Ring: 11 gadi atpakaļ
hlcgcpu.pas 4686f61002 * keep track of the temp position separately from the offset in references, 7 gadi atpakaļ
itcpugas.pas 11a9ff4a43 * Removed unused vars for mipsel compiler. 10 gadi atpakaļ
mipsreg.dat f870b0f8fc Fix stabs number for FPU register, which start at 38 instead of 32 8 gadi atpakaļ
ncpuadd.pas 91aad00398 Fix for bug report 38549 about wrong code generation 2 gadi atpakaļ
ncpucall.pas 4c68ea1000 * use pocalls_cdecl and cstylearrayofconst more consistently instead of 8 gadi atpakaļ
ncpucnv.pas a25ebbba3e + added volatility information to all memory references 8 gadi atpakaļ
ncpuinln.pas 4065483a50 * completed thlcgobj.location_force_fpureg(), use it everywhere and removed 11 gadi atpakaļ
ncpuld.pas 4b820a1ca5 - Removed tcgloadnode.generate_picvaraccess, it is never used and is not necessary because PIC stuff is handled at lower levels. 12 gadi atpakaļ
ncpumat.pas 7949bebb8d * synchronised with r28168 of trunk 11 gadi atpakaļ
ncpuset.pas 197f5cbec5 * let all the case code generation work with tconstexprint instead of aint, 3 gadi atpakaļ
opcode.inc 4e7c908b0d + MIPS: added movn and movz instructions. 11 gadi atpakaļ
racpugas.pas 1b66995754 * factored out check to determine whether a variable can be subscripted in 7 gadi atpakaļ
rgcpu.pas 56a99d2512 + sanity checks in mips and sparc register allocator 2 gadi atpakaļ
rmipscon.inc e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 11 gadi atpakaļ
rmipsdwf.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 gadi atpakaļ
rmipsgas.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 gadi atpakaļ
rmipsgri.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 gadi atpakaļ
rmipsgss.inc f58fcdf401 + basic mips stuff 20 gadi atpakaļ
rmipsnor.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 gadi atpakaļ
rmipsnum.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 gadi atpakaļ
rmipsrni.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 gadi atpakaļ
rmipssri.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 gadi atpakaļ
rmipssta.inc fd6d3b4971 Regenerated after change in mipsreg.dat 8 gadi atpakaļ
rmipsstd.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 gadi atpakaļ
rmipssup.inc e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 11 gadi atpakaļ
strinst.inc 4e7c908b0d + MIPS: added movn and movz instructions. 11 gadi atpakaļ
symcpu.pas 7dd1d6aa77 o fixes handling of iso i/o parameters/program parameters: 10 gadi atpakaļ
tripletcpu.pas 76045bfc04 * merged macOS/AArch64 support + revisions these changes depended on 4 gadi atpakaļ