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ncgmem.pas 49 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cgutils,cpubase,
  23. symtype,
  24. node,nmem;
  25. type
  26. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  27. procedure pass_generate_code;override;
  28. end;
  29. tcgloadparentfpnode = class(tloadparentfpnode)
  30. procedure pass_generate_code;override;
  31. end;
  32. tcgaddrnode = class(taddrnode)
  33. procedure pass_generate_code;override;
  34. end;
  35. tcgderefnode = class(tderefnode)
  36. procedure pass_generate_code;override;
  37. end;
  38. tcgsubscriptnode = class(tsubscriptnode)
  39. protected
  40. function handle_platform_subscript: boolean; virtual;
  41. public
  42. procedure pass_generate_code;override;
  43. end;
  44. tcgvecnode = class(tvecnode)
  45. function get_mul_size : asizeint;
  46. private
  47. procedure rangecheck_array;
  48. procedure rangecheck_string;
  49. protected
  50. {# This routine is used to calculate the address of the reference.
  51. On entry reg contains the index in the array,
  52. and l contains the size of each element in the array.
  53. This routine should update location.reference correctly,
  54. so it points to the correct address.
  55. }
  56. procedure update_reference_reg_mul(maybe_const_reg: tregister;regsize: tdef; l: aint);virtual;
  57. procedure update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l: aint);virtual;
  58. procedure update_reference_offset(var ref: treference; index, mulsize: ASizeInt); virtual;
  59. procedure second_wideansistring;virtual;
  60. procedure second_dynamicarray;virtual;
  61. function valid_index_size(size: tcgsize): boolean;virtual;
  62. public
  63. procedure pass_generate_code;override;
  64. end;
  65. implementation
  66. uses
  67. systems,
  68. cutils,cclasses,verbose,globals,constexp,fmodule,
  69. symconst,symbase,symdef,symsym,symtable,defutil,paramgr,
  70. aasmbase,aasmdata,
  71. procinfo,pass_2,parabase,
  72. ncon,nadd,nutils,
  73. cgobj,hlcgobj,
  74. objcgutl;
  75. {*****************************************************************************
  76. TCGLOADVMTADDRNODE
  77. *****************************************************************************}
  78. procedure tcgloadvmtaddrnode.pass_generate_code;
  79. var
  80. href : treference;
  81. pool : THashSet;
  82. entry : PHashSetItem;
  83. vmtname : tsymstr;
  84. otherunit,
  85. indirect : boolean;
  86. begin
  87. location_reset(location,LOC_REGISTER,def_cgsize(voidpointertype));
  88. if (left.nodetype=typen) then
  89. begin
  90. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,voidpointertype);
  91. if not is_objcclass(left.resultdef) then
  92. begin
  93. { we are using a direct reference if any of the following is true:
  94. - the target does not support packages
  95. - the target does not use indirect references
  96. - the class is located inside the same unit }
  97. otherunit:=findunitsymtable(left.resultdef.owner).moduleid<>current_module.moduleid;
  98. indirect:=(tf_supports_packages in target_info.flags) and
  99. (target_info.system in systems_indirect_var_imports) and
  100. otherunit;
  101. vmtname:=tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname;
  102. reference_reset_symbol(href,
  103. current_asmdata.RefAsmSymbol(vmtname,AT_DATA,indirect),0,
  104. resultdef.alignment,[]);
  105. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,resultdef,resultdef,href,location.register);
  106. if otherunit then
  107. current_module.add_extern_asmsym(vmtname,AB_EXTERNAL,AT_DATA);
  108. end
  109. else
  110. begin
  111. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  112. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  113. if (target_info.system in systems_objc_nfabi) then
  114. begin
  115. { find/add necessary classref/classname pool entries }
  116. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  117. end
  118. else
  119. begin
  120. { find/add necessary classref/classname pool entries }
  121. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  122. end;
  123. reference_reset_symbol(href,tasmlabel(entry^.Data),0,objc_idtype.alignment,[]);
  124. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,objc_idtype,objc_idtype,href,location.register);
  125. end;
  126. end
  127. else
  128. { should be handled in pass 1 }
  129. internalerror(2015052801);
  130. end;
  131. {*****************************************************************************
  132. TCGLOADPARENTFPNODE
  133. *****************************************************************************}
  134. procedure tcgloadparentfpnode.pass_generate_code;
  135. var
  136. currpi : tprocinfo;
  137. hsym : tparavarsym;
  138. href : treference;
  139. begin
  140. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  141. begin
  142. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  143. location.register:=current_procinfo.framepointer;
  144. end
  145. else
  146. begin
  147. currpi:=current_procinfo;
  148. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  149. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,parentfpvoidpointertype);
  150. { load framepointer of current proc }
  151. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  152. if not assigned(hsym) then
  153. internalerror(200309281);
  154. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,hsym.localloc,location.register);
  155. { walk parents }
  156. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  157. begin
  158. currpi:=currpi.parent;
  159. if not assigned(currpi) then
  160. internalerror(200311201);
  161. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  162. if not assigned(hsym) then
  163. internalerror(200309282);
  164. if hsym.localloc.loc<>LOC_REFERENCE then
  165. internalerror(200309283);
  166. hlcg.reference_reset_base(href,parentfpvoidpointertype,location.register,hsym.localloc.reference.offset,ctempposinvalid,parentfpvoidpointertype.alignment,[]);
  167. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,href,location.register);
  168. end;
  169. end;
  170. end;
  171. {*****************************************************************************
  172. TCGADDRNODE
  173. *****************************************************************************}
  174. procedure tcgaddrnode.pass_generate_code;
  175. begin
  176. secondpass(left);
  177. location_reset(location,LOC_REGISTER,int_cgsize(resultdef.size));
  178. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,resultdef);
  179. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  180. { on x86_64-win64, array of chars can be returned in registers, however,
  181. when passing these arrays to other functions, the compiler wants to take
  182. the address of the array so when the addrnode has been created internally,
  183. we have to force the data into memory, see also tw14388.pp
  184. }
  185. if nf_internal in flags then
  186. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
  187. else
  188. internalerror(2006111510);
  189. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.resultdef,resultdef,left.location.reference,location.register);
  190. end;
  191. {*****************************************************************************
  192. TCGDEREFNODE
  193. *****************************************************************************}
  194. procedure tcgderefnode.pass_generate_code;
  195. var
  196. paraloc1 : tcgpara;
  197. pd : tprocdef;
  198. sym : tsym;
  199. st : tsymtable;
  200. hp : pnode;
  201. extraoffset : tcgint;
  202. begin
  203. sym:=nil;
  204. { assume natural alignment, except for packed records }
  205. if not(resultdef.typ in [recorddef,objectdef]) or
  206. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  207. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment,[])
  208. else
  209. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1,[]);
  210. { can we fold an add/sub node into the offset of the deref node? }
  211. extraoffset:=0;
  212. hp:=actualtargetnode(@left);
  213. if (hp^.nodetype=subn) and is_constintnode(taddnode(hp^).right) then
  214. begin
  215. extraoffset:=-tcgint(tordconstnode(taddnode(hp^).right).value);
  216. replacenode(hp^,taddnode(hp^).left);
  217. end
  218. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).right) then
  219. begin
  220. extraoffset:=tcgint(tordconstnode(taddnode(hp^).right).value);
  221. replacenode(hp^,taddnode(hp^).left);
  222. end
  223. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).left) then
  224. begin
  225. extraoffset:=tcgint(tordconstnode(taddnode(hp^).left).value);
  226. replacenode(hp^,taddnode(hp^).right);
  227. end;
  228. secondpass(left);
  229. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  230. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  231. case left.location.loc of
  232. LOC_CREGISTER,
  233. LOC_REGISTER:
  234. begin
  235. hlcg.maybe_change_load_node_reg(current_asmdata.CurrAsmList,left,true);
  236. {$ifdef cpu_uses_separate_address_registers}
  237. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  238. begin
  239. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  240. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  241. location.reference.base);
  242. end
  243. else
  244. {$endif}
  245. location.reference.base := left.location.register;
  246. end;
  247. LOC_CREFERENCE,
  248. LOC_REFERENCE:
  249. begin
  250. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  251. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  252. end;
  253. LOC_CONSTANT:
  254. begin
  255. location.reference.offset:=left.location.value;
  256. end;
  257. else
  258. internalerror(200507031);
  259. end;
  260. location.reference.offset:=location.reference.offset+extraoffset;
  261. if (cs_use_heaptrc in current_settings.globalswitches) and
  262. (cs_checkpointer in current_settings.localswitches) and
  263. not(cs_compilesystem in current_settings.moduleswitches) and
  264. tpointerdef(left.resultdef).compatible_with_pointerdef_size(tpointerdef(voidpointertype)) and
  265. not(nf_no_checkpointer in flags) and
  266. { can be NR_NO in case of LOC_CONSTANT }
  267. (location.reference.base<>NR_NO) then
  268. begin
  269. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  270. (sym.typ<>procsym) then
  271. internalerror(2012010601);
  272. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  273. paraloc1.init;
  274. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  275. hlcg.a_loadaddr_ref_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference,paraloc1);
  276. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  277. paraloc1.done;
  278. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  279. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  280. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  281. include(current_settings.moduleswitches,cs_checkpointer_called);
  282. end;
  283. end;
  284. {*****************************************************************************
  285. TCGSUBSCRIPTNODE
  286. *****************************************************************************}
  287. function tcgsubscriptnode.handle_platform_subscript: boolean;
  288. begin
  289. result:=false;
  290. end;
  291. procedure tcgsubscriptnode.pass_generate_code;
  292. var
  293. asmsym: tasmsymbol;
  294. paraloc1 : tcgpara;
  295. tmpref: treference;
  296. sref: tsubsetreference;
  297. awordoffset,
  298. offsetcorrection : aint;
  299. pd : tprocdef;
  300. sym : tsym;
  301. st : tsymtable;
  302. hreg : TRegister;
  303. begin
  304. sym:=nil;
  305. secondpass(left);
  306. if codegenerror then
  307. exit;
  308. paraloc1.init;
  309. { several object types must be dereferenced implicitly }
  310. if is_implicit_pointer_object_type(left.resultdef) then
  311. begin
  312. if (not is_managed_type(left.resultdef)) or
  313. (target_info.system in systems_garbage_collected_managed_types) then
  314. begin
  315. { take care of the alignment of the fields }
  316. if not(left.resultdef is tabstractrecorddef) then
  317. Internalerror(2018021601);
  318. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),newalignment(tabstractrecordsymtable(tabstractrecorddef(left.resultdef).symtable).recordalignment,vs.fieldoffset),[]);
  319. case left.location.loc of
  320. LOC_CREGISTER,
  321. LOC_REGISTER:
  322. begin
  323. {$ifdef cpu_uses_separate_address_registers}
  324. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  325. begin
  326. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  327. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  328. left.location.register,location.reference.base);
  329. end
  330. else
  331. {$endif}
  332. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,ctempposinvalid,location.reference.alignment,location.reference.volatility);
  333. end;
  334. LOC_CREFERENCE,
  335. LOC_REFERENCE,
  336. { tricky type casting of parameters can cause these locations, see tb0592.pp on x86_64-linux }
  337. LOC_SUBSETREG,
  338. LOC_CSUBSETREG,
  339. LOC_SUBSETREF,
  340. LOC_CSUBSETREF:
  341. begin
  342. hlcg.reference_reset_base(location.reference,left.resultdef,
  343. hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,ctempposinvalid,location.reference.alignment,location.reference.volatility);
  344. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  345. end;
  346. LOC_CONSTANT:
  347. begin
  348. { can happen with @classtype(pointerconst).field }
  349. location.reference.offset:=left.location.value;
  350. end;
  351. else
  352. internalerror(2009092401);
  353. end;
  354. { implicit deferencing }
  355. if (cs_use_heaptrc in current_settings.globalswitches) and
  356. (cs_checkpointer in current_settings.localswitches) and
  357. not(cs_compilesystem in current_settings.moduleswitches) then
  358. begin
  359. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  360. (sym.typ<>procsym) then
  361. internalerror(2012010602);
  362. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  363. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  364. hlcg.a_loadaddr_ref_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference,paraloc1);
  365. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  366. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  367. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  368. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  369. system.include(current_settings.moduleswitches,cs_checkpointer_called);
  370. end;
  371. end
  372. else
  373. { reference-counted implicit pointer object types don't have
  374. fields -> cannot be subscripted (calls are handled via call
  375. nodes) }
  376. internalerror(2011011901);
  377. end
  378. else
  379. begin
  380. location_copy(location,left.location);
  381. { some abi's require that functions return (some) records in }
  382. { registers }
  383. case location.loc of
  384. LOC_REFERENCE,
  385. LOC_CREFERENCE:
  386. ;
  387. LOC_CONSTANT,
  388. LOC_REGISTER,
  389. LOC_CREGISTER,
  390. { if a floating point value is casted into a record, it
  391. can happen that we get here an fpu or mm register }
  392. LOC_MMREGISTER,
  393. LOC_FPUREGISTER,
  394. LOC_CMMREGISTER,
  395. LOC_CFPUREGISTER:
  396. begin
  397. { in case the result is not something that can be put
  398. into an integer register (e.g.
  399. function_returning_record().non_regable_field, or
  400. a function returning a value > sizeof(intreg))
  401. -> force to memory
  402. }
  403. if not tstoreddef(left.resultdef).is_intregable or
  404. not tstoreddef(resultdef).is_intregable or
  405. { if the field spans multiple registers, we must force the record into
  406. memory as well }
  407. ((left.location.size in [OS_PAIR,OS_SPAIR]) and
  408. (vs.fieldoffset div sizeof(aword)<>(vs.fieldoffset+vs.getsize-1) div sizeof(aword))) or
  409. (location.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER,
  410. { actually, we should be able to "subscript" a constant, but this would require some code
  411. which enables dumping and reading constants from a temporary memory buffer. This
  412. must be done a CPU dependent way, so it is not easy and probably not worth the effort (FK)
  413. }
  414. LOC_CONSTANT]) then
  415. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef)
  416. else
  417. begin
  418. if (location.loc in [LOC_MMREGISTER,LOC_CMMREGISTER]) then
  419. if (tcgsize2size[location.size]<=tcgsize2size[OS_INT]) then
  420. begin
  421. hreg:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  422. cg.a_loadmm_reg_intreg(current_asmdata.CurrAsmList,reg_cgsize(left.location.register),location.size,
  423. left.location.register,hreg,mms_movescalar);
  424. location_reset(left.location,LOC_REGISTER,int_cgsize(tcgsize2size[left.location.size]));
  425. left.location.register:=hreg;
  426. { copy again, we changed left.location }
  427. location_copy(location,left.location);
  428. end
  429. else
  430. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef);
  431. if (left.location.loc = LOC_REGISTER) then
  432. location.loc := LOC_SUBSETREG
  433. else
  434. location.loc := LOC_CSUBSETREG;
  435. location.size:=def_cgsize(resultdef);
  436. offsetcorrection:=0;
  437. if (left.location.size in [OS_PAIR,OS_SPAIR]) then
  438. begin
  439. if not is_packed_record_or_object(left.resultdef) then
  440. awordoffset:=sizeof(aword)
  441. else
  442. awordoffset:=sizeof(aword)*8;
  443. if (vs.fieldoffset>=awordoffset) xor (target_info.endian=endian_big) then
  444. location.sreg.subsetreg := left.location.registerhi
  445. else
  446. location.sreg.subsetreg := left.location.register;
  447. if vs.fieldoffset>=awordoffset then
  448. offsetcorrection := sizeof(aword)*8;
  449. location.sreg.subsetregsize := OS_INT;
  450. end
  451. else
  452. begin
  453. location.sreg.subsetreg := left.location.register;
  454. location.sreg.subsetregsize := left.location.size;
  455. end;
  456. if not is_packed_record_or_object(left.resultdef) then
  457. begin
  458. if (target_info.endian = ENDIAN_BIG) then
  459. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8+offsetcorrection
  460. else
  461. location.sreg.startbit := (vs.fieldoffset * 8)-offsetcorrection;
  462. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  463. end
  464. else
  465. begin
  466. location.sreg.bitlen := resultdef.packedbitsize;
  467. if (target_info.endian = ENDIAN_BIG) then
  468. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset+offsetcorrection
  469. else
  470. location.sreg.startbit := vs.fieldoffset-offsetcorrection;
  471. end;
  472. end;
  473. end;
  474. LOC_SUBSETREG,
  475. LOC_CSUBSETREG:
  476. begin
  477. location.size:=def_cgsize(resultdef);
  478. if not is_packed_record_or_object(left.resultdef) then
  479. begin
  480. if (target_info.endian = ENDIAN_BIG) then
  481. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  482. else
  483. inc(location.sreg.startbit, vs.fieldoffset * 8);
  484. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  485. end
  486. else
  487. begin
  488. location.sreg.bitlen := resultdef.packedbitsize;
  489. if (target_info.endian = ENDIAN_BIG) then
  490. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  491. else
  492. inc(location.sreg.startbit, vs.fieldoffset);
  493. end;
  494. end;
  495. else
  496. internalerror(2006031901);
  497. end;
  498. end;
  499. if is_objc_class_or_protocol(left.resultdef) and
  500. (target_info.system in systems_objc_nfabi) then
  501. begin
  502. if (location.loc<>LOC_REFERENCE) or
  503. (location.reference.index<>NR_NO) then
  504. internalerror(2009092402);
  505. { the actual field offset is stored in memory (to solve the
  506. "fragile base class" problem: this way the layout of base
  507. classes can be changed without breaking programs compiled against
  508. earlier versions)
  509. }
  510. asmsym:=current_asmdata.RefAsmSymbol(vs.mangledname,AT_DATA);
  511. reference_reset_symbol(tmpref,asmsym,0,voidpointertype.alignment,[]);
  512. hlcg.g_ptrtypecast_ref(current_asmdata.CurrAsmList,left.resultdef,cpointerdef.getreusable(resultdef),location.reference);
  513. location.reference.index:=hlcg.getintregister(current_asmdata.CurrAsmList,ptruinttype);
  514. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,ptruinttype,ptruinttype,tmpref,location.reference.index);
  515. { always packrecords C -> natural alignment }
  516. location.reference.alignment:=vs.vardef.alignment;
  517. end
  518. else if handle_platform_subscript then
  519. begin
  520. { done }
  521. end
  522. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  523. begin
  524. if not is_packed_record_or_object(left.resultdef) then
  525. begin
  526. inc(location.reference.offset,vs.fieldoffset);
  527. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  528. end
  529. else if (vs.fieldoffset mod 8 = 0) and
  530. (resultdef.packedbitsize mod 8 = 0) and
  531. { is different in case of e.g. packenum 2 and an enum }
  532. { which fits in 8 bits }
  533. (resultdef.size*8 = resultdef.packedbitsize) then
  534. begin
  535. inc(location.reference.offset,vs.fieldoffset div 8);
  536. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  537. end
  538. else
  539. begin
  540. sref.ref:=location.reference;
  541. sref.ref.alignment:=1;
  542. sref.bitindexreg:=NR_NO;
  543. inc(sref.ref.offset,vs.fieldoffset div 8);
  544. sref.startbit:=vs.fieldoffset mod 8;
  545. sref.bitlen:=resultdef.packedbitsize;
  546. if (left.location.loc=LOC_REFERENCE) then
  547. location.loc:=LOC_SUBSETREF
  548. else
  549. location.loc:=LOC_CSUBSETREF;
  550. location.sref:=sref;
  551. end;
  552. { also update the size of the location }
  553. location.size:=def_cgsize(resultdef);
  554. end;
  555. paraloc1.done;
  556. end;
  557. {*****************************************************************************
  558. TCGVECNODE
  559. *****************************************************************************}
  560. function tcgvecnode.get_mul_size : asizeint;
  561. begin
  562. if nf_memindex in flags then
  563. get_mul_size:=1
  564. else
  565. begin
  566. if (left.resultdef.typ=arraydef) then
  567. if not is_packed_array(left.resultdef) then
  568. get_mul_size:=tarraydef(left.resultdef).elesize
  569. else
  570. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  571. else
  572. get_mul_size:=resultdef.size;
  573. end
  574. end;
  575. { this routine must, like any other routine, not change the contents }
  576. { of base/index registers of references, as these may be regvars. }
  577. { The register allocator can coalesce one LOC_REGISTER being moved }
  578. { into another (as their live ranges won't overlap), but not a }
  579. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  580. { the live range of the LOC_CREGISTER will most likely overlap the }
  581. { the live range of the target LOC_(C)REGISTER) }
  582. { The passed register may be a LOC_CREGISTER as well. }
  583. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg: tregister; regsize: tdef; l: aint);
  584. var
  585. hreg: tregister;
  586. begin
  587. if l<>1 then
  588. begin
  589. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  590. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  591. maybe_const_reg:=hreg;
  592. end;
  593. if location.reference.base=NR_NO then
  594. location.reference.base:=maybe_const_reg
  595. else if location.reference.index=NR_NO then
  596. location.reference.index:=maybe_const_reg
  597. else
  598. begin
  599. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  600. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  601. reference_reset_base(location.reference,hreg,0,location.reference.temppos,location.reference.alignment,location.reference.volatility);
  602. { insert new index register }
  603. location.reference.index:=maybe_const_reg;
  604. end;
  605. { update alignment }
  606. if (location.reference.alignment=0) then
  607. internalerror(2009020704);
  608. location.reference.alignment:=newalignment(location.reference.alignment,l);
  609. end;
  610. { see remarks for tcgvecnode.update_reference_reg_mul above }
  611. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l:aint);
  612. var
  613. sref: tsubsetreference;
  614. offsetreg, hreg: tregister;
  615. alignpower: aint;
  616. temp : longint;
  617. begin
  618. { only orddefs are bitpacked. Even then we only need special code in }
  619. { case the bitpacked *byte size* is not a power of two, otherwise }
  620. { everything can be handled using the the regular array code. }
  621. if ((l mod 8) = 0) and
  622. (ispowerof2(l div 8,temp) or
  623. not is_ordinal(resultdef)
  624. {$ifndef cpu64bitalu}
  625. or is_64bitint(resultdef)
  626. {$endif not cpu64bitalu}
  627. ) then
  628. begin
  629. update_reference_reg_mul(maybe_const_reg,regsize,l div 8);
  630. exit;
  631. end;
  632. if (l > 8*sizeof(aint)) then
  633. internalerror(200608051);
  634. sref.ref := location.reference;
  635. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  636. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_ADDR,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  637. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,hreg);
  638. { keep alignment for index }
  639. sref.ref.alignment := left.resultdef.alignment;
  640. if not ispowerof2(packedbitsloadsize(l),temp) then
  641. internalerror(2006081201);
  642. alignpower:=temp;
  643. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  644. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  645. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  646. if (sref.ref.base = NR_NO) then
  647. sref.ref.base := offsetreg
  648. else if (sref.ref.index = NR_NO) then
  649. sref.ref.index := offsetreg
  650. else
  651. begin
  652. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  653. sref.ref.base := offsetreg;
  654. end;
  655. { the if expression below is a constant evaluated at compile time, so disable the unreachable code
  656. warning }
  657. {$push}
  658. {$warn 6018 off}
  659. { we can reuse hreg only if OS_INT and OS_ADDR have the same size/type }
  660. if OS_INT<>OS_ADDR then
  661. begin
  662. sref.bitindexreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  663. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_INT,hreg,sref.bitindexreg);
  664. end
  665. else
  666. sref.bitindexreg:=hreg;
  667. {$pop}
  668. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,sref.bitindexreg);
  669. sref.startbit := 0;
  670. sref.bitlen := resultdef.packedbitsize;
  671. if (left.location.loc = LOC_REFERENCE) then
  672. location.loc := LOC_SUBSETREF
  673. else
  674. location.loc := LOC_CSUBSETREF;
  675. location.sref := sref;
  676. end;
  677. procedure tcgvecnode.update_reference_offset(var ref: treference; index, mulsize: ASizeInt);
  678. begin
  679. inc(ref.offset,index*mulsize);
  680. end;
  681. procedure tcgvecnode.second_wideansistring;
  682. begin
  683. end;
  684. procedure tcgvecnode.second_dynamicarray;
  685. begin
  686. end;
  687. function tcgvecnode.valid_index_size(size: tcgsize): boolean;
  688. begin
  689. result:=
  690. tcgsize2signed[size]=tcgsize2signed[OS_ADDR];
  691. end;
  692. procedure tcgvecnode.rangecheck_array;
  693. var
  694. paraloc1,paraloc2 : tcgpara;
  695. pd : tprocdef;
  696. begin
  697. { omit range checking when this is an array access to a pointer which has been
  698. typecasted from an array }
  699. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  700. exit;
  701. paraloc1.init;
  702. paraloc2.init;
  703. if is_dynamic_array(left.resultdef) then
  704. begin
  705. pd:=search_system_proc('fpc_dynarray_rangecheck');
  706. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  707. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  708. if pd.is_pushleftright then
  709. begin
  710. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.resultdef,left.location,paraloc1);
  711. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.resultdef,right.location,paraloc2);
  712. end
  713. else
  714. begin
  715. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.resultdef,right.location,paraloc2);
  716. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.resultdef,left.location,paraloc1);
  717. end;
  718. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  719. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  720. hlcg.g_call_system_proc(current_asmdata.CurrAsmList,pd,[@paraloc1,@paraloc2],nil).resetiftemp;
  721. end;
  722. { for regular arrays, we don't have to do anything because the index has been
  723. type converted to the index type, which already inserted a range check if
  724. necessary }
  725. paraloc1.done;
  726. paraloc2.done;
  727. end;
  728. procedure tcgvecnode.rangecheck_string;
  729. var
  730. paraloc1,
  731. paraloc2: tcgpara;
  732. helpername: TIDString;
  733. pd: tprocdef;
  734. begin
  735. paraloc1.init;
  736. paraloc2.init;
  737. case tstringdef(left.resultdef).stringtype of
  738. { it's the same for ansi- and wide strings }
  739. st_unicodestring,
  740. st_widestring,
  741. st_ansistring:
  742. begin
  743. helpername:='fpc_'+tstringdef(left.resultdef).stringtypname+'_rangecheck';
  744. pd:=search_system_proc(helpername);
  745. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  746. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  747. if pd.is_pushleftright then
  748. begin
  749. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.resultdef,left.location,paraloc1);
  750. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.resultdef,right.location,paraloc2);
  751. end
  752. else
  753. begin
  754. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.resultdef,right.location,paraloc2);
  755. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.resultdef,left.location,paraloc1);
  756. end;
  757. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  758. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  759. hlcg.g_call_system_proc(current_asmdata.CurrAsmList,pd,[@paraloc1,@paraloc2],nil).resetiftemp;
  760. end;
  761. st_shortstring:
  762. begin
  763. {!!!!!!!!!!!!!!!!!}
  764. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  765. end;
  766. st_longstring:
  767. begin
  768. {!!!!!!!!!!!!!!!!!}
  769. end;
  770. end;
  771. paraloc1.done;
  772. paraloc2.done;
  773. end;
  774. procedure tcgvecnode.pass_generate_code;
  775. var
  776. offsetdec,
  777. extraoffset : ASizeInt;
  778. rightp : pnode;
  779. newsize : tcgsize;
  780. mulsize,
  781. bytemulsize : ASizeInt;
  782. alignpow : aint;
  783. paraloc1,
  784. paraloc2 : tcgpara;
  785. subsetref : tsubsetreference;
  786. temp : longint;
  787. indexdef : tdef;
  788. begin
  789. paraloc1.init;
  790. paraloc2.init;
  791. mulsize:=get_mul_size;
  792. if not is_packed_array(left.resultdef) then
  793. bytemulsize:=mulsize
  794. else
  795. bytemulsize:=mulsize div 8;
  796. newsize:=def_cgsize(resultdef);
  797. secondpass(left);
  798. if left.location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
  799. location_reset_ref(location,left.location.loc,newsize,left.location.reference.alignment,left.location.reference.volatility)
  800. else
  801. location_reset_ref(location,LOC_REFERENCE,newsize,resultdef.alignment,[]);
  802. { an ansistring needs to be dereferenced }
  803. if is_ansistring(left.resultdef) or
  804. is_wide_or_unicode_string(left.resultdef) then
  805. begin
  806. if nf_callunique in flags then
  807. internalerror(200304236);
  808. {DM!!!!!}
  809. case left.location.loc of
  810. LOC_REGISTER,
  811. LOC_CREGISTER :
  812. begin
  813. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,ctempposinvalid,location.reference.alignment,[]);
  814. end;
  815. LOC_CREFERENCE,
  816. LOC_REFERENCE :
  817. begin
  818. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,ctempposinvalid,location.reference.alignment,[]);
  819. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location.reference,location.reference.base);
  820. end;
  821. LOC_CONSTANT:
  822. begin
  823. hlcg.reference_reset_base(location.reference,left.resultdef,NR_NO,left.location.value,ctempposinvalid,location.reference.alignment,[]);
  824. end;
  825. else
  826. internalerror(2002032218);
  827. end;
  828. if is_ansistring(left.resultdef) then
  829. offsetdec:=1
  830. else
  831. offsetdec:=2;
  832. location.reference.alignment:=offsetdec;
  833. location.reference.volatility:=[];
  834. { in ansistrings/widestrings S[1] is p<w>char(S)[0] }
  835. if not(cs_zerobasedstrings in current_settings.localswitches) then
  836. update_reference_offset(location.reference,-1,offsetdec);
  837. end
  838. else if is_dynamic_array(left.resultdef) then
  839. begin
  840. case left.location.loc of
  841. LOC_REGISTER,
  842. LOC_CREGISTER :
  843. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,ctempposinvalid,location.reference.alignment,[]);
  844. LOC_REFERENCE,
  845. LOC_CREFERENCE :
  846. begin
  847. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,ctempposinvalid,location.reference.alignment,[]);
  848. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  849. left.location.reference,location.reference.base);
  850. end;
  851. else
  852. internalerror(2002032219);
  853. end;
  854. { a dynarray points to the start of a memory block, which
  855. we assume to be always aligned to a multiple of the
  856. pointer size
  857. }
  858. location.reference.alignment:=voidpointertype.size;
  859. location.reference.volatility:=[];
  860. end
  861. else
  862. begin
  863. { may happen in case of function results }
  864. case left.location.loc of
  865. LOC_CSUBSETREG,
  866. LOC_CREGISTER,
  867. LOC_CMMREGISTER,
  868. LOC_SUBSETREG,
  869. LOC_REGISTER,
  870. LOC_MMREGISTER:
  871. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  872. end;
  873. location_copy(location,left.location);
  874. end;
  875. { location must be memory }
  876. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  877. internalerror(200411013);
  878. { offset can only differ from 0 if arraydef }
  879. if (left.resultdef.typ=arraydef) and
  880. not(is_dynamic_array(left.resultdef)) and
  881. (not(is_packed_array(left.resultdef)) or
  882. ((mulsize mod 8 = 0) and
  883. ispowerof2(mulsize div 8,temp)) or
  884. { only orddefs are bitpacked }
  885. not is_ordinal(resultdef)
  886. {$ifndef cpu64bitalu}
  887. or is_64bitint(resultdef)
  888. {$endif not cpu64bitalu}
  889. ) then
  890. update_reference_offset(location.reference,-tarraydef(left.resultdef).lowrange,bytemulsize);
  891. if right.nodetype=ordconstn then
  892. begin
  893. { offset can only differ from 0 if arraydef }
  894. if cs_check_range in current_settings.localswitches then
  895. begin
  896. secondpass(right);
  897. case left.resultdef.typ of
  898. arraydef :
  899. rangecheck_array;
  900. stringdef :
  901. rangecheck_string;
  902. end;
  903. end;
  904. if not(is_packed_array(left.resultdef)) or
  905. ((mulsize mod 8 = 0) and
  906. (ispowerof2(mulsize div 8,temp) or
  907. { only orddefs are bitpacked }
  908. not is_ordinal(resultdef))) then
  909. begin
  910. extraoffset:=tordconstnode(right).value.svalue;
  911. update_reference_offset(location.reference,extraoffset,bytemulsize);
  912. { adjust alignment after this change }
  913. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset*bytemulsize);
  914. end
  915. else
  916. begin
  917. subsetref.ref := location.reference;
  918. subsetref.ref.alignment := left.resultdef.alignment;
  919. if not ispowerof2(packedbitsloadsize(resultdef.packedbitsize),temp) then
  920. internalerror(2006081212);
  921. alignpow:=temp;
  922. update_reference_offset(subsetref.ref,(mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow),1 shl alignpow);
  923. subsetref.bitindexreg := NR_NO;
  924. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  925. subsetref.bitlen := resultdef.packedbitsize;
  926. if (left.location.loc = LOC_REFERENCE) then
  927. location.loc := LOC_SUBSETREF
  928. else
  929. location.loc := LOC_CSUBSETREF;
  930. location.sref := subsetref;
  931. end;
  932. end
  933. else
  934. { not nodetype=ordconstn }
  935. begin
  936. if (cs_opt_level1 in current_settings.optimizerswitches) and
  937. { if we do range checking, we don't }
  938. { need that fancy code (it would be }
  939. { buggy) }
  940. not(cs_check_range in current_settings.localswitches) and
  941. (left.resultdef.typ=arraydef) and
  942. not is_packed_array(left.resultdef) then
  943. begin
  944. extraoffset:=0;
  945. rightp:=actualtargetnode(@right);
  946. if rightp^.nodetype=addn then
  947. begin
  948. if taddnode(rightp^).right.nodetype=ordconstn then
  949. begin
  950. extraoffset:=tordconstnode(taddnode(rightp^).right).value.svalue;
  951. replacenode(rightp^,taddnode(rightp^).left);
  952. end
  953. else if taddnode(rightp^).left.nodetype=ordconstn then
  954. begin
  955. extraoffset:=tordconstnode(taddnode(rightp^).left).value.svalue;
  956. replacenode(rightp^,taddnode(rightp^).right);
  957. end;
  958. end
  959. else if rightp^.nodetype=subn then
  960. begin
  961. if taddnode(rightp^).right.nodetype=ordconstn then
  962. begin
  963. extraoffset:=-tordconstnode(taddnode(rightp^).right).value.svalue;
  964. replacenode(rightp^,taddnode(rightp^).left);
  965. end;
  966. end;
  967. update_reference_offset(location.reference,extraoffset,mulsize);
  968. end;
  969. { calculate from left to right }
  970. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  971. internalerror(200304237);
  972. secondpass(right);
  973. if (right.expectloc=LOC_JUMP)<>
  974. (right.location.loc=LOC_JUMP) then
  975. internalerror(2006010801);
  976. { if mulsize = 1, we won't have to modify the index }
  977. if not(right.location.loc in [LOC_CREGISTER,LOC_REGISTER]) or
  978. not valid_index_size(right.location.size) then
  979. begin
  980. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,sizeuinttype,true);
  981. indexdef:=sizeuinttype
  982. end
  983. else
  984. indexdef:=right.resultdef;
  985. { produce possible range check code: }
  986. if cs_check_range in current_settings.localswitches then
  987. begin
  988. if left.resultdef.typ=arraydef then
  989. rangecheck_array
  990. else if (left.resultdef.typ=stringdef) then
  991. rangecheck_string;
  992. end;
  993. { insert the register and the multiplication factor in the
  994. reference }
  995. if not is_packed_array(left.resultdef) then
  996. update_reference_reg_mul(right.location.register,indexdef,mulsize)
  997. else
  998. update_reference_reg_packed(right.location.register,indexdef,mulsize);
  999. end;
  1000. location.size:=newsize;
  1001. paraloc1.done;
  1002. paraloc2.done;
  1003. end;
  1004. begin
  1005. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  1006. cloadparentfpnode:=tcgloadparentfpnode;
  1007. caddrnode:=tcgaddrnode;
  1008. cderefnode:=tcgderefnode;
  1009. csubscriptnode:=tcgsubscriptnode;
  1010. cvecnode:=tcgvecnode;
  1011. end.