cpuinfo.pas 3.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117
  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Basic Processor information for the SPARC
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit cpuinfo;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. globtype;
  22. type
  23. bestreal = double;
  24. {$if FPC_FULLVERSION>20700}
  25. bestrealrec = TDoubleRec;
  26. {$endif FPC_FULLVERSION>20700}
  27. ts32real = single;
  28. ts64real = double;
  29. ts80real = extended;
  30. ts128real = type extended;
  31. ts64comp = type extended;
  32. pbestreal=^bestreal;
  33. { possible supported processors for this target }
  34. tcputype=(cpu_none,
  35. cpu_SPARC_V7,
  36. cpu_SPARC_V8,
  37. cpu_SPARC_V9
  38. );
  39. tfputype =(fpu_none,
  40. fpu_soft,
  41. fpu_hard
  42. );
  43. tcontrollertype =(ct_none
  44. );
  45. tcontrollerdatatype = record
  46. controllertypestr, controllerunitstr: string[20];
  47. cputype: tcputype; fputype: tfputype;
  48. flashbase, flashsize, srambase, sramsize, eeprombase, eepromsize, bootbase, bootsize: dword;
  49. end;
  50. Const
  51. { Is there support for dealing with multiple microcontrollers available }
  52. { for this platform? }
  53. ControllerSupport = false;
  54. { We know that there are fields after sramsize
  55. but we don't care about this warning }
  56. {$PUSH}
  57. {$WARN 3177 OFF}
  58. embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
  59. (
  60. (controllertypestr:''; controllerunitstr:''; cputype:cpu_none; fputype:fpu_none; flashbase:0; flashsize:0; srambase:0; sramsize:0));
  61. {$POP}
  62. { calling conventions supported by the code generator }
  63. supported_calling_conventions : tproccalloptions = [
  64. pocall_internproc,
  65. pocall_stdcall,
  66. pocall_safecall,
  67. pocall_cdecl,
  68. pocall_cppdecl
  69. ];
  70. cputypestr : array[tcputype] of string[10] = ('',
  71. 'SPARCV7',
  72. 'SPARCV8',
  73. 'SPARCV9'
  74. );
  75. fputypestr : array[tfputype] of string[6] = ('',
  76. 'SOFT',
  77. 'HARD'
  78. );
  79. { Supported optimizations, only used for information }
  80. supported_optimizerswitches = genericlevel1optimizerswitches+
  81. genericlevel2optimizerswitches+
  82. genericlevel3optimizerswitches-
  83. { no need to write info about those }
  84. [cs_opt_level1,cs_opt_level2,cs_opt_level3]+
  85. [cs_opt_regvar,cs_opt_loopunroll,
  86. cs_opt_tailrecursion,cs_opt_nodecse,
  87. cs_opt_reorder_fields,cs_opt_fastmath];
  88. level1optimizerswitches = genericlevel1optimizerswitches;
  89. level2optimizerswitches = genericlevel2optimizerswitches + level1optimizerswitches +
  90. [cs_opt_regvar,cs_opt_tailrecursion,cs_opt_nodecse];
  91. level3optimizerswitches = genericlevel3optimizerswitches + level2optimizerswitches + [{,cs_opt_loopunroll}];
  92. level4optimizerswitches = genericlevel4optimizerswitches + level3optimizerswitches + [];
  93. implementation
  94. end.