nx86cnv.pas 20 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate for x86-64 and i386 assembler for type converting nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit nx86cnv;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ncgcnv,defutil;
  22. type
  23. tx86typeconvnode = class(tcgtypeconvnode)
  24. protected
  25. function first_real_to_real : tnode;override;
  26. { procedure second_int_to_int;override; }
  27. { procedure second_string_to_string;override; }
  28. { procedure second_cstring_to_pchar;override; }
  29. { procedure second_string_to_chararray;override; }
  30. { procedure second_array_to_pointer;override; }
  31. { procedure second_pointer_to_array;override; }
  32. { procedure second_chararray_to_string;override; }
  33. { procedure second_char_to_string;override; }
  34. function first_int_to_real: tnode; override;
  35. procedure second_int_to_real;override;
  36. { procedure second_real_to_real;override; }
  37. { procedure second_cord_to_pointer;override; }
  38. { procedure second_proc_to_procvar;override; }
  39. { procedure second_bool_to_int;override; }
  40. procedure second_int_to_bool;override;
  41. { procedure second_set_to_set;override; }
  42. { procedure second_ansistring_to_pchar;override; }
  43. { procedure second_pchar_to_string;override; }
  44. { procedure second_class_to_intf;override; }
  45. { procedure second_char_to_char;override; }
  46. end;
  47. implementation
  48. uses
  49. verbose,globals,globtype,
  50. aasmbase,aasmtai,aasmdata,aasmcpu,
  51. symconst,symdef,
  52. cgbase,cga,pass_1,pass_2,
  53. cpuinfo,
  54. ncnv,
  55. cpubase,
  56. cgutils,cgobj,hlcgobj,cgx86,
  57. tgobj;
  58. function tx86typeconvnode.first_real_to_real : tnode;
  59. begin
  60. first_real_to_real:=nil;
  61. { comp isn't a floating type }
  62. if (tfloatdef(resultdef).floattype=s64comp) and
  63. (tfloatdef(left.resultdef).floattype<>s64comp) and
  64. not (nf_explicit in flags) then
  65. CGMessage(type_w_convert_real_2_comp);
  66. if use_vectorfpu(resultdef) then
  67. expectloc:=LOC_MMREGISTER
  68. else
  69. expectloc:=LOC_FPUREGISTER;
  70. end;
  71. procedure tx86typeconvnode.second_int_to_bool;
  72. var
  73. {$ifndef cpu64bitalu}
  74. hreg2,
  75. hregister : tregister;
  76. href : treference;
  77. i : integer;
  78. {$endif not cpu64bitalu}
  79. resflags : tresflags;
  80. hlabel : tasmlabel;
  81. newsize : tcgsize;
  82. begin
  83. secondpass(left);
  84. if codegenerror then
  85. exit;
  86. { Explicit typecasts from any ordinal type to a boolean type }
  87. { must not change the ordinal value }
  88. if (nf_explicit in flags) and
  89. not(left.location.loc in [LOC_FLAGS,LOC_JUMP]) then
  90. begin
  91. location_copy(location,left.location);
  92. newsize:=def_cgsize(resultdef);
  93. { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
  94. if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
  95. ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
  96. hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
  97. else
  98. location.size:=newsize;
  99. exit;
  100. end;
  101. { Load left node into flag F_NE/F_E }
  102. resflags:=F_NE;
  103. if (left.location.loc in [LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF]) then
  104. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  105. case left.location.loc of
  106. LOC_CREFERENCE,
  107. LOC_REFERENCE :
  108. begin
  109. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  110. {$ifndef cpu64bitalu}
  111. if left.location.size in [OS_64,OS_S64{$ifdef cpu16bitalu},OS_32,OS_S32{$endif}] then
  112. begin
  113. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  114. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,left.location.reference,hregister);
  115. href:=left.location.reference;
  116. for i:=2 to tcgsize2size[left.location.size] div tcgsize2size[OS_INT] do
  117. begin
  118. inc(href.offset,tcgsize2size[OS_INT]);
  119. cg.a_op_ref_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,href,hregister);
  120. end;
  121. end
  122. else
  123. {$endif not cpu64bitalu}
  124. begin
  125. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  126. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
  127. end;
  128. end;
  129. LOC_FLAGS :
  130. begin
  131. resflags:=left.location.resflags;
  132. end;
  133. LOC_REGISTER,LOC_CREGISTER :
  134. begin
  135. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  136. {$if defined(cpu32bitalu)}
  137. if left.location.size in [OS_64,OS_S64] then
  138. begin
  139. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  140. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,left.location.register64.reglo,hregister);
  141. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,left.location.register64.reghi,hregister);
  142. end
  143. else
  144. {$elseif defined(cpu16bitalu)}
  145. if left.location.size in [OS_64,OS_S64] then
  146. begin
  147. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_16);
  148. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,left.location.register64.reglo,hregister);
  149. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,cg.GetNextReg(left.location.register64.reglo),hregister);
  150. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,left.location.register64.reghi,hregister);
  151. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,cg.GetNextReg(left.location.register64.reghi),hregister);
  152. end
  153. else
  154. if left.location.size in [OS_32,OS_S32] then
  155. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,left.location.register,cg.GetNextReg(left.location.register))
  156. else
  157. {$endif}
  158. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
  159. end;
  160. LOC_JUMP :
  161. begin
  162. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  163. location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  164. current_asmdata.getjumplabel(hlabel);
  165. cg.a_label(current_asmdata.CurrAsmList,left.location.truelabel);
  166. if not(is_cbool(resultdef)) then
  167. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,1,location.register)
  168. else
  169. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,-1,location.register);
  170. cg.a_jmp_always(current_asmdata.CurrAsmList,hlabel);
  171. cg.a_label(current_asmdata.CurrAsmList,left.location.falselabel);
  172. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,0,location.register);
  173. cg.a_label(current_asmdata.CurrAsmList,hlabel);
  174. end;
  175. else
  176. internalerror(10062);
  177. end;
  178. if (left.location.loc<>LOC_JUMP) then
  179. begin
  180. { load flags to register }
  181. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  182. {$ifndef cpu64bitalu}
  183. if (location.size in [OS_64,OS_S64]) then
  184. begin
  185. hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  186. cg.g_flags2reg(current_asmdata.CurrAsmList,OS_32,resflags,hreg2);
  187. cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  188. if (is_cbool(resultdef)) then
  189. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,OS_32,hreg2,hreg2);
  190. location.register64.reglo:=hreg2;
  191. location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  192. if (is_cbool(resultdef)) then
  193. { reglo is either 0 or -1 -> reghi has to become the same }
  194. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,location.register64.reglo,location.register64.reghi)
  195. else
  196. { unsigned }
  197. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,location.register64.reghi);
  198. end
  199. else
  200. {$endif not cpu64bitalu}
  201. begin
  202. location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  203. cg.g_flags2reg(current_asmdata.CurrAsmList,location.size,resflags,location.register);
  204. cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  205. if (is_cbool(resultdef)) then
  206. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,location.size,location.register,location.register);
  207. end
  208. end;
  209. end;
  210. function tx86typeconvnode.first_int_to_real : tnode;
  211. begin
  212. first_int_to_real:=nil;
  213. if (left.resultdef.size<4) then
  214. begin
  215. inserttypeconv(left,s32inttype);
  216. firstpass(left)
  217. end;
  218. if use_vectorfpu(resultdef) and
  219. (torddef(left.resultdef).ordtype = s32bit) then
  220. expectloc:=LOC_MMREGISTER
  221. else
  222. expectloc:=LOC_FPUREGISTER;
  223. end;
  224. procedure tx86typeconvnode.second_int_to_real;
  225. var
  226. leftref,
  227. href : treference;
  228. l1,l2 : tasmlabel;
  229. op: tasmop;
  230. opsize: topsize;
  231. signtested : boolean;
  232. use_bt: boolean; { true = use BT (386+), false = use TEST (286-) }
  233. begin
  234. {$ifdef i8086}
  235. use_bt:=current_settings.cputype>=cpu_386;
  236. {$else i8086}
  237. use_bt:=true;
  238. {$endif i8086}
  239. if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
  240. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  241. if use_vectorfpu(resultdef) and
  242. {$ifdef cpu64bitalu}
  243. (torddef(left.resultdef).ordtype in [s32bit,s64bit]) then
  244. {$else cpu64bitalu}
  245. (torddef(left.resultdef).ordtype=s32bit) then
  246. {$endif cpu64bitalu}
  247. begin
  248. location_reset(location,LOC_MMREGISTER,def_cgsize(resultdef));
  249. location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
  250. if UseAVX then
  251. case location.size of
  252. OS_F32:
  253. op:=A_VCVTSI2SS;
  254. OS_F64:
  255. op:=A_VCVTSI2SD;
  256. else
  257. internalerror(2007120902);
  258. end
  259. else
  260. case location.size of
  261. OS_F32:
  262. op:=A_CVTSI2SS;
  263. OS_F64:
  264. op:=A_CVTSI2SD;
  265. else
  266. internalerror(2007120902);
  267. end;
  268. { don't use left.location.size, because that one may be OS_32/OS_64
  269. if the lower bound of the orddef >= 0
  270. }
  271. case torddef(left.resultdef).ordtype of
  272. s32bit:
  273. opsize:=S_L;
  274. s64bit:
  275. opsize:=S_Q;
  276. else
  277. internalerror(2007120903);
  278. end;
  279. case left.location.loc of
  280. LOC_REFERENCE,
  281. LOC_CREFERENCE:
  282. begin
  283. href:=left.location.reference;
  284. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
  285. if UseAVX then
  286. { VCVTSI2.. requires a second source operand to copy bits 64..127 }
  287. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg_reg(op,opsize,href,location.register,location.register))
  288. else
  289. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(op,opsize,href,location.register));
  290. end;
  291. LOC_REGISTER,
  292. LOC_CREGISTER:
  293. if UseAVX then
  294. { VCVTSI2.. requires a second source operand to copy bits 64..127 }
  295. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,opsize,left.location.register,location.register,location.register))
  296. else
  297. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(op,opsize,left.location.register,location.register));
  298. end;
  299. end
  300. else
  301. begin
  302. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  303. if (left.location.loc=LOC_REGISTER) and (torddef(left.resultdef).ordtype=u64bit) then
  304. begin
  305. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  306. if use_bt then
  307. begin
  308. {$if defined(cpu64bitalu)}
  309. emit_const_reg(A_BT,S_Q,63,left.location.register);
  310. {$elseif defined(cpu32bitalu)}
  311. emit_const_reg(A_BT,S_L,31,left.location.register64.reghi);
  312. {$elseif defined(cpu16bitalu)}
  313. emit_const_reg(A_BT,S_W,15,cg.GetNextReg(left.location.register64.reghi));
  314. {$endif}
  315. end
  316. else
  317. begin
  318. {$ifdef i8086}
  319. emit_const_reg(A_TEST,S_W,aint($8000),cg.GetNextReg(left.location.register64.reghi));
  320. {$else i8086}
  321. internalerror(2013052510);
  322. {$endif i8086}
  323. end;
  324. signtested:=true;
  325. end
  326. else
  327. signtested:=false;
  328. { We need to load from a reference }
  329. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  330. { don't change left.location.reference, because if it's a temp we
  331. need the original location at the end so we can free it }
  332. leftref:=left.location.reference;
  333. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,leftref);
  334. { For u32bit we need to load it as comp and need to
  335. make it 64bits }
  336. if (torddef(left.resultdef).ordtype=u32bit) then
  337. begin
  338. tg.GetTemp(current_asmdata.CurrAsmList,8,8,tt_normal,href);
  339. location_freetemp(current_asmdata.CurrAsmList,left.location);
  340. cg.a_load_ref_ref(current_asmdata.CurrAsmList,left.location.size,OS_32,leftref,href);
  341. inc(href.offset,4);
  342. cg.a_load_const_ref(current_asmdata.CurrAsmList,OS_32,0,href);
  343. dec(href.offset,4);
  344. { could be a temp with an offset > 32 bit on x86_64 }
  345. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
  346. leftref:=href;
  347. end;
  348. { Load from reference to fpu reg }
  349. case torddef(left.resultdef).ordtype of
  350. u32bit,
  351. scurrency,
  352. s64bit:
  353. begin
  354. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,leftref));
  355. end;
  356. u64bit:
  357. begin
  358. { unsigned 64 bit ints are harder to handle:
  359. we load bits 0..62 and then check bit 63:
  360. if it is 1 then we add 2**64 as float.
  361. Since 2**64 can be represented exactly, use a single-precision
  362. constant to save space. }
  363. current_asmdata.getglobaldatalabel(l1);
  364. current_asmdata.getjumplabel(l2);
  365. if not(signtested) then
  366. begin
  367. if use_bt then
  368. begin
  369. {$if defined(cpu64bitalu) or defined(cpu32bitalu)}
  370. inc(leftref.offset,4);
  371. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  372. emit_const_ref(A_BT,S_L,31,leftref);
  373. dec(leftref.offset,4);
  374. {$elseif defined(cpu16bitalu)}
  375. inc(leftref.offset,6);
  376. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  377. emit_const_ref(A_BT,S_W,15,leftref);
  378. dec(leftref.offset,6);
  379. {$endif}
  380. end
  381. else
  382. begin
  383. {$ifdef i8086}
  384. { reading a byte, instead of word is faster on a true }
  385. { 8088, because of the 8-bit data bus }
  386. inc(leftref.offset,7);
  387. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  388. emit_const_ref(A_TEST,S_B,aint($80),leftref);
  389. dec(leftref.offset,7);
  390. {$else i8086}
  391. internalerror(2013052511);
  392. {$endif i8086}
  393. end;
  394. end;
  395. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,leftref));
  396. if use_bt then
  397. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NC,l2)
  398. else
  399. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_E,l2);
  400. cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  401. new_section(current_asmdata.asmlists[al_typedconsts],sec_rodata_norel,l1.name,const_align(sizeof(pint)));
  402. current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(l1));
  403. { I got this constant from a test program (FK) }
  404. { It's actually the bit representation of 2^64 as a Single [Kit] }
  405. current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit($5f800000));
  406. reference_reset_symbol(href,l1,0,4,[]);
  407. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
  408. current_asmdata.CurrAsmList.concat(Taicpu.Op_ref(A_FADD,S_FS,href));
  409. cg.a_label(current_asmdata.CurrAsmList,l2);
  410. end
  411. else
  412. begin
  413. if left.resultdef.size<4 then
  414. internalerror(2007120901);
  415. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IL,leftref));
  416. end;
  417. end;
  418. tcgx86(cg).inc_fpu_stack;
  419. location.register:=NR_ST;
  420. end;
  421. location_freetemp(current_asmdata.CurrAsmList,left.location);
  422. end;
  423. begin
  424. ctypeconvnode:=tx86typeconvnode
  425. end.