atmega128rfr2.pp 101 KB

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  1. unit ATmega128RFR2;
  2. {$goto on}
  3. interface
  4. var
  5. PINA: byte absolute $20; // Port A Input Pins Address
  6. DDRA: byte absolute $21; // Port A Data Direction Register
  7. PORTA: byte absolute $22; // Port A Data Register
  8. PINB: byte absolute $23; // Port B Input Pins Address
  9. DDRB: byte absolute $24; // Port B Data Direction Register
  10. PORTB: byte absolute $25; // Port B Data Register
  11. PINC: byte absolute $26; // Port C Input Pins Address
  12. DDRC: byte absolute $27; // Port C Data Direction Register
  13. PORTC: byte absolute $28; // Port C Data Register
  14. PIND: byte absolute $29; // Port D Input Pins Address
  15. DDRD: byte absolute $2A; // Port D Data Direction Register
  16. PORTD: byte absolute $2B; // Port D Data Register
  17. PINE: byte absolute $2C; // Port E Input Pins Address
  18. DDRE: byte absolute $2D; // Port E Data Direction Register
  19. PORTE: byte absolute $2E; // Port E Data Register
  20. PINF: byte absolute $2F; // Port F Input Pins Address
  21. DDRF: byte absolute $30; // Port F Data Direction Register
  22. PORTF: byte absolute $31; // Port F Data Register
  23. PING: byte absolute $32; // Port G Input Pins Address
  24. DDRG: byte absolute $33; // Port G Data Direction Register
  25. PORTG: byte absolute $34; // Port G Data Register
  26. TIFR0: byte absolute $35; // Timer/Counter0 Interrupt Flag Register
  27. TIFR1: byte absolute $36; // Timer/Counter1 Interrupt Flag Register
  28. TIFR2: byte absolute $37; // Timer/Counter Interrupt Flag Register
  29. TIFR3: byte absolute $38; // Timer/Counter3 Interrupt Flag Register
  30. TIFR4: byte absolute $39; // Timer/Counter4 Interrupt Flag Register
  31. TIFR5: byte absolute $3A; // Timer/Counter5 Interrupt Flag Register
  32. PCIFR: byte absolute $3B; // Pin Change Interrupt Flag Register
  33. EIFR: byte absolute $3C; // External Interrupt Flag Register
  34. EIMSK: byte absolute $3D; // External Interrupt Mask Register
  35. GPIOR0: byte absolute $3E; // General Purpose IO Register 0
  36. EECR: byte absolute $3F; // EEPROM Control Register
  37. EEDR: byte absolute $40; // EEPROM Data Register
  38. EEAR: word absolute $41; // EEPROM Address Register Bytes
  39. EEARL: byte absolute $41; // EEPROM Address Register Bytes
  40. EEARH: byte absolute $42; // EEPROM Address Register Bytes;
  41. GTCCR: byte absolute $43; // General Timer Counter Control register
  42. TCCR0A: byte absolute $44; // Timer/Counter0 Control Register A
  43. TCCR0B: byte absolute $45; // Timer/Counter0 Control Register B
  44. TCNT0: byte absolute $46; // Timer/Counter0 Register
  45. OCR0A: byte absolute $47; // Timer/Counter0 Output Compare Register
  46. OCR0B: byte absolute $48; // Timer/Counter0 Output Compare Register B
  47. GPIOR1: byte absolute $4A; // General Purpose IO Register 1
  48. GPIOR2: byte absolute $4B; // General Purpose I/O Register 2
  49. SPCR: byte absolute $4C; // SPI Control Register
  50. SPSR: byte absolute $4D; // SPI Status Register
  51. SPDR: byte absolute $4E; // SPI Data Register
  52. ACSR: byte absolute $50; // Analog Comparator Control And Status Register
  53. OCDR: byte absolute $51; // On-Chip Debug Register
  54. SMCR: byte absolute $53; // Sleep Mode Control Register
  55. MCUSR: byte absolute $54; // MCU Status Register
  56. MCUCR: byte absolute $55; // MCU Control Register
  57. SPMCSR: byte absolute $57; // Store Program Memory Control Register
  58. RAMPZ: byte absolute $5B; // Extended Z-pointer Register for ELPM/SPM
  59. SP: word absolute $5D; // Stack Pointer
  60. SPL: byte absolute $5D; // Stack Pointer
  61. SPH: byte absolute $5E; // Stack Pointer ;
  62. SREG: byte absolute $5F; // Status Register
  63. WDTCSR: byte absolute $60; // Watchdog Timer Control Register
  64. CLKPR: byte absolute $61; // Clock Prescale Register
  65. PRR2: byte absolute $63; // Power Reduction Register 2
  66. PRR0: byte absolute $64; // Power Reduction Register0
  67. PRR1: byte absolute $65; // Power Reduction Register 1
  68. OSCCAL: byte absolute $66; // Oscillator Calibration Value
  69. BGCR: byte absolute $67; // Reference Voltage Calibration Register
  70. PCICR: byte absolute $68; // Pin Change Interrupt Control Register
  71. EICRA: byte absolute $69; // External Interrupt Control Register A
  72. EICRB: byte absolute $6A; // External Interrupt Control Register B
  73. PCMSK0: byte absolute $6B; // Pin Change Mask Register 0
  74. PCMSK1: byte absolute $6C; // Pin Change Mask Register 1
  75. PCMSK2: byte absolute $6D; // Pin Change Mask Register 2
  76. TIMSK0: byte absolute $6E; // Timer/Counter0 Interrupt Mask Register
  77. TIMSK1: byte absolute $6F; // Timer/Counter1 Interrupt Mask Register
  78. TIMSK2: byte absolute $70; // Timer/Counter Interrupt Mask register
  79. TIMSK3: byte absolute $71; // Timer/Counter3 Interrupt Mask Register
  80. TIMSK4: byte absolute $72; // Timer/Counter4 Interrupt Mask Register
  81. TIMSK5: byte absolute $73; // Timer/Counter5 Interrupt Mask Register
  82. NEMCR: byte absolute $75; // Flash Extended-Mode Control-Register
  83. ADCSRC: byte absolute $77; // The ADC Control and Status Register C
  84. ADC: word absolute $78; // ADC Data Register Bytes
  85. ADCL: byte absolute $78; // ADC Data Register Bytes
  86. ADCH: byte absolute $79; // ADC Data Register Bytes;
  87. ADCSRA: byte absolute $7A; // The ADC Control and Status Register A
  88. ADCSRB: byte absolute $7B; // The ADC Control and Status Register B
  89. ADMUX: byte absolute $7C; // The ADC Multiplexer Selection Register
  90. DIDR2: byte absolute $7D; // Digital Input Disable Register 2
  91. DIDR0: byte absolute $7E; // Digital Input Disable Register 0
  92. DIDR1: byte absolute $7F; // Digital Input Disable Register 1
  93. TCCR1A: byte absolute $80; // Timer/Counter1 Control Register A
  94. TCCR1B: byte absolute $81; // Timer/Counter1 Control Register B
  95. TCCR1C: byte absolute $82; // Timer/Counter1 Control Register C
  96. TCNT1: word absolute $84; // Timer/Counter1 Bytes
  97. TCNT1L: byte absolute $84; // Timer/Counter1 Bytes
  98. TCNT1H: byte absolute $85; // Timer/Counter1 Bytes;
  99. ICR1: word absolute $86; // Timer/Counter1 Input Capture Register Bytes
  100. ICR1L: byte absolute $86; // Timer/Counter1 Input Capture Register Bytes
  101. ICR1H: byte absolute $87; // Timer/Counter1 Input Capture Register Bytes;
  102. OCR1A: word absolute $88; // Timer/Counter1 Output Compare Register A Bytes
  103. OCR1AL: byte absolute $88; // Timer/Counter1 Output Compare Register A Bytes
  104. OCR1AH: byte absolute $89; // Timer/Counter1 Output Compare Register A Bytes;
  105. OCR1B: word absolute $8A; // Timer/Counter1 Output Compare Register B Bytes
  106. OCR1BL: byte absolute $8A; // Timer/Counter1 Output Compare Register B Bytes
  107. OCR1BH: byte absolute $8B; // Timer/Counter1 Output Compare Register B Bytes;
  108. OCR1C: word absolute $8C; // Timer/Counter1 Output Compare Register C Bytes
  109. OCR1CL: byte absolute $8C; // Timer/Counter1 Output Compare Register C Bytes
  110. OCR1CH: byte absolute $8D; // Timer/Counter1 Output Compare Register C Bytes;
  111. TCCR3A: byte absolute $90; // Timer/Counter3 Control Register A
  112. TCCR3B: byte absolute $91; // Timer/Counter3 Control Register B
  113. TCCR3C: byte absolute $92; // Timer/Counter3 Control Register C
  114. TCNT3: word absolute $94; // Timer/Counter3 Bytes
  115. TCNT3L: byte absolute $94; // Timer/Counter3 Bytes
  116. TCNT3H: byte absolute $95; // Timer/Counter3 Bytes;
  117. ICR3: word absolute $96; // Timer/Counter3 Input Capture Register Bytes
  118. ICR3L: byte absolute $96; // Timer/Counter3 Input Capture Register Bytes
  119. ICR3H: byte absolute $97; // Timer/Counter3 Input Capture Register Bytes;
  120. OCR3A: word absolute $98; // Timer/Counter3 Output Compare Register A Bytes
  121. OCR3AL: byte absolute $98; // Timer/Counter3 Output Compare Register A Bytes
  122. OCR3AH: byte absolute $99; // Timer/Counter3 Output Compare Register A Bytes;
  123. OCR3B: word absolute $9A; // Timer/Counter3 Output Compare Register B Bytes
  124. OCR3BL: byte absolute $9A; // Timer/Counter3 Output Compare Register B Bytes
  125. OCR3BH: byte absolute $9B; // Timer/Counter3 Output Compare Register B Bytes;
  126. OCR3C: word absolute $9C; // Timer/Counter3 Output Compare Register C Bytes
  127. OCR3CL: byte absolute $9C; // Timer/Counter3 Output Compare Register C Bytes
  128. OCR3CH: byte absolute $9D; // Timer/Counter3 Output Compare Register C Bytes;
  129. TCCR4A: byte absolute $A0; // Timer/Counter4 Control Register A
  130. TCCR4B: byte absolute $A1; // Timer/Counter4 Control Register B
  131. TCCR4C: byte absolute $A2; // Timer/Counter4 Control Register C
  132. TCNT4: word absolute $A4; // Timer/Counter4 Bytes
  133. TCNT4L: byte absolute $A4; // Timer/Counter4 Bytes
  134. TCNT4H: byte absolute $A5; // Timer/Counter4 Bytes;
  135. ICR4: word absolute $A6; // Timer/Counter4 Input Capture Register Bytes
  136. ICR4L: byte absolute $A6; // Timer/Counter4 Input Capture Register Bytes
  137. ICR4H: byte absolute $A7; // Timer/Counter4 Input Capture Register Bytes;
  138. OCR4A: word absolute $A8; // Timer/Counter4 Output Compare Register A Bytes
  139. OCR4AL: byte absolute $A8; // Timer/Counter4 Output Compare Register A Bytes
  140. OCR4AH: byte absolute $A9; // Timer/Counter4 Output Compare Register A Bytes;
  141. OCR4B: word absolute $AA; // Timer/Counter4 Output Compare Register B Bytes
  142. OCR4BL: byte absolute $AA; // Timer/Counter4 Output Compare Register B Bytes
  143. OCR4BH: byte absolute $AB; // Timer/Counter4 Output Compare Register B Bytes;
  144. OCR4C: word absolute $AC; // Timer/Counter4 Output Compare Register C Bytes
  145. OCR4CL: byte absolute $AC; // Timer/Counter4 Output Compare Register C Bytes
  146. OCR4CH: byte absolute $AD; // Timer/Counter4 Output Compare Register C Bytes;
  147. TCCR2A: byte absolute $B0; // Timer/Counter2 Control Register A
  148. TCCR2B: byte absolute $B1; // Timer/Counter2 Control Register B
  149. TCNT2: byte absolute $B2; // Timer/Counter2
  150. OCR2A: byte absolute $B3; // Timer/Counter2 Output Compare Register A
  151. OCR2B: byte absolute $B4; // Timer/Counter2 Output Compare Register B
  152. ASSR: byte absolute $B6; // Asynchronous Status Register
  153. TWBR: byte absolute $B8; // TWI Bit Rate Register
  154. TWSR: byte absolute $B9; // TWI Status Register
  155. TWAR: byte absolute $BA; // TWI (Slave) Address Register
  156. TWDR: byte absolute $BB; // TWI Data Register
  157. TWCR: byte absolute $BC; // TWI Control Register
  158. TWAMR: byte absolute $BD; // TWI (Slave) Address Mask Register
  159. IRQ_MASK1: byte absolute $BE; // Transceiver Interrupt Enable Register 1
  160. IRQ_STATUS1: byte absolute $BF; // Transceiver Interrupt Status Register 1
  161. UCSR0A: byte absolute $C0; // USART0 MSPIM Control and Status Register A
  162. UCSR0B: byte absolute $C1; // USART0 MSPIM Control and Status Register B
  163. UCSR0C: byte absolute $C2; // USART0 MSPIM Control and Status Register C
  164. UBRR0: word absolute $C4; // USART0 Baud Rate Register Bytes
  165. UBRR0L: byte absolute $C4; // USART0 Baud Rate Register Bytes
  166. UBRR0H: byte absolute $C5; // USART0 Baud Rate Register Bytes;
  167. UDR0: byte absolute $C6; // USART0 I/O Data Register
  168. UCSR1A: byte absolute $C8; // USART1 MSPIM Control and Status Register A
  169. UCSR1B: byte absolute $C9; // USART1 MSPIM Control and Status Register B
  170. UCSR1C: byte absolute $CA; // USART1 MSPIM Control and Status Register C
  171. UBRR1: word absolute $CC; // USART1 Baud Rate Register Bytes
  172. UBRR1L: byte absolute $CC; // USART1 Baud Rate Register Bytes
  173. UBRR1H: byte absolute $CD; // USART1 Baud Rate Register Bytes;
  174. UDR1: byte absolute $CE; // USART1 I/O Data Register
  175. SCRSTRLL: byte absolute $D7; // Symbol Counter Received Frame Timestamp Register LL-Byte
  176. SCRSTRLH: byte absolute $D8; // Symbol Counter Received Frame Timestamp Register LH-Byte
  177. SCRSTRHL: byte absolute $D9; // Symbol Counter Received Frame Timestamp Register HL-Byte
  178. SCRSTRHH: byte absolute $DA; // Symbol Counter Received Frame Timestamp Register HH-Byte
  179. SCCSR: byte absolute $DB; // Symbol Counter Compare Source Register
  180. SCCR0: byte absolute $DC; // Symbol Counter Control Register 0
  181. SCCR1: byte absolute $DD; // Symbol Counter Control Register 1
  182. SCSR: byte absolute $DE; // Symbol Counter Status Register
  183. SCIRQM: byte absolute $DF; // Symbol Counter Interrupt Mask Register
  184. SCIRQS: byte absolute $E0; // Symbol Counter Interrupt Status Register
  185. SCCNTLL: byte absolute $E1; // Symbol Counter Register LL-Byte
  186. SCCNTLH: byte absolute $E2; // Symbol Counter Register LH-Byte
  187. SCCNTHL: byte absolute $E3; // Symbol Counter Register HL-Byte
  188. SCCNTHH: byte absolute $E4; // Symbol Counter Register HH-Byte
  189. SCBTSRLL: byte absolute $E5; // Symbol Counter Beacon Timestamp Register LL-Byte
  190. SCBTSRLH: byte absolute $E6; // Symbol Counter Beacon Timestamp Register LH-Byte
  191. SCBTSRHL: byte absolute $E7; // Symbol Counter Beacon Timestamp Register HL-Byte
  192. SCBTSRHH: byte absolute $E8; // Symbol Counter Beacon Timestamp Register HH-Byte
  193. SCTSRLL: byte absolute $E9; // Symbol Counter Frame Timestamp Register LL-Byte
  194. SCTSRLH: byte absolute $EA; // Symbol Counter Frame Timestamp Register LH-Byte
  195. SCTSRHL: byte absolute $EB; // Symbol Counter Frame Timestamp Register HL-Byte
  196. SCTSRHH: byte absolute $EC; // Symbol Counter Frame Timestamp Register HH-Byte
  197. SCOCR3LL: byte absolute $ED; // Symbol Counter Output Compare Register 3 LL-Byte
  198. SCOCR3LH: byte absolute $EE; // Symbol Counter Output Compare Register 3 LH-Byte
  199. SCOCR3HL: byte absolute $EF; // Symbol Counter Output Compare Register 3 HL-Byte
  200. SCOCR3HH: byte absolute $F0; // Symbol Counter Output Compare Register 3 HH-Byte
  201. SCOCR2LL: byte absolute $F1; // Symbol Counter Output Compare Register 2 LL-Byte
  202. SCOCR2LH: byte absolute $F2; // Symbol Counter Output Compare Register 2 LH-Byte
  203. SCOCR2HL: byte absolute $F3; // Symbol Counter Output Compare Register 2 HL-Byte
  204. SCOCR2HH: byte absolute $F4; // Symbol Counter Output Compare Register 2 HH-Byte
  205. SCOCR1LL: byte absolute $F5; // Symbol Counter Output Compare Register 1 LL-Byte
  206. SCOCR1LH: byte absolute $F6; // Symbol Counter Output Compare Register 1 LH-Byte
  207. SCOCR1HL: byte absolute $F7; // Symbol Counter Output Compare Register 1 HL-Byte
  208. SCOCR1HH: byte absolute $F8; // Symbol Counter Output Compare Register 1 HH-Byte
  209. SCTSTRLL: byte absolute $F9; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  210. SCTSTRLH: byte absolute $FA; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  211. SCTSTRHL: byte absolute $FB; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  212. SCTSTRHH: byte absolute $FC; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  213. MAFCR0: byte absolute $10C; // Multiple Address Filter Configuration Register 0
  214. MAFCR1: byte absolute $10D; // Multiple Address Filter Configuration Register 1
  215. MAFSA0L: byte absolute $10E; // Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)
  216. MAFSA0H: byte absolute $10F; // Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)
  217. MAFPA0L: byte absolute $110; // Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)
  218. MAFPA0H: byte absolute $111; // Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)
  219. MAFSA1L: byte absolute $112; // Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)
  220. MAFSA1H: byte absolute $113; // Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)
  221. MAFPA1L: byte absolute $114; // Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)
  222. MAFPA1H: byte absolute $115; // Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)
  223. MAFSA2L: byte absolute $116; // Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)
  224. MAFSA2H: byte absolute $117; // Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)
  225. MAFPA2L: byte absolute $118; // Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)
  226. MAFPA2H: byte absolute $119; // Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)
  227. MAFSA3L: byte absolute $11A; // Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)
  228. MAFSA3H: byte absolute $11B; // Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)
  229. MAFPA3L: byte absolute $11C; // Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)
  230. MAFPA3H: byte absolute $11D; // Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)
  231. TCCR5A: byte absolute $120; // Timer/Counter5 Control Register A
  232. TCCR5B: byte absolute $121; // Timer/Counter5 Control Register B
  233. TCCR5C: byte absolute $122; // Timer/Counter5 Control Register C
  234. TCNT5: word absolute $124; // Timer/Counter5 Bytes
  235. TCNT5L: byte absolute $124; // Timer/Counter5 Bytes
  236. TCNT5H: byte absolute $125; // Timer/Counter5 Bytes;
  237. ICR5: word absolute $126; // Timer/Counter5 Input Capture Register Bytes
  238. ICR5L: byte absolute $126; // Timer/Counter5 Input Capture Register Bytes
  239. ICR5H: byte absolute $127; // Timer/Counter5 Input Capture Register Bytes;
  240. OCR5A: word absolute $128; // Timer/Counter5 Output Compare Register A Bytes
  241. OCR5AL: byte absolute $128; // Timer/Counter5 Output Compare Register A Bytes
  242. OCR5AH: byte absolute $129; // Timer/Counter5 Output Compare Register A Bytes;
  243. OCR5B: word absolute $12A; // Timer/Counter5 Output Compare Register B Bytes
  244. OCR5BL: byte absolute $12A; // Timer/Counter5 Output Compare Register B Bytes
  245. OCR5BH: byte absolute $12B; // Timer/Counter5 Output Compare Register B Bytes;
  246. OCR5C: word absolute $12C; // Timer/Counter5 Output Compare Register C Bytes
  247. OCR5CL: byte absolute $12C; // Timer/Counter5 Output Compare Register C Bytes
  248. OCR5CH: byte absolute $12D; // Timer/Counter5 Output Compare Register C Bytes;
  249. LLCR: byte absolute $12F; // Low Leakage Voltage Regulator Control Register
  250. LLDRL: byte absolute $130; // Low Leakage Voltage Regulator Data Register (Low-Byte)
  251. LLDRH: byte absolute $131; // Low Leakage Voltage Regulator Data Register (High-Byte)
  252. DRTRAM3: byte absolute $132; // Data Retention Configuration Register #3
  253. DRTRAM2: byte absolute $133; // Data Retention Configuration Register #2
  254. DRTRAM1: byte absolute $134; // Data Retention Configuration Register #1
  255. DRTRAM0: byte absolute $135; // Data Retention Configuration Register #0
  256. DPDS0: byte absolute $136; // Port Driver Strength Register 0
  257. DPDS1: byte absolute $137; // Port Driver Strength Register 1
  258. PARCR: byte absolute $138; // Power Amplifier Ramp up/down Control Register
  259. TRXPR: byte absolute $139; // Transceiver Pin Register
  260. AES_CTRL: byte absolute $13C; // AES Control Register
  261. AES_STATUS: byte absolute $13D; // AES Status Register
  262. AES_STATE: byte absolute $13E; // AES Plain and Cipher Text Buffer Register
  263. AES_KEY: byte absolute $13F; // AES Encryption and Decryption Key Buffer Register
  264. TRX_STATUS: byte absolute $141; // Transceiver Status Register
  265. TRX_STATE: byte absolute $142; // Transceiver State Control Register
  266. TRX_CTRL_0: byte absolute $143; // Reserved
  267. TRX_CTRL_1: byte absolute $144; // Transceiver Control Register 1
  268. PHY_TX_PWR: byte absolute $145; // Transceiver Transmit Power Control Register
  269. PHY_RSSI: byte absolute $146; // Receiver Signal Strength Indicator Register
  270. PHY_ED_LEVEL: byte absolute $147; // Transceiver Energy Detection Level Register
  271. PHY_CC_CCA: byte absolute $148; // Transceiver Clear Channel Assessment (CCA) Control Register
  272. CCA_THRES: byte absolute $149; // Transceiver CCA Threshold Setting Register
  273. RX_CTRL: byte absolute $14A; // Transceiver Receive Control Register
  274. SFD_VALUE: byte absolute $14B; // Start of Frame Delimiter Value Register
  275. TRX_CTRL_2: byte absolute $14C; // Transceiver Control Register 2
  276. ANT_DIV: byte absolute $14D; // Antenna Diversity Control Register
  277. IRQ_MASK: byte absolute $14E; // Transceiver Interrupt Enable Register
  278. IRQ_STATUS: byte absolute $14F; // Transceiver Interrupt Status Register
  279. VREG_CTRL: byte absolute $150; // Voltage Regulator Control and Status Register
  280. BATMON: byte absolute $151; // Battery Monitor Control and Status Register
  281. XOSC_CTRL: byte absolute $152; // Crystal Oscillator Control Register
  282. CC_CTRL_0: byte absolute $153; // Channel Control Register 0
  283. CC_CTRL_1: byte absolute $154; // Channel Control Register 1
  284. RX_SYN: byte absolute $155; // Transceiver Receiver Sensitivity Control Register
  285. TRX_RPC: byte absolute $156; // Transceiver Reduced Power Consumption Control
  286. XAH_CTRL_1: byte absolute $157; // Transceiver Acknowledgment Frame Control Register 1
  287. FTN_CTRL: byte absolute $158; // Transceiver Filter Tuning Control Register
  288. PLL_CF: byte absolute $15A; // Transceiver Center Frequency Calibration Control Register
  289. PLL_DCU: byte absolute $15B; // Transceiver Delay Cell Calibration Control Register
  290. PART_NUM: byte absolute $15C; // Device Identification Register (Part Number)
  291. VERSION_NUM: byte absolute $15D; // Device Identification Register (Version Number)
  292. MAN_ID_0: byte absolute $15E; // Device Identification Register (Manufacture ID Low Byte)
  293. MAN_ID_1: byte absolute $15F; // Device Identification Register (Manufacture ID High Byte)
  294. SHORT_ADDR_0: byte absolute $160; // Transceiver MAC Short Address Register (Low Byte)
  295. SHORT_ADDR_1: byte absolute $161; // Transceiver MAC Short Address Register (High Byte)
  296. PAN_ID_0: byte absolute $162; // Transceiver Personal Area Network ID Register (Low Byte)
  297. PAN_ID_1: byte absolute $163; // Transceiver Personal Area Network ID Register (High Byte)
  298. IEEE_ADDR_0: byte absolute $164; // Transceiver MAC IEEE Address Register 0
  299. IEEE_ADDR_1: byte absolute $165; // Transceiver MAC IEEE Address Register 1
  300. IEEE_ADDR_2: byte absolute $166; // Transceiver MAC IEEE Address Register 2
  301. IEEE_ADDR_3: byte absolute $167; // Transceiver MAC IEEE Address Register 3
  302. IEEE_ADDR_4: byte absolute $168; // Transceiver MAC IEEE Address Register 4
  303. IEEE_ADDR_5: byte absolute $169; // Transceiver MAC IEEE Address Register 5
  304. IEEE_ADDR_6: byte absolute $16A; // Transceiver MAC IEEE Address Register 6
  305. IEEE_ADDR_7: byte absolute $16B; // Transceiver MAC IEEE Address Register 7
  306. XAH_CTRL_0: byte absolute $16C; // Transceiver Extended Operating Mode Control Register
  307. CSMA_SEED_0: byte absolute $16D; // Transceiver CSMA-CA Random Number Generator Seed Register
  308. CSMA_SEED_1: byte absolute $16E; // Transceiver Acknowledgment Frame Control Register 2
  309. CSMA_BE: byte absolute $16F; // Transceiver CSMA-CA Back-off Exponent Control Register
  310. TST_CTRL_DIGI: byte absolute $176; // Transceiver Digital Test Control Register
  311. TST_RX_LENGTH: byte absolute $17B; // Transceiver Received Frame Length Register
  312. TRXFBST: byte absolute $180; // Start of frame buffer
  313. TRXFBEND: byte absolute $1FF; // End of frame buffer
  314. const
  315. // Port A Data Register
  316. PA0 = $00;
  317. PA1 = $01;
  318. PA2 = $02;
  319. PA3 = $03;
  320. PA4 = $04;
  321. PA5 = $05;
  322. PA6 = $06;
  323. PA7 = $07;
  324. // Port B Data Register
  325. PB0 = $00;
  326. PB1 = $01;
  327. PB2 = $02;
  328. PB3 = $03;
  329. PB4 = $04;
  330. PB5 = $05;
  331. PB6 = $06;
  332. PB7 = $07;
  333. // Port C Data Register
  334. PC0 = $00;
  335. PC1 = $01;
  336. PC2 = $02;
  337. PC3 = $03;
  338. PC4 = $04;
  339. PC5 = $05;
  340. PC6 = $06;
  341. PC7 = $07;
  342. // Port D Data Register
  343. PD0 = $00;
  344. PD1 = $01;
  345. PD2 = $02;
  346. PD3 = $03;
  347. PD4 = $04;
  348. PD5 = $05;
  349. PD6 = $06;
  350. PD7 = $07;
  351. // Port E Data Register
  352. PE0 = $00;
  353. PE1 = $01;
  354. PE2 = $02;
  355. PE3 = $03;
  356. PE4 = $04;
  357. PE5 = $05;
  358. PE6 = $06;
  359. PE7 = $07;
  360. // Port F Data Register
  361. PF0 = $00;
  362. PF1 = $01;
  363. PF2 = $02;
  364. PF3 = $03;
  365. PF4 = $04;
  366. PF5 = $05;
  367. PF6 = $06;
  368. PF7 = $07;
  369. // Port G Data Register
  370. PG0 = $00;
  371. PG1 = $01;
  372. PG2 = $02;
  373. PG3 = $03;
  374. PG4 = $04;
  375. PG5 = $05;
  376. PG6 = $06;
  377. PG7 = $07;
  378. // Timer/Counter0 Interrupt Flag Register
  379. TOV0 = $00;
  380. OCF0A = $01;
  381. OCF0B = $02;
  382. // Timer/Counter1 Interrupt Flag Register
  383. TOV1 = $00;
  384. OCF1A = $01;
  385. OCF1B = $02;
  386. OCF1C = $03;
  387. ICF1 = $05;
  388. // Timer/Counter Interrupt Flag Register
  389. TOV2 = $00;
  390. OCF2A = $01;
  391. OCF2B = $02;
  392. // Timer/Counter3 Interrupt Flag Register
  393. TOV3 = $00;
  394. OCF3A = $01;
  395. OCF3B = $02;
  396. OCF3C = $03;
  397. ICF3 = $05;
  398. // Timer/Counter4 Interrupt Flag Register
  399. TOV4 = $00;
  400. OCF4A = $01;
  401. OCF4B = $02;
  402. OCF4C = $03;
  403. ICF4 = $05;
  404. // Timer/Counter5 Interrupt Flag Register
  405. TOV5 = $00;
  406. OCF5A = $01;
  407. OCF5B = $02;
  408. OCF5C = $03;
  409. ICF5 = $05;
  410. // Pin Change Interrupt Flag Register
  411. PCIF0 = $00; // Pin Change Interrupt Flags
  412. PCIF1 = $01; // Pin Change Interrupt Flags
  413. PCIF2 = $02; // Pin Change Interrupt Flags
  414. // External Interrupt Flag Register
  415. INTF0 = $00; // External Interrupt Flag
  416. INTF1 = $01; // External Interrupt Flag
  417. INTF2 = $02; // External Interrupt Flag
  418. INTF3 = $03; // External Interrupt Flag
  419. INTF4 = $04; // External Interrupt Flag
  420. INTF5 = $05; // External Interrupt Flag
  421. INTF6 = $06; // External Interrupt Flag
  422. INTF7 = $07; // External Interrupt Flag
  423. // External Interrupt Mask Register
  424. INT0 = $00; // External Interrupt Request Enable
  425. INT1 = $01; // External Interrupt Request Enable
  426. INT2 = $02; // External Interrupt Request Enable
  427. INT3 = $03; // External Interrupt Request Enable
  428. INT4 = $04; // External Interrupt Request Enable
  429. INT5 = $05; // External Interrupt Request Enable
  430. INT6 = $06; // External Interrupt Request Enable
  431. INT7 = $07; // External Interrupt Request Enable
  432. // General Purpose IO Register 0
  433. GPIOR00 = $00;
  434. GPIOR01 = $01;
  435. GPIOR02 = $02;
  436. GPIOR03 = $03;
  437. GPIOR04 = $04;
  438. GPIOR05 = $05;
  439. GPIOR06 = $06;
  440. GPIOR07 = $07;
  441. // EEPROM Control Register
  442. EERE = $00;
  443. EEPE = $01;
  444. EEMPE = $02;
  445. EERIE = $03;
  446. EEPM0 = $04; // EEPROM Programming Mode
  447. EEPM1 = $05; // EEPROM Programming Mode
  448. // General Timer Counter Control register
  449. PSRSYNC = $00;
  450. PSRASY = $01;
  451. TSM = $07;
  452. // Timer/Counter0 Control Register A
  453. WGM00 = $00; // Waveform Generation Mode
  454. WGM01 = $01; // Waveform Generation Mode
  455. COM0B0 = $04; // Compare Match Output B Mode
  456. COM0B1 = $05; // Compare Match Output B Mode
  457. COM0A0 = $06; // Compare Match Output A Mode
  458. COM0A1 = $07; // Compare Match Output A Mode
  459. // Timer/Counter0 Control Register B
  460. CS00 = $00; // Clock Select
  461. CS01 = $01; // Clock Select
  462. CS02 = $02; // Clock Select
  463. WGM02 = $03;
  464. FOC0B = $06;
  465. FOC0A = $07;
  466. // General Purpose I/O Register 2
  467. GPIOR20 = $00; // General Purpose I/O Register 2 Value
  468. GPIOR21 = $01; // General Purpose I/O Register 2 Value
  469. GPIOR22 = $02; // General Purpose I/O Register 2 Value
  470. GPIOR23 = $03; // General Purpose I/O Register 2 Value
  471. GPIOR24 = $04; // General Purpose I/O Register 2 Value
  472. GPIOR25 = $05; // General Purpose I/O Register 2 Value
  473. GPIOR26 = $06; // General Purpose I/O Register 2 Value
  474. GPIOR27 = $07; // General Purpose I/O Register 2 Value
  475. // SPI Control Register
  476. SPR0 = $00; // SPI Clock Rate Select 1 and 0
  477. SPR1 = $01; // SPI Clock Rate Select 1 and 0
  478. CPHA = $02;
  479. CPOL = $03;
  480. MSTR = $04;
  481. DORD = $05;
  482. SPE = $06;
  483. SPIE = $07;
  484. // SPI Status Register
  485. SPI2X = $00;
  486. WCOL = $06;
  487. SPIF = $07;
  488. // Analog Comparator Control And Status Register
  489. ACIS0 = $00; // Analog Comparator Interrupt Mode Select
  490. ACIS1 = $01; // Analog Comparator Interrupt Mode Select
  491. ACIC = $02;
  492. ACIE = $03;
  493. ACI = $04;
  494. ACO = $05;
  495. ACBG = $06;
  496. ACD = $07;
  497. // On-Chip Debug Register
  498. OCDR0 = $00; // On-Chip Debug Register Data
  499. OCDR1 = $01; // On-Chip Debug Register Data
  500. OCDR2 = $02; // On-Chip Debug Register Data
  501. OCDR3 = $03; // On-Chip Debug Register Data
  502. OCDR4 = $04; // On-Chip Debug Register Data
  503. OCDR5 = $05; // On-Chip Debug Register Data
  504. OCDR6 = $06; // On-Chip Debug Register Data
  505. OCDR7 = $07; // On-Chip Debug Register Data
  506. // Sleep Mode Control Register
  507. SE = $00;
  508. SM0 = $01; // Sleep Mode Select bits
  509. SM1 = $02; // Sleep Mode Select bits
  510. SM2 = $03; // Sleep Mode Select bits
  511. // MCU Status Register
  512. PORF = $00;
  513. EXTRF = $01;
  514. BORF = $02;
  515. WDRF = $03;
  516. JTRF = $04;
  517. // MCU Control Register
  518. IVCE = $00;
  519. IVSEL = $01;
  520. PUD = $04;
  521. JTD = $07;
  522. // Store Program Memory Control Register
  523. SPMEN = $00;
  524. PGERS = $01;
  525. PGWRT = $02;
  526. BLBSET = $03;
  527. RWWSRE = $04;
  528. SIGRD = $05;
  529. RWWSB = $06;
  530. SPMIE = $07;
  531. // Extended Z-pointer Register for ELPM/SPM
  532. RAMPZ0 = $00;
  533. // Status Register
  534. C = $00;
  535. Z = $01;
  536. N = $02;
  537. V = $03;
  538. S = $04;
  539. H = $05;
  540. T = $06;
  541. I = $07;
  542. // Watchdog Timer Control Register
  543. WDE = $03;
  544. WDCE = $04;
  545. WDP0 = $00; // Watchdog Timer Prescaler Bits
  546. WDP1 = $01; // Watchdog Timer Prescaler Bits
  547. WDP2 = $02; // Watchdog Timer Prescaler Bits
  548. WDP3 = $05; // Watchdog Timer Prescaler Bits
  549. WDIE = $06;
  550. WDIF = $07;
  551. // Clock Prescale Register
  552. CLKPS0 = $00; // Clock Prescaler Select Bits
  553. CLKPS1 = $01; // Clock Prescaler Select Bits
  554. CLKPS2 = $02; // Clock Prescaler Select Bits
  555. CLKPS3 = $03; // Clock Prescaler Select Bits
  556. CLKPCE = $07;
  557. // Power Reduction Register 2
  558. PRRAM0 = $00;
  559. PRRAM1 = $01;
  560. PRRAM2 = $02;
  561. PRRAM3 = $03;
  562. // Power Reduction Register0
  563. PRADC = $00;
  564. PRUSART0 = $01;
  565. PRSPI = $02;
  566. PRTIM1 = $03;
  567. PRPGA = $04;
  568. PRTIM0 = $05;
  569. PRTIM2 = $06;
  570. PRTWI = $07;
  571. // Power Reduction Register 1
  572. PRUSART1 = $00;
  573. PRTIM3 = $03;
  574. PRTIM4 = $04;
  575. PRTIM5 = $05;
  576. PRTRX24 = $06;
  577. // Oscillator Calibration Value
  578. CAL0 = $00; // Oscillator Calibration Tuning Value
  579. CAL1 = $01; // Oscillator Calibration Tuning Value
  580. CAL2 = $02; // Oscillator Calibration Tuning Value
  581. CAL3 = $03; // Oscillator Calibration Tuning Value
  582. CAL4 = $04; // Oscillator Calibration Tuning Value
  583. CAL5 = $05; // Oscillator Calibration Tuning Value
  584. CAL6 = $06; // Oscillator Calibration Tuning Value
  585. CAL7 = $07; // Oscillator Calibration Tuning Value
  586. OSCCAL0 = $00; // Oscillator Calibration
  587. OSCCAL1 = $01; // Oscillator Calibration
  588. OSCCAL2 = $02; // Oscillator Calibration
  589. OSCCAL3 = $03; // Oscillator Calibration
  590. OSCCAL4 = $04; // Oscillator Calibration
  591. OSCCAL5 = $05; // Oscillator Calibration
  592. OSCCAL6 = $06; // Oscillator Calibration
  593. OSCCAL7 = $07; // Oscillator Calibration
  594. // Reference Voltage Calibration Register
  595. BGCAL0 = $00; // Coarse Calibration Bits
  596. BGCAL1 = $01; // Coarse Calibration Bits
  597. BGCAL2 = $02; // Coarse Calibration Bits
  598. BGCAL_FINE0 = $03; // Fine Calibration Bits
  599. BGCAL_FINE1 = $04; // Fine Calibration Bits
  600. BGCAL_FINE2 = $05; // Fine Calibration Bits
  601. BGCAL_FINE3 = $06; // Fine Calibration Bits
  602. // Pin Change Interrupt Control Register
  603. PCIE0 = $00; // Pin Change Interrupt Enables
  604. PCIE1 = $01; // Pin Change Interrupt Enables
  605. PCIE2 = $02; // Pin Change Interrupt Enables
  606. // External Interrupt Control Register A
  607. ISC00 = $00; // External Interrupt 0 Sense Control Bit
  608. ISC01 = $01; // External Interrupt 0 Sense Control Bit
  609. ISC10 = $02; // External Interrupt 1 Sense Control Bit
  610. ISC11 = $03; // External Interrupt 1 Sense Control Bit
  611. ISC20 = $04; // External Interrupt 2 Sense Control Bit
  612. ISC21 = $05; // External Interrupt 2 Sense Control Bit
  613. ISC30 = $06; // External Interrupt 3 Sense Control Bit
  614. ISC31 = $07; // External Interrupt 3 Sense Control Bit
  615. // External Interrupt Control Register B
  616. ISC40 = $00; // External Interrupt 4 Sense Control Bit
  617. ISC41 = $01; // External Interrupt 4 Sense Control Bit
  618. ISC50 = $02; // External Interrupt 5 Sense Control Bit
  619. ISC51 = $03; // External Interrupt 5 Sense Control Bit
  620. ISC60 = $04; // External Interrupt 6 Sense Control Bit
  621. ISC61 = $05; // External Interrupt 6 Sense Control Bit
  622. ISC70 = $06; // External Interrupt 7 Sense Control Bit
  623. ISC71 = $07; // External Interrupt 7 Sense Control Bit
  624. // Pin Change Mask Register 2
  625. PCINT16 = $00; // Pin Change Enable Mask
  626. PCINT17 = $01; // Pin Change Enable Mask
  627. PCINT18 = $02; // Pin Change Enable Mask
  628. PCINT19 = $03; // Pin Change Enable Mask
  629. PCINT20 = $04; // Pin Change Enable Mask
  630. PCINT21 = $05; // Pin Change Enable Mask
  631. PCINT22 = $06; // Pin Change Enable Mask
  632. PCINT23 = $07; // Pin Change Enable Mask
  633. // Timer/Counter0 Interrupt Mask Register
  634. TOIE0 = $00;
  635. OCIE0A = $01;
  636. OCIE0B = $02;
  637. // Timer/Counter1 Interrupt Mask Register
  638. TOIE1 = $00;
  639. OCIE1A = $01;
  640. OCIE1B = $02;
  641. OCIE1C = $03;
  642. ICIE1 = $05;
  643. // Timer/Counter Interrupt Mask register
  644. TOIE2 = $00;
  645. OCIE2A = $01;
  646. OCIE2B = $02;
  647. // Timer/Counter3 Interrupt Mask Register
  648. TOIE3 = $00;
  649. OCIE3A = $01;
  650. OCIE3B = $02;
  651. OCIE3C = $03;
  652. ICIE3 = $05;
  653. // Timer/Counter4 Interrupt Mask Register
  654. TOIE4 = $00;
  655. OCIE4A = $01;
  656. OCIE4B = $02;
  657. OCIE4C = $03;
  658. ICIE4 = $05;
  659. // Timer/Counter5 Interrupt Mask Register
  660. TOIE5 = $00;
  661. OCIE5A = $01;
  662. OCIE5B = $02;
  663. OCIE5C = $03;
  664. ICIE5 = $05;
  665. // Flash Extended-Mode Control-Register
  666. AEAM0 = $04; // Address for Extended Address Mode of Extra Rows
  667. AEAM1 = $05; // Address for Extended Address Mode of Extra Rows
  668. ENEAM = $06;
  669. // The ADC Control and Status Register C
  670. ADSUT0 = $00; // ADC Start-up Time
  671. ADSUT1 = $01; // ADC Start-up Time
  672. ADSUT2 = $02; // ADC Start-up Time
  673. ADSUT3 = $03; // ADC Start-up Time
  674. ADSUT4 = $04; // ADC Start-up Time
  675. ADTHT0 = $06; // ADC Track-and-Hold Time
  676. ADTHT1 = $07; // ADC Track-and-Hold Time
  677. // The ADC Control and Status Register A
  678. ADPS0 = $00; // ADC Prescaler Select Bits
  679. ADPS1 = $01; // ADC Prescaler Select Bits
  680. ADPS2 = $02; // ADC Prescaler Select Bits
  681. ADIE = $03;
  682. ADIF = $04;
  683. ADATE = $05;
  684. ADSC = $06;
  685. ADEN = $07;
  686. // The ADC Control and Status Register B
  687. ADTS0 = $00; // ADC Auto Trigger Source
  688. ADTS1 = $01; // ADC Auto Trigger Source
  689. ADTS2 = $02; // ADC Auto Trigger Source
  690. MUX5 = $03;
  691. ACCH = $04;
  692. REFOK = $05;
  693. ACME = $06;
  694. AVDDOK = $07;
  695. // The ADC Multiplexer Selection Register
  696. MUX0 = $00; // Analog Channel and Gain Selection Bits
  697. MUX1 = $01; // Analog Channel and Gain Selection Bits
  698. MUX2 = $02; // Analog Channel and Gain Selection Bits
  699. MUX3 = $03; // Analog Channel and Gain Selection Bits
  700. MUX4 = $04; // Analog Channel and Gain Selection Bits
  701. ADLAR = $05;
  702. REFS0 = $06; // Reference Selection Bits
  703. REFS1 = $07; // Reference Selection Bits
  704. // Digital Input Disable Register 2
  705. ADC8D = $00;
  706. ADC9D = $01;
  707. ADC10D = $02;
  708. ADC11D = $03;
  709. ADC12D = $04;
  710. ADC13D = $05;
  711. ADC14D = $06;
  712. ADC15D = $07;
  713. // Digital Input Disable Register 0
  714. ADC0D = $00;
  715. ADC1D = $01;
  716. ADC2D = $02;
  717. ADC3D = $03;
  718. ADC4D = $04;
  719. ADC5D = $05;
  720. ADC6D = $06;
  721. ADC7D = $07;
  722. // Digital Input Disable Register 1
  723. AIN0D = $00;
  724. AIN1D = $01;
  725. // Timer/Counter1 Control Register A
  726. WGM10 = $00; // Waveform Generation Mode
  727. WGM11 = $01; // Waveform Generation Mode
  728. COM1C0 = $02; // Compare Output Mode for Channel C
  729. COM1C1 = $03; // Compare Output Mode for Channel C
  730. COM1B0 = $04; // Compare Output Mode for Channel B
  731. COM1B1 = $05; // Compare Output Mode for Channel B
  732. COM1A0 = $06; // Compare Output Mode for Channel A
  733. COM1A1 = $07; // Compare Output Mode for Channel A
  734. // Timer/Counter1 Control Register B
  735. CS10 = $00; // Clock Select
  736. CS11 = $01; // Clock Select
  737. CS12 = $02; // Clock Select
  738. ICES1 = $06;
  739. ICNC1 = $07;
  740. // Timer/Counter1 Control Register C
  741. FOC1C = $05;
  742. FOC1B = $06;
  743. FOC1A = $07;
  744. // Timer/Counter3 Control Register A
  745. WGM30 = $00; // Waveform Generation Mode
  746. WGM31 = $01; // Waveform Generation Mode
  747. COM3C0 = $02; // Compare Output Mode for Channel C
  748. COM3C1 = $03; // Compare Output Mode for Channel C
  749. COM3B0 = $04; // Compare Output Mode for Channel B
  750. COM3B1 = $05; // Compare Output Mode for Channel B
  751. COM3A0 = $06; // Compare Output Mode for Channel A
  752. COM3A1 = $07; // Compare Output Mode for Channel A
  753. // Timer/Counter3 Control Register B
  754. CS30 = $00; // Clock Select
  755. CS31 = $01; // Clock Select
  756. CS32 = $02; // Clock Select
  757. ICES3 = $06;
  758. ICNC3 = $07;
  759. // Timer/Counter3 Control Register C
  760. FOC3C = $05;
  761. FOC3B = $06;
  762. FOC3A = $07;
  763. // Timer/Counter4 Control Register A
  764. WGM40 = $00; // Waveform Generation Mode
  765. WGM41 = $01; // Waveform Generation Mode
  766. COM4C0 = $02; // Compare Output Mode for Channel C
  767. COM4C1 = $03; // Compare Output Mode for Channel C
  768. COM4B0 = $04; // Compare Output Mode for Channel B
  769. COM4B1 = $05; // Compare Output Mode for Channel B
  770. COM4A0 = $06; // Compare Output Mode for Channel A
  771. COM4A1 = $07; // Compare Output Mode for Channel A
  772. // Timer/Counter4 Control Register B
  773. CS40 = $00; // Clock Select
  774. CS41 = $01; // Clock Select
  775. CS42 = $02; // Clock Select
  776. ICES4 = $06;
  777. ICNC4 = $07;
  778. // Timer/Counter4 Control Register C
  779. FOC4C = $05;
  780. FOC4B = $06;
  781. FOC4A = $07;
  782. // Timer/Counter2 Control Register A
  783. WGM20 = $00; // Waveform Generation Mode
  784. WGM21 = $01; // Waveform Generation Mode
  785. COM2B0 = $04; // Compare Match Output B Mode
  786. COM2B1 = $05; // Compare Match Output B Mode
  787. COM2A0 = $06; // Compare Match Output A Mode
  788. COM2A1 = $07; // Compare Match Output A Mode
  789. // Timer/Counter2 Control Register B
  790. CS20 = $00; // Clock Select
  791. CS21 = $01; // Clock Select
  792. CS22 = $02; // Clock Select
  793. WGM22 = $03;
  794. FOC2B = $06;
  795. FOC2A = $07;
  796. // Asynchronous Status Register
  797. TCR2BUB = $00;
  798. TCR2AUB = $01;
  799. OCR2BUB = $02;
  800. OCR2AUB = $03;
  801. TCN2UB = $04;
  802. AS2 = $05;
  803. EXCLK = $06;
  804. EXCLKAMR = $07;
  805. // TWI Status Register
  806. TWPS0 = $00; // TWI Prescaler Bits
  807. TWPS1 = $01; // TWI Prescaler Bits
  808. TWS3 = $03; // TWI Status
  809. TWS4 = $04; // TWI Status
  810. TWS5 = $05; // TWI Status
  811. TWS6 = $06; // TWI Status
  812. TWS7 = $07; // TWI Status
  813. // TWI (Slave) Address Register
  814. TWGCE = $00;
  815. TWA0 = $01; // TWI (Slave) Address
  816. TWA1 = $02; // TWI (Slave) Address
  817. TWA2 = $03; // TWI (Slave) Address
  818. TWA3 = $04; // TWI (Slave) Address
  819. TWA4 = $05; // TWI (Slave) Address
  820. TWA5 = $06; // TWI (Slave) Address
  821. TWA6 = $07; // TWI (Slave) Address
  822. // TWI Control Register
  823. TWIE = $00;
  824. TWEN = $02;
  825. TWWC = $03;
  826. TWSTO = $04;
  827. TWSTA = $05;
  828. TWEA = $06;
  829. TWINT = $07;
  830. // TWI (Slave) Address Mask Register
  831. Res = $00;
  832. TWAM0 = $01; // TWI Address Mask
  833. TWAM1 = $02; // TWI Address Mask
  834. TWAM2 = $03; // TWI Address Mask
  835. TWAM3 = $04; // TWI Address Mask
  836. TWAM4 = $05; // TWI Address Mask
  837. TWAM5 = $06; // TWI Address Mask
  838. TWAM6 = $07; // TWI Address Mask
  839. // Transceiver Interrupt Enable Register 1
  840. TX_START_EN = $00;
  841. MAF_0_AMI_EN = $01;
  842. MAF_1_AMI_EN = $02;
  843. MAF_2_AMI_EN = $03;
  844. MAF_3_AMI_EN = $04;
  845. // Transceiver Interrupt Status Register 1
  846. TX_START = $00;
  847. MAF_0_AMI = $01;
  848. MAF_1_AMI = $02;
  849. MAF_2_AMI = $03;
  850. MAF_3_AMI = $04;
  851. // USART0 MSPIM Control and Status Register A
  852. MPCM0 = $00;
  853. U2X0 = $01;
  854. UPE0 = $02;
  855. DOR0 = $03;
  856. FE0 = $04;
  857. UDRE0 = $05;
  858. TXC0 = $06;
  859. RXC0 = $07;
  860. // USART0 MSPIM Control and Status Register B
  861. TXB80 = $00;
  862. RXB80 = $01;
  863. UCSZ02 = $02;
  864. TXEN0 = $03;
  865. RXEN0 = $04;
  866. UDRIE0 = $05;
  867. TXCIE0 = $06;
  868. RXCIE0 = $07;
  869. // USART0 MSPIM Control and Status Register C
  870. UCPOL0 = $00;
  871. UCPHA0 = $01;
  872. UDORD0 = $02;
  873. UCSZ00 = $01; // Character Size
  874. UCSZ01 = $02; // Character Size
  875. USBS0 = $03;
  876. UPM00 = $04; // Parity Mode
  877. UPM01 = $05; // Parity Mode
  878. UMSEL00 = $06; // USART Mode Select
  879. UMSEL01 = $07; // USART Mode Select
  880. // USART1 MSPIM Control and Status Register A
  881. MPCM1 = $00;
  882. U2X1 = $01;
  883. UPE1 = $02;
  884. DOR1 = $03;
  885. FE1 = $04;
  886. UDRE1 = $05;
  887. TXC1 = $06;
  888. RXC1 = $07;
  889. // USART1 MSPIM Control and Status Register B
  890. TXB81 = $00;
  891. RXB81 = $01;
  892. UCSZ12 = $02;
  893. TXEN1 = $03;
  894. RXEN1 = $04;
  895. UDRIE1 = $05;
  896. TXCIE1 = $06;
  897. RXCIE1 = $07;
  898. // USART1 MSPIM Control and Status Register C
  899. UCPOL1 = $00;
  900. UCPHA1 = $01;
  901. UDORD1 = $02;
  902. UCSZ10 = $01; // Character Size
  903. UCSZ11 = $02; // Character Size
  904. USBS1 = $03;
  905. UPM10 = $04; // Parity Mode
  906. UPM11 = $05; // Parity Mode
  907. UMSEL10 = $06; // USART Mode Select
  908. UMSEL11 = $07; // USART Mode Select
  909. // Symbol Counter Received Frame Timestamp Register LL-Byte
  910. SCRSTRLL0 = $00; // Symbol Counter Received Frame Timestamp Register LL-Byte
  911. SCRSTRLL1 = $01; // Symbol Counter Received Frame Timestamp Register LL-Byte
  912. SCRSTRLL2 = $02; // Symbol Counter Received Frame Timestamp Register LL-Byte
  913. SCRSTRLL3 = $03; // Symbol Counter Received Frame Timestamp Register LL-Byte
  914. SCRSTRLL4 = $04; // Symbol Counter Received Frame Timestamp Register LL-Byte
  915. SCRSTRLL5 = $05; // Symbol Counter Received Frame Timestamp Register LL-Byte
  916. SCRSTRLL6 = $06; // Symbol Counter Received Frame Timestamp Register LL-Byte
  917. SCRSTRLL7 = $07; // Symbol Counter Received Frame Timestamp Register LL-Byte
  918. // Symbol Counter Received Frame Timestamp Register LH-Byte
  919. SCRSTRLH0 = $00; // Symbol Counter Received Frame Timestamp Register LH-Byte
  920. SCRSTRLH1 = $01; // Symbol Counter Received Frame Timestamp Register LH-Byte
  921. SCRSTRLH2 = $02; // Symbol Counter Received Frame Timestamp Register LH-Byte
  922. SCRSTRLH3 = $03; // Symbol Counter Received Frame Timestamp Register LH-Byte
  923. SCRSTRLH4 = $04; // Symbol Counter Received Frame Timestamp Register LH-Byte
  924. SCRSTRLH5 = $05; // Symbol Counter Received Frame Timestamp Register LH-Byte
  925. SCRSTRLH6 = $06; // Symbol Counter Received Frame Timestamp Register LH-Byte
  926. SCRSTRLH7 = $07; // Symbol Counter Received Frame Timestamp Register LH-Byte
  927. // Symbol Counter Received Frame Timestamp Register HL-Byte
  928. SCRSTRHL0 = $00; // Symbol Counter Received Frame Timestamp Register HL-Byte
  929. SCRSTRHL1 = $01; // Symbol Counter Received Frame Timestamp Register HL-Byte
  930. SCRSTRHL2 = $02; // Symbol Counter Received Frame Timestamp Register HL-Byte
  931. SCRSTRHL3 = $03; // Symbol Counter Received Frame Timestamp Register HL-Byte
  932. SCRSTRHL4 = $04; // Symbol Counter Received Frame Timestamp Register HL-Byte
  933. SCRSTRHL5 = $05; // Symbol Counter Received Frame Timestamp Register HL-Byte
  934. SCRSTRHL6 = $06; // Symbol Counter Received Frame Timestamp Register HL-Byte
  935. SCRSTRHL7 = $07; // Symbol Counter Received Frame Timestamp Register HL-Byte
  936. // Symbol Counter Received Frame Timestamp Register HH-Byte
  937. SCRSTRHH0 = $00; // Symbol Counter Received Frame Timestamp Register HH-Byte
  938. SCRSTRHH1 = $01; // Symbol Counter Received Frame Timestamp Register HH-Byte
  939. SCRSTRHH2 = $02; // Symbol Counter Received Frame Timestamp Register HH-Byte
  940. SCRSTRHH3 = $03; // Symbol Counter Received Frame Timestamp Register HH-Byte
  941. SCRSTRHH4 = $04; // Symbol Counter Received Frame Timestamp Register HH-Byte
  942. SCRSTRHH5 = $05; // Symbol Counter Received Frame Timestamp Register HH-Byte
  943. SCRSTRHH6 = $06; // Symbol Counter Received Frame Timestamp Register HH-Byte
  944. SCRSTRHH7 = $07; // Symbol Counter Received Frame Timestamp Register HH-Byte
  945. // Symbol Counter Compare Source Register
  946. SCCS10 = $00; // Symbol Counter Compare Source select register for Compare Units
  947. SCCS11 = $01; // Symbol Counter Compare Source select register for Compare Units
  948. SCCS20 = $02; // Symbol Counter Compare Source select register for Compare Unit 2
  949. SCCS21 = $03; // Symbol Counter Compare Source select register for Compare Unit 2
  950. SCCS30 = $04; // Symbol Counter Compare Source select register for Compare Unit 3
  951. SCCS31 = $05; // Symbol Counter Compare Source select register for Compare Unit 3
  952. // Symbol Counter Control Register 0
  953. SCCMP1 = $00; // Symbol Counter Compare Unit 3 Mode select
  954. SCCMP2 = $01; // Symbol Counter Compare Unit 3 Mode select
  955. SCCMP3 = $02; // Symbol Counter Compare Unit 3 Mode select
  956. SCTSE = $03;
  957. SCCKSEL = $04;
  958. SCEN = $05;
  959. SCMBTS = $06;
  960. SCRES = $07;
  961. // Symbol Counter Control Register 1
  962. SCENBO = $00;
  963. SCEECLK = $01;
  964. SCCKDIV0 = $02; // Clock divider for synchronous clock source (16MHz Transceiver Clock)
  965. SCCKDIV1 = $03; // Clock divider for synchronous clock source (16MHz Transceiver Clock)
  966. SCCKDIV2 = $04; // Clock divider for synchronous clock source (16MHz Transceiver Clock)
  967. SCBTSM = $05;
  968. // Symbol Counter Status Register
  969. SCBSY = $00;
  970. // Symbol Counter Interrupt Mask Register
  971. IRQMCP1 = $00; // Symbol Counter Compare Match 3 IRQ enable
  972. IRQMCP2 = $01; // Symbol Counter Compare Match 3 IRQ enable
  973. IRQMCP3 = $02; // Symbol Counter Compare Match 3 IRQ enable
  974. IRQMOF = $03;
  975. IRQMBO = $04;
  976. // Symbol Counter Interrupt Status Register
  977. IRQSCP1 = $00; // Compare Unit 3 Compare Match IRQ
  978. IRQSCP2 = $01; // Compare Unit 3 Compare Match IRQ
  979. IRQSCP3 = $02; // Compare Unit 3 Compare Match IRQ
  980. IRQSOF = $03;
  981. IRQSBO = $04;
  982. // Symbol Counter Register LL-Byte
  983. SCCNTLL0 = $00; // Symbol Counter Register LL-Byte
  984. SCCNTLL1 = $01; // Symbol Counter Register LL-Byte
  985. SCCNTLL2 = $02; // Symbol Counter Register LL-Byte
  986. SCCNTLL3 = $03; // Symbol Counter Register LL-Byte
  987. SCCNTLL4 = $04; // Symbol Counter Register LL-Byte
  988. SCCNTLL5 = $05; // Symbol Counter Register LL-Byte
  989. SCCNTLL6 = $06; // Symbol Counter Register LL-Byte
  990. SCCNTLL7 = $07; // Symbol Counter Register LL-Byte
  991. // Symbol Counter Register LH-Byte
  992. SCCNTLH0 = $00; // Symbol Counter Register LH-Byte
  993. SCCNTLH1 = $01; // Symbol Counter Register LH-Byte
  994. SCCNTLH2 = $02; // Symbol Counter Register LH-Byte
  995. SCCNTLH3 = $03; // Symbol Counter Register LH-Byte
  996. SCCNTLH4 = $04; // Symbol Counter Register LH-Byte
  997. SCCNTLH5 = $05; // Symbol Counter Register LH-Byte
  998. SCCNTLH6 = $06; // Symbol Counter Register LH-Byte
  999. SCCNTLH7 = $07; // Symbol Counter Register LH-Byte
  1000. // Symbol Counter Register HL-Byte
  1001. SCCNTHL0 = $00; // Symbol Counter Register HL-Byte
  1002. SCCNTHL1 = $01; // Symbol Counter Register HL-Byte
  1003. SCCNTHL2 = $02; // Symbol Counter Register HL-Byte
  1004. SCCNTHL3 = $03; // Symbol Counter Register HL-Byte
  1005. SCCNTHL4 = $04; // Symbol Counter Register HL-Byte
  1006. SCCNTHL5 = $05; // Symbol Counter Register HL-Byte
  1007. SCCNTHL6 = $06; // Symbol Counter Register HL-Byte
  1008. SCCNTHL7 = $07; // Symbol Counter Register HL-Byte
  1009. // Symbol Counter Register HH-Byte
  1010. SCCNTHH0 = $00; // Symbol Counter Register HH-Byte
  1011. SCCNTHH1 = $01; // Symbol Counter Register HH-Byte
  1012. SCCNTHH2 = $02; // Symbol Counter Register HH-Byte
  1013. SCCNTHH3 = $03; // Symbol Counter Register HH-Byte
  1014. SCCNTHH4 = $04; // Symbol Counter Register HH-Byte
  1015. SCCNTHH5 = $05; // Symbol Counter Register HH-Byte
  1016. SCCNTHH6 = $06; // Symbol Counter Register HH-Byte
  1017. SCCNTHH7 = $07; // Symbol Counter Register HH-Byte
  1018. // Symbol Counter Beacon Timestamp Register LL-Byte
  1019. SCBTSRLL0 = $00; // Symbol Counter Beacon Timestamp Register LL-Byte
  1020. SCBTSRLL1 = $01; // Symbol Counter Beacon Timestamp Register LL-Byte
  1021. SCBTSRLL2 = $02; // Symbol Counter Beacon Timestamp Register LL-Byte
  1022. SCBTSRLL3 = $03; // Symbol Counter Beacon Timestamp Register LL-Byte
  1023. SCBTSRLL4 = $04; // Symbol Counter Beacon Timestamp Register LL-Byte
  1024. SCBTSRLL5 = $05; // Symbol Counter Beacon Timestamp Register LL-Byte
  1025. SCBTSRLL6 = $06; // Symbol Counter Beacon Timestamp Register LL-Byte
  1026. SCBTSRLL7 = $07; // Symbol Counter Beacon Timestamp Register LL-Byte
  1027. // Symbol Counter Beacon Timestamp Register LH-Byte
  1028. SCBTSRLH0 = $00; // Symbol Counter Beacon Timestamp Register LH-Byte
  1029. SCBTSRLH1 = $01; // Symbol Counter Beacon Timestamp Register LH-Byte
  1030. SCBTSRLH2 = $02; // Symbol Counter Beacon Timestamp Register LH-Byte
  1031. SCBTSRLH3 = $03; // Symbol Counter Beacon Timestamp Register LH-Byte
  1032. SCBTSRLH4 = $04; // Symbol Counter Beacon Timestamp Register LH-Byte
  1033. SCBTSRLH5 = $05; // Symbol Counter Beacon Timestamp Register LH-Byte
  1034. SCBTSRLH6 = $06; // Symbol Counter Beacon Timestamp Register LH-Byte
  1035. SCBTSRLH7 = $07; // Symbol Counter Beacon Timestamp Register LH-Byte
  1036. // Symbol Counter Beacon Timestamp Register HL-Byte
  1037. SCBTSRHL0 = $00; // Symbol Counter Beacon Timestamp Register HL-Byte
  1038. SCBTSRHL1 = $01; // Symbol Counter Beacon Timestamp Register HL-Byte
  1039. SCBTSRHL2 = $02; // Symbol Counter Beacon Timestamp Register HL-Byte
  1040. SCBTSRHL3 = $03; // Symbol Counter Beacon Timestamp Register HL-Byte
  1041. SCBTSRHL4 = $04; // Symbol Counter Beacon Timestamp Register HL-Byte
  1042. SCBTSRHL5 = $05; // Symbol Counter Beacon Timestamp Register HL-Byte
  1043. SCBTSRHL6 = $06; // Symbol Counter Beacon Timestamp Register HL-Byte
  1044. SCBTSRHL7 = $07; // Symbol Counter Beacon Timestamp Register HL-Byte
  1045. // Symbol Counter Beacon Timestamp Register HH-Byte
  1046. SCBTSRHH0 = $00; // Symbol Counter Beacon Timestamp Register HH-Byte
  1047. SCBTSRHH1 = $01; // Symbol Counter Beacon Timestamp Register HH-Byte
  1048. SCBTSRHH2 = $02; // Symbol Counter Beacon Timestamp Register HH-Byte
  1049. SCBTSRHH3 = $03; // Symbol Counter Beacon Timestamp Register HH-Byte
  1050. SCBTSRHH4 = $04; // Symbol Counter Beacon Timestamp Register HH-Byte
  1051. SCBTSRHH5 = $05; // Symbol Counter Beacon Timestamp Register HH-Byte
  1052. SCBTSRHH6 = $06; // Symbol Counter Beacon Timestamp Register HH-Byte
  1053. SCBTSRHH7 = $07; // Symbol Counter Beacon Timestamp Register HH-Byte
  1054. // Symbol Counter Frame Timestamp Register LL-Byte
  1055. SCTSRLL0 = $00; // Symbol Counter Frame Timestamp Register LL-Byte
  1056. SCTSRLL1 = $01; // Symbol Counter Frame Timestamp Register LL-Byte
  1057. SCTSRLL2 = $02; // Symbol Counter Frame Timestamp Register LL-Byte
  1058. SCTSRLL3 = $03; // Symbol Counter Frame Timestamp Register LL-Byte
  1059. SCTSRLL4 = $04; // Symbol Counter Frame Timestamp Register LL-Byte
  1060. SCTSRLL5 = $05; // Symbol Counter Frame Timestamp Register LL-Byte
  1061. SCTSRLL6 = $06; // Symbol Counter Frame Timestamp Register LL-Byte
  1062. SCTSRLL7 = $07; // Symbol Counter Frame Timestamp Register LL-Byte
  1063. // Symbol Counter Frame Timestamp Register LH-Byte
  1064. SCTSRLH0 = $00; // Symbol Counter Frame Timestamp Register LH-Byte
  1065. SCTSRLH1 = $01; // Symbol Counter Frame Timestamp Register LH-Byte
  1066. SCTSRLH2 = $02; // Symbol Counter Frame Timestamp Register LH-Byte
  1067. SCTSRLH3 = $03; // Symbol Counter Frame Timestamp Register LH-Byte
  1068. SCTSRLH4 = $04; // Symbol Counter Frame Timestamp Register LH-Byte
  1069. SCTSRLH5 = $05; // Symbol Counter Frame Timestamp Register LH-Byte
  1070. SCTSRLH6 = $06; // Symbol Counter Frame Timestamp Register LH-Byte
  1071. SCTSRLH7 = $07; // Symbol Counter Frame Timestamp Register LH-Byte
  1072. // Symbol Counter Frame Timestamp Register HL-Byte
  1073. SCTSRHL0 = $00; // Symbol Counter Frame Timestamp Register HL-Byte
  1074. SCTSRHL1 = $01; // Symbol Counter Frame Timestamp Register HL-Byte
  1075. SCTSRHL2 = $02; // Symbol Counter Frame Timestamp Register HL-Byte
  1076. SCTSRHL3 = $03; // Symbol Counter Frame Timestamp Register HL-Byte
  1077. SCTSRHL4 = $04; // Symbol Counter Frame Timestamp Register HL-Byte
  1078. SCTSRHL5 = $05; // Symbol Counter Frame Timestamp Register HL-Byte
  1079. SCTSRHL6 = $06; // Symbol Counter Frame Timestamp Register HL-Byte
  1080. SCTSRHL7 = $07; // Symbol Counter Frame Timestamp Register HL-Byte
  1081. // Symbol Counter Frame Timestamp Register HH-Byte
  1082. SCTSRHH0 = $00; // Symbol Counter Frame Timestamp Register HH-Byte
  1083. SCTSRHH1 = $01; // Symbol Counter Frame Timestamp Register HH-Byte
  1084. SCTSRHH2 = $02; // Symbol Counter Frame Timestamp Register HH-Byte
  1085. SCTSRHH3 = $03; // Symbol Counter Frame Timestamp Register HH-Byte
  1086. SCTSRHH4 = $04; // Symbol Counter Frame Timestamp Register HH-Byte
  1087. SCTSRHH5 = $05; // Symbol Counter Frame Timestamp Register HH-Byte
  1088. SCTSRHH6 = $06; // Symbol Counter Frame Timestamp Register HH-Byte
  1089. SCTSRHH7 = $07; // Symbol Counter Frame Timestamp Register HH-Byte
  1090. // Symbol Counter Output Compare Register 3 LL-Byte
  1091. SCOCR3LL0 = $00; // Symbol Counter Output Compare Register 3 LL-Byte
  1092. SCOCR3LL1 = $01; // Symbol Counter Output Compare Register 3 LL-Byte
  1093. SCOCR3LL2 = $02; // Symbol Counter Output Compare Register 3 LL-Byte
  1094. SCOCR3LL3 = $03; // Symbol Counter Output Compare Register 3 LL-Byte
  1095. SCOCR3LL4 = $04; // Symbol Counter Output Compare Register 3 LL-Byte
  1096. SCOCR3LL5 = $05; // Symbol Counter Output Compare Register 3 LL-Byte
  1097. SCOCR3LL6 = $06; // Symbol Counter Output Compare Register 3 LL-Byte
  1098. SCOCR3LL7 = $07; // Symbol Counter Output Compare Register 3 LL-Byte
  1099. // Symbol Counter Output Compare Register 3 LH-Byte
  1100. SCOCR3LH0 = $00; // Symbol Counter Output Compare Register 3 LH-Byte
  1101. SCOCR3LH1 = $01; // Symbol Counter Output Compare Register 3 LH-Byte
  1102. SCOCR3LH2 = $02; // Symbol Counter Output Compare Register 3 LH-Byte
  1103. SCOCR3LH3 = $03; // Symbol Counter Output Compare Register 3 LH-Byte
  1104. SCOCR3LH4 = $04; // Symbol Counter Output Compare Register 3 LH-Byte
  1105. SCOCR3LH5 = $05; // Symbol Counter Output Compare Register 3 LH-Byte
  1106. SCOCR3LH6 = $06; // Symbol Counter Output Compare Register 3 LH-Byte
  1107. SCOCR3LH7 = $07; // Symbol Counter Output Compare Register 3 LH-Byte
  1108. // Symbol Counter Output Compare Register 3 HL-Byte
  1109. SCOCR3HL0 = $00; // Symbol Counter Output Compare Register 3 HL-Byte
  1110. SCOCR3HL1 = $01; // Symbol Counter Output Compare Register 3 HL-Byte
  1111. SCOCR3HL2 = $02; // Symbol Counter Output Compare Register 3 HL-Byte
  1112. SCOCR3HL3 = $03; // Symbol Counter Output Compare Register 3 HL-Byte
  1113. SCOCR3HL4 = $04; // Symbol Counter Output Compare Register 3 HL-Byte
  1114. SCOCR3HL5 = $05; // Symbol Counter Output Compare Register 3 HL-Byte
  1115. SCOCR3HL6 = $06; // Symbol Counter Output Compare Register 3 HL-Byte
  1116. SCOCR3HL7 = $07; // Symbol Counter Output Compare Register 3 HL-Byte
  1117. // Symbol Counter Output Compare Register 3 HH-Byte
  1118. SCOCR3HH0 = $00; // Symbol Counter Output Compare Register 3 HH-Byte
  1119. SCOCR3HH1 = $01; // Symbol Counter Output Compare Register 3 HH-Byte
  1120. SCOCR3HH2 = $02; // Symbol Counter Output Compare Register 3 HH-Byte
  1121. SCOCR3HH3 = $03; // Symbol Counter Output Compare Register 3 HH-Byte
  1122. SCOCR3HH4 = $04; // Symbol Counter Output Compare Register 3 HH-Byte
  1123. SCOCR3HH5 = $05; // Symbol Counter Output Compare Register 3 HH-Byte
  1124. SCOCR3HH6 = $06; // Symbol Counter Output Compare Register 3 HH-Byte
  1125. SCOCR3HH7 = $07; // Symbol Counter Output Compare Register 3 HH-Byte
  1126. // Symbol Counter Output Compare Register 2 LL-Byte
  1127. SCOCR2LL0 = $00; // Symbol Counter Output Compare Register 2 LL-Byte
  1128. SCOCR2LL1 = $01; // Symbol Counter Output Compare Register 2 LL-Byte
  1129. SCOCR2LL2 = $02; // Symbol Counter Output Compare Register 2 LL-Byte
  1130. SCOCR2LL3 = $03; // Symbol Counter Output Compare Register 2 LL-Byte
  1131. SCOCR2LL4 = $04; // Symbol Counter Output Compare Register 2 LL-Byte
  1132. SCOCR2LL5 = $05; // Symbol Counter Output Compare Register 2 LL-Byte
  1133. SCOCR2LL6 = $06; // Symbol Counter Output Compare Register 2 LL-Byte
  1134. SCOCR2LL7 = $07; // Symbol Counter Output Compare Register 2 LL-Byte
  1135. // Symbol Counter Output Compare Register 2 LH-Byte
  1136. SCOCR2LH0 = $00; // Symbol Counter Output Compare Register 2 LH-Byte
  1137. SCOCR2LH1 = $01; // Symbol Counter Output Compare Register 2 LH-Byte
  1138. SCOCR2LH2 = $02; // Symbol Counter Output Compare Register 2 LH-Byte
  1139. SCOCR2LH3 = $03; // Symbol Counter Output Compare Register 2 LH-Byte
  1140. SCOCR2LH4 = $04; // Symbol Counter Output Compare Register 2 LH-Byte
  1141. SCOCR2LH5 = $05; // Symbol Counter Output Compare Register 2 LH-Byte
  1142. SCOCR2LH6 = $06; // Symbol Counter Output Compare Register 2 LH-Byte
  1143. SCOCR2LH7 = $07; // Symbol Counter Output Compare Register 2 LH-Byte
  1144. // Symbol Counter Output Compare Register 2 HL-Byte
  1145. SCOCR2HL0 = $00; // Symbol Counter Output Compare Register 2 HL-Byte
  1146. SCOCR2HL1 = $01; // Symbol Counter Output Compare Register 2 HL-Byte
  1147. SCOCR2HL2 = $02; // Symbol Counter Output Compare Register 2 HL-Byte
  1148. SCOCR2HL3 = $03; // Symbol Counter Output Compare Register 2 HL-Byte
  1149. SCOCR2HL4 = $04; // Symbol Counter Output Compare Register 2 HL-Byte
  1150. SCOCR2HL5 = $05; // Symbol Counter Output Compare Register 2 HL-Byte
  1151. SCOCR2HL6 = $06; // Symbol Counter Output Compare Register 2 HL-Byte
  1152. SCOCR2HL7 = $07; // Symbol Counter Output Compare Register 2 HL-Byte
  1153. // Symbol Counter Output Compare Register 2 HH-Byte
  1154. SCOCR2HH0 = $00; // Symbol Counter Output Compare Register 2 HH-Byte
  1155. SCOCR2HH1 = $01; // Symbol Counter Output Compare Register 2 HH-Byte
  1156. SCOCR2HH2 = $02; // Symbol Counter Output Compare Register 2 HH-Byte
  1157. SCOCR2HH3 = $03; // Symbol Counter Output Compare Register 2 HH-Byte
  1158. SCOCR2HH4 = $04; // Symbol Counter Output Compare Register 2 HH-Byte
  1159. SCOCR2HH5 = $05; // Symbol Counter Output Compare Register 2 HH-Byte
  1160. SCOCR2HH6 = $06; // Symbol Counter Output Compare Register 2 HH-Byte
  1161. SCOCR2HH7 = $07; // Symbol Counter Output Compare Register 2 HH-Byte
  1162. // Symbol Counter Output Compare Register 1 LL-Byte
  1163. SCOCR1LL0 = $00; // Symbol Counter Output Compare Register 1 LL-Byte
  1164. SCOCR1LL1 = $01; // Symbol Counter Output Compare Register 1 LL-Byte
  1165. SCOCR1LL2 = $02; // Symbol Counter Output Compare Register 1 LL-Byte
  1166. SCOCR1LL3 = $03; // Symbol Counter Output Compare Register 1 LL-Byte
  1167. SCOCR1LL4 = $04; // Symbol Counter Output Compare Register 1 LL-Byte
  1168. SCOCR1LL5 = $05; // Symbol Counter Output Compare Register 1 LL-Byte
  1169. SCOCR1LL6 = $06; // Symbol Counter Output Compare Register 1 LL-Byte
  1170. SCOCR1LL7 = $07; // Symbol Counter Output Compare Register 1 LL-Byte
  1171. // Symbol Counter Output Compare Register 1 LH-Byte
  1172. SCOCR1LH0 = $00; // Symbol Counter Output Compare Register 1 LH-Byte
  1173. SCOCR1LH1 = $01; // Symbol Counter Output Compare Register 1 LH-Byte
  1174. SCOCR1LH2 = $02; // Symbol Counter Output Compare Register 1 LH-Byte
  1175. SCOCR1LH3 = $03; // Symbol Counter Output Compare Register 1 LH-Byte
  1176. SCOCR1LH4 = $04; // Symbol Counter Output Compare Register 1 LH-Byte
  1177. SCOCR1LH5 = $05; // Symbol Counter Output Compare Register 1 LH-Byte
  1178. SCOCR1LH6 = $06; // Symbol Counter Output Compare Register 1 LH-Byte
  1179. SCOCR1LH7 = $07; // Symbol Counter Output Compare Register 1 LH-Byte
  1180. // Symbol Counter Output Compare Register 1 HL-Byte
  1181. SCOCR1HL0 = $00; // Symbol Counter Output Compare Register 1 HL-Byte
  1182. SCOCR1HL1 = $01; // Symbol Counter Output Compare Register 1 HL-Byte
  1183. SCOCR1HL2 = $02; // Symbol Counter Output Compare Register 1 HL-Byte
  1184. SCOCR1HL3 = $03; // Symbol Counter Output Compare Register 1 HL-Byte
  1185. SCOCR1HL4 = $04; // Symbol Counter Output Compare Register 1 HL-Byte
  1186. SCOCR1HL5 = $05; // Symbol Counter Output Compare Register 1 HL-Byte
  1187. SCOCR1HL6 = $06; // Symbol Counter Output Compare Register 1 HL-Byte
  1188. SCOCR1HL7 = $07; // Symbol Counter Output Compare Register 1 HL-Byte
  1189. // Symbol Counter Output Compare Register 1 HH-Byte
  1190. SCOCR1HH0 = $00; // Symbol Counter Output Compare Register 1 HH-Byte
  1191. SCOCR1HH1 = $01; // Symbol Counter Output Compare Register 1 HH-Byte
  1192. SCOCR1HH2 = $02; // Symbol Counter Output Compare Register 1 HH-Byte
  1193. SCOCR1HH3 = $03; // Symbol Counter Output Compare Register 1 HH-Byte
  1194. SCOCR1HH4 = $04; // Symbol Counter Output Compare Register 1 HH-Byte
  1195. SCOCR1HH5 = $05; // Symbol Counter Output Compare Register 1 HH-Byte
  1196. SCOCR1HH6 = $06; // Symbol Counter Output Compare Register 1 HH-Byte
  1197. SCOCR1HH7 = $07; // Symbol Counter Output Compare Register 1 HH-Byte
  1198. // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1199. SCTSTRLL0 = $00; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1200. SCTSTRLL1 = $01; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1201. SCTSTRLL2 = $02; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1202. SCTSTRLL3 = $03; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1203. SCTSTRLL4 = $04; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1204. SCTSTRLL5 = $05; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1205. SCTSTRLL6 = $06; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1206. SCTSTRLL7 = $07; // Symbol Counter Transmit Frame Timestamp Register LL-Byte
  1207. // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1208. SCTSTRLH0 = $00; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1209. SCTSTRLH1 = $01; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1210. SCTSTRLH2 = $02; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1211. SCTSTRLH3 = $03; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1212. SCTSTRLH4 = $04; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1213. SCTSTRLH5 = $05; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1214. SCTSTRLH6 = $06; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1215. SCTSTRLH7 = $07; // Symbol Counter Transmit Frame Timestamp Register LH-Byte
  1216. // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1217. SCTSTRHL0 = $00; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1218. SCTSTRHL1 = $01; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1219. SCTSTRHL2 = $02; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1220. SCTSTRHL3 = $03; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1221. SCTSTRHL4 = $04; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1222. SCTSTRHL5 = $05; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1223. SCTSTRHL6 = $06; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1224. SCTSTRHL7 = $07; // Symbol Counter Transmit Frame Timestamp Register HL-Byte
  1225. // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1226. SCTSTRHH0 = $00; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1227. SCTSTRHH1 = $01; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1228. SCTSTRHH2 = $02; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1229. SCTSTRHH3 = $03; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1230. SCTSTRHH4 = $04; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1231. SCTSTRHH5 = $05; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1232. SCTSTRHH6 = $06; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1233. SCTSTRHH7 = $07; // Symbol Counter Transmit Frame Timestamp Register HH-Byte
  1234. // Multiple Address Filter Configuration Register 0
  1235. MAF0EN = $00;
  1236. MAF1EN = $01;
  1237. MAF2EN = $02;
  1238. MAF3EN = $03;
  1239. // Multiple Address Filter Configuration Register 1
  1240. AACK_0_I_AM_COORD = $00;
  1241. AACK_0_SET_PD = $01;
  1242. AACK_1_I_AM_COORD = $02;
  1243. AACK_1_SET_PD = $03;
  1244. AACK_2_I_AM_COORD = $04;
  1245. AACK_2_SET_PD = $05;
  1246. AACK_3_I_AM_COORD = $06;
  1247. AACK_3_SET_PD = $07;
  1248. // Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)
  1249. MAFSA0L0 = $00; // MAC Short Address low Byte for Frame Filter 0
  1250. MAFSA0L1 = $01; // MAC Short Address low Byte for Frame Filter 0
  1251. MAFSA0L2 = $02; // MAC Short Address low Byte for Frame Filter 0
  1252. MAFSA0L3 = $03; // MAC Short Address low Byte for Frame Filter 0
  1253. MAFSA0L4 = $04; // MAC Short Address low Byte for Frame Filter 0
  1254. MAFSA0L5 = $05; // MAC Short Address low Byte for Frame Filter 0
  1255. MAFSA0L6 = $06; // MAC Short Address low Byte for Frame Filter 0
  1256. MAFSA0L7 = $07; // MAC Short Address low Byte for Frame Filter 0
  1257. // Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)
  1258. MAFSA0H0 = $00; // MAC Short Address high Byte for Frame Filter 0
  1259. MAFSA0H1 = $01; // MAC Short Address high Byte for Frame Filter 0
  1260. MAFSA0H2 = $02; // MAC Short Address high Byte for Frame Filter 0
  1261. MAFSA0H3 = $03; // MAC Short Address high Byte for Frame Filter 0
  1262. MAFSA0H4 = $04; // MAC Short Address high Byte for Frame Filter 0
  1263. MAFSA0H5 = $05; // MAC Short Address high Byte for Frame Filter 0
  1264. MAFSA0H6 = $06; // MAC Short Address high Byte for Frame Filter 0
  1265. MAFSA0H7 = $07; // MAC Short Address high Byte for Frame Filter 0
  1266. // Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)
  1267. MAFPA0L0 = $00; // MAC Personal Area Network ID low Byte for Frame Filter 0
  1268. MAFPA0L1 = $01; // MAC Personal Area Network ID low Byte for Frame Filter 0
  1269. MAFPA0L2 = $02; // MAC Personal Area Network ID low Byte for Frame Filter 0
  1270. MAFPA0L3 = $03; // MAC Personal Area Network ID low Byte for Frame Filter 0
  1271. MAFPA0L4 = $04; // MAC Personal Area Network ID low Byte for Frame Filter 0
  1272. MAFPA0L5 = $05; // MAC Personal Area Network ID low Byte for Frame Filter 0
  1273. MAFPA0L6 = $06; // MAC Personal Area Network ID low Byte for Frame Filter 0
  1274. MAFPA0L7 = $07; // MAC Personal Area Network ID low Byte for Frame Filter 0
  1275. // Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)
  1276. MAFPA0H0 = $00; // MAC Personal Area Network ID high Byte for Frame Filter 0
  1277. MAFPA0H1 = $01; // MAC Personal Area Network ID high Byte for Frame Filter 0
  1278. MAFPA0H2 = $02; // MAC Personal Area Network ID high Byte for Frame Filter 0
  1279. MAFPA0H3 = $03; // MAC Personal Area Network ID high Byte for Frame Filter 0
  1280. MAFPA0H4 = $04; // MAC Personal Area Network ID high Byte for Frame Filter 0
  1281. MAFPA0H5 = $05; // MAC Personal Area Network ID high Byte for Frame Filter 0
  1282. MAFPA0H6 = $06; // MAC Personal Area Network ID high Byte for Frame Filter 0
  1283. MAFPA0H7 = $07; // MAC Personal Area Network ID high Byte for Frame Filter 0
  1284. // Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)
  1285. MAFSA1L0 = $00; // MAC Short Address low Byte for Frame Filter 1
  1286. MAFSA1L1 = $01; // MAC Short Address low Byte for Frame Filter 1
  1287. MAFSA1L2 = $02; // MAC Short Address low Byte for Frame Filter 1
  1288. MAFSA1L3 = $03; // MAC Short Address low Byte for Frame Filter 1
  1289. MAFSA1L4 = $04; // MAC Short Address low Byte for Frame Filter 1
  1290. MAFSA1L5 = $05; // MAC Short Address low Byte for Frame Filter 1
  1291. MAFSA1L6 = $06; // MAC Short Address low Byte for Frame Filter 1
  1292. MAFSA1L7 = $07; // MAC Short Address low Byte for Frame Filter 1
  1293. // Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)
  1294. MAFSA1H0 = $00; // MAC Short Address high Byte for Frame Filter 1
  1295. MAFSA1H1 = $01; // MAC Short Address high Byte for Frame Filter 1
  1296. MAFSA1H2 = $02; // MAC Short Address high Byte for Frame Filter 1
  1297. MAFSA1H3 = $03; // MAC Short Address high Byte for Frame Filter 1
  1298. MAFSA1H4 = $04; // MAC Short Address high Byte for Frame Filter 1
  1299. MAFSA1H5 = $05; // MAC Short Address high Byte for Frame Filter 1
  1300. MAFSA1H6 = $06; // MAC Short Address high Byte for Frame Filter 1
  1301. MAFSA1H7 = $07; // MAC Short Address high Byte for Frame Filter 1
  1302. // Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)
  1303. MAFPA1L0 = $00; // MAC Personal Area Network ID low Byte for Frame Filter 1
  1304. MAFPA1L1 = $01; // MAC Personal Area Network ID low Byte for Frame Filter 1
  1305. MAFPA1L2 = $02; // MAC Personal Area Network ID low Byte for Frame Filter 1
  1306. MAFPA1L3 = $03; // MAC Personal Area Network ID low Byte for Frame Filter 1
  1307. MAFPA1L4 = $04; // MAC Personal Area Network ID low Byte for Frame Filter 1
  1308. MAFPA1L5 = $05; // MAC Personal Area Network ID low Byte for Frame Filter 1
  1309. MAFPA1L6 = $06; // MAC Personal Area Network ID low Byte for Frame Filter 1
  1310. MAFPA1L7 = $07; // MAC Personal Area Network ID low Byte for Frame Filter 1
  1311. // Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)
  1312. MAFPA1H0 = $00; // MAC Personal Area Network ID high Byte for Frame Filter 1
  1313. MAFPA1H1 = $01; // MAC Personal Area Network ID high Byte for Frame Filter 1
  1314. MAFPA1H2 = $02; // MAC Personal Area Network ID high Byte for Frame Filter 1
  1315. MAFPA1H3 = $03; // MAC Personal Area Network ID high Byte for Frame Filter 1
  1316. MAFPA1H4 = $04; // MAC Personal Area Network ID high Byte for Frame Filter 1
  1317. MAFPA1H5 = $05; // MAC Personal Area Network ID high Byte for Frame Filter 1
  1318. MAFPA1H6 = $06; // MAC Personal Area Network ID high Byte for Frame Filter 1
  1319. MAFPA1H7 = $07; // MAC Personal Area Network ID high Byte for Frame Filter 1
  1320. // Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)
  1321. MAFSA2L0 = $00; // MAC Short Address low Byte for Frame Filter 2
  1322. MAFSA2L1 = $01; // MAC Short Address low Byte for Frame Filter 2
  1323. MAFSA2L2 = $02; // MAC Short Address low Byte for Frame Filter 2
  1324. MAFSA2L3 = $03; // MAC Short Address low Byte for Frame Filter 2
  1325. MAFSA2L4 = $04; // MAC Short Address low Byte for Frame Filter 2
  1326. MAFSA2L5 = $05; // MAC Short Address low Byte for Frame Filter 2
  1327. MAFSA2L6 = $06; // MAC Short Address low Byte for Frame Filter 2
  1328. MAFSA2L7 = $07; // MAC Short Address low Byte for Frame Filter 2
  1329. // Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)
  1330. MAFSA2H0 = $00; // MAC Short Address high Byte for Frame Filter 2
  1331. MAFSA2H1 = $01; // MAC Short Address high Byte for Frame Filter 2
  1332. MAFSA2H2 = $02; // MAC Short Address high Byte for Frame Filter 2
  1333. MAFSA2H3 = $03; // MAC Short Address high Byte for Frame Filter 2
  1334. MAFSA2H4 = $04; // MAC Short Address high Byte for Frame Filter 2
  1335. MAFSA2H5 = $05; // MAC Short Address high Byte for Frame Filter 2
  1336. MAFSA2H6 = $06; // MAC Short Address high Byte for Frame Filter 2
  1337. MAFSA2H7 = $07; // MAC Short Address high Byte for Frame Filter 2
  1338. // Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)
  1339. MAFPA2L0 = $00; // MAC Personal Area Network ID low Byte for Frame Filter 2
  1340. MAFPA2L1 = $01; // MAC Personal Area Network ID low Byte for Frame Filter 2
  1341. MAFPA2L2 = $02; // MAC Personal Area Network ID low Byte for Frame Filter 2
  1342. MAFPA2L3 = $03; // MAC Personal Area Network ID low Byte for Frame Filter 2
  1343. MAFPA2L4 = $04; // MAC Personal Area Network ID low Byte for Frame Filter 2
  1344. MAFPA2L5 = $05; // MAC Personal Area Network ID low Byte for Frame Filter 2
  1345. MAFPA2L6 = $06; // MAC Personal Area Network ID low Byte for Frame Filter 2
  1346. MAFPA2L7 = $07; // MAC Personal Area Network ID low Byte for Frame Filter 2
  1347. // Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)
  1348. MAFPA2H0 = $00; // MAC Personal Area Network ID high Byte for Frame Filter 2
  1349. MAFPA2H1 = $01; // MAC Personal Area Network ID high Byte for Frame Filter 2
  1350. MAFPA2H2 = $02; // MAC Personal Area Network ID high Byte for Frame Filter 2
  1351. MAFPA2H3 = $03; // MAC Personal Area Network ID high Byte for Frame Filter 2
  1352. MAFPA2H4 = $04; // MAC Personal Area Network ID high Byte for Frame Filter 2
  1353. MAFPA2H5 = $05; // MAC Personal Area Network ID high Byte for Frame Filter 2
  1354. MAFPA2H6 = $06; // MAC Personal Area Network ID high Byte for Frame Filter 2
  1355. MAFPA2H7 = $07; // MAC Personal Area Network ID high Byte for Frame Filter 2
  1356. // Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)
  1357. MAFSA3L0 = $00; // MAC Short Address low Byte for Frame Filter 3
  1358. MAFSA3L1 = $01; // MAC Short Address low Byte for Frame Filter 3
  1359. MAFSA3L2 = $02; // MAC Short Address low Byte for Frame Filter 3
  1360. MAFSA3L3 = $03; // MAC Short Address low Byte for Frame Filter 3
  1361. MAFSA3L4 = $04; // MAC Short Address low Byte for Frame Filter 3
  1362. MAFSA3L5 = $05; // MAC Short Address low Byte for Frame Filter 3
  1363. MAFSA3L6 = $06; // MAC Short Address low Byte for Frame Filter 3
  1364. MAFSA3L7 = $07; // MAC Short Address low Byte for Frame Filter 3
  1365. // Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)
  1366. MAFSA3H0 = $00; // MAC Short Address high Byte for Frame Filter 3
  1367. MAFSA3H1 = $01; // MAC Short Address high Byte for Frame Filter 3
  1368. MAFSA3H2 = $02; // MAC Short Address high Byte for Frame Filter 3
  1369. MAFSA3H3 = $03; // MAC Short Address high Byte for Frame Filter 3
  1370. MAFSA3H4 = $04; // MAC Short Address high Byte for Frame Filter 3
  1371. MAFSA3H5 = $05; // MAC Short Address high Byte for Frame Filter 3
  1372. MAFSA3H6 = $06; // MAC Short Address high Byte for Frame Filter 3
  1373. MAFSA3H7 = $07; // MAC Short Address high Byte for Frame Filter 3
  1374. // Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)
  1375. MAFPA3L0 = $00; // MAC Personal Area Network ID low Byte for Frame Filter 3
  1376. MAFPA3L1 = $01; // MAC Personal Area Network ID low Byte for Frame Filter 3
  1377. MAFPA3L2 = $02; // MAC Personal Area Network ID low Byte for Frame Filter 3
  1378. MAFPA3L3 = $03; // MAC Personal Area Network ID low Byte for Frame Filter 3
  1379. MAFPA3L4 = $04; // MAC Personal Area Network ID low Byte for Frame Filter 3
  1380. MAFPA3L5 = $05; // MAC Personal Area Network ID low Byte for Frame Filter 3
  1381. MAFPA3L6 = $06; // MAC Personal Area Network ID low Byte for Frame Filter 3
  1382. MAFPA3L7 = $07; // MAC Personal Area Network ID low Byte for Frame Filter 3
  1383. // Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)
  1384. MAFPA3H0 = $00; // MAC Personal Area Network ID high Byte for Frame Filter 3
  1385. MAFPA3H1 = $01; // MAC Personal Area Network ID high Byte for Frame Filter 3
  1386. MAFPA3H2 = $02; // MAC Personal Area Network ID high Byte for Frame Filter 3
  1387. MAFPA3H3 = $03; // MAC Personal Area Network ID high Byte for Frame Filter 3
  1388. MAFPA3H4 = $04; // MAC Personal Area Network ID high Byte for Frame Filter 3
  1389. MAFPA3H5 = $05; // MAC Personal Area Network ID high Byte for Frame Filter 3
  1390. MAFPA3H6 = $06; // MAC Personal Area Network ID high Byte for Frame Filter 3
  1391. MAFPA3H7 = $07; // MAC Personal Area Network ID high Byte for Frame Filter 3
  1392. // Timer/Counter5 Control Register A
  1393. WGM50 = $00; // Waveform Generation Mode
  1394. WGM51 = $01; // Waveform Generation Mode
  1395. COM5C0 = $02; // Compare Output Mode for Channel C
  1396. COM5C1 = $03; // Compare Output Mode for Channel C
  1397. COM5B0 = $04; // Compare Output Mode for Channel B
  1398. COM5B1 = $05; // Compare Output Mode for Channel B
  1399. COM5A0 = $06; // Compare Output Mode for Channel A
  1400. COM5A1 = $07; // Compare Output Mode for Channel A
  1401. // Timer/Counter5 Control Register B
  1402. CS50 = $00; // Clock Select
  1403. CS51 = $01; // Clock Select
  1404. CS52 = $02; // Clock Select
  1405. ICES5 = $06;
  1406. ICNC5 = $07;
  1407. // Timer/Counter5 Control Register C
  1408. FOC5C = $05;
  1409. FOC5B = $06;
  1410. FOC5A = $07;
  1411. // Low Leakage Voltage Regulator Control Register
  1412. LLENCAL = $00;
  1413. LLSHORT = $01;
  1414. LLTCO = $02;
  1415. LLCAL = $03;
  1416. LLCOMP = $04;
  1417. LLDONE = $05;
  1418. // Low Leakage Voltage Regulator Data Register (Low-Byte)
  1419. LLDRL0 = $00; // Low-Byte Data Register Bits
  1420. LLDRL1 = $01; // Low-Byte Data Register Bits
  1421. LLDRL2 = $02; // Low-Byte Data Register Bits
  1422. LLDRL3 = $03; // Low-Byte Data Register Bits
  1423. // Low Leakage Voltage Regulator Data Register (High-Byte)
  1424. LLDRH0 = $00; // High-Byte Data Register Bits
  1425. LLDRH1 = $01; // High-Byte Data Register Bits
  1426. LLDRH2 = $02; // High-Byte Data Register Bits
  1427. LLDRH3 = $03; // High-Byte Data Register Bits
  1428. LLDRH4 = $04; // High-Byte Data Register Bits
  1429. // Data Retention Configuration Register #0
  1430. ENDRT = $04;
  1431. DRTSWOK = $05;
  1432. // Port Driver Strength Register 0
  1433. PBDRV0 = $00; // Driver Strength Port B
  1434. PBDRV1 = $01; // Driver Strength Port B
  1435. PDDRV0 = $02; // Driver Strength Port D
  1436. PDDRV1 = $03; // Driver Strength Port D
  1437. PEDRV0 = $04; // Driver Strength Port E
  1438. PEDRV1 = $05; // Driver Strength Port E
  1439. PFDRV0 = $06; // Driver Strength Port F
  1440. PFDRV1 = $07; // Driver Strength Port F
  1441. // Port Driver Strength Register 1
  1442. PGDRV0 = $00; // Driver Strength Port G
  1443. PGDRV1 = $01; // Driver Strength Port G
  1444. // Power Amplifier Ramp up/down Control Register
  1445. PARUFI = $00;
  1446. PARDFI = $01;
  1447. PALTU0 = $02; // ext. PA Ramp Up Lead Time
  1448. PALTU1 = $03; // ext. PA Ramp Up Lead Time
  1449. PALTU2 = $04; // ext. PA Ramp Up Lead Time
  1450. PALTD0 = $05; // ext. PA Ramp Down Lead Time
  1451. PALTD1 = $06; // ext. PA Ramp Down Lead Time
  1452. PALTD2 = $07; // ext. PA Ramp Down Lead Time
  1453. // Transceiver Pin Register
  1454. TRXRST = $00;
  1455. SLPTR = $01;
  1456. // AES Control Register
  1457. AES_IM = $02;
  1458. AES_DIR = $03;
  1459. AES_MODE = $05;
  1460. AES_REQUEST = $07;
  1461. // AES Status Register
  1462. AES_DONE = $00;
  1463. AES_ER = $07;
  1464. // AES Plain and Cipher Text Buffer Register
  1465. AES_STATE0 = $00; // AES Plain and Cipher Text Buffer
  1466. AES_STATE1 = $01; // AES Plain and Cipher Text Buffer
  1467. AES_STATE2 = $02; // AES Plain and Cipher Text Buffer
  1468. AES_STATE3 = $03; // AES Plain and Cipher Text Buffer
  1469. AES_STATE4 = $04; // AES Plain and Cipher Text Buffer
  1470. AES_STATE5 = $05; // AES Plain and Cipher Text Buffer
  1471. AES_STATE6 = $06; // AES Plain and Cipher Text Buffer
  1472. AES_STATE7 = $07; // AES Plain and Cipher Text Buffer
  1473. // AES Encryption and Decryption Key Buffer Register
  1474. AES_KEY0 = $00; // AES Encryption/Decryption Key Buffer
  1475. AES_KEY1 = $01; // AES Encryption/Decryption Key Buffer
  1476. AES_KEY2 = $02; // AES Encryption/Decryption Key Buffer
  1477. AES_KEY3 = $03; // AES Encryption/Decryption Key Buffer
  1478. AES_KEY4 = $04; // AES Encryption/Decryption Key Buffer
  1479. AES_KEY5 = $05; // AES Encryption/Decryption Key Buffer
  1480. AES_KEY6 = $06; // AES Encryption/Decryption Key Buffer
  1481. AES_KEY7 = $07; // AES Encryption/Decryption Key Buffer
  1482. // Transceiver Status Register
  1483. TRX_STATUS0 = $00; // Transceiver Main Status
  1484. TRX_STATUS1 = $01; // Transceiver Main Status
  1485. TRX_STATUS2 = $02; // Transceiver Main Status
  1486. TRX_STATUS3 = $03; // Transceiver Main Status
  1487. TRX_STATUS4 = $04; // Transceiver Main Status
  1488. TST_STATUS = $05;
  1489. CCA_STATUS = $06;
  1490. CCA_DONE = $07;
  1491. // Transceiver State Control Register
  1492. TRX_CMD0 = $00; // State Control Command
  1493. TRX_CMD1 = $01; // State Control Command
  1494. TRX_CMD2 = $02; // State Control Command
  1495. TRX_CMD3 = $03; // State Control Command
  1496. TRX_CMD4 = $04; // State Control Command
  1497. TRAC_STATUS0 = $05; // Transaction Status
  1498. TRAC_STATUS1 = $06; // Transaction Status
  1499. TRAC_STATUS2 = $07; // Transaction Status
  1500. // Reserved
  1501. PMU_IF_INV = $04;
  1502. PMU_START = $05;
  1503. PMU_EN = $06;
  1504. Res7 = $07;
  1505. // Transceiver Control Register 1
  1506. PLL_TX_FLT = $04;
  1507. TX_AUTO_CRC_ON = $05;
  1508. IRQ_2_EXT_EN = $06;
  1509. PA_EXT_EN = $07;
  1510. // Transceiver Transmit Power Control Register
  1511. TX_PWR0 = $00; // Transmit Power Setting
  1512. TX_PWR1 = $01; // Transmit Power Setting
  1513. TX_PWR2 = $02; // Transmit Power Setting
  1514. TX_PWR3 = $03; // Transmit Power Setting
  1515. // Receiver Signal Strength Indicator Register
  1516. RSSI0 = $00; // Receiver Signal Strength Indicator
  1517. RSSI1 = $01; // Receiver Signal Strength Indicator
  1518. RSSI2 = $02; // Receiver Signal Strength Indicator
  1519. RSSI3 = $03; // Receiver Signal Strength Indicator
  1520. RSSI4 = $04; // Receiver Signal Strength Indicator
  1521. RND_VALUE0 = $05; // Random Value
  1522. RND_VALUE1 = $06; // Random Value
  1523. RX_CRC_VALID = $07;
  1524. // Transceiver Energy Detection Level Register
  1525. ED_LEVEL0 = $00; // Energy Detection Level
  1526. ED_LEVEL1 = $01; // Energy Detection Level
  1527. ED_LEVEL2 = $02; // Energy Detection Level
  1528. ED_LEVEL3 = $03; // Energy Detection Level
  1529. ED_LEVEL4 = $04; // Energy Detection Level
  1530. ED_LEVEL5 = $05; // Energy Detection Level
  1531. ED_LEVEL6 = $06; // Energy Detection Level
  1532. ED_LEVEL7 = $07; // Energy Detection Level
  1533. // Transceiver Clear Channel Assessment (CCA) Control Register
  1534. CHANNEL0 = $00; // RX/TX Channel Selection
  1535. CHANNEL1 = $01; // RX/TX Channel Selection
  1536. CHANNEL2 = $02; // RX/TX Channel Selection
  1537. CHANNEL3 = $03; // RX/TX Channel Selection
  1538. CHANNEL4 = $04; // RX/TX Channel Selection
  1539. CCA_MODE0 = $05; // Select CCA Measurement Mode
  1540. CCA_MODE1 = $06; // Select CCA Measurement Mode
  1541. CCA_REQUEST = $07;
  1542. // Transceiver CCA Threshold Setting Register
  1543. CCA_ED_THRES0 = $00; // ED Threshold Level for CCA Measurement
  1544. CCA_ED_THRES1 = $01; // ED Threshold Level for CCA Measurement
  1545. CCA_ED_THRES2 = $02; // ED Threshold Level for CCA Measurement
  1546. CCA_ED_THRES3 = $03; // ED Threshold Level for CCA Measurement
  1547. CCA_CS_THRES0 = $04; // CS Threshold Level for CCA Measurement
  1548. CCA_CS_THRES1 = $05; // CS Threshold Level for CCA Measurement
  1549. CCA_CS_THRES2 = $06; // CS Threshold Level for CCA Measurement
  1550. CCA_CS_THRES3 = $07; // CS Threshold Level for CCA Measurement
  1551. // Transceiver Receive Control Register
  1552. PDT_THRES0 = $00; // Receiver Sensitivity Control
  1553. PDT_THRES1 = $01; // Receiver Sensitivity Control
  1554. PDT_THRES2 = $02; // Receiver Sensitivity Control
  1555. PDT_THRES3 = $03; // Receiver Sensitivity Control
  1556. // Start of Frame Delimiter Value Register
  1557. SFD_VALUE0 = $00; // Start of Frame Delimiter Value
  1558. SFD_VALUE1 = $01; // Start of Frame Delimiter Value
  1559. SFD_VALUE2 = $02; // Start of Frame Delimiter Value
  1560. SFD_VALUE3 = $03; // Start of Frame Delimiter Value
  1561. SFD_VALUE4 = $04; // Start of Frame Delimiter Value
  1562. SFD_VALUE5 = $05; // Start of Frame Delimiter Value
  1563. SFD_VALUE6 = $06; // Start of Frame Delimiter Value
  1564. SFD_VALUE7 = $07; // Start of Frame Delimiter Value
  1565. // Transceiver Control Register 2
  1566. OQPSK_DATA_RATE0 = $00; // Data Rate Selection
  1567. OQPSK_DATA_RATE1 = $01; // Data Rate Selection
  1568. RX_SAFE_MODE = $07;
  1569. // Antenna Diversity Control Register
  1570. ANT_CTRL0 = $00; // Static Antenna Diversity Switch Control
  1571. ANT_CTRL1 = $01; // Static Antenna Diversity Switch Control
  1572. ANT_EXT_SW_EN = $02;
  1573. ANT_DIV_EN = $03;
  1574. ANT_SEL = $07;
  1575. // Transceiver Interrupt Enable Register
  1576. PLL_LOCK_EN = $00;
  1577. PLL_UNLOCK_EN = $01;
  1578. RX_START_EN = $02;
  1579. RX_END_EN = $03;
  1580. CCA_ED_DONE_EN = $04;
  1581. AMI_EN = $05;
  1582. TX_END_EN = $06;
  1583. AWAKE_EN = $07;
  1584. // Transceiver Interrupt Status Register
  1585. PLL_LOCK = $00;
  1586. PLL_UNLOCK = $01;
  1587. RX_START = $02;
  1588. RX_END = $03;
  1589. CCA_ED_DONE = $04;
  1590. AMI = $05;
  1591. TX_END = $06;
  1592. AWAKE = $07;
  1593. // Voltage Regulator Control and Status Register
  1594. DVDD_OK = $02;
  1595. DVREG_EXT = $03;
  1596. AVDD_OK = $06;
  1597. AVREG_EXT = $07;
  1598. // Battery Monitor Control and Status Register
  1599. BATMON_VTH0 = $00; // Battery Monitor Threshold Voltage
  1600. BATMON_VTH1 = $01; // Battery Monitor Threshold Voltage
  1601. BATMON_VTH2 = $02; // Battery Monitor Threshold Voltage
  1602. BATMON_VTH3 = $03; // Battery Monitor Threshold Voltage
  1603. BATMON_HR = $04;
  1604. BATMON_OK = $05;
  1605. BAT_LOW_EN = $06;
  1606. BAT_LOW = $07;
  1607. // Crystal Oscillator Control Register
  1608. XTAL_TRIM0 = $00; // Crystal Oscillator Load Capacitance Trimming
  1609. XTAL_TRIM1 = $01; // Crystal Oscillator Load Capacitance Trimming
  1610. XTAL_TRIM2 = $02; // Crystal Oscillator Load Capacitance Trimming
  1611. XTAL_TRIM3 = $03; // Crystal Oscillator Load Capacitance Trimming
  1612. XTAL_MODE0 = $04; // Crystal Oscillator Operating Mode
  1613. XTAL_MODE1 = $05; // Crystal Oscillator Operating Mode
  1614. XTAL_MODE2 = $06; // Crystal Oscillator Operating Mode
  1615. XTAL_MODE3 = $07; // Crystal Oscillator Operating Mode
  1616. // Channel Control Register 0
  1617. CC_NUMBER0 = $00; // Channel Number
  1618. CC_NUMBER1 = $01; // Channel Number
  1619. CC_NUMBER2 = $02; // Channel Number
  1620. CC_NUMBER3 = $03; // Channel Number
  1621. CC_NUMBER4 = $04; // Channel Number
  1622. CC_NUMBER5 = $05; // Channel Number
  1623. CC_NUMBER6 = $06; // Channel Number
  1624. CC_NUMBER7 = $07; // Channel Number
  1625. // Channel Control Register 1
  1626. CC_BAND0 = $00; // Channel Band
  1627. CC_BAND1 = $01; // Channel Band
  1628. CC_BAND2 = $02; // Channel Band
  1629. CC_BAND3 = $03; // Channel Band
  1630. // Transceiver Receiver Sensitivity Control Register
  1631. RX_PDT_LEVEL0 = $00; // Reduce Receiver Sensitivity
  1632. RX_PDT_LEVEL1 = $01; // Reduce Receiver Sensitivity
  1633. RX_PDT_LEVEL2 = $02; // Reduce Receiver Sensitivity
  1634. RX_PDT_LEVEL3 = $03; // Reduce Receiver Sensitivity
  1635. RX_OVERRIDE = $06;
  1636. RX_PDT_DIS = $07;
  1637. // Transceiver Reduced Power Consumption Control
  1638. XAH_RPC_EN = $00;
  1639. IPAN_RPC_EN = $01;
  1640. Res0 = $02;
  1641. PLL_RPC_EN = $03;
  1642. PDT_RPC_EN = $04;
  1643. RX_RPC_EN = $05;
  1644. RX_RPC_CTRL0 = $06; // Smart Receiving Mode Timing
  1645. RX_RPC_CTRL1 = $07; // Smart Receiving Mode Timing
  1646. // Transceiver Acknowledgment Frame Control Register 1
  1647. AACK_PROM_MODE = $01;
  1648. AACK_ACK_TIME = $02;
  1649. AACK_UPLD_RES_FT = $04;
  1650. AACK_FLTR_RES_FT = $05;
  1651. // Transceiver Filter Tuning Control Register
  1652. FTN_START = $07;
  1653. // Transceiver Center Frequency Calibration Control Register
  1654. PLL_CF_START = $07;
  1655. // Transceiver Delay Cell Calibration Control Register
  1656. PLL_DCU_START = $07;
  1657. // Device Identification Register (Part Number)
  1658. PART_NUM0 = $00; // Part Number
  1659. PART_NUM1 = $01; // Part Number
  1660. PART_NUM2 = $02; // Part Number
  1661. PART_NUM3 = $03; // Part Number
  1662. PART_NUM4 = $04; // Part Number
  1663. PART_NUM5 = $05; // Part Number
  1664. PART_NUM6 = $06; // Part Number
  1665. PART_NUM7 = $07; // Part Number
  1666. // Device Identification Register (Version Number)
  1667. VERSION_NUM0 = $00; // Version Number
  1668. VERSION_NUM1 = $01; // Version Number
  1669. VERSION_NUM2 = $02; // Version Number
  1670. VERSION_NUM3 = $03; // Version Number
  1671. VERSION_NUM4 = $04; // Version Number
  1672. VERSION_NUM5 = $05; // Version Number
  1673. VERSION_NUM6 = $06; // Version Number
  1674. VERSION_NUM7 = $07; // Version Number
  1675. // Device Identification Register (Manufacture ID Low Byte)
  1676. MAN_ID_00 = $00;
  1677. MAN_ID_01 = $01;
  1678. MAN_ID_02 = $02;
  1679. MAN_ID_03 = $03;
  1680. MAN_ID_04 = $04;
  1681. MAN_ID_05 = $05;
  1682. MAN_ID_06 = $06;
  1683. MAN_ID_07 = $07;
  1684. // Device Identification Register (Manufacture ID High Byte)
  1685. MAN_ID_10 = $00; // Manufacturer ID (High Byte)
  1686. MAN_ID_11 = $01; // Manufacturer ID (High Byte)
  1687. MAN_ID_12 = $02; // Manufacturer ID (High Byte)
  1688. MAN_ID_13 = $03; // Manufacturer ID (High Byte)
  1689. MAN_ID_14 = $04; // Manufacturer ID (High Byte)
  1690. MAN_ID_15 = $05; // Manufacturer ID (High Byte)
  1691. MAN_ID_16 = $06; // Manufacturer ID (High Byte)
  1692. MAN_ID_17 = $07; // Manufacturer ID (High Byte)
  1693. // Transceiver MAC Short Address Register (Low Byte)
  1694. SHORT_ADDR_00 = $00;
  1695. SHORT_ADDR_01 = $01;
  1696. SHORT_ADDR_02 = $02;
  1697. SHORT_ADDR_03 = $03;
  1698. SHORT_ADDR_04 = $04;
  1699. SHORT_ADDR_05 = $05;
  1700. SHORT_ADDR_06 = $06;
  1701. SHORT_ADDR_07 = $07;
  1702. // Transceiver MAC Short Address Register (High Byte)
  1703. SHORT_ADDR_10 = $00; // MAC Short Address
  1704. SHORT_ADDR_11 = $01; // MAC Short Address
  1705. SHORT_ADDR_12 = $02; // MAC Short Address
  1706. SHORT_ADDR_13 = $03; // MAC Short Address
  1707. SHORT_ADDR_14 = $04; // MAC Short Address
  1708. SHORT_ADDR_15 = $05; // MAC Short Address
  1709. SHORT_ADDR_16 = $06; // MAC Short Address
  1710. SHORT_ADDR_17 = $07; // MAC Short Address
  1711. // Transceiver Personal Area Network ID Register (Low Byte)
  1712. PAN_ID_00 = $00;
  1713. PAN_ID_01 = $01;
  1714. PAN_ID_02 = $02;
  1715. PAN_ID_03 = $03;
  1716. PAN_ID_04 = $04;
  1717. PAN_ID_05 = $05;
  1718. PAN_ID_06 = $06;
  1719. PAN_ID_07 = $07;
  1720. // Transceiver Personal Area Network ID Register (High Byte)
  1721. PAN_ID_10 = $00; // MAC Personal Area Network ID
  1722. PAN_ID_11 = $01; // MAC Personal Area Network ID
  1723. PAN_ID_12 = $02; // MAC Personal Area Network ID
  1724. PAN_ID_13 = $03; // MAC Personal Area Network ID
  1725. PAN_ID_14 = $04; // MAC Personal Area Network ID
  1726. PAN_ID_15 = $05; // MAC Personal Area Network ID
  1727. PAN_ID_16 = $06; // MAC Personal Area Network ID
  1728. PAN_ID_17 = $07; // MAC Personal Area Network ID
  1729. // Transceiver MAC IEEE Address Register 0
  1730. IEEE_ADDR_00 = $00;
  1731. IEEE_ADDR_01 = $01;
  1732. IEEE_ADDR_02 = $02;
  1733. IEEE_ADDR_03 = $03;
  1734. IEEE_ADDR_04 = $04;
  1735. IEEE_ADDR_05 = $05;
  1736. IEEE_ADDR_06 = $06;
  1737. IEEE_ADDR_07 = $07;
  1738. // Transceiver MAC IEEE Address Register 1
  1739. IEEE_ADDR_10 = $00; // MAC IEEE Address
  1740. IEEE_ADDR_11 = $01; // MAC IEEE Address
  1741. IEEE_ADDR_12 = $02; // MAC IEEE Address
  1742. IEEE_ADDR_13 = $03; // MAC IEEE Address
  1743. IEEE_ADDR_14 = $04; // MAC IEEE Address
  1744. IEEE_ADDR_15 = $05; // MAC IEEE Address
  1745. IEEE_ADDR_16 = $06; // MAC IEEE Address
  1746. IEEE_ADDR_17 = $07; // MAC IEEE Address
  1747. // Transceiver Extended Operating Mode Control Register
  1748. SLOTTED_OPERATION = $00;
  1749. MAX_CSMA_RETRIES0 = $01; // Maximum Number of CSMA-CA Procedure Repetition Attempts
  1750. MAX_CSMA_RETRIES1 = $02; // Maximum Number of CSMA-CA Procedure Repetition Attempts
  1751. MAX_CSMA_RETRIES2 = $03; // Maximum Number of CSMA-CA Procedure Repetition Attempts
  1752. MAX_FRAME_RETRIES0 = $04; // Maximum Number of Frame Re-transmission Attempts
  1753. MAX_FRAME_RETRIES1 = $05; // Maximum Number of Frame Re-transmission Attempts
  1754. MAX_FRAME_RETRIES2 = $06; // Maximum Number of Frame Re-transmission Attempts
  1755. MAX_FRAME_RETRIES3 = $07; // Maximum Number of Frame Re-transmission Attempts
  1756. // Transceiver CSMA-CA Random Number Generator Seed Register
  1757. CSMA_SEED_00 = $00;
  1758. CSMA_SEED_01 = $01;
  1759. CSMA_SEED_02 = $02;
  1760. CSMA_SEED_03 = $03;
  1761. CSMA_SEED_04 = $04;
  1762. CSMA_SEED_05 = $05;
  1763. CSMA_SEED_06 = $06;
  1764. CSMA_SEED_07 = $07;
  1765. // Transceiver Acknowledgment Frame Control Register 2
  1766. CSMA_SEED_10 = $00; // Seed Value for CSMA Random Number Generator
  1767. CSMA_SEED_11 = $01; // Seed Value for CSMA Random Number Generator
  1768. CSMA_SEED_12 = $02; // Seed Value for CSMA Random Number Generator
  1769. AACK_I_AM_COORD = $03;
  1770. AACK_DIS_ACK = $04;
  1771. AACK_SET_PD = $05;
  1772. AACK_FVN_MODE0 = $06; // Acknowledgment Frame Filter Mode
  1773. AACK_FVN_MODE1 = $07; // Acknowledgment Frame Filter Mode
  1774. // Transceiver CSMA-CA Back-off Exponent Control Register
  1775. MIN_BE0 = $00; // Minimum Back-off Exponent
  1776. MIN_BE1 = $01; // Minimum Back-off Exponent
  1777. MIN_BE2 = $02; // Minimum Back-off Exponent
  1778. MIN_BE3 = $03; // Minimum Back-off Exponent
  1779. MAX_BE0 = $04; // Maximum Back-off Exponent
  1780. MAX_BE1 = $05; // Maximum Back-off Exponent
  1781. MAX_BE2 = $06; // Maximum Back-off Exponent
  1782. MAX_BE3 = $07; // Maximum Back-off Exponent
  1783. // Transceiver Digital Test Control Register
  1784. TST_CTRL_DIG0 = $00; // Digital Test Controller Register
  1785. TST_CTRL_DIG1 = $01; // Digital Test Controller Register
  1786. TST_CTRL_DIG2 = $02; // Digital Test Controller Register
  1787. TST_CTRL_DIG3 = $03; // Digital Test Controller Register
  1788. // Transceiver Received Frame Length Register
  1789. RX_LENGTH0 = $00; // Received Frame Length
  1790. RX_LENGTH1 = $01; // Received Frame Length
  1791. RX_LENGTH2 = $02; // Received Frame Length
  1792. RX_LENGTH3 = $03; // Received Frame Length
  1793. RX_LENGTH4 = $04; // Received Frame Length
  1794. RX_LENGTH5 = $05; // Received Frame Length
  1795. RX_LENGTH6 = $06; // Received Frame Length
  1796. RX_LENGTH7 = $07; // Received Frame Length
  1797. implementation
  1798. {$i avrcommon.inc}
  1799. procedure INT0_ISR; external name 'INT0_ISR'; // Interrupt 1 External Interrupt Request 0
  1800. procedure INT1_ISR; external name 'INT1_ISR'; // Interrupt 2 External Interrupt Request 1
  1801. procedure INT2_ISR; external name 'INT2_ISR'; // Interrupt 3 External Interrupt Request 2
  1802. procedure INT3_ISR; external name 'INT3_ISR'; // Interrupt 4 External Interrupt Request 3
  1803. procedure INT4_ISR; external name 'INT4_ISR'; // Interrupt 5 External Interrupt Request 4
  1804. procedure INT5_ISR; external name 'INT5_ISR'; // Interrupt 6 External Interrupt Request 5
  1805. procedure INT6_ISR; external name 'INT6_ISR'; // Interrupt 7 External Interrupt Request 6
  1806. procedure INT7_ISR; external name 'INT7_ISR'; // Interrupt 8 External Interrupt Request 7
  1807. procedure PCINT0_ISR; external name 'PCINT0_ISR'; // Interrupt 9 Pin Change Interrupt Request 0
  1808. procedure PCINT1_ISR; external name 'PCINT1_ISR'; // Interrupt 10 Pin Change Interrupt Request 1
  1809. procedure PCINT2_ISR; external name 'PCINT2_ISR'; // Interrupt 11 Pin Change Interrupt Request 2
  1810. procedure WDT_ISR; external name 'WDT_ISR'; // Interrupt 12 Watchdog Time-out Interrupt
  1811. procedure TIMER2_COMPA_ISR; external name 'TIMER2_COMPA_ISR'; // Interrupt 13 Timer/Counter2 Compare Match A
  1812. procedure TIMER2_COMPB_ISR; external name 'TIMER2_COMPB_ISR'; // Interrupt 14 Timer/Counter2 Compare Match B
  1813. procedure TIMER2_OVF_ISR; external name 'TIMER2_OVF_ISR'; // Interrupt 15 Timer/Counter2 Overflow
  1814. procedure TIMER1_CAPT_ISR; external name 'TIMER1_CAPT_ISR'; // Interrupt 16 Timer/Counter1 Capture Event
  1815. procedure TIMER1_COMPA_ISR; external name 'TIMER1_COMPA_ISR'; // Interrupt 17 Timer/Counter1 Compare Match A
  1816. procedure TIMER1_COMPB_ISR; external name 'TIMER1_COMPB_ISR'; // Interrupt 18 Timer/Counter1 Compare Match B
  1817. procedure TIMER1_COMPC_ISR; external name 'TIMER1_COMPC_ISR'; // Interrupt 19 Timer/Counter1 Compare Match C
  1818. procedure TIMER1_OVF_ISR; external name 'TIMER1_OVF_ISR'; // Interrupt 20 Timer/Counter1 Overflow
  1819. procedure TIMER0_COMPA_ISR; external name 'TIMER0_COMPA_ISR'; // Interrupt 21 Timer/Counter0 Compare Match A
  1820. procedure TIMER0_COMPB_ISR; external name 'TIMER0_COMPB_ISR'; // Interrupt 22 Timer/Counter0 Compare Match B
  1821. procedure TIMER0_OVF_ISR; external name 'TIMER0_OVF_ISR'; // Interrupt 23 Timer/Counter0 Overflow
  1822. procedure SPI_STC_ISR; external name 'SPI_STC_ISR'; // Interrupt 24 SPI Serial Transfer Complete
  1823. procedure USART0_RX_ISR; external name 'USART0_RX_ISR'; // Interrupt 25 USART0, Rx Complete
  1824. procedure USART0_UDRE_ISR; external name 'USART0_UDRE_ISR'; // Interrupt 26 USART0 Data register Empty
  1825. procedure USART0_TX_ISR; external name 'USART0_TX_ISR'; // Interrupt 27 USART0, Tx Complete
  1826. procedure ANALOG_COMP_ISR; external name 'ANALOG_COMP_ISR'; // Interrupt 28 Analog Comparator
  1827. procedure ADC_ISR; external name 'ADC_ISR'; // Interrupt 29 ADC Conversion Complete
  1828. procedure EE_READY_ISR; external name 'EE_READY_ISR'; // Interrupt 30 EEPROM Ready
  1829. procedure TIMER3_CAPT_ISR; external name 'TIMER3_CAPT_ISR'; // Interrupt 31 Timer/Counter3 Capture Event
  1830. procedure TIMER3_COMPA_ISR; external name 'TIMER3_COMPA_ISR'; // Interrupt 32 Timer/Counter3 Compare Match A
  1831. procedure TIMER3_COMPB_ISR; external name 'TIMER3_COMPB_ISR'; // Interrupt 33 Timer/Counter3 Compare Match B
  1832. procedure TIMER3_COMPC_ISR; external name 'TIMER3_COMPC_ISR'; // Interrupt 34 Timer/Counter3 Compare Match C
  1833. procedure TIMER3_OVF_ISR; external name 'TIMER3_OVF_ISR'; // Interrupt 35 Timer/Counter3 Overflow
  1834. procedure USART1_RX_ISR; external name 'USART1_RX_ISR'; // Interrupt 36 USART1, Rx Complete
  1835. procedure USART1_UDRE_ISR; external name 'USART1_UDRE_ISR'; // Interrupt 37 USART1 Data register Empty
  1836. procedure USART1_TX_ISR; external name 'USART1_TX_ISR'; // Interrupt 38 USART1, Tx Complete
  1837. procedure TWI_ISR; external name 'TWI_ISR'; // Interrupt 39 2-wire Serial Interface
  1838. procedure SPM_READY_ISR; external name 'SPM_READY_ISR'; // Interrupt 40 Store Program Memory Read
  1839. procedure TIMER4_CAPT_ISR; external name 'TIMER4_CAPT_ISR'; // Interrupt 41 Timer/Counter4 Capture Event
  1840. procedure TIMER4_COMPA_ISR; external name 'TIMER4_COMPA_ISR'; // Interrupt 42 Timer/Counter4 Compare Match A
  1841. procedure TIMER4_COMPB_ISR; external name 'TIMER4_COMPB_ISR'; // Interrupt 43 Timer/Counter4 Compare Match B
  1842. procedure TIMER4_COMPC_ISR; external name 'TIMER4_COMPC_ISR'; // Interrupt 44 Timer/Counter4 Compare Match C
  1843. procedure TIMER4_OVF_ISR; external name 'TIMER4_OVF_ISR'; // Interrupt 45 Timer/Counter4 Overflow
  1844. procedure TIMER5_CAPT_ISR; external name 'TIMER5_CAPT_ISR'; // Interrupt 46 Timer/Counter5 Capture Event
  1845. procedure TIMER5_COMPA_ISR; external name 'TIMER5_COMPA_ISR'; // Interrupt 47 Timer/Counter5 Compare Match A
  1846. procedure TIMER5_COMPB_ISR; external name 'TIMER5_COMPB_ISR'; // Interrupt 48 Timer/Counter5 Compare Match B
  1847. procedure TIMER5_COMPC_ISR; external name 'TIMER5_COMPC_ISR'; // Interrupt 49 Timer/Counter5 Compare Match C
  1848. procedure TIMER5_OVF_ISR; external name 'TIMER5_OVF_ISR'; // Interrupt 50 Timer/Counter5 Overflow
  1849. procedure TRX24_PLL_LOCK_ISR; external name 'TRX24_PLL_LOCK_ISR'; // Interrupt 57 TRX24 - PLL lock interrupt
  1850. procedure TRX24_PLL_UNLOCK_ISR; external name 'TRX24_PLL_UNLOCK_ISR'; // Interrupt 58 TRX24 - PLL unlock interrupt
  1851. procedure TRX24_RX_START_ISR; external name 'TRX24_RX_START_ISR'; // Interrupt 59 TRX24 - Receive start interrupt
  1852. procedure TRX24_RX_END_ISR; external name 'TRX24_RX_END_ISR'; // Interrupt 60 TRX24 - RX_END interrupt
  1853. procedure TRX24_CCA_ED_DONE_ISR; external name 'TRX24_CCA_ED_DONE_ISR'; // Interrupt 61 TRX24 - CCA/ED done interrupt
  1854. procedure TRX24_XAH_AMI_ISR; external name 'TRX24_XAH_AMI_ISR'; // Interrupt 62 TRX24 - XAH - AMI
  1855. procedure TRX24_TX_END_ISR; external name 'TRX24_TX_END_ISR'; // Interrupt 63 TRX24 - TX_END interrupt
  1856. procedure TRX24_AWAKE_ISR; external name 'TRX24_AWAKE_ISR'; // Interrupt 64 TRX24 AWAKE - tranceiver is reaching state TRX_OFF
  1857. procedure SCNT_CMP1_ISR; external name 'SCNT_CMP1_ISR'; // Interrupt 65 Symbol counter - compare match 1 interrupt
  1858. procedure SCNT_CMP2_ISR; external name 'SCNT_CMP2_ISR'; // Interrupt 66 Symbol counter - compare match 2 interrupt
  1859. procedure SCNT_CMP3_ISR; external name 'SCNT_CMP3_ISR'; // Interrupt 67 Symbol counter - compare match 3 interrupt
  1860. procedure SCNT_OVFL_ISR; external name 'SCNT_OVFL_ISR'; // Interrupt 68 Symbol counter - overflow interrupt
  1861. procedure SCNT_BACKOFF_ISR; external name 'SCNT_BACKOFF_ISR'; // Interrupt 69 Symbol counter - backoff interrupt
  1862. procedure AES_READY_ISR; external name 'AES_READY_ISR'; // Interrupt 70 AES engine ready interrupt
  1863. procedure BAT_LOW_ISR; external name 'BAT_LOW_ISR'; // Interrupt 71 Battery monitor indicates supply voltage below threshold
  1864. procedure TRX24_TX_START_ISR; external name 'TRX24_TX_START_ISR'; // Interrupt 72 TRX24 TX start interrupt
  1865. procedure TRX24_AMI0_ISR; external name 'TRX24_AMI0_ISR'; // Interrupt 73 Address match interrupt of address filter 0
  1866. procedure TRX24_AMI1_ISR; external name 'TRX24_AMI1_ISR'; // Interrupt 74 Address match interrupt of address filter 1
  1867. procedure TRX24_AMI2_ISR; external name 'TRX24_AMI2_ISR'; // Interrupt 75 Address match interrupt of address filter 2
  1868. procedure TRX24_AMI3_ISR; external name 'TRX24_AMI3_ISR'; // Interrupt 76 Address match interrupt of address filter 3
  1869. procedure _FPC_start; assembler; nostackframe;
  1870. label
  1871. _start;
  1872. asm
  1873. .init
  1874. .globl _start
  1875. jmp _start
  1876. jmp INT0_ISR
  1877. jmp INT1_ISR
  1878. jmp INT2_ISR
  1879. jmp INT3_ISR
  1880. jmp INT4_ISR
  1881. jmp INT5_ISR
  1882. jmp INT6_ISR
  1883. jmp INT7_ISR
  1884. jmp PCINT0_ISR
  1885. jmp PCINT1_ISR
  1886. jmp PCINT2_ISR
  1887. jmp WDT_ISR
  1888. jmp TIMER2_COMPA_ISR
  1889. jmp TIMER2_COMPB_ISR
  1890. jmp TIMER2_OVF_ISR
  1891. jmp TIMER1_CAPT_ISR
  1892. jmp TIMER1_COMPA_ISR
  1893. jmp TIMER1_COMPB_ISR
  1894. jmp TIMER1_COMPC_ISR
  1895. jmp TIMER1_OVF_ISR
  1896. jmp TIMER0_COMPA_ISR
  1897. jmp TIMER0_COMPB_ISR
  1898. jmp TIMER0_OVF_ISR
  1899. jmp SPI_STC_ISR
  1900. jmp USART0_RX_ISR
  1901. jmp USART0_UDRE_ISR
  1902. jmp USART0_TX_ISR
  1903. jmp ANALOG_COMP_ISR
  1904. jmp ADC_ISR
  1905. jmp EE_READY_ISR
  1906. jmp TIMER3_CAPT_ISR
  1907. jmp TIMER3_COMPA_ISR
  1908. jmp TIMER3_COMPB_ISR
  1909. jmp TIMER3_COMPC_ISR
  1910. jmp TIMER3_OVF_ISR
  1911. jmp USART1_RX_ISR
  1912. jmp USART1_UDRE_ISR
  1913. jmp USART1_TX_ISR
  1914. jmp TWI_ISR
  1915. jmp SPM_READY_ISR
  1916. jmp TIMER4_CAPT_ISR
  1917. jmp TIMER4_COMPA_ISR
  1918. jmp TIMER4_COMPB_ISR
  1919. jmp TIMER4_COMPC_ISR
  1920. jmp TIMER4_OVF_ISR
  1921. jmp TIMER5_CAPT_ISR
  1922. jmp TIMER5_COMPA_ISR
  1923. jmp TIMER5_COMPB_ISR
  1924. jmp TIMER5_COMPC_ISR
  1925. jmp TIMER5_OVF_ISR
  1926. jmp TRX24_PLL_LOCK_ISR
  1927. jmp TRX24_PLL_UNLOCK_ISR
  1928. jmp TRX24_RX_START_ISR
  1929. jmp TRX24_RX_END_ISR
  1930. jmp TRX24_CCA_ED_DONE_ISR
  1931. jmp TRX24_XAH_AMI_ISR
  1932. jmp TRX24_TX_END_ISR
  1933. jmp TRX24_AWAKE_ISR
  1934. jmp SCNT_CMP1_ISR
  1935. jmp SCNT_CMP2_ISR
  1936. jmp SCNT_CMP3_ISR
  1937. jmp SCNT_OVFL_ISR
  1938. jmp SCNT_BACKOFF_ISR
  1939. jmp AES_READY_ISR
  1940. jmp BAT_LOW_ISR
  1941. jmp TRX24_TX_START_ISR
  1942. jmp TRX24_AMI0_ISR
  1943. jmp TRX24_AMI1_ISR
  1944. jmp TRX24_AMI2_ISR
  1945. jmp TRX24_AMI3_ISR
  1946. {$i start.inc}
  1947. .weak INT0_ISR
  1948. .weak INT1_ISR
  1949. .weak INT2_ISR
  1950. .weak INT3_ISR
  1951. .weak INT4_ISR
  1952. .weak INT5_ISR
  1953. .weak INT6_ISR
  1954. .weak INT7_ISR
  1955. .weak PCINT0_ISR
  1956. .weak PCINT1_ISR
  1957. .weak PCINT2_ISR
  1958. .weak WDT_ISR
  1959. .weak TIMER2_COMPA_ISR
  1960. .weak TIMER2_COMPB_ISR
  1961. .weak TIMER2_OVF_ISR
  1962. .weak TIMER1_CAPT_ISR
  1963. .weak TIMER1_COMPA_ISR
  1964. .weak TIMER1_COMPB_ISR
  1965. .weak TIMER1_COMPC_ISR
  1966. .weak TIMER1_OVF_ISR
  1967. .weak TIMER0_COMPA_ISR
  1968. .weak TIMER0_COMPB_ISR
  1969. .weak TIMER0_OVF_ISR
  1970. .weak SPI_STC_ISR
  1971. .weak USART0_RX_ISR
  1972. .weak USART0_UDRE_ISR
  1973. .weak USART0_TX_ISR
  1974. .weak ANALOG_COMP_ISR
  1975. .weak ADC_ISR
  1976. .weak EE_READY_ISR
  1977. .weak TIMER3_CAPT_ISR
  1978. .weak TIMER3_COMPA_ISR
  1979. .weak TIMER3_COMPB_ISR
  1980. .weak TIMER3_COMPC_ISR
  1981. .weak TIMER3_OVF_ISR
  1982. .weak USART1_RX_ISR
  1983. .weak USART1_UDRE_ISR
  1984. .weak USART1_TX_ISR
  1985. .weak TWI_ISR
  1986. .weak SPM_READY_ISR
  1987. .weak TIMER4_CAPT_ISR
  1988. .weak TIMER4_COMPA_ISR
  1989. .weak TIMER4_COMPB_ISR
  1990. .weak TIMER4_COMPC_ISR
  1991. .weak TIMER4_OVF_ISR
  1992. .weak TIMER5_CAPT_ISR
  1993. .weak TIMER5_COMPA_ISR
  1994. .weak TIMER5_COMPB_ISR
  1995. .weak TIMER5_COMPC_ISR
  1996. .weak TIMER5_OVF_ISR
  1997. .weak TRX24_PLL_LOCK_ISR
  1998. .weak TRX24_PLL_UNLOCK_ISR
  1999. .weak TRX24_RX_START_ISR
  2000. .weak TRX24_RX_END_ISR
  2001. .weak TRX24_CCA_ED_DONE_ISR
  2002. .weak TRX24_XAH_AMI_ISR
  2003. .weak TRX24_TX_END_ISR
  2004. .weak TRX24_AWAKE_ISR
  2005. .weak SCNT_CMP1_ISR
  2006. .weak SCNT_CMP2_ISR
  2007. .weak SCNT_CMP3_ISR
  2008. .weak SCNT_OVFL_ISR
  2009. .weak SCNT_BACKOFF_ISR
  2010. .weak AES_READY_ISR
  2011. .weak BAT_LOW_ISR
  2012. .weak TRX24_TX_START_ISR
  2013. .weak TRX24_AMI0_ISR
  2014. .weak TRX24_AMI1_ISR
  2015. .weak TRX24_AMI2_ISR
  2016. .weak TRX24_AMI3_ISR
  2017. .set INT0_ISR, Default_IRQ_handler
  2018. .set INT1_ISR, Default_IRQ_handler
  2019. .set INT2_ISR, Default_IRQ_handler
  2020. .set INT3_ISR, Default_IRQ_handler
  2021. .set INT4_ISR, Default_IRQ_handler
  2022. .set INT5_ISR, Default_IRQ_handler
  2023. .set INT6_ISR, Default_IRQ_handler
  2024. .set INT7_ISR, Default_IRQ_handler
  2025. .set PCINT0_ISR, Default_IRQ_handler
  2026. .set PCINT1_ISR, Default_IRQ_handler
  2027. .set PCINT2_ISR, Default_IRQ_handler
  2028. .set WDT_ISR, Default_IRQ_handler
  2029. .set TIMER2_COMPA_ISR, Default_IRQ_handler
  2030. .set TIMER2_COMPB_ISR, Default_IRQ_handler
  2031. .set TIMER2_OVF_ISR, Default_IRQ_handler
  2032. .set TIMER1_CAPT_ISR, Default_IRQ_handler
  2033. .set TIMER1_COMPA_ISR, Default_IRQ_handler
  2034. .set TIMER1_COMPB_ISR, Default_IRQ_handler
  2035. .set TIMER1_COMPC_ISR, Default_IRQ_handler
  2036. .set TIMER1_OVF_ISR, Default_IRQ_handler
  2037. .set TIMER0_COMPA_ISR, Default_IRQ_handler
  2038. .set TIMER0_COMPB_ISR, Default_IRQ_handler
  2039. .set TIMER0_OVF_ISR, Default_IRQ_handler
  2040. .set SPI_STC_ISR, Default_IRQ_handler
  2041. .set USART0_RX_ISR, Default_IRQ_handler
  2042. .set USART0_UDRE_ISR, Default_IRQ_handler
  2043. .set USART0_TX_ISR, Default_IRQ_handler
  2044. .set ANALOG_COMP_ISR, Default_IRQ_handler
  2045. .set ADC_ISR, Default_IRQ_handler
  2046. .set EE_READY_ISR, Default_IRQ_handler
  2047. .set TIMER3_CAPT_ISR, Default_IRQ_handler
  2048. .set TIMER3_COMPA_ISR, Default_IRQ_handler
  2049. .set TIMER3_COMPB_ISR, Default_IRQ_handler
  2050. .set TIMER3_COMPC_ISR, Default_IRQ_handler
  2051. .set TIMER3_OVF_ISR, Default_IRQ_handler
  2052. .set USART1_RX_ISR, Default_IRQ_handler
  2053. .set USART1_UDRE_ISR, Default_IRQ_handler
  2054. .set USART1_TX_ISR, Default_IRQ_handler
  2055. .set TWI_ISR, Default_IRQ_handler
  2056. .set SPM_READY_ISR, Default_IRQ_handler
  2057. .set TIMER4_CAPT_ISR, Default_IRQ_handler
  2058. .set TIMER4_COMPA_ISR, Default_IRQ_handler
  2059. .set TIMER4_COMPB_ISR, Default_IRQ_handler
  2060. .set TIMER4_COMPC_ISR, Default_IRQ_handler
  2061. .set TIMER4_OVF_ISR, Default_IRQ_handler
  2062. .set TIMER5_CAPT_ISR, Default_IRQ_handler
  2063. .set TIMER5_COMPA_ISR, Default_IRQ_handler
  2064. .set TIMER5_COMPB_ISR, Default_IRQ_handler
  2065. .set TIMER5_COMPC_ISR, Default_IRQ_handler
  2066. .set TIMER5_OVF_ISR, Default_IRQ_handler
  2067. .set TRX24_PLL_LOCK_ISR, Default_IRQ_handler
  2068. .set TRX24_PLL_UNLOCK_ISR, Default_IRQ_handler
  2069. .set TRX24_RX_START_ISR, Default_IRQ_handler
  2070. .set TRX24_RX_END_ISR, Default_IRQ_handler
  2071. .set TRX24_CCA_ED_DONE_ISR, Default_IRQ_handler
  2072. .set TRX24_XAH_AMI_ISR, Default_IRQ_handler
  2073. .set TRX24_TX_END_ISR, Default_IRQ_handler
  2074. .set TRX24_AWAKE_ISR, Default_IRQ_handler
  2075. .set SCNT_CMP1_ISR, Default_IRQ_handler
  2076. .set SCNT_CMP2_ISR, Default_IRQ_handler
  2077. .set SCNT_CMP3_ISR, Default_IRQ_handler
  2078. .set SCNT_OVFL_ISR, Default_IRQ_handler
  2079. .set SCNT_BACKOFF_ISR, Default_IRQ_handler
  2080. .set AES_READY_ISR, Default_IRQ_handler
  2081. .set BAT_LOW_ISR, Default_IRQ_handler
  2082. .set TRX24_TX_START_ISR, Default_IRQ_handler
  2083. .set TRX24_AMI0_ISR, Default_IRQ_handler
  2084. .set TRX24_AMI1_ISR, Default_IRQ_handler
  2085. .set TRX24_AMI2_ISR, Default_IRQ_handler
  2086. .set TRX24_AMI3_ISR, Default_IRQ_handler
  2087. end;
  2088. end.