attiny12.pp 3.8 KB

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  1. unit ATtiny12;
  2. {$goto on}
  3. interface
  4. var
  5. ACSR: byte absolute $08; // Analog Comparator Control And Status Register
  6. PINB: byte absolute $16; // Input Pins, Port B
  7. DDRB: byte absolute $17; // Data Direction Register, Port B
  8. PORTB: byte absolute $18; // Data Register, Port B
  9. EECR: byte absolute $1C; // EEPROM Control Register
  10. EEDR: byte absolute $1D; // EEPROM Data Register
  11. EEAR: byte absolute $1E; // EEPROM Read/Write Access
  12. WDTCR: byte absolute $21; // Watchdog Timer Control Register
  13. OSCCAL: byte absolute $31; // Status Register
  14. TCNT0: byte absolute $32; // Timer Counter 0
  15. TCCR0: byte absolute $33; // Timer/Counter0 Control Register
  16. MCUSR: byte absolute $34; // MCU Status register
  17. MCUCR: byte absolute $35; // MCU Control Register
  18. TIFR: byte absolute $38; // Timer/Counter Interrupt Flag register
  19. TIMSK: byte absolute $39; // Timer/Counter Interrupt Mask Register
  20. GIFR: byte absolute $3A; // General Interrupt Flag register
  21. GIMSK: byte absolute $3B; // General Interrupt Mask Register
  22. SREG: byte absolute $3F; // Status Register
  23. const
  24. // Analog Comparator Control And Status Register
  25. ACIS0 = $00; // Analog Comparator Interrupt Mode Select bits
  26. ACIS1 = $01; // Analog Comparator Interrupt Mode Select bits
  27. ACIE = $03;
  28. ACI = $04;
  29. ACO = $05;
  30. AINBG = $06;
  31. ACD = $07;
  32. // Data Register, Port B
  33. PB0 = $00;
  34. PB1 = $01;
  35. PB2 = $02;
  36. PB3 = $03;
  37. PB4 = $04;
  38. // EEPROM Control Register
  39. EERE = $00;
  40. EEWE = $01;
  41. EEMWE = $02;
  42. EERIE = $03;
  43. // Watchdog Timer Control Register
  44. WDP0 = $00; // Watch Dog Timer Prescaler bits
  45. WDP1 = $01; // Watch Dog Timer Prescaler bits
  46. WDP2 = $02; // Watch Dog Timer Prescaler bits
  47. WDE = $03;
  48. WDTOE = $04;
  49. // Status Register
  50. OSCCAL0 = $00; // Oscillator Calibration
  51. OSCCAL1 = $01; // Oscillator Calibration
  52. OSCCAL2 = $02; // Oscillator Calibration
  53. OSCCAL3 = $03; // Oscillator Calibration
  54. OSCCAL4 = $04; // Oscillator Calibration
  55. OSCCAL5 = $05; // Oscillator Calibration
  56. OSCCAL6 = $06; // Oscillator Calibration
  57. OSCCAL7 = $07; // Oscillator Calibration
  58. // Timer/Counter0 Control Register
  59. CS00 = $00;
  60. CS01 = $01;
  61. CS02 = $02;
  62. // MCU Status register
  63. PORF = $00;
  64. EXTRF = $01;
  65. BORF = $02;
  66. WDRF = $03;
  67. // MCU Control Register
  68. ISC00 = $00; // Interrupt Sense Control 0 bits
  69. ISC01 = $01; // Interrupt Sense Control 0 bits
  70. SM = $04;
  71. SE = $05;
  72. PUD = $06;
  73. // Timer/Counter Interrupt Flag register
  74. TOV0 = $01;
  75. // Timer/Counter Interrupt Mask Register
  76. TOIE0 = $01;
  77. // General Interrupt Flag register
  78. PCIF = $05;
  79. INTF0 = $06;
  80. // General Interrupt Mask Register
  81. PCIE = $05;
  82. INT0 = $06;
  83. // Status Register
  84. C = $00;
  85. Z = $01;
  86. N = $02;
  87. V = $03;
  88. S = $04;
  89. H = $05;
  90. T = $06;
  91. I = $07;
  92. implementation
  93. {$define RELBRANCHES}
  94. {$i avrcommon.inc}
  95. procedure INT0_ISR; external name 'INT0_ISR'; // Interrupt 1 External Interrupt 0
  96. procedure IO_PINS_ISR; external name 'IO_PINS_ISR'; // Interrupt 2 External Interrupt Request 0
  97. procedure TIMER0_OVF_ISR; external name 'TIMER0_OVF_ISR'; // Interrupt 3 Timer/Counter0 Overflow
  98. procedure EE_RDY_ISR; external name 'EE_RDY_ISR'; // Interrupt 4 EEPROM Ready
  99. procedure ANA_COMP_ISR; external name 'ANA_COMP_ISR'; // Interrupt 5 Analog Comparator
  100. procedure _FPC_start; assembler; nostackframe;
  101. label
  102. _start;
  103. asm
  104. .init
  105. .globl _start
  106. rjmp _start
  107. rjmp INT0_ISR
  108. rjmp IO_PINS_ISR
  109. rjmp TIMER0_OVF_ISR
  110. rjmp EE_RDY_ISR
  111. rjmp ANA_COMP_ISR
  112. {$i start_noram.inc}
  113. .weak INT0_ISR
  114. .weak IO_PINS_ISR
  115. .weak TIMER0_OVF_ISR
  116. .weak EE_RDY_ISR
  117. .weak ANA_COMP_ISR
  118. .set INT0_ISR, Default_IRQ_handler
  119. .set IO_PINS_ISR, Default_IRQ_handler
  120. .set TIMER0_OVF_ISR, Default_IRQ_handler
  121. .set EE_RDY_ISR, Default_IRQ_handler
  122. .set ANA_COMP_ISR, Default_IRQ_handler
  123. end;
  124. end.