attiny1617.pp 63 KB

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  1. unit ATtiny1617;
  2. {$goto on}
  3. interface
  4. type
  5. TAC = object //Analog Comparator
  6. CTRLA: byte; //Control A
  7. Reserved1: byte;
  8. MUXCTRLA: byte; //Mux Control A
  9. Reserved3: byte;
  10. Reserved4: byte;
  11. Reserved5: byte;
  12. INTCTRL: byte; //Interrupt Control
  13. STATUS: byte; //Status
  14. const
  15. // Enable
  16. ENABLEbm = $01;
  17. // AC_HYSMODE
  18. HYSMODEmask = $06;
  19. HYSMODE_OFF = $00;
  20. HYSMODE_10mV = $02;
  21. HYSMODE_25mV = $04;
  22. HYSMODE_50mV = $06;
  23. // AC_INTMODE
  24. INTMODEmask = $30;
  25. INTMODE_BOTHEDGE = $00;
  26. INTMODE_NEGEDGE = $20;
  27. INTMODE_POSEDGE = $30;
  28. // AC_LPMODE
  29. LPMODEmask = $08;
  30. LPMODE_DIS = $00;
  31. LPMODE_EN = $08;
  32. // Output Buffer Enable
  33. OUTENbm = $40;
  34. // Run in Standby Mode
  35. RUNSTDBYbm = $80;
  36. // Analog Comparator 0 Interrupt Enable
  37. CMPbm = $01;
  38. // Invert AC Output
  39. INVERTbm = $80;
  40. // AC_MUXNEG
  41. MUXNEGmask = $03;
  42. MUXNEG_PIN0 = $00;
  43. MUXNEG_PIN1 = $01;
  44. MUXNEG_VREF = $02;
  45. MUXNEG_DAC = $03;
  46. // AC_MUXPOS
  47. MUXPOSmask = $18;
  48. MUXPOS_PIN0 = $00;
  49. MUXPOS_PIN1 = $08;
  50. MUXPOS_PIN2 = $10;
  51. MUXPOS_PIN3 = $18;
  52. // Analog Comparator State
  53. STATEbm = $10;
  54. end;
  55. TADC = object //Analog to Digital Converter
  56. CTRLA: byte; //Control A
  57. CTRLB: byte; //Control B
  58. CTRLC: byte; //Control C
  59. CTRLD: byte; //Control D
  60. CTRLE: byte; //Control E
  61. SAMPCTRL: byte; //Sample Control
  62. MUXPOS: byte; //Positive mux input
  63. Reserved7: byte;
  64. COMMAND: byte; //Command
  65. EVCTRL: byte; //Event Control
  66. INTCTRL: byte; //Interrupt Control
  67. INTFLAGS: byte; //Interrupt Flags
  68. DBGCTRL: byte; //Debug Control
  69. TEMP: byte; //Temporary Data
  70. Reserved14: byte;
  71. Reserved15: byte;
  72. RES: word; //ADC Accumulator Result
  73. WINLT: word; //Window comparator low threshold
  74. WINHT: word; //Window comparator high threshold
  75. CALIB: byte; //Calibration
  76. const
  77. // ADC_DUTYCYC
  78. DUTYCYCmask = $01;
  79. DUTYCYC_DUTY50 = $00;
  80. DUTYCYC_DUTY25 = $01;
  81. // Start Conversion Operation
  82. STCONVbm = $01;
  83. // ADC Enable
  84. ENABLEbm = $01;
  85. // ADC Freerun mode
  86. FREERUNbm = $02;
  87. // ADC_RESSEL
  88. RESSELmask = $04;
  89. RESSEL_10BIT = $00;
  90. RESSEL_8BIT = $04;
  91. // Run standby mode
  92. RUNSTBYbm = $80;
  93. // ADC_SAMPNUM
  94. SAMPNUMmask = $07;
  95. SAMPNUM_ACC1 = $00;
  96. SAMPNUM_ACC2 = $01;
  97. SAMPNUM_ACC4 = $02;
  98. SAMPNUM_ACC8 = $03;
  99. SAMPNUM_ACC16 = $04;
  100. SAMPNUM_ACC32 = $05;
  101. SAMPNUM_ACC64 = $06;
  102. // ADC_PRESC
  103. PRESCmask = $07;
  104. PRESC_DIV2 = $00;
  105. PRESC_DIV4 = $01;
  106. PRESC_DIV8 = $02;
  107. PRESC_DIV16 = $03;
  108. PRESC_DIV32 = $04;
  109. PRESC_DIV64 = $05;
  110. PRESC_DIV128 = $06;
  111. PRESC_DIV256 = $07;
  112. // ADC_REFSEL
  113. REFSELmask = $30;
  114. REFSEL_INTREF = $00;
  115. REFSEL_VDDREF = $10;
  116. REFSEL_VREFA = $20;
  117. // Sample Capacitance Selection
  118. SAMPCAPbm = $40;
  119. // ADC_ASDV
  120. ASDVmask = $10;
  121. ASDV_ASVOFF = $00;
  122. ASDV_ASVON = $10;
  123. // ADC_INITDLY
  124. INITDLYmask = $E0;
  125. INITDLY_DLY0 = $00;
  126. INITDLY_DLY16 = $20;
  127. INITDLY_DLY32 = $40;
  128. INITDLY_DLY64 = $60;
  129. INITDLY_DLY128 = $80;
  130. INITDLY_DLY256 = $A0;
  131. // Sampling Delay Selection
  132. SAMPDLY0bm = $01;
  133. SAMPDLY1bm = $02;
  134. SAMPDLY2bm = $04;
  135. SAMPDLY3bm = $08;
  136. // ADC_WINCM
  137. WINCMmask = $07;
  138. WINCM_NONE = $00;
  139. WINCM_BELOW = $01;
  140. WINCM_ABOVE = $02;
  141. WINCM_INSIDE = $03;
  142. WINCM_OUTSIDE = $04;
  143. // Debug run
  144. DBGRUNbm = $01;
  145. // Start Event Input Enable
  146. STARTEIbm = $01;
  147. // Result Ready Interrupt Enable
  148. RESRDYbm = $01;
  149. // Window Comparator Interrupt Enable
  150. WCMPbm = $02;
  151. // ADC_MUXPOS
  152. MUXPOSmask = $1F;
  153. MUXPOS_AIN0 = $00;
  154. MUXPOS_AIN1 = $01;
  155. MUXPOS_AIN2 = $02;
  156. MUXPOS_AIN3 = $03;
  157. MUXPOS_AIN4 = $04;
  158. MUXPOS_AIN5 = $05;
  159. MUXPOS_AIN6 = $06;
  160. MUXPOS_AIN7 = $07;
  161. MUXPOS_AIN8 = $08;
  162. MUXPOS_AIN9 = $09;
  163. MUXPOS_AIN10 = $0A;
  164. MUXPOS_AIN11 = $0B;
  165. MUXPOS_PTC = $1B;
  166. MUXPOS_DAC0 = $1C;
  167. MUXPOS_INTREF = $1D;
  168. MUXPOS_TEMPSENSE = $1E;
  169. MUXPOS_GND = $1F;
  170. // Sample lenght
  171. SAMPLEN0bm = $01;
  172. SAMPLEN1bm = $02;
  173. SAMPLEN2bm = $04;
  174. SAMPLEN3bm = $08;
  175. SAMPLEN4bm = $10;
  176. // Temporary
  177. TEMP0bm = $01;
  178. TEMP1bm = $02;
  179. TEMP2bm = $04;
  180. TEMP3bm = $08;
  181. TEMP4bm = $10;
  182. TEMP5bm = $20;
  183. TEMP6bm = $40;
  184. TEMP7bm = $80;
  185. end;
  186. TBOD = object //Bod interface
  187. CTRLA: byte; //Control A
  188. CTRLB: byte; //Control B
  189. Reserved2: byte;
  190. Reserved3: byte;
  191. Reserved4: byte;
  192. Reserved5: byte;
  193. Reserved6: byte;
  194. Reserved7: byte;
  195. VLMCTRLA: byte; //Voltage level monitor Control
  196. INTCTRL: byte; //Voltage level monitor interrupt Control
  197. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  198. STATUS: byte; //Voltage level monitor status
  199. const
  200. // BOD_ACTIVE
  201. ACTIVEmask = $0C;
  202. ACTIVE_DIS = $00;
  203. ACTIVE_ENABLED = $04;
  204. ACTIVE_SAMPLED = $08;
  205. ACTIVE_ENWAKE = $0C;
  206. // BOD_SAMPFREQ
  207. SAMPFREQmask = $10;
  208. SAMPFREQ_1KHZ = $00;
  209. SAMPFREQ_125HZ = $10;
  210. // BOD_SLEEP
  211. SLEEPmask = $03;
  212. SLEEP_DIS = $00;
  213. SLEEP_ENABLED = $01;
  214. SLEEP_SAMPLED = $02;
  215. // BOD_LVL
  216. LVLmask = $07;
  217. LVL_BODLEVEL0 = $00;
  218. LVL_BODLEVEL1 = $01;
  219. LVL_BODLEVEL2 = $02;
  220. LVL_BODLEVEL3 = $03;
  221. LVL_BODLEVEL4 = $04;
  222. LVL_BODLEVEL5 = $05;
  223. LVL_BODLEVEL6 = $06;
  224. LVL_BODLEVEL7 = $07;
  225. // BOD_VLMCFG
  226. VLMCFGmask = $06;
  227. VLMCFG_BELOW = $00;
  228. VLMCFG_ABOVE = $02;
  229. VLMCFG_CROSS = $04;
  230. // voltage level monitor interrrupt enable
  231. VLMIEbm = $01;
  232. // Voltage level monitor interrupt flag
  233. VLMIFbm = $01;
  234. // Voltage level monitor status
  235. VLMSbm = $01;
  236. // BOD_VLMLVL
  237. VLMLVLmask = $03;
  238. VLMLVL_5ABOVE = $00;
  239. VLMLVL_15ABOVE = $01;
  240. VLMLVL_25ABOVE = $02;
  241. end;
  242. TCCL = object //Configurable Custom Logic
  243. CTRLA: byte; //Control Register A
  244. SEQCTRL0: byte; //Sequential Control 0
  245. Reserved2: byte;
  246. Reserved3: byte;
  247. Reserved4: byte;
  248. LUT0CTRLA: byte; //LUT Control 0 A
  249. LUT0CTRLB: byte; //LUT Control 0 B
  250. LUT0CTRLC: byte; //LUT Control 0 C
  251. TRUTH0: byte; //Truth 0
  252. LUT1CTRLA: byte; //LUT Control 1 A
  253. LUT1CTRLB: byte; //LUT Control 1 B
  254. LUT1CTRLC: byte; //LUT Control 1 C
  255. TRUTH1: byte; //Truth 1
  256. const
  257. // Enable
  258. ENABLEbm = $01;
  259. // Run in Standby
  260. RUNSTDBYbm = $40;
  261. // Clock Source Selection
  262. CLKSRCbm = $40;
  263. // CCL_EDGEDET
  264. EDGEDETmask = $80;
  265. EDGEDET_DIS = $00;
  266. EDGEDET_EN = $80;
  267. // CCL_FILTSEL
  268. FILTSELmask = $30;
  269. FILTSEL_DISABLE = $00;
  270. FILTSEL_SYNCH = $10;
  271. FILTSEL_FILTER = $20;
  272. // Output Enable
  273. OUTENbm = $08;
  274. // CCL_INSEL0
  275. INSEL0mask = $0F;
  276. INSEL0_MASK = $00;
  277. INSEL0_FEEDBACK = $01;
  278. INSEL0_LINK = $02;
  279. INSEL0_EVENT0 = $03;
  280. INSEL0_EVENT1 = $04;
  281. INSEL0_IO = $05;
  282. INSEL0_AC0 = $06;
  283. INSEL0_TCB0 = $07;
  284. INSEL0_TCA0 = $08;
  285. INSEL0_TCD0 = $09;
  286. INSEL0_USART0 = $0A;
  287. INSEL0_SPI0 = $0B;
  288. // CCL_INSEL1
  289. INSEL1mask = $F0;
  290. INSEL1_MASK = $00;
  291. INSEL1_FEEDBACK = $10;
  292. INSEL1_LINK = $20;
  293. INSEL1_EVENT0 = $30;
  294. INSEL1_EVENT1 = $40;
  295. INSEL1_IO = $50;
  296. INSEL1_AC0 = $60;
  297. INSEL1_TCB0 = $70;
  298. INSEL1_TCA0 = $80;
  299. INSEL1_TCD0 = $90;
  300. INSEL1_USART0 = $A0;
  301. INSEL1_SPI0 = $B0;
  302. // CCL_INSEL2
  303. INSEL2mask = $0F;
  304. INSEL2_MASK = $00;
  305. INSEL2_FEEDBACK = $01;
  306. INSEL2_LINK = $02;
  307. INSEL2_EVENT0 = $03;
  308. INSEL2_EVENT1 = $04;
  309. INSEL2_IO = $05;
  310. INSEL2_AC0 = $06;
  311. INSEL2_TCB0 = $07;
  312. INSEL2_TCA0 = $08;
  313. INSEL2_TCD0 = $09;
  314. INSEL2_SPI0 = $0B;
  315. // CCL_SEQSEL
  316. SEQSELmask = $07;
  317. SEQSEL_DISABLE = $00;
  318. SEQSEL_DFF = $01;
  319. SEQSEL_JK = $02;
  320. SEQSEL_LATCH = $03;
  321. SEQSEL_RS = $04;
  322. end;
  323. TCLKCTRL = object //Clock controller
  324. MCLKCTRLA: byte; //MCLK Control A
  325. MCLKCTRLB: byte; //MCLK Control B
  326. MCLKLOCK: byte; //MCLK Lock
  327. MCLKSTATUS: byte; //MCLK Status
  328. Reserved4: byte;
  329. Reserved5: byte;
  330. Reserved6: byte;
  331. Reserved7: byte;
  332. Reserved8: byte;
  333. Reserved9: byte;
  334. Reserved10: byte;
  335. Reserved11: byte;
  336. Reserved12: byte;
  337. Reserved13: byte;
  338. Reserved14: byte;
  339. Reserved15: byte;
  340. OSC20MCTRLA: byte; //OSC20M Control A
  341. OSC20MCALIBA: byte; //OSC20M Calibration A
  342. OSC20MCALIBB: byte; //OSC20M Calibration B
  343. Reserved19: byte;
  344. Reserved20: byte;
  345. Reserved21: byte;
  346. Reserved22: byte;
  347. Reserved23: byte;
  348. OSC32KCTRLA: byte; //OSC32K Control A
  349. Reserved25: byte;
  350. Reserved26: byte;
  351. Reserved27: byte;
  352. XOSC32KCTRLA: byte; //XOSC32K Control A
  353. const
  354. // System clock out
  355. CLKOUTbm = $80;
  356. // CLKCTRL_CLKSEL
  357. CLKSELmask = $03;
  358. CLKSEL_OSC20M = $00;
  359. CLKSEL_OSCULP32K = $01;
  360. CLKSEL_XOSC32K = $02;
  361. CLKSEL_EXTCLK = $03;
  362. // CLKCTRL_PDIV
  363. PDIVmask = $1E;
  364. PDIV_2X = $00;
  365. PDIV_4X = $02;
  366. PDIV_8X = $04;
  367. PDIV_16X = $06;
  368. PDIV_32X = $08;
  369. PDIV_64X = $0A;
  370. PDIV_6X = $10;
  371. PDIV_10X = $12;
  372. PDIV_12X = $14;
  373. PDIV_24X = $16;
  374. PDIV_48X = $18;
  375. // Prescaler enable
  376. PENbm = $01;
  377. // lock ebable
  378. LOCKENbm = $01;
  379. // External Clock status
  380. EXTSbm = $80;
  381. // 20MHz oscillator status
  382. OSC20MSbm = $10;
  383. // 32KHz oscillator status
  384. OSC32KSbm = $20;
  385. // System Oscillator changing
  386. SOSCbm = $01;
  387. // 32.768 kHz Crystal Oscillator status
  388. XOSC32KSbm = $40;
  389. // Calibration
  390. CAL20M0bm = $01;
  391. CAL20M1bm = $02;
  392. CAL20M2bm = $04;
  393. CAL20M3bm = $08;
  394. CAL20M4bm = $10;
  395. CAL20M5bm = $20;
  396. // Lock
  397. LOCKbm = $80;
  398. // Oscillator temperature coefficient
  399. TEMPCAL20M0bm = $01;
  400. TEMPCAL20M1bm = $02;
  401. TEMPCAL20M2bm = $04;
  402. TEMPCAL20M3bm = $08;
  403. // Run standby
  404. RUNSTDBYbm = $02;
  405. // CLKCTRL_CSUT
  406. CSUTmask = $30;
  407. CSUT_1K = $00;
  408. CSUT_16K = $10;
  409. CSUT_32K = $20;
  410. CSUT_64K = $30;
  411. // Enable
  412. ENABLEbm = $01;
  413. // Select
  414. SELbm = $04;
  415. end;
  416. TCPU = object //CPU
  417. Reserved0: byte;
  418. Reserved1: byte;
  419. Reserved2: byte;
  420. Reserved3: byte;
  421. CCP: byte; //Configuration Change Protection
  422. Reserved5: byte;
  423. Reserved6: byte;
  424. Reserved7: byte;
  425. Reserved8: byte;
  426. Reserved9: byte;
  427. Reserved10: byte;
  428. Reserved11: byte;
  429. Reserved12: byte;
  430. SPL: byte; //Stack Pointer Low
  431. SPH: byte; //Stack Pointer High
  432. SREG: byte; //Status Register
  433. const
  434. // CPU_CCP
  435. CCPmask = $FF;
  436. CCP_SPM = $9D;
  437. CCP_IOREG = $D8;
  438. // Carry Flag
  439. Cbm = $01;
  440. // Half Carry Flag
  441. Hbm = $20;
  442. // Global Interrupt Enable Flag
  443. Ibm = $80;
  444. // Negative Flag
  445. Nbm = $04;
  446. // N Exclusive Or V Flag
  447. Sbm = $10;
  448. // Transfer Bit
  449. Tbm = $40;
  450. // Two's Complement Overflow Flag
  451. Vbm = $08;
  452. // Zero Flag
  453. Zbm = $02;
  454. end;
  455. TCPUINT = object //Interrupt Controller
  456. CTRLA: byte; //Control A
  457. STATUS: byte; //Status
  458. LVL0PRI: byte; //Interrupt Level 0 Priority
  459. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  460. const
  461. // Compact Vector Table
  462. CVTbm = $20;
  463. // Interrupt Vector Select
  464. IVSELbm = $40;
  465. // Round-robin Scheduling Enable
  466. LVL0RRbm = $01;
  467. // Interrupt Level Priority
  468. LVL0PRI0bm = $01;
  469. LVL0PRI1bm = $02;
  470. LVL0PRI2bm = $04;
  471. LVL0PRI3bm = $08;
  472. LVL0PRI4bm = $10;
  473. LVL0PRI5bm = $20;
  474. LVL0PRI6bm = $40;
  475. LVL0PRI7bm = $80;
  476. // Interrupt Vector with High Priority
  477. LVL1VEC0bm = $01;
  478. LVL1VEC1bm = $02;
  479. LVL1VEC2bm = $04;
  480. LVL1VEC3bm = $08;
  481. LVL1VEC4bm = $10;
  482. LVL1VEC5bm = $20;
  483. LVL1VEC6bm = $40;
  484. LVL1VEC7bm = $80;
  485. // Level 0 Interrupt Executing
  486. LVL0EXbm = $01;
  487. // Level 1 Interrupt Executing
  488. LVL1EXbm = $02;
  489. // Non-maskable Interrupt Executing
  490. NMIEXbm = $80;
  491. end;
  492. TCRCSCAN = object //CRCSCAN
  493. CTRLA: byte; //Control A
  494. CTRLB: byte; //Control B
  495. STATUS: byte; //Status
  496. const
  497. // Enable CRC scan
  498. ENABLEbm = $01;
  499. // Enable NMI Trigger
  500. NMIENbm = $02;
  501. // Reset CRC scan
  502. RESETbm = $80;
  503. // CRCSCAN_MODE
  504. MODEmask = $30;
  505. MODE_PRIORITY = $00;
  506. MODE_RESERVED = $10;
  507. MODE_BACKGROUND = $20;
  508. MODE_CONTINUOUS = $30;
  509. // CRCSCAN_SRC
  510. SRCmask = $03;
  511. SRC_FLASH = $00;
  512. SRC_APPLICATION = $01;
  513. SRC_BOOT = $02;
  514. // CRC Busy
  515. BUSYbm = $01;
  516. // CRC Ok
  517. OKbm = $02;
  518. end;
  519. TDAC = object //Digital to Analog Converter
  520. CTRLA: byte; //Control Register A
  521. DATA: byte; //DATA Register
  522. const
  523. // DAC Enable
  524. ENABLEbm = $01;
  525. // Output Buffer Enable
  526. OUTENbm = $40;
  527. // Run in Standby Mode
  528. RUNSTDBYbm = $80;
  529. end;
  530. TEVSYS = object //Event System
  531. ASYNCSTROBE: byte; //Asynchronous Channel Strobe
  532. SYNCSTROBE: byte; //Synchronous Channel Strobe
  533. ASYNCCH0: byte; //Asynchronous Channel 0 Generator Selection
  534. ASYNCCH1: byte; //Asynchronous Channel 1 Generator Selection
  535. ASYNCCH2: byte; //Asynchronous Channel 2 Generator Selection
  536. ASYNCCH3: byte; //Asynchronous Channel 3 Generator Selection
  537. Reserved6: byte;
  538. Reserved7: byte;
  539. Reserved8: byte;
  540. Reserved9: byte;
  541. SYNCCH0: byte; //Synchronous Channel 0 Generator Selection
  542. SYNCCH1: byte; //Synchronous Channel 1 Generator Selection
  543. Reserved12: byte;
  544. Reserved13: byte;
  545. Reserved14: byte;
  546. Reserved15: byte;
  547. Reserved16: byte;
  548. Reserved17: byte;
  549. ASYNCUSER0: byte; //Asynchronous User Ch 0 Input Selection - TCB0
  550. ASYNCUSER1: byte; //Asynchronous User Ch 1 Input Selection - ADC0
  551. ASYNCUSER2: byte; //Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  552. ASYNCUSER3: byte; //Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  553. ASYNCUSER4: byte; //Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  554. ASYNCUSER5: byte; //Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  555. ASYNCUSER6: byte; //Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  556. ASYNCUSER7: byte; //Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  557. ASYNCUSER8: byte; //Asynchronous User Ch 8 Input Selection - Event Out 0
  558. ASYNCUSER9: byte; //Asynchronous User Ch 9 Input Selection - Event Out 1
  559. ASYNCUSER10: byte; //Asynchronous User Ch 10 Input Selection - Event Out 2
  560. ASYNCUSER11: byte; //Asynchronous User Ch 11 Input Selection - TCB1
  561. ASYNCUSER12: byte; //Asynchronous User Ch 12 Input Selection - ADC1
  562. Reserved31: byte;
  563. Reserved32: byte;
  564. Reserved33: byte;
  565. SYNCUSER0: byte; //Synchronous User Ch 0 - TCA0
  566. SYNCUSER1: byte; //Synchronous User Ch 1 - USART0
  567. const
  568. // EVSYS_ASYNCCH0
  569. ASYNCCH0mask = $FF;
  570. ASYNCCH0_OFF = $00;
  571. ASYNCCH0_CCL_LUT0 = $01;
  572. ASYNCCH0_CCL_LUT1 = $02;
  573. ASYNCCH0_AC0_OUT = $03;
  574. ASYNCCH0_TCD0_CMPBCLR = $04;
  575. ASYNCCH0_TCD0_CMPASET = $05;
  576. ASYNCCH0_TCD0_CMPBSET = $06;
  577. ASYNCCH0_TCD0_PROGEV = $07;
  578. ASYNCCH0_RTC_OVF = $08;
  579. ASYNCCH0_RTC_CMP = $09;
  580. ASYNCCH0_PORTA_PIN0 = $0A;
  581. ASYNCCH0_PORTA_PIN1 = $0B;
  582. ASYNCCH0_PORTA_PIN2 = $0C;
  583. ASYNCCH0_PORTA_PIN3 = $0D;
  584. ASYNCCH0_PORTA_PIN4 = $0E;
  585. ASYNCCH0_PORTA_PIN5 = $0F;
  586. ASYNCCH0_PORTA_PIN6 = $10;
  587. ASYNCCH0_PORTA_PIN7 = $11;
  588. ASYNCCH0_UPDI = $12;
  589. ASYNCCH0_AC1_OUT = $13;
  590. ASYNCCH0_AC2_OUT = $14;
  591. // EVSYS_ASYNCCH1
  592. ASYNCCH1mask = $FF;
  593. ASYNCCH1_OFF = $00;
  594. ASYNCCH1_CCL_LUT0 = $01;
  595. ASYNCCH1_CCL_LUT1 = $02;
  596. ASYNCCH1_AC0_OUT = $03;
  597. ASYNCCH1_TCD0_CMPBCLR = $04;
  598. ASYNCCH1_TCD0_CMPASET = $05;
  599. ASYNCCH1_TCD0_CMPBSET = $06;
  600. ASYNCCH1_TCD0_PROGEV = $07;
  601. ASYNCCH1_RTC_OVF = $08;
  602. ASYNCCH1_RTC_CMP = $09;
  603. ASYNCCH1_PORTB_PIN0 = $0A;
  604. ASYNCCH1_PORTB_PIN1 = $0B;
  605. ASYNCCH1_PORTB_PIN2 = $0C;
  606. ASYNCCH1_PORTB_PIN3 = $0D;
  607. ASYNCCH1_PORTB_PIN4 = $0E;
  608. ASYNCCH1_PORTB_PIN5 = $0F;
  609. ASYNCCH1_PORTB_PIN6 = $10;
  610. ASYNCCH1_PORTB_PIN7 = $11;
  611. ASYNCCH1_AC1_OUT = $12;
  612. ASYNCCH1_AC2_OUT = $13;
  613. // EVSYS_ASYNCCH2
  614. ASYNCCH2mask = $FF;
  615. ASYNCCH2_OFF = $00;
  616. ASYNCCH2_CCL_LUT0 = $01;
  617. ASYNCCH2_CCL_LUT1 = $02;
  618. ASYNCCH2_AC0_OUT = $03;
  619. ASYNCCH2_TCD0_CMPBCLR = $04;
  620. ASYNCCH2_TCD0_CMPASET = $05;
  621. ASYNCCH2_TCD0_CMPBSET = $06;
  622. ASYNCCH2_TCD0_PROGEV = $07;
  623. ASYNCCH2_RTC_OVF = $08;
  624. ASYNCCH2_RTC_CMP = $09;
  625. ASYNCCH2_PORTC_PIN0 = $0A;
  626. ASYNCCH2_PORTC_PIN1 = $0B;
  627. ASYNCCH2_PORTC_PIN2 = $0C;
  628. ASYNCCH2_PORTC_PIN3 = $0D;
  629. ASYNCCH2_PORTC_PIN4 = $0E;
  630. ASYNCCH2_PORTC_PIN5 = $0F;
  631. ASYNCCH2_AC1_OUT = $10;
  632. ASYNCCH2_AC2_OUT = $11;
  633. // EVSYS_ASYNCCH3
  634. ASYNCCH3mask = $FF;
  635. ASYNCCH3_OFF = $00;
  636. ASYNCCH3_CCL_LUT0 = $01;
  637. ASYNCCH3_CCL_LUT1 = $02;
  638. ASYNCCH3_AC0_OUT = $03;
  639. ASYNCCH3_TCD0_CMPBCLR = $04;
  640. ASYNCCH3_TCD0_CMPASET = $05;
  641. ASYNCCH3_TCD0_CMPBSET = $06;
  642. ASYNCCH3_TCD0_PROGEV = $07;
  643. ASYNCCH3_RTC_OVF = $08;
  644. ASYNCCH3_RTC_CMP = $09;
  645. ASYNCCH3_PIT_DIV8192 = $0A;
  646. ASYNCCH3_PIT_DIV4096 = $0B;
  647. ASYNCCH3_PIT_DIV2048 = $0C;
  648. ASYNCCH3_PIT_DIV1024 = $0D;
  649. ASYNCCH3_PIT_DIV512 = $0E;
  650. ASYNCCH3_PIT_DIV256 = $0F;
  651. ASYNCCH3_PIT_DIV128 = $10;
  652. ASYNCCH3_PIT_DIV64 = $11;
  653. ASYNCCH3_AC1_OUT = $12;
  654. ASYNCCH3_AC2_OUT = $13;
  655. // EVSYS_ASYNCUSER0
  656. ASYNCUSER0mask = $FF;
  657. ASYNCUSER0_OFF = $00;
  658. ASYNCUSER0_SYNCCH0 = $01;
  659. ASYNCUSER0_SYNCCH1 = $02;
  660. ASYNCUSER0_ASYNCCH0 = $03;
  661. ASYNCUSER0_ASYNCCH1 = $04;
  662. ASYNCUSER0_ASYNCCH2 = $05;
  663. ASYNCUSER0_ASYNCCH3 = $06;
  664. // EVSYS_ASYNCUSER1
  665. ASYNCUSER1mask = $FF;
  666. ASYNCUSER1_OFF = $00;
  667. ASYNCUSER1_SYNCCH0 = $01;
  668. ASYNCUSER1_SYNCCH1 = $02;
  669. ASYNCUSER1_ASYNCCH0 = $03;
  670. ASYNCUSER1_ASYNCCH1 = $04;
  671. ASYNCUSER1_ASYNCCH2 = $05;
  672. ASYNCUSER1_ASYNCCH3 = $06;
  673. // EVSYS_ASYNCUSER2
  674. ASYNCUSER2mask = $FF;
  675. ASYNCUSER2_OFF = $00;
  676. ASYNCUSER2_SYNCCH0 = $01;
  677. ASYNCUSER2_SYNCCH1 = $02;
  678. ASYNCUSER2_ASYNCCH0 = $03;
  679. ASYNCUSER2_ASYNCCH1 = $04;
  680. ASYNCUSER2_ASYNCCH2 = $05;
  681. ASYNCUSER2_ASYNCCH3 = $06;
  682. // EVSYS_ASYNCUSER3
  683. ASYNCUSER3mask = $FF;
  684. ASYNCUSER3_OFF = $00;
  685. ASYNCUSER3_SYNCCH0 = $01;
  686. ASYNCUSER3_SYNCCH1 = $02;
  687. ASYNCUSER3_ASYNCCH0 = $03;
  688. ASYNCUSER3_ASYNCCH1 = $04;
  689. ASYNCUSER3_ASYNCCH2 = $05;
  690. ASYNCUSER3_ASYNCCH3 = $06;
  691. // EVSYS_ASYNCUSER4
  692. ASYNCUSER4mask = $FF;
  693. ASYNCUSER4_OFF = $00;
  694. ASYNCUSER4_SYNCCH0 = $01;
  695. ASYNCUSER4_SYNCCH1 = $02;
  696. ASYNCUSER4_ASYNCCH0 = $03;
  697. ASYNCUSER4_ASYNCCH1 = $04;
  698. ASYNCUSER4_ASYNCCH2 = $05;
  699. ASYNCUSER4_ASYNCCH3 = $06;
  700. // EVSYS_ASYNCUSER5
  701. ASYNCUSER5mask = $FF;
  702. ASYNCUSER5_OFF = $00;
  703. ASYNCUSER5_SYNCCH0 = $01;
  704. ASYNCUSER5_SYNCCH1 = $02;
  705. ASYNCUSER5_ASYNCCH0 = $03;
  706. ASYNCUSER5_ASYNCCH1 = $04;
  707. ASYNCUSER5_ASYNCCH2 = $05;
  708. ASYNCUSER5_ASYNCCH3 = $06;
  709. // EVSYS_ASYNCUSER6
  710. ASYNCUSER6mask = $FF;
  711. ASYNCUSER6_OFF = $00;
  712. ASYNCUSER6_SYNCCH0 = $01;
  713. ASYNCUSER6_SYNCCH1 = $02;
  714. ASYNCUSER6_ASYNCCH0 = $03;
  715. ASYNCUSER6_ASYNCCH1 = $04;
  716. ASYNCUSER6_ASYNCCH2 = $05;
  717. ASYNCUSER6_ASYNCCH3 = $06;
  718. // EVSYS_ASYNCUSER7
  719. ASYNCUSER7mask = $FF;
  720. ASYNCUSER7_OFF = $00;
  721. ASYNCUSER7_SYNCCH0 = $01;
  722. ASYNCUSER7_SYNCCH1 = $02;
  723. ASYNCUSER7_ASYNCCH0 = $03;
  724. ASYNCUSER7_ASYNCCH1 = $04;
  725. ASYNCUSER7_ASYNCCH2 = $05;
  726. ASYNCUSER7_ASYNCCH3 = $06;
  727. // EVSYS_ASYNCUSER8
  728. ASYNCUSER8mask = $FF;
  729. ASYNCUSER8_OFF = $00;
  730. ASYNCUSER8_SYNCCH0 = $01;
  731. ASYNCUSER8_SYNCCH1 = $02;
  732. ASYNCUSER8_ASYNCCH0 = $03;
  733. ASYNCUSER8_ASYNCCH1 = $04;
  734. ASYNCUSER8_ASYNCCH2 = $05;
  735. ASYNCUSER8_ASYNCCH3 = $06;
  736. // EVSYS_ASYNCUSER9
  737. ASYNCUSER9mask = $FF;
  738. ASYNCUSER9_OFF = $00;
  739. ASYNCUSER9_SYNCCH0 = $01;
  740. ASYNCUSER9_SYNCCH1 = $02;
  741. ASYNCUSER9_ASYNCCH0 = $03;
  742. ASYNCUSER9_ASYNCCH1 = $04;
  743. ASYNCUSER9_ASYNCCH2 = $05;
  744. ASYNCUSER9_ASYNCCH3 = $06;
  745. // EVSYS_ASYNCUSER10
  746. ASYNCUSER10mask = $FF;
  747. ASYNCUSER10_OFF = $00;
  748. ASYNCUSER10_SYNCCH0 = $01;
  749. ASYNCUSER10_SYNCCH1 = $02;
  750. ASYNCUSER10_ASYNCCH0 = $03;
  751. ASYNCUSER10_ASYNCCH1 = $04;
  752. ASYNCUSER10_ASYNCCH2 = $05;
  753. ASYNCUSER10_ASYNCCH3 = $06;
  754. // EVSYS_ASYNCUSER11
  755. ASYNCUSER11mask = $FF;
  756. ASYNCUSER11_OFF = $00;
  757. ASYNCUSER11_SYNCCH0 = $01;
  758. ASYNCUSER11_SYNCCH1 = $02;
  759. ASYNCUSER11_ASYNCCH0 = $03;
  760. ASYNCUSER11_ASYNCCH1 = $04;
  761. ASYNCUSER11_ASYNCCH2 = $05;
  762. ASYNCUSER11_ASYNCCH3 = $06;
  763. // EVSYS_ASYNCUSER12
  764. ASYNCUSER12mask = $FF;
  765. ASYNCUSER12_OFF = $00;
  766. ASYNCUSER12_SYNCCH0 = $01;
  767. ASYNCUSER12_SYNCCH1 = $02;
  768. ASYNCUSER12_ASYNCCH0 = $03;
  769. ASYNCUSER12_ASYNCCH1 = $04;
  770. ASYNCUSER12_ASYNCCH2 = $05;
  771. ASYNCUSER12_ASYNCCH3 = $06;
  772. // EVSYS_SYNCCH0
  773. SYNCCH0mask = $FF;
  774. SYNCCH0_OFF = $00;
  775. SYNCCH0_TCB0 = $01;
  776. SYNCCH0_TCA0_OVF_LUNF = $02;
  777. SYNCCH0_TCA0_HUNF = $03;
  778. SYNCCH0_TCA0_CMP0 = $04;
  779. SYNCCH0_TCA0_CMP1 = $05;
  780. SYNCCH0_TCA0_CMP2 = $06;
  781. SYNCCH0_PORTC_PIN0 = $07;
  782. SYNCCH0_PORTC_PIN1 = $08;
  783. SYNCCH0_PORTC_PIN2 = $09;
  784. SYNCCH0_PORTC_PIN3 = $0A;
  785. SYNCCH0_PORTC_PIN4 = $0B;
  786. SYNCCH0_PORTC_PIN5 = $0C;
  787. SYNCCH0_PORTA_PIN0 = $0D;
  788. SYNCCH0_PORTA_PIN1 = $0E;
  789. SYNCCH0_PORTA_PIN2 = $0F;
  790. SYNCCH0_PORTA_PIN3 = $10;
  791. SYNCCH0_PORTA_PIN4 = $11;
  792. SYNCCH0_PORTA_PIN5 = $12;
  793. SYNCCH0_PORTA_PIN6 = $13;
  794. SYNCCH0_PORTA_PIN7 = $14;
  795. SYNCCH0_TCB1 = $15;
  796. // EVSYS_SYNCCH1
  797. SYNCCH1mask = $FF;
  798. SYNCCH1_OFF = $00;
  799. SYNCCH1_TCB0 = $01;
  800. SYNCCH1_TCA0_OVF_LUNF = $02;
  801. SYNCCH1_TCA0_HUNF = $03;
  802. SYNCCH1_TCA0_CMP0 = $04;
  803. SYNCCH1_TCA0_CMP1 = $05;
  804. SYNCCH1_TCA0_CMP2 = $06;
  805. SYNCCH1_PORTB_PIN0 = $08;
  806. SYNCCH1_PORTB_PIN1 = $09;
  807. SYNCCH1_PORTB_PIN2 = $0A;
  808. SYNCCH1_PORTB_PIN3 = $0B;
  809. SYNCCH1_PORTB_PIN4 = $0C;
  810. SYNCCH1_PORTB_PIN5 = $0D;
  811. SYNCCH1_PORTB_PIN6 = $0E;
  812. SYNCCH1_PORTB_PIN7 = $0F;
  813. SYNCCH1_TCB1 = $10;
  814. // EVSYS_SYNCUSER0
  815. SYNCUSER0mask = $FF;
  816. SYNCUSER0_OFF = $00;
  817. SYNCUSER0_SYNCCH0 = $01;
  818. SYNCUSER0_SYNCCH1 = $02;
  819. // EVSYS_SYNCUSER1
  820. SYNCUSER1mask = $FF;
  821. SYNCUSER1_OFF = $00;
  822. SYNCUSER1_SYNCCH0 = $01;
  823. SYNCUSER1_SYNCCH1 = $02;
  824. end;
  825. TFUSE = object //Fuses
  826. WDTCFG: byte; //Watchdog Configuration
  827. BODCFG: byte; //BOD Configuration
  828. OSCCFG: byte; //Oscillator Configuration
  829. Reserved3: byte;
  830. TCD0CFG: byte; //TCD0 Configuration
  831. SYSCFG0: byte; //System Configuration 0
  832. SYSCFG1: byte; //System Configuration 1
  833. APPEND: byte; //Application Code Section End
  834. BOOTEND: byte; //Boot Section End
  835. const
  836. // FUSE_ACTIVE
  837. ACTIVEmask = $0C;
  838. ACTIVE_DIS = $00;
  839. ACTIVE_ENABLED = $04;
  840. ACTIVE_SAMPLED = $08;
  841. ACTIVE_ENWAKE = $0C;
  842. // FUSE_LVL
  843. LVLmask = $E0;
  844. LVL_BODLEVEL0 = $00;
  845. LVL_BODLEVEL1 = $20;
  846. LVL_BODLEVEL2 = $40;
  847. LVL_BODLEVEL3 = $60;
  848. LVL_BODLEVEL4 = $80;
  849. LVL_BODLEVEL5 = $A0;
  850. LVL_BODLEVEL6 = $C0;
  851. LVL_BODLEVEL7 = $E0;
  852. // FUSE_SAMPFREQ
  853. SAMPFREQmask = $10;
  854. SAMPFREQ_1KHZ = $00;
  855. SAMPFREQ_125HZ = $10;
  856. // FUSE_SLEEP
  857. SLEEPmask = $03;
  858. SLEEP_DIS = $00;
  859. SLEEP_ENABLED = $01;
  860. SLEEP_SAMPLED = $02;
  861. // FUSE_FREQSEL
  862. FREQSELmask = $03;
  863. FREQSEL_16MHZ = $01;
  864. FREQSEL_20MHZ = $02;
  865. // Oscillator Lock
  866. OSCLOCKbm = $80;
  867. // FUSE_CRCSRC
  868. CRCSRCmask = $C0;
  869. CRCSRC_FLASH = $00;
  870. CRCSRC_BOOT = $40;
  871. CRCSRC_BOOTAPP = $80;
  872. CRCSRC_NOCRC = $C0;
  873. // EEPROM Save
  874. EESAVEbm = $01;
  875. // FUSE_RSTPINCFG
  876. RSTPINCFGmask = $0C;
  877. RSTPINCFG_GPIO = $00;
  878. RSTPINCFG_UPDI = $04;
  879. RSTPINCFG_RST = $08;
  880. // FUSE_SUT
  881. SUTmask = $07;
  882. SUT_0MS = $00;
  883. SUT_1MS = $01;
  884. SUT_2MS = $02;
  885. SUT_4MS = $03;
  886. SUT_8MS = $04;
  887. SUT_16MS = $05;
  888. SUT_32MS = $06;
  889. SUT_64MS = $07;
  890. // Compare A Default Output Value
  891. CMPAbm = $01;
  892. // Compare A Output Enable
  893. CMPAENbm = $10;
  894. // Compare B Default Output Value
  895. CMPBbm = $02;
  896. // Compare B Output Enable
  897. CMPBENbm = $20;
  898. // Compare C Default Output Value
  899. CMPCbm = $04;
  900. // Compare C Output Enable
  901. CMPCENbm = $40;
  902. // Compare D Default Output Value
  903. CMPDbm = $08;
  904. // Compare D Output Enable
  905. CMPDENbm = $80;
  906. // FUSE_PERIOD
  907. PERIODmask = $0F;
  908. PERIOD_OFF = $00;
  909. PERIOD_8CLK = $01;
  910. PERIOD_16CLK = $02;
  911. PERIOD_32CLK = $03;
  912. PERIOD_64CLK = $04;
  913. PERIOD_128CLK = $05;
  914. PERIOD_256CLK = $06;
  915. PERIOD_512CLK = $07;
  916. PERIOD_1KCLK = $08;
  917. PERIOD_2KCLK = $09;
  918. PERIOD_4KCLK = $0A;
  919. PERIOD_8KCLK = $0B;
  920. // FUSE_WINDOW
  921. WINDOWmask = $F0;
  922. WINDOW_OFF = $00;
  923. WINDOW_8CLK = $10;
  924. WINDOW_16CLK = $20;
  925. WINDOW_32CLK = $30;
  926. WINDOW_64CLK = $40;
  927. WINDOW_128CLK = $50;
  928. WINDOW_256CLK = $60;
  929. WINDOW_512CLK = $70;
  930. WINDOW_1KCLK = $80;
  931. WINDOW_2KCLK = $90;
  932. WINDOW_4KCLK = $A0;
  933. WINDOW_8KCLK = $B0;
  934. end;
  935. TGPIO = object //General Purpose IO
  936. GPIOR0: byte; //General Purpose IO Register 0
  937. GPIOR1: byte; //General Purpose IO Register 1
  938. GPIOR2: byte; //General Purpose IO Register 2
  939. GPIOR3: byte; //General Purpose IO Register 3
  940. end;
  941. TLOCKBIT = object //Lockbit
  942. LOCKBIT: byte; //Lock bits
  943. const
  944. // LOCKBIT_LB
  945. LBmask = $FF;
  946. LB_RWLOCK = $3A;
  947. LB_NOLOCK = $C5;
  948. end;
  949. TNVMCTRL = object //Non-volatile Memory Controller
  950. CTRLA: byte; //Control A
  951. CTRLB: byte; //Control B
  952. STATUS: byte; //Status
  953. INTCTRL: byte; //Interrupt Control
  954. INTFLAGS: byte; //Interrupt Flags
  955. Reserved5: byte;
  956. DATA: word; //Data
  957. ADDR: word; //Address
  958. const
  959. // NVMCTRL_CMD
  960. CMDmask = $07;
  961. CMD_NONE = $00;
  962. CMD_PAGEWRITE = $01;
  963. CMD_PAGEERASE = $02;
  964. CMD_PAGEERASEWRITE = $03;
  965. CMD_PAGEBUFCLR = $04;
  966. CMD_CHIPERASE = $05;
  967. CMD_EEERASE = $06;
  968. CMD_FUSEWRITE = $07;
  969. // Application code write protect
  970. APCWPbm = $01;
  971. // Boot Lock
  972. BOOTLOCKbm = $02;
  973. // EEPROM Ready
  974. EEREADYbm = $01;
  975. // EEPROM busy
  976. EEBUSYbm = $02;
  977. // Flash busy
  978. FBUSYbm = $01;
  979. // Write error
  980. WRERRORbm = $04;
  981. end;
  982. TPORT = object //I/O Ports
  983. DIR: byte; //Data Direction
  984. DIRSET: byte; //Data Direction Set
  985. DIRCLR: byte; //Data Direction Clear
  986. DIRTGL: byte; //Data Direction Toggle
  987. OUT_: byte; //Output Value
  988. OUTSET: byte; //Output Value Set
  989. OUTCLR: byte; //Output Value Clear
  990. OUTTGL: byte; //Output Value Toggle
  991. IN_: byte; //Input Value
  992. INTFLAGS: byte; //Interrupt Flags
  993. Reserved10: byte;
  994. Reserved11: byte;
  995. Reserved12: byte;
  996. Reserved13: byte;
  997. Reserved14: byte;
  998. Reserved15: byte;
  999. PIN0CTRL: byte; //Pin 0 Control
  1000. PIN1CTRL: byte; //Pin 1 Control
  1001. PIN2CTRL: byte; //Pin 2 Control
  1002. PIN3CTRL: byte; //Pin 3 Control
  1003. PIN4CTRL: byte; //Pin 4 Control
  1004. PIN5CTRL: byte; //Pin 5 Control
  1005. PIN6CTRL: byte; //Pin 6 Control
  1006. PIN7CTRL: byte; //Pin 7 Control
  1007. const
  1008. // Pin Interrupt
  1009. INT0bm = $01;
  1010. INT1bm = $02;
  1011. INT2bm = $04;
  1012. INT3bm = $08;
  1013. INT4bm = $10;
  1014. INT5bm = $20;
  1015. INT6bm = $40;
  1016. INT7bm = $80;
  1017. // Inverted I/O Enable
  1018. INVENbm = $80;
  1019. // PORT_ISC
  1020. ISCmask = $07;
  1021. ISC_INTDISABLE = $00;
  1022. ISC_BOTHEDGES = $01;
  1023. ISC_RISING = $02;
  1024. ISC_FALLING = $03;
  1025. ISC_INPUT_DISABLE = $04;
  1026. ISC_LEVEL = $05;
  1027. // Pullup enable
  1028. PULLUPENbm = $08;
  1029. end;
  1030. TPORTMUX = object //Port Multiplexer
  1031. CTRLA: byte; //Port Multiplexer Control A
  1032. CTRLB: byte; //Port Multiplexer Control B
  1033. CTRLC: byte; //Port Multiplexer Control C
  1034. CTRLD: byte; //Port Multiplexer Control D
  1035. const
  1036. // Event Output 0
  1037. EVOUT0bm = $01;
  1038. // Event Output 1
  1039. EVOUT1bm = $02;
  1040. // Event Output 2
  1041. EVOUT2bm = $04;
  1042. // PORTMUX_LUT0
  1043. LUT0mask = $10;
  1044. LUT0_DEFAULT = $00;
  1045. LUT0_ALTERNATE = $10;
  1046. // PORTMUX_LUT1
  1047. LUT1mask = $20;
  1048. LUT1_DEFAULT = $00;
  1049. LUT1_ALTERNATE = $20;
  1050. // PORTMUX_SPI0
  1051. SPI0mask = $04;
  1052. SPI0_DEFAULT = $00;
  1053. SPI0_ALTERNATE = $04;
  1054. // PORTMUX_TWI0
  1055. TWI0mask = $10;
  1056. TWI0_DEFAULT = $00;
  1057. TWI0_ALTERNATE = $10;
  1058. // PORTMUX_USART0
  1059. USART0mask = $01;
  1060. USART0_DEFAULT = $00;
  1061. USART0_ALTERNATE = $01;
  1062. // PORTMUX_TCA00
  1063. TCA00mask = $01;
  1064. TCA00_DEFAULT = $00;
  1065. TCA00_ALTERNATE = $01;
  1066. // PORTMUX_TCA01
  1067. TCA01mask = $02;
  1068. TCA01_DEFAULT = $00;
  1069. TCA01_ALTERNATE = $02;
  1070. // PORTMUX_TCA02
  1071. TCA02mask = $04;
  1072. TCA02_DEFAULT = $00;
  1073. TCA02_ALTERNATE = $04;
  1074. // PORTMUX_TCA03
  1075. TCA03mask = $08;
  1076. TCA03_DEFAULT = $00;
  1077. TCA03_ALTERNATE = $08;
  1078. // PORTMUX_TCA04
  1079. TCA04mask = $10;
  1080. TCA04_DEFAULT = $00;
  1081. TCA04_ALTERNATE = $10;
  1082. // PORTMUX_TCA05
  1083. TCA05mask = $20;
  1084. TCA05_DEFAULT = $00;
  1085. TCA05_ALTERNATE = $20;
  1086. // PORTMUX_TCB0
  1087. TCB0mask = $01;
  1088. TCB0_DEFAULT = $00;
  1089. TCB0_ALTERNATE = $01;
  1090. // PORTMUX_TCB1
  1091. TCB1mask = $02;
  1092. TCB1_DEFAULT = $00;
  1093. TCB1_ALTERNATE = $02;
  1094. end;
  1095. TRSTCTRL = object //Reset controller
  1096. RSTFR: byte; //Reset Flags
  1097. SWRR: byte; //Software Reset
  1098. const
  1099. // Brown out detector Reset flag
  1100. BORFbm = $02;
  1101. // External Reset flag
  1102. EXTRFbm = $04;
  1103. // Power on Reset flag
  1104. PORFbm = $01;
  1105. // Software Reset flag
  1106. SWRFbm = $10;
  1107. // UPDI Reset flag
  1108. UPDIRFbm = $20;
  1109. // Watch dog Reset flag
  1110. WDRFbm = $08;
  1111. // Software reset enable
  1112. SWREbm = $01;
  1113. end;
  1114. TRTC = object //Real-Time Counter
  1115. CTRLA: byte; //Control A
  1116. STATUS: byte; //Status
  1117. INTCTRL: byte; //Interrupt Control
  1118. INTFLAGS: byte; //Interrupt Flags
  1119. TEMP: byte; //Temporary
  1120. DBGCTRL: byte; //Debug control
  1121. Reserved6: byte;
  1122. CLKSEL: byte; //Clock Select
  1123. CNT: word; //Counter
  1124. PER: word; //Period
  1125. CMP: word; //Compare
  1126. Reserved14: byte;
  1127. Reserved15: byte;
  1128. PITCTRLA: byte; //PIT Control A
  1129. PITSTATUS: byte; //PIT Status
  1130. PITINTCTRL: byte; //PIT Interrupt Control
  1131. PITINTFLAGS: byte; //PIT Interrupt Flags
  1132. Reserved20: byte;
  1133. PITDBGCTRL: byte; //PIT Debug control
  1134. const
  1135. // RTC_CLKSEL
  1136. CLKSELmask = $03;
  1137. CLKSEL_INT32K = $00;
  1138. CLKSEL_INT1K = $01;
  1139. CLKSEL_TOSC32K = $02;
  1140. CLKSEL_EXTCLK = $03;
  1141. // RTC_PRESCALER
  1142. PRESCALERmask = $78;
  1143. PRESCALER_DIV1 = $00;
  1144. PRESCALER_DIV2 = $08;
  1145. PRESCALER_DIV4 = $10;
  1146. PRESCALER_DIV8 = $18;
  1147. PRESCALER_DIV16 = $20;
  1148. PRESCALER_DIV32 = $28;
  1149. PRESCALER_DIV64 = $30;
  1150. PRESCALER_DIV128 = $38;
  1151. PRESCALER_DIV256 = $40;
  1152. PRESCALER_DIV512 = $48;
  1153. PRESCALER_DIV1024 = $50;
  1154. PRESCALER_DIV2048 = $58;
  1155. PRESCALER_DIV4096 = $60;
  1156. PRESCALER_DIV8192 = $68;
  1157. PRESCALER_DIV16384 = $70;
  1158. PRESCALER_DIV32768 = $78;
  1159. // Enable
  1160. RTCENbm = $01;
  1161. // Run In Standby
  1162. RUNSTDBYbm = $80;
  1163. // Run in debug
  1164. DBGRUNbm = $01;
  1165. // Compare Match Interrupt enable
  1166. CMPbm = $02;
  1167. // Overflow Interrupt enable
  1168. OVFbm = $01;
  1169. // RTC_PERIOD
  1170. PERIODmask = $78;
  1171. PERIOD_OFF = $00;
  1172. PERIOD_CYC4 = $08;
  1173. PERIOD_CYC8 = $10;
  1174. PERIOD_CYC16 = $18;
  1175. PERIOD_CYC32 = $20;
  1176. PERIOD_CYC64 = $28;
  1177. PERIOD_CYC128 = $30;
  1178. PERIOD_CYC256 = $38;
  1179. PERIOD_CYC512 = $40;
  1180. PERIOD_CYC1024 = $48;
  1181. PERIOD_CYC2048 = $50;
  1182. PERIOD_CYC4096 = $58;
  1183. PERIOD_CYC8192 = $60;
  1184. PERIOD_CYC16384 = $68;
  1185. PERIOD_CYC32768 = $70;
  1186. // Enable
  1187. PITENbm = $01;
  1188. // Periodic Interrupt
  1189. PIbm = $01;
  1190. // CTRLA Synchronization Busy Flag
  1191. CTRLBUSYbm = $01;
  1192. // Comparator Synchronization Busy Flag
  1193. CMPBUSYbm = $08;
  1194. // Count Synchronization Busy Flag
  1195. CNTBUSYbm = $02;
  1196. // CTRLA Synchronization Busy Flag
  1197. CTRLABUSYbm = $01;
  1198. // Period Synchronization Busy Flag
  1199. PERBUSYbm = $04;
  1200. end;
  1201. TSIGROW = object //Signature row
  1202. DEVICEID0: byte; //Device ID Byte 0
  1203. DEVICEID1: byte; //Device ID Byte 1
  1204. DEVICEID2: byte; //Device ID Byte 2
  1205. SERNUM0: byte; //Serial Number Byte 0
  1206. SERNUM1: byte; //Serial Number Byte 1
  1207. SERNUM2: byte; //Serial Number Byte 2
  1208. SERNUM3: byte; //Serial Number Byte 3
  1209. SERNUM4: byte; //Serial Number Byte 4
  1210. SERNUM5: byte; //Serial Number Byte 5
  1211. SERNUM6: byte; //Serial Number Byte 6
  1212. SERNUM7: byte; //Serial Number Byte 7
  1213. SERNUM8: byte; //Serial Number Byte 8
  1214. SERNUM9: byte; //Serial Number Byte 9
  1215. Reserved13: byte;
  1216. Reserved14: byte;
  1217. Reserved15: byte;
  1218. Reserved16: byte;
  1219. Reserved17: byte;
  1220. Reserved18: byte;
  1221. Reserved19: byte;
  1222. Reserved20: byte;
  1223. Reserved21: byte;
  1224. Reserved22: byte;
  1225. Reserved23: byte;
  1226. Reserved24: byte;
  1227. Reserved25: byte;
  1228. Reserved26: byte;
  1229. Reserved27: byte;
  1230. Reserved28: byte;
  1231. Reserved29: byte;
  1232. Reserved30: byte;
  1233. Reserved31: byte;
  1234. TEMPSENSE0: byte; //Temperature Sensor Calibration Byte 0
  1235. TEMPSENSE1: byte; //Temperature Sensor Calibration Byte 1
  1236. OSC16ERR3V: byte; //OSC16 error at 3V
  1237. OSC16ERR5V: byte; //OSC16 error at 5V
  1238. OSC20ERR3V: byte; //OSC20 error at 3V
  1239. OSC20ERR5V: byte; //OSC20 error at 5V
  1240. end;
  1241. TSLPCTRL = object //Sleep Controller
  1242. CTRLA: byte; //Control
  1243. const
  1244. // Sleep enable
  1245. SENbm = $01;
  1246. // SLPCTRL_SMODE
  1247. SMODEmask = $06;
  1248. SMODE_IDLE = $00;
  1249. SMODE_STDBY = $02;
  1250. SMODE_PDOWN = $04;
  1251. end;
  1252. TSPI = object //Serial Peripheral Interface
  1253. CTRLA: byte; //Control A
  1254. CTRLB: byte; //Control B
  1255. INTCTRL: byte; //Interrupt Control
  1256. INTFLAGS: byte; //Interrupt Flags
  1257. DATA: byte; //Data
  1258. const
  1259. // Enable Double Speed
  1260. CLK2Xbm = $10;
  1261. // Data Order Setting
  1262. DORDbm = $40;
  1263. // Enable Module
  1264. ENABLEbm = $01;
  1265. // Master Operation Enable
  1266. MASTERbm = $20;
  1267. // SPI_PRESC
  1268. PRESCmask = $06;
  1269. PRESC_DIV4 = $00;
  1270. PRESC_DIV16 = $02;
  1271. PRESC_DIV64 = $04;
  1272. PRESC_DIV128 = $06;
  1273. // Buffer Mode Enable
  1274. BUFENbm = $80;
  1275. // Buffer Write Mode
  1276. BUFWRbm = $40;
  1277. // SPI_MODE
  1278. MODEmask = $03;
  1279. MODE_0 = $00;
  1280. MODE_1 = $01;
  1281. MODE_2 = $02;
  1282. MODE_3 = $03;
  1283. // Slave Select Disable
  1284. SSDbm = $04;
  1285. // Data Register Empty Interrupt Enable
  1286. DREIEbm = $20;
  1287. // Interrupt Enable
  1288. IEbm = $01;
  1289. // Receive Complete Interrupt Enable
  1290. RXCIEbm = $80;
  1291. // Slave Select Trigger Interrupt Enable
  1292. SSIEbm = $10;
  1293. // Transfer Complete Interrupt Enable
  1294. TXCIEbm = $40;
  1295. // Buffer Overflow
  1296. BUFOVFbm = $01;
  1297. // Data Register Empty Interrupt Flag
  1298. DREIFbm = $20;
  1299. // Receive Complete Interrupt Flag
  1300. RXCIFbm = $80;
  1301. // Slave Select Trigger Interrupt Flag
  1302. SSIFbm = $10;
  1303. // Transfer Complete Interrupt Flag
  1304. TXCIFbm = $40;
  1305. // Interrupt Flag
  1306. IFbm = $80;
  1307. // Write Collision
  1308. WRCOLbm = $40;
  1309. end;
  1310. TSYSCFG = object //System Configuration Registers
  1311. Reserved0: byte;
  1312. REVID: byte; //Revision ID
  1313. EXTBRK: byte; //External Break
  1314. const
  1315. // External break enable
  1316. ENEXTBRKbm = $01;
  1317. end;
  1318. TTCA_SINGLE = object //16-bit Timer/Counter Type A - Single Mode
  1319. CTRLA: byte; //Control A
  1320. CTRLB: byte; //Control B
  1321. CTRLC: byte; //Control C
  1322. CTRLD: byte; //Control D
  1323. CTRLECLR: byte; //Control E Clear
  1324. CTRLESET: byte; //Control E Set
  1325. CTRLFCLR: byte; //Control F Clear
  1326. CTRLFSET: byte; //Control F Set
  1327. Reserved8: byte;
  1328. EVCTRL: byte; //Event Control
  1329. INTCTRL: byte; //Interrupt Control
  1330. INTFLAGS: byte; //Interrupt Flags
  1331. Reserved12: byte;
  1332. Reserved13: byte;
  1333. DBGCTRL: byte; //Degbug Control
  1334. TEMP: byte; //Temporary data for 16-bit Access
  1335. Reserved16: byte;
  1336. Reserved17: byte;
  1337. Reserved18: byte;
  1338. Reserved19: byte;
  1339. Reserved20: byte;
  1340. Reserved21: byte;
  1341. Reserved22: byte;
  1342. Reserved23: byte;
  1343. Reserved24: byte;
  1344. Reserved25: byte;
  1345. Reserved26: byte;
  1346. Reserved27: byte;
  1347. Reserved28: byte;
  1348. Reserved29: byte;
  1349. Reserved30: byte;
  1350. Reserved31: byte;
  1351. CNT: word; //Count
  1352. Reserved34: byte;
  1353. Reserved35: byte;
  1354. Reserved36: byte;
  1355. Reserved37: byte;
  1356. PER: word; //Period
  1357. CMP0: word; //Compare 0
  1358. CMP1: word; //Compare 1
  1359. CMP2: word; //Compare 2
  1360. Reserved46: byte;
  1361. Reserved47: byte;
  1362. Reserved48: byte;
  1363. Reserved49: byte;
  1364. Reserved50: byte;
  1365. Reserved51: byte;
  1366. Reserved52: byte;
  1367. Reserved53: byte;
  1368. PERBUF: word; //Period Buffer
  1369. CMP0BUF: word; //Compare 0 Buffer
  1370. CMP1BUF: word; //Compare 1 Buffer
  1371. CMP2BUF: word; //Compare 2 Buffer
  1372. const
  1373. // TCA_SINGLE_CLKSEL
  1374. SINGLE_CLKSELmask = $0E;
  1375. SINGLE_CLKSEL_DIV1 = $00;
  1376. SINGLE_CLKSEL_DIV2 = $02;
  1377. SINGLE_CLKSEL_DIV4 = $04;
  1378. SINGLE_CLKSEL_DIV8 = $06;
  1379. SINGLE_CLKSEL_DIV16 = $08;
  1380. SINGLE_CLKSEL_DIV64 = $0A;
  1381. SINGLE_CLKSEL_DIV256 = $0C;
  1382. SINGLE_CLKSEL_DIV1024 = $0E;
  1383. // Module Enable
  1384. ENABLEbm = $01;
  1385. // Auto Lock Update
  1386. ALUPDbm = $08;
  1387. // Compare 0 Enable
  1388. CMP0ENbm = $10;
  1389. // Compare 1 Enable
  1390. CMP1ENbm = $20;
  1391. // Compare 2 Enable
  1392. CMP2ENbm = $40;
  1393. // TCA_SINGLE_WGMODE
  1394. SINGLE_WGMODEmask = $07;
  1395. SINGLE_WGMODE_NORMAL = $00;
  1396. SINGLE_WGMODE_FRQ = $01;
  1397. SINGLE_WGMODE_SINGLESLOPE = $03;
  1398. SINGLE_WGMODE_DSTOP = $05;
  1399. SINGLE_WGMODE_DSBOTH = $06;
  1400. SINGLE_WGMODE_DSBOTTOM = $07;
  1401. // Compare 0 Waveform Output Value
  1402. CMP0OVbm = $01;
  1403. // Compare 1 Waveform Output Value
  1404. CMP1OVbm = $02;
  1405. // Compare 2 Waveform Output Value
  1406. CMP2OVbm = $04;
  1407. // Split Mode Enable
  1408. SPLITMbm = $01;
  1409. // TCA_SINGLE_CMD
  1410. SINGLE_CMDmask = $0C;
  1411. SINGLE_CMD_NONE = $00;
  1412. SINGLE_CMD_UPDATE = $04;
  1413. SINGLE_CMD_RESTART = $08;
  1414. SINGLE_CMD_RESET = $0C;
  1415. // Direction
  1416. DIRbm = $01;
  1417. // Lock Update
  1418. LUPDbm = $02;
  1419. // Compare 0 Buffer Valid
  1420. CMP0BVbm = $02;
  1421. // Compare 1 Buffer Valid
  1422. CMP1BVbm = $04;
  1423. // Compare 2 Buffer Valid
  1424. CMP2BVbm = $08;
  1425. // Period Buffer Valid
  1426. PERBVbm = $01;
  1427. // Debug Run
  1428. DBGRUNbm = $01;
  1429. // Count on Event Input
  1430. CNTEIbm = $01;
  1431. // TCA_SINGLE_EVACT
  1432. SINGLE_EVACTmask = $06;
  1433. SINGLE_EVACT_POSEDGE = $00;
  1434. SINGLE_EVACT_ANYEDGE = $02;
  1435. SINGLE_EVACT_HIGHLVL = $04;
  1436. SINGLE_EVACT_UPDOWN = $06;
  1437. // Compare 0 Interrupt
  1438. CMP0bm = $10;
  1439. // Compare 1 Interrupt
  1440. CMP1bm = $20;
  1441. // Compare 2 Interrupt
  1442. CMP2bm = $40;
  1443. // Overflow Interrupt
  1444. OVFbm = $01;
  1445. end;
  1446. TTCA_SPLIT = object //16-bit Timer/Counter Type A - Split Mode
  1447. CTRLA: byte; //Control A
  1448. CTRLB: byte; //Control B
  1449. CTRLC: byte; //Control C
  1450. CTRLD: byte; //Control D
  1451. CTRLECLR: byte; //Control E Clear
  1452. CTRLESET: byte; //Control E Set
  1453. Reserved6: byte;
  1454. Reserved7: byte;
  1455. Reserved8: byte;
  1456. Reserved9: byte;
  1457. INTCTRL: byte; //Interrupt Control
  1458. INTFLAGS: byte; //Interrupt Flags
  1459. Reserved12: byte;
  1460. Reserved13: byte;
  1461. DBGCTRL: byte; //Degbug Control
  1462. Reserved15: byte;
  1463. Reserved16: byte;
  1464. Reserved17: byte;
  1465. Reserved18: byte;
  1466. Reserved19: byte;
  1467. Reserved20: byte;
  1468. Reserved21: byte;
  1469. Reserved22: byte;
  1470. Reserved23: byte;
  1471. Reserved24: byte;
  1472. Reserved25: byte;
  1473. Reserved26: byte;
  1474. Reserved27: byte;
  1475. Reserved28: byte;
  1476. Reserved29: byte;
  1477. Reserved30: byte;
  1478. Reserved31: byte;
  1479. LCNT: byte; //Low Count
  1480. HCNT: byte; //High Count
  1481. Reserved34: byte;
  1482. Reserved35: byte;
  1483. Reserved36: byte;
  1484. Reserved37: byte;
  1485. LPER: byte; //Low Period
  1486. HPER: byte; //High Period
  1487. LCMP0: byte; //Low Compare
  1488. HCMP0: byte; //High Compare
  1489. LCMP1: byte; //Low Compare
  1490. HCMP1: byte; //High Compare
  1491. LCMP2: byte; //Low Compare
  1492. HCMP2: byte; //High Compare
  1493. const
  1494. // TCA_SPLIT_CLKSEL
  1495. SPLIT_CLKSELmask = $0E;
  1496. SPLIT_CLKSEL_DIV1 = $00;
  1497. SPLIT_CLKSEL_DIV2 = $02;
  1498. SPLIT_CLKSEL_DIV4 = $04;
  1499. SPLIT_CLKSEL_DIV8 = $06;
  1500. SPLIT_CLKSEL_DIV16 = $08;
  1501. SPLIT_CLKSEL_DIV64 = $0A;
  1502. SPLIT_CLKSEL_DIV256 = $0C;
  1503. SPLIT_CLKSEL_DIV1024 = $0E;
  1504. // Module Enable
  1505. ENABLEbm = $01;
  1506. // High Compare 0 Enable
  1507. HCMP0ENbm = $10;
  1508. // High Compare 1 Enable
  1509. HCMP1ENbm = $20;
  1510. // High Compare 2 Enable
  1511. HCMP2ENbm = $40;
  1512. // Low Compare 0 Enable
  1513. LCMP0ENbm = $01;
  1514. // Low Compare 1 Enable
  1515. LCMP1ENbm = $02;
  1516. // Low Compare 2 Enable
  1517. LCMP2ENbm = $04;
  1518. // High Compare 0 Output Value
  1519. HCMP0OVbm = $10;
  1520. // High Compare 1 Output Value
  1521. HCMP1OVbm = $20;
  1522. // High Compare 2 Output Value
  1523. HCMP2OVbm = $40;
  1524. // Low Compare 0 Output Value
  1525. LCMP0OVbm = $01;
  1526. // Low Compare 1 Output Value
  1527. LCMP1OVbm = $02;
  1528. // Low Compare 2 Output Value
  1529. LCMP2OVbm = $04;
  1530. // Split Mode Enable
  1531. SPLITMbm = $01;
  1532. // TCA_SPLIT_CMD
  1533. SPLIT_CMDmask = $0C;
  1534. SPLIT_CMD_NONE = $00;
  1535. SPLIT_CMD_UPDATE = $04;
  1536. SPLIT_CMD_RESTART = $08;
  1537. SPLIT_CMD_RESET = $0C;
  1538. // Debug Run
  1539. DBGRUNbm = $01;
  1540. // High Underflow Interrupt Enable
  1541. HUNFbm = $02;
  1542. // Low Compare 0 Interrupt Enable
  1543. LCMP0bm = $10;
  1544. // Low Compare 1 Interrupt Enable
  1545. LCMP1bm = $20;
  1546. // Low Compare 2 Interrupt Enable
  1547. LCMP2bm = $40;
  1548. // Low Underflow Interrupt Enable
  1549. LUNFbm = $01;
  1550. end;
  1551. TTCA = record //16-bit Timer/Counter Type A
  1552. case byte of
  1553. 0: (SINGLE: TTCA_SINGLE);
  1554. 1: (SPLIT: TTCA_SPLIT);
  1555. end;
  1556. TTCB = object //16-bit Timer Type B
  1557. CTRLA: byte; //Control A
  1558. CTRLB: byte; //Control Register B
  1559. Reserved2: byte;
  1560. Reserved3: byte;
  1561. EVCTRL: byte; //Event Control
  1562. INTCTRL: byte; //Interrupt Control
  1563. INTFLAGS: byte; //Interrupt Flags
  1564. STATUS: byte; //Status
  1565. DBGCTRL: byte; //Debug Control
  1566. TEMP: byte; //Temporary Value
  1567. CNT: word; //Count
  1568. CCMP: word; //Compare or Capture
  1569. const
  1570. // TCB_CLKSEL
  1571. CLKSELmask = $06;
  1572. CLKSEL_CLKDIV1 = $00;
  1573. CLKSEL_CLKDIV2 = $02;
  1574. CLKSEL_CLKTCA = $04;
  1575. // Enable
  1576. ENABLEbm = $01;
  1577. // Run Standby
  1578. RUNSTDBYbm = $40;
  1579. // Synchronize Update
  1580. SYNCUPDbm = $10;
  1581. // Asynchronous Enable
  1582. ASYNCbm = $40;
  1583. // Pin Output Enable
  1584. CCMPENbm = $10;
  1585. // Pin Initial State
  1586. CCMPINITbm = $20;
  1587. // TCB_CNTMODE
  1588. CNTMODEmask = $07;
  1589. CNTMODE_INT = $00;
  1590. CNTMODE_TIMEOUT = $01;
  1591. CNTMODE_CAPT = $02;
  1592. CNTMODE_FRQ = $03;
  1593. CNTMODE_PW = $04;
  1594. CNTMODE_FRQPW = $05;
  1595. CNTMODE_SINGLE = $06;
  1596. CNTMODE_PWM8 = $07;
  1597. // Debug Run
  1598. DBGRUNbm = $01;
  1599. // Event Input Enable
  1600. CAPTEIbm = $01;
  1601. // Event Edge
  1602. EDGEbm = $10;
  1603. // Input Capture Noise Cancellation Filter
  1604. FILTERbm = $40;
  1605. // Capture or Timeout
  1606. CAPTbm = $01;
  1607. // Run
  1608. RUNbm = $01;
  1609. end;
  1610. TTCD = object //Timer Counter D
  1611. CTRLA: byte; //Control A
  1612. CTRLB: byte; //Control B
  1613. CTRLC: byte; //Control C
  1614. CTRLD: byte; //Control D
  1615. CTRLE: byte; //Control E
  1616. Reserved5: byte;
  1617. Reserved6: byte;
  1618. Reserved7: byte;
  1619. EVCTRLA: byte; //EVCTRLA
  1620. EVCTRLB: byte; //EVCTRLB
  1621. Reserved10: byte;
  1622. Reserved11: byte;
  1623. INTCTRL: byte; //Interrupt Control
  1624. INTFLAGS: byte; //Interrupt Flags
  1625. STATUS: byte; //Status
  1626. Reserved15: byte;
  1627. INPUTCTRLA: byte; //Input Control A
  1628. INPUTCTRLB: byte; //Input Control B
  1629. FAULTCTRL: byte; //Fault Control
  1630. Reserved19: byte;
  1631. DLYCTRL: byte; //Delay Control
  1632. DLYVAL: byte; //Delay value
  1633. Reserved22: byte;
  1634. Reserved23: byte;
  1635. DITCTRL: byte; //Dither Control A
  1636. DITVAL: byte; //Dither value
  1637. Reserved26: byte;
  1638. Reserved27: byte;
  1639. Reserved28: byte;
  1640. Reserved29: byte;
  1641. DBGCTRL: byte; //Debug Control
  1642. Reserved31: byte;
  1643. Reserved32: byte;
  1644. Reserved33: byte;
  1645. CAPTUREA: word; //Capture A
  1646. CAPTUREB: word; //Capture B
  1647. Reserved38: byte;
  1648. Reserved39: byte;
  1649. CMPASET: word; //Compare A Set
  1650. CMPACLR: word; //Compare A Clear
  1651. CMPBSET: word; //Compare B Set
  1652. CMPBCLR: word; //Compare B Clear
  1653. const
  1654. // TCD_CLKSEL
  1655. CLKSELmask = $60;
  1656. CLKSEL_20MHZ = $00;
  1657. CLKSEL_EXTCLK = $40;
  1658. CLKSEL_SYSCLK = $60;
  1659. // TCD_CNTPRES
  1660. CNTPRESmask = $18;
  1661. CNTPRES_DIV1 = $00;
  1662. CNTPRES_DIV4 = $08;
  1663. CNTPRES_DIV32 = $10;
  1664. // Enable
  1665. ENABLEbm = $01;
  1666. // TCD_SYNCPRES
  1667. SYNCPRESmask = $06;
  1668. SYNCPRES_DIV1 = $00;
  1669. SYNCPRES_DIV2 = $02;
  1670. SYNCPRES_DIV4 = $04;
  1671. SYNCPRES_DIV8 = $06;
  1672. // TCD_WGMODE
  1673. WGMODEmask = $03;
  1674. WGMODE_ONERAMP = $00;
  1675. WGMODE_TWORAMP = $01;
  1676. WGMODE_FOURRAMP = $02;
  1677. WGMODE_DS = $03;
  1678. // Auto update
  1679. AUPDATEbm = $02;
  1680. // TCD_CMPCSEL
  1681. CMPCSELmask = $40;
  1682. CMPCSEL_PWMA = $00;
  1683. CMPCSEL_PWMB = $40;
  1684. // TCD_CMPDSEL
  1685. CMPDSELmask = $80;
  1686. CMPDSEL_PWMA = $00;
  1687. CMPDSEL_PWMB = $80;
  1688. // Compare output value override
  1689. CMPOVRbm = $01;
  1690. // Fifty percent waveform
  1691. FIFTYbm = $08;
  1692. // Compare A value
  1693. CMPAVAL0bm = $01;
  1694. CMPAVAL1bm = $02;
  1695. CMPAVAL2bm = $04;
  1696. CMPAVAL3bm = $08;
  1697. // Compare B value
  1698. CMPBVAL0bm = $10;
  1699. CMPBVAL1bm = $20;
  1700. CMPBVAL2bm = $40;
  1701. CMPBVAL3bm = $80;
  1702. // Disable at end of cycle
  1703. DISEOCbm = $80;
  1704. // Restart strobe
  1705. RESTARTbm = $04;
  1706. // Software Capture A Strobe
  1707. SCAPTUREAbm = $08;
  1708. // Software Capture B Strobe
  1709. SCAPTUREBbm = $10;
  1710. // synchronize strobe
  1711. SYNCbm = $02;
  1712. // synchronize end of cycle strobe
  1713. SYNCEOCbm = $01;
  1714. // Debug run
  1715. DBGRUNbm = $01;
  1716. // Fault detection
  1717. FAULTDETbm = $04;
  1718. // TCD_DITHERSEL
  1719. DITHERSELmask = $03;
  1720. DITHERSEL_ONTIMEB = $00;
  1721. DITHERSEL_ONTIMEAB = $01;
  1722. DITHERSEL_DEADTIMEB = $02;
  1723. DITHERSEL_DEADTIMEAB = $03;
  1724. // Dither value
  1725. DITHER0bm = $01;
  1726. DITHER1bm = $02;
  1727. DITHER2bm = $04;
  1728. DITHER3bm = $08;
  1729. // TCD_DLYPRESC
  1730. DLYPRESCmask = $30;
  1731. DLYPRESC_DIV1 = $00;
  1732. DLYPRESC_DIV2 = $10;
  1733. DLYPRESC_DIV4 = $20;
  1734. DLYPRESC_DIV8 = $30;
  1735. // TCD_DLYSEL
  1736. DLYSELmask = $03;
  1737. DLYSEL_OFF = $00;
  1738. DLYSEL_INBLANK = $01;
  1739. DLYSEL_EVENT = $02;
  1740. // TCD_DLYTRIG
  1741. DLYTRIGmask = $0C;
  1742. DLYTRIG_CMPASET = $00;
  1743. DLYTRIG_CMPACLR = $04;
  1744. DLYTRIG_CMPBSET = $08;
  1745. DLYTRIG_CMPBCLR = $0C;
  1746. // Delay value
  1747. DLYVAL0bm = $01;
  1748. DLYVAL1bm = $02;
  1749. DLYVAL2bm = $04;
  1750. DLYVAL3bm = $08;
  1751. DLYVAL4bm = $10;
  1752. DLYVAL5bm = $20;
  1753. DLYVAL6bm = $40;
  1754. DLYVAL7bm = $80;
  1755. // TCD_ACTION
  1756. ACTIONmask = $04;
  1757. ACTION_FAULT = $00;
  1758. ACTION_CAPTURE = $04;
  1759. // TCD_CFG
  1760. CFGmask = $C0;
  1761. CFG_NEITHER = $00;
  1762. CFG_FILTER = $40;
  1763. CFG_ASYNC = $80;
  1764. // TCD_EDGE
  1765. EDGEmask = $10;
  1766. EDGE_FALL_LOW = $00;
  1767. EDGE_RISE_HIGH = $10;
  1768. // Trigger event enable
  1769. TRIGEIbm = $01;
  1770. // Compare A value
  1771. CMPAbm = $01;
  1772. // Compare A enable
  1773. CMPAENbm = $10;
  1774. // Compare B value
  1775. CMPBbm = $02;
  1776. // Compare B enable
  1777. CMPBENbm = $20;
  1778. // Compare C value
  1779. CMPCbm = $04;
  1780. // Compare C enable
  1781. CMPCENbm = $40;
  1782. // Compare D vaule
  1783. CMPDbm = $08;
  1784. // Compare D enable
  1785. CMPDENbm = $80;
  1786. // TCD_INPUTMODE
  1787. INPUTMODEmask = $0F;
  1788. INPUTMODE_NONE = $00;
  1789. INPUTMODE_JMPWAIT = $01;
  1790. INPUTMODE_EXECWAIT = $02;
  1791. INPUTMODE_EXECFAULT = $03;
  1792. INPUTMODE_FREQ = $04;
  1793. INPUTMODE_EXECDT = $05;
  1794. INPUTMODE_WAIT = $06;
  1795. INPUTMODE_WAITSW = $07;
  1796. INPUTMODE_EDGETRIG = $08;
  1797. INPUTMODE_EDGETRIGFREQ = $09;
  1798. INPUTMODE_LVLTRIGFREQ = $0A;
  1799. // Overflow interrupt enable
  1800. OVFbm = $01;
  1801. // Trigger A interrupt enable
  1802. TRIGAbm = $04;
  1803. // Trigger B interrupt enable
  1804. TRIGBbm = $08;
  1805. // Command ready
  1806. CMDRDYbm = $02;
  1807. // Enable ready
  1808. ENRDYbm = $01;
  1809. // PWM activity on A
  1810. PWMACTAbm = $40;
  1811. // PWM activity on B
  1812. PWMACTBbm = $80;
  1813. end;
  1814. TTWI = object //Two-Wire Interface
  1815. CTRLA: byte; //Control A
  1816. Reserved1: byte;
  1817. DBGCTRL: byte; //Debug Control Register
  1818. MCTRLA: byte; //Master Control A
  1819. MCTRLB: byte; //Master Control B
  1820. MSTATUS: byte; //Master Status
  1821. MBAUD: byte; //Master Baurd Rate Control
  1822. MADDR: byte; //Master Address
  1823. MDATA: byte; //Master Data
  1824. SCTRLA: byte; //Slave Control A
  1825. SCTRLB: byte; //Slave Control B
  1826. SSTATUS: byte; //Slave Status
  1827. SADDR: byte; //Slave Address
  1828. SDATA: byte; //Slave Data
  1829. SADDRMASK: byte; //Slave Address Mask
  1830. const
  1831. // FM Plus Enable
  1832. FMPENbm = $02;
  1833. // TWI_DEFAULT_SDAHOLD
  1834. DEFAULT_SDAHOLDmask = $0C;
  1835. DEFAULT_SDAHOLD_OFF = $00;
  1836. DEFAULT_SDAHOLD_50NS = $04;
  1837. DEFAULT_SDAHOLD_300NS = $08;
  1838. DEFAULT_SDAHOLD_500NS = $0C;
  1839. // TWI_DEFAULT_SDASETUP
  1840. DEFAULT_SDASETUPmask = $10;
  1841. DEFAULT_SDASETUP_4CYC = $00;
  1842. DEFAULT_SDASETUP_8CYC = $10;
  1843. // Debug Run
  1844. DBGRUNbm = $01;
  1845. // Enable TWI Master
  1846. ENABLEbm = $01;
  1847. // Quick Command Enable
  1848. QCENbm = $10;
  1849. // Read Interrupt Enable
  1850. RIENbm = $80;
  1851. // Smart Mode Enable
  1852. SMENbm = $02;
  1853. // TWI_TIMEOUT
  1854. TIMEOUTmask = $0C;
  1855. TIMEOUT_DISABLED = $00;
  1856. TIMEOUT_50US = $04;
  1857. TIMEOUT_100US = $08;
  1858. TIMEOUT_200US = $0C;
  1859. // Write Interrupt Enable
  1860. WIENbm = $40;
  1861. // TWI_ACKACT
  1862. ACKACTmask = $04;
  1863. ACKACT_ACK = $00;
  1864. ACKACT_NACK = $04;
  1865. // Flush
  1866. FLUSHbm = $08;
  1867. // TWI_MCMD
  1868. MCMDmask = $03;
  1869. MCMD_NOACT = $00;
  1870. MCMD_REPSTART = $01;
  1871. MCMD_RECVTRANS = $02;
  1872. MCMD_STOP = $03;
  1873. // Arbitration Lost
  1874. ARBLOSTbm = $08;
  1875. // Bus Error
  1876. BUSERRbm = $04;
  1877. // TWI_BUSSTATE
  1878. BUSSTATEmask = $03;
  1879. BUSSTATE_UNKNOWN = $00;
  1880. BUSSTATE_IDLE = $01;
  1881. BUSSTATE_OWNER = $02;
  1882. BUSSTATE_BUSY = $03;
  1883. // Clock Hold
  1884. CLKHOLDbm = $20;
  1885. // Read Interrupt Flag
  1886. RIFbm = $80;
  1887. // Received Acknowledge
  1888. RXACKbm = $10;
  1889. // Write Interrupt Flag
  1890. WIFbm = $40;
  1891. // Address Enable
  1892. ADDRENbm = $01;
  1893. // Address Mask
  1894. ADDRMASK0bm = $02;
  1895. ADDRMASK1bm = $04;
  1896. ADDRMASK2bm = $08;
  1897. ADDRMASK3bm = $10;
  1898. ADDRMASK4bm = $20;
  1899. ADDRMASK5bm = $40;
  1900. ADDRMASK6bm = $80;
  1901. // Address/Stop Interrupt Enable
  1902. APIENbm = $40;
  1903. // Data Interrupt Enable
  1904. DIENbm = $80;
  1905. // Stop Interrupt Enable
  1906. PIENbm = $20;
  1907. // Promiscuous Mode Enable
  1908. PMENbm = $04;
  1909. // TWI_SCMD
  1910. SCMDmask = $03;
  1911. SCMD_NOACT = $00;
  1912. SCMD_COMPTRANS = $02;
  1913. SCMD_RESPONSE = $03;
  1914. // TWI_AP
  1915. APmask = $01;
  1916. AP_STOP = $00;
  1917. AP_ADR = $01;
  1918. // Address/Stop Interrupt Flag
  1919. APIFbm = $40;
  1920. // Collision
  1921. COLLbm = $08;
  1922. // Data Interrupt Flag
  1923. DIFbm = $80;
  1924. // Read/Write Direction
  1925. DIRbm = $02;
  1926. end;
  1927. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1928. RXDATAL: byte; //Receive Data Low Byte
  1929. RXDATAH: byte; //Receive Data High Byte
  1930. TXDATAL: byte; //Transmit Data Low Byte
  1931. TXDATAH: byte; //Transmit Data High Byte
  1932. STATUS: byte; //Status
  1933. CTRLA: byte; //Control A
  1934. CTRLB: byte; //Control B
  1935. CTRLC: byte; //Control C
  1936. BAUD: word; //Baud Rate
  1937. Reserved10: byte;
  1938. DBGCTRL: byte; //Debug Control
  1939. EVCTRL: byte; //Event Control
  1940. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1941. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1942. const
  1943. // Auto-baud Error Interrupt Enable
  1944. ABEIEbm = $04;
  1945. // Data Register Empty Interrupt Enable
  1946. DREIEbm = $20;
  1947. // Loop-back Mode Enable
  1948. LBMEbm = $08;
  1949. // USART_RS485
  1950. RS485mask = $03;
  1951. RS485_OFF = $00;
  1952. RS485_EXT = $01;
  1953. RS485_INT = $02;
  1954. // Receive Complete Interrupt Enable
  1955. RXCIEbm = $80;
  1956. // Receiver Start Frame Interrupt Enable
  1957. RXSIEbm = $10;
  1958. // Transmit Complete Interrupt Enable
  1959. TXCIEbm = $40;
  1960. // Multi-processor Communication Mode
  1961. MPCMbm = $01;
  1962. // Open Drain Mode Enable
  1963. ODMEbm = $08;
  1964. // Reciever enable
  1965. RXENbm = $80;
  1966. // USART_RXMODE
  1967. RXMODEmask = $06;
  1968. RXMODE_NORMAL = $00;
  1969. RXMODE_CLK2X = $02;
  1970. RXMODE_GENAUTO = $04;
  1971. RXMODE_LINAUTO = $06;
  1972. // Start Frame Detection Enable
  1973. SFDENbm = $10;
  1974. // Transmitter Enable
  1975. TXENbm = $40;
  1976. // USART_MSPI_CMODE
  1977. MSPI_CMODEmask = $C0;
  1978. MSPI_CMODE_ASYNCHRONOUS = $00;
  1979. MSPI_CMODE_SYNCHRONOUS = $40;
  1980. MSPI_CMODE_IRCOM = $80;
  1981. MSPI_CMODE_MSPI = $C0;
  1982. // SPI Master Mode, Clock Phase
  1983. UCPHAbm = $02;
  1984. // SPI Master Mode, Data Order
  1985. UDORDbm = $04;
  1986. // USART_NORMAL_CHSIZE
  1987. NORMAL_CHSIZEmask = $07;
  1988. NORMAL_CHSIZE_5BIT = $00;
  1989. NORMAL_CHSIZE_6BIT = $01;
  1990. NORMAL_CHSIZE_7BIT = $02;
  1991. NORMAL_CHSIZE_8BIT = $03;
  1992. NORMAL_CHSIZE_9BITL = $06;
  1993. NORMAL_CHSIZE_9BITH = $07;
  1994. // USART_NORMAL_CMODE
  1995. NORMAL_CMODEmask = $C0;
  1996. NORMAL_CMODE_ASYNCHRONOUS = $00;
  1997. NORMAL_CMODE_SYNCHRONOUS = $40;
  1998. NORMAL_CMODE_IRCOM = $80;
  1999. NORMAL_CMODE_MSPI = $C0;
  2000. // USART_NORMAL_PMODE
  2001. NORMAL_PMODEmask = $30;
  2002. NORMAL_PMODE_DISABLED = $00;
  2003. NORMAL_PMODE_EVEN = $20;
  2004. NORMAL_PMODE_ODD = $30;
  2005. // USART_NORMAL_SBMODE
  2006. NORMAL_SBMODEmask = $08;
  2007. NORMAL_SBMODE_1BIT = $00;
  2008. NORMAL_SBMODE_2BIT = $08;
  2009. // Autobaud majority voter bypass
  2010. ABMBPbm = $80;
  2011. // Debug Run
  2012. DBGRUNbm = $01;
  2013. // IrDA Event Input Enable
  2014. IREIbm = $01;
  2015. // Buffer Overflow
  2016. BUFOVFbm = $40;
  2017. // Receiver Data Register
  2018. DATA8bm = $01;
  2019. // Frame Error
  2020. FERRbm = $04;
  2021. // Parity Error
  2022. PERRbm = $02;
  2023. // Receive Complete Interrupt Flag
  2024. RXCIFbm = $80;
  2025. // RX Data
  2026. DATA0bm = $01;
  2027. DATA1bm = $02;
  2028. DATA2bm = $04;
  2029. DATA3bm = $08;
  2030. DATA4bm = $10;
  2031. DATA5bm = $20;
  2032. DATA6bm = $40;
  2033. DATA7bm = $80;
  2034. // Receiver Pulse Lenght
  2035. RXPL0bm = $01;
  2036. RXPL1bm = $02;
  2037. RXPL2bm = $04;
  2038. RXPL3bm = $08;
  2039. RXPL4bm = $10;
  2040. RXPL5bm = $20;
  2041. RXPL6bm = $40;
  2042. // Break Detected Flag
  2043. BDFbm = $02;
  2044. // Data Register Empty Flag
  2045. DREIFbm = $20;
  2046. // Inconsistent Sync Field Interrupt Flag
  2047. ISFIFbm = $08;
  2048. // Receive Start Interrupt
  2049. RXSIFbm = $10;
  2050. // Transmit Interrupt Flag
  2051. TXCIFbm = $40;
  2052. // Wait For Break
  2053. WFBbm = $01;
  2054. // Transmit pulse length
  2055. TXPL0bm = $01;
  2056. TXPL1bm = $02;
  2057. TXPL2bm = $04;
  2058. TXPL3bm = $08;
  2059. TXPL4bm = $10;
  2060. TXPL5bm = $20;
  2061. TXPL6bm = $40;
  2062. TXPL7bm = $80;
  2063. end;
  2064. TUSERROW = object //User Row
  2065. USERROW0: byte; //User Row Byte 0
  2066. USERROW1: byte; //User Row Byte 1
  2067. USERROW2: byte; //User Row Byte 2
  2068. USERROW3: byte; //User Row Byte 3
  2069. USERROW4: byte; //User Row Byte 4
  2070. USERROW5: byte; //User Row Byte 5
  2071. USERROW6: byte; //User Row Byte 6
  2072. USERROW7: byte; //User Row Byte 7
  2073. USERROW8: byte; //User Row Byte 8
  2074. USERROW9: byte; //User Row Byte 9
  2075. USERROW10: byte; //User Row Byte 10
  2076. USERROW11: byte; //User Row Byte 11
  2077. USERROW12: byte; //User Row Byte 12
  2078. USERROW13: byte; //User Row Byte 13
  2079. USERROW14: byte; //User Row Byte 14
  2080. USERROW15: byte; //User Row Byte 15
  2081. USERROW16: byte; //User Row Byte 16
  2082. USERROW17: byte; //User Row Byte 17
  2083. USERROW18: byte; //User Row Byte 18
  2084. USERROW19: byte; //User Row Byte 19
  2085. USERROW20: byte; //User Row Byte 20
  2086. USERROW21: byte; //User Row Byte 21
  2087. USERROW22: byte; //User Row Byte 22
  2088. USERROW23: byte; //User Row Byte 23
  2089. USERROW24: byte; //User Row Byte 24
  2090. USERROW25: byte; //User Row Byte 25
  2091. USERROW26: byte; //User Row Byte 26
  2092. USERROW27: byte; //User Row Byte 27
  2093. USERROW28: byte; //User Row Byte 28
  2094. USERROW29: byte; //User Row Byte 29
  2095. USERROW30: byte; //User Row Byte 30
  2096. USERROW31: byte; //User Row Byte 31
  2097. end;
  2098. TVPORT = object //Virtual Ports
  2099. DIR: byte; //Data Direction
  2100. OUT_: byte; //Output Value
  2101. IN_: byte; //Input Value
  2102. INTFLAGS: byte; //Interrupt Flags
  2103. const
  2104. // Pin Interrupt
  2105. INT0bm = $01;
  2106. INT1bm = $02;
  2107. INT2bm = $04;
  2108. INT3bm = $08;
  2109. INT4bm = $10;
  2110. INT5bm = $20;
  2111. INT6bm = $40;
  2112. INT7bm = $80;
  2113. end;
  2114. TVREF = object //Voltage reference
  2115. CTRLA: byte; //Control A
  2116. CTRLB: byte; //Control B
  2117. CTRLC: byte; //Control C
  2118. CTRLD: byte; //Control D
  2119. const
  2120. // VREF_ADC0REFSEL
  2121. ADC0REFSELmask = $70;
  2122. ADC0REFSEL_0V55 = $00;
  2123. ADC0REFSEL_1V1 = $10;
  2124. ADC0REFSEL_2V5 = $20;
  2125. ADC0REFSEL_4V34 = $30;
  2126. ADC0REFSEL_1V5 = $40;
  2127. // VREF_DAC0REFSEL
  2128. DAC0REFSELmask = $07;
  2129. DAC0REFSEL_0V55 = $00;
  2130. DAC0REFSEL_1V1 = $01;
  2131. DAC0REFSEL_2V5 = $02;
  2132. DAC0REFSEL_4V34 = $03;
  2133. DAC0REFSEL_1V5 = $04;
  2134. // ADC0 reference enable
  2135. ADC0REFENbm = $02;
  2136. // ADC1 reference enable
  2137. ADC1REFENbm = $10;
  2138. // DAC0/AC0 reference enable
  2139. DAC0REFENbm = $01;
  2140. // DAC1/AC1 reference enable
  2141. DAC1REFENbm = $08;
  2142. // DAC2/AC2 reference enable
  2143. DAC2REFENbm = $20;
  2144. // VREF_ADC1REFSEL
  2145. ADC1REFSELmask = $70;
  2146. ADC1REFSEL_0V55 = $00;
  2147. ADC1REFSEL_1V1 = $10;
  2148. ADC1REFSEL_2V5 = $20;
  2149. ADC1REFSEL_4V34 = $30;
  2150. ADC1REFSEL_1V5 = $40;
  2151. // VREF_DAC1REFSEL
  2152. DAC1REFSELmask = $07;
  2153. DAC1REFSEL_0V55 = $00;
  2154. DAC1REFSEL_1V1 = $01;
  2155. DAC1REFSEL_2V5 = $02;
  2156. DAC1REFSEL_4V34 = $03;
  2157. DAC1REFSEL_1V5 = $04;
  2158. // VREF_DAC2REFSEL
  2159. DAC2REFSELmask = $07;
  2160. DAC2REFSEL_0V55 = $00;
  2161. DAC2REFSEL_1V1 = $01;
  2162. DAC2REFSEL_2V5 = $02;
  2163. DAC2REFSEL_4V34 = $03;
  2164. DAC2REFSEL_1V5 = $04;
  2165. end;
  2166. TWDT = object //Watch-Dog Timer
  2167. CTRLA: byte; //Control A
  2168. STATUS: byte; //Status
  2169. const
  2170. // WDT_PERIOD
  2171. PERIODmask = $0F;
  2172. PERIOD_OFF = $00;
  2173. PERIOD_8CLK = $01;
  2174. PERIOD_16CLK = $02;
  2175. PERIOD_32CLK = $03;
  2176. PERIOD_64CLK = $04;
  2177. PERIOD_128CLK = $05;
  2178. PERIOD_256CLK = $06;
  2179. PERIOD_512CLK = $07;
  2180. PERIOD_1KCLK = $08;
  2181. PERIOD_2KCLK = $09;
  2182. PERIOD_4KCLK = $0A;
  2183. PERIOD_8KCLK = $0B;
  2184. // WDT_WINDOW
  2185. WINDOWmask = $F0;
  2186. WINDOW_OFF = $00;
  2187. WINDOW_8CLK = $10;
  2188. WINDOW_16CLK = $20;
  2189. WINDOW_32CLK = $30;
  2190. WINDOW_64CLK = $40;
  2191. WINDOW_128CLK = $50;
  2192. WINDOW_256CLK = $60;
  2193. WINDOW_512CLK = $70;
  2194. WINDOW_1KCLK = $80;
  2195. WINDOW_2KCLK = $90;
  2196. WINDOW_4KCLK = $A0;
  2197. WINDOW_8KCLK = $B0;
  2198. // Lock enable
  2199. LOCKbm = $80;
  2200. // Syncronization busy
  2201. SYNCBUSYbm = $01;
  2202. end;
  2203. const
  2204. Pin0idx = 0; Pin0bm = 1;
  2205. Pin1idx = 1; Pin1bm = 2;
  2206. Pin2idx = 2; Pin2bm = 4;
  2207. Pin3idx = 3; Pin3bm = 8;
  2208. Pin4idx = 4; Pin4bm = 16;
  2209. Pin5idx = 5; Pin5bm = 32;
  2210. Pin6idx = 6; Pin6bm = 64;
  2211. Pin7idx = 7; Pin7bm = 128;
  2212. var
  2213. VPORTA: TVPORT absolute $0000;
  2214. VPORTB: TVPORT absolute $0004;
  2215. VPORTC: TVPORT absolute $0008;
  2216. GPIO: TGPIO absolute $001C;
  2217. CPU: TCPU absolute $0030;
  2218. RSTCTRL: TRSTCTRL absolute $0040;
  2219. SLPCTRL: TSLPCTRL absolute $0050;
  2220. CLKCTRL: TCLKCTRL absolute $0060;
  2221. BOD: TBOD absolute $0080;
  2222. VREF: TVREF absolute $00A0;
  2223. WDT: TWDT absolute $0100;
  2224. CPUINT: TCPUINT absolute $0110;
  2225. CRCSCAN: TCRCSCAN absolute $0120;
  2226. RTC: TRTC absolute $0140;
  2227. EVSYS: TEVSYS absolute $0180;
  2228. CCL: TCCL absolute $01C0;
  2229. PORTMUX: TPORTMUX absolute $0200;
  2230. PORTA: TPORT absolute $0400;
  2231. PORTB: TPORT absolute $0420;
  2232. PORTC: TPORT absolute $0440;
  2233. ADC0: TADC absolute $0600;
  2234. ADC1: TADC absolute $0640;
  2235. AC0: TAC absolute $0680;
  2236. AC1: TAC absolute $0688;
  2237. AC2: TAC absolute $0690;
  2238. DAC0: TDAC absolute $06A0;
  2239. DAC1: TDAC absolute $06A8;
  2240. DAC2: TDAC absolute $06B0;
  2241. USART0: TUSART absolute $0800;
  2242. TWI0: TTWI absolute $0810;
  2243. SPI0: TSPI absolute $0820;
  2244. TCA0: TTCA absolute $0A00;
  2245. TCB0: TTCB absolute $0A40;
  2246. TCB1: TTCB absolute $0A50;
  2247. TCD0: TTCD absolute $0A80;
  2248. SYSCFG: TSYSCFG absolute $0F00;
  2249. NVMCTRL: TNVMCTRL absolute $1000;
  2250. SIGROW: TSIGROW absolute $1100;
  2251. FUSE: TFUSE absolute $1280;
  2252. LOCKBIT: TLOCKBIT absolute $128A;
  2253. USERROW: TUSERROW absolute $1300;
  2254. implementation
  2255. {$i avrcommon.inc}
  2256. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  2257. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  2258. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 3
  2259. procedure PORTB_PORT_ISR; external name 'PORTB_PORT_ISR'; // Interrupt 4
  2260. procedure PORTC_PORT_ISR; external name 'PORTC_PORT_ISR'; // Interrupt 5
  2261. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 6
  2262. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 7
  2263. procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 8
  2264. //procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 8
  2265. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 9
  2266. procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 10
  2267. //procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 10
  2268. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 11
  2269. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 11
  2270. procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 12
  2271. //procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 12
  2272. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 13
  2273. procedure TCB1_INT_ISR; external name 'TCB1_INT_ISR'; // Interrupt 14
  2274. procedure TCD0_OVF_ISR; external name 'TCD0_OVF_ISR'; // Interrupt 15
  2275. procedure TCD0_TRIG_ISR; external name 'TCD0_TRIG_ISR'; // Interrupt 16
  2276. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 17
  2277. procedure AC1_AC_ISR; external name 'AC1_AC_ISR'; // Interrupt 18
  2278. procedure AC2_AC_ISR; external name 'AC2_AC_ISR'; // Interrupt 19
  2279. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 20
  2280. procedure ADC0_WCOMP_ISR; external name 'ADC0_WCOMP_ISR'; // Interrupt 21
  2281. procedure ADC1_RESRDY_ISR; external name 'ADC1_RESRDY_ISR'; // Interrupt 22
  2282. procedure ADC1_WCOMP_ISR; external name 'ADC1_WCOMP_ISR'; // Interrupt 23
  2283. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 24
  2284. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 25
  2285. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 26
  2286. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 27
  2287. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 28
  2288. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 29
  2289. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 30
  2290. procedure _FPC_start; assembler; nostackframe;
  2291. label
  2292. _start;
  2293. asm
  2294. .init
  2295. .globl _start
  2296. jmp _start
  2297. jmp CRCSCAN_NMI_ISR
  2298. jmp BOD_VLM_ISR
  2299. jmp PORTA_PORT_ISR
  2300. jmp PORTB_PORT_ISR
  2301. jmp PORTC_PORT_ISR
  2302. jmp RTC_CNT_ISR
  2303. jmp RTC_PIT_ISR
  2304. jmp TCA0_LUNF_ISR
  2305. // jmp TCA0_OVF_ISR
  2306. jmp TCA0_HUNF_ISR
  2307. jmp TCA0_LCMP0_ISR
  2308. // jmp TCA0_CMP0_ISR
  2309. jmp TCA0_CMP1_ISR
  2310. // jmp TCA0_LCMP1_ISR
  2311. jmp TCA0_CMP2_ISR
  2312. // jmp TCA0_LCMP2_ISR
  2313. jmp TCB0_INT_ISR
  2314. jmp TCB1_INT_ISR
  2315. jmp TCD0_OVF_ISR
  2316. jmp TCD0_TRIG_ISR
  2317. jmp AC0_AC_ISR
  2318. jmp AC1_AC_ISR
  2319. jmp AC2_AC_ISR
  2320. jmp ADC0_RESRDY_ISR
  2321. jmp ADC0_WCOMP_ISR
  2322. jmp ADC1_RESRDY_ISR
  2323. jmp ADC1_WCOMP_ISR
  2324. jmp TWI0_TWIS_ISR
  2325. jmp TWI0_TWIM_ISR
  2326. jmp SPI0_INT_ISR
  2327. jmp USART0_RXC_ISR
  2328. jmp USART0_DRE_ISR
  2329. jmp USART0_TXC_ISR
  2330. jmp NVMCTRL_EE_ISR
  2331. {$i start.inc}
  2332. .weak CRCSCAN_NMI_ISR
  2333. .weak BOD_VLM_ISR
  2334. .weak PORTA_PORT_ISR
  2335. .weak PORTB_PORT_ISR
  2336. .weak PORTC_PORT_ISR
  2337. .weak RTC_CNT_ISR
  2338. .weak RTC_PIT_ISR
  2339. .weak TCA0_LUNF_ISR
  2340. // .weak TCA0_OVF_ISR
  2341. .weak TCA0_HUNF_ISR
  2342. .weak TCA0_LCMP0_ISR
  2343. // .weak TCA0_CMP0_ISR
  2344. .weak TCA0_CMP1_ISR
  2345. // .weak TCA0_LCMP1_ISR
  2346. .weak TCA0_CMP2_ISR
  2347. // .weak TCA0_LCMP2_ISR
  2348. .weak TCB0_INT_ISR
  2349. .weak TCB1_INT_ISR
  2350. .weak TCD0_OVF_ISR
  2351. .weak TCD0_TRIG_ISR
  2352. .weak AC0_AC_ISR
  2353. .weak AC1_AC_ISR
  2354. .weak AC2_AC_ISR
  2355. .weak ADC0_RESRDY_ISR
  2356. .weak ADC0_WCOMP_ISR
  2357. .weak ADC1_RESRDY_ISR
  2358. .weak ADC1_WCOMP_ISR
  2359. .weak TWI0_TWIS_ISR
  2360. .weak TWI0_TWIM_ISR
  2361. .weak SPI0_INT_ISR
  2362. .weak USART0_RXC_ISR
  2363. .weak USART0_DRE_ISR
  2364. .weak USART0_TXC_ISR
  2365. .weak NVMCTRL_EE_ISR
  2366. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  2367. .set BOD_VLM_ISR, Default_IRQ_handler
  2368. .set PORTA_PORT_ISR, Default_IRQ_handler
  2369. .set PORTB_PORT_ISR, Default_IRQ_handler
  2370. .set PORTC_PORT_ISR, Default_IRQ_handler
  2371. .set RTC_CNT_ISR, Default_IRQ_handler
  2372. .set RTC_PIT_ISR, Default_IRQ_handler
  2373. .set TCA0_LUNF_ISR, Default_IRQ_handler
  2374. // .set TCA0_OVF_ISR, Default_IRQ_handler
  2375. .set TCA0_HUNF_ISR, Default_IRQ_handler
  2376. .set TCA0_LCMP0_ISR, Default_IRQ_handler
  2377. // .set TCA0_CMP0_ISR, Default_IRQ_handler
  2378. .set TCA0_CMP1_ISR, Default_IRQ_handler
  2379. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  2380. .set TCA0_CMP2_ISR, Default_IRQ_handler
  2381. // .set TCA0_LCMP2_ISR, Default_IRQ_handler
  2382. .set TCB0_INT_ISR, Default_IRQ_handler
  2383. .set TCB1_INT_ISR, Default_IRQ_handler
  2384. .set TCD0_OVF_ISR, Default_IRQ_handler
  2385. .set TCD0_TRIG_ISR, Default_IRQ_handler
  2386. .set AC0_AC_ISR, Default_IRQ_handler
  2387. .set AC1_AC_ISR, Default_IRQ_handler
  2388. .set AC2_AC_ISR, Default_IRQ_handler
  2389. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  2390. .set ADC0_WCOMP_ISR, Default_IRQ_handler
  2391. .set ADC1_RESRDY_ISR, Default_IRQ_handler
  2392. .set ADC1_WCOMP_ISR, Default_IRQ_handler
  2393. .set TWI0_TWIS_ISR, Default_IRQ_handler
  2394. .set TWI0_TWIM_ISR, Default_IRQ_handler
  2395. .set SPI0_INT_ISR, Default_IRQ_handler
  2396. .set USART0_RXC_ISR, Default_IRQ_handler
  2397. .set USART0_DRE_ISR, Default_IRQ_handler
  2398. .set USART0_TXC_ISR, Default_IRQ_handler
  2399. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  2400. end;
  2401. end.