attiny402.pp 51 KB

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  1. unit ATtiny402;
  2. {$goto on}
  3. interface
  4. type
  5. TAC = object //Analog Comparator
  6. CTRLA: byte; //Control A
  7. Reserved1: byte;
  8. MUXCTRLA: byte; //Mux Control A
  9. Reserved3: byte;
  10. Reserved4: byte;
  11. Reserved5: byte;
  12. INTCTRL: byte; //Interrupt Control
  13. STATUS: byte; //Status
  14. const
  15. // Enable
  16. ENABLEbm = $01;
  17. // AC_HYSMODE
  18. HYSMODEmask = $06;
  19. HYSMODE_OFF = $00;
  20. HYSMODE_10mV = $02;
  21. HYSMODE_25mV = $04;
  22. HYSMODE_50mV = $06;
  23. // AC_INTMODE
  24. INTMODEmask = $30;
  25. INTMODE_BOTHEDGE = $00;
  26. INTMODE_NEGEDGE = $20;
  27. INTMODE_POSEDGE = $30;
  28. // Output Buffer Enable
  29. OUTENbm = $40;
  30. // Run in Standby Mode
  31. RUNSTDBYbm = $80;
  32. // Analog Comparator 0 Interrupt Enable
  33. CMPbm = $01;
  34. // Invert AC Output
  35. INVERTbm = $80;
  36. // AC_MUXNEG
  37. MUXNEGmask = $03;
  38. MUXNEG_PIN0 = $00;
  39. MUXNEG_VREF = $02;
  40. // AC_MUXPOS
  41. MUXPOSmask = $18;
  42. MUXPOS_PIN0 = $00;
  43. // Analog Comparator State
  44. STATEbm = $10;
  45. end;
  46. TADC = object //Analog to Digital Converter
  47. CTRLA: byte; //Control A
  48. CTRLB: byte; //Control B
  49. CTRLC: byte; //Control C
  50. CTRLD: byte; //Control D
  51. CTRLE: byte; //Control E
  52. SAMPCTRL: byte; //Sample Control
  53. MUXPOS: byte; //Positive mux input
  54. Reserved7: byte;
  55. COMMAND: byte; //Command
  56. EVCTRL: byte; //Event Control
  57. INTCTRL: byte; //Interrupt Control
  58. INTFLAGS: byte; //Interrupt Flags
  59. DBGCTRL: byte; //Debug Control
  60. TEMP: byte; //Temporary Data
  61. Reserved14: byte;
  62. Reserved15: byte;
  63. RES: word; //ADC Accumulator Result
  64. WINLT: word; //Window comparator low threshold
  65. WINHT: word; //Window comparator high threshold
  66. CALIB: byte; //Calibration
  67. const
  68. // ADC_DUTYCYC
  69. DUTYCYCmask = $01;
  70. DUTYCYC_DUTY50 = $00;
  71. DUTYCYC_DUTY25 = $01;
  72. // Start Conversion Operation
  73. STCONVbm = $01;
  74. // ADC Enable
  75. ENABLEbm = $01;
  76. // ADC Freerun mode
  77. FREERUNbm = $02;
  78. // ADC_RESSEL
  79. RESSELmask = $04;
  80. RESSEL_10BIT = $00;
  81. RESSEL_8BIT = $04;
  82. // Run standby mode
  83. RUNSTBYbm = $80;
  84. // ADC_SAMPNUM
  85. SAMPNUMmask = $07;
  86. SAMPNUM_ACC1 = $00;
  87. SAMPNUM_ACC2 = $01;
  88. SAMPNUM_ACC4 = $02;
  89. SAMPNUM_ACC8 = $03;
  90. SAMPNUM_ACC16 = $04;
  91. SAMPNUM_ACC32 = $05;
  92. SAMPNUM_ACC64 = $06;
  93. // ADC_PRESC
  94. PRESCmask = $07;
  95. PRESC_DIV2 = $00;
  96. PRESC_DIV4 = $01;
  97. PRESC_DIV8 = $02;
  98. PRESC_DIV16 = $03;
  99. PRESC_DIV32 = $04;
  100. PRESC_DIV64 = $05;
  101. PRESC_DIV128 = $06;
  102. PRESC_DIV256 = $07;
  103. // ADC_REFSEL
  104. REFSELmask = $30;
  105. REFSEL_INTREF = $00;
  106. REFSEL_VDDREF = $10;
  107. // Sample Capacitance Selection
  108. SAMPCAPbm = $40;
  109. // ADC_ASDV
  110. ASDVmask = $10;
  111. ASDV_ASVOFF = $00;
  112. ASDV_ASVON = $10;
  113. // ADC_INITDLY
  114. INITDLYmask = $E0;
  115. INITDLY_DLY0 = $00;
  116. INITDLY_DLY16 = $20;
  117. INITDLY_DLY32 = $40;
  118. INITDLY_DLY64 = $60;
  119. INITDLY_DLY128 = $80;
  120. INITDLY_DLY256 = $A0;
  121. // Sampling Delay Selection
  122. SAMPDLY0bm = $01;
  123. SAMPDLY1bm = $02;
  124. SAMPDLY2bm = $04;
  125. SAMPDLY3bm = $08;
  126. // ADC_WINCM
  127. WINCMmask = $07;
  128. WINCM_NONE = $00;
  129. WINCM_BELOW = $01;
  130. WINCM_ABOVE = $02;
  131. WINCM_INSIDE = $03;
  132. WINCM_OUTSIDE = $04;
  133. // Debug run
  134. DBGRUNbm = $01;
  135. // Start Event Input Enable
  136. STARTEIbm = $01;
  137. // Result Ready Interrupt Enable
  138. RESRDYbm = $01;
  139. // Window Comparator Interrupt Enable
  140. WCMPbm = $02;
  141. // ADC_MUXPOS
  142. MUXPOSmask = $1F;
  143. MUXPOS_AIN0 = $00;
  144. MUXPOS_AIN1 = $01;
  145. MUXPOS_AIN2 = $02;
  146. MUXPOS_AIN3 = $03;
  147. MUXPOS_AIN4 = $04;
  148. MUXPOS_AIN5 = $05;
  149. MUXPOS_AIN6 = $06;
  150. MUXPOS_AIN7 = $07;
  151. MUXPOS_AIN8 = $08;
  152. MUXPOS_AIN9 = $09;
  153. MUXPOS_AIN10 = $0A;
  154. MUXPOS_AIN11 = $0B;
  155. MUXPOS_DAC0 = $1C;
  156. MUXPOS_INTREF = $1D;
  157. MUXPOS_TEMPSENSE = $1E;
  158. MUXPOS_GND = $1F;
  159. // Sample lenght
  160. SAMPLEN0bm = $01;
  161. SAMPLEN1bm = $02;
  162. SAMPLEN2bm = $04;
  163. SAMPLEN3bm = $08;
  164. SAMPLEN4bm = $10;
  165. // Temporary
  166. TEMP0bm = $01;
  167. TEMP1bm = $02;
  168. TEMP2bm = $04;
  169. TEMP3bm = $08;
  170. TEMP4bm = $10;
  171. TEMP5bm = $20;
  172. TEMP6bm = $40;
  173. TEMP7bm = $80;
  174. end;
  175. TBOD = object //Bod interface
  176. CTRLA: byte; //Control A
  177. CTRLB: byte; //Control B
  178. Reserved2: byte;
  179. Reserved3: byte;
  180. Reserved4: byte;
  181. Reserved5: byte;
  182. Reserved6: byte;
  183. Reserved7: byte;
  184. VLMCTRLA: byte; //Voltage level monitor Control
  185. INTCTRL: byte; //Voltage level monitor interrupt Control
  186. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  187. STATUS: byte; //Voltage level monitor status
  188. const
  189. // BOD_ACTIVE
  190. ACTIVEmask = $0C;
  191. ACTIVE_DIS = $00;
  192. ACTIVE_ENABLED = $04;
  193. ACTIVE_SAMPLED = $08;
  194. ACTIVE_ENWAKE = $0C;
  195. // BOD_SAMPFREQ
  196. SAMPFREQmask = $10;
  197. SAMPFREQ_1KHZ = $00;
  198. SAMPFREQ_125Hz = $10;
  199. // BOD_SLEEP
  200. SLEEPmask = $03;
  201. SLEEP_DIS = $00;
  202. SLEEP_ENABLED = $01;
  203. SLEEP_SAMPLED = $02;
  204. // BOD_LVL
  205. LVLmask = $07;
  206. LVL_BODLEVEL0 = $00;
  207. LVL_BODLEVEL1 = $01;
  208. LVL_BODLEVEL2 = $02;
  209. LVL_BODLEVEL3 = $03;
  210. LVL_BODLEVEL4 = $04;
  211. LVL_BODLEVEL5 = $05;
  212. LVL_BODLEVEL6 = $06;
  213. LVL_BODLEVEL7 = $07;
  214. // BOD_VLMCFG
  215. VLMCFGmask = $06;
  216. VLMCFG_BELOW = $00;
  217. VLMCFG_ABOVE = $02;
  218. VLMCFG_CROSS = $04;
  219. // voltage level monitor interrrupt enable
  220. VLMIEbm = $01;
  221. // Voltage level monitor interrupt flag
  222. VLMIFbm = $01;
  223. // Voltage level monitor status
  224. VLMSbm = $01;
  225. // BOD_VLMLVL
  226. VLMLVLmask = $03;
  227. VLMLVL_5ABOVE = $00;
  228. VLMLVL_15ABOVE = $01;
  229. VLMLVL_25ABOVE = $02;
  230. end;
  231. TCCL = object //Configurable Custom Logic
  232. CTRLA: byte; //Control Register A
  233. SEQCTRL0: byte; //Sequential Control 0
  234. Reserved2: byte;
  235. Reserved3: byte;
  236. Reserved4: byte;
  237. LUT0CTRLA: byte; //LUT Control 0 A
  238. LUT0CTRLB: byte; //LUT Control 0 B
  239. LUT0CTRLC: byte; //LUT Control 0 C
  240. TRUTH0: byte; //Truth 0
  241. LUT1CTRLA: byte; //LUT Control 1 A
  242. LUT1CTRLB: byte; //LUT Control 1 B
  243. LUT1CTRLC: byte; //LUT Control 1 C
  244. TRUTH1: byte; //Truth 1
  245. const
  246. // Enable
  247. ENABLEbm = $01;
  248. // Run in Standby
  249. RUNSTDBYbm = $40;
  250. // Clock Source Selection
  251. CLKSRCbm = $40;
  252. // CCL_EDGEDET
  253. EDGEDETmask = $80;
  254. EDGEDET_DIS = $00;
  255. EDGEDET_EN = $80;
  256. // CCL_FILTSEL
  257. FILTSELmask = $30;
  258. FILTSEL_DISABLE = $00;
  259. FILTSEL_SYNCH = $10;
  260. FILTSEL_FILTER = $20;
  261. // Output Enable
  262. OUTENbm = $08;
  263. // CCL_INSEL0
  264. INSEL0mask = $0F;
  265. INSEL0_MASK = $00;
  266. INSEL0_FEEDBACK = $01;
  267. INSEL0_LINK = $02;
  268. INSEL0_EVENT0 = $03;
  269. INSEL0_EVENT1 = $04;
  270. INSEL0_IO = $05;
  271. INSEL0_AC0 = $06;
  272. INSEL0_TCB0 = $07;
  273. INSEL0_TCA0 = $08;
  274. INSEL0_TCD0 = $09;
  275. INSEL0_USART0 = $0A;
  276. INSEL0_SPI0 = $0B;
  277. // CCL_INSEL1
  278. INSEL1mask = $F0;
  279. INSEL1_MASK = $00;
  280. INSEL1_FEEDBACK = $10;
  281. INSEL1_LINK = $20;
  282. INSEL1_EVENT0 = $30;
  283. INSEL1_EVENT1 = $40;
  284. INSEL1_IO = $50;
  285. INSEL1_AC0 = $60;
  286. INSEL1_TCB0 = $70;
  287. INSEL1_TCA0 = $80;
  288. INSEL1_TCD0 = $90;
  289. INSEL1_USART0 = $A0;
  290. INSEL1_SPI0 = $B0;
  291. // CCL_INSEL2
  292. INSEL2mask = $0F;
  293. INSEL2_MASK = $00;
  294. INSEL2_FEEDBACK = $01;
  295. INSEL2_LINK = $02;
  296. INSEL2_EVENT0 = $03;
  297. INSEL2_EVENT1 = $04;
  298. INSEL2_IO = $05;
  299. INSEL2_AC0 = $06;
  300. INSEL2_TCB0 = $07;
  301. INSEL2_TCA0 = $08;
  302. INSEL2_TCD0 = $09;
  303. INSEL2_SPI0 = $0B;
  304. // CCL_SEQSEL
  305. SEQSELmask = $07;
  306. SEQSEL_DISABLE = $00;
  307. SEQSEL_DFF = $01;
  308. SEQSEL_JK = $02;
  309. SEQSEL_LATCH = $03;
  310. SEQSEL_RS = $04;
  311. end;
  312. TCLKCTRL = object //Clock controller
  313. MCLKCTRLA: byte; //MCLK Control A
  314. MCLKCTRLB: byte; //MCLK Control B
  315. MCLKLOCK: byte; //MCLK Lock
  316. MCLKSTATUS: byte; //MCLK Status
  317. Reserved4: byte;
  318. Reserved5: byte;
  319. Reserved6: byte;
  320. Reserved7: byte;
  321. Reserved8: byte;
  322. Reserved9: byte;
  323. Reserved10: byte;
  324. Reserved11: byte;
  325. Reserved12: byte;
  326. Reserved13: byte;
  327. Reserved14: byte;
  328. Reserved15: byte;
  329. OSC20MCTRLA: byte; //OSC20M Control A
  330. OSC20MCALIBA: byte; //OSC20M Calibration A
  331. OSC20MCALIBB: byte; //OSC20M Calibration B
  332. Reserved19: byte;
  333. Reserved20: byte;
  334. Reserved21: byte;
  335. Reserved22: byte;
  336. Reserved23: byte;
  337. OSC32KCTRLA: byte; //OSC32K Control A
  338. const
  339. // System clock out
  340. CLKOUTbm = $80;
  341. // CLKCTRL_CLKSEL
  342. CLKSELmask = $03;
  343. CLKSEL_OSC20M = $00;
  344. CLKSEL_OSCULP32K = $01;
  345. CLKSEL_XOSC32K = $02;
  346. CLKSEL_EXTCLK = $03;
  347. // CLKCTRL_PDIV
  348. PDIVmask = $1E;
  349. PDIV_2X = $00;
  350. PDIV_4X = $02;
  351. PDIV_8X = $04;
  352. PDIV_16X = $06;
  353. PDIV_32X = $08;
  354. PDIV_64X = $0A;
  355. PDIV_6X = $10;
  356. PDIV_10X = $12;
  357. PDIV_12X = $14;
  358. PDIV_24X = $16;
  359. PDIV_48X = $18;
  360. // Prescaler enable
  361. PENbm = $01;
  362. // lock ebable
  363. LOCKENbm = $01;
  364. // External Clock status
  365. EXTSbm = $80;
  366. // 20MHz oscillator status
  367. OSC20MSbm = $10;
  368. // 32KHz oscillator status
  369. OSC32KSbm = $20;
  370. // System Oscillator changing
  371. SOSCbm = $01;
  372. // 32.768 kHz Crystal Oscillator status
  373. XOSC32KSbm = $40;
  374. // Calibration
  375. CAL20M0bm = $01;
  376. CAL20M1bm = $02;
  377. CAL20M2bm = $04;
  378. CAL20M3bm = $08;
  379. CAL20M4bm = $10;
  380. CAL20M5bm = $20;
  381. // Lock
  382. LOCKbm = $80;
  383. // Oscillator temperature coefficient
  384. TEMPCAL20M0bm = $01;
  385. TEMPCAL20M1bm = $02;
  386. TEMPCAL20M2bm = $04;
  387. TEMPCAL20M3bm = $08;
  388. // Run standby
  389. RUNSTDBYbm = $02;
  390. end;
  391. TCPU = object //CPU
  392. Reserved0: byte;
  393. Reserved1: byte;
  394. Reserved2: byte;
  395. Reserved3: byte;
  396. CCP: byte; //Configuration Change Protection
  397. Reserved5: byte;
  398. Reserved6: byte;
  399. Reserved7: byte;
  400. Reserved8: byte;
  401. Reserved9: byte;
  402. Reserved10: byte;
  403. Reserved11: byte;
  404. Reserved12: byte;
  405. SPL: byte; //Stack Pointer Low
  406. SPH: byte; //Stack Pointer High
  407. SREG: byte; //Status Register
  408. const
  409. // CPU_CCP
  410. CCPmask = $FF;
  411. CCP_SPM = $9D;
  412. CCP_IOREG = $D8;
  413. // Carry Flag
  414. Cbm = $01;
  415. // Half Carry Flag
  416. Hbm = $20;
  417. // Global Interrupt Enable Flag
  418. Ibm = $80;
  419. // Negative Flag
  420. Nbm = $04;
  421. // N Exclusive Or V Flag
  422. Sbm = $10;
  423. // Transfer Bit
  424. Tbm = $40;
  425. // Two's Complement Overflow Flag
  426. Vbm = $08;
  427. // Zero Flag
  428. Zbm = $02;
  429. end;
  430. TCPUINT = object //Interrupt Controller
  431. CTRLA: byte; //Control A
  432. STATUS: byte; //Status
  433. LVL0PRI: byte; //Interrupt Level 0 Priority
  434. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  435. const
  436. // Compact Vector Table
  437. CVTbm = $20;
  438. // Interrupt Vector Select
  439. IVSELbm = $40;
  440. // Round-robin Scheduling Enable
  441. LVL0RRbm = $01;
  442. // Interrupt Level Priority
  443. LVL0PRI0bm = $01;
  444. LVL0PRI1bm = $02;
  445. LVL0PRI2bm = $04;
  446. LVL0PRI3bm = $08;
  447. LVL0PRI4bm = $10;
  448. LVL0PRI5bm = $20;
  449. LVL0PRI6bm = $40;
  450. LVL0PRI7bm = $80;
  451. // Interrupt Vector with High Priority
  452. LVL1VEC0bm = $01;
  453. LVL1VEC1bm = $02;
  454. LVL1VEC2bm = $04;
  455. LVL1VEC3bm = $08;
  456. LVL1VEC4bm = $10;
  457. LVL1VEC5bm = $20;
  458. LVL1VEC6bm = $40;
  459. LVL1VEC7bm = $80;
  460. // Level 0 Interrupt Executing
  461. LVL0EXbm = $01;
  462. // Level 1 Interrupt Executing
  463. LVL1EXbm = $02;
  464. // Non-maskable Interrupt Executing
  465. NMIEXbm = $80;
  466. end;
  467. TCRCSCAN = object //CRCSCAN
  468. CTRLA: byte; //Control A
  469. CTRLB: byte; //Control B
  470. STATUS: byte; //Status
  471. const
  472. // Enable CRC scan
  473. ENABLEbm = $01;
  474. // Enable NMI Trigger
  475. NMIENbm = $02;
  476. // Reset CRC scan
  477. RESETbm = $80;
  478. // CRCSCAN_MODE
  479. MODEmask = $30;
  480. MODE_PRIORITY = $00;
  481. MODE_RESERVED = $10;
  482. MODE_BACKGROUND = $20;
  483. MODE_CONTINUOUS = $30;
  484. // CRCSCAN_SRC
  485. SRCmask = $03;
  486. SRC_FLASH = $00;
  487. SRC_APPLICATION = $01;
  488. SRC_BOOT = $02;
  489. // CRC Busy
  490. BUSYbm = $01;
  491. // CRC Ok
  492. OKbm = $02;
  493. end;
  494. TEVSYS = object //Event System
  495. ASYNCSTROBE: byte; //Asynchronous Channel Strobe
  496. SYNCSTROBE: byte; //Synchronous Channel Strobe
  497. ASYNCCH0: byte; //Asynchronous Channel 0 Generator Selection
  498. ASYNCCH1: byte; //Asynchronous Channel 1 Generator Selection
  499. Reserved4: byte;
  500. Reserved5: byte;
  501. Reserved6: byte;
  502. Reserved7: byte;
  503. Reserved8: byte;
  504. Reserved9: byte;
  505. SYNCCH0: byte; //Synchronous Channel 0 Generator Selection
  506. SYNCCH1: byte; //Synchronous Channel 1 Generator Selection
  507. Reserved12: byte;
  508. Reserved13: byte;
  509. Reserved14: byte;
  510. Reserved15: byte;
  511. Reserved16: byte;
  512. Reserved17: byte;
  513. ASYNCUSER0: byte; //Asynchronous User Ch 0 Input Selection - TCB0
  514. ASYNCUSER1: byte; //Asynchronous User Ch 1 Input Selection - ADC0
  515. ASYNCUSER2: byte; //Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  516. ASYNCUSER3: byte; //Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  517. ASYNCUSER4: byte; //Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  518. ASYNCUSER5: byte; //Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  519. ASYNCUSER6: byte; //Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  520. ASYNCUSER7: byte; //Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  521. ASYNCUSER8: byte; //Asynchronous User Ch 8 Input Selection - Event Out 0
  522. ASYNCUSER9: byte; //Asynchronous User Ch 9 Input Selection - Event Out 1
  523. ASYNCUSER10: byte; //Asynchronous User Ch 10 Input Selection - Event Out 2
  524. Reserved29: byte;
  525. Reserved30: byte;
  526. Reserved31: byte;
  527. Reserved32: byte;
  528. Reserved33: byte;
  529. SYNCUSER0: byte; //Synchronous User Ch 0 Input Selection - TCA0
  530. const
  531. // EVSYS_ASYNCCH0
  532. ASYNCCH0mask = $FF;
  533. ASYNCCH0_OFF = $00;
  534. ASYNCCH0_CCL_LUT0 = $01;
  535. ASYNCCH0_CCL_LUT1 = $02;
  536. ASYNCCH0_AC0_OUT = $03;
  537. ASYNCCH0_TCD0_CMPBCLR = $04;
  538. ASYNCCH0_TCD0_CMPASET = $05;
  539. ASYNCCH0_TCD0_CMPBSET = $06;
  540. ASYNCCH0_TCD0_PROGEV = $07;
  541. ASYNCCH0_RTC_OVF = $08;
  542. ASYNCCH0_RTC_CMP = $09;
  543. ASYNCCH0_PORTA_PIN0 = $0A;
  544. ASYNCCH0_PORTA_PIN1 = $0B;
  545. ASYNCCH0_PORTA_PIN2 = $0C;
  546. ASYNCCH0_PORTA_PIN3 = $0D;
  547. ASYNCCH0_PORTA_PIN4 = $0E;
  548. ASYNCCH0_PORTA_PIN5 = $0F;
  549. ASYNCCH0_PORTA_PIN6 = $10;
  550. ASYNCCH0_PORTA_PIN7 = $11;
  551. ASYNCCH0_UPDI = $12;
  552. // EVSYS_ASYNCCH1
  553. ASYNCCH1mask = $FF;
  554. ASYNCCH1_OFF = $00;
  555. ASYNCCH1_CCL_LUT0 = $01;
  556. ASYNCCH1_CCL_LUT1 = $02;
  557. ASYNCCH1_AC0_OUT = $03;
  558. ASYNCCH1_TCD0_CMPBCLR = $04;
  559. ASYNCCH1_TCD0_CMPASET = $05;
  560. ASYNCCH1_TCD0_CMPBSET = $06;
  561. ASYNCCH1_TCD0_PROGEV = $07;
  562. ASYNCCH1_RTC_OVF = $08;
  563. ASYNCCH1_RTC_CMP = $09;
  564. ASYNCCH1_PORTB_PIN0 = $0A;
  565. ASYNCCH1_PORTB_PIN1 = $0B;
  566. ASYNCCH1_PORTB_PIN2 = $0C;
  567. ASYNCCH1_PORTB_PIN3 = $0D;
  568. ASYNCCH1_PORTB_PIN4 = $0E;
  569. ASYNCCH1_PORTB_PIN5 = $0F;
  570. ASYNCCH1_PORTB_PIN6 = $10;
  571. ASYNCCH1_PORTB_PIN7 = $11;
  572. // EVSYS_ASYNCUSER0
  573. ASYNCUSER0mask = $FF;
  574. ASYNCUSER0_OFF = $00;
  575. ASYNCUSER0_SYNCCH0 = $01;
  576. ASYNCUSER0_ASYNCCH0 = $03;
  577. ASYNCUSER0_ASYNCCH1 = $04;
  578. // EVSYS_ASYNCUSER1
  579. ASYNCUSER1mask = $FF;
  580. ASYNCUSER1_OFF = $00;
  581. ASYNCUSER1_SYNCCH0 = $01;
  582. ASYNCUSER1_ASYNCCH0 = $03;
  583. ASYNCUSER1_ASYNCCH1 = $04;
  584. // EVSYS_ASYNCUSER2
  585. ASYNCUSER2mask = $FF;
  586. ASYNCUSER2_OFF = $00;
  587. ASYNCUSER2_SYNCCH0 = $01;
  588. ASYNCUSER2_ASYNCCH0 = $03;
  589. ASYNCUSER2_ASYNCCH1 = $04;
  590. // EVSYS_ASYNCUSER3
  591. ASYNCUSER3mask = $FF;
  592. ASYNCUSER3_OFF = $00;
  593. ASYNCUSER3_SYNCCH0 = $01;
  594. ASYNCUSER3_ASYNCCH0 = $03;
  595. ASYNCUSER3_ASYNCCH1 = $04;
  596. // EVSYS_ASYNCUSER4
  597. ASYNCUSER4mask = $FF;
  598. ASYNCUSER4_OFF = $00;
  599. ASYNCUSER4_SYNCCH0 = $01;
  600. ASYNCUSER4_ASYNCCH0 = $03;
  601. ASYNCUSER4_ASYNCCH1 = $04;
  602. // EVSYS_ASYNCUSER5
  603. ASYNCUSER5mask = $FF;
  604. ASYNCUSER5_OFF = $00;
  605. ASYNCUSER5_SYNCCH0 = $01;
  606. ASYNCUSER5_ASYNCCH0 = $03;
  607. ASYNCUSER5_ASYNCCH1 = $04;
  608. // EVSYS_ASYNCUSER6
  609. ASYNCUSER6mask = $FF;
  610. ASYNCUSER6_OFF = $00;
  611. ASYNCUSER6_SYNCCH0 = $01;
  612. ASYNCUSER6_ASYNCCH0 = $03;
  613. ASYNCUSER6_ASYNCCH1 = $04;
  614. // EVSYS_ASYNCUSER7
  615. ASYNCUSER7mask = $FF;
  616. ASYNCUSER7_OFF = $00;
  617. ASYNCUSER7_SYNCCH0 = $01;
  618. ASYNCUSER7_ASYNCCH0 = $03;
  619. ASYNCUSER7_ASYNCCH1 = $04;
  620. // EVSYS_ASYNCUSER8
  621. ASYNCUSER8mask = $FF;
  622. ASYNCUSER8_OFF = $00;
  623. ASYNCUSER8_SYNCCH0 = $01;
  624. ASYNCUSER8_ASYNCCH0 = $03;
  625. ASYNCUSER8_ASYNCCH1 = $04;
  626. // EVSYS_ASYNCUSER9
  627. ASYNCUSER9mask = $FF;
  628. ASYNCUSER9_OFF = $00;
  629. ASYNCUSER9_SYNCCH0 = $01;
  630. ASYNCUSER9_ASYNCCH0 = $03;
  631. ASYNCUSER9_ASYNCCH1 = $04;
  632. // EVSYS_ASYNCUSER10
  633. ASYNCUSER10mask = $FF;
  634. ASYNCUSER10_OFF = $00;
  635. ASYNCUSER10_SYNCCH0 = $01;
  636. ASYNCUSER10_ASYNCCH0 = $03;
  637. ASYNCUSER10_ASYNCCH1 = $04;
  638. // EVSYS_SYNCCH0
  639. SYNCCH0mask = $FF;
  640. SYNCCH0_OFF = $00;
  641. SYNCCH0_TCB0 = $01;
  642. SYNCCH0_TCA0_OVF_LUNF = $02;
  643. SYNCCH0_TCA0_HUNF = $03;
  644. SYNCCH0_TCA0_CMP0 = $04;
  645. SYNCCH0_TCA0_CMP1 = $05;
  646. SYNCCH0_TCA0_CMP2 = $06;
  647. SYNCCH0_PORTC_PIN0 = $07;
  648. SYNCCH0_PORTC_PIN1 = $08;
  649. SYNCCH0_PORTC_PIN2 = $09;
  650. SYNCCH0_PORTC_PIN3 = $0A;
  651. SYNCCH0_PORTC_PIN4 = $0B;
  652. SYNCCH0_PORTC_PIN5 = $0C;
  653. SYNCCH0_PORTA_PIN0 = $0D;
  654. SYNCCH0_PORTA_PIN1 = $0E;
  655. SYNCCH0_PORTA_PIN2 = $0F;
  656. SYNCCH0_PORTA_PIN3 = $10;
  657. SYNCCH0_PORTA_PIN4 = $11;
  658. SYNCCH0_PORTA_PIN5 = $12;
  659. SYNCCH0_PORTA_PIN6 = $13;
  660. SYNCCH0_PORTA_PIN7 = $14;
  661. // EVSYS_SYNCCH1
  662. SYNCCH1mask = $FF;
  663. SYNCCH1_OFF = $00;
  664. SYNCCH1_TCB0 = $01;
  665. SYNCCH1_TCA0_OVF_LUNF = $02;
  666. SYNCCH1_TCA0_HUNF = $03;
  667. SYNCCH1_TCA0_CMP0 = $04;
  668. SYNCCH1_TCA0_CMP1 = $05;
  669. SYNCCH1_TCA0_CMP2 = $06;
  670. SYNCCH1_PORTB_PIN0 = $08;
  671. SYNCCH1_PORTB_PIN1 = $09;
  672. SYNCCH1_PORTB_PIN2 = $0A;
  673. SYNCCH1_PORTB_PIN3 = $0B;
  674. SYNCCH1_PORTB_PIN4 = $0C;
  675. SYNCCH1_PORTB_PIN5 = $0D;
  676. SYNCCH1_PORTB_PIN6 = $0E;
  677. SYNCCH1_PORTB_PIN7 = $0F;
  678. // EVSYS_SYNCUSER0
  679. SYNCUSER0mask = $FF;
  680. SYNCUSER0_OFF = $00;
  681. SYNCUSER0_SYNCCH0 = $01;
  682. end;
  683. TFUSE = object //Fuses
  684. WDTCFG: byte; //Watchdog Configuration
  685. BODCFG: byte; //BOD Configuration
  686. OSCCFG: byte; //Oscillator Configuration
  687. Reserved3: byte;
  688. TCD0CFG: byte; //TCD0 Configuration
  689. SYSCFG0: byte; //System Configuration 0
  690. SYSCFG1: byte; //System Configuration 1
  691. APPEND: byte; //Application Code Section End
  692. BOOTEND: byte; //Boot Section End
  693. const
  694. // FUSE_ACTIVE
  695. ACTIVEmask = $0C;
  696. ACTIVE_DIS = $00;
  697. ACTIVE_ENABLED = $04;
  698. ACTIVE_SAMPLED = $08;
  699. ACTIVE_ENWAKE = $0C;
  700. // FUSE_LVL
  701. LVLmask = $E0;
  702. LVL_BODLEVEL0 = $00;
  703. LVL_BODLEVEL1 = $20;
  704. LVL_BODLEVEL2 = $40;
  705. LVL_BODLEVEL3 = $60;
  706. LVL_BODLEVEL4 = $80;
  707. LVL_BODLEVEL5 = $A0;
  708. LVL_BODLEVEL6 = $C0;
  709. LVL_BODLEVEL7 = $E0;
  710. // FUSE_SAMPFREQ
  711. SAMPFREQmask = $10;
  712. SAMPFREQ_1KHz = $00;
  713. SAMPFREQ_125Hz = $10;
  714. // FUSE_SLEEP
  715. SLEEPmask = $03;
  716. SLEEP_DIS = $00;
  717. SLEEP_ENABLED = $01;
  718. SLEEP_SAMPLED = $02;
  719. // FUSE_FREQSEL
  720. FREQSELmask = $03;
  721. FREQSEL_16MHZ = $01;
  722. FREQSEL_20MHZ = $02;
  723. // Oscillator Lock
  724. OSCLOCKbm = $80;
  725. // FUSE_CRCSRC
  726. CRCSRCmask = $C0;
  727. CRCSRC_FLASH = $00;
  728. CRCSRC_BOOT = $40;
  729. CRCSRC_BOOTAPP = $80;
  730. CRCSRC_NOCRC = $C0;
  731. // EEPROM Save
  732. EESAVEbm = $01;
  733. // FUSE_RSTPINCFG
  734. RSTPINCFGmask = $0C;
  735. RSTPINCFG_GPIO = $00;
  736. RSTPINCFG_UPDI = $04;
  737. RSTPINCFG_RST = $08;
  738. // FUSE_SUT
  739. SUTmask = $07;
  740. SUT_0MS = $00;
  741. SUT_1MS = $01;
  742. SUT_2MS = $02;
  743. SUT_4MS = $03;
  744. SUT_8MS = $04;
  745. SUT_16MS = $05;
  746. SUT_32MS = $06;
  747. SUT_64MS = $07;
  748. // Compare A Default Output Value
  749. CMPAbm = $01;
  750. // Compare A Output Enable
  751. CMPAENbm = $10;
  752. // Compare B Default Output Value
  753. CMPBbm = $02;
  754. // Compare B Output Enable
  755. CMPBENbm = $20;
  756. // Compare C Default Output Value
  757. CMPCbm = $04;
  758. // Compare C Output Enable
  759. CMPCENbm = $40;
  760. // Compare D Default Output Value
  761. CMPDbm = $08;
  762. // Compare D Output Enable
  763. CMPDENbm = $80;
  764. // FUSE_PERIOD
  765. PERIODmask = $0F;
  766. PERIOD_OFF = $00;
  767. PERIOD_8CLK = $01;
  768. PERIOD_16CLK = $02;
  769. PERIOD_32CLK = $03;
  770. PERIOD_64CLK = $04;
  771. PERIOD_128CLK = $05;
  772. PERIOD_256CLK = $06;
  773. PERIOD_512CLK = $07;
  774. PERIOD_1KCLK = $08;
  775. PERIOD_2KCLK = $09;
  776. PERIOD_4KCLK = $0A;
  777. PERIOD_8KCLK = $0B;
  778. // FUSE_WINDOW
  779. WINDOWmask = $F0;
  780. WINDOW_OFF = $00;
  781. WINDOW_8CLK = $10;
  782. WINDOW_16CLK = $20;
  783. WINDOW_32CLK = $30;
  784. WINDOW_64CLK = $40;
  785. WINDOW_128CLK = $50;
  786. WINDOW_256CLK = $60;
  787. WINDOW_512CLK = $70;
  788. WINDOW_1KCLK = $80;
  789. WINDOW_2KCLK = $90;
  790. WINDOW_4KCLK = $A0;
  791. WINDOW_8KCLK = $B0;
  792. end;
  793. TGPIO = object //General Purpose IO
  794. GPIOR0: byte; //General Purpose IO Register 0
  795. GPIOR1: byte; //General Purpose IO Register 1
  796. GPIOR2: byte; //General Purpose IO Register 2
  797. GPIOR3: byte; //General Purpose IO Register 3
  798. end;
  799. TLOCKBIT = object //Lockbit
  800. LOCKBIT: byte; //Lock bits
  801. const
  802. // LOCKBIT_LB
  803. LBmask = $FF;
  804. LB_RWLOCK = $3A;
  805. LB_NOLOCK = $C5;
  806. end;
  807. TNVMCTRL = object //Non-volatile Memory Controller
  808. CTRLA: byte; //Control A
  809. CTRLB: byte; //Control B
  810. STATUS: byte; //Status
  811. INTCTRL: byte; //Interrupt Control
  812. INTFLAGS: byte; //Interrupt Flags
  813. Reserved5: byte;
  814. DATA: word; //Data
  815. ADDR: word; //Address
  816. const
  817. // NVMCTRL_CMD
  818. CMDmask = $07;
  819. CMD_NONE = $00;
  820. CMD_PAGEWRITE = $01;
  821. CMD_PAGEERASE = $02;
  822. CMD_PAGEERASEWRITE = $03;
  823. CMD_PAGEBUFCLR = $04;
  824. CMD_CHIPERASE = $05;
  825. CMD_EEERASE = $06;
  826. CMD_FUSEWRITE = $07;
  827. // Application code write protect
  828. APCWPbm = $01;
  829. // Boot Lock
  830. BOOTLOCKbm = $02;
  831. // EEPROM Ready
  832. EEREADYbm = $01;
  833. // EEPROM busy
  834. EEBUSYbm = $02;
  835. // Flash busy
  836. FBUSYbm = $01;
  837. // Write error
  838. WRERRORbm = $04;
  839. end;
  840. TPORT = object //I/O Ports
  841. DIR: byte; //Data Direction
  842. DIRSET: byte; //Data Direction Set
  843. DIRCLR: byte; //Data Direction Clear
  844. DIRTGL: byte; //Data Direction Toggle
  845. OUT_: byte; //Output Value
  846. OUTSET: byte; //Output Value Set
  847. OUTCLR: byte; //Output Value Clear
  848. OUTTGL: byte; //Output Value Toggle
  849. IN_: byte; //Input Value
  850. INTFLAGS: byte; //Interrupt Flags
  851. Reserved10: byte;
  852. Reserved11: byte;
  853. Reserved12: byte;
  854. Reserved13: byte;
  855. Reserved14: byte;
  856. Reserved15: byte;
  857. PIN0CTRL: byte; //Pin 0 Control
  858. PIN1CTRL: byte; //Pin 1 Control
  859. PIN2CTRL: byte; //Pin 2 Control
  860. PIN3CTRL: byte; //Pin 3 Control
  861. PIN4CTRL: byte; //Pin 4 Control
  862. PIN5CTRL: byte; //Pin 5 Control
  863. PIN6CTRL: byte; //Pin 6 Control
  864. PIN7CTRL: byte; //Pin 7 Control
  865. const
  866. // Pin Interrupt
  867. INT0bm = $01;
  868. INT1bm = $02;
  869. INT2bm = $04;
  870. INT3bm = $08;
  871. INT4bm = $10;
  872. INT5bm = $20;
  873. INT6bm = $40;
  874. INT7bm = $80;
  875. // Inverted I/O Enable
  876. INVENbm = $80;
  877. // PORT_ISC
  878. ISCmask = $07;
  879. ISC_INTDISABLE = $00;
  880. ISC_BOTHEDGES = $01;
  881. ISC_RISING = $02;
  882. ISC_FALLING = $03;
  883. ISC_INPUT_DISABLE = $04;
  884. ISC_LEVEL = $05;
  885. // Pullup enable
  886. PULLUPENbm = $08;
  887. end;
  888. TPORTMUX = object //Port Multiplexer
  889. CTRLA: byte; //Port Multiplexer Control A
  890. CTRLB: byte; //Port Multiplexer Control B
  891. CTRLC: byte; //Port Multiplexer Control C
  892. CTRLD: byte; //Port Multiplexer Control D
  893. const
  894. // Event Output 0
  895. EVOUT0bm = $01;
  896. // Event Output 1
  897. EVOUT1bm = $02;
  898. // Event Output 2
  899. EVOUT2bm = $04;
  900. // PORTMUX_LUT0
  901. LUT0mask = $10;
  902. LUT0_DEFAULT = $00;
  903. LUT0_ALTERNATE = $10;
  904. // PORTMUX_LUT1
  905. LUT1mask = $20;
  906. LUT1_DEFAULT = $00;
  907. LUT1_ALTERNATE = $20;
  908. // PORTMUX_SPI0
  909. SPI0mask = $04;
  910. SPI0_DEFAULT = $00;
  911. SPI0_ALTERNATE = $04;
  912. // PORTMUX_USART0
  913. USART0mask = $01;
  914. USART0_DEFAULT = $00;
  915. USART0_ALTERNATE = $01;
  916. // PORTMUX_TCA00
  917. TCA00mask = $01;
  918. TCA00_DEFAULT = $00;
  919. TCA00_ALTERNATE = $01;
  920. // PORTMUX_TCA01
  921. TCA01mask = $02;
  922. TCA01_DEFAULT = $00;
  923. TCA01_ALTERNATE = $02;
  924. // PORTMUX_TCA02
  925. TCA02mask = $04;
  926. TCA02_DEFAULT = $00;
  927. TCA02_ALTERNATE = $04;
  928. // PORTMUX_TCA03
  929. TCA03mask = $08;
  930. TCA03_DEFAULT = $00;
  931. TCA03_ALTERNATE = $08;
  932. // PORTMUX_TCB0
  933. TCB0mask = $01;
  934. TCB0_DEFAULT = $00;
  935. TCB0_ALTERNATE = $01;
  936. end;
  937. TRSTCTRL = object //Reset controller
  938. RSTFR: byte; //Reset Flags
  939. SWRR: byte; //Software Reset
  940. const
  941. // Brown out detector Reset flag
  942. BORFbm = $02;
  943. // External Reset flag
  944. EXTRFbm = $04;
  945. // Power on Reset flag
  946. PORFbm = $01;
  947. // Software Reset flag
  948. SWRFbm = $10;
  949. // UPDI Reset flag
  950. UPDIRFbm = $20;
  951. // Watch dog Reset flag
  952. WDRFbm = $08;
  953. // Software reset enable
  954. SWREbm = $01;
  955. end;
  956. TRTC = object //Real-Time Counter
  957. CTRLA: byte; //Control A
  958. STATUS: byte; //Status
  959. INTCTRL: byte; //Interrupt Control
  960. INTFLAGS: byte; //Interrupt Flags
  961. TEMP: byte; //Temporary
  962. DBGCTRL: byte; //Debug control
  963. Reserved6: byte;
  964. CLKSEL: byte; //Clock Select
  965. CNT: word; //Counter
  966. PER: word; //Period
  967. CMP: word; //Compare
  968. Reserved14: byte;
  969. Reserved15: byte;
  970. PITCTRLA: byte; //PIT Control A
  971. PITSTATUS: byte; //PIT Status
  972. PITINTCTRL: byte; //PIT Interrupt Control
  973. PITINTFLAGS: byte; //PIT Interrupt Flags
  974. Reserved20: byte;
  975. PITDBGCTRL: byte; //PIT Debug control
  976. const
  977. // RTC_CLKSEL
  978. CLKSELmask = $03;
  979. CLKSEL_INT32K = $00;
  980. CLKSEL_INT1K = $01;
  981. CLKSEL_TOSC32K = $02;
  982. CLKSEL_EXTCLK = $03;
  983. // RTC_PRESCALER
  984. PRESCALERmask = $78;
  985. PRESCALER_DIV1 = $00;
  986. PRESCALER_DIV2 = $08;
  987. PRESCALER_DIV4 = $10;
  988. PRESCALER_DIV8 = $18;
  989. PRESCALER_DIV16 = $20;
  990. PRESCALER_DIV32 = $28;
  991. PRESCALER_DIV64 = $30;
  992. PRESCALER_DIV128 = $38;
  993. PRESCALER_DIV256 = $40;
  994. PRESCALER_DIV512 = $48;
  995. PRESCALER_DIV1024 = $50;
  996. PRESCALER_DIV2048 = $58;
  997. PRESCALER_DIV4096 = $60;
  998. PRESCALER_DIV8192 = $68;
  999. PRESCALER_DIV16384 = $70;
  1000. PRESCALER_DIV32768 = $78;
  1001. // Enable
  1002. RTCENbm = $01;
  1003. // Run In Standby
  1004. RUNSTDBYbm = $80;
  1005. // Run in debug
  1006. DBGRUNbm = $01;
  1007. // Compare Match Interrupt enable
  1008. CMPbm = $02;
  1009. // Overflow Interrupt enable
  1010. OVFbm = $01;
  1011. // RTC_PERIOD
  1012. PERIODmask = $78;
  1013. PERIOD_OFF = $00;
  1014. PERIOD_CYC4 = $08;
  1015. PERIOD_CYC8 = $10;
  1016. PERIOD_CYC16 = $18;
  1017. PERIOD_CYC32 = $20;
  1018. PERIOD_CYC64 = $28;
  1019. PERIOD_CYC128 = $30;
  1020. PERIOD_CYC256 = $38;
  1021. PERIOD_CYC512 = $40;
  1022. PERIOD_CYC1024 = $48;
  1023. PERIOD_CYC2048 = $50;
  1024. PERIOD_CYC4096 = $58;
  1025. PERIOD_CYC8192 = $60;
  1026. PERIOD_CYC16384 = $68;
  1027. PERIOD_CYC32768 = $70;
  1028. // Enable
  1029. PITENbm = $01;
  1030. // Periodic Interrupt
  1031. PIbm = $01;
  1032. // CTRLA Synchronization Busy Flag
  1033. CTRLBUSYbm = $01;
  1034. // Comparator Synchronization Busy Flag
  1035. CMPBUSYbm = $08;
  1036. // Count Synchronization Busy Flag
  1037. CNTBUSYbm = $02;
  1038. // CTRLA Synchronization Busy Flag
  1039. CTRLABUSYbm = $01;
  1040. // Period Synchronization Busy Flag
  1041. PERBUSYbm = $04;
  1042. end;
  1043. TSIGROW = object //Signature row
  1044. DEVICEID0: byte; //Device ID Byte 0
  1045. DEVICEID1: byte; //Device ID Byte 1
  1046. DEVICEID2: byte; //Device ID Byte 2
  1047. SERNUM0: byte; //Serial Number Byte 0
  1048. SERNUM1: byte; //Serial Number Byte 1
  1049. SERNUM2: byte; //Serial Number Byte 2
  1050. SERNUM3: byte; //Serial Number Byte 3
  1051. SERNUM4: byte; //Serial Number Byte 4
  1052. SERNUM5: byte; //Serial Number Byte 5
  1053. SERNUM6: byte; //Serial Number Byte 6
  1054. SERNUM7: byte; //Serial Number Byte 7
  1055. SERNUM8: byte; //Serial Number Byte 8
  1056. SERNUM9: byte; //Serial Number Byte 9
  1057. Reserved13: byte;
  1058. Reserved14: byte;
  1059. Reserved15: byte;
  1060. Reserved16: byte;
  1061. Reserved17: byte;
  1062. Reserved18: byte;
  1063. Reserved19: byte;
  1064. Reserved20: byte;
  1065. Reserved21: byte;
  1066. Reserved22: byte;
  1067. Reserved23: byte;
  1068. Reserved24: byte;
  1069. Reserved25: byte;
  1070. Reserved26: byte;
  1071. Reserved27: byte;
  1072. Reserved28: byte;
  1073. Reserved29: byte;
  1074. Reserved30: byte;
  1075. Reserved31: byte;
  1076. TEMPSENSE0: byte; //Temperature Sensor Calibration Byte 0
  1077. TEMPSENSE1: byte; //Temperature Sensor Calibration Byte 1
  1078. OSC16ERR3V: byte; //OSC16 error at 3V
  1079. OSC16ERR5V: byte; //OSC16 error at 5V
  1080. OSC20ERR3V: byte; //OSC20 error at 3V
  1081. OSC20ERR5V: byte; //OSC20 error at 5V
  1082. end;
  1083. TSLPCTRL = object //Sleep Controller
  1084. CTRLA: byte; //Control
  1085. const
  1086. // Sleep enable
  1087. SENbm = $01;
  1088. // SLPCTRL_SMODE
  1089. SMODEmask = $06;
  1090. SMODE_IDLE = $00;
  1091. SMODE_STDBY = $02;
  1092. SMODE_PDOWN = $04;
  1093. end;
  1094. TSPI = object //Serial Peripheral Interface
  1095. CTRLA: byte; //Control A
  1096. CTRLB: byte; //Control B
  1097. INTCTRL: byte; //Interrupt Control
  1098. INTFLAGS: byte; //Interrupt Flags
  1099. DATA: byte; //Data
  1100. const
  1101. // Enable Double Speed
  1102. CLK2Xbm = $10;
  1103. // Data Order Setting
  1104. DORDbm = $40;
  1105. // Enable Module
  1106. ENABLEbm = $01;
  1107. // Master Operation Enable
  1108. MASTERbm = $20;
  1109. // SPI_PRESC
  1110. PRESCmask = $06;
  1111. PRESC_DIV4 = $00;
  1112. PRESC_DIV16 = $02;
  1113. PRESC_DIV64 = $04;
  1114. PRESC_DIV128 = $06;
  1115. // Buffer Mode Enable
  1116. BUFENbm = $80;
  1117. // Buffer Write Mode
  1118. BUFWRbm = $40;
  1119. // SPI_MODE
  1120. MODEmask = $03;
  1121. MODE_0 = $00;
  1122. MODE_1 = $01;
  1123. MODE_2 = $02;
  1124. MODE_3 = $03;
  1125. // Slave Select Disable
  1126. SSDbm = $04;
  1127. // Data Register Empty Interrupt Enable
  1128. DREIEbm = $20;
  1129. // Interrupt Enable
  1130. IEbm = $01;
  1131. // Receive Complete Interrupt Enable
  1132. RXCIEbm = $80;
  1133. // Slave Select Trigger Interrupt Enable
  1134. SSIEbm = $10;
  1135. // Transfer Complete Interrupt Enable
  1136. TXCIEbm = $40;
  1137. // Buffer Overflow
  1138. BUFOVFbm = $01;
  1139. // Data Register Empty Interrupt Flag
  1140. DREIFbm = $20;
  1141. // Receive Complete Interrupt Flag
  1142. RXCIFbm = $80;
  1143. // Slave Select Trigger Interrupt Flag
  1144. SSIFbm = $10;
  1145. // Transfer Complete Interrupt Flag
  1146. TXCIFbm = $40;
  1147. // Interrupt Flag
  1148. IFbm = $80;
  1149. // Write Collision
  1150. WRCOLbm = $40;
  1151. end;
  1152. TSYSCFG = object //System Configuration Registers
  1153. Reserved0: byte;
  1154. REVID: byte; //Revision ID
  1155. EXTBRK: byte; //External Break
  1156. const
  1157. // External break enable
  1158. ENEXTBRKbm = $01;
  1159. end;
  1160. TTCA_SINGLE = object //16-bit Timer/Counter Type A - Single Mode
  1161. CTRLA: byte; //Control A
  1162. CTRLB: byte; //Control B
  1163. CTRLC: byte; //Control C
  1164. CTRLD: byte; //Control D
  1165. CTRLECLR: byte; //Control E Clear
  1166. CTRLESET: byte; //Control E Set
  1167. CTRLFCLR: byte; //Control F Clear
  1168. CTRLFSET: byte; //Control F Set
  1169. Reserved8: byte;
  1170. EVCTRL: byte; //Event Control
  1171. INTCTRL: byte; //Interrupt Control
  1172. INTFLAGS: byte; //Interrupt Flags
  1173. Reserved12: byte;
  1174. Reserved13: byte;
  1175. DBGCTRL: byte; //Degbug Control
  1176. TEMP: byte; //Temporary data for 16-bit Access
  1177. Reserved16: byte;
  1178. Reserved17: byte;
  1179. Reserved18: byte;
  1180. Reserved19: byte;
  1181. Reserved20: byte;
  1182. Reserved21: byte;
  1183. Reserved22: byte;
  1184. Reserved23: byte;
  1185. Reserved24: byte;
  1186. Reserved25: byte;
  1187. Reserved26: byte;
  1188. Reserved27: byte;
  1189. Reserved28: byte;
  1190. Reserved29: byte;
  1191. Reserved30: byte;
  1192. Reserved31: byte;
  1193. CNT: word; //Count
  1194. Reserved34: byte;
  1195. Reserved35: byte;
  1196. Reserved36: byte;
  1197. Reserved37: byte;
  1198. PER: word; //Period
  1199. CMP0: word; //Compare 0
  1200. CMP1: word; //Compare 1
  1201. CMP2: word; //Compare 2
  1202. Reserved46: byte;
  1203. Reserved47: byte;
  1204. Reserved48: byte;
  1205. Reserved49: byte;
  1206. Reserved50: byte;
  1207. Reserved51: byte;
  1208. Reserved52: byte;
  1209. Reserved53: byte;
  1210. PERBUF: word; //Period Buffer
  1211. CMP0BUF: word; //Compare 0 Buffer
  1212. CMP1BUF: word; //Compare 1 Buffer
  1213. CMP2BUF: word; //Compare 2 Buffer
  1214. const
  1215. // TCA_SINGLE_CLKSEL
  1216. SINGLE_CLKSELmask = $0E;
  1217. SINGLE_CLKSEL_DIV1 = $00;
  1218. SINGLE_CLKSEL_DIV2 = $02;
  1219. SINGLE_CLKSEL_DIV4 = $04;
  1220. SINGLE_CLKSEL_DIV8 = $06;
  1221. SINGLE_CLKSEL_DIV16 = $08;
  1222. SINGLE_CLKSEL_DIV64 = $0A;
  1223. SINGLE_CLKSEL_DIV256 = $0C;
  1224. SINGLE_CLKSEL_DIV1024 = $0E;
  1225. // Module Enable
  1226. ENABLEbm = $01;
  1227. // Auto Lock Update
  1228. ALUPDbm = $08;
  1229. // Compare 0 Enable
  1230. CMP0ENbm = $10;
  1231. // Compare 1 Enable
  1232. CMP1ENbm = $20;
  1233. // Compare 2 Enable
  1234. CMP2ENbm = $40;
  1235. // TCA_SINGLE_WGMODE
  1236. SINGLE_WGMODEmask = $07;
  1237. SINGLE_WGMODE_NORMAL = $00;
  1238. SINGLE_WGMODE_FRQ = $01;
  1239. SINGLE_WGMODE_SINGLESLOPE = $03;
  1240. SINGLE_WGMODE_DSTOP = $05;
  1241. SINGLE_WGMODE_DSBOTH = $06;
  1242. SINGLE_WGMODE_DSBOTTOM = $07;
  1243. // Compare 0 Waveform Output Value
  1244. CMP0OVbm = $01;
  1245. // Compare 1 Waveform Output Value
  1246. CMP1OVbm = $02;
  1247. // Compare 2 Waveform Output Value
  1248. CMP2OVbm = $04;
  1249. // Split Mode Enable
  1250. SPLITMbm = $01;
  1251. // TCA_SINGLE_CMD
  1252. SINGLE_CMDmask = $0C;
  1253. SINGLE_CMD_NONE = $00;
  1254. SINGLE_CMD_UPDATE = $04;
  1255. SINGLE_CMD_RESTART = $08;
  1256. SINGLE_CMD_RESET = $0C;
  1257. // Direction
  1258. DIRbm = $01;
  1259. // Lock Update
  1260. LUPDbm = $02;
  1261. // Compare 0 Buffer Valid
  1262. CMP0BVbm = $02;
  1263. // Compare 1 Buffer Valid
  1264. CMP1BVbm = $04;
  1265. // Compare 2 Buffer Valid
  1266. CMP2BVbm = $08;
  1267. // Period Buffer Valid
  1268. PERBVbm = $01;
  1269. // Debug Run
  1270. DBGRUNbm = $01;
  1271. // Count on Event Input
  1272. CNTEIbm = $01;
  1273. // TCA_SINGLE_EVACT
  1274. SINGLE_EVACTmask = $06;
  1275. SINGLE_EVACT_POSEDGE = $00;
  1276. SINGLE_EVACT_ANYEDGE = $02;
  1277. SINGLE_EVACT_HIGHLVL = $04;
  1278. SINGLE_EVACT_UPDOWN = $06;
  1279. // Compare 0 Interrupt
  1280. CMP0bm = $10;
  1281. // Compare 1 Interrupt
  1282. CMP1bm = $20;
  1283. // Compare 2 Interrupt
  1284. CMP2bm = $40;
  1285. // Overflow Interrupt
  1286. OVFbm = $01;
  1287. end;
  1288. TTCA_SPLIT = object //16-bit Timer/Counter Type A - Split Mode
  1289. CTRLA: byte; //Control A
  1290. CTRLB: byte; //Control B
  1291. CTRLC: byte; //Control C
  1292. CTRLD: byte; //Control D
  1293. CTRLECLR: byte; //Control E Clear
  1294. CTRLESET: byte; //Control E Set
  1295. Reserved6: byte;
  1296. Reserved7: byte;
  1297. Reserved8: byte;
  1298. Reserved9: byte;
  1299. INTCTRL: byte; //Interrupt Control
  1300. INTFLAGS: byte; //Interrupt Flags
  1301. Reserved12: byte;
  1302. Reserved13: byte;
  1303. DBGCTRL: byte; //Degbug Control
  1304. Reserved15: byte;
  1305. Reserved16: byte;
  1306. Reserved17: byte;
  1307. Reserved18: byte;
  1308. Reserved19: byte;
  1309. Reserved20: byte;
  1310. Reserved21: byte;
  1311. Reserved22: byte;
  1312. Reserved23: byte;
  1313. Reserved24: byte;
  1314. Reserved25: byte;
  1315. Reserved26: byte;
  1316. Reserved27: byte;
  1317. Reserved28: byte;
  1318. Reserved29: byte;
  1319. Reserved30: byte;
  1320. Reserved31: byte;
  1321. LCNT: byte; //Low Count
  1322. HCNT: byte; //High Count
  1323. Reserved34: byte;
  1324. Reserved35: byte;
  1325. Reserved36: byte;
  1326. Reserved37: byte;
  1327. LPER: byte; //Low Period
  1328. HPER: byte; //High Period
  1329. LCMP0: byte; //Low Compare
  1330. HCMP0: byte; //High Compare
  1331. LCMP1: byte; //Low Compare
  1332. HCMP1: byte; //High Compare
  1333. LCMP2: byte; //Low Compare
  1334. HCMP2: byte; //High Compare
  1335. const
  1336. // TCA_SPLIT_CLKSEL
  1337. SPLIT_CLKSELmask = $0E;
  1338. SPLIT_CLKSEL_DIV1 = $00;
  1339. SPLIT_CLKSEL_DIV2 = $02;
  1340. SPLIT_CLKSEL_DIV4 = $04;
  1341. SPLIT_CLKSEL_DIV8 = $06;
  1342. SPLIT_CLKSEL_DIV16 = $08;
  1343. SPLIT_CLKSEL_DIV64 = $0A;
  1344. SPLIT_CLKSEL_DIV256 = $0C;
  1345. SPLIT_CLKSEL_DIV1024 = $0E;
  1346. // Module Enable
  1347. ENABLEbm = $01;
  1348. // High Compare 0 Enable
  1349. HCMP0ENbm = $10;
  1350. // High Compare 1 Enable
  1351. HCMP1ENbm = $20;
  1352. // High Compare 2 Enable
  1353. HCMP2ENbm = $40;
  1354. // Low Compare 0 Enable
  1355. LCMP0ENbm = $01;
  1356. // Low Compare 1 Enable
  1357. LCMP1ENbm = $02;
  1358. // Low Compare 2 Enable
  1359. LCMP2ENbm = $04;
  1360. // High Compare 0 Output Value
  1361. HCMP0OVbm = $10;
  1362. // High Compare 1 Output Value
  1363. HCMP1OVbm = $20;
  1364. // High Compare 2 Output Value
  1365. HCMP2OVbm = $40;
  1366. // Low Compare 0 Output Value
  1367. LCMP0OVbm = $01;
  1368. // Low Compare 1 Output Value
  1369. LCMP1OVbm = $02;
  1370. // Low Compare 2 Output Value
  1371. LCMP2OVbm = $04;
  1372. // Split Mode Enable
  1373. SPLITMbm = $01;
  1374. // TCA_SPLIT_CMD
  1375. SPLIT_CMDmask = $0C;
  1376. SPLIT_CMD_NONE = $00;
  1377. SPLIT_CMD_UPDATE = $04;
  1378. SPLIT_CMD_RESTART = $08;
  1379. SPLIT_CMD_RESET = $0C;
  1380. // Debug Run
  1381. DBGRUNbm = $01;
  1382. // High Underflow Interrupt Enable
  1383. HUNFbm = $02;
  1384. // Low Compare 0 Interrupt Enable
  1385. LCMP0bm = $10;
  1386. // Low Compare 1 Interrupt Enable
  1387. LCMP1bm = $20;
  1388. // Low Compare 2 Interrupt Enable
  1389. LCMP2bm = $40;
  1390. // Low Underflow Interrupt Enable
  1391. LUNFbm = $01;
  1392. end;
  1393. TTCA = record //16-bit Timer/Counter Type A
  1394. case byte of
  1395. 0: (SINGLE: TTCA_SINGLE);
  1396. 1: (SPLIT: TTCA_SPLIT);
  1397. end;
  1398. TTCB = object //16-bit Timer Type B
  1399. CTRLA: byte; //Control A
  1400. CTRLB: byte; //Control Register B
  1401. Reserved2: byte;
  1402. Reserved3: byte;
  1403. EVCTRL: byte; //Event Control
  1404. INTCTRL: byte; //Interrupt Control
  1405. INTFLAGS: byte; //Interrupt Flags
  1406. STATUS: byte; //Status
  1407. DBGCTRL: byte; //Debug Control
  1408. TEMP: byte; //Temporary Value
  1409. CNT: word; //Count
  1410. CCMP: word; //Compare or Capture
  1411. const
  1412. // TCB_CLKSEL
  1413. CLKSELmask = $06;
  1414. CLKSEL_CLKDIV1 = $00;
  1415. CLKSEL_CLKDIV2 = $02;
  1416. CLKSEL_CLKTCA = $04;
  1417. // Enable
  1418. ENABLEbm = $01;
  1419. // Run Standby
  1420. RUNSTDBYbm = $40;
  1421. // Synchronize Update
  1422. SYNCUPDbm = $10;
  1423. // Asynchronous Enable
  1424. ASYNCbm = $40;
  1425. // Pin Output Enable
  1426. CCMPENbm = $10;
  1427. // Pin Initial State
  1428. CCMPINITbm = $20;
  1429. // TCB_CNTMODE
  1430. CNTMODEmask = $07;
  1431. CNTMODE_INT = $00;
  1432. CNTMODE_TIMEOUT = $01;
  1433. CNTMODE_CAPT = $02;
  1434. CNTMODE_FRQ = $03;
  1435. CNTMODE_PW = $04;
  1436. CNTMODE_FRQPW = $05;
  1437. CNTMODE_SINGLE = $06;
  1438. CNTMODE_PWM8 = $07;
  1439. // Debug Run
  1440. DBGRUNbm = $01;
  1441. // Event Input Enable
  1442. CAPTEIbm = $01;
  1443. // Event Edge
  1444. EDGEbm = $10;
  1445. // Input Capture Noise Cancellation Filter
  1446. FILTERbm = $40;
  1447. // Capture or Timeout
  1448. CAPTbm = $01;
  1449. // Run
  1450. RUNbm = $01;
  1451. end;
  1452. TTWI = object //Two-Wire Interface
  1453. CTRLA: byte; //Control A
  1454. Reserved1: byte;
  1455. DBGCTRL: byte; //Debug Control Register
  1456. MCTRLA: byte; //Master Control A
  1457. MCTRLB: byte; //Master Control B
  1458. MSTATUS: byte; //Master Status
  1459. MBAUD: byte; //Master Baurd Rate Control
  1460. MADDR: byte; //Master Address
  1461. MDATA: byte; //Master Data
  1462. SCTRLA: byte; //Slave Control A
  1463. SCTRLB: byte; //Slave Control B
  1464. SSTATUS: byte; //Slave Status
  1465. SADDR: byte; //Slave Address
  1466. SDATA: byte; //Slave Data
  1467. SADDRMASK: byte; //Slave Address Mask
  1468. const
  1469. // FM Plus Enable
  1470. FMPENbm = $02;
  1471. // TWI_SDAHOLD
  1472. SDAHOLDmask = $0C;
  1473. SDAHOLD_OFF = $00;
  1474. SDAHOLD_50NS = $04;
  1475. SDAHOLD_300NS = $08;
  1476. SDAHOLD_500NS = $0C;
  1477. // TWI_SDASETUP
  1478. SDASETUPmask = $10;
  1479. SDASETUP_4CYC = $00;
  1480. SDASETUP_8CYC = $10;
  1481. // Debug Run
  1482. DBGRUNbm = $01;
  1483. // Enable TWI Master
  1484. ENABLEbm = $01;
  1485. // Quick Command Enable
  1486. QCENbm = $10;
  1487. // Read Interrupt Enable
  1488. RIENbm = $80;
  1489. // Smart Mode Enable
  1490. SMENbm = $02;
  1491. // TWI_TIMEOUT
  1492. TIMEOUTmask = $0C;
  1493. TIMEOUT_DISABLED = $00;
  1494. TIMEOUT_50US = $04;
  1495. TIMEOUT_100US = $08;
  1496. TIMEOUT_200US = $0C;
  1497. // Write Interrupt Enable
  1498. WIENbm = $40;
  1499. // TWI_ACKACT
  1500. ACKACTmask = $04;
  1501. ACKACT_ACK = $00;
  1502. ACKACT_NACK = $04;
  1503. // Flush
  1504. FLUSHbm = $08;
  1505. // TWI_MCMD
  1506. MCMDmask = $03;
  1507. MCMD_NOACT = $00;
  1508. MCMD_REPSTART = $01;
  1509. MCMD_RECVTRANS = $02;
  1510. MCMD_STOP = $03;
  1511. // Arbitration Lost
  1512. ARBLOSTbm = $08;
  1513. // Bus Error
  1514. BUSERRbm = $04;
  1515. // TWI_BUSSTATE
  1516. BUSSTATEmask = $03;
  1517. BUSSTATE_UNKNOWN = $00;
  1518. BUSSTATE_IDLE = $01;
  1519. BUSSTATE_OWNER = $02;
  1520. BUSSTATE_BUSY = $03;
  1521. // Clock Hold
  1522. CLKHOLDbm = $20;
  1523. // Read Interrupt Flag
  1524. RIFbm = $80;
  1525. // Received Acknowledge
  1526. RXACKbm = $10;
  1527. // Write Interrupt Flag
  1528. WIFbm = $40;
  1529. // Address Enable
  1530. ADDRENbm = $01;
  1531. // Address Mask
  1532. ADDRMASK0bm = $02;
  1533. ADDRMASK1bm = $04;
  1534. ADDRMASK2bm = $08;
  1535. ADDRMASK3bm = $10;
  1536. ADDRMASK4bm = $20;
  1537. ADDRMASK5bm = $40;
  1538. ADDRMASK6bm = $80;
  1539. // Address/Stop Interrupt Enable
  1540. APIENbm = $40;
  1541. // Data Interrupt Enable
  1542. DIENbm = $80;
  1543. // Stop Interrupt Enable
  1544. PIENbm = $20;
  1545. // Promiscuous Mode Enable
  1546. PMENbm = $04;
  1547. // TWI_SCMD
  1548. SCMDmask = $03;
  1549. SCMD_NOACT = $00;
  1550. SCMD_COMPTRANS = $02;
  1551. SCMD_RESPONSE = $03;
  1552. // TWI_AP
  1553. APmask = $01;
  1554. AP_STOP = $00;
  1555. AP_ADR = $01;
  1556. // Address/Stop Interrupt Flag
  1557. APIFbm = $40;
  1558. // Collision
  1559. COLLbm = $08;
  1560. // Data Interrupt Flag
  1561. DIFbm = $80;
  1562. // Read/Write Direction
  1563. DIRbm = $02;
  1564. end;
  1565. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1566. RXDATAL: byte; //Receive Data Low Byte
  1567. RXDATAH: byte; //Receive Data High Byte
  1568. TXDATAL: byte; //Transmit Data Low Byte
  1569. TXDATAH: byte; //Transmit Data High Byte
  1570. STATUS: byte; //Status
  1571. CTRLA: byte; //Control A
  1572. CTRLB: byte; //Control B
  1573. CTRLC: byte; //Control C
  1574. BAUD: word; //Baud Rate
  1575. Reserved10: byte;
  1576. DBGCTRL: byte; //Debug Control
  1577. EVCTRL: byte; //Event Control
  1578. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1579. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1580. const
  1581. // Auto-baud Error Interrupt Enable
  1582. ABEIEbm = $04;
  1583. // Data Register Empty Interrupt Enable
  1584. DREIEbm = $20;
  1585. // Loop-back Mode Enable
  1586. LBMEbm = $08;
  1587. // USART_RS485
  1588. RS485mask = $03;
  1589. RS485_OFF = $00;
  1590. RS485_EXT = $01;
  1591. RS485_INT = $02;
  1592. // Receive Complete Interrupt Enable
  1593. RXCIEbm = $80;
  1594. // Receiver Start Frame Interrupt Enable
  1595. RXSIEbm = $10;
  1596. // Transmit Complete Interrupt Enable
  1597. TXCIEbm = $40;
  1598. // Multi-processor Communication Mode
  1599. MPCMbm = $01;
  1600. // Open Drain Mode Enable
  1601. ODMEbm = $08;
  1602. // Reciever enable
  1603. RXENbm = $80;
  1604. // USART_RXMODE
  1605. RXMODEmask = $06;
  1606. RXMODE_NORMAL = $00;
  1607. RXMODE_CLK2X = $02;
  1608. RXMODE_GENAUTO = $04;
  1609. RXMODE_LINAUTO = $06;
  1610. // Start Frame Detection Enable
  1611. SFDENbm = $10;
  1612. // Transmitter Enable
  1613. TXENbm = $40;
  1614. // USART_MSPI_CMODE
  1615. MSPI_CMODEmask = $C0;
  1616. MSPI_CMODE_ASYNCHRONOUS = $00;
  1617. MSPI_CMODE_SYNCHRONOUS = $40;
  1618. MSPI_CMODE_IRCOM = $80;
  1619. MSPI_CMODE_MSPI = $C0;
  1620. // SPI Master Mode, Clock Phase
  1621. UCPHAbm = $02;
  1622. // SPI Master Mode, Data Order
  1623. UDORDbm = $04;
  1624. // USART_NORMAL_CHSIZE
  1625. NORMAL_CHSIZEmask = $07;
  1626. NORMAL_CHSIZE_5BIT = $00;
  1627. NORMAL_CHSIZE_6BIT = $01;
  1628. NORMAL_CHSIZE_7BIT = $02;
  1629. NORMAL_CHSIZE_8BIT = $03;
  1630. NORMAL_CHSIZE_9BITL = $06;
  1631. NORMAL_CHSIZE_9BITH = $07;
  1632. // USART_NORMAL_CMODE
  1633. NORMAL_CMODEmask = $C0;
  1634. NORMAL_CMODE_ASYNCHRONOUS = $00;
  1635. NORMAL_CMODE_SYNCHRONOUS = $40;
  1636. NORMAL_CMODE_IRCOM = $80;
  1637. NORMAL_CMODE_MSPI = $C0;
  1638. // USART_NORMAL_PMODE
  1639. NORMAL_PMODEmask = $30;
  1640. NORMAL_PMODE_DISABLED = $00;
  1641. NORMAL_PMODE_EVEN = $20;
  1642. NORMAL_PMODE_ODD = $30;
  1643. // USART_NORMAL_SBMODE
  1644. NORMAL_SBMODEmask = $08;
  1645. NORMAL_SBMODE_1BIT = $00;
  1646. NORMAL_SBMODE_2BIT = $08;
  1647. // Autobaud majority voter bypass
  1648. ABMBPbm = $80;
  1649. // Debug Run
  1650. DBGRUNbm = $01;
  1651. // IrDA Event Input Enable
  1652. IREIbm = $01;
  1653. // Buffer Overflow
  1654. BUFOVFbm = $40;
  1655. // Receiver Data Register
  1656. DATA8bm = $01;
  1657. // Frame Error
  1658. FERRbm = $04;
  1659. // Parity Error
  1660. PERRbm = $02;
  1661. // Receive Complete Interrupt Flag
  1662. RXCIFbm = $80;
  1663. // RX Data
  1664. DATA0bm = $01;
  1665. DATA1bm = $02;
  1666. DATA2bm = $04;
  1667. DATA3bm = $08;
  1668. DATA4bm = $10;
  1669. DATA5bm = $20;
  1670. DATA6bm = $40;
  1671. DATA7bm = $80;
  1672. // Receiver Pulse Lenght
  1673. RXPL0bm = $01;
  1674. RXPL1bm = $02;
  1675. RXPL2bm = $04;
  1676. RXPL3bm = $08;
  1677. RXPL4bm = $10;
  1678. RXPL5bm = $20;
  1679. RXPL6bm = $40;
  1680. // Break Detected Flag
  1681. BDFbm = $02;
  1682. // Data Register Empty Flag
  1683. DREIFbm = $20;
  1684. // Inconsistent Sync Field Interrupt Flag
  1685. ISFIFbm = $08;
  1686. // Receive Start Interrupt
  1687. RXSIFbm = $10;
  1688. // Transmit Interrupt Flag
  1689. TXCIFbm = $40;
  1690. // Wait For Break
  1691. WFBbm = $01;
  1692. // Transmit pulse length
  1693. TXPL0bm = $01;
  1694. TXPL1bm = $02;
  1695. TXPL2bm = $04;
  1696. TXPL3bm = $08;
  1697. TXPL4bm = $10;
  1698. TXPL5bm = $20;
  1699. TXPL6bm = $40;
  1700. TXPL7bm = $80;
  1701. end;
  1702. TUSERROW = object //User Row
  1703. USERROW0: byte; //User Row Byte 0
  1704. USERROW1: byte; //User Row Byte 1
  1705. USERROW2: byte; //User Row Byte 2
  1706. USERROW3: byte; //User Row Byte 3
  1707. USERROW4: byte; //User Row Byte 4
  1708. USERROW5: byte; //User Row Byte 5
  1709. USERROW6: byte; //User Row Byte 6
  1710. USERROW7: byte; //User Row Byte 7
  1711. USERROW8: byte; //User Row Byte 8
  1712. USERROW9: byte; //User Row Byte 9
  1713. USERROW10: byte; //User Row Byte 10
  1714. USERROW11: byte; //User Row Byte 11
  1715. USERROW12: byte; //User Row Byte 12
  1716. USERROW13: byte; //User Row Byte 13
  1717. USERROW14: byte; //User Row Byte 14
  1718. USERROW15: byte; //User Row Byte 15
  1719. USERROW16: byte; //User Row Byte 16
  1720. USERROW17: byte; //User Row Byte 17
  1721. USERROW18: byte; //User Row Byte 18
  1722. USERROW19: byte; //User Row Byte 19
  1723. USERROW20: byte; //User Row Byte 20
  1724. USERROW21: byte; //User Row Byte 21
  1725. USERROW22: byte; //User Row Byte 22
  1726. USERROW23: byte; //User Row Byte 23
  1727. USERROW24: byte; //User Row Byte 24
  1728. USERROW25: byte; //User Row Byte 25
  1729. USERROW26: byte; //User Row Byte 26
  1730. USERROW27: byte; //User Row Byte 27
  1731. USERROW28: byte; //User Row Byte 28
  1732. USERROW29: byte; //User Row Byte 29
  1733. USERROW30: byte; //User Row Byte 30
  1734. USERROW31: byte; //User Row Byte 31
  1735. end;
  1736. TVPORT = object //Virtual Ports
  1737. DIR: byte; //Data Direction
  1738. OUT_: byte; //Output Value
  1739. IN_: byte; //Input Value
  1740. INTFLAGS: byte; //Interrupt Flags
  1741. const
  1742. // Pin Interrupt
  1743. INT0bm = $01;
  1744. INT1bm = $02;
  1745. INT2bm = $04;
  1746. INT3bm = $08;
  1747. INT4bm = $10;
  1748. INT5bm = $20;
  1749. INT6bm = $40;
  1750. INT7bm = $80;
  1751. end;
  1752. TVREF = object //Voltage reference
  1753. CTRLA: byte; //Control A
  1754. CTRLB: byte; //Control B
  1755. const
  1756. // VREF_ADC0REFSEL
  1757. ADC0REFSELmask = $70;
  1758. ADC0REFSEL_0V55 = $00;
  1759. ADC0REFSEL_1V1 = $10;
  1760. ADC0REFSEL_2V5 = $20;
  1761. ADC0REFSEL_4V34 = $30;
  1762. ADC0REFSEL_1V5 = $40;
  1763. // VREF_DAC0REFSEL
  1764. DAC0REFSELmask = $07;
  1765. DAC0REFSEL_0V55 = $00;
  1766. DAC0REFSEL_1V1 = $01;
  1767. DAC0REFSEL_2V5 = $02;
  1768. DAC0REFSEL_4V34 = $03;
  1769. DAC0REFSEL_1V5 = $04;
  1770. // ADC0 reference enable
  1771. ADC0REFENbm = $02;
  1772. // DAC0/AC0 reference enable
  1773. DAC0REFENbm = $01;
  1774. end;
  1775. TWDT = object //Watch-Dog Timer
  1776. CTRLA: byte; //Control A
  1777. STATUS: byte; //Status
  1778. const
  1779. // WDT_PERIOD
  1780. PERIODmask = $0F;
  1781. PERIOD_OFF = $00;
  1782. PERIOD_8CLK = $01;
  1783. PERIOD_16CLK = $02;
  1784. PERIOD_32CLK = $03;
  1785. PERIOD_64CLK = $04;
  1786. PERIOD_128CLK = $05;
  1787. PERIOD_256CLK = $06;
  1788. PERIOD_512CLK = $07;
  1789. PERIOD_1KCLK = $08;
  1790. PERIOD_2KCLK = $09;
  1791. PERIOD_4KCLK = $0A;
  1792. PERIOD_8KCLK = $0B;
  1793. // WDT_WINDOW
  1794. WINDOWmask = $F0;
  1795. WINDOW_OFF = $00;
  1796. WINDOW_8CLK = $10;
  1797. WINDOW_16CLK = $20;
  1798. WINDOW_32CLK = $30;
  1799. WINDOW_64CLK = $40;
  1800. WINDOW_128CLK = $50;
  1801. WINDOW_256CLK = $60;
  1802. WINDOW_512CLK = $70;
  1803. WINDOW_1KCLK = $80;
  1804. WINDOW_2KCLK = $90;
  1805. WINDOW_4KCLK = $A0;
  1806. WINDOW_8KCLK = $B0;
  1807. // Lock enable
  1808. LOCKbm = $80;
  1809. // Syncronization busy
  1810. SYNCBUSYbm = $01;
  1811. end;
  1812. const
  1813. Pin0idx = 0; Pin0bm = 1;
  1814. Pin1idx = 1; Pin1bm = 2;
  1815. Pin2idx = 2; Pin2bm = 4;
  1816. Pin3idx = 3; Pin3bm = 8;
  1817. Pin4idx = 4; Pin4bm = 16;
  1818. Pin5idx = 5; Pin5bm = 32;
  1819. Pin6idx = 6; Pin6bm = 64;
  1820. Pin7idx = 7; Pin7bm = 128;
  1821. var
  1822. VPORTA: TVPORT absolute $0000;
  1823. VPORTB: TVPORT absolute $0004;
  1824. VPORTC: TVPORT absolute $0008;
  1825. GPIO: TGPIO absolute $001C;
  1826. CPU: TCPU absolute $0030;
  1827. RSTCTRL: TRSTCTRL absolute $0040;
  1828. SLPCTRL: TSLPCTRL absolute $0050;
  1829. CLKCTRL: TCLKCTRL absolute $0060;
  1830. BOD: TBOD absolute $0080;
  1831. VREF: TVREF absolute $00A0;
  1832. WDT: TWDT absolute $0100;
  1833. CPUINT: TCPUINT absolute $0110;
  1834. CRCSCAN: TCRCSCAN absolute $0120;
  1835. RTC: TRTC absolute $0140;
  1836. EVSYS: TEVSYS absolute $0180;
  1837. CCL: TCCL absolute $01C0;
  1838. PORTMUX: TPORTMUX absolute $0200;
  1839. PORTA: TPORT absolute $0400;
  1840. ADC0: TADC absolute $0600;
  1841. AC0: TAC absolute $0670;
  1842. USART0: TUSART absolute $0800;
  1843. TWI0: TTWI absolute $0810;
  1844. SPI0: TSPI absolute $0820;
  1845. TCA0: TTCA absolute $0A00;
  1846. TCB0: TTCB absolute $0A40;
  1847. SYSCFG: TSYSCFG absolute $0F00;
  1848. NVMCTRL: TNVMCTRL absolute $1000;
  1849. SIGROW: TSIGROW absolute $1100;
  1850. FUSE: TFUSE absolute $1280;
  1851. LOCKBIT: TLOCKBIT absolute $128A;
  1852. USERROW: TUSERROW absolute $1300;
  1853. implementation
  1854. {$define RELBRANCHES}
  1855. {$i avrcommon.inc}
  1856. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  1857. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  1858. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 3
  1859. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 6
  1860. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 7
  1861. procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 8
  1862. //procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 8
  1863. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 9
  1864. procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 10
  1865. //procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 10
  1866. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 11
  1867. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 11
  1868. procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 12
  1869. //procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 12
  1870. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 13
  1871. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 16
  1872. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 17
  1873. procedure ADC0_WCOMP_ISR; external name 'ADC0_WCOMP_ISR'; // Interrupt 18
  1874. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 19
  1875. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 20
  1876. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 21
  1877. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 22
  1878. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 23
  1879. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 24
  1880. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 25
  1881. procedure _FPC_start; assembler; nostackframe;
  1882. label
  1883. _start;
  1884. asm
  1885. .init
  1886. .globl _start
  1887. rjmp _start
  1888. rjmp CRCSCAN_NMI_ISR
  1889. rjmp BOD_VLM_ISR
  1890. rjmp PORTA_PORT_ISR
  1891. rjmp RTC_CNT_ISR
  1892. rjmp RTC_PIT_ISR
  1893. rjmp TCA0_LUNF_ISR
  1894. // rjmp TCA0_OVF_ISR
  1895. rjmp TCA0_HUNF_ISR
  1896. rjmp TCA0_CMP0_ISR
  1897. // rjmp TCA0_LCMP0_ISR
  1898. rjmp TCA0_CMP1_ISR
  1899. // rjmp TCA0_LCMP1_ISR
  1900. rjmp TCA0_LCMP2_ISR
  1901. // rjmp TCA0_CMP2_ISR
  1902. rjmp TCB0_INT_ISR
  1903. rjmp AC0_AC_ISR
  1904. rjmp ADC0_RESRDY_ISR
  1905. rjmp ADC0_WCOMP_ISR
  1906. rjmp TWI0_TWIS_ISR
  1907. rjmp TWI0_TWIM_ISR
  1908. rjmp SPI0_INT_ISR
  1909. rjmp USART0_RXC_ISR
  1910. rjmp USART0_DRE_ISR
  1911. rjmp USART0_TXC_ISR
  1912. rjmp NVMCTRL_EE_ISR
  1913. {$i start.inc}
  1914. .weak CRCSCAN_NMI_ISR
  1915. .weak BOD_VLM_ISR
  1916. .weak PORTA_PORT_ISR
  1917. .weak RTC_CNT_ISR
  1918. .weak RTC_PIT_ISR
  1919. .weak TCA0_LUNF_ISR
  1920. // .weak TCA0_OVF_ISR
  1921. .weak TCA0_HUNF_ISR
  1922. .weak TCA0_CMP0_ISR
  1923. // .weak TCA0_LCMP0_ISR
  1924. .weak TCA0_CMP1_ISR
  1925. // .weak TCA0_LCMP1_ISR
  1926. .weak TCA0_LCMP2_ISR
  1927. // .weak TCA0_CMP2_ISR
  1928. .weak TCB0_INT_ISR
  1929. .weak AC0_AC_ISR
  1930. .weak ADC0_RESRDY_ISR
  1931. .weak ADC0_WCOMP_ISR
  1932. .weak TWI0_TWIS_ISR
  1933. .weak TWI0_TWIM_ISR
  1934. .weak SPI0_INT_ISR
  1935. .weak USART0_RXC_ISR
  1936. .weak USART0_DRE_ISR
  1937. .weak USART0_TXC_ISR
  1938. .weak NVMCTRL_EE_ISR
  1939. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  1940. .set BOD_VLM_ISR, Default_IRQ_handler
  1941. .set PORTA_PORT_ISR, Default_IRQ_handler
  1942. .set RTC_CNT_ISR, Default_IRQ_handler
  1943. .set RTC_PIT_ISR, Default_IRQ_handler
  1944. .set TCA0_LUNF_ISR, Default_IRQ_handler
  1945. // .set TCA0_OVF_ISR, Default_IRQ_handler
  1946. .set TCA0_HUNF_ISR, Default_IRQ_handler
  1947. .set TCA0_CMP0_ISR, Default_IRQ_handler
  1948. // .set TCA0_LCMP0_ISR, Default_IRQ_handler
  1949. .set TCA0_CMP1_ISR, Default_IRQ_handler
  1950. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  1951. .set TCA0_LCMP2_ISR, Default_IRQ_handler
  1952. // .set TCA0_CMP2_ISR, Default_IRQ_handler
  1953. .set TCB0_INT_ISR, Default_IRQ_handler
  1954. .set AC0_AC_ISR, Default_IRQ_handler
  1955. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  1956. .set ADC0_WCOMP_ISR, Default_IRQ_handler
  1957. .set TWI0_TWIS_ISR, Default_IRQ_handler
  1958. .set TWI0_TWIM_ISR, Default_IRQ_handler
  1959. .set SPI0_INT_ISR, Default_IRQ_handler
  1960. .set USART0_RXC_ISR, Default_IRQ_handler
  1961. .set USART0_DRE_ISR, Default_IRQ_handler
  1962. .set USART0_TXC_ISR, Default_IRQ_handler
  1963. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  1964. end;
  1965. end.