attiny404.pp 53 KB

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  1. unit ATtiny404;
  2. {$goto on}
  3. interface
  4. type
  5. TAC = object //Analog Comparator
  6. CTRLA: byte; //Control A
  7. Reserved1: byte;
  8. MUXCTRLA: byte; //Mux Control A
  9. Reserved3: byte;
  10. Reserved4: byte;
  11. Reserved5: byte;
  12. INTCTRL: byte; //Interrupt Control
  13. STATUS: byte; //Status
  14. const
  15. // Enable
  16. ENABLEbm = $01;
  17. // AC_HYSMODE
  18. HYSMODEmask = $06;
  19. HYSMODE_OFF = $00;
  20. HYSMODE_10mV = $02;
  21. HYSMODE_25mV = $04;
  22. HYSMODE_50mV = $06;
  23. // AC_INTMODE
  24. INTMODEmask = $30;
  25. INTMODE_BOTHEDGE = $00;
  26. INTMODE_NEGEDGE = $20;
  27. INTMODE_POSEDGE = $30;
  28. // Output Buffer Enable
  29. OUTENbm = $40;
  30. // Run in Standby Mode
  31. RUNSTDBYbm = $80;
  32. // Analog Comparator 0 Interrupt Enable
  33. CMPbm = $01;
  34. // Invert AC Output
  35. INVERTbm = $80;
  36. // AC_MUXNEG
  37. MUXNEGmask = $03;
  38. MUXNEG_PIN0 = $00;
  39. MUXNEG_VREF = $02;
  40. // AC_MUXPOS
  41. MUXPOSmask = $18;
  42. MUXPOS_PIN0 = $00;
  43. // Analog Comparator State
  44. STATEbm = $10;
  45. end;
  46. TADC = object //Analog to Digital Converter
  47. CTRLA: byte; //Control A
  48. CTRLB: byte; //Control B
  49. CTRLC: byte; //Control C
  50. CTRLD: byte; //Control D
  51. CTRLE: byte; //Control E
  52. SAMPCTRL: byte; //Sample Control
  53. MUXPOS: byte; //Positive mux input
  54. Reserved7: byte;
  55. COMMAND: byte; //Command
  56. EVCTRL: byte; //Event Control
  57. INTCTRL: byte; //Interrupt Control
  58. INTFLAGS: byte; //Interrupt Flags
  59. DBGCTRL: byte; //Debug Control
  60. TEMP: byte; //Temporary Data
  61. Reserved14: byte;
  62. Reserved15: byte;
  63. RES: word; //ADC Accumulator Result
  64. WINLT: word; //Window comparator low threshold
  65. WINHT: word; //Window comparator high threshold
  66. CALIB: byte; //Calibration
  67. const
  68. // ADC_DUTYCYC
  69. DUTYCYCmask = $01;
  70. DUTYCYC_DUTY50 = $00;
  71. DUTYCYC_DUTY25 = $01;
  72. // Start Conversion Operation
  73. STCONVbm = $01;
  74. // ADC Enable
  75. ENABLEbm = $01;
  76. // ADC Freerun mode
  77. FREERUNbm = $02;
  78. // ADC_RESSEL
  79. RESSELmask = $04;
  80. RESSEL_10BIT = $00;
  81. RESSEL_8BIT = $04;
  82. // Run standby mode
  83. RUNSTBYbm = $80;
  84. // ADC_SAMPNUM
  85. SAMPNUMmask = $07;
  86. SAMPNUM_ACC1 = $00;
  87. SAMPNUM_ACC2 = $01;
  88. SAMPNUM_ACC4 = $02;
  89. SAMPNUM_ACC8 = $03;
  90. SAMPNUM_ACC16 = $04;
  91. SAMPNUM_ACC32 = $05;
  92. SAMPNUM_ACC64 = $06;
  93. // ADC_PRESC
  94. PRESCmask = $07;
  95. PRESC_DIV2 = $00;
  96. PRESC_DIV4 = $01;
  97. PRESC_DIV8 = $02;
  98. PRESC_DIV16 = $03;
  99. PRESC_DIV32 = $04;
  100. PRESC_DIV64 = $05;
  101. PRESC_DIV128 = $06;
  102. PRESC_DIV256 = $07;
  103. // ADC_REFSEL
  104. REFSELmask = $30;
  105. REFSEL_INTREF = $00;
  106. REFSEL_VDDREF = $10;
  107. // Sample Capacitance Selection
  108. SAMPCAPbm = $40;
  109. // ADC_ASDV
  110. ASDVmask = $10;
  111. ASDV_ASVOFF = $00;
  112. ASDV_ASVON = $10;
  113. // ADC_INITDLY
  114. INITDLYmask = $E0;
  115. INITDLY_DLY0 = $00;
  116. INITDLY_DLY16 = $20;
  117. INITDLY_DLY32 = $40;
  118. INITDLY_DLY64 = $60;
  119. INITDLY_DLY128 = $80;
  120. INITDLY_DLY256 = $A0;
  121. // Sampling Delay Selection
  122. SAMPDLY0bm = $01;
  123. SAMPDLY1bm = $02;
  124. SAMPDLY2bm = $04;
  125. SAMPDLY3bm = $08;
  126. // ADC_WINCM
  127. WINCMmask = $07;
  128. WINCM_NONE = $00;
  129. WINCM_BELOW = $01;
  130. WINCM_ABOVE = $02;
  131. WINCM_INSIDE = $03;
  132. WINCM_OUTSIDE = $04;
  133. // Debug run
  134. DBGRUNbm = $01;
  135. // Start Event Input Enable
  136. STARTEIbm = $01;
  137. // Result Ready Interrupt Enable
  138. RESRDYbm = $01;
  139. // Window Comparator Interrupt Enable
  140. WCMPbm = $02;
  141. // ADC_MUXPOS
  142. MUXPOSmask = $1F;
  143. MUXPOS_AIN0 = $00;
  144. MUXPOS_AIN1 = $01;
  145. MUXPOS_AIN2 = $02;
  146. MUXPOS_AIN3 = $03;
  147. MUXPOS_AIN4 = $04;
  148. MUXPOS_AIN5 = $05;
  149. MUXPOS_AIN6 = $06;
  150. MUXPOS_AIN7 = $07;
  151. MUXPOS_AIN8 = $08;
  152. MUXPOS_AIN9 = $09;
  153. MUXPOS_AIN10 = $0A;
  154. MUXPOS_AIN11 = $0B;
  155. MUXPOS_DAC0 = $1C;
  156. MUXPOS_INTREF = $1D;
  157. MUXPOS_TEMPSENSE = $1E;
  158. MUXPOS_GND = $1F;
  159. // Sample lenght
  160. SAMPLEN0bm = $01;
  161. SAMPLEN1bm = $02;
  162. SAMPLEN2bm = $04;
  163. SAMPLEN3bm = $08;
  164. SAMPLEN4bm = $10;
  165. // Temporary
  166. TEMP0bm = $01;
  167. TEMP1bm = $02;
  168. TEMP2bm = $04;
  169. TEMP3bm = $08;
  170. TEMP4bm = $10;
  171. TEMP5bm = $20;
  172. TEMP6bm = $40;
  173. TEMP7bm = $80;
  174. end;
  175. TBOD = object //Bod interface
  176. CTRLA: byte; //Control A
  177. CTRLB: byte; //Control B
  178. Reserved2: byte;
  179. Reserved3: byte;
  180. Reserved4: byte;
  181. Reserved5: byte;
  182. Reserved6: byte;
  183. Reserved7: byte;
  184. VLMCTRLA: byte; //Voltage level monitor Control
  185. INTCTRL: byte; //Voltage level monitor interrupt Control
  186. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  187. STATUS: byte; //Voltage level monitor status
  188. const
  189. // BOD_ACTIVE
  190. ACTIVEmask = $0C;
  191. ACTIVE_DIS = $00;
  192. ACTIVE_ENABLED = $04;
  193. ACTIVE_SAMPLED = $08;
  194. ACTIVE_ENWAKE = $0C;
  195. // BOD_SAMPFREQ
  196. SAMPFREQmask = $10;
  197. SAMPFREQ_1KHZ = $00;
  198. SAMPFREQ_125Hz = $10;
  199. // BOD_SLEEP
  200. SLEEPmask = $03;
  201. SLEEP_DIS = $00;
  202. SLEEP_ENABLED = $01;
  203. SLEEP_SAMPLED = $02;
  204. // BOD_LVL
  205. LVLmask = $07;
  206. LVL_BODLEVEL0 = $00;
  207. LVL_BODLEVEL1 = $01;
  208. LVL_BODLEVEL2 = $02;
  209. LVL_BODLEVEL3 = $03;
  210. LVL_BODLEVEL4 = $04;
  211. LVL_BODLEVEL5 = $05;
  212. LVL_BODLEVEL6 = $06;
  213. LVL_BODLEVEL7 = $07;
  214. // BOD_VLMCFG
  215. VLMCFGmask = $06;
  216. VLMCFG_BELOW = $00;
  217. VLMCFG_ABOVE = $02;
  218. VLMCFG_CROSS = $04;
  219. // voltage level monitor interrrupt enable
  220. VLMIEbm = $01;
  221. // Voltage level monitor interrupt flag
  222. VLMIFbm = $01;
  223. // Voltage level monitor status
  224. VLMSbm = $01;
  225. // BOD_VLMLVL
  226. VLMLVLmask = $03;
  227. VLMLVL_5ABOVE = $00;
  228. VLMLVL_15ABOVE = $01;
  229. VLMLVL_25ABOVE = $02;
  230. end;
  231. TCCL = object //Configurable Custom Logic
  232. CTRLA: byte; //Control Register A
  233. SEQCTRL0: byte; //Sequential Control 0
  234. Reserved2: byte;
  235. Reserved3: byte;
  236. Reserved4: byte;
  237. LUT0CTRLA: byte; //LUT Control 0 A
  238. LUT0CTRLB: byte; //LUT Control 0 B
  239. LUT0CTRLC: byte; //LUT Control 0 C
  240. TRUTH0: byte; //Truth 0
  241. LUT1CTRLA: byte; //LUT Control 1 A
  242. LUT1CTRLB: byte; //LUT Control 1 B
  243. LUT1CTRLC: byte; //LUT Control 1 C
  244. TRUTH1: byte; //Truth 1
  245. const
  246. // Enable
  247. ENABLEbm = $01;
  248. // Run in Standby
  249. RUNSTDBYbm = $40;
  250. // Clock Source Selection
  251. CLKSRCbm = $40;
  252. // CCL_EDGEDET
  253. EDGEDETmask = $80;
  254. EDGEDET_DIS = $00;
  255. EDGEDET_EN = $80;
  256. // CCL_FILTSEL
  257. FILTSELmask = $30;
  258. FILTSEL_DISABLE = $00;
  259. FILTSEL_SYNCH = $10;
  260. FILTSEL_FILTER = $20;
  261. // Output Enable
  262. OUTENbm = $08;
  263. // CCL_INSEL0
  264. INSEL0mask = $0F;
  265. INSEL0_MASK = $00;
  266. INSEL0_FEEDBACK = $01;
  267. INSEL0_LINK = $02;
  268. INSEL0_EVENT0 = $03;
  269. INSEL0_EVENT1 = $04;
  270. INSEL0_IO = $05;
  271. INSEL0_AC0 = $06;
  272. INSEL0_TCB0 = $07;
  273. INSEL0_TCA0 = $08;
  274. INSEL0_TCD0 = $09;
  275. INSEL0_USART0 = $0A;
  276. INSEL0_SPI0 = $0B;
  277. // CCL_INSEL1
  278. INSEL1mask = $F0;
  279. INSEL1_MASK = $00;
  280. INSEL1_FEEDBACK = $10;
  281. INSEL1_LINK = $20;
  282. INSEL1_EVENT0 = $30;
  283. INSEL1_EVENT1 = $40;
  284. INSEL1_IO = $50;
  285. INSEL1_AC0 = $60;
  286. INSEL1_TCB0 = $70;
  287. INSEL1_TCA0 = $80;
  288. INSEL1_TCD0 = $90;
  289. INSEL1_USART0 = $A0;
  290. INSEL1_SPI0 = $B0;
  291. // CCL_INSEL2
  292. INSEL2mask = $0F;
  293. INSEL2_MASK = $00;
  294. INSEL2_FEEDBACK = $01;
  295. INSEL2_LINK = $02;
  296. INSEL2_EVENT0 = $03;
  297. INSEL2_EVENT1 = $04;
  298. INSEL2_IO = $05;
  299. INSEL2_AC0 = $06;
  300. INSEL2_TCB0 = $07;
  301. INSEL2_TCA0 = $08;
  302. INSEL2_TCD0 = $09;
  303. INSEL2_SPI0 = $0B;
  304. // CCL_SEQSEL
  305. SEQSELmask = $07;
  306. SEQSEL_DISABLE = $00;
  307. SEQSEL_DFF = $01;
  308. SEQSEL_JK = $02;
  309. SEQSEL_LATCH = $03;
  310. SEQSEL_RS = $04;
  311. end;
  312. TCLKCTRL = object //Clock controller
  313. MCLKCTRLA: byte; //MCLK Control A
  314. MCLKCTRLB: byte; //MCLK Control B
  315. MCLKLOCK: byte; //MCLK Lock
  316. MCLKSTATUS: byte; //MCLK Status
  317. Reserved4: byte;
  318. Reserved5: byte;
  319. Reserved6: byte;
  320. Reserved7: byte;
  321. Reserved8: byte;
  322. Reserved9: byte;
  323. Reserved10: byte;
  324. Reserved11: byte;
  325. Reserved12: byte;
  326. Reserved13: byte;
  327. Reserved14: byte;
  328. Reserved15: byte;
  329. OSC20MCTRLA: byte; //OSC20M Control A
  330. OSC20MCALIBA: byte; //OSC20M Calibration A
  331. OSC20MCALIBB: byte; //OSC20M Calibration B
  332. Reserved19: byte;
  333. Reserved20: byte;
  334. Reserved21: byte;
  335. Reserved22: byte;
  336. Reserved23: byte;
  337. OSC32KCTRLA: byte; //OSC32K Control A
  338. const
  339. // System clock out
  340. CLKOUTbm = $80;
  341. // CLKCTRL_CLKSEL
  342. CLKSELmask = $03;
  343. CLKSEL_OSC20M = $00;
  344. CLKSEL_OSCULP32K = $01;
  345. CLKSEL_XOSC32K = $02;
  346. CLKSEL_EXTCLK = $03;
  347. // CLKCTRL_PDIV
  348. PDIVmask = $1E;
  349. PDIV_2X = $00;
  350. PDIV_4X = $02;
  351. PDIV_8X = $04;
  352. PDIV_16X = $06;
  353. PDIV_32X = $08;
  354. PDIV_64X = $0A;
  355. PDIV_6X = $10;
  356. PDIV_10X = $12;
  357. PDIV_12X = $14;
  358. PDIV_24X = $16;
  359. PDIV_48X = $18;
  360. // Prescaler enable
  361. PENbm = $01;
  362. // lock ebable
  363. LOCKENbm = $01;
  364. // External Clock status
  365. EXTSbm = $80;
  366. // 20MHz oscillator status
  367. OSC20MSbm = $10;
  368. // 32KHz oscillator status
  369. OSC32KSbm = $20;
  370. // System Oscillator changing
  371. SOSCbm = $01;
  372. // 32.768 kHz Crystal Oscillator status
  373. XOSC32KSbm = $40;
  374. // Calibration
  375. CAL20M0bm = $01;
  376. CAL20M1bm = $02;
  377. CAL20M2bm = $04;
  378. CAL20M3bm = $08;
  379. CAL20M4bm = $10;
  380. CAL20M5bm = $20;
  381. // Lock
  382. LOCKbm = $80;
  383. // Oscillator temperature coefficient
  384. TEMPCAL20M0bm = $01;
  385. TEMPCAL20M1bm = $02;
  386. TEMPCAL20M2bm = $04;
  387. TEMPCAL20M3bm = $08;
  388. // Run standby
  389. RUNSTDBYbm = $02;
  390. end;
  391. TCPU = object //CPU
  392. Reserved0: byte;
  393. Reserved1: byte;
  394. Reserved2: byte;
  395. Reserved3: byte;
  396. CCP: byte; //Configuration Change Protection
  397. Reserved5: byte;
  398. Reserved6: byte;
  399. Reserved7: byte;
  400. Reserved8: byte;
  401. Reserved9: byte;
  402. Reserved10: byte;
  403. Reserved11: byte;
  404. Reserved12: byte;
  405. SPL: byte; //Stack Pointer Low
  406. SPH: byte; //Stack Pointer High
  407. SREG: byte; //Status Register
  408. const
  409. // CPU_CCP
  410. CCPmask = $FF;
  411. CCP_SPM = $9D;
  412. CCP_IOREG = $D8;
  413. // Carry Flag
  414. Cbm = $01;
  415. // Half Carry Flag
  416. Hbm = $20;
  417. // Global Interrupt Enable Flag
  418. Ibm = $80;
  419. // Negative Flag
  420. Nbm = $04;
  421. // N Exclusive Or V Flag
  422. Sbm = $10;
  423. // Transfer Bit
  424. Tbm = $40;
  425. // Two's Complement Overflow Flag
  426. Vbm = $08;
  427. // Zero Flag
  428. Zbm = $02;
  429. end;
  430. TCPUINT = object //Interrupt Controller
  431. CTRLA: byte; //Control A
  432. STATUS: byte; //Status
  433. LVL0PRI: byte; //Interrupt Level 0 Priority
  434. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  435. const
  436. // Compact Vector Table
  437. CVTbm = $20;
  438. // Interrupt Vector Select
  439. IVSELbm = $40;
  440. // Round-robin Scheduling Enable
  441. LVL0RRbm = $01;
  442. // Interrupt Level Priority
  443. LVL0PRI0bm = $01;
  444. LVL0PRI1bm = $02;
  445. LVL0PRI2bm = $04;
  446. LVL0PRI3bm = $08;
  447. LVL0PRI4bm = $10;
  448. LVL0PRI5bm = $20;
  449. LVL0PRI6bm = $40;
  450. LVL0PRI7bm = $80;
  451. // Interrupt Vector with High Priority
  452. LVL1VEC0bm = $01;
  453. LVL1VEC1bm = $02;
  454. LVL1VEC2bm = $04;
  455. LVL1VEC3bm = $08;
  456. LVL1VEC4bm = $10;
  457. LVL1VEC5bm = $20;
  458. LVL1VEC6bm = $40;
  459. LVL1VEC7bm = $80;
  460. // Level 0 Interrupt Executing
  461. LVL0EXbm = $01;
  462. // Level 1 Interrupt Executing
  463. LVL1EXbm = $02;
  464. // Non-maskable Interrupt Executing
  465. NMIEXbm = $80;
  466. end;
  467. TCRCSCAN = object //CRCSCAN
  468. CTRLA: byte; //Control A
  469. CTRLB: byte; //Control B
  470. STATUS: byte; //Status
  471. const
  472. // Enable CRC scan
  473. ENABLEbm = $01;
  474. // Enable NMI Trigger
  475. NMIENbm = $02;
  476. // Reset CRC scan
  477. RESETbm = $80;
  478. // CRCSCAN_MODE
  479. MODEmask = $30;
  480. MODE_PRIORITY = $00;
  481. MODE_RESERVED = $10;
  482. MODE_BACKGROUND = $20;
  483. MODE_CONTINUOUS = $30;
  484. // CRCSCAN_SRC
  485. SRCmask = $03;
  486. SRC_FLASH = $00;
  487. SRC_APPLICATION = $01;
  488. SRC_BOOT = $02;
  489. // CRC Busy
  490. BUSYbm = $01;
  491. // CRC Ok
  492. OKbm = $02;
  493. end;
  494. TEVSYS = object //Event System
  495. ASYNCSTROBE: byte; //Asynchronous Channel Strobe
  496. SYNCSTROBE: byte; //Synchronous Channel Strobe
  497. ASYNCCH0: byte; //Asynchronous Channel 0 Generator Selection
  498. ASYNCCH1: byte; //Asynchronous Channel 1 Generator Selection
  499. Reserved4: byte;
  500. Reserved5: byte;
  501. Reserved6: byte;
  502. Reserved7: byte;
  503. Reserved8: byte;
  504. Reserved9: byte;
  505. SYNCCH0: byte; //Synchronous Channel 0 Generator Selection
  506. Reserved11: byte;
  507. Reserved12: byte;
  508. Reserved13: byte;
  509. Reserved14: byte;
  510. Reserved15: byte;
  511. Reserved16: byte;
  512. Reserved17: byte;
  513. ASYNCUSER0: byte; //Asynchronous User Ch 0 Input Selection - TCB0
  514. ASYNCUSER1: byte; //Asynchronous User Ch 1 Input Selection - ADC0
  515. ASYNCUSER2: byte; //Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  516. ASYNCUSER3: byte; //Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  517. ASYNCUSER4: byte; //Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  518. ASYNCUSER5: byte; //Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  519. ASYNCUSER6: byte; //Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  520. ASYNCUSER7: byte; //Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  521. ASYNCUSER8: byte; //Asynchronous User Ch 8 Input Selection - Event Out 0
  522. ASYNCUSER9: byte; //Asynchronous User Ch 9 Input Selection - Event Out 1
  523. ASYNCUSER10: byte; //Asynchronous User Ch 10 Input Selection - Event Out 2
  524. Reserved29: byte;
  525. Reserved30: byte;
  526. Reserved31: byte;
  527. Reserved32: byte;
  528. Reserved33: byte;
  529. SYNCUSER0: byte; //Synchronous User Ch 0 Input Selection - TCA0
  530. SYNCUSER1: byte; //Synchronous User Ch 1 Input Selection - USART0
  531. const
  532. // EVSYS_ASYNCCH0
  533. ASYNCCH0mask = $FF;
  534. ASYNCCH0_OFF = $00;
  535. ASYNCCH0_CCL_LUT0 = $01;
  536. ASYNCCH0_CCL_LUT1 = $02;
  537. ASYNCCH0_AC0_OUT = $03;
  538. ASYNCCH0_TCD0_CMPBCLR = $04;
  539. ASYNCCH0_TCD0_CMPASET = $05;
  540. ASYNCCH0_TCD0_CMPBSET = $06;
  541. ASYNCCH0_TCD0_PROGEV = $07;
  542. ASYNCCH0_RTC_OVF = $08;
  543. ASYNCCH0_RTC_CMP = $09;
  544. ASYNCCH0_PORTA_PIN0 = $0A;
  545. ASYNCCH0_PORTA_PIN1 = $0B;
  546. ASYNCCH0_PORTA_PIN2 = $0C;
  547. ASYNCCH0_PORTA_PIN3 = $0D;
  548. ASYNCCH0_PORTA_PIN4 = $0E;
  549. ASYNCCH0_PORTA_PIN5 = $0F;
  550. ASYNCCH0_PORTA_PIN6 = $10;
  551. ASYNCCH0_PORTA_PIN7 = $11;
  552. ASYNCCH0_UPDI = $12;
  553. // EVSYS_ASYNCCH1
  554. ASYNCCH1mask = $FF;
  555. ASYNCCH1_OFF = $00;
  556. ASYNCCH1_CCL_LUT0 = $01;
  557. ASYNCCH1_CCL_LUT1 = $02;
  558. ASYNCCH1_AC0_OUT = $03;
  559. ASYNCCH1_TCD0_CMPBCLR = $04;
  560. ASYNCCH1_TCD0_CMPASET = $05;
  561. ASYNCCH1_TCD0_CMPBSET = $06;
  562. ASYNCCH1_TCD0_PROGEV = $07;
  563. ASYNCCH1_RTC_OVF = $08;
  564. ASYNCCH1_RTC_CMP = $09;
  565. ASYNCCH1_PORTB_PIN0 = $0A;
  566. ASYNCCH1_PORTB_PIN1 = $0B;
  567. ASYNCCH1_PORTB_PIN2 = $0C;
  568. ASYNCCH1_PORTB_PIN3 = $0D;
  569. ASYNCCH1_PORTB_PIN4 = $0E;
  570. ASYNCCH1_PORTB_PIN5 = $0F;
  571. ASYNCCH1_PORTB_PIN6 = $10;
  572. ASYNCCH1_PORTB_PIN7 = $11;
  573. // EVSYS_ASYNCUSER0
  574. ASYNCUSER0mask = $FF;
  575. ASYNCUSER0_OFF = $00;
  576. ASYNCUSER0_SYNCCH0 = $01;
  577. ASYNCUSER0_SYNCCH1 = $02;
  578. ASYNCUSER0_ASYNCCH0 = $03;
  579. ASYNCUSER0_ASYNCCH1 = $04;
  580. ASYNCUSER0_ASYNCCH2 = $05;
  581. ASYNCUSER0_ASYNCCH3 = $06;
  582. // EVSYS_ASYNCUSER1
  583. ASYNCUSER1mask = $FF;
  584. ASYNCUSER1_OFF = $00;
  585. ASYNCUSER1_SYNCCH0 = $01;
  586. ASYNCUSER1_SYNCCH1 = $02;
  587. ASYNCUSER1_ASYNCCH0 = $03;
  588. ASYNCUSER1_ASYNCCH1 = $04;
  589. ASYNCUSER1_ASYNCCH2 = $05;
  590. ASYNCUSER1_ASYNCCH3 = $06;
  591. // EVSYS_ASYNCUSER2
  592. ASYNCUSER2mask = $FF;
  593. ASYNCUSER2_OFF = $00;
  594. ASYNCUSER2_SYNCCH0 = $01;
  595. ASYNCUSER2_SYNCCH1 = $02;
  596. ASYNCUSER2_ASYNCCH0 = $03;
  597. ASYNCUSER2_ASYNCCH1 = $04;
  598. ASYNCUSER2_ASYNCCH2 = $05;
  599. ASYNCUSER2_ASYNCCH3 = $06;
  600. // EVSYS_ASYNCUSER3
  601. ASYNCUSER3mask = $FF;
  602. ASYNCUSER3_OFF = $00;
  603. ASYNCUSER3_SYNCCH0 = $01;
  604. ASYNCUSER3_SYNCCH1 = $02;
  605. ASYNCUSER3_ASYNCCH0 = $03;
  606. ASYNCUSER3_ASYNCCH1 = $04;
  607. ASYNCUSER3_ASYNCCH2 = $05;
  608. ASYNCUSER3_ASYNCCH3 = $06;
  609. // EVSYS_ASYNCUSER4
  610. ASYNCUSER4mask = $FF;
  611. ASYNCUSER4_OFF = $00;
  612. ASYNCUSER4_SYNCCH0 = $01;
  613. ASYNCUSER4_SYNCCH1 = $02;
  614. ASYNCUSER4_ASYNCCH0 = $03;
  615. ASYNCUSER4_ASYNCCH1 = $04;
  616. ASYNCUSER4_ASYNCCH2 = $05;
  617. ASYNCUSER4_ASYNCCH3 = $06;
  618. // EVSYS_ASYNCUSER5
  619. ASYNCUSER5mask = $FF;
  620. ASYNCUSER5_OFF = $00;
  621. ASYNCUSER5_SYNCCH0 = $01;
  622. ASYNCUSER5_SYNCCH1 = $02;
  623. ASYNCUSER5_ASYNCCH0 = $03;
  624. ASYNCUSER5_ASYNCCH1 = $04;
  625. ASYNCUSER5_ASYNCCH2 = $05;
  626. ASYNCUSER5_ASYNCCH3 = $06;
  627. // EVSYS_ASYNCUSER6
  628. ASYNCUSER6mask = $FF;
  629. ASYNCUSER6_OFF = $00;
  630. ASYNCUSER6_SYNCCH0 = $01;
  631. ASYNCUSER6_SYNCCH1 = $02;
  632. ASYNCUSER6_ASYNCCH0 = $03;
  633. ASYNCUSER6_ASYNCCH1 = $04;
  634. ASYNCUSER6_ASYNCCH2 = $05;
  635. ASYNCUSER6_ASYNCCH3 = $06;
  636. // EVSYS_ASYNCUSER7
  637. ASYNCUSER7mask = $FF;
  638. ASYNCUSER7_OFF = $00;
  639. ASYNCUSER7_SYNCCH0 = $01;
  640. ASYNCUSER7_SYNCCH1 = $02;
  641. ASYNCUSER7_ASYNCCH0 = $03;
  642. ASYNCUSER7_ASYNCCH1 = $04;
  643. ASYNCUSER7_ASYNCCH2 = $05;
  644. ASYNCUSER7_ASYNCCH3 = $06;
  645. // EVSYS_ASYNCUSER8
  646. ASYNCUSER8mask = $FF;
  647. ASYNCUSER8_OFF = $00;
  648. ASYNCUSER8_SYNCCH0 = $01;
  649. ASYNCUSER8_SYNCCH1 = $02;
  650. ASYNCUSER8_ASYNCCH0 = $03;
  651. ASYNCUSER8_ASYNCCH1 = $04;
  652. ASYNCUSER8_ASYNCCH2 = $05;
  653. ASYNCUSER8_ASYNCCH3 = $06;
  654. // EVSYS_ASYNCUSER9
  655. ASYNCUSER9mask = $FF;
  656. ASYNCUSER9_OFF = $00;
  657. ASYNCUSER9_SYNCCH0 = $01;
  658. ASYNCUSER9_SYNCCH1 = $02;
  659. ASYNCUSER9_ASYNCCH0 = $03;
  660. ASYNCUSER9_ASYNCCH1 = $04;
  661. ASYNCUSER9_ASYNCCH2 = $05;
  662. ASYNCUSER9_ASYNCCH3 = $06;
  663. // EVSYS_ASYNCUSER10
  664. ASYNCUSER10mask = $FF;
  665. ASYNCUSER10_OFF = $00;
  666. ASYNCUSER10_SYNCCH0 = $01;
  667. ASYNCUSER10_SYNCCH1 = $02;
  668. ASYNCUSER10_ASYNCCH0 = $03;
  669. ASYNCUSER10_ASYNCCH1 = $04;
  670. ASYNCUSER10_ASYNCCH2 = $05;
  671. ASYNCUSER10_ASYNCCH3 = $06;
  672. // EVSYS_SYNCCH0
  673. SYNCCH0mask = $FF;
  674. SYNCCH0_OFF = $00;
  675. SYNCCH0_TCB0 = $01;
  676. SYNCCH0_TCA0_OVF_LUNF = $02;
  677. SYNCCH0_TCA0_HUNF = $03;
  678. SYNCCH0_TCA0_CMP0 = $04;
  679. SYNCCH0_TCA0_CMP1 = $05;
  680. SYNCCH0_TCA0_CMP2 = $06;
  681. SYNCCH0_PORTC_PIN0 = $07;
  682. SYNCCH0_PORTC_PIN1 = $08;
  683. SYNCCH0_PORTC_PIN2 = $09;
  684. SYNCCH0_PORTC_PIN3 = $0A;
  685. SYNCCH0_PORTC_PIN4 = $0B;
  686. SYNCCH0_PORTC_PIN5 = $0C;
  687. SYNCCH0_PORTA_PIN0 = $0D;
  688. SYNCCH0_PORTA_PIN1 = $0E;
  689. SYNCCH0_PORTA_PIN2 = $0F;
  690. SYNCCH0_PORTA_PIN3 = $10;
  691. SYNCCH0_PORTA_PIN4 = $11;
  692. SYNCCH0_PORTA_PIN5 = $12;
  693. SYNCCH0_PORTA_PIN6 = $13;
  694. SYNCCH0_PORTA_PIN7 = $14;
  695. // EVSYS_SYNCUSER0
  696. SYNCUSER0mask = $FF;
  697. SYNCUSER0_OFF = $00;
  698. SYNCUSER0_SYNCCH0 = $01;
  699. SYNCUSER0_SYNCCH1 = $02;
  700. // EVSYS_SYNCUSER1
  701. SYNCUSER1mask = $FF;
  702. SYNCUSER1_OFF = $00;
  703. SYNCUSER1_SYNCCH0 = $01;
  704. SYNCUSER1_SYNCCH1 = $02;
  705. end;
  706. TFUSE = object //Fuses
  707. WDTCFG: byte; //Watchdog Configuration
  708. BODCFG: byte; //BOD Configuration
  709. OSCCFG: byte; //Oscillator Configuration
  710. Reserved3: byte;
  711. TCD0CFG: byte; //TCD0 Configuration
  712. SYSCFG0: byte; //System Configuration 0
  713. SYSCFG1: byte; //System Configuration 1
  714. APPEND: byte; //Application Code Section End
  715. BOOTEND: byte; //Boot Section End
  716. const
  717. // FUSE_ACTIVE
  718. ACTIVEmask = $0C;
  719. ACTIVE_DIS = $00;
  720. ACTIVE_ENABLED = $04;
  721. ACTIVE_SAMPLED = $08;
  722. ACTIVE_ENWAKE = $0C;
  723. // FUSE_LVL
  724. LVLmask = $E0;
  725. LVL_BODLEVEL0 = $00;
  726. LVL_BODLEVEL1 = $20;
  727. LVL_BODLEVEL2 = $40;
  728. LVL_BODLEVEL3 = $60;
  729. LVL_BODLEVEL4 = $80;
  730. LVL_BODLEVEL5 = $A0;
  731. LVL_BODLEVEL6 = $C0;
  732. LVL_BODLEVEL7 = $E0;
  733. // FUSE_SAMPFREQ
  734. SAMPFREQmask = $10;
  735. SAMPFREQ_1KHz = $00;
  736. SAMPFREQ_125Hz = $10;
  737. // FUSE_SLEEP
  738. SLEEPmask = $03;
  739. SLEEP_DIS = $00;
  740. SLEEP_ENABLED = $01;
  741. SLEEP_SAMPLED = $02;
  742. // FUSE_FREQSEL
  743. FREQSELmask = $03;
  744. FREQSEL_16MHZ = $01;
  745. FREQSEL_20MHZ = $02;
  746. // Oscillator Lock
  747. OSCLOCKbm = $80;
  748. // FUSE_CRCSRC
  749. CRCSRCmask = $C0;
  750. CRCSRC_FLASH = $00;
  751. CRCSRC_BOOT = $40;
  752. CRCSRC_BOOTAPP = $80;
  753. CRCSRC_NOCRC = $C0;
  754. // EEPROM Save
  755. EESAVEbm = $01;
  756. // FUSE_RSTPINCFG
  757. RSTPINCFGmask = $0C;
  758. RSTPINCFG_GPIO = $00;
  759. RSTPINCFG_UPDI = $04;
  760. RSTPINCFG_RST = $08;
  761. // FUSE_SUT
  762. SUTmask = $07;
  763. SUT_0MS = $00;
  764. SUT_1MS = $01;
  765. SUT_2MS = $02;
  766. SUT_4MS = $03;
  767. SUT_8MS = $04;
  768. SUT_16MS = $05;
  769. SUT_32MS = $06;
  770. SUT_64MS = $07;
  771. // Compare A Default Output Value
  772. CMPAbm = $01;
  773. // Compare A Output Enable
  774. CMPAENbm = $10;
  775. // Compare B Default Output Value
  776. CMPBbm = $02;
  777. // Compare B Output Enable
  778. CMPBENbm = $20;
  779. // Compare C Default Output Value
  780. CMPCbm = $04;
  781. // Compare C Output Enable
  782. CMPCENbm = $40;
  783. // Compare D Default Output Value
  784. CMPDbm = $08;
  785. // Compare D Output Enable
  786. CMPDENbm = $80;
  787. // FUSE_PERIOD
  788. PERIODmask = $0F;
  789. PERIOD_OFF = $00;
  790. PERIOD_8CLK = $01;
  791. PERIOD_16CLK = $02;
  792. PERIOD_32CLK = $03;
  793. PERIOD_64CLK = $04;
  794. PERIOD_128CLK = $05;
  795. PERIOD_256CLK = $06;
  796. PERIOD_512CLK = $07;
  797. PERIOD_1KCLK = $08;
  798. PERIOD_2KCLK = $09;
  799. PERIOD_4KCLK = $0A;
  800. PERIOD_8KCLK = $0B;
  801. // FUSE_WINDOW
  802. WINDOWmask = $F0;
  803. WINDOW_OFF = $00;
  804. WINDOW_8CLK = $10;
  805. WINDOW_16CLK = $20;
  806. WINDOW_32CLK = $30;
  807. WINDOW_64CLK = $40;
  808. WINDOW_128CLK = $50;
  809. WINDOW_256CLK = $60;
  810. WINDOW_512CLK = $70;
  811. WINDOW_1KCLK = $80;
  812. WINDOW_2KCLK = $90;
  813. WINDOW_4KCLK = $A0;
  814. WINDOW_8KCLK = $B0;
  815. end;
  816. TGPIO = object //General Purpose IO
  817. GPIOR0: byte; //General Purpose IO Register 0
  818. GPIOR1: byte; //General Purpose IO Register 1
  819. GPIOR2: byte; //General Purpose IO Register 2
  820. GPIOR3: byte; //General Purpose IO Register 3
  821. end;
  822. TLOCKBIT = object //Lockbit
  823. LOCKBIT: byte; //Lock bits
  824. const
  825. // LOCKBIT_LB
  826. LBmask = $FF;
  827. LB_RWLOCK = $3A;
  828. LB_NOLOCK = $C5;
  829. end;
  830. TNVMCTRL = object //Non-volatile Memory Controller
  831. CTRLA: byte; //Control A
  832. CTRLB: byte; //Control B
  833. STATUS: byte; //Status
  834. INTCTRL: byte; //Interrupt Control
  835. INTFLAGS: byte; //Interrupt Flags
  836. Reserved5: byte;
  837. DATA: word; //Data
  838. ADDR: word; //Address
  839. const
  840. // NVMCTRL_CMD
  841. CMDmask = $07;
  842. CMD_NONE = $00;
  843. CMD_PAGEWRITE = $01;
  844. CMD_PAGEERASE = $02;
  845. CMD_PAGEERASEWRITE = $03;
  846. CMD_PAGEBUFCLR = $04;
  847. CMD_CHIPERASE = $05;
  848. CMD_EEERASE = $06;
  849. CMD_FUSEWRITE = $07;
  850. // Application code write protect
  851. APCWPbm = $01;
  852. // Boot Lock
  853. BOOTLOCKbm = $02;
  854. // EEPROM Ready
  855. EEREADYbm = $01;
  856. // EEPROM busy
  857. EEBUSYbm = $02;
  858. // Flash busy
  859. FBUSYbm = $01;
  860. // Write error
  861. WRERRORbm = $04;
  862. end;
  863. TPORT = object //I/O Ports
  864. DIR: byte; //Data Direction
  865. DIRSET: byte; //Data Direction Set
  866. DIRCLR: byte; //Data Direction Clear
  867. DIRTGL: byte; //Data Direction Toggle
  868. OUT_: byte; //Output Value
  869. OUTSET: byte; //Output Value Set
  870. OUTCLR: byte; //Output Value Clear
  871. OUTTGL: byte; //Output Value Toggle
  872. IN_: byte; //Input Value
  873. INTFLAGS: byte; //Interrupt Flags
  874. Reserved10: byte;
  875. Reserved11: byte;
  876. Reserved12: byte;
  877. Reserved13: byte;
  878. Reserved14: byte;
  879. Reserved15: byte;
  880. PIN0CTRL: byte; //Pin 0 Control
  881. PIN1CTRL: byte; //Pin 1 Control
  882. PIN2CTRL: byte; //Pin 2 Control
  883. PIN3CTRL: byte; //Pin 3 Control
  884. PIN4CTRL: byte; //Pin 4 Control
  885. PIN5CTRL: byte; //Pin 5 Control
  886. PIN6CTRL: byte; //Pin 6 Control
  887. PIN7CTRL: byte; //Pin 7 Control
  888. const
  889. // Pin Interrupt
  890. INT0bm = $01;
  891. INT1bm = $02;
  892. INT2bm = $04;
  893. INT3bm = $08;
  894. INT4bm = $10;
  895. INT5bm = $20;
  896. INT6bm = $40;
  897. INT7bm = $80;
  898. // Inverted I/O Enable
  899. INVENbm = $80;
  900. // PORT_ISC
  901. ISCmask = $07;
  902. ISC_INTDISABLE = $00;
  903. ISC_BOTHEDGES = $01;
  904. ISC_RISING = $02;
  905. ISC_FALLING = $03;
  906. ISC_INPUT_DISABLE = $04;
  907. ISC_LEVEL = $05;
  908. // Pullup enable
  909. PULLUPENbm = $08;
  910. end;
  911. TPORTMUX = object //Port Multiplexer
  912. CTRLA: byte; //Port Multiplexer Control A
  913. CTRLB: byte; //Port Multiplexer Control B
  914. CTRLC: byte; //Port Multiplexer Control C
  915. CTRLD: byte; //Port Multiplexer Control D
  916. const
  917. // Event Output 0
  918. EVOUT0bm = $01;
  919. // Event Output 1
  920. EVOUT1bm = $02;
  921. // Event Output 2
  922. EVOUT2bm = $04;
  923. // PORTMUX_LUT0
  924. LUT0mask = $10;
  925. LUT0_DEFAULT = $00;
  926. LUT0_ALTERNATE = $10;
  927. // PORTMUX_LUT1
  928. LUT1mask = $20;
  929. LUT1_DEFAULT = $00;
  930. LUT1_ALTERNATE = $20;
  931. // PORTMUX_SPI0
  932. SPI0mask = $04;
  933. SPI0_DEFAULT = $00;
  934. SPI0_ALTERNATE = $04;
  935. // PORTMUX_TWI0
  936. TWI0mask = $10;
  937. TWI0_DEFAULT = $00;
  938. TWI0_ALTERNATE = $10;
  939. // PORTMUX_USART0
  940. USART0mask = $01;
  941. USART0_DEFAULT = $00;
  942. USART0_ALTERNATE = $01;
  943. // PORTMUX_TCA00
  944. TCA00mask = $01;
  945. TCA00_DEFAULT = $00;
  946. TCA00_ALTERNATE = $01;
  947. // PORTMUX_TCA01
  948. TCA01mask = $02;
  949. TCA01_DEFAULT = $00;
  950. TCA01_ALTERNATE = $02;
  951. // PORTMUX_TCA02
  952. TCA02mask = $04;
  953. TCA02_DEFAULT = $00;
  954. TCA02_ALTERNATE = $04;
  955. // PORTMUX_TCA03
  956. TCA03mask = $08;
  957. TCA03_DEFAULT = $00;
  958. TCA03_ALTERNATE = $08;
  959. // PORTMUX_TCA04
  960. TCA04mask = $10;
  961. TCA04_DEFAULT = $00;
  962. TCA04_ALTERNATE = $10;
  963. // PORTMUX_TCA05
  964. TCA05mask = $20;
  965. TCA05_DEFAULT = $00;
  966. TCA05_ALTERNATE = $20;
  967. // PORTMUX_TCB0
  968. TCB0mask = $01;
  969. TCB0_DEFAULT = $00;
  970. TCB0_ALTERNATE = $01;
  971. end;
  972. TRSTCTRL = object //Reset controller
  973. RSTFR: byte; //Reset Flags
  974. SWRR: byte; //Software Reset
  975. const
  976. // Brown out detector Reset flag
  977. BORFbm = $02;
  978. // External Reset flag
  979. EXTRFbm = $04;
  980. // Power on Reset flag
  981. PORFbm = $01;
  982. // Software Reset flag
  983. SWRFbm = $10;
  984. // UPDI Reset flag
  985. UPDIRFbm = $20;
  986. // Watch dog Reset flag
  987. WDRFbm = $08;
  988. // Software reset enable
  989. SWREbm = $01;
  990. end;
  991. TRTC = object //Real-Time Counter
  992. CTRLA: byte; //Control A
  993. STATUS: byte; //Status
  994. INTCTRL: byte; //Interrupt Control
  995. INTFLAGS: byte; //Interrupt Flags
  996. TEMP: byte; //Temporary
  997. DBGCTRL: byte; //Debug control
  998. Reserved6: byte;
  999. CLKSEL: byte; //Clock Select
  1000. CNT: word; //Counter
  1001. PER: word; //Period
  1002. CMP: word; //Compare
  1003. Reserved14: byte;
  1004. Reserved15: byte;
  1005. PITCTRLA: byte; //PIT Control A
  1006. PITSTATUS: byte; //PIT Status
  1007. PITINTCTRL: byte; //PIT Interrupt Control
  1008. PITINTFLAGS: byte; //PIT Interrupt Flags
  1009. Reserved20: byte;
  1010. PITDBGCTRL: byte; //PIT Debug control
  1011. const
  1012. // RTC_CLKSEL
  1013. CLKSELmask = $03;
  1014. CLKSEL_INT32K = $00;
  1015. CLKSEL_INT1K = $01;
  1016. CLKSEL_TOSC32K = $02;
  1017. CLKSEL_EXTCLK = $03;
  1018. // RTC_PRESCALER
  1019. PRESCALERmask = $78;
  1020. PRESCALER_DIV1 = $00;
  1021. PRESCALER_DIV2 = $08;
  1022. PRESCALER_DIV4 = $10;
  1023. PRESCALER_DIV8 = $18;
  1024. PRESCALER_DIV16 = $20;
  1025. PRESCALER_DIV32 = $28;
  1026. PRESCALER_DIV64 = $30;
  1027. PRESCALER_DIV128 = $38;
  1028. PRESCALER_DIV256 = $40;
  1029. PRESCALER_DIV512 = $48;
  1030. PRESCALER_DIV1024 = $50;
  1031. PRESCALER_DIV2048 = $58;
  1032. PRESCALER_DIV4096 = $60;
  1033. PRESCALER_DIV8192 = $68;
  1034. PRESCALER_DIV16384 = $70;
  1035. PRESCALER_DIV32768 = $78;
  1036. // Enable
  1037. RTCENbm = $01;
  1038. // Run In Standby
  1039. RUNSTDBYbm = $80;
  1040. // Run in debug
  1041. DBGRUNbm = $01;
  1042. // Compare Match Interrupt enable
  1043. CMPbm = $02;
  1044. // Overflow Interrupt enable
  1045. OVFbm = $01;
  1046. // RTC_PERIOD
  1047. PERIODmask = $78;
  1048. PERIOD_OFF = $00;
  1049. PERIOD_CYC4 = $08;
  1050. PERIOD_CYC8 = $10;
  1051. PERIOD_CYC16 = $18;
  1052. PERIOD_CYC32 = $20;
  1053. PERIOD_CYC64 = $28;
  1054. PERIOD_CYC128 = $30;
  1055. PERIOD_CYC256 = $38;
  1056. PERIOD_CYC512 = $40;
  1057. PERIOD_CYC1024 = $48;
  1058. PERIOD_CYC2048 = $50;
  1059. PERIOD_CYC4096 = $58;
  1060. PERIOD_CYC8192 = $60;
  1061. PERIOD_CYC16384 = $68;
  1062. PERIOD_CYC32768 = $70;
  1063. // Enable
  1064. PITENbm = $01;
  1065. // Periodic Interrupt
  1066. PIbm = $01;
  1067. // CTRLA Synchronization Busy Flag
  1068. CTRLBUSYbm = $01;
  1069. // Comparator Synchronization Busy Flag
  1070. CMPBUSYbm = $08;
  1071. // Count Synchronization Busy Flag
  1072. CNTBUSYbm = $02;
  1073. // CTRLA Synchronization Busy Flag
  1074. CTRLABUSYbm = $01;
  1075. // Period Synchronization Busy Flag
  1076. PERBUSYbm = $04;
  1077. end;
  1078. TSIGROW = object //Signature row
  1079. DEVICEID0: byte; //Device ID Byte 0
  1080. DEVICEID1: byte; //Device ID Byte 1
  1081. DEVICEID2: byte; //Device ID Byte 2
  1082. SERNUM0: byte; //Serial Number Byte 0
  1083. SERNUM1: byte; //Serial Number Byte 1
  1084. SERNUM2: byte; //Serial Number Byte 2
  1085. SERNUM3: byte; //Serial Number Byte 3
  1086. SERNUM4: byte; //Serial Number Byte 4
  1087. SERNUM5: byte; //Serial Number Byte 5
  1088. SERNUM6: byte; //Serial Number Byte 6
  1089. SERNUM7: byte; //Serial Number Byte 7
  1090. SERNUM8: byte; //Serial Number Byte 8
  1091. SERNUM9: byte; //Serial Number Byte 9
  1092. Reserved13: byte;
  1093. Reserved14: byte;
  1094. Reserved15: byte;
  1095. Reserved16: byte;
  1096. Reserved17: byte;
  1097. Reserved18: byte;
  1098. Reserved19: byte;
  1099. Reserved20: byte;
  1100. Reserved21: byte;
  1101. Reserved22: byte;
  1102. Reserved23: byte;
  1103. Reserved24: byte;
  1104. Reserved25: byte;
  1105. Reserved26: byte;
  1106. Reserved27: byte;
  1107. Reserved28: byte;
  1108. Reserved29: byte;
  1109. Reserved30: byte;
  1110. Reserved31: byte;
  1111. TEMPSENSE0: byte; //Temperature Sensor Calibration Byte 0
  1112. TEMPSENSE1: byte; //Temperature Sensor Calibration Byte 1
  1113. OSC16ERR3V: byte; //OSC16 error at 3V
  1114. OSC16ERR5V: byte; //OSC16 error at 5V
  1115. OSC20ERR3V: byte; //OSC20 error at 3V
  1116. OSC20ERR5V: byte; //OSC20 error at 5V
  1117. end;
  1118. TSLPCTRL = object //Sleep Controller
  1119. CTRLA: byte; //Control
  1120. const
  1121. // Sleep enable
  1122. SENbm = $01;
  1123. // SLPCTRL_SMODE
  1124. SMODEmask = $06;
  1125. SMODE_IDLE = $00;
  1126. SMODE_STDBY = $02;
  1127. SMODE_PDOWN = $04;
  1128. end;
  1129. TSPI = object //Serial Peripheral Interface
  1130. CTRLA: byte; //Control A
  1131. CTRLB: byte; //Control B
  1132. INTCTRL: byte; //Interrupt Control
  1133. INTFLAGS: byte; //Interrupt Flags
  1134. DATA: byte; //Data
  1135. const
  1136. // Enable Double Speed
  1137. CLK2Xbm = $10;
  1138. // Data Order Setting
  1139. DORDbm = $40;
  1140. // Enable Module
  1141. ENABLEbm = $01;
  1142. // Master Operation Enable
  1143. MASTERbm = $20;
  1144. // SPI_PRESC
  1145. PRESCmask = $06;
  1146. PRESC_DIV4 = $00;
  1147. PRESC_DIV16 = $02;
  1148. PRESC_DIV64 = $04;
  1149. PRESC_DIV128 = $06;
  1150. // Buffer Mode Enable
  1151. BUFENbm = $80;
  1152. // Buffer Write Mode
  1153. BUFWRbm = $40;
  1154. // SPI_MODE
  1155. MODEmask = $03;
  1156. MODE_0 = $00;
  1157. MODE_1 = $01;
  1158. MODE_2 = $02;
  1159. MODE_3 = $03;
  1160. // Slave Select Disable
  1161. SSDbm = $04;
  1162. // Data Register Empty Interrupt Enable
  1163. DREIEbm = $20;
  1164. // Interrupt Enable
  1165. IEbm = $01;
  1166. // Receive Complete Interrupt Enable
  1167. RXCIEbm = $80;
  1168. // Slave Select Trigger Interrupt Enable
  1169. SSIEbm = $10;
  1170. // Transfer Complete Interrupt Enable
  1171. TXCIEbm = $40;
  1172. // Buffer Overflow
  1173. BUFOVFbm = $01;
  1174. // Data Register Empty Interrupt Flag
  1175. DREIFbm = $20;
  1176. // Receive Complete Interrupt Flag
  1177. RXCIFbm = $80;
  1178. // Slave Select Trigger Interrupt Flag
  1179. SSIFbm = $10;
  1180. // Transfer Complete Interrupt Flag
  1181. TXCIFbm = $40;
  1182. // Interrupt Flag
  1183. IFbm = $80;
  1184. // Write Collision
  1185. WRCOLbm = $40;
  1186. end;
  1187. TSYSCFG = object //System Configuration Registers
  1188. Reserved0: byte;
  1189. REVID: byte; //Revision ID
  1190. EXTBRK: byte; //External Break
  1191. const
  1192. // External break enable
  1193. ENEXTBRKbm = $01;
  1194. end;
  1195. TTCA_SINGLE = object //16-bit Timer/Counter Type A - Single Mode
  1196. CTRLA: byte; //Control A
  1197. CTRLB: byte; //Control B
  1198. CTRLC: byte; //Control C
  1199. CTRLD: byte; //Control D
  1200. CTRLECLR: byte; //Control E Clear
  1201. CTRLESET: byte; //Control E Set
  1202. CTRLFCLR: byte; //Control F Clear
  1203. CTRLFSET: byte; //Control F Set
  1204. Reserved8: byte;
  1205. EVCTRL: byte; //Event Control
  1206. INTCTRL: byte; //Interrupt Control
  1207. INTFLAGS: byte; //Interrupt Flags
  1208. Reserved12: byte;
  1209. Reserved13: byte;
  1210. DBGCTRL: byte; //Degbug Control
  1211. TEMP: byte; //Temporary data for 16-bit Access
  1212. Reserved16: byte;
  1213. Reserved17: byte;
  1214. Reserved18: byte;
  1215. Reserved19: byte;
  1216. Reserved20: byte;
  1217. Reserved21: byte;
  1218. Reserved22: byte;
  1219. Reserved23: byte;
  1220. Reserved24: byte;
  1221. Reserved25: byte;
  1222. Reserved26: byte;
  1223. Reserved27: byte;
  1224. Reserved28: byte;
  1225. Reserved29: byte;
  1226. Reserved30: byte;
  1227. Reserved31: byte;
  1228. CNT: word; //Count
  1229. Reserved34: byte;
  1230. Reserved35: byte;
  1231. Reserved36: byte;
  1232. Reserved37: byte;
  1233. PER: word; //Period
  1234. CMP0: word; //Compare 0
  1235. CMP1: word; //Compare 1
  1236. CMP2: word; //Compare 2
  1237. Reserved46: byte;
  1238. Reserved47: byte;
  1239. Reserved48: byte;
  1240. Reserved49: byte;
  1241. Reserved50: byte;
  1242. Reserved51: byte;
  1243. Reserved52: byte;
  1244. Reserved53: byte;
  1245. PERBUF: word; //Period Buffer
  1246. CMP0BUF: word; //Compare 0 Buffer
  1247. CMP1BUF: word; //Compare 1 Buffer
  1248. CMP2BUF: word; //Compare 2 Buffer
  1249. const
  1250. // TCA_SINGLE_CLKSEL
  1251. SINGLE_CLKSELmask = $0E;
  1252. SINGLE_CLKSEL_DIV1 = $00;
  1253. SINGLE_CLKSEL_DIV2 = $02;
  1254. SINGLE_CLKSEL_DIV4 = $04;
  1255. SINGLE_CLKSEL_DIV8 = $06;
  1256. SINGLE_CLKSEL_DIV16 = $08;
  1257. SINGLE_CLKSEL_DIV64 = $0A;
  1258. SINGLE_CLKSEL_DIV256 = $0C;
  1259. SINGLE_CLKSEL_DIV1024 = $0E;
  1260. // Module Enable
  1261. ENABLEbm = $01;
  1262. // Auto Lock Update
  1263. ALUPDbm = $08;
  1264. // Compare 0 Enable
  1265. CMP0ENbm = $10;
  1266. // Compare 1 Enable
  1267. CMP1ENbm = $20;
  1268. // Compare 2 Enable
  1269. CMP2ENbm = $40;
  1270. // TCA_SINGLE_WGMODE
  1271. SINGLE_WGMODEmask = $07;
  1272. SINGLE_WGMODE_NORMAL = $00;
  1273. SINGLE_WGMODE_FRQ = $01;
  1274. SINGLE_WGMODE_SINGLESLOPE = $03;
  1275. SINGLE_WGMODE_DSTOP = $05;
  1276. SINGLE_WGMODE_DSBOTH = $06;
  1277. SINGLE_WGMODE_DSBOTTOM = $07;
  1278. // Compare 0 Waveform Output Value
  1279. CMP0OVbm = $01;
  1280. // Compare 1 Waveform Output Value
  1281. CMP1OVbm = $02;
  1282. // Compare 2 Waveform Output Value
  1283. CMP2OVbm = $04;
  1284. // Split Mode Enable
  1285. SPLITMbm = $01;
  1286. // TCA_SINGLE_CMD
  1287. SINGLE_CMDmask = $0C;
  1288. SINGLE_CMD_NONE = $00;
  1289. SINGLE_CMD_UPDATE = $04;
  1290. SINGLE_CMD_RESTART = $08;
  1291. SINGLE_CMD_RESET = $0C;
  1292. // Direction
  1293. DIRbm = $01;
  1294. // Lock Update
  1295. LUPDbm = $02;
  1296. // Compare 0 Buffer Valid
  1297. CMP0BVbm = $02;
  1298. // Compare 1 Buffer Valid
  1299. CMP1BVbm = $04;
  1300. // Compare 2 Buffer Valid
  1301. CMP2BVbm = $08;
  1302. // Period Buffer Valid
  1303. PERBVbm = $01;
  1304. // Debug Run
  1305. DBGRUNbm = $01;
  1306. // Count on Event Input
  1307. CNTEIbm = $01;
  1308. // TCA_SINGLE_EVACT
  1309. SINGLE_EVACTmask = $06;
  1310. SINGLE_EVACT_POSEDGE = $00;
  1311. SINGLE_EVACT_ANYEDGE = $02;
  1312. SINGLE_EVACT_HIGHLVL = $04;
  1313. SINGLE_EVACT_UPDOWN = $06;
  1314. // Compare 0 Interrupt
  1315. CMP0bm = $10;
  1316. // Compare 1 Interrupt
  1317. CMP1bm = $20;
  1318. // Compare 2 Interrupt
  1319. CMP2bm = $40;
  1320. // Overflow Interrupt
  1321. OVFbm = $01;
  1322. end;
  1323. TTCA_SPLIT = object //16-bit Timer/Counter Type A - Split Mode
  1324. CTRLA: byte; //Control A
  1325. CTRLB: byte; //Control B
  1326. CTRLC: byte; //Control C
  1327. CTRLD: byte; //Control D
  1328. CTRLECLR: byte; //Control E Clear
  1329. CTRLESET: byte; //Control E Set
  1330. Reserved6: byte;
  1331. Reserved7: byte;
  1332. Reserved8: byte;
  1333. Reserved9: byte;
  1334. INTCTRL: byte; //Interrupt Control
  1335. INTFLAGS: byte; //Interrupt Flags
  1336. Reserved12: byte;
  1337. Reserved13: byte;
  1338. DBGCTRL: byte; //Degbug Control
  1339. Reserved15: byte;
  1340. Reserved16: byte;
  1341. Reserved17: byte;
  1342. Reserved18: byte;
  1343. Reserved19: byte;
  1344. Reserved20: byte;
  1345. Reserved21: byte;
  1346. Reserved22: byte;
  1347. Reserved23: byte;
  1348. Reserved24: byte;
  1349. Reserved25: byte;
  1350. Reserved26: byte;
  1351. Reserved27: byte;
  1352. Reserved28: byte;
  1353. Reserved29: byte;
  1354. Reserved30: byte;
  1355. Reserved31: byte;
  1356. LCNT: byte; //Low Count
  1357. HCNT: byte; //High Count
  1358. Reserved34: byte;
  1359. Reserved35: byte;
  1360. Reserved36: byte;
  1361. Reserved37: byte;
  1362. LPER: byte; //Low Period
  1363. HPER: byte; //High Period
  1364. LCMP0: byte; //Low Compare
  1365. HCMP0: byte; //High Compare
  1366. LCMP1: byte; //Low Compare
  1367. HCMP1: byte; //High Compare
  1368. LCMP2: byte; //Low Compare
  1369. HCMP2: byte; //High Compare
  1370. const
  1371. // TCA_SPLIT_CLKSEL
  1372. SPLIT_CLKSELmask = $0E;
  1373. SPLIT_CLKSEL_DIV1 = $00;
  1374. SPLIT_CLKSEL_DIV2 = $02;
  1375. SPLIT_CLKSEL_DIV4 = $04;
  1376. SPLIT_CLKSEL_DIV8 = $06;
  1377. SPLIT_CLKSEL_DIV16 = $08;
  1378. SPLIT_CLKSEL_DIV64 = $0A;
  1379. SPLIT_CLKSEL_DIV256 = $0C;
  1380. SPLIT_CLKSEL_DIV1024 = $0E;
  1381. // Module Enable
  1382. ENABLEbm = $01;
  1383. // High Compare 0 Enable
  1384. HCMP0ENbm = $10;
  1385. // High Compare 1 Enable
  1386. HCMP1ENbm = $20;
  1387. // High Compare 2 Enable
  1388. HCMP2ENbm = $40;
  1389. // Low Compare 0 Enable
  1390. LCMP0ENbm = $01;
  1391. // Low Compare 1 Enable
  1392. LCMP1ENbm = $02;
  1393. // Low Compare 2 Enable
  1394. LCMP2ENbm = $04;
  1395. // High Compare 0 Output Value
  1396. HCMP0OVbm = $10;
  1397. // High Compare 1 Output Value
  1398. HCMP1OVbm = $20;
  1399. // High Compare 2 Output Value
  1400. HCMP2OVbm = $40;
  1401. // Low Compare 0 Output Value
  1402. LCMP0OVbm = $01;
  1403. // Low Compare 1 Output Value
  1404. LCMP1OVbm = $02;
  1405. // Low Compare 2 Output Value
  1406. LCMP2OVbm = $04;
  1407. // Split Mode Enable
  1408. SPLITMbm = $01;
  1409. // TCA_SPLIT_CMD
  1410. SPLIT_CMDmask = $0C;
  1411. SPLIT_CMD_NONE = $00;
  1412. SPLIT_CMD_UPDATE = $04;
  1413. SPLIT_CMD_RESTART = $08;
  1414. SPLIT_CMD_RESET = $0C;
  1415. // Debug Run
  1416. DBGRUNbm = $01;
  1417. // High Underflow Interrupt Enable
  1418. HUNFbm = $02;
  1419. // Low Compare 0 Interrupt Enable
  1420. LCMP0bm = $10;
  1421. // Low Compare 1 Interrupt Enable
  1422. LCMP1bm = $20;
  1423. // Low Compare 2 Interrupt Enable
  1424. LCMP2bm = $40;
  1425. // Low Underflow Interrupt Enable
  1426. LUNFbm = $01;
  1427. end;
  1428. TTCA = record //16-bit Timer/Counter Type A
  1429. case byte of
  1430. 0: (SINGLE: TTCA_SINGLE);
  1431. 1: (SPLIT: TTCA_SPLIT);
  1432. end;
  1433. TTCB = object //16-bit Timer Type B
  1434. CTRLA: byte; //Control A
  1435. CTRLB: byte; //Control Register B
  1436. Reserved2: byte;
  1437. Reserved3: byte;
  1438. EVCTRL: byte; //Event Control
  1439. INTCTRL: byte; //Interrupt Control
  1440. INTFLAGS: byte; //Interrupt Flags
  1441. STATUS: byte; //Status
  1442. DBGCTRL: byte; //Debug Control
  1443. TEMP: byte; //Temporary Value
  1444. CNT: word; //Count
  1445. CCMP: word; //Compare or Capture
  1446. const
  1447. // TCB_CLKSEL
  1448. CLKSELmask = $06;
  1449. CLKSEL_CLKDIV1 = $00;
  1450. CLKSEL_CLKDIV2 = $02;
  1451. CLKSEL_CLKTCA = $04;
  1452. // Enable
  1453. ENABLEbm = $01;
  1454. // Run Standby
  1455. RUNSTDBYbm = $40;
  1456. // Synchronize Update
  1457. SYNCUPDbm = $10;
  1458. // Asynchronous Enable
  1459. ASYNCbm = $40;
  1460. // Pin Output Enable
  1461. CCMPENbm = $10;
  1462. // Pin Initial State
  1463. CCMPINITbm = $20;
  1464. // TCB_CNTMODE
  1465. CNTMODEmask = $07;
  1466. CNTMODE_INT = $00;
  1467. CNTMODE_TIMEOUT = $01;
  1468. CNTMODE_CAPT = $02;
  1469. CNTMODE_FRQ = $03;
  1470. CNTMODE_PW = $04;
  1471. CNTMODE_FRQPW = $05;
  1472. CNTMODE_SINGLE = $06;
  1473. CNTMODE_PWM8 = $07;
  1474. // Debug Run
  1475. DBGRUNbm = $01;
  1476. // Event Input Enable
  1477. CAPTEIbm = $01;
  1478. // Event Edge
  1479. EDGEbm = $10;
  1480. // Input Capture Noise Cancellation Filter
  1481. FILTERbm = $40;
  1482. // Capture or Timeout
  1483. CAPTbm = $01;
  1484. // Run
  1485. RUNbm = $01;
  1486. end;
  1487. TTWI = object //Two-Wire Interface
  1488. CTRLA: byte; //Control A
  1489. Reserved1: byte;
  1490. DBGCTRL: byte; //Debug Control Register
  1491. MCTRLA: byte; //Master Control A
  1492. MCTRLB: byte; //Master Control B
  1493. MSTATUS: byte; //Master Status
  1494. MBAUD: byte; //Master Baurd Rate Control
  1495. MADDR: byte; //Master Address
  1496. MDATA: byte; //Master Data
  1497. SCTRLA: byte; //Slave Control A
  1498. SCTRLB: byte; //Slave Control B
  1499. SSTATUS: byte; //Slave Status
  1500. SADDR: byte; //Slave Address
  1501. SDATA: byte; //Slave Data
  1502. SADDRMASK: byte; //Slave Address Mask
  1503. const
  1504. // FM Plus Enable
  1505. FMPENbm = $02;
  1506. // TWI_SDAHOLD
  1507. SDAHOLDmask = $0C;
  1508. SDAHOLD_OFF = $00;
  1509. SDAHOLD_50NS = $04;
  1510. SDAHOLD_300NS = $08;
  1511. SDAHOLD_500NS = $0C;
  1512. // TWI_SDASETUP
  1513. SDASETUPmask = $10;
  1514. SDASETUP_4CYC = $00;
  1515. SDASETUP_8CYC = $10;
  1516. // Debug Run
  1517. DBGRUNbm = $01;
  1518. // Enable TWI Master
  1519. ENABLEbm = $01;
  1520. // Quick Command Enable
  1521. QCENbm = $10;
  1522. // Read Interrupt Enable
  1523. RIENbm = $80;
  1524. // Smart Mode Enable
  1525. SMENbm = $02;
  1526. // TWI_TIMEOUT
  1527. TIMEOUTmask = $0C;
  1528. TIMEOUT_DISABLED = $00;
  1529. TIMEOUT_50US = $04;
  1530. TIMEOUT_100US = $08;
  1531. TIMEOUT_200US = $0C;
  1532. // Write Interrupt Enable
  1533. WIENbm = $40;
  1534. // TWI_ACKACT
  1535. ACKACTmask = $04;
  1536. ACKACT_ACK = $00;
  1537. ACKACT_NACK = $04;
  1538. // Flush
  1539. FLUSHbm = $08;
  1540. // TWI_MCMD
  1541. MCMDmask = $03;
  1542. MCMD_NOACT = $00;
  1543. MCMD_REPSTART = $01;
  1544. MCMD_RECVTRANS = $02;
  1545. MCMD_STOP = $03;
  1546. // Arbitration Lost
  1547. ARBLOSTbm = $08;
  1548. // Bus Error
  1549. BUSERRbm = $04;
  1550. // TWI_BUSSTATE
  1551. BUSSTATEmask = $03;
  1552. BUSSTATE_UNKNOWN = $00;
  1553. BUSSTATE_IDLE = $01;
  1554. BUSSTATE_OWNER = $02;
  1555. BUSSTATE_BUSY = $03;
  1556. // Clock Hold
  1557. CLKHOLDbm = $20;
  1558. // Read Interrupt Flag
  1559. RIFbm = $80;
  1560. // Received Acknowledge
  1561. RXACKbm = $10;
  1562. // Write Interrupt Flag
  1563. WIFbm = $40;
  1564. // Address Enable
  1565. ADDRENbm = $01;
  1566. // Address Mask
  1567. ADDRMASK0bm = $02;
  1568. ADDRMASK1bm = $04;
  1569. ADDRMASK2bm = $08;
  1570. ADDRMASK3bm = $10;
  1571. ADDRMASK4bm = $20;
  1572. ADDRMASK5bm = $40;
  1573. ADDRMASK6bm = $80;
  1574. // Address/Stop Interrupt Enable
  1575. APIENbm = $40;
  1576. // Data Interrupt Enable
  1577. DIENbm = $80;
  1578. // Stop Interrupt Enable
  1579. PIENbm = $20;
  1580. // Promiscuous Mode Enable
  1581. PMENbm = $04;
  1582. // TWI_SCMD
  1583. SCMDmask = $03;
  1584. SCMD_NOACT = $00;
  1585. SCMD_COMPTRANS = $02;
  1586. SCMD_RESPONSE = $03;
  1587. // TWI_AP
  1588. APmask = $01;
  1589. AP_STOP = $00;
  1590. AP_ADR = $01;
  1591. // Address/Stop Interrupt Flag
  1592. APIFbm = $40;
  1593. // Collision
  1594. COLLbm = $08;
  1595. // Data Interrupt Flag
  1596. DIFbm = $80;
  1597. // Read/Write Direction
  1598. DIRbm = $02;
  1599. end;
  1600. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1601. RXDATAL: byte; //Receive Data Low Byte
  1602. RXDATAH: byte; //Receive Data High Byte
  1603. TXDATAL: byte; //Transmit Data Low Byte
  1604. TXDATAH: byte; //Transmit Data High Byte
  1605. STATUS: byte; //Status
  1606. CTRLA: byte; //Control A
  1607. CTRLB: byte; //Control B
  1608. CTRLC: byte; //Control C
  1609. BAUD: word; //Baud Rate
  1610. Reserved10: byte;
  1611. DBGCTRL: byte; //Debug Control
  1612. EVCTRL: byte; //Event Control
  1613. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1614. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1615. const
  1616. // Auto-baud Error Interrupt Enable
  1617. ABEIEbm = $04;
  1618. // Data Register Empty Interrupt Enable
  1619. DREIEbm = $20;
  1620. // Loop-back Mode Enable
  1621. LBMEbm = $08;
  1622. // USART_RS485
  1623. RS485mask = $03;
  1624. RS485_OFF = $00;
  1625. RS485_EXT = $01;
  1626. RS485_INT = $02;
  1627. // Receive Complete Interrupt Enable
  1628. RXCIEbm = $80;
  1629. // Receiver Start Frame Interrupt Enable
  1630. RXSIEbm = $10;
  1631. // Transmit Complete Interrupt Enable
  1632. TXCIEbm = $40;
  1633. // Multi-processor Communication Mode
  1634. MPCMbm = $01;
  1635. // Open Drain Mode Enable
  1636. ODMEbm = $08;
  1637. // Reciever enable
  1638. RXENbm = $80;
  1639. // USART_RXMODE
  1640. RXMODEmask = $06;
  1641. RXMODE_NORMAL = $00;
  1642. RXMODE_CLK2X = $02;
  1643. RXMODE_GENAUTO = $04;
  1644. RXMODE_LINAUTO = $06;
  1645. // Start Frame Detection Enable
  1646. SFDENbm = $10;
  1647. // Transmitter Enable
  1648. TXENbm = $40;
  1649. // USART_MSPI_CMODE
  1650. MSPI_CMODEmask = $C0;
  1651. MSPI_CMODE_ASYNCHRONOUS = $00;
  1652. MSPI_CMODE_SYNCHRONOUS = $40;
  1653. MSPI_CMODE_IRCOM = $80;
  1654. MSPI_CMODE_MSPI = $C0;
  1655. // SPI Master Mode, Clock Phase
  1656. UCPHAbm = $02;
  1657. // SPI Master Mode, Data Order
  1658. UDORDbm = $04;
  1659. // USART_NORMAL_CHSIZE
  1660. NORMAL_CHSIZEmask = $07;
  1661. NORMAL_CHSIZE_5BIT = $00;
  1662. NORMAL_CHSIZE_6BIT = $01;
  1663. NORMAL_CHSIZE_7BIT = $02;
  1664. NORMAL_CHSIZE_8BIT = $03;
  1665. NORMAL_CHSIZE_9BITL = $06;
  1666. NORMAL_CHSIZE_9BITH = $07;
  1667. // USART_NORMAL_CMODE
  1668. NORMAL_CMODEmask = $C0;
  1669. NORMAL_CMODE_ASYNCHRONOUS = $00;
  1670. NORMAL_CMODE_SYNCHRONOUS = $40;
  1671. NORMAL_CMODE_IRCOM = $80;
  1672. NORMAL_CMODE_MSPI = $C0;
  1673. // USART_NORMAL_PMODE
  1674. NORMAL_PMODEmask = $30;
  1675. NORMAL_PMODE_DISABLED = $00;
  1676. NORMAL_PMODE_EVEN = $20;
  1677. NORMAL_PMODE_ODD = $30;
  1678. // USART_NORMAL_SBMODE
  1679. NORMAL_SBMODEmask = $08;
  1680. NORMAL_SBMODE_1BIT = $00;
  1681. NORMAL_SBMODE_2BIT = $08;
  1682. // Autobaud majority voter bypass
  1683. ABMBPbm = $80;
  1684. // Debug Run
  1685. DBGRUNbm = $01;
  1686. // IrDA Event Input Enable
  1687. IREIbm = $01;
  1688. // Buffer Overflow
  1689. BUFOVFbm = $40;
  1690. // Receiver Data Register
  1691. DATA8bm = $01;
  1692. // Frame Error
  1693. FERRbm = $04;
  1694. // Parity Error
  1695. PERRbm = $02;
  1696. // Receive Complete Interrupt Flag
  1697. RXCIFbm = $80;
  1698. // RX Data
  1699. DATA0bm = $01;
  1700. DATA1bm = $02;
  1701. DATA2bm = $04;
  1702. DATA3bm = $08;
  1703. DATA4bm = $10;
  1704. DATA5bm = $20;
  1705. DATA6bm = $40;
  1706. DATA7bm = $80;
  1707. // Receiver Pulse Lenght
  1708. RXPL0bm = $01;
  1709. RXPL1bm = $02;
  1710. RXPL2bm = $04;
  1711. RXPL3bm = $08;
  1712. RXPL4bm = $10;
  1713. RXPL5bm = $20;
  1714. RXPL6bm = $40;
  1715. // Break Detected Flag
  1716. BDFbm = $02;
  1717. // Data Register Empty Flag
  1718. DREIFbm = $20;
  1719. // Inconsistent Sync Field Interrupt Flag
  1720. ISFIFbm = $08;
  1721. // Receive Start Interrupt
  1722. RXSIFbm = $10;
  1723. // Transmit Interrupt Flag
  1724. TXCIFbm = $40;
  1725. // Wait For Break
  1726. WFBbm = $01;
  1727. // Transmit pulse length
  1728. TXPL0bm = $01;
  1729. TXPL1bm = $02;
  1730. TXPL2bm = $04;
  1731. TXPL3bm = $08;
  1732. TXPL4bm = $10;
  1733. TXPL5bm = $20;
  1734. TXPL6bm = $40;
  1735. TXPL7bm = $80;
  1736. end;
  1737. TUSERROW = object //User Row
  1738. USERROW0: byte; //User Row Byte 0
  1739. USERROW1: byte; //User Row Byte 1
  1740. USERROW2: byte; //User Row Byte 2
  1741. USERROW3: byte; //User Row Byte 3
  1742. USERROW4: byte; //User Row Byte 4
  1743. USERROW5: byte; //User Row Byte 5
  1744. USERROW6: byte; //User Row Byte 6
  1745. USERROW7: byte; //User Row Byte 7
  1746. USERROW8: byte; //User Row Byte 8
  1747. USERROW9: byte; //User Row Byte 9
  1748. USERROW10: byte; //User Row Byte 10
  1749. USERROW11: byte; //User Row Byte 11
  1750. USERROW12: byte; //User Row Byte 12
  1751. USERROW13: byte; //User Row Byte 13
  1752. USERROW14: byte; //User Row Byte 14
  1753. USERROW15: byte; //User Row Byte 15
  1754. USERROW16: byte; //User Row Byte 16
  1755. USERROW17: byte; //User Row Byte 17
  1756. USERROW18: byte; //User Row Byte 18
  1757. USERROW19: byte; //User Row Byte 19
  1758. USERROW20: byte; //User Row Byte 20
  1759. USERROW21: byte; //User Row Byte 21
  1760. USERROW22: byte; //User Row Byte 22
  1761. USERROW23: byte; //User Row Byte 23
  1762. USERROW24: byte; //User Row Byte 24
  1763. USERROW25: byte; //User Row Byte 25
  1764. USERROW26: byte; //User Row Byte 26
  1765. USERROW27: byte; //User Row Byte 27
  1766. USERROW28: byte; //User Row Byte 28
  1767. USERROW29: byte; //User Row Byte 29
  1768. USERROW30: byte; //User Row Byte 30
  1769. USERROW31: byte; //User Row Byte 31
  1770. end;
  1771. TVPORT = object //Virtual Ports
  1772. DIR: byte; //Data Direction
  1773. OUT_: byte; //Output Value
  1774. IN_: byte; //Input Value
  1775. INTFLAGS: byte; //Interrupt Flags
  1776. const
  1777. // Pin Interrupt
  1778. INT0bm = $01;
  1779. INT1bm = $02;
  1780. INT2bm = $04;
  1781. INT3bm = $08;
  1782. INT4bm = $10;
  1783. INT5bm = $20;
  1784. INT6bm = $40;
  1785. INT7bm = $80;
  1786. end;
  1787. TVREF = object //Voltage reference
  1788. CTRLA: byte; //Control A
  1789. CTRLB: byte; //Control B
  1790. const
  1791. // VREF_ADC0REFSEL
  1792. ADC0REFSELmask = $70;
  1793. ADC0REFSEL_0V55 = $00;
  1794. ADC0REFSEL_1V1 = $10;
  1795. ADC0REFSEL_2V5 = $20;
  1796. ADC0REFSEL_4V34 = $30;
  1797. ADC0REFSEL_1V5 = $40;
  1798. // VREF_DAC0REFSEL
  1799. DAC0REFSELmask = $07;
  1800. DAC0REFSEL_0V55 = $00;
  1801. DAC0REFSEL_1V1 = $01;
  1802. DAC0REFSEL_2V5 = $02;
  1803. DAC0REFSEL_4V34 = $03;
  1804. DAC0REFSEL_1V5 = $04;
  1805. // ADC0 reference enable
  1806. ADC0REFENbm = $02;
  1807. // DAC0/AC0 reference enable
  1808. DAC0REFENbm = $01;
  1809. end;
  1810. TWDT = object //Watch-Dog Timer
  1811. CTRLA: byte; //Control A
  1812. STATUS: byte; //Status
  1813. const
  1814. // WDT_PERIOD
  1815. PERIODmask = $0F;
  1816. PERIOD_OFF = $00;
  1817. PERIOD_8CLK = $01;
  1818. PERIOD_16CLK = $02;
  1819. PERIOD_32CLK = $03;
  1820. PERIOD_64CLK = $04;
  1821. PERIOD_128CLK = $05;
  1822. PERIOD_256CLK = $06;
  1823. PERIOD_512CLK = $07;
  1824. PERIOD_1KCLK = $08;
  1825. PERIOD_2KCLK = $09;
  1826. PERIOD_4KCLK = $0A;
  1827. PERIOD_8KCLK = $0B;
  1828. // WDT_WINDOW
  1829. WINDOWmask = $F0;
  1830. WINDOW_OFF = $00;
  1831. WINDOW_8CLK = $10;
  1832. WINDOW_16CLK = $20;
  1833. WINDOW_32CLK = $30;
  1834. WINDOW_64CLK = $40;
  1835. WINDOW_128CLK = $50;
  1836. WINDOW_256CLK = $60;
  1837. WINDOW_512CLK = $70;
  1838. WINDOW_1KCLK = $80;
  1839. WINDOW_2KCLK = $90;
  1840. WINDOW_4KCLK = $A0;
  1841. WINDOW_8KCLK = $B0;
  1842. // Lock enable
  1843. LOCKbm = $80;
  1844. // Syncronization busy
  1845. SYNCBUSYbm = $01;
  1846. end;
  1847. const
  1848. Pin0idx = 0; Pin0bm = 1;
  1849. Pin1idx = 1; Pin1bm = 2;
  1850. Pin2idx = 2; Pin2bm = 4;
  1851. Pin3idx = 3; Pin3bm = 8;
  1852. Pin4idx = 4; Pin4bm = 16;
  1853. Pin5idx = 5; Pin5bm = 32;
  1854. Pin6idx = 6; Pin6bm = 64;
  1855. Pin7idx = 7; Pin7bm = 128;
  1856. var
  1857. VPORTA: TVPORT absolute $0000;
  1858. VPORTB: TVPORT absolute $0004;
  1859. VPORTC: TVPORT absolute $0008;
  1860. GPIO: TGPIO absolute $001C;
  1861. CPU: TCPU absolute $0030;
  1862. RSTCTRL: TRSTCTRL absolute $0040;
  1863. SLPCTRL: TSLPCTRL absolute $0050;
  1864. CLKCTRL: TCLKCTRL absolute $0060;
  1865. BOD: TBOD absolute $0080;
  1866. VREF: TVREF absolute $00A0;
  1867. WDT: TWDT absolute $0100;
  1868. CPUINT: TCPUINT absolute $0110;
  1869. CRCSCAN: TCRCSCAN absolute $0120;
  1870. RTC: TRTC absolute $0140;
  1871. EVSYS: TEVSYS absolute $0180;
  1872. CCL: TCCL absolute $01C0;
  1873. PORTMUX: TPORTMUX absolute $0200;
  1874. PORTA: TPORT absolute $0400;
  1875. PORTB: TPORT absolute $0420;
  1876. ADC0: TADC absolute $0600;
  1877. AC0: TAC absolute $0670;
  1878. USART0: TUSART absolute $0800;
  1879. TWI0: TTWI absolute $0810;
  1880. SPI0: TSPI absolute $0820;
  1881. TCA0: TTCA absolute $0A00;
  1882. TCB0: TTCB absolute $0A40;
  1883. SYSCFG: TSYSCFG absolute $0F00;
  1884. NVMCTRL: TNVMCTRL absolute $1000;
  1885. SIGROW: TSIGROW absolute $1100;
  1886. FUSE: TFUSE absolute $1280;
  1887. LOCKBIT: TLOCKBIT absolute $128A;
  1888. USERROW: TUSERROW absolute $1300;
  1889. implementation
  1890. {$define RELBRANCHES}
  1891. {$i avrcommon.inc}
  1892. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  1893. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  1894. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 3
  1895. procedure PORTB_PORT_ISR; external name 'PORTB_PORT_ISR'; // Interrupt 4
  1896. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 6
  1897. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 7
  1898. procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 8
  1899. //procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 8
  1900. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 9
  1901. procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 10
  1902. //procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 10
  1903. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 11
  1904. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 11
  1905. procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 12
  1906. //procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 12
  1907. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 13
  1908. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 16
  1909. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 17
  1910. procedure ADC0_WCOMP_ISR; external name 'ADC0_WCOMP_ISR'; // Interrupt 18
  1911. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 19
  1912. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 20
  1913. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 21
  1914. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 22
  1915. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 23
  1916. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 24
  1917. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 25
  1918. procedure _FPC_start; assembler; nostackframe;
  1919. label
  1920. _start;
  1921. asm
  1922. .init
  1923. .globl _start
  1924. rjmp _start
  1925. rjmp CRCSCAN_NMI_ISR
  1926. rjmp BOD_VLM_ISR
  1927. rjmp PORTA_PORT_ISR
  1928. rjmp PORTB_PORT_ISR
  1929. rjmp RTC_CNT_ISR
  1930. rjmp RTC_PIT_ISR
  1931. rjmp TCA0_LUNF_ISR
  1932. // rjmp TCA0_OVF_ISR
  1933. rjmp TCA0_HUNF_ISR
  1934. rjmp TCA0_LCMP0_ISR
  1935. // rjmp TCA0_CMP0_ISR
  1936. rjmp TCA0_CMP1_ISR
  1937. // rjmp TCA0_LCMP1_ISR
  1938. rjmp TCA0_CMP2_ISR
  1939. // rjmp TCA0_LCMP2_ISR
  1940. rjmp TCB0_INT_ISR
  1941. rjmp AC0_AC_ISR
  1942. rjmp ADC0_RESRDY_ISR
  1943. rjmp ADC0_WCOMP_ISR
  1944. rjmp TWI0_TWIS_ISR
  1945. rjmp TWI0_TWIM_ISR
  1946. rjmp SPI0_INT_ISR
  1947. rjmp USART0_RXC_ISR
  1948. rjmp USART0_DRE_ISR
  1949. rjmp USART0_TXC_ISR
  1950. rjmp NVMCTRL_EE_ISR
  1951. {$i start.inc}
  1952. .weak CRCSCAN_NMI_ISR
  1953. .weak BOD_VLM_ISR
  1954. .weak PORTA_PORT_ISR
  1955. .weak PORTB_PORT_ISR
  1956. .weak RTC_CNT_ISR
  1957. .weak RTC_PIT_ISR
  1958. .weak TCA0_LUNF_ISR
  1959. // .weak TCA0_OVF_ISR
  1960. .weak TCA0_HUNF_ISR
  1961. .weak TCA0_LCMP0_ISR
  1962. // .weak TCA0_CMP0_ISR
  1963. .weak TCA0_CMP1_ISR
  1964. // .weak TCA0_LCMP1_ISR
  1965. .weak TCA0_CMP2_ISR
  1966. // .weak TCA0_LCMP2_ISR
  1967. .weak TCB0_INT_ISR
  1968. .weak AC0_AC_ISR
  1969. .weak ADC0_RESRDY_ISR
  1970. .weak ADC0_WCOMP_ISR
  1971. .weak TWI0_TWIS_ISR
  1972. .weak TWI0_TWIM_ISR
  1973. .weak SPI0_INT_ISR
  1974. .weak USART0_RXC_ISR
  1975. .weak USART0_DRE_ISR
  1976. .weak USART0_TXC_ISR
  1977. .weak NVMCTRL_EE_ISR
  1978. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  1979. .set BOD_VLM_ISR, Default_IRQ_handler
  1980. .set PORTA_PORT_ISR, Default_IRQ_handler
  1981. .set PORTB_PORT_ISR, Default_IRQ_handler
  1982. .set RTC_CNT_ISR, Default_IRQ_handler
  1983. .set RTC_PIT_ISR, Default_IRQ_handler
  1984. .set TCA0_LUNF_ISR, Default_IRQ_handler
  1985. // .set TCA0_OVF_ISR, Default_IRQ_handler
  1986. .set TCA0_HUNF_ISR, Default_IRQ_handler
  1987. .set TCA0_LCMP0_ISR, Default_IRQ_handler
  1988. // .set TCA0_CMP0_ISR, Default_IRQ_handler
  1989. .set TCA0_CMP1_ISR, Default_IRQ_handler
  1990. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  1991. .set TCA0_CMP2_ISR, Default_IRQ_handler
  1992. // .set TCA0_LCMP2_ISR, Default_IRQ_handler
  1993. .set TCB0_INT_ISR, Default_IRQ_handler
  1994. .set AC0_AC_ISR, Default_IRQ_handler
  1995. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  1996. .set ADC0_WCOMP_ISR, Default_IRQ_handler
  1997. .set TWI0_TWIS_ISR, Default_IRQ_handler
  1998. .set TWI0_TWIM_ISR, Default_IRQ_handler
  1999. .set SPI0_INT_ISR, Default_IRQ_handler
  2000. .set USART0_RXC_ISR, Default_IRQ_handler
  2001. .set USART0_DRE_ISR, Default_IRQ_handler
  2002. .set USART0_TXC_ISR, Default_IRQ_handler
  2003. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  2004. end;
  2005. end.