attiny414.pp 60 KB

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  1. unit ATtiny414;
  2. {$goto on}
  3. interface
  4. type
  5. TAC = object //Analog Comparator
  6. CTRLA: byte; //Control A
  7. Reserved1: byte;
  8. MUXCTRLA: byte; //Mux Control A
  9. Reserved3: byte;
  10. Reserved4: byte;
  11. Reserved5: byte;
  12. INTCTRL: byte; //Interrupt Control
  13. STATUS: byte; //Status
  14. const
  15. // Enable
  16. ENABLEbm = $01;
  17. // AC_HYSMODE
  18. HYSMODEmask = $06;
  19. HYSMODE_OFF = $00;
  20. HYSMODE_10mV = $02;
  21. HYSMODE_25mV = $04;
  22. HYSMODE_50mV = $06;
  23. // AC_INTMODE
  24. INTMODEmask = $30;
  25. INTMODE_BOTHEDGE = $00;
  26. INTMODE_NEGEDGE = $20;
  27. INTMODE_POSEDGE = $30;
  28. // AC_LPMODE
  29. LPMODEmask = $08;
  30. LPMODE_DIS = $00;
  31. LPMODE_EN = $08;
  32. // Output Buffer Enable
  33. OUTENbm = $40;
  34. // Run in Standby Mode
  35. RUNSTDBYbm = $80;
  36. // Analog Comparator 0 Interrupt Enable
  37. CMPbm = $01;
  38. // Invert AC Output
  39. INVERTbm = $80;
  40. // AC_MUXNEG
  41. MUXNEGmask = $03;
  42. MUXNEG_PIN0 = $00;
  43. MUXNEG_VREF = $02;
  44. MUXNEG_DAC = $03;
  45. // AC_MUXPOS
  46. MUXPOSmask = $18;
  47. MUXPOS_PIN0 = $00;
  48. // Analog Comparator State
  49. STATEbm = $10;
  50. end;
  51. TADC = object //Analog to Digital Converter
  52. CTRLA: byte; //Control A
  53. CTRLB: byte; //Control B
  54. CTRLC: byte; //Control C
  55. CTRLD: byte; //Control D
  56. CTRLE: byte; //Control E
  57. SAMPCTRL: byte; //Sample Control
  58. MUXPOS: byte; //Positive mux input
  59. Reserved7: byte;
  60. COMMAND: byte; //Command
  61. EVCTRL: byte; //Event Control
  62. INTCTRL: byte; //Interrupt Control
  63. INTFLAGS: byte; //Interrupt Flags
  64. DBGCTRL: byte; //Debug Control
  65. TEMP: byte; //Temporary Data
  66. Reserved14: byte;
  67. Reserved15: byte;
  68. RES: word; //ADC Accumulator Result
  69. WINLT: word; //Window comparator low threshold
  70. WINHT: word; //Window comparator high threshold
  71. CALIB: byte; //Calibration
  72. const
  73. // ADC_DUTYCYC
  74. DUTYCYCmask = $01;
  75. DUTYCYC_DUTY50 = $00;
  76. DUTYCYC_DUTY25 = $01;
  77. // Start Conversion Operation
  78. STCONVbm = $01;
  79. // ADC Enable
  80. ENABLEbm = $01;
  81. // ADC Freerun mode
  82. FREERUNbm = $02;
  83. // ADC_RESSEL
  84. RESSELmask = $04;
  85. RESSEL_10BIT = $00;
  86. RESSEL_8BIT = $04;
  87. // Run standby mode
  88. RUNSTBYbm = $80;
  89. // ADC_SAMPNUM
  90. SAMPNUMmask = $07;
  91. SAMPNUM_ACC1 = $00;
  92. SAMPNUM_ACC2 = $01;
  93. SAMPNUM_ACC4 = $02;
  94. SAMPNUM_ACC8 = $03;
  95. SAMPNUM_ACC16 = $04;
  96. SAMPNUM_ACC32 = $05;
  97. SAMPNUM_ACC64 = $06;
  98. // ADC_PRESC
  99. PRESCmask = $07;
  100. PRESC_DIV2 = $00;
  101. PRESC_DIV4 = $01;
  102. PRESC_DIV8 = $02;
  103. PRESC_DIV16 = $03;
  104. PRESC_DIV32 = $04;
  105. PRESC_DIV64 = $05;
  106. PRESC_DIV128 = $06;
  107. PRESC_DIV256 = $07;
  108. // ADC_REFSEL
  109. REFSELmask = $30;
  110. REFSEL_INTREF = $00;
  111. REFSEL_VDDREF = $10;
  112. // Sample Capacitance Selection
  113. SAMPCAPbm = $40;
  114. // ADC_ASDV
  115. ASDVmask = $10;
  116. ASDV_ASVOFF = $00;
  117. ASDV_ASVON = $10;
  118. // ADC_INITDLY
  119. INITDLYmask = $E0;
  120. INITDLY_DLY0 = $00;
  121. INITDLY_DLY16 = $20;
  122. INITDLY_DLY32 = $40;
  123. INITDLY_DLY64 = $60;
  124. INITDLY_DLY128 = $80;
  125. INITDLY_DLY256 = $A0;
  126. // Sampling Delay Selection
  127. SAMPDLY0bm = $01;
  128. SAMPDLY1bm = $02;
  129. SAMPDLY2bm = $04;
  130. SAMPDLY3bm = $08;
  131. // ADC_WINCM
  132. WINCMmask = $07;
  133. WINCM_NONE = $00;
  134. WINCM_BELOW = $01;
  135. WINCM_ABOVE = $02;
  136. WINCM_INSIDE = $03;
  137. WINCM_OUTSIDE = $04;
  138. // Debug run
  139. DBGRUNbm = $01;
  140. // Start Event Input Enable
  141. STARTEIbm = $01;
  142. // Result Ready Interrupt Enable
  143. RESRDYbm = $01;
  144. // Window Comparator Interrupt Enable
  145. WCMPbm = $02;
  146. // ADC_MUXPOS
  147. MUXPOSmask = $1F;
  148. MUXPOS_AIN0 = $00;
  149. MUXPOS_AIN1 = $01;
  150. MUXPOS_AIN2 = $02;
  151. MUXPOS_AIN3 = $03;
  152. MUXPOS_AIN4 = $04;
  153. MUXPOS_AIN5 = $05;
  154. MUXPOS_AIN6 = $06;
  155. MUXPOS_AIN7 = $07;
  156. MUXPOS_AIN8 = $08;
  157. MUXPOS_AIN9 = $09;
  158. MUXPOS_AIN10 = $0A;
  159. MUXPOS_AIN11 = $0B;
  160. MUXPOS_DAC0 = $1C;
  161. MUXPOS_INTREF = $1D;
  162. MUXPOS_TEMPSENSE = $1E;
  163. MUXPOS_GND = $1F;
  164. // Sample lenght
  165. SAMPLEN0bm = $01;
  166. SAMPLEN1bm = $02;
  167. SAMPLEN2bm = $04;
  168. SAMPLEN3bm = $08;
  169. SAMPLEN4bm = $10;
  170. // Temporary
  171. TEMP0bm = $01;
  172. TEMP1bm = $02;
  173. TEMP2bm = $04;
  174. TEMP3bm = $08;
  175. TEMP4bm = $10;
  176. TEMP5bm = $20;
  177. TEMP6bm = $40;
  178. TEMP7bm = $80;
  179. end;
  180. TBOD = object //Bod interface
  181. CTRLA: byte; //Control A
  182. CTRLB: byte; //Control B
  183. Reserved2: byte;
  184. Reserved3: byte;
  185. Reserved4: byte;
  186. Reserved5: byte;
  187. Reserved6: byte;
  188. Reserved7: byte;
  189. VLMCTRLA: byte; //Voltage level monitor Control
  190. INTCTRL: byte; //Voltage level monitor interrupt Control
  191. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  192. STATUS: byte; //Voltage level monitor status
  193. const
  194. // BOD_ACTIVE
  195. ACTIVEmask = $0C;
  196. ACTIVE_DIS = $00;
  197. ACTIVE_ENABLED = $04;
  198. ACTIVE_SAMPLED = $08;
  199. ACTIVE_ENWAKE = $0C;
  200. // BOD_SAMPFREQ
  201. SAMPFREQmask = $10;
  202. SAMPFREQ_1KHZ = $00;
  203. SAMPFREQ_125Hz = $10;
  204. // BOD_SLEEP
  205. SLEEPmask = $03;
  206. SLEEP_DIS = $00;
  207. SLEEP_ENABLED = $01;
  208. SLEEP_SAMPLED = $02;
  209. // BOD_LVL
  210. LVLmask = $07;
  211. LVL_BODLEVEL0 = $00;
  212. LVL_BODLEVEL1 = $01;
  213. LVL_BODLEVEL2 = $02;
  214. LVL_BODLEVEL3 = $03;
  215. LVL_BODLEVEL4 = $04;
  216. LVL_BODLEVEL5 = $05;
  217. LVL_BODLEVEL6 = $06;
  218. LVL_BODLEVEL7 = $07;
  219. // BOD_VLMCFG
  220. VLMCFGmask = $06;
  221. VLMCFG_BELOW = $00;
  222. VLMCFG_ABOVE = $02;
  223. VLMCFG_CROSS = $04;
  224. // voltage level monitor interrrupt enable
  225. VLMIEbm = $01;
  226. // Voltage level monitor interrupt flag
  227. VLMIFbm = $01;
  228. // Voltage level monitor status
  229. VLMSbm = $01;
  230. // BOD_VLMLVL
  231. VLMLVLmask = $03;
  232. VLMLVL_5ABOVE = $00;
  233. VLMLVL_15ABOVE = $01;
  234. VLMLVL_25ABOVE = $02;
  235. end;
  236. TCCL = object //Configurable Custom Logic
  237. CTRLA: byte; //Control Register A
  238. SEQCTRL0: byte; //Sequential Control 0
  239. Reserved2: byte;
  240. Reserved3: byte;
  241. Reserved4: byte;
  242. LUT0CTRLA: byte; //LUT Control 0 A
  243. LUT0CTRLB: byte; //LUT Control 0 B
  244. LUT0CTRLC: byte; //LUT Control 0 C
  245. TRUTH0: byte; //Truth 0
  246. LUT1CTRLA: byte; //LUT Control 1 A
  247. LUT1CTRLB: byte; //LUT Control 1 B
  248. LUT1CTRLC: byte; //LUT Control 1 C
  249. TRUTH1: byte; //Truth 1
  250. const
  251. // Enable
  252. ENABLEbm = $01;
  253. // Run in Standby
  254. RUNSTDBYbm = $40;
  255. // Clock Source Selection
  256. CLKSRCbm = $40;
  257. // CCL_EDGEDET
  258. EDGEDETmask = $80;
  259. EDGEDET_DIS = $00;
  260. EDGEDET_EN = $80;
  261. // CCL_FILTSEL
  262. FILTSELmask = $30;
  263. FILTSEL_DISABLE = $00;
  264. FILTSEL_SYNCH = $10;
  265. FILTSEL_FILTER = $20;
  266. // Output Enable
  267. OUTENbm = $08;
  268. // CCL_INSEL0
  269. INSEL0mask = $0F;
  270. INSEL0_MASK = $00;
  271. INSEL0_FEEDBACK = $01;
  272. INSEL0_LINK = $02;
  273. INSEL0_EVENT0 = $03;
  274. INSEL0_EVENT1 = $04;
  275. INSEL0_IO = $05;
  276. INSEL0_AC0 = $06;
  277. INSEL0_TCB0 = $07;
  278. INSEL0_TCA0 = $08;
  279. INSEL0_TCD0 = $09;
  280. INSEL0_USART0 = $0A;
  281. INSEL0_SPI0 = $0B;
  282. // CCL_INSEL1
  283. INSEL1mask = $F0;
  284. INSEL1_MASK = $00;
  285. INSEL1_FEEDBACK = $10;
  286. INSEL1_LINK = $20;
  287. INSEL1_EVENT0 = $30;
  288. INSEL1_EVENT1 = $40;
  289. INSEL1_IO = $50;
  290. INSEL1_AC0 = $60;
  291. INSEL1_TCB0 = $70;
  292. INSEL1_TCA0 = $80;
  293. INSEL1_TCD0 = $90;
  294. INSEL1_USART0 = $A0;
  295. INSEL1_SPI0 = $B0;
  296. // CCL_INSEL2
  297. INSEL2mask = $0F;
  298. INSEL2_MASK = $00;
  299. INSEL2_FEEDBACK = $01;
  300. INSEL2_LINK = $02;
  301. INSEL2_EVENT0 = $03;
  302. INSEL2_EVENT1 = $04;
  303. INSEL2_IO = $05;
  304. INSEL2_AC0 = $06;
  305. INSEL2_TCB0 = $07;
  306. INSEL2_TCA0 = $08;
  307. INSEL2_TCD0 = $09;
  308. INSEL2_SPI0 = $0B;
  309. // CCL_SEQSEL
  310. SEQSELmask = $07;
  311. SEQSEL_DISABLE = $00;
  312. SEQSEL_DFF = $01;
  313. SEQSEL_JK = $02;
  314. SEQSEL_LATCH = $03;
  315. SEQSEL_RS = $04;
  316. end;
  317. TCLKCTRL = object //Clock controller
  318. MCLKCTRLA: byte; //MCLK Control A
  319. MCLKCTRLB: byte; //MCLK Control B
  320. MCLKLOCK: byte; //MCLK Lock
  321. MCLKSTATUS: byte; //MCLK Status
  322. Reserved4: byte;
  323. Reserved5: byte;
  324. Reserved6: byte;
  325. Reserved7: byte;
  326. Reserved8: byte;
  327. Reserved9: byte;
  328. Reserved10: byte;
  329. Reserved11: byte;
  330. Reserved12: byte;
  331. Reserved13: byte;
  332. Reserved14: byte;
  333. Reserved15: byte;
  334. OSC20MCTRLA: byte; //OSC20M Control A
  335. OSC20MCALIBA: byte; //OSC20M Calibration A
  336. OSC20MCALIBB: byte; //OSC20M Calibration B
  337. Reserved19: byte;
  338. Reserved20: byte;
  339. Reserved21: byte;
  340. Reserved22: byte;
  341. Reserved23: byte;
  342. OSC32KCTRLA: byte; //OSC32K Control A
  343. Reserved25: byte;
  344. Reserved26: byte;
  345. Reserved27: byte;
  346. XOSC32KCTRLA: byte; //XOSC32K Control A
  347. const
  348. // System clock out
  349. CLKOUTbm = $80;
  350. // CLKCTRL_CLKSEL
  351. CLKSELmask = $03;
  352. CLKSEL_OSC20M = $00;
  353. CLKSEL_OSCULP32K = $01;
  354. CLKSEL_XOSC32K = $02;
  355. CLKSEL_EXTCLK = $03;
  356. // CLKCTRL_PDIV
  357. PDIVmask = $1E;
  358. PDIV_2X = $00;
  359. PDIV_4X = $02;
  360. PDIV_8X = $04;
  361. PDIV_16X = $06;
  362. PDIV_32X = $08;
  363. PDIV_64X = $0A;
  364. PDIV_6X = $10;
  365. PDIV_10X = $12;
  366. PDIV_12X = $14;
  367. PDIV_24X = $16;
  368. PDIV_48X = $18;
  369. // Prescaler enable
  370. PENbm = $01;
  371. // lock ebable
  372. LOCKENbm = $01;
  373. // External Clock status
  374. EXTSbm = $80;
  375. // 20MHz oscillator status
  376. OSC20MSbm = $10;
  377. // 32KHz oscillator status
  378. OSC32KSbm = $20;
  379. // System Oscillator changing
  380. SOSCbm = $01;
  381. // 32.768 kHz Crystal Oscillator status
  382. XOSC32KSbm = $40;
  383. // Calibration
  384. CAL20M0bm = $01;
  385. CAL20M1bm = $02;
  386. CAL20M2bm = $04;
  387. CAL20M3bm = $08;
  388. CAL20M4bm = $10;
  389. CAL20M5bm = $20;
  390. // Lock
  391. LOCKbm = $80;
  392. // Oscillator temperature coefficient
  393. TEMPCAL20M0bm = $01;
  394. TEMPCAL20M1bm = $02;
  395. TEMPCAL20M2bm = $04;
  396. TEMPCAL20M3bm = $08;
  397. // Run standby
  398. RUNSTDBYbm = $02;
  399. // CLKCTRL_CSUT
  400. CSUTmask = $30;
  401. CSUT_1K = $00;
  402. CSUT_16K = $10;
  403. CSUT_32K = $20;
  404. CSUT_64K = $30;
  405. // Enable
  406. ENABLEbm = $01;
  407. // Select
  408. SELbm = $04;
  409. end;
  410. TCPU = object //CPU
  411. Reserved0: byte;
  412. Reserved1: byte;
  413. Reserved2: byte;
  414. Reserved3: byte;
  415. CCP: byte; //Configuration Change Protection
  416. Reserved5: byte;
  417. Reserved6: byte;
  418. Reserved7: byte;
  419. Reserved8: byte;
  420. Reserved9: byte;
  421. Reserved10: byte;
  422. Reserved11: byte;
  423. Reserved12: byte;
  424. SPL: byte; //Stack Pointer Low
  425. SPH: byte; //Stack Pointer High
  426. SREG: byte; //Status Register
  427. const
  428. // CPU_CCP
  429. CCPmask = $FF;
  430. CCP_SPM = $9D;
  431. CCP_IOREG = $D8;
  432. // Carry Flag
  433. Cbm = $01;
  434. // Half Carry Flag
  435. Hbm = $20;
  436. // Global Interrupt Enable Flag
  437. Ibm = $80;
  438. // Negative Flag
  439. Nbm = $04;
  440. // N Exclusive Or V Flag
  441. Sbm = $10;
  442. // Transfer Bit
  443. Tbm = $40;
  444. // Two's Complement Overflow Flag
  445. Vbm = $08;
  446. // Zero Flag
  447. Zbm = $02;
  448. end;
  449. TCPUINT = object //Interrupt Controller
  450. CTRLA: byte; //Control A
  451. STATUS: byte; //Status
  452. LVL0PRI: byte; //Interrupt Level 0 Priority
  453. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  454. const
  455. // Compact Vector Table
  456. CVTbm = $20;
  457. // Interrupt Vector Select
  458. IVSELbm = $40;
  459. // Round-robin Scheduling Enable
  460. LVL0RRbm = $01;
  461. // Interrupt Level Priority
  462. LVL0PRI0bm = $01;
  463. LVL0PRI1bm = $02;
  464. LVL0PRI2bm = $04;
  465. LVL0PRI3bm = $08;
  466. LVL0PRI4bm = $10;
  467. LVL0PRI5bm = $20;
  468. LVL0PRI6bm = $40;
  469. LVL0PRI7bm = $80;
  470. // Interrupt Vector with High Priority
  471. LVL1VEC0bm = $01;
  472. LVL1VEC1bm = $02;
  473. LVL1VEC2bm = $04;
  474. LVL1VEC3bm = $08;
  475. LVL1VEC4bm = $10;
  476. LVL1VEC5bm = $20;
  477. LVL1VEC6bm = $40;
  478. LVL1VEC7bm = $80;
  479. // Level 0 Interrupt Executing
  480. LVL0EXbm = $01;
  481. // Level 1 Interrupt Executing
  482. LVL1EXbm = $02;
  483. // Non-maskable Interrupt Executing
  484. NMIEXbm = $80;
  485. end;
  486. TCRCSCAN = object //CRCSCAN
  487. CTRLA: byte; //Control A
  488. CTRLB: byte; //Control B
  489. STATUS: byte; //Status
  490. const
  491. // Enable CRC scan
  492. ENABLEbm = $01;
  493. // Enable NMI Trigger
  494. NMIENbm = $02;
  495. // Reset CRC scan
  496. RESETbm = $80;
  497. // CRCSCAN_MODE
  498. MODEmask = $30;
  499. MODE_PRIORITY = $00;
  500. MODE_RESERVED = $10;
  501. MODE_BACKGROUND = $20;
  502. MODE_CONTINUOUS = $30;
  503. // CRCSCAN_SRC
  504. SRCmask = $03;
  505. SRC_FLASH = $00;
  506. SRC_APPLICATION = $01;
  507. SRC_BOOT = $02;
  508. // CRC Busy
  509. BUSYbm = $01;
  510. // CRC Ok
  511. OKbm = $02;
  512. end;
  513. TDAC = object //Digital to Analog Converter
  514. CTRLA: byte; //Control Register A
  515. DATA: byte; //DATA Register
  516. const
  517. // DAC Enable
  518. ENABLEbm = $01;
  519. // Output Buffer Enable
  520. OUTENbm = $40;
  521. // Run in Standby Mode
  522. RUNSTDBYbm = $80;
  523. end;
  524. TEVSYS = object //Event System
  525. ASYNCSTROBE: byte; //Asynchronous Channel Strobe
  526. SYNCSTROBE: byte; //Synchronous Channel Strobe
  527. ASYNCCH0: byte; //Asynchronous Channel 0 Generator Selection
  528. ASYNCCH1: byte; //Asynchronous Channel 1 Generator Selection
  529. ASYNCCH2: byte; //Asynchronous Channel 2 Generator Selection
  530. ASYNCCH3: byte; //Asynchronous Channel 3 Generator Selection
  531. Reserved6: byte;
  532. Reserved7: byte;
  533. Reserved8: byte;
  534. Reserved9: byte;
  535. SYNCCH0: byte; //Synchronous Channel 0 Generator Selection
  536. SYNCCH1: byte; //Synchronous Channel 1 Generator Selection
  537. Reserved12: byte;
  538. Reserved13: byte;
  539. Reserved14: byte;
  540. Reserved15: byte;
  541. Reserved16: byte;
  542. Reserved17: byte;
  543. ASYNCUSER0: byte; //Asynchronous User Ch 0 Input Selection - TCB0
  544. ASYNCUSER1: byte; //Asynchronous User Ch 1 Input Selection - ADC0
  545. ASYNCUSER2: byte; //Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  546. ASYNCUSER3: byte; //Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  547. ASYNCUSER4: byte; //Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  548. ASYNCUSER5: byte; //Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  549. ASYNCUSER6: byte; //Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  550. ASYNCUSER7: byte; //Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  551. ASYNCUSER8: byte; //Asynchronous User Ch 8 Input Selection - Event Out 0
  552. ASYNCUSER9: byte; //Asynchronous User Ch 9 Input Selection - Event Out 1
  553. ASYNCUSER10: byte; //Asynchronous User Ch 10 Input Selection - Event Out 2
  554. Reserved29: byte;
  555. Reserved30: byte;
  556. Reserved31: byte;
  557. Reserved32: byte;
  558. Reserved33: byte;
  559. SYNCUSER0: byte; //Synchronous User Ch 0 Input Selection - TCA0
  560. SYNCUSER1: byte; //Synchronous User Ch 1 Input Selection - USART0
  561. const
  562. // EVSYS_ASYNCCH0
  563. ASYNCCH0mask = $FF;
  564. ASYNCCH0_OFF = $00;
  565. ASYNCCH0_CCL_LUT0 = $01;
  566. ASYNCCH0_CCL_LUT1 = $02;
  567. ASYNCCH0_AC0_OUT = $03;
  568. ASYNCCH0_TCD0_CMPBCLR = $04;
  569. ASYNCCH0_TCD0_CMPASET = $05;
  570. ASYNCCH0_TCD0_CMPBSET = $06;
  571. ASYNCCH0_TCD0_PROGEV = $07;
  572. ASYNCCH0_RTC_OVF = $08;
  573. ASYNCCH0_RTC_CMP = $09;
  574. ASYNCCH0_PORTA_PIN0 = $0A;
  575. ASYNCCH0_PORTA_PIN1 = $0B;
  576. ASYNCCH0_PORTA_PIN2 = $0C;
  577. ASYNCCH0_PORTA_PIN3 = $0D;
  578. ASYNCCH0_PORTA_PIN4 = $0E;
  579. ASYNCCH0_PORTA_PIN5 = $0F;
  580. ASYNCCH0_PORTA_PIN6 = $10;
  581. ASYNCCH0_PORTA_PIN7 = $11;
  582. ASYNCCH0_UPDI = $12;
  583. // EVSYS_ASYNCCH1
  584. ASYNCCH1mask = $FF;
  585. ASYNCCH1_OFF = $00;
  586. ASYNCCH1_CCL_LUT0 = $01;
  587. ASYNCCH1_CCL_LUT1 = $02;
  588. ASYNCCH1_AC0_OUT = $03;
  589. ASYNCCH1_TCD0_CMPBCLR = $04;
  590. ASYNCCH1_TCD0_CMPASET = $05;
  591. ASYNCCH1_TCD0_CMPBSET = $06;
  592. ASYNCCH1_TCD0_PROGEV = $07;
  593. ASYNCCH1_RTC_OVF = $08;
  594. ASYNCCH1_RTC_CMP = $09;
  595. ASYNCCH1_PORTB_PIN0 = $0A;
  596. ASYNCCH1_PORTB_PIN1 = $0B;
  597. ASYNCCH1_PORTB_PIN2 = $0C;
  598. ASYNCCH1_PORTB_PIN3 = $0D;
  599. ASYNCCH1_PORTB_PIN4 = $0E;
  600. ASYNCCH1_PORTB_PIN5 = $0F;
  601. ASYNCCH1_PORTB_PIN6 = $10;
  602. ASYNCCH1_PORTB_PIN7 = $11;
  603. // EVSYS_ASYNCCH2
  604. ASYNCCH2mask = $FF;
  605. ASYNCCH2_OFF = $00;
  606. ASYNCCH2_CCL_LUT0 = $01;
  607. ASYNCCH2_CCL_LUT1 = $02;
  608. ASYNCCH2_AC0_OUT = $03;
  609. ASYNCCH2_TCD0_CMPBCLR = $04;
  610. ASYNCCH2_TCD0_CMPASET = $05;
  611. ASYNCCH2_TCD0_CMPBSET = $06;
  612. ASYNCCH2_TCD0_PROGEV = $07;
  613. ASYNCCH2_RTC_OVF = $08;
  614. ASYNCCH2_RTC_CMP = $09;
  615. ASYNCCH2_PORTC_PIN0 = $0A;
  616. ASYNCCH2_PORTC_PIN1 = $0B;
  617. ASYNCCH2_PORTC_PIN2 = $0C;
  618. ASYNCCH2_PORTC_PIN3 = $0D;
  619. ASYNCCH2_PORTC_PIN4 = $0E;
  620. ASYNCCH2_PORTC_PIN5 = $0F;
  621. // EVSYS_ASYNCCH3
  622. ASYNCCH3mask = $FF;
  623. ASYNCCH3_OFF = $00;
  624. ASYNCCH3_CCL_LUT0 = $01;
  625. ASYNCCH3_CCL_LUT1 = $02;
  626. ASYNCCH3_AC0_OUT = $03;
  627. ASYNCCH3_TCD0_CMPBCLR = $04;
  628. ASYNCCH3_TCD0_CMPASET = $05;
  629. ASYNCCH3_TCD0_CMPBSET = $06;
  630. ASYNCCH3_TCD0_PROGEV = $07;
  631. ASYNCCH3_RTC_OVF = $08;
  632. ASYNCCH3_RTC_CMP = $09;
  633. ASYNCCH3_PIT_DIV8192 = $0A;
  634. ASYNCCH3_PIT_DIV4096 = $0B;
  635. ASYNCCH3_PIT_DIV2048 = $0C;
  636. ASYNCCH3_PIT_DIV1024 = $0D;
  637. ASYNCCH3_PIT_DIV512 = $0E;
  638. ASYNCCH3_PIT_DIV256 = $0F;
  639. ASYNCCH3_PIT_DIV128 = $10;
  640. ASYNCCH3_PIT_DIV64 = $11;
  641. // EVSYS_ASYNCUSER0
  642. ASYNCUSER0mask = $FF;
  643. ASYNCUSER0_OFF = $00;
  644. ASYNCUSER0_SYNCCH0 = $01;
  645. ASYNCUSER0_SYNCCH1 = $02;
  646. ASYNCUSER0_ASYNCCH0 = $03;
  647. ASYNCUSER0_ASYNCCH1 = $04;
  648. ASYNCUSER0_ASYNCCH2 = $05;
  649. ASYNCUSER0_ASYNCCH3 = $06;
  650. // EVSYS_ASYNCUSER1
  651. ASYNCUSER1mask = $FF;
  652. ASYNCUSER1_OFF = $00;
  653. ASYNCUSER1_SYNCCH0 = $01;
  654. ASYNCUSER1_SYNCCH1 = $02;
  655. ASYNCUSER1_ASYNCCH0 = $03;
  656. ASYNCUSER1_ASYNCCH1 = $04;
  657. ASYNCUSER1_ASYNCCH2 = $05;
  658. ASYNCUSER1_ASYNCCH3 = $06;
  659. // EVSYS_ASYNCUSER2
  660. ASYNCUSER2mask = $FF;
  661. ASYNCUSER2_OFF = $00;
  662. ASYNCUSER2_SYNCCH0 = $01;
  663. ASYNCUSER2_SYNCCH1 = $02;
  664. ASYNCUSER2_ASYNCCH0 = $03;
  665. ASYNCUSER2_ASYNCCH1 = $04;
  666. ASYNCUSER2_ASYNCCH2 = $05;
  667. ASYNCUSER2_ASYNCCH3 = $06;
  668. // EVSYS_ASYNCUSER3
  669. ASYNCUSER3mask = $FF;
  670. ASYNCUSER3_OFF = $00;
  671. ASYNCUSER3_SYNCCH0 = $01;
  672. ASYNCUSER3_SYNCCH1 = $02;
  673. ASYNCUSER3_ASYNCCH0 = $03;
  674. ASYNCUSER3_ASYNCCH1 = $04;
  675. ASYNCUSER3_ASYNCCH2 = $05;
  676. ASYNCUSER3_ASYNCCH3 = $06;
  677. // EVSYS_ASYNCUSER4
  678. ASYNCUSER4mask = $FF;
  679. ASYNCUSER4_OFF = $00;
  680. ASYNCUSER4_SYNCCH0 = $01;
  681. ASYNCUSER4_SYNCCH1 = $02;
  682. ASYNCUSER4_ASYNCCH0 = $03;
  683. ASYNCUSER4_ASYNCCH1 = $04;
  684. ASYNCUSER4_ASYNCCH2 = $05;
  685. ASYNCUSER4_ASYNCCH3 = $06;
  686. // EVSYS_ASYNCUSER5
  687. ASYNCUSER5mask = $FF;
  688. ASYNCUSER5_OFF = $00;
  689. ASYNCUSER5_SYNCCH0 = $01;
  690. ASYNCUSER5_SYNCCH1 = $02;
  691. ASYNCUSER5_ASYNCCH0 = $03;
  692. ASYNCUSER5_ASYNCCH1 = $04;
  693. ASYNCUSER5_ASYNCCH2 = $05;
  694. ASYNCUSER5_ASYNCCH3 = $06;
  695. // EVSYS_ASYNCUSER6
  696. ASYNCUSER6mask = $FF;
  697. ASYNCUSER6_OFF = $00;
  698. ASYNCUSER6_SYNCCH0 = $01;
  699. ASYNCUSER6_SYNCCH1 = $02;
  700. ASYNCUSER6_ASYNCCH0 = $03;
  701. ASYNCUSER6_ASYNCCH1 = $04;
  702. ASYNCUSER6_ASYNCCH2 = $05;
  703. ASYNCUSER6_ASYNCCH3 = $06;
  704. // EVSYS_ASYNCUSER7
  705. ASYNCUSER7mask = $FF;
  706. ASYNCUSER7_OFF = $00;
  707. ASYNCUSER7_SYNCCH0 = $01;
  708. ASYNCUSER7_SYNCCH1 = $02;
  709. ASYNCUSER7_ASYNCCH0 = $03;
  710. ASYNCUSER7_ASYNCCH1 = $04;
  711. ASYNCUSER7_ASYNCCH2 = $05;
  712. ASYNCUSER7_ASYNCCH3 = $06;
  713. // EVSYS_ASYNCUSER8
  714. ASYNCUSER8mask = $FF;
  715. ASYNCUSER8_OFF = $00;
  716. ASYNCUSER8_SYNCCH0 = $01;
  717. ASYNCUSER8_SYNCCH1 = $02;
  718. ASYNCUSER8_ASYNCCH0 = $03;
  719. ASYNCUSER8_ASYNCCH1 = $04;
  720. ASYNCUSER8_ASYNCCH2 = $05;
  721. ASYNCUSER8_ASYNCCH3 = $06;
  722. // EVSYS_ASYNCUSER9
  723. ASYNCUSER9mask = $FF;
  724. ASYNCUSER9_OFF = $00;
  725. ASYNCUSER9_SYNCCH0 = $01;
  726. ASYNCUSER9_SYNCCH1 = $02;
  727. ASYNCUSER9_ASYNCCH0 = $03;
  728. ASYNCUSER9_ASYNCCH1 = $04;
  729. ASYNCUSER9_ASYNCCH2 = $05;
  730. ASYNCUSER9_ASYNCCH3 = $06;
  731. // EVSYS_ASYNCUSER10
  732. ASYNCUSER10mask = $FF;
  733. ASYNCUSER10_OFF = $00;
  734. ASYNCUSER10_SYNCCH0 = $01;
  735. ASYNCUSER10_SYNCCH1 = $02;
  736. ASYNCUSER10_ASYNCCH0 = $03;
  737. ASYNCUSER10_ASYNCCH1 = $04;
  738. ASYNCUSER10_ASYNCCH2 = $05;
  739. ASYNCUSER10_ASYNCCH3 = $06;
  740. // EVSYS_SYNCCH0
  741. SYNCCH0mask = $FF;
  742. SYNCCH0_OFF = $00;
  743. SYNCCH0_TCB0 = $01;
  744. SYNCCH0_TCA0_OVF_LUNF = $02;
  745. SYNCCH0_TCA0_HUNF = $03;
  746. SYNCCH0_TCA0_CMP0 = $04;
  747. SYNCCH0_TCA0_CMP1 = $05;
  748. SYNCCH0_TCA0_CMP2 = $06;
  749. SYNCCH0_PORTC_PIN0 = $07;
  750. SYNCCH0_PORTC_PIN1 = $08;
  751. SYNCCH0_PORTC_PIN2 = $09;
  752. SYNCCH0_PORTC_PIN3 = $0A;
  753. SYNCCH0_PORTC_PIN4 = $0B;
  754. SYNCCH0_PORTC_PIN5 = $0C;
  755. SYNCCH0_PORTA_PIN0 = $0D;
  756. SYNCCH0_PORTA_PIN1 = $0E;
  757. SYNCCH0_PORTA_PIN2 = $0F;
  758. SYNCCH0_PORTA_PIN3 = $10;
  759. SYNCCH0_PORTA_PIN4 = $11;
  760. SYNCCH0_PORTA_PIN5 = $12;
  761. SYNCCH0_PORTA_PIN6 = $13;
  762. SYNCCH0_PORTA_PIN7 = $14;
  763. // EVSYS_SYNCCH1
  764. SYNCCH1mask = $FF;
  765. SYNCCH1_OFF = $00;
  766. SYNCCH1_TCB0 = $01;
  767. SYNCCH1_TCA0_OVF_LUNF = $02;
  768. SYNCCH1_TCA0_HUNF = $03;
  769. SYNCCH1_TCA0_CMP0 = $04;
  770. SYNCCH1_TCA0_CMP1 = $05;
  771. SYNCCH1_TCA0_CMP2 = $06;
  772. SYNCCH1_PORTB_PIN0 = $08;
  773. SYNCCH1_PORTB_PIN1 = $09;
  774. SYNCCH1_PORTB_PIN2 = $0A;
  775. SYNCCH1_PORTB_PIN3 = $0B;
  776. SYNCCH1_PORTB_PIN4 = $0C;
  777. SYNCCH1_PORTB_PIN5 = $0D;
  778. SYNCCH1_PORTB_PIN6 = $0E;
  779. SYNCCH1_PORTB_PIN7 = $0F;
  780. // EVSYS_SYNCUSER0
  781. SYNCUSER0mask = $FF;
  782. SYNCUSER0_OFF = $00;
  783. SYNCUSER0_SYNCCH0 = $01;
  784. SYNCUSER0_SYNCCH1 = $02;
  785. // EVSYS_SYNCUSER1
  786. SYNCUSER1mask = $FF;
  787. SYNCUSER1_OFF = $00;
  788. SYNCUSER1_SYNCCH0 = $01;
  789. SYNCUSER1_SYNCCH1 = $02;
  790. end;
  791. TFUSE = object //Fuses
  792. WDTCFG: byte; //Watchdog Configuration
  793. BODCFG: byte; //BOD Configuration
  794. OSCCFG: byte; //Oscillator Configuration
  795. Reserved3: byte;
  796. TCD0CFG: byte; //TCD0 Configuration
  797. SYSCFG0: byte; //System Configuration 0
  798. SYSCFG1: byte; //System Configuration 1
  799. APPEND: byte; //Application Code Section End
  800. BOOTEND: byte; //Boot Section End
  801. const
  802. // FUSE_ACTIVE
  803. ACTIVEmask = $0C;
  804. ACTIVE_DIS = $00;
  805. ACTIVE_ENABLED = $04;
  806. ACTIVE_SAMPLED = $08;
  807. ACTIVE_ENWAKE = $0C;
  808. // FUSE_LVL
  809. LVLmask = $E0;
  810. LVL_BODLEVEL0 = $00;
  811. LVL_BODLEVEL1 = $20;
  812. LVL_BODLEVEL2 = $40;
  813. LVL_BODLEVEL3 = $60;
  814. LVL_BODLEVEL4 = $80;
  815. LVL_BODLEVEL5 = $A0;
  816. LVL_BODLEVEL6 = $C0;
  817. LVL_BODLEVEL7 = $E0;
  818. // FUSE_SAMPFREQ
  819. SAMPFREQmask = $10;
  820. SAMPFREQ_1KHz = $00;
  821. SAMPFREQ_125Hz = $10;
  822. // FUSE_SLEEP
  823. SLEEPmask = $03;
  824. SLEEP_DIS = $00;
  825. SLEEP_ENABLED = $01;
  826. SLEEP_SAMPLED = $02;
  827. // FUSE_FREQSEL
  828. FREQSELmask = $03;
  829. FREQSEL_16MHZ = $01;
  830. FREQSEL_20MHZ = $02;
  831. // Oscillator Lock
  832. OSCLOCKbm = $80;
  833. // FUSE_CRCSRC
  834. CRCSRCmask = $C0;
  835. CRCSRC_FLASH = $00;
  836. CRCSRC_BOOT = $40;
  837. CRCSRC_BOOTAPP = $80;
  838. CRCSRC_NOCRC = $C0;
  839. // EEPROM Save
  840. EESAVEbm = $01;
  841. // FUSE_RSTPINCFG
  842. RSTPINCFGmask = $0C;
  843. RSTPINCFG_GPIO = $00;
  844. RSTPINCFG_UPDI = $04;
  845. RSTPINCFG_RST = $08;
  846. // FUSE_SUT
  847. SUTmask = $07;
  848. SUT_0MS = $00;
  849. SUT_1MS = $01;
  850. SUT_2MS = $02;
  851. SUT_4MS = $03;
  852. SUT_8MS = $04;
  853. SUT_16MS = $05;
  854. SUT_32MS = $06;
  855. SUT_64MS = $07;
  856. // Compare A Default Output Value
  857. CMPAbm = $01;
  858. // Compare A Output Enable
  859. CMPAENbm = $10;
  860. // Compare B Default Output Value
  861. CMPBbm = $02;
  862. // Compare B Output Enable
  863. CMPBENbm = $20;
  864. // Compare C Default Output Value
  865. CMPCbm = $04;
  866. // Compare C Output Enable
  867. CMPCENbm = $40;
  868. // Compare D Default Output Value
  869. CMPDbm = $08;
  870. // Compare D Output Enable
  871. CMPDENbm = $80;
  872. // FUSE_PERIOD
  873. PERIODmask = $0F;
  874. PERIOD_OFF = $00;
  875. PERIOD_8CLK = $01;
  876. PERIOD_16CLK = $02;
  877. PERIOD_32CLK = $03;
  878. PERIOD_64CLK = $04;
  879. PERIOD_128CLK = $05;
  880. PERIOD_256CLK = $06;
  881. PERIOD_512CLK = $07;
  882. PERIOD_1KCLK = $08;
  883. PERIOD_2KCLK = $09;
  884. PERIOD_4KCLK = $0A;
  885. PERIOD_8KCLK = $0B;
  886. // FUSE_WINDOW
  887. WINDOWmask = $F0;
  888. WINDOW_OFF = $00;
  889. WINDOW_8CLK = $10;
  890. WINDOW_16CLK = $20;
  891. WINDOW_32CLK = $30;
  892. WINDOW_64CLK = $40;
  893. WINDOW_128CLK = $50;
  894. WINDOW_256CLK = $60;
  895. WINDOW_512CLK = $70;
  896. WINDOW_1KCLK = $80;
  897. WINDOW_2KCLK = $90;
  898. WINDOW_4KCLK = $A0;
  899. WINDOW_8KCLK = $B0;
  900. end;
  901. TGPIO = object //General Purpose IO
  902. GPIOR0: byte; //General Purpose IO Register 0
  903. GPIOR1: byte; //General Purpose IO Register 1
  904. GPIOR2: byte; //General Purpose IO Register 2
  905. GPIOR3: byte; //General Purpose IO Register 3
  906. end;
  907. TLOCKBIT = object //Lockbit
  908. LOCKBIT: byte; //Lock bits
  909. const
  910. // LOCKBIT_LB
  911. LBmask = $FF;
  912. LB_RWLOCK = $3A;
  913. LB_NOLOCK = $C5;
  914. end;
  915. TNVMCTRL = object //Non-volatile Memory Controller
  916. CTRLA: byte; //Control A
  917. CTRLB: byte; //Control B
  918. STATUS: byte; //Status
  919. INTCTRL: byte; //Interrupt Control
  920. INTFLAGS: byte; //Interrupt Flags
  921. Reserved5: byte;
  922. DATA: word; //Data
  923. ADDR: word; //Address
  924. const
  925. // NVMCTRL_CMD
  926. CMDmask = $07;
  927. CMD_NONE = $00;
  928. CMD_PAGEWRITE = $01;
  929. CMD_PAGEERASE = $02;
  930. CMD_PAGEERASEWRITE = $03;
  931. CMD_PAGEBUFCLR = $04;
  932. CMD_CHIPERASE = $05;
  933. CMD_EEERASE = $06;
  934. CMD_FUSEWRITE = $07;
  935. // Application code write protect
  936. APCWPbm = $01;
  937. // Boot Lock
  938. BOOTLOCKbm = $02;
  939. // EEPROM Ready
  940. EEREADYbm = $01;
  941. // EEPROM busy
  942. EEBUSYbm = $02;
  943. // Flash busy
  944. FBUSYbm = $01;
  945. // Write error
  946. WRERRORbm = $04;
  947. end;
  948. TPORT = object //I/O Ports
  949. DIR: byte; //Data Direction
  950. DIRSET: byte; //Data Direction Set
  951. DIRCLR: byte; //Data Direction Clear
  952. DIRTGL: byte; //Data Direction Toggle
  953. OUT_: byte; //Output Value
  954. OUTSET: byte; //Output Value Set
  955. OUTCLR: byte; //Output Value Clear
  956. OUTTGL: byte; //Output Value Toggle
  957. IN_: byte; //Input Value
  958. INTFLAGS: byte; //Interrupt Flags
  959. Reserved10: byte;
  960. Reserved11: byte;
  961. Reserved12: byte;
  962. Reserved13: byte;
  963. Reserved14: byte;
  964. Reserved15: byte;
  965. PIN0CTRL: byte; //Pin 0 Control
  966. PIN1CTRL: byte; //Pin 1 Control
  967. PIN2CTRL: byte; //Pin 2 Control
  968. PIN3CTRL: byte; //Pin 3 Control
  969. PIN4CTRL: byte; //Pin 4 Control
  970. PIN5CTRL: byte; //Pin 5 Control
  971. PIN6CTRL: byte; //Pin 6 Control
  972. PIN7CTRL: byte; //Pin 7 Control
  973. const
  974. // Pin Interrupt
  975. INT0bm = $01;
  976. INT1bm = $02;
  977. INT2bm = $04;
  978. INT3bm = $08;
  979. INT4bm = $10;
  980. INT5bm = $20;
  981. INT6bm = $40;
  982. INT7bm = $80;
  983. // Inverted I/O Enable
  984. INVENbm = $80;
  985. // PORT_ISC
  986. ISCmask = $07;
  987. ISC_INTDISABLE = $00;
  988. ISC_BOTHEDGES = $01;
  989. ISC_RISING = $02;
  990. ISC_FALLING = $03;
  991. ISC_INPUT_DISABLE = $04;
  992. ISC_LEVEL = $05;
  993. // Pullup enable
  994. PULLUPENbm = $08;
  995. end;
  996. TPORTMUX = object //Port Multiplexer
  997. CTRLA: byte; //Port Multiplexer Control A
  998. CTRLB: byte; //Port Multiplexer Control B
  999. CTRLC: byte; //Port Multiplexer Control C
  1000. CTRLD: byte; //Port Multiplexer Control D
  1001. const
  1002. // Event Output 0
  1003. EVOUT0bm = $01;
  1004. // Event Output 1
  1005. EVOUT1bm = $02;
  1006. // Event Output 2
  1007. EVOUT2bm = $04;
  1008. // PORTMUX_LUT0
  1009. LUT0mask = $10;
  1010. LUT0_DEFAULT = $00;
  1011. LUT0_ALTERNATE = $10;
  1012. // PORTMUX_LUT1
  1013. LUT1mask = $20;
  1014. LUT1_DEFAULT = $00;
  1015. LUT1_ALTERNATE = $20;
  1016. // PORTMUX_SPI0
  1017. SPI0mask = $04;
  1018. SPI0_DEFAULT = $00;
  1019. SPI0_ALTERNATE = $04;
  1020. // PORTMUX_TWI0
  1021. TWI0mask = $10;
  1022. TWI0_DEFAULT = $00;
  1023. TWI0_ALTERNATE = $10;
  1024. // PORTMUX_USART0
  1025. USART0mask = $01;
  1026. USART0_DEFAULT = $00;
  1027. USART0_ALTERNATE = $01;
  1028. // PORTMUX_TCA00
  1029. TCA00mask = $01;
  1030. TCA00_DEFAULT = $00;
  1031. TCA00_ALTERNATE = $01;
  1032. // PORTMUX_TCA01
  1033. TCA01mask = $02;
  1034. TCA01_DEFAULT = $00;
  1035. TCA01_ALTERNATE = $02;
  1036. // PORTMUX_TCA02
  1037. TCA02mask = $04;
  1038. TCA02_DEFAULT = $00;
  1039. TCA02_ALTERNATE = $04;
  1040. // PORTMUX_TCA03
  1041. TCA03mask = $08;
  1042. TCA03_DEFAULT = $00;
  1043. TCA03_ALTERNATE = $08;
  1044. // PORTMUX_TCA04
  1045. TCA04mask = $10;
  1046. TCA04_DEFAULT = $00;
  1047. TCA04_ALTERNATE = $10;
  1048. // PORTMUX_TCA05
  1049. TCA05mask = $20;
  1050. TCA05_DEFAULT = $00;
  1051. TCA05_ALTERNATE = $20;
  1052. // PORTMUX_TCB0
  1053. TCB0mask = $01;
  1054. TCB0_DEFAULT = $00;
  1055. TCB0_ALTERNATE = $01;
  1056. end;
  1057. TRSTCTRL = object //Reset controller
  1058. RSTFR: byte; //Reset Flags
  1059. SWRR: byte; //Software Reset
  1060. const
  1061. // Brown out detector Reset flag
  1062. BORFbm = $02;
  1063. // External Reset flag
  1064. EXTRFbm = $04;
  1065. // Power on Reset flag
  1066. PORFbm = $01;
  1067. // Software Reset flag
  1068. SWRFbm = $10;
  1069. // UPDI Reset flag
  1070. UPDIRFbm = $20;
  1071. // Watch dog Reset flag
  1072. WDRFbm = $08;
  1073. // Software reset enable
  1074. SWREbm = $01;
  1075. end;
  1076. TRTC = object //Real-Time Counter
  1077. CTRLA: byte; //Control A
  1078. STATUS: byte; //Status
  1079. INTCTRL: byte; //Interrupt Control
  1080. INTFLAGS: byte; //Interrupt Flags
  1081. TEMP: byte; //Temporary
  1082. DBGCTRL: byte; //Debug control
  1083. Reserved6: byte;
  1084. CLKSEL: byte; //Clock Select
  1085. CNT: word; //Counter
  1086. PER: word; //Period
  1087. CMP: word; //Compare
  1088. Reserved14: byte;
  1089. Reserved15: byte;
  1090. PITCTRLA: byte; //PIT Control A
  1091. PITSTATUS: byte; //PIT Status
  1092. PITINTCTRL: byte; //PIT Interrupt Control
  1093. PITINTFLAGS: byte; //PIT Interrupt Flags
  1094. Reserved20: byte;
  1095. PITDBGCTRL: byte; //PIT Debug control
  1096. const
  1097. // RTC_CLKSEL
  1098. CLKSELmask = $03;
  1099. CLKSEL_INT32K = $00;
  1100. CLKSEL_INT1K = $01;
  1101. CLKSEL_TOSC32K = $02;
  1102. CLKSEL_EXTCLK = $03;
  1103. // RTC_PRESCALER
  1104. PRESCALERmask = $78;
  1105. PRESCALER_DIV1 = $00;
  1106. PRESCALER_DIV2 = $08;
  1107. PRESCALER_DIV4 = $10;
  1108. PRESCALER_DIV8 = $18;
  1109. PRESCALER_DIV16 = $20;
  1110. PRESCALER_DIV32 = $28;
  1111. PRESCALER_DIV64 = $30;
  1112. PRESCALER_DIV128 = $38;
  1113. PRESCALER_DIV256 = $40;
  1114. PRESCALER_DIV512 = $48;
  1115. PRESCALER_DIV1024 = $50;
  1116. PRESCALER_DIV2048 = $58;
  1117. PRESCALER_DIV4096 = $60;
  1118. PRESCALER_DIV8192 = $68;
  1119. PRESCALER_DIV16384 = $70;
  1120. PRESCALER_DIV32768 = $78;
  1121. // Enable
  1122. RTCENbm = $01;
  1123. // Run In Standby
  1124. RUNSTDBYbm = $80;
  1125. // Run in debug
  1126. DBGRUNbm = $01;
  1127. // Compare Match Interrupt enable
  1128. CMPbm = $02;
  1129. // Overflow Interrupt enable
  1130. OVFbm = $01;
  1131. // RTC_PERIOD
  1132. PERIODmask = $78;
  1133. PERIOD_OFF = $00;
  1134. PERIOD_CYC4 = $08;
  1135. PERIOD_CYC8 = $10;
  1136. PERIOD_CYC16 = $18;
  1137. PERIOD_CYC32 = $20;
  1138. PERIOD_CYC64 = $28;
  1139. PERIOD_CYC128 = $30;
  1140. PERIOD_CYC256 = $38;
  1141. PERIOD_CYC512 = $40;
  1142. PERIOD_CYC1024 = $48;
  1143. PERIOD_CYC2048 = $50;
  1144. PERIOD_CYC4096 = $58;
  1145. PERIOD_CYC8192 = $60;
  1146. PERIOD_CYC16384 = $68;
  1147. PERIOD_CYC32768 = $70;
  1148. // Enable
  1149. PITENbm = $01;
  1150. // Periodic Interrupt
  1151. PIbm = $01;
  1152. // CTRLA Synchronization Busy Flag
  1153. CTRLBUSYbm = $01;
  1154. // Comparator Synchronization Busy Flag
  1155. CMPBUSYbm = $08;
  1156. // Count Synchronization Busy Flag
  1157. CNTBUSYbm = $02;
  1158. // CTRLA Synchronization Busy Flag
  1159. CTRLABUSYbm = $01;
  1160. // Period Synchronization Busy Flag
  1161. PERBUSYbm = $04;
  1162. end;
  1163. TSIGROW = object //Signature row
  1164. DEVICEID0: byte; //Device ID Byte 0
  1165. DEVICEID1: byte; //Device ID Byte 1
  1166. DEVICEID2: byte; //Device ID Byte 2
  1167. SERNUM0: byte; //Serial Number Byte 0
  1168. SERNUM1: byte; //Serial Number Byte 1
  1169. SERNUM2: byte; //Serial Number Byte 2
  1170. SERNUM3: byte; //Serial Number Byte 3
  1171. SERNUM4: byte; //Serial Number Byte 4
  1172. SERNUM5: byte; //Serial Number Byte 5
  1173. SERNUM6: byte; //Serial Number Byte 6
  1174. SERNUM7: byte; //Serial Number Byte 7
  1175. SERNUM8: byte; //Serial Number Byte 8
  1176. SERNUM9: byte; //Serial Number Byte 9
  1177. Reserved13: byte;
  1178. Reserved14: byte;
  1179. Reserved15: byte;
  1180. Reserved16: byte;
  1181. Reserved17: byte;
  1182. Reserved18: byte;
  1183. Reserved19: byte;
  1184. Reserved20: byte;
  1185. Reserved21: byte;
  1186. Reserved22: byte;
  1187. Reserved23: byte;
  1188. Reserved24: byte;
  1189. Reserved25: byte;
  1190. Reserved26: byte;
  1191. Reserved27: byte;
  1192. Reserved28: byte;
  1193. Reserved29: byte;
  1194. Reserved30: byte;
  1195. Reserved31: byte;
  1196. TEMPSENSE0: byte; //Temperature Sensor Calibration Byte 0
  1197. TEMPSENSE1: byte; //Temperature Sensor Calibration Byte 1
  1198. OSC16ERR3V: byte; //OSC16 error at 3V
  1199. OSC16ERR5V: byte; //OSC16 error at 5V
  1200. OSC20ERR3V: byte; //OSC20 error at 3V
  1201. OSC20ERR5V: byte; //OSC20 error at 5V
  1202. end;
  1203. TSLPCTRL = object //Sleep Controller
  1204. CTRLA: byte; //Control
  1205. const
  1206. // Sleep enable
  1207. SENbm = $01;
  1208. // SLPCTRL_SMODE
  1209. SMODEmask = $06;
  1210. SMODE_IDLE = $00;
  1211. SMODE_STDBY = $02;
  1212. SMODE_PDOWN = $04;
  1213. end;
  1214. TSPI = object //Serial Peripheral Interface
  1215. CTRLA: byte; //Control A
  1216. CTRLB: byte; //Control B
  1217. INTCTRL: byte; //Interrupt Control
  1218. INTFLAGS: byte; //Interrupt Flags
  1219. DATA: byte; //Data
  1220. const
  1221. // Enable Double Speed
  1222. CLK2Xbm = $10;
  1223. // Data Order Setting
  1224. DORDbm = $40;
  1225. // Enable Module
  1226. ENABLEbm = $01;
  1227. // Master Operation Enable
  1228. MASTERbm = $20;
  1229. // SPI_PRESC
  1230. PRESCmask = $06;
  1231. PRESC_DIV4 = $00;
  1232. PRESC_DIV16 = $02;
  1233. PRESC_DIV64 = $04;
  1234. PRESC_DIV128 = $06;
  1235. // Buffer Mode Enable
  1236. BUFENbm = $80;
  1237. // Buffer Write Mode
  1238. BUFWRbm = $40;
  1239. // SPI_MODE
  1240. MODEmask = $03;
  1241. MODE_0 = $00;
  1242. MODE_1 = $01;
  1243. MODE_2 = $02;
  1244. MODE_3 = $03;
  1245. // Slave Select Disable
  1246. SSDbm = $04;
  1247. // Data Register Empty Interrupt Enable
  1248. DREIEbm = $20;
  1249. // Interrupt Enable
  1250. IEbm = $01;
  1251. // Receive Complete Interrupt Enable
  1252. RXCIEbm = $80;
  1253. // Slave Select Trigger Interrupt Enable
  1254. SSIEbm = $10;
  1255. // Transfer Complete Interrupt Enable
  1256. TXCIEbm = $40;
  1257. // Buffer Overflow
  1258. BUFOVFbm = $01;
  1259. // Data Register Empty Interrupt Flag
  1260. DREIFbm = $20;
  1261. // Receive Complete Interrupt Flag
  1262. RXCIFbm = $80;
  1263. // Slave Select Trigger Interrupt Flag
  1264. SSIFbm = $10;
  1265. // Transfer Complete Interrupt Flag
  1266. TXCIFbm = $40;
  1267. // Interrupt Flag
  1268. IFbm = $80;
  1269. // Write Collision
  1270. WRCOLbm = $40;
  1271. end;
  1272. TSYSCFG = object //System Configuration Registers
  1273. Reserved0: byte;
  1274. REVID: byte; //Revision ID
  1275. EXTBRK: byte; //External Break
  1276. const
  1277. // External break enable
  1278. ENEXTBRKbm = $01;
  1279. end;
  1280. TTCA_SINGLE = object //16-bit Timer/Counter Type A - Single Mode
  1281. CTRLA: byte; //Control A
  1282. CTRLB: byte; //Control B
  1283. CTRLC: byte; //Control C
  1284. CTRLD: byte; //Control D
  1285. CTRLECLR: byte; //Control E Clear
  1286. CTRLESET: byte; //Control E Set
  1287. CTRLFCLR: byte; //Control F Clear
  1288. CTRLFSET: byte; //Control F Set
  1289. Reserved8: byte;
  1290. EVCTRL: byte; //Event Control
  1291. INTCTRL: byte; //Interrupt Control
  1292. INTFLAGS: byte; //Interrupt Flags
  1293. Reserved12: byte;
  1294. Reserved13: byte;
  1295. DBGCTRL: byte; //Degbug Control
  1296. TEMP: byte; //Temporary data for 16-bit Access
  1297. Reserved16: byte;
  1298. Reserved17: byte;
  1299. Reserved18: byte;
  1300. Reserved19: byte;
  1301. Reserved20: byte;
  1302. Reserved21: byte;
  1303. Reserved22: byte;
  1304. Reserved23: byte;
  1305. Reserved24: byte;
  1306. Reserved25: byte;
  1307. Reserved26: byte;
  1308. Reserved27: byte;
  1309. Reserved28: byte;
  1310. Reserved29: byte;
  1311. Reserved30: byte;
  1312. Reserved31: byte;
  1313. CNT: word; //Count
  1314. Reserved34: byte;
  1315. Reserved35: byte;
  1316. Reserved36: byte;
  1317. Reserved37: byte;
  1318. PER: word; //Period
  1319. CMP0: word; //Compare 0
  1320. CMP1: word; //Compare 1
  1321. CMP2: word; //Compare 2
  1322. Reserved46: byte;
  1323. Reserved47: byte;
  1324. Reserved48: byte;
  1325. Reserved49: byte;
  1326. Reserved50: byte;
  1327. Reserved51: byte;
  1328. Reserved52: byte;
  1329. Reserved53: byte;
  1330. PERBUF: word; //Period Buffer
  1331. CMP0BUF: word; //Compare 0 Buffer
  1332. CMP1BUF: word; //Compare 1 Buffer
  1333. CMP2BUF: word; //Compare 2 Buffer
  1334. const
  1335. // TCA_SINGLE_CLKSEL
  1336. SINGLE_CLKSELmask = $0E;
  1337. SINGLE_CLKSEL_DIV1 = $00;
  1338. SINGLE_CLKSEL_DIV2 = $02;
  1339. SINGLE_CLKSEL_DIV4 = $04;
  1340. SINGLE_CLKSEL_DIV8 = $06;
  1341. SINGLE_CLKSEL_DIV16 = $08;
  1342. SINGLE_CLKSEL_DIV64 = $0A;
  1343. SINGLE_CLKSEL_DIV256 = $0C;
  1344. SINGLE_CLKSEL_DIV1024 = $0E;
  1345. // Module Enable
  1346. ENABLEbm = $01;
  1347. // Auto Lock Update
  1348. ALUPDbm = $08;
  1349. // Compare 0 Enable
  1350. CMP0ENbm = $10;
  1351. // Compare 1 Enable
  1352. CMP1ENbm = $20;
  1353. // Compare 2 Enable
  1354. CMP2ENbm = $40;
  1355. // TCA_SINGLE_WGMODE
  1356. SINGLE_WGMODEmask = $07;
  1357. SINGLE_WGMODE_NORMAL = $00;
  1358. SINGLE_WGMODE_FRQ = $01;
  1359. SINGLE_WGMODE_SINGLESLOPE = $03;
  1360. SINGLE_WGMODE_DSTOP = $05;
  1361. SINGLE_WGMODE_DSBOTH = $06;
  1362. SINGLE_WGMODE_DSBOTTOM = $07;
  1363. // Compare 0 Waveform Output Value
  1364. CMP0OVbm = $01;
  1365. // Compare 1 Waveform Output Value
  1366. CMP1OVbm = $02;
  1367. // Compare 2 Waveform Output Value
  1368. CMP2OVbm = $04;
  1369. // Split Mode Enable
  1370. SPLITMbm = $01;
  1371. // TCA_SINGLE_CMD
  1372. SINGLE_CMDmask = $0C;
  1373. SINGLE_CMD_NONE = $00;
  1374. SINGLE_CMD_UPDATE = $04;
  1375. SINGLE_CMD_RESTART = $08;
  1376. SINGLE_CMD_RESET = $0C;
  1377. // Direction
  1378. DIRbm = $01;
  1379. // Lock Update
  1380. LUPDbm = $02;
  1381. // Compare 0 Buffer Valid
  1382. CMP0BVbm = $02;
  1383. // Compare 1 Buffer Valid
  1384. CMP1BVbm = $04;
  1385. // Compare 2 Buffer Valid
  1386. CMP2BVbm = $08;
  1387. // Period Buffer Valid
  1388. PERBVbm = $01;
  1389. // Debug Run
  1390. DBGRUNbm = $01;
  1391. // Count on Event Input
  1392. CNTEIbm = $01;
  1393. // TCA_SINGLE_EVACT
  1394. SINGLE_EVACTmask = $06;
  1395. SINGLE_EVACT_POSEDGE = $00;
  1396. SINGLE_EVACT_ANYEDGE = $02;
  1397. SINGLE_EVACT_HIGHLVL = $04;
  1398. SINGLE_EVACT_UPDOWN = $06;
  1399. // Compare 0 Interrupt
  1400. CMP0bm = $10;
  1401. // Compare 1 Interrupt
  1402. CMP1bm = $20;
  1403. // Compare 2 Interrupt
  1404. CMP2bm = $40;
  1405. // Overflow Interrupt
  1406. OVFbm = $01;
  1407. end;
  1408. TTCA_SPLIT = object //16-bit Timer/Counter Type A - Split Mode
  1409. CTRLA: byte; //Control A
  1410. CTRLB: byte; //Control B
  1411. CTRLC: byte; //Control C
  1412. CTRLD: byte; //Control D
  1413. CTRLECLR: byte; //Control E Clear
  1414. CTRLESET: byte; //Control E Set
  1415. Reserved6: byte;
  1416. Reserved7: byte;
  1417. Reserved8: byte;
  1418. Reserved9: byte;
  1419. INTCTRL: byte; //Interrupt Control
  1420. INTFLAGS: byte; //Interrupt Flags
  1421. Reserved12: byte;
  1422. Reserved13: byte;
  1423. DBGCTRL: byte; //Degbug Control
  1424. Reserved15: byte;
  1425. Reserved16: byte;
  1426. Reserved17: byte;
  1427. Reserved18: byte;
  1428. Reserved19: byte;
  1429. Reserved20: byte;
  1430. Reserved21: byte;
  1431. Reserved22: byte;
  1432. Reserved23: byte;
  1433. Reserved24: byte;
  1434. Reserved25: byte;
  1435. Reserved26: byte;
  1436. Reserved27: byte;
  1437. Reserved28: byte;
  1438. Reserved29: byte;
  1439. Reserved30: byte;
  1440. Reserved31: byte;
  1441. LCNT: byte; //Low Count
  1442. HCNT: byte; //High Count
  1443. Reserved34: byte;
  1444. Reserved35: byte;
  1445. Reserved36: byte;
  1446. Reserved37: byte;
  1447. LPER: byte; //Low Period
  1448. HPER: byte; //High Period
  1449. LCMP0: byte; //Low Compare
  1450. HCMP0: byte; //High Compare
  1451. LCMP1: byte; //Low Compare
  1452. HCMP1: byte; //High Compare
  1453. LCMP2: byte; //Low Compare
  1454. HCMP2: byte; //High Compare
  1455. const
  1456. // TCA_SPLIT_CLKSEL
  1457. SPLIT_CLKSELmask = $0E;
  1458. SPLIT_CLKSEL_DIV1 = $00;
  1459. SPLIT_CLKSEL_DIV2 = $02;
  1460. SPLIT_CLKSEL_DIV4 = $04;
  1461. SPLIT_CLKSEL_DIV8 = $06;
  1462. SPLIT_CLKSEL_DIV16 = $08;
  1463. SPLIT_CLKSEL_DIV64 = $0A;
  1464. SPLIT_CLKSEL_DIV256 = $0C;
  1465. SPLIT_CLKSEL_DIV1024 = $0E;
  1466. // Module Enable
  1467. ENABLEbm = $01;
  1468. // High Compare 0 Enable
  1469. HCMP0ENbm = $10;
  1470. // High Compare 1 Enable
  1471. HCMP1ENbm = $20;
  1472. // High Compare 2 Enable
  1473. HCMP2ENbm = $40;
  1474. // Low Compare 0 Enable
  1475. LCMP0ENbm = $01;
  1476. // Low Compare 1 Enable
  1477. LCMP1ENbm = $02;
  1478. // Low Compare 2 Enable
  1479. LCMP2ENbm = $04;
  1480. // High Compare 0 Output Value
  1481. HCMP0OVbm = $10;
  1482. // High Compare 1 Output Value
  1483. HCMP1OVbm = $20;
  1484. // High Compare 2 Output Value
  1485. HCMP2OVbm = $40;
  1486. // Low Compare 0 Output Value
  1487. LCMP0OVbm = $01;
  1488. // Low Compare 1 Output Value
  1489. LCMP1OVbm = $02;
  1490. // Low Compare 2 Output Value
  1491. LCMP2OVbm = $04;
  1492. // Split Mode Enable
  1493. SPLITMbm = $01;
  1494. // TCA_SPLIT_CMD
  1495. SPLIT_CMDmask = $0C;
  1496. SPLIT_CMD_NONE = $00;
  1497. SPLIT_CMD_UPDATE = $04;
  1498. SPLIT_CMD_RESTART = $08;
  1499. SPLIT_CMD_RESET = $0C;
  1500. // Debug Run
  1501. DBGRUNbm = $01;
  1502. // High Underflow Interrupt Enable
  1503. HUNFbm = $02;
  1504. // Low Compare 0 Interrupt Enable
  1505. LCMP0bm = $10;
  1506. // Low Compare 1 Interrupt Enable
  1507. LCMP1bm = $20;
  1508. // Low Compare 2 Interrupt Enable
  1509. LCMP2bm = $40;
  1510. // Low Underflow Interrupt Enable
  1511. LUNFbm = $01;
  1512. end;
  1513. TTCA = record //16-bit Timer/Counter Type A
  1514. case byte of
  1515. 0: (SINGLE: TTCA_SINGLE);
  1516. 1: (SPLIT: TTCA_SPLIT);
  1517. end;
  1518. TTCB = object //16-bit Timer Type B
  1519. CTRLA: byte; //Control A
  1520. CTRLB: byte; //Control Register B
  1521. Reserved2: byte;
  1522. Reserved3: byte;
  1523. EVCTRL: byte; //Event Control
  1524. INTCTRL: byte; //Interrupt Control
  1525. INTFLAGS: byte; //Interrupt Flags
  1526. STATUS: byte; //Status
  1527. DBGCTRL: byte; //Debug Control
  1528. TEMP: byte; //Temporary Value
  1529. CNT: word; //Count
  1530. CCMP: word; //Compare or Capture
  1531. const
  1532. // TCB_CLKSEL
  1533. CLKSELmask = $06;
  1534. CLKSEL_CLKDIV1 = $00;
  1535. CLKSEL_CLKDIV2 = $02;
  1536. CLKSEL_CLKTCA = $04;
  1537. // Enable
  1538. ENABLEbm = $01;
  1539. // Run Standby
  1540. RUNSTDBYbm = $40;
  1541. // Synchronize Update
  1542. SYNCUPDbm = $10;
  1543. // Asynchronous Enable
  1544. ASYNCbm = $40;
  1545. // Pin Output Enable
  1546. CCMPENbm = $10;
  1547. // Pin Initial State
  1548. CCMPINITbm = $20;
  1549. // TCB_CNTMODE
  1550. CNTMODEmask = $07;
  1551. CNTMODE_INT = $00;
  1552. CNTMODE_TIMEOUT = $01;
  1553. CNTMODE_CAPT = $02;
  1554. CNTMODE_FRQ = $03;
  1555. CNTMODE_PW = $04;
  1556. CNTMODE_FRQPW = $05;
  1557. CNTMODE_SINGLE = $06;
  1558. CNTMODE_PWM8 = $07;
  1559. // Debug Run
  1560. DBGRUNbm = $01;
  1561. // Event Input Enable
  1562. CAPTEIbm = $01;
  1563. // Event Edge
  1564. EDGEbm = $10;
  1565. // Input Capture Noise Cancellation Filter
  1566. FILTERbm = $40;
  1567. // Capture or Timeout
  1568. CAPTbm = $01;
  1569. // Run
  1570. RUNbm = $01;
  1571. end;
  1572. TTCD = object //Timer Counter D
  1573. CTRLA: byte; //Control A
  1574. CTRLB: byte; //Control B
  1575. CTRLC: byte; //Control C
  1576. CTRLD: byte; //Control D
  1577. CTRLE: byte; //Control E
  1578. Reserved5: byte;
  1579. Reserved6: byte;
  1580. Reserved7: byte;
  1581. EVCTRLA: byte; //EVCTRLA
  1582. EVCTRLB: byte; //EVCTRLB
  1583. Reserved10: byte;
  1584. Reserved11: byte;
  1585. INTCTRL: byte; //Interrupt Control
  1586. INTFLAGS: byte; //Interrupt Flags
  1587. STATUS: byte; //Status
  1588. Reserved15: byte;
  1589. INPUTCTRLA: byte; //Input Control A
  1590. INPUTCTRLB: byte; //Input Control B
  1591. FAULTCTRL: byte; //Fault Control
  1592. Reserved19: byte;
  1593. DLYCTRL: byte; //Delay Control
  1594. DLYVAL: byte; //Delay value
  1595. Reserved22: byte;
  1596. Reserved23: byte;
  1597. DITCTRL: byte; //Dither Control A
  1598. DITVAL: byte; //Dither value
  1599. Reserved26: byte;
  1600. Reserved27: byte;
  1601. Reserved28: byte;
  1602. Reserved29: byte;
  1603. DBGCTRL: byte; //Debug Control
  1604. Reserved31: byte;
  1605. Reserved32: byte;
  1606. Reserved33: byte;
  1607. CAPTUREA: word; //Capture A
  1608. CAPTUREB: word; //Capture B
  1609. Reserved38: byte;
  1610. Reserved39: byte;
  1611. CMPASET: word; //Compare A Set
  1612. CMPACLR: word; //Compare A Clear
  1613. CMPBSET: word; //Compare B Set
  1614. CMPBCLR: word; //Compare B Clear
  1615. const
  1616. // TCD_CLKSEL
  1617. CLKSELmask = $60;
  1618. CLKSEL_20MHZ = $00;
  1619. CLKSEL_EXTCLK = $40;
  1620. CLKSEL_SYSCLK = $60;
  1621. // TCD_CNTPRES
  1622. CNTPRESmask = $18;
  1623. CNTPRES_DIV1 = $00;
  1624. CNTPRES_DIV4 = $08;
  1625. CNTPRES_DIV32 = $10;
  1626. // Enable
  1627. ENABLEbm = $01;
  1628. // TCD_SYNCPRES
  1629. SYNCPRESmask = $06;
  1630. SYNCPRES_DIV1 = $00;
  1631. SYNCPRES_DIV2 = $02;
  1632. SYNCPRES_DIV4 = $04;
  1633. SYNCPRES_DIV8 = $06;
  1634. // TCD_WGMODE
  1635. WGMODEmask = $03;
  1636. WGMODE_ONERAMP = $00;
  1637. WGMODE_TWORAMP = $01;
  1638. WGMODE_FOURRAMP = $02;
  1639. WGMODE_DS = $03;
  1640. // Auto update
  1641. AUPDATEbm = $02;
  1642. // TCD_CMPCSEL
  1643. CMPCSELmask = $40;
  1644. CMPCSEL_PWMA = $00;
  1645. CMPCSEL_PWMB = $40;
  1646. // TCD_CMPDSEL
  1647. CMPDSELmask = $80;
  1648. CMPDSEL_PWMA = $00;
  1649. CMPDSEL_PWMB = $80;
  1650. // Compare output value override
  1651. CMPOVRbm = $01;
  1652. // Fifty percent waveform
  1653. FIFTYbm = $08;
  1654. // Compare A value
  1655. CMPAVAL0bm = $01;
  1656. CMPAVAL1bm = $02;
  1657. CMPAVAL2bm = $04;
  1658. CMPAVAL3bm = $08;
  1659. // Compare B value
  1660. CMPBVAL0bm = $10;
  1661. CMPBVAL1bm = $20;
  1662. CMPBVAL2bm = $40;
  1663. CMPBVAL3bm = $80;
  1664. // Disable at end of cycle
  1665. DISEOCbm = $80;
  1666. // Restart strobe
  1667. RESTARTbm = $04;
  1668. // Software Capture A Strobe
  1669. SCAPTUREAbm = $08;
  1670. // Software Capture B Strobe
  1671. SCAPTUREBbm = $10;
  1672. // synchronize strobe
  1673. SYNCbm = $02;
  1674. // synchronize end of cycle strobe
  1675. SYNCEOCbm = $01;
  1676. // Debug run
  1677. DBGRUNbm = $01;
  1678. // Fault detection
  1679. FAULTDETbm = $04;
  1680. // TCD_DITHERSEL
  1681. DITHERSELmask = $03;
  1682. DITHERSEL_ONTIMEB = $00;
  1683. DITHERSEL_ONTIMEAB = $01;
  1684. DITHERSEL_DEADTIMEB = $02;
  1685. DITHERSEL_DEADTIMEAB = $03;
  1686. // Dither value
  1687. DITHER0bm = $01;
  1688. DITHER1bm = $02;
  1689. DITHER2bm = $04;
  1690. DITHER3bm = $08;
  1691. // TCD_DLYPRESC
  1692. DLYPRESCmask = $30;
  1693. DLYPRESC_DIV1 = $00;
  1694. DLYPRESC_DIV2 = $10;
  1695. DLYPRESC_DIV4 = $20;
  1696. DLYPRESC_DIV8 = $30;
  1697. // TCD_DLYSEL
  1698. DLYSELmask = $03;
  1699. DLYSEL_OFF = $00;
  1700. DLYSEL_INBLANK = $01;
  1701. DLYSEL_EVENT = $02;
  1702. // TCD_DLYTRIG
  1703. DLYTRIGmask = $0C;
  1704. DLYTRIG_CMPASET = $00;
  1705. DLYTRIG_CMPACLR = $04;
  1706. DLYTRIG_CMPBSET = $08;
  1707. DLYTRIG_CMPBCLR = $0C;
  1708. // Delay value
  1709. DLYVAL0bm = $01;
  1710. DLYVAL1bm = $02;
  1711. DLYVAL2bm = $04;
  1712. DLYVAL3bm = $08;
  1713. DLYVAL4bm = $10;
  1714. DLYVAL5bm = $20;
  1715. DLYVAL6bm = $40;
  1716. DLYVAL7bm = $80;
  1717. // TCD_ACTION
  1718. ACTIONmask = $04;
  1719. ACTION_FAULT = $00;
  1720. ACTION_CAPTURE = $04;
  1721. // TCD_CFG
  1722. CFGmask = $C0;
  1723. CFG_NEITHER = $00;
  1724. CFG_FILTER = $40;
  1725. CFG_ASYNC = $80;
  1726. // TCD_EDGE
  1727. EDGEmask = $10;
  1728. EDGE_FALL_LOW = $00;
  1729. EDGE_RISE_HIGH = $10;
  1730. // Trigger event enable
  1731. TRIGEIbm = $01;
  1732. // Compare A value
  1733. CMPAbm = $01;
  1734. // Compare A enable
  1735. CMPAENbm = $10;
  1736. // Compare B value
  1737. CMPBbm = $02;
  1738. // Compare B enable
  1739. CMPBENbm = $20;
  1740. // Compare C value
  1741. CMPCbm = $04;
  1742. // Compare C enable
  1743. CMPCENbm = $40;
  1744. // Compare D vaule
  1745. CMPDbm = $08;
  1746. // Compare D enable
  1747. CMPDENbm = $80;
  1748. // TCD_INPUTMODE
  1749. INPUTMODEmask = $0F;
  1750. INPUTMODE_NONE = $00;
  1751. INPUTMODE_JMPWAIT = $01;
  1752. INPUTMODE_EXECWAIT = $02;
  1753. INPUTMODE_EXECFAULT = $03;
  1754. INPUTMODE_FREQ = $04;
  1755. INPUTMODE_EXECDT = $05;
  1756. INPUTMODE_WAIT = $06;
  1757. INPUTMODE_WAITSW = $07;
  1758. INPUTMODE_EDGETRIG = $08;
  1759. INPUTMODE_EDGETRIGFREQ = $09;
  1760. INPUTMODE_LVLTRIGFREQ = $0A;
  1761. // Overflow interrupt enable
  1762. OVFbm = $01;
  1763. // Trigger A interrupt enable
  1764. TRIGAbm = $04;
  1765. // Trigger B interrupt enable
  1766. TRIGBbm = $08;
  1767. // Command ready
  1768. CMDRDYbm = $02;
  1769. // Enable ready
  1770. ENRDYbm = $01;
  1771. // PWM activity on A
  1772. PWMACTAbm = $40;
  1773. // PWM activity on B
  1774. PWMACTBbm = $80;
  1775. end;
  1776. TTWI = object //Two-Wire Interface
  1777. CTRLA: byte; //Control A
  1778. Reserved1: byte;
  1779. DBGCTRL: byte; //Debug Control Register
  1780. MCTRLA: byte; //Master Control A
  1781. MCTRLB: byte; //Master Control B
  1782. MSTATUS: byte; //Master Status
  1783. MBAUD: byte; //Master Baurd Rate Control
  1784. MADDR: byte; //Master Address
  1785. MDATA: byte; //Master Data
  1786. SCTRLA: byte; //Slave Control A
  1787. SCTRLB: byte; //Slave Control B
  1788. SSTATUS: byte; //Slave Status
  1789. SADDR: byte; //Slave Address
  1790. SDATA: byte; //Slave Data
  1791. SADDRMASK: byte; //Slave Address Mask
  1792. const
  1793. // FM Plus Enable
  1794. FMPENbm = $02;
  1795. // TWI_SDAHOLD
  1796. SDAHOLDmask = $0C;
  1797. SDAHOLD_OFF = $00;
  1798. SDAHOLD_50NS = $04;
  1799. SDAHOLD_300NS = $08;
  1800. SDAHOLD_500NS = $0C;
  1801. // TWI_SDASETUP
  1802. SDASETUPmask = $10;
  1803. SDASETUP_4CYC = $00;
  1804. SDASETUP_8CYC = $10;
  1805. // Debug Run
  1806. DBGRUNbm = $01;
  1807. // Enable TWI Master
  1808. ENABLEbm = $01;
  1809. // Quick Command Enable
  1810. QCENbm = $10;
  1811. // Read Interrupt Enable
  1812. RIENbm = $80;
  1813. // Smart Mode Enable
  1814. SMENbm = $02;
  1815. // TWI_TIMEOUT
  1816. TIMEOUTmask = $0C;
  1817. TIMEOUT_DISABLED = $00;
  1818. TIMEOUT_50US = $04;
  1819. TIMEOUT_100US = $08;
  1820. TIMEOUT_200US = $0C;
  1821. // Write Interrupt Enable
  1822. WIENbm = $40;
  1823. // TWI_ACKACT
  1824. ACKACTmask = $04;
  1825. ACKACT_ACK = $00;
  1826. ACKACT_NACK = $04;
  1827. // Flush
  1828. FLUSHbm = $08;
  1829. // TWI_MCMD
  1830. MCMDmask = $03;
  1831. MCMD_NOACT = $00;
  1832. MCMD_REPSTART = $01;
  1833. MCMD_RECVTRANS = $02;
  1834. MCMD_STOP = $03;
  1835. // Arbitration Lost
  1836. ARBLOSTbm = $08;
  1837. // Bus Error
  1838. BUSERRbm = $04;
  1839. // TWI_BUSSTATE
  1840. BUSSTATEmask = $03;
  1841. BUSSTATE_UNKNOWN = $00;
  1842. BUSSTATE_IDLE = $01;
  1843. BUSSTATE_OWNER = $02;
  1844. BUSSTATE_BUSY = $03;
  1845. // Clock Hold
  1846. CLKHOLDbm = $20;
  1847. // Read Interrupt Flag
  1848. RIFbm = $80;
  1849. // Received Acknowledge
  1850. RXACKbm = $10;
  1851. // Write Interrupt Flag
  1852. WIFbm = $40;
  1853. // Address Enable
  1854. ADDRENbm = $01;
  1855. // Address Mask
  1856. ADDRMASK0bm = $02;
  1857. ADDRMASK1bm = $04;
  1858. ADDRMASK2bm = $08;
  1859. ADDRMASK3bm = $10;
  1860. ADDRMASK4bm = $20;
  1861. ADDRMASK5bm = $40;
  1862. ADDRMASK6bm = $80;
  1863. // Address/Stop Interrupt Enable
  1864. APIENbm = $40;
  1865. // Data Interrupt Enable
  1866. DIENbm = $80;
  1867. // Stop Interrupt Enable
  1868. PIENbm = $20;
  1869. // Promiscuous Mode Enable
  1870. PMENbm = $04;
  1871. // TWI_SCMD
  1872. SCMDmask = $03;
  1873. SCMD_NOACT = $00;
  1874. SCMD_COMPTRANS = $02;
  1875. SCMD_RESPONSE = $03;
  1876. // TWI_AP
  1877. APmask = $01;
  1878. AP_STOP = $00;
  1879. AP_ADR = $01;
  1880. // Address/Stop Interrupt Flag
  1881. APIFbm = $40;
  1882. // Collision
  1883. COLLbm = $08;
  1884. // Data Interrupt Flag
  1885. DIFbm = $80;
  1886. // Read/Write Direction
  1887. DIRbm = $02;
  1888. end;
  1889. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1890. RXDATAL: byte; //Receive Data Low Byte
  1891. RXDATAH: byte; //Receive Data High Byte
  1892. TXDATAL: byte; //Transmit Data Low Byte
  1893. TXDATAH: byte; //Transmit Data High Byte
  1894. STATUS: byte; //Status
  1895. CTRLA: byte; //Control A
  1896. CTRLB: byte; //Control B
  1897. CTRLC: byte; //Control C
  1898. BAUD: word; //Baud Rate
  1899. Reserved10: byte;
  1900. DBGCTRL: byte; //Debug Control
  1901. EVCTRL: byte; //Event Control
  1902. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1903. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1904. const
  1905. // Auto-baud Error Interrupt Enable
  1906. ABEIEbm = $04;
  1907. // Data Register Empty Interrupt Enable
  1908. DREIEbm = $20;
  1909. // Loop-back Mode Enable
  1910. LBMEbm = $08;
  1911. // USART_RS485
  1912. RS485mask = $03;
  1913. RS485_OFF = $00;
  1914. RS485_EXT = $01;
  1915. RS485_INT = $02;
  1916. // Receive Complete Interrupt Enable
  1917. RXCIEbm = $80;
  1918. // Receiver Start Frame Interrupt Enable
  1919. RXSIEbm = $10;
  1920. // Transmit Complete Interrupt Enable
  1921. TXCIEbm = $40;
  1922. // Multi-processor Communication Mode
  1923. MPCMbm = $01;
  1924. // Open Drain Mode Enable
  1925. ODMEbm = $08;
  1926. // Reciever enable
  1927. RXENbm = $80;
  1928. // USART_RXMODE
  1929. RXMODEmask = $06;
  1930. RXMODE_NORMAL = $00;
  1931. RXMODE_CLK2X = $02;
  1932. RXMODE_GENAUTO = $04;
  1933. RXMODE_LINAUTO = $06;
  1934. // Start Frame Detection Enable
  1935. SFDENbm = $10;
  1936. // Transmitter Enable
  1937. TXENbm = $40;
  1938. // USART_MSPI_CMODE
  1939. MSPI_CMODEmask = $C0;
  1940. MSPI_CMODE_ASYNCHRONOUS = $00;
  1941. MSPI_CMODE_SYNCHRONOUS = $40;
  1942. MSPI_CMODE_IRCOM = $80;
  1943. MSPI_CMODE_MSPI = $C0;
  1944. // SPI Master Mode, Clock Phase
  1945. UCPHAbm = $02;
  1946. // SPI Master Mode, Data Order
  1947. UDORDbm = $04;
  1948. // USART_NORMAL_CHSIZE
  1949. NORMAL_CHSIZEmask = $07;
  1950. NORMAL_CHSIZE_5BIT = $00;
  1951. NORMAL_CHSIZE_6BIT = $01;
  1952. NORMAL_CHSIZE_7BIT = $02;
  1953. NORMAL_CHSIZE_8BIT = $03;
  1954. NORMAL_CHSIZE_9BITL = $06;
  1955. NORMAL_CHSIZE_9BITH = $07;
  1956. // USART_NORMAL_CMODE
  1957. NORMAL_CMODEmask = $C0;
  1958. NORMAL_CMODE_ASYNCHRONOUS = $00;
  1959. NORMAL_CMODE_SYNCHRONOUS = $40;
  1960. NORMAL_CMODE_IRCOM = $80;
  1961. NORMAL_CMODE_MSPI = $C0;
  1962. // USART_NORMAL_PMODE
  1963. NORMAL_PMODEmask = $30;
  1964. NORMAL_PMODE_DISABLED = $00;
  1965. NORMAL_PMODE_EVEN = $20;
  1966. NORMAL_PMODE_ODD = $30;
  1967. // USART_NORMAL_SBMODE
  1968. NORMAL_SBMODEmask = $08;
  1969. NORMAL_SBMODE_1BIT = $00;
  1970. NORMAL_SBMODE_2BIT = $08;
  1971. // Autobaud majority voter bypass
  1972. ABMBPbm = $80;
  1973. // Debug Run
  1974. DBGRUNbm = $01;
  1975. // IrDA Event Input Enable
  1976. IREIbm = $01;
  1977. // Buffer Overflow
  1978. BUFOVFbm = $40;
  1979. // Receiver Data Register
  1980. DATA8bm = $01;
  1981. // Frame Error
  1982. FERRbm = $04;
  1983. // Parity Error
  1984. PERRbm = $02;
  1985. // Receive Complete Interrupt Flag
  1986. RXCIFbm = $80;
  1987. // RX Data
  1988. DATA0bm = $01;
  1989. DATA1bm = $02;
  1990. DATA2bm = $04;
  1991. DATA3bm = $08;
  1992. DATA4bm = $10;
  1993. DATA5bm = $20;
  1994. DATA6bm = $40;
  1995. DATA7bm = $80;
  1996. // Receiver Pulse Lenght
  1997. RXPL0bm = $01;
  1998. RXPL1bm = $02;
  1999. RXPL2bm = $04;
  2000. RXPL3bm = $08;
  2001. RXPL4bm = $10;
  2002. RXPL5bm = $20;
  2003. RXPL6bm = $40;
  2004. // Break Detected Flag
  2005. BDFbm = $02;
  2006. // Data Register Empty Flag
  2007. DREIFbm = $20;
  2008. // Inconsistent Sync Field Interrupt Flag
  2009. ISFIFbm = $08;
  2010. // Receive Start Interrupt
  2011. RXSIFbm = $10;
  2012. // Transmit Interrupt Flag
  2013. TXCIFbm = $40;
  2014. // Wait For Break
  2015. WFBbm = $01;
  2016. // Transmit pulse length
  2017. TXPL0bm = $01;
  2018. TXPL1bm = $02;
  2019. TXPL2bm = $04;
  2020. TXPL3bm = $08;
  2021. TXPL4bm = $10;
  2022. TXPL5bm = $20;
  2023. TXPL6bm = $40;
  2024. TXPL7bm = $80;
  2025. end;
  2026. TUSERROW = object //User Row
  2027. USERROW0: byte; //User Row Byte 0
  2028. USERROW1: byte; //User Row Byte 1
  2029. USERROW2: byte; //User Row Byte 2
  2030. USERROW3: byte; //User Row Byte 3
  2031. USERROW4: byte; //User Row Byte 4
  2032. USERROW5: byte; //User Row Byte 5
  2033. USERROW6: byte; //User Row Byte 6
  2034. USERROW7: byte; //User Row Byte 7
  2035. USERROW8: byte; //User Row Byte 8
  2036. USERROW9: byte; //User Row Byte 9
  2037. USERROW10: byte; //User Row Byte 10
  2038. USERROW11: byte; //User Row Byte 11
  2039. USERROW12: byte; //User Row Byte 12
  2040. USERROW13: byte; //User Row Byte 13
  2041. USERROW14: byte; //User Row Byte 14
  2042. USERROW15: byte; //User Row Byte 15
  2043. USERROW16: byte; //User Row Byte 16
  2044. USERROW17: byte; //User Row Byte 17
  2045. USERROW18: byte; //User Row Byte 18
  2046. USERROW19: byte; //User Row Byte 19
  2047. USERROW20: byte; //User Row Byte 20
  2048. USERROW21: byte; //User Row Byte 21
  2049. USERROW22: byte; //User Row Byte 22
  2050. USERROW23: byte; //User Row Byte 23
  2051. USERROW24: byte; //User Row Byte 24
  2052. USERROW25: byte; //User Row Byte 25
  2053. USERROW26: byte; //User Row Byte 26
  2054. USERROW27: byte; //User Row Byte 27
  2055. USERROW28: byte; //User Row Byte 28
  2056. USERROW29: byte; //User Row Byte 29
  2057. USERROW30: byte; //User Row Byte 30
  2058. USERROW31: byte; //User Row Byte 31
  2059. end;
  2060. TVPORT = object //Virtual Ports
  2061. DIR: byte; //Data Direction
  2062. OUT_: byte; //Output Value
  2063. IN_: byte; //Input Value
  2064. INTFLAGS: byte; //Interrupt Flags
  2065. const
  2066. // Pin Interrupt
  2067. INT0bm = $01;
  2068. INT1bm = $02;
  2069. INT2bm = $04;
  2070. INT3bm = $08;
  2071. INT4bm = $10;
  2072. INT5bm = $20;
  2073. INT6bm = $40;
  2074. INT7bm = $80;
  2075. end;
  2076. TVREF = object //Voltage reference
  2077. CTRLA: byte; //Control A
  2078. CTRLB: byte; //Control B
  2079. const
  2080. // VREF_ADC0REFSEL
  2081. ADC0REFSELmask = $70;
  2082. ADC0REFSEL_0V55 = $00;
  2083. ADC0REFSEL_1V1 = $10;
  2084. ADC0REFSEL_2V5 = $20;
  2085. ADC0REFSEL_4V34 = $30;
  2086. ADC0REFSEL_1V5 = $40;
  2087. // VREF_DAC0REFSEL
  2088. DAC0REFSELmask = $07;
  2089. DAC0REFSEL_0V55 = $00;
  2090. DAC0REFSEL_1V1 = $01;
  2091. DAC0REFSEL_2V5 = $02;
  2092. DAC0REFSEL_4V34 = $03;
  2093. DAC0REFSEL_1V5 = $04;
  2094. // ADC0 reference enable
  2095. ADC0REFENbm = $02;
  2096. // DAC0/AC0 reference enable
  2097. DAC0REFENbm = $01;
  2098. end;
  2099. TWDT = object //Watch-Dog Timer
  2100. CTRLA: byte; //Control A
  2101. STATUS: byte; //Status
  2102. const
  2103. // WDT_PERIOD
  2104. PERIODmask = $0F;
  2105. PERIOD_OFF = $00;
  2106. PERIOD_8CLK = $01;
  2107. PERIOD_16CLK = $02;
  2108. PERIOD_32CLK = $03;
  2109. PERIOD_64CLK = $04;
  2110. PERIOD_128CLK = $05;
  2111. PERIOD_256CLK = $06;
  2112. PERIOD_512CLK = $07;
  2113. PERIOD_1KCLK = $08;
  2114. PERIOD_2KCLK = $09;
  2115. PERIOD_4KCLK = $0A;
  2116. PERIOD_8KCLK = $0B;
  2117. // WDT_WINDOW
  2118. WINDOWmask = $F0;
  2119. WINDOW_OFF = $00;
  2120. WINDOW_8CLK = $10;
  2121. WINDOW_16CLK = $20;
  2122. WINDOW_32CLK = $30;
  2123. WINDOW_64CLK = $40;
  2124. WINDOW_128CLK = $50;
  2125. WINDOW_256CLK = $60;
  2126. WINDOW_512CLK = $70;
  2127. WINDOW_1KCLK = $80;
  2128. WINDOW_2KCLK = $90;
  2129. WINDOW_4KCLK = $A0;
  2130. WINDOW_8KCLK = $B0;
  2131. // Lock enable
  2132. LOCKbm = $80;
  2133. // Syncronization busy
  2134. SYNCBUSYbm = $01;
  2135. end;
  2136. const
  2137. Pin0idx = 0; Pin0bm = 1;
  2138. Pin1idx = 1; Pin1bm = 2;
  2139. Pin2idx = 2; Pin2bm = 4;
  2140. Pin3idx = 3; Pin3bm = 8;
  2141. Pin4idx = 4; Pin4bm = 16;
  2142. Pin5idx = 5; Pin5bm = 32;
  2143. Pin6idx = 6; Pin6bm = 64;
  2144. Pin7idx = 7; Pin7bm = 128;
  2145. var
  2146. VPORTA: TVPORT absolute $0000;
  2147. VPORTB: TVPORT absolute $0004;
  2148. VPORTC: TVPORT absolute $0008;
  2149. GPIO: TGPIO absolute $001C;
  2150. CPU: TCPU absolute $0030;
  2151. RSTCTRL: TRSTCTRL absolute $0040;
  2152. SLPCTRL: TSLPCTRL absolute $0050;
  2153. CLKCTRL: TCLKCTRL absolute $0060;
  2154. BOD: TBOD absolute $0080;
  2155. VREF: TVREF absolute $00A0;
  2156. WDT: TWDT absolute $0100;
  2157. CPUINT: TCPUINT absolute $0110;
  2158. CRCSCAN: TCRCSCAN absolute $0120;
  2159. RTC: TRTC absolute $0140;
  2160. EVSYS: TEVSYS absolute $0180;
  2161. CCL: TCCL absolute $01C0;
  2162. PORTMUX: TPORTMUX absolute $0200;
  2163. PORTA: TPORT absolute $0400;
  2164. PORTB: TPORT absolute $0420;
  2165. ADC0: TADC absolute $0600;
  2166. AC0: TAC absolute $0670;
  2167. DAC0: TDAC absolute $0680;
  2168. USART0: TUSART absolute $0800;
  2169. TWI0: TTWI absolute $0810;
  2170. SPI0: TSPI absolute $0820;
  2171. TCA0: TTCA absolute $0A00;
  2172. TCB0: TTCB absolute $0A40;
  2173. TCD0: TTCD absolute $0A80;
  2174. SYSCFG: TSYSCFG absolute $0F00;
  2175. NVMCTRL: TNVMCTRL absolute $1000;
  2176. SIGROW: TSIGROW absolute $1100;
  2177. FUSE: TFUSE absolute $1280;
  2178. LOCKBIT: TLOCKBIT absolute $128A;
  2179. USERROW: TUSERROW absolute $1300;
  2180. implementation
  2181. {$define RELBRANCHES}
  2182. {$i avrcommon.inc}
  2183. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  2184. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  2185. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 3
  2186. procedure PORTB_PORT_ISR; external name 'PORTB_PORT_ISR'; // Interrupt 4
  2187. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 6
  2188. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 7
  2189. procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 8
  2190. //procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 8
  2191. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 9
  2192. procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 10
  2193. //procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 10
  2194. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 11
  2195. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 11
  2196. procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 12
  2197. //procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 12
  2198. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 13
  2199. procedure TCD0_OVF_ISR; external name 'TCD0_OVF_ISR'; // Interrupt 14
  2200. procedure TCD0_TRIG_ISR; external name 'TCD0_TRIG_ISR'; // Interrupt 15
  2201. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 16
  2202. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 17
  2203. procedure ADC0_WCOMP_ISR; external name 'ADC0_WCOMP_ISR'; // Interrupt 18
  2204. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 19
  2205. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 20
  2206. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 21
  2207. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 22
  2208. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 23
  2209. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 24
  2210. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 25
  2211. procedure _FPC_start; assembler; nostackframe;
  2212. label
  2213. _start;
  2214. asm
  2215. .init
  2216. .globl _start
  2217. rjmp _start
  2218. rjmp CRCSCAN_NMI_ISR
  2219. rjmp BOD_VLM_ISR
  2220. rjmp PORTA_PORT_ISR
  2221. rjmp PORTB_PORT_ISR
  2222. rjmp RTC_CNT_ISR
  2223. rjmp RTC_PIT_ISR
  2224. rjmp TCA0_OVF_ISR
  2225. // rjmp TCA0_LUNF_ISR
  2226. rjmp TCA0_HUNF_ISR
  2227. rjmp TCA0_LCMP0_ISR
  2228. // rjmp TCA0_CMP0_ISR
  2229. rjmp TCA0_CMP1_ISR
  2230. // rjmp TCA0_LCMP1_ISR
  2231. rjmp TCA0_CMP2_ISR
  2232. // rjmp TCA0_LCMP2_ISR
  2233. rjmp TCB0_INT_ISR
  2234. rjmp TCD0_OVF_ISR
  2235. rjmp TCD0_TRIG_ISR
  2236. rjmp AC0_AC_ISR
  2237. rjmp ADC0_RESRDY_ISR
  2238. rjmp ADC0_WCOMP_ISR
  2239. rjmp TWI0_TWIS_ISR
  2240. rjmp TWI0_TWIM_ISR
  2241. rjmp SPI0_INT_ISR
  2242. rjmp USART0_RXC_ISR
  2243. rjmp USART0_DRE_ISR
  2244. rjmp USART0_TXC_ISR
  2245. rjmp NVMCTRL_EE_ISR
  2246. {$i start.inc}
  2247. .weak CRCSCAN_NMI_ISR
  2248. .weak BOD_VLM_ISR
  2249. .weak PORTA_PORT_ISR
  2250. .weak PORTB_PORT_ISR
  2251. .weak RTC_CNT_ISR
  2252. .weak RTC_PIT_ISR
  2253. .weak TCA0_OVF_ISR
  2254. // .weak TCA0_LUNF_ISR
  2255. .weak TCA0_HUNF_ISR
  2256. .weak TCA0_LCMP0_ISR
  2257. // .weak TCA0_CMP0_ISR
  2258. .weak TCA0_CMP1_ISR
  2259. // .weak TCA0_LCMP1_ISR
  2260. .weak TCA0_CMP2_ISR
  2261. // .weak TCA0_LCMP2_ISR
  2262. .weak TCB0_INT_ISR
  2263. .weak TCD0_OVF_ISR
  2264. .weak TCD0_TRIG_ISR
  2265. .weak AC0_AC_ISR
  2266. .weak ADC0_RESRDY_ISR
  2267. .weak ADC0_WCOMP_ISR
  2268. .weak TWI0_TWIS_ISR
  2269. .weak TWI0_TWIM_ISR
  2270. .weak SPI0_INT_ISR
  2271. .weak USART0_RXC_ISR
  2272. .weak USART0_DRE_ISR
  2273. .weak USART0_TXC_ISR
  2274. .weak NVMCTRL_EE_ISR
  2275. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  2276. .set BOD_VLM_ISR, Default_IRQ_handler
  2277. .set PORTA_PORT_ISR, Default_IRQ_handler
  2278. .set PORTB_PORT_ISR, Default_IRQ_handler
  2279. .set RTC_CNT_ISR, Default_IRQ_handler
  2280. .set RTC_PIT_ISR, Default_IRQ_handler
  2281. .set TCA0_OVF_ISR, Default_IRQ_handler
  2282. // .set TCA0_LUNF_ISR, Default_IRQ_handler
  2283. .set TCA0_HUNF_ISR, Default_IRQ_handler
  2284. .set TCA0_LCMP0_ISR, Default_IRQ_handler
  2285. // .set TCA0_CMP0_ISR, Default_IRQ_handler
  2286. .set TCA0_CMP1_ISR, Default_IRQ_handler
  2287. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  2288. .set TCA0_CMP2_ISR, Default_IRQ_handler
  2289. // .set TCA0_LCMP2_ISR, Default_IRQ_handler
  2290. .set TCB0_INT_ISR, Default_IRQ_handler
  2291. .set TCD0_OVF_ISR, Default_IRQ_handler
  2292. .set TCD0_TRIG_ISR, Default_IRQ_handler
  2293. .set AC0_AC_ISR, Default_IRQ_handler
  2294. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  2295. .set ADC0_WCOMP_ISR, Default_IRQ_handler
  2296. .set TWI0_TWIS_ISR, Default_IRQ_handler
  2297. .set TWI0_TWIM_ISR, Default_IRQ_handler
  2298. .set SPI0_INT_ISR, Default_IRQ_handler
  2299. .set USART0_RXC_ISR, Default_IRQ_handler
  2300. .set USART0_DRE_ISR, Default_IRQ_handler
  2301. .set USART0_TXC_ISR, Default_IRQ_handler
  2302. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  2303. end;
  2304. end.