attiny814.pp 60 KB

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  1. unit ATtiny814;
  2. {$goto on}
  3. interface
  4. type
  5. TAC = object //Analog Comparator
  6. CTRLA: byte; //Control A
  7. Reserved1: byte;
  8. MUXCTRLA: byte; //Mux Control A
  9. Reserved3: byte;
  10. Reserved4: byte;
  11. Reserved5: byte;
  12. INTCTRL: byte; //Interrupt Control
  13. STATUS: byte; //Status
  14. const
  15. // Enable
  16. ENABLEbm = $01;
  17. // AC_HYSMODE
  18. HYSMODEmask = $06;
  19. HYSMODE_OFF = $00;
  20. HYSMODE_10mV = $02;
  21. HYSMODE_25mV = $04;
  22. HYSMODE_50mV = $06;
  23. // AC_INTMODE
  24. INTMODEmask = $30;
  25. INTMODE_BOTHEDGE = $00;
  26. INTMODE_NEGEDGE = $20;
  27. INTMODE_POSEDGE = $30;
  28. // AC_LPMODE
  29. LPMODEmask = $08;
  30. LPMODE_DIS = $00;
  31. LPMODE_EN = $08;
  32. // Output Buffer Enable
  33. OUTENbm = $40;
  34. // Run in Standby Mode
  35. RUNSTDBYbm = $80;
  36. // Analog Comparator 0 Interrupt Enable
  37. CMPbm = $01;
  38. // Invert AC Output
  39. INVERTbm = $80;
  40. // AC_MUXNEG
  41. MUXNEGmask = $03;
  42. MUXNEG_PIN0 = $00;
  43. MUXNEG_PIN1 = $01;
  44. MUXNEG_VREF = $02;
  45. MUXNEG_DAC = $03;
  46. // AC_MUXPOS
  47. MUXPOSmask = $08;
  48. MUXPOS_PIN0 = $00;
  49. MUXPOS_PIN1 = $08;
  50. // Analog Comparator State
  51. STATEbm = $10;
  52. end;
  53. TADC = object //Analog to Digital Converter
  54. CTRLA: byte; //Control A
  55. CTRLB: byte; //Control B
  56. CTRLC: byte; //Control C
  57. CTRLD: byte; //Control D
  58. CTRLE: byte; //Control E
  59. SAMPCTRL: byte; //Sample Control
  60. MUXPOS: byte; //Positive mux input
  61. Reserved7: byte;
  62. COMMAND: byte; //Command
  63. EVCTRL: byte; //Event Control
  64. INTCTRL: byte; //Interrupt Control
  65. INTFLAGS: byte; //Interrupt Flags
  66. DBGCTRL: byte; //Debug Control
  67. TEMP: byte; //Temporary Data
  68. Reserved14: byte;
  69. Reserved15: byte;
  70. RES: word; //ADC Accumulator Result
  71. WINLT: word; //Window comparator low threshold
  72. WINHT: word; //Window comparator high threshold
  73. CALIB: byte; //Calibration
  74. const
  75. // ADC_DUTYCYC
  76. DUTYCYCmask = $01;
  77. DUTYCYC_DUTY50 = $00;
  78. DUTYCYC_DUTY25 = $01;
  79. // Start Conversion Operation
  80. STCONVbm = $01;
  81. // ADC Enable
  82. ENABLEbm = $01;
  83. // ADC Freerun mode
  84. FREERUNbm = $02;
  85. // ADC_RESSEL
  86. RESSELmask = $04;
  87. RESSEL_10BIT = $00;
  88. RESSEL_8BIT = $04;
  89. // Run standby mode
  90. RUNSTBYbm = $80;
  91. // ADC_SAMPNUM
  92. SAMPNUMmask = $07;
  93. SAMPNUM_ACC1 = $00;
  94. SAMPNUM_ACC2 = $01;
  95. SAMPNUM_ACC4 = $02;
  96. SAMPNUM_ACC8 = $03;
  97. SAMPNUM_ACC16 = $04;
  98. SAMPNUM_ACC32 = $05;
  99. SAMPNUM_ACC64 = $06;
  100. // ADC_PRESC
  101. PRESCmask = $07;
  102. PRESC_DIV2 = $00;
  103. PRESC_DIV4 = $01;
  104. PRESC_DIV8 = $02;
  105. PRESC_DIV16 = $03;
  106. PRESC_DIV32 = $04;
  107. PRESC_DIV64 = $05;
  108. PRESC_DIV128 = $06;
  109. PRESC_DIV256 = $07;
  110. // ADC_REFSEL
  111. REFSELmask = $30;
  112. REFSEL_INTREF = $00;
  113. REFSEL_VDDREF = $10;
  114. // Sample Capacitance Selection
  115. SAMPCAPbm = $40;
  116. // ADC_ASDV
  117. ASDVmask = $10;
  118. ASDV_ASVOFF = $00;
  119. ASDV_ASVON = $10;
  120. // ADC_INITDLY
  121. INITDLYmask = $E0;
  122. INITDLY_DLY0 = $00;
  123. INITDLY_DLY16 = $20;
  124. INITDLY_DLY32 = $40;
  125. INITDLY_DLY64 = $60;
  126. INITDLY_DLY128 = $80;
  127. INITDLY_DLY256 = $A0;
  128. // Sampling Delay Selection
  129. SAMPDLY0bm = $01;
  130. SAMPDLY1bm = $02;
  131. SAMPDLY2bm = $04;
  132. SAMPDLY3bm = $08;
  133. // ADC_WINCM
  134. WINCMmask = $07;
  135. WINCM_NONE = $00;
  136. WINCM_BELOW = $01;
  137. WINCM_ABOVE = $02;
  138. WINCM_INSIDE = $03;
  139. WINCM_OUTSIDE = $04;
  140. // Debug run
  141. DBGRUNbm = $01;
  142. // Start Event Input Enable
  143. STARTEIbm = $01;
  144. // Result Ready Interrupt Enable
  145. RESRDYbm = $01;
  146. // Window Comparator Interrupt Enable
  147. WCMPbm = $02;
  148. // ADC_MUXPOS
  149. MUXPOSmask = $1F;
  150. MUXPOS_AIN0 = $00;
  151. MUXPOS_AIN1 = $01;
  152. MUXPOS_AIN2 = $02;
  153. MUXPOS_AIN3 = $03;
  154. MUXPOS_AIN4 = $04;
  155. MUXPOS_AIN5 = $05;
  156. MUXPOS_AIN6 = $06;
  157. MUXPOS_AIN7 = $07;
  158. MUXPOS_AIN8 = $08;
  159. MUXPOS_AIN9 = $09;
  160. MUXPOS_AIN10 = $0A;
  161. MUXPOS_AIN11 = $0B;
  162. MUXPOS_DAC0 = $1C;
  163. MUXPOS_INTREF = $1D;
  164. MUXPOS_TEMPSENSE = $1E;
  165. MUXPOS_GND = $1F;
  166. // Sample lenght
  167. SAMPLEN0bm = $01;
  168. SAMPLEN1bm = $02;
  169. SAMPLEN2bm = $04;
  170. SAMPLEN3bm = $08;
  171. SAMPLEN4bm = $10;
  172. // Temporary
  173. TEMP0bm = $01;
  174. TEMP1bm = $02;
  175. TEMP2bm = $04;
  176. TEMP3bm = $08;
  177. TEMP4bm = $10;
  178. TEMP5bm = $20;
  179. TEMP6bm = $40;
  180. TEMP7bm = $80;
  181. end;
  182. TBOD = object //Bod interface
  183. CTRLA: byte; //Control A
  184. CTRLB: byte; //Control B
  185. Reserved2: byte;
  186. Reserved3: byte;
  187. Reserved4: byte;
  188. Reserved5: byte;
  189. Reserved6: byte;
  190. Reserved7: byte;
  191. VLMCTRLA: byte; //Voltage level monitor Control
  192. INTCTRL: byte; //Voltage level monitor interrupt Control
  193. INTFLAGS: byte; //Voltage level monitor interrupt Flags
  194. STATUS: byte; //Voltage level monitor status
  195. const
  196. // BOD_ACTIVE
  197. ACTIVEmask = $0C;
  198. ACTIVE_DIS = $00;
  199. ACTIVE_ENABLED = $04;
  200. ACTIVE_SAMPLED = $08;
  201. ACTIVE_ENWAKE = $0C;
  202. // BOD_SAMPFREQ
  203. SAMPFREQmask = $10;
  204. SAMPFREQ_1KHZ = $00;
  205. SAMPFREQ_125Hz = $10;
  206. // BOD_SLEEP
  207. SLEEPmask = $03;
  208. SLEEP_DIS = $00;
  209. SLEEP_ENABLED = $01;
  210. SLEEP_SAMPLED = $02;
  211. // BOD_LVL
  212. LVLmask = $07;
  213. LVL_BODLEVEL0 = $00;
  214. LVL_BODLEVEL1 = $01;
  215. LVL_BODLEVEL2 = $02;
  216. LVL_BODLEVEL3 = $03;
  217. LVL_BODLEVEL4 = $04;
  218. LVL_BODLEVEL5 = $05;
  219. LVL_BODLEVEL6 = $06;
  220. LVL_BODLEVEL7 = $07;
  221. // BOD_VLMCFG
  222. VLMCFGmask = $06;
  223. VLMCFG_BELOW = $00;
  224. VLMCFG_ABOVE = $02;
  225. VLMCFG_CROSS = $04;
  226. // voltage level monitor interrrupt enable
  227. VLMIEbm = $01;
  228. // Voltage level monitor interrupt flag
  229. VLMIFbm = $01;
  230. // Voltage level monitor status
  231. VLMSbm = $01;
  232. // BOD_VLMLVL
  233. VLMLVLmask = $03;
  234. VLMLVL_5ABOVE = $00;
  235. VLMLVL_15ABOVE = $01;
  236. VLMLVL_25ABOVE = $02;
  237. end;
  238. TCCL = object //Configurable Custom Logic
  239. CTRLA: byte; //Control Register A
  240. SEQCTRL0: byte; //Sequential Control 0
  241. Reserved2: byte;
  242. Reserved3: byte;
  243. Reserved4: byte;
  244. LUT0CTRLA: byte; //LUT Control 0 A
  245. LUT0CTRLB: byte; //LUT Control 0 B
  246. LUT0CTRLC: byte; //LUT Control 0 C
  247. TRUTH0: byte; //Truth 0
  248. LUT1CTRLA: byte; //LUT Control 1 A
  249. LUT1CTRLB: byte; //LUT Control 1 B
  250. LUT1CTRLC: byte; //LUT Control 1 C
  251. TRUTH1: byte; //Truth 1
  252. const
  253. // Enable
  254. ENABLEbm = $01;
  255. // Run in Standby
  256. RUNSTDBYbm = $40;
  257. // Clock Source Selection
  258. CLKSRCbm = $40;
  259. // CCL_EDGEDET
  260. EDGEDETmask = $80;
  261. EDGEDET_DIS = $00;
  262. EDGEDET_EN = $80;
  263. // CCL_FILTSEL
  264. FILTSELmask = $30;
  265. FILTSEL_DISABLE = $00;
  266. FILTSEL_SYNCH = $10;
  267. FILTSEL_FILTER = $20;
  268. // Output Enable
  269. OUTENbm = $08;
  270. // CCL_INSEL0
  271. INSEL0mask = $0F;
  272. INSEL0_MASK = $00;
  273. INSEL0_FEEDBACK = $01;
  274. INSEL0_LINK = $02;
  275. INSEL0_EVENT0 = $03;
  276. INSEL0_EVENT1 = $04;
  277. INSEL0_IO = $05;
  278. INSEL0_AC0 = $06;
  279. INSEL0_TCB0 = $07;
  280. INSEL0_TCA0 = $08;
  281. INSEL0_TCD0 = $09;
  282. INSEL0_USART0 = $0A;
  283. INSEL0_SPI0 = $0B;
  284. // CCL_INSEL1
  285. INSEL1mask = $F0;
  286. INSEL1_MASK = $00;
  287. INSEL1_FEEDBACK = $10;
  288. INSEL1_LINK = $20;
  289. INSEL1_EVENT0 = $30;
  290. INSEL1_EVENT1 = $40;
  291. INSEL1_IO = $50;
  292. INSEL1_AC0 = $60;
  293. INSEL1_TCB0 = $70;
  294. INSEL1_TCA0 = $80;
  295. INSEL1_TCD0 = $90;
  296. INSEL1_USART0 = $A0;
  297. INSEL1_SPI0 = $B0;
  298. // CCL_INSEL2
  299. INSEL2mask = $0F;
  300. INSEL2_MASK = $00;
  301. INSEL2_FEEDBACK = $01;
  302. INSEL2_LINK = $02;
  303. INSEL2_EVENT0 = $03;
  304. INSEL2_EVENT1 = $04;
  305. INSEL2_IO = $05;
  306. INSEL2_AC0 = $06;
  307. INSEL2_TCB0 = $07;
  308. INSEL2_TCA0 = $08;
  309. INSEL2_TCD0 = $09;
  310. INSEL2_SPI0 = $0B;
  311. // CCL_SEQSEL
  312. SEQSELmask = $07;
  313. SEQSEL_DISABLE = $00;
  314. SEQSEL_DFF = $01;
  315. SEQSEL_JK = $02;
  316. SEQSEL_LATCH = $03;
  317. SEQSEL_RS = $04;
  318. end;
  319. TCLKCTRL = object //Clock controller
  320. MCLKCTRLA: byte; //MCLK Control A
  321. MCLKCTRLB: byte; //MCLK Control B
  322. MCLKLOCK: byte; //MCLK Lock
  323. MCLKSTATUS: byte; //MCLK Status
  324. Reserved4: byte;
  325. Reserved5: byte;
  326. Reserved6: byte;
  327. Reserved7: byte;
  328. Reserved8: byte;
  329. Reserved9: byte;
  330. Reserved10: byte;
  331. Reserved11: byte;
  332. Reserved12: byte;
  333. Reserved13: byte;
  334. Reserved14: byte;
  335. Reserved15: byte;
  336. OSC20MCTRLA: byte; //OSC20M Control A
  337. OSC20MCALIBA: byte; //OSC20M Calibration A
  338. OSC20MCALIBB: byte; //OSC20M Calibration B
  339. Reserved19: byte;
  340. Reserved20: byte;
  341. Reserved21: byte;
  342. Reserved22: byte;
  343. Reserved23: byte;
  344. OSC32KCTRLA: byte; //OSC32K Control A
  345. Reserved25: byte;
  346. Reserved26: byte;
  347. Reserved27: byte;
  348. XOSC32KCTRLA: byte; //XOSC32K Control A
  349. const
  350. // System clock out
  351. CLKOUTbm = $80;
  352. // CLKCTRL_CLKSEL
  353. CLKSELmask = $03;
  354. CLKSEL_OSC20M = $00;
  355. CLKSEL_OSCULP32K = $01;
  356. CLKSEL_XOSC32K = $02;
  357. CLKSEL_EXTCLK = $03;
  358. // CLKCTRL_PDIV
  359. PDIVmask = $1E;
  360. PDIV_2X = $00;
  361. PDIV_4X = $02;
  362. PDIV_8X = $04;
  363. PDIV_16X = $06;
  364. PDIV_32X = $08;
  365. PDIV_64X = $0A;
  366. PDIV_6X = $10;
  367. PDIV_10X = $12;
  368. PDIV_12X = $14;
  369. PDIV_24X = $16;
  370. PDIV_48X = $18;
  371. // Prescaler enable
  372. PENbm = $01;
  373. // lock ebable
  374. LOCKENbm = $01;
  375. // External Clock status
  376. EXTSbm = $80;
  377. // 20MHz oscillator status
  378. OSC20MSbm = $10;
  379. // 32KHz oscillator status
  380. OSC32KSbm = $20;
  381. // System Oscillator changing
  382. SOSCbm = $01;
  383. // 32.768 kHz Crystal Oscillator status
  384. XOSC32KSbm = $40;
  385. // Calibration
  386. CAL20M0bm = $01;
  387. CAL20M1bm = $02;
  388. CAL20M2bm = $04;
  389. CAL20M3bm = $08;
  390. CAL20M4bm = $10;
  391. CAL20M5bm = $20;
  392. // Lock
  393. LOCKbm = $80;
  394. // Oscillator temperature coefficient
  395. TEMPCAL20M0bm = $01;
  396. TEMPCAL20M1bm = $02;
  397. TEMPCAL20M2bm = $04;
  398. TEMPCAL20M3bm = $08;
  399. // Run standby
  400. RUNSTDBYbm = $02;
  401. // CLKCTRL_CSUT
  402. CSUTmask = $30;
  403. CSUT_1K = $00;
  404. CSUT_16K = $10;
  405. CSUT_32K = $20;
  406. CSUT_64K = $30;
  407. // Enable
  408. ENABLEbm = $01;
  409. // Select
  410. SELbm = $04;
  411. end;
  412. TCPU = object //CPU
  413. Reserved0: byte;
  414. Reserved1: byte;
  415. Reserved2: byte;
  416. Reserved3: byte;
  417. CCP: byte; //Configuration Change Protection
  418. Reserved5: byte;
  419. Reserved6: byte;
  420. Reserved7: byte;
  421. Reserved8: byte;
  422. Reserved9: byte;
  423. Reserved10: byte;
  424. Reserved11: byte;
  425. Reserved12: byte;
  426. SPL: byte; //Stack Pointer Low
  427. SPH: byte; //Stack Pointer High
  428. SREG: byte; //Status Register
  429. const
  430. // CPU_CCP
  431. CCPmask = $FF;
  432. CCP_SPM = $9D;
  433. CCP_IOREG = $D8;
  434. // Carry Flag
  435. Cbm = $01;
  436. // Half Carry Flag
  437. Hbm = $20;
  438. // Global Interrupt Enable Flag
  439. Ibm = $80;
  440. // Negative Flag
  441. Nbm = $04;
  442. // N Exclusive Or V Flag
  443. Sbm = $10;
  444. // Transfer Bit
  445. Tbm = $40;
  446. // Two's Complement Overflow Flag
  447. Vbm = $08;
  448. // Zero Flag
  449. Zbm = $02;
  450. end;
  451. TCPUINT = object //Interrupt Controller
  452. CTRLA: byte; //Control A
  453. STATUS: byte; //Status
  454. LVL0PRI: byte; //Interrupt Level 0 Priority
  455. LVL1VEC: byte; //Interrupt Level 1 Priority Vector
  456. const
  457. // Compact Vector Table
  458. CVTbm = $20;
  459. // Interrupt Vector Select
  460. IVSELbm = $40;
  461. // Round-robin Scheduling Enable
  462. LVL0RRbm = $01;
  463. // Interrupt Level Priority
  464. LVL0PRI0bm = $01;
  465. LVL0PRI1bm = $02;
  466. LVL0PRI2bm = $04;
  467. LVL0PRI3bm = $08;
  468. LVL0PRI4bm = $10;
  469. LVL0PRI5bm = $20;
  470. LVL0PRI6bm = $40;
  471. LVL0PRI7bm = $80;
  472. // Interrupt Vector with High Priority
  473. LVL1VEC0bm = $01;
  474. LVL1VEC1bm = $02;
  475. LVL1VEC2bm = $04;
  476. LVL1VEC3bm = $08;
  477. LVL1VEC4bm = $10;
  478. LVL1VEC5bm = $20;
  479. LVL1VEC6bm = $40;
  480. LVL1VEC7bm = $80;
  481. // Level 0 Interrupt Executing
  482. LVL0EXbm = $01;
  483. // Level 1 Interrupt Executing
  484. LVL1EXbm = $02;
  485. // Non-maskable Interrupt Executing
  486. NMIEXbm = $80;
  487. end;
  488. TCRCSCAN = object //CRCSCAN
  489. CTRLA: byte; //Control A
  490. CTRLB: byte; //Control B
  491. STATUS: byte; //Status
  492. const
  493. // Enable CRC scan
  494. ENABLEbm = $01;
  495. // Enable NMI Trigger
  496. NMIENbm = $02;
  497. // Reset CRC scan
  498. RESETbm = $80;
  499. // CRCSCAN_MODE
  500. MODEmask = $30;
  501. MODE_PRIORITY = $00;
  502. MODE_RESERVED = $10;
  503. MODE_BACKGROUND = $20;
  504. MODE_CONTINUOUS = $30;
  505. // CRCSCAN_SRC
  506. SRCmask = $03;
  507. SRC_FLASH = $00;
  508. SRC_APPLICATION = $01;
  509. SRC_BOOT = $02;
  510. // CRC Busy
  511. BUSYbm = $01;
  512. // CRC Ok
  513. OKbm = $02;
  514. end;
  515. TDAC = object //Digital to Analog Converter
  516. CTRLA: byte; //Control Register A
  517. DATA: byte; //DATA Register
  518. const
  519. // DAC Enable
  520. ENABLEbm = $01;
  521. // Output Buffer Enable
  522. OUTENbm = $40;
  523. // Run in Standby Mode
  524. RUNSTDBYbm = $80;
  525. end;
  526. TEVSYS = object //Event System
  527. ASYNCSTROBE: byte; //Asynchronous Channel Strobe
  528. SYNCSTROBE: byte; //Synchronous Channel Strobe
  529. ASYNCCH0: byte; //Asynchronous Channel 0 Generator Selection
  530. ASYNCCH1: byte; //Asynchronous Channel 1 Generator Selection
  531. ASYNCCH2: byte; //Asynchronous Channel 2 Generator Selection
  532. ASYNCCH3: byte; //Asynchronous Channel 3 Generator Selection
  533. Reserved6: byte;
  534. Reserved7: byte;
  535. Reserved8: byte;
  536. Reserved9: byte;
  537. SYNCCH0: byte; //Synchronous Channel 0 Generator Selection
  538. SYNCCH1: byte; //Synchronous Channel 1 Generator Selection
  539. Reserved12: byte;
  540. Reserved13: byte;
  541. Reserved14: byte;
  542. Reserved15: byte;
  543. Reserved16: byte;
  544. Reserved17: byte;
  545. ASYNCUSER0: byte; //Asynchronous User Ch 0 Input Selection - TCB0
  546. ASYNCUSER1: byte; //Asynchronous User Ch 1 Input Selection - ADC0
  547. ASYNCUSER2: byte; //Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  548. ASYNCUSER3: byte; //Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  549. ASYNCUSER4: byte; //Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  550. ASYNCUSER5: byte; //Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  551. ASYNCUSER6: byte; //Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  552. ASYNCUSER7: byte; //Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  553. ASYNCUSER8: byte; //Asynchronous User Ch 8 Input Selection - Event Out 0
  554. ASYNCUSER9: byte; //Asynchronous User Ch 9 Input Selection - Event Out 1
  555. ASYNCUSER10: byte; //Asynchronous User Ch 10 Input Selection - Event Out 2
  556. Reserved29: byte;
  557. Reserved30: byte;
  558. Reserved31: byte;
  559. Reserved32: byte;
  560. Reserved33: byte;
  561. SYNCUSER0: byte; //Synchronous User Ch 0 Input Selection - TCA0
  562. SYNCUSER1: byte; //Synchronous User Ch 1 Input Selection - USART0
  563. const
  564. // EVSYS_ASYNCCH0
  565. ASYNCCH0mask = $FF;
  566. ASYNCCH0_OFF = $00;
  567. ASYNCCH0_CCL_LUT0 = $01;
  568. ASYNCCH0_CCL_LUT1 = $02;
  569. ASYNCCH0_AC0_OUT = $03;
  570. ASYNCCH0_TCD0_CMPBCLR = $04;
  571. ASYNCCH0_TCD0_CMPASET = $05;
  572. ASYNCCH0_TCD0_CMPBSET = $06;
  573. ASYNCCH0_TCD0_PROGEV = $07;
  574. ASYNCCH0_RTC_OVF = $08;
  575. ASYNCCH0_RTC_CMP = $09;
  576. ASYNCCH0_PORTA_PIN0 = $0A;
  577. ASYNCCH0_PORTA_PIN1 = $0B;
  578. ASYNCCH0_PORTA_PIN2 = $0C;
  579. ASYNCCH0_PORTA_PIN3 = $0D;
  580. ASYNCCH0_PORTA_PIN4 = $0E;
  581. ASYNCCH0_PORTA_PIN5 = $0F;
  582. ASYNCCH0_PORTA_PIN6 = $10;
  583. ASYNCCH0_PORTA_PIN7 = $11;
  584. ASYNCCH0_UPDI = $12;
  585. // EVSYS_ASYNCCH1
  586. ASYNCCH1mask = $FF;
  587. ASYNCCH1_OFF = $00;
  588. ASYNCCH1_CCL_LUT0 = $01;
  589. ASYNCCH1_CCL_LUT1 = $02;
  590. ASYNCCH1_AC0_OUT = $03;
  591. ASYNCCH1_TCD0_CMPBCLR = $04;
  592. ASYNCCH1_TCD0_CMPASET = $05;
  593. ASYNCCH1_TCD0_CMPBSET = $06;
  594. ASYNCCH1_TCD0_PROGEV = $07;
  595. ASYNCCH1_RTC_OVF = $08;
  596. ASYNCCH1_RTC_CMP = $09;
  597. ASYNCCH1_PORTB_PIN0 = $0A;
  598. ASYNCCH1_PORTB_PIN1 = $0B;
  599. ASYNCCH1_PORTB_PIN2 = $0C;
  600. ASYNCCH1_PORTB_PIN3 = $0D;
  601. ASYNCCH1_PORTB_PIN4 = $0E;
  602. ASYNCCH1_PORTB_PIN5 = $0F;
  603. ASYNCCH1_PORTB_PIN6 = $10;
  604. ASYNCCH1_PORTB_PIN7 = $11;
  605. // EVSYS_ASYNCCH2
  606. ASYNCCH2mask = $FF;
  607. ASYNCCH2_OFF = $00;
  608. ASYNCCH2_CCL_LUT0 = $01;
  609. ASYNCCH2_CCL_LUT1 = $02;
  610. ASYNCCH2_AC0_OUT = $03;
  611. ASYNCCH2_TCD0_CMPBCLR = $04;
  612. ASYNCCH2_TCD0_CMPASET = $05;
  613. ASYNCCH2_TCD0_CMPBSET = $06;
  614. ASYNCCH2_TCD0_PROGEV = $07;
  615. ASYNCCH2_RTC_OVF = $08;
  616. ASYNCCH2_RTC_CMP = $09;
  617. ASYNCCH2_PORTC_PIN0 = $0A;
  618. ASYNCCH2_PORTC_PIN1 = $0B;
  619. ASYNCCH2_PORTC_PIN2 = $0C;
  620. ASYNCCH2_PORTC_PIN3 = $0D;
  621. ASYNCCH2_PORTC_PIN4 = $0E;
  622. ASYNCCH2_PORTC_PIN5 = $0F;
  623. // EVSYS_ASYNCCH3
  624. ASYNCCH3mask = $FF;
  625. ASYNCCH3_OFF = $00;
  626. ASYNCCH3_CCL_LUT0 = $01;
  627. ASYNCCH3_CCL_LUT1 = $02;
  628. ASYNCCH3_AC0_OUT = $03;
  629. ASYNCCH3_TCD0_CMPBCLR = $04;
  630. ASYNCCH3_TCD0_CMPASET = $05;
  631. ASYNCCH3_TCD0_CMPBSET = $06;
  632. ASYNCCH3_TCD0_PROGEV = $07;
  633. ASYNCCH3_RTC_OVF = $08;
  634. ASYNCCH3_RTC_CMP = $09;
  635. ASYNCCH3_PIT_DIV8192 = $0A;
  636. ASYNCCH3_PIT_DIV4096 = $0B;
  637. ASYNCCH3_PIT_DIV2048 = $0C;
  638. ASYNCCH3_PIT_DIV1024 = $0D;
  639. ASYNCCH3_PIT_DIV512 = $0E;
  640. ASYNCCH3_PIT_DIV256 = $0F;
  641. ASYNCCH3_PIT_DIV128 = $10;
  642. ASYNCCH3_PIT_DIV64 = $11;
  643. // EVSYS_ASYNCUSER0
  644. ASYNCUSER0mask = $FF;
  645. ASYNCUSER0_OFF = $00;
  646. ASYNCUSER0_SYNCCH0 = $01;
  647. ASYNCUSER0_SYNCCH1 = $02;
  648. ASYNCUSER0_ASYNCCH0 = $03;
  649. ASYNCUSER0_ASYNCCH1 = $04;
  650. ASYNCUSER0_ASYNCCH2 = $05;
  651. ASYNCUSER0_ASYNCCH3 = $06;
  652. // EVSYS_ASYNCUSER1
  653. ASYNCUSER1mask = $FF;
  654. ASYNCUSER1_OFF = $00;
  655. ASYNCUSER1_SYNCCH0 = $01;
  656. ASYNCUSER1_SYNCCH1 = $02;
  657. ASYNCUSER1_ASYNCCH0 = $03;
  658. ASYNCUSER1_ASYNCCH1 = $04;
  659. ASYNCUSER1_ASYNCCH2 = $05;
  660. ASYNCUSER1_ASYNCCH3 = $06;
  661. // EVSYS_ASYNCUSER2
  662. ASYNCUSER2mask = $FF;
  663. ASYNCUSER2_OFF = $00;
  664. ASYNCUSER2_SYNCCH0 = $01;
  665. ASYNCUSER2_SYNCCH1 = $02;
  666. ASYNCUSER2_ASYNCCH0 = $03;
  667. ASYNCUSER2_ASYNCCH1 = $04;
  668. ASYNCUSER2_ASYNCCH2 = $05;
  669. ASYNCUSER2_ASYNCCH3 = $06;
  670. // EVSYS_ASYNCUSER3
  671. ASYNCUSER3mask = $FF;
  672. ASYNCUSER3_OFF = $00;
  673. ASYNCUSER3_SYNCCH0 = $01;
  674. ASYNCUSER3_SYNCCH1 = $02;
  675. ASYNCUSER3_ASYNCCH0 = $03;
  676. ASYNCUSER3_ASYNCCH1 = $04;
  677. ASYNCUSER3_ASYNCCH2 = $05;
  678. ASYNCUSER3_ASYNCCH3 = $06;
  679. // EVSYS_ASYNCUSER4
  680. ASYNCUSER4mask = $FF;
  681. ASYNCUSER4_OFF = $00;
  682. ASYNCUSER4_SYNCCH0 = $01;
  683. ASYNCUSER4_SYNCCH1 = $02;
  684. ASYNCUSER4_ASYNCCH0 = $03;
  685. ASYNCUSER4_ASYNCCH1 = $04;
  686. ASYNCUSER4_ASYNCCH2 = $05;
  687. ASYNCUSER4_ASYNCCH3 = $06;
  688. // EVSYS_ASYNCUSER5
  689. ASYNCUSER5mask = $FF;
  690. ASYNCUSER5_OFF = $00;
  691. ASYNCUSER5_SYNCCH0 = $01;
  692. ASYNCUSER5_SYNCCH1 = $02;
  693. ASYNCUSER5_ASYNCCH0 = $03;
  694. ASYNCUSER5_ASYNCCH1 = $04;
  695. ASYNCUSER5_ASYNCCH2 = $05;
  696. ASYNCUSER5_ASYNCCH3 = $06;
  697. // EVSYS_ASYNCUSER6
  698. ASYNCUSER6mask = $FF;
  699. ASYNCUSER6_OFF = $00;
  700. ASYNCUSER6_SYNCCH0 = $01;
  701. ASYNCUSER6_SYNCCH1 = $02;
  702. ASYNCUSER6_ASYNCCH0 = $03;
  703. ASYNCUSER6_ASYNCCH1 = $04;
  704. ASYNCUSER6_ASYNCCH2 = $05;
  705. ASYNCUSER6_ASYNCCH3 = $06;
  706. // EVSYS_ASYNCUSER7
  707. ASYNCUSER7mask = $FF;
  708. ASYNCUSER7_OFF = $00;
  709. ASYNCUSER7_SYNCCH0 = $01;
  710. ASYNCUSER7_SYNCCH1 = $02;
  711. ASYNCUSER7_ASYNCCH0 = $03;
  712. ASYNCUSER7_ASYNCCH1 = $04;
  713. ASYNCUSER7_ASYNCCH2 = $05;
  714. ASYNCUSER7_ASYNCCH3 = $06;
  715. // EVSYS_ASYNCUSER8
  716. ASYNCUSER8mask = $FF;
  717. ASYNCUSER8_OFF = $00;
  718. ASYNCUSER8_SYNCCH0 = $01;
  719. ASYNCUSER8_SYNCCH1 = $02;
  720. ASYNCUSER8_ASYNCCH0 = $03;
  721. ASYNCUSER8_ASYNCCH1 = $04;
  722. ASYNCUSER8_ASYNCCH2 = $05;
  723. ASYNCUSER8_ASYNCCH3 = $06;
  724. // EVSYS_ASYNCUSER9
  725. ASYNCUSER9mask = $FF;
  726. ASYNCUSER9_OFF = $00;
  727. ASYNCUSER9_SYNCCH0 = $01;
  728. ASYNCUSER9_SYNCCH1 = $02;
  729. ASYNCUSER9_ASYNCCH0 = $03;
  730. ASYNCUSER9_ASYNCCH1 = $04;
  731. ASYNCUSER9_ASYNCCH2 = $05;
  732. ASYNCUSER9_ASYNCCH3 = $06;
  733. // EVSYS_ASYNCUSER10
  734. ASYNCUSER10mask = $FF;
  735. ASYNCUSER10_OFF = $00;
  736. ASYNCUSER10_SYNCCH0 = $01;
  737. ASYNCUSER10_SYNCCH1 = $02;
  738. ASYNCUSER10_ASYNCCH0 = $03;
  739. ASYNCUSER10_ASYNCCH1 = $04;
  740. ASYNCUSER10_ASYNCCH2 = $05;
  741. ASYNCUSER10_ASYNCCH3 = $06;
  742. // EVSYS_SYNCCH0
  743. SYNCCH0mask = $FF;
  744. SYNCCH0_OFF = $00;
  745. SYNCCH0_TCB0 = $01;
  746. SYNCCH0_TCA0_OVF_LUNF = $02;
  747. SYNCCH0_TCA0_HUNF = $03;
  748. SYNCCH0_TCA0_CMP0 = $04;
  749. SYNCCH0_TCA0_CMP1 = $05;
  750. SYNCCH0_TCA0_CMP2 = $06;
  751. SYNCCH0_PORTC_PIN0 = $07;
  752. SYNCCH0_PORTC_PIN1 = $08;
  753. SYNCCH0_PORTC_PIN2 = $09;
  754. SYNCCH0_PORTC_PIN3 = $0A;
  755. SYNCCH0_PORTC_PIN4 = $0B;
  756. SYNCCH0_PORTC_PIN5 = $0C;
  757. SYNCCH0_PORTA_PIN0 = $0D;
  758. SYNCCH0_PORTA_PIN1 = $0E;
  759. SYNCCH0_PORTA_PIN2 = $0F;
  760. SYNCCH0_PORTA_PIN3 = $10;
  761. SYNCCH0_PORTA_PIN4 = $11;
  762. SYNCCH0_PORTA_PIN5 = $12;
  763. SYNCCH0_PORTA_PIN6 = $13;
  764. SYNCCH0_PORTA_PIN7 = $14;
  765. // EVSYS_SYNCCH1
  766. SYNCCH1mask = $FF;
  767. SYNCCH1_OFF = $00;
  768. SYNCCH1_TCB0 = $01;
  769. SYNCCH1_TCA0_OVF_LUNF = $02;
  770. SYNCCH1_TCA0_HUNF = $03;
  771. SYNCCH1_TCA0_CMP0 = $04;
  772. SYNCCH1_TCA0_CMP1 = $05;
  773. SYNCCH1_TCA0_CMP2 = $06;
  774. SYNCCH1_PORTB_PIN0 = $08;
  775. SYNCCH1_PORTB_PIN1 = $09;
  776. SYNCCH1_PORTB_PIN2 = $0A;
  777. SYNCCH1_PORTB_PIN3 = $0B;
  778. SYNCCH1_PORTB_PIN4 = $0C;
  779. SYNCCH1_PORTB_PIN5 = $0D;
  780. SYNCCH1_PORTB_PIN6 = $0E;
  781. SYNCCH1_PORTB_PIN7 = $0F;
  782. // EVSYS_SYNCUSER0
  783. SYNCUSER0mask = $FF;
  784. SYNCUSER0_OFF = $00;
  785. SYNCUSER0_SYNCCH0 = $01;
  786. SYNCUSER0_SYNCCH1 = $02;
  787. // EVSYS_SYNCUSER1
  788. SYNCUSER1mask = $FF;
  789. SYNCUSER1_OFF = $00;
  790. SYNCUSER1_SYNCCH0 = $01;
  791. SYNCUSER1_SYNCCH1 = $02;
  792. end;
  793. TFUSE = object //Fuses
  794. WDTCFG: byte; //Watchdog Configuration
  795. BODCFG: byte; //BOD Configuration
  796. OSCCFG: byte; //Oscillator Configuration
  797. Reserved3: byte;
  798. TCD0CFG: byte; //TCD0 Configuration
  799. SYSCFG0: byte; //System Configuration 0
  800. SYSCFG1: byte; //System Configuration 1
  801. APPEND: byte; //Application Code Section End
  802. BOOTEND: byte; //Boot Section End
  803. const
  804. // FUSE_ACTIVE
  805. ACTIVEmask = $0C;
  806. ACTIVE_DIS = $00;
  807. ACTIVE_ENABLED = $04;
  808. ACTIVE_SAMPLED = $08;
  809. ACTIVE_ENWAKE = $0C;
  810. // FUSE_LVL
  811. LVLmask = $E0;
  812. LVL_BODLEVEL0 = $00;
  813. LVL_BODLEVEL1 = $20;
  814. LVL_BODLEVEL2 = $40;
  815. LVL_BODLEVEL3 = $60;
  816. LVL_BODLEVEL4 = $80;
  817. LVL_BODLEVEL5 = $A0;
  818. LVL_BODLEVEL6 = $C0;
  819. LVL_BODLEVEL7 = $E0;
  820. // FUSE_SAMPFREQ
  821. SAMPFREQmask = $10;
  822. SAMPFREQ_1KHz = $00;
  823. SAMPFREQ_125Hz = $10;
  824. // FUSE_SLEEP
  825. SLEEPmask = $03;
  826. SLEEP_DIS = $00;
  827. SLEEP_ENABLED = $01;
  828. SLEEP_SAMPLED = $02;
  829. // FUSE_FREQSEL
  830. FREQSELmask = $03;
  831. FREQSEL_16MHZ = $01;
  832. FREQSEL_20MHZ = $02;
  833. // Oscillator Lock
  834. OSCLOCKbm = $80;
  835. // FUSE_CRCSRC
  836. CRCSRCmask = $C0;
  837. CRCSRC_FLASH = $00;
  838. CRCSRC_BOOT = $40;
  839. CRCSRC_BOOTAPP = $80;
  840. CRCSRC_NOCRC = $C0;
  841. // EEPROM Save
  842. EESAVEbm = $01;
  843. // FUSE_RSTPINCFG
  844. RSTPINCFGmask = $0C;
  845. RSTPINCFG_GPIO = $00;
  846. RSTPINCFG_UPDI = $04;
  847. RSTPINCFG_RST = $08;
  848. // FUSE_SUT
  849. SUTmask = $07;
  850. SUT_0MS = $00;
  851. SUT_1MS = $01;
  852. SUT_2MS = $02;
  853. SUT_4MS = $03;
  854. SUT_8MS = $04;
  855. SUT_16MS = $05;
  856. SUT_32MS = $06;
  857. SUT_64MS = $07;
  858. // Compare A Default Output Value
  859. CMPAbm = $01;
  860. // Compare A Output Enable
  861. CMPAENbm = $10;
  862. // Compare B Default Output Value
  863. CMPBbm = $02;
  864. // Compare B Output Enable
  865. CMPBENbm = $20;
  866. // Compare C Default Output Value
  867. CMPCbm = $04;
  868. // Compare C Output Enable
  869. CMPCENbm = $40;
  870. // Compare D Default Output Value
  871. CMPDbm = $08;
  872. // Compare D Output Enable
  873. CMPDENbm = $80;
  874. // FUSE_PERIOD
  875. PERIODmask = $0F;
  876. PERIOD_OFF = $00;
  877. PERIOD_8CLK = $01;
  878. PERIOD_16CLK = $02;
  879. PERIOD_32CLK = $03;
  880. PERIOD_64CLK = $04;
  881. PERIOD_128CLK = $05;
  882. PERIOD_256CLK = $06;
  883. PERIOD_512CLK = $07;
  884. PERIOD_1KCLK = $08;
  885. PERIOD_2KCLK = $09;
  886. PERIOD_4KCLK = $0A;
  887. PERIOD_8KCLK = $0B;
  888. // FUSE_WINDOW
  889. WINDOWmask = $F0;
  890. WINDOW_OFF = $00;
  891. WINDOW_8CLK = $10;
  892. WINDOW_16CLK = $20;
  893. WINDOW_32CLK = $30;
  894. WINDOW_64CLK = $40;
  895. WINDOW_128CLK = $50;
  896. WINDOW_256CLK = $60;
  897. WINDOW_512CLK = $70;
  898. WINDOW_1KCLK = $80;
  899. WINDOW_2KCLK = $90;
  900. WINDOW_4KCLK = $A0;
  901. WINDOW_8KCLK = $B0;
  902. end;
  903. TGPIO = object //General Purpose IO
  904. GPIOR0: byte; //General Purpose IO Register 0
  905. GPIOR1: byte; //General Purpose IO Register 1
  906. GPIOR2: byte; //General Purpose IO Register 2
  907. GPIOR3: byte; //General Purpose IO Register 3
  908. end;
  909. TLOCKBIT = object //Lockbit
  910. LOCKBIT: byte; //Lock bits
  911. const
  912. // LOCKBIT_LB
  913. LBmask = $FF;
  914. LB_RWLOCK = $3A;
  915. LB_NOLOCK = $C5;
  916. end;
  917. TNVMCTRL = object //Non-volatile Memory Controller
  918. CTRLA: byte; //Control A
  919. CTRLB: byte; //Control B
  920. STATUS: byte; //Status
  921. INTCTRL: byte; //Interrupt Control
  922. INTFLAGS: byte; //Interrupt Flags
  923. Reserved5: byte;
  924. DATA: word; //Data
  925. ADDR: word; //Address
  926. const
  927. // NVMCTRL_CMD
  928. CMDmask = $07;
  929. CMD_NONE = $00;
  930. CMD_PAGEWRITE = $01;
  931. CMD_PAGEERASE = $02;
  932. CMD_PAGEERASEWRITE = $03;
  933. CMD_PAGEBUFCLR = $04;
  934. CMD_CHIPERASE = $05;
  935. CMD_EEERASE = $06;
  936. CMD_FUSEWRITE = $07;
  937. // Application code write protect
  938. APCWPbm = $01;
  939. // Boot Lock
  940. BOOTLOCKbm = $02;
  941. // EEPROM Ready
  942. EEREADYbm = $01;
  943. // EEPROM busy
  944. EEBUSYbm = $02;
  945. // Flash busy
  946. FBUSYbm = $01;
  947. // Write error
  948. WRERRORbm = $04;
  949. end;
  950. TPORT = object //I/O Ports
  951. DIR: byte; //Data Direction
  952. DIRSET: byte; //Data Direction Set
  953. DIRCLR: byte; //Data Direction Clear
  954. DIRTGL: byte; //Data Direction Toggle
  955. OUT_: byte; //Output Value
  956. OUTSET: byte; //Output Value Set
  957. OUTCLR: byte; //Output Value Clear
  958. OUTTGL: byte; //Output Value Toggle
  959. IN_: byte; //Input Value
  960. INTFLAGS: byte; //Interrupt Flags
  961. Reserved10: byte;
  962. Reserved11: byte;
  963. Reserved12: byte;
  964. Reserved13: byte;
  965. Reserved14: byte;
  966. Reserved15: byte;
  967. PIN0CTRL: byte; //Pin 0 Control
  968. PIN1CTRL: byte; //Pin 1 Control
  969. PIN2CTRL: byte; //Pin 2 Control
  970. PIN3CTRL: byte; //Pin 3 Control
  971. PIN4CTRL: byte; //Pin 4 Control
  972. PIN5CTRL: byte; //Pin 5 Control
  973. PIN6CTRL: byte; //Pin 6 Control
  974. PIN7CTRL: byte; //Pin 7 Control
  975. const
  976. // Pin Interrupt
  977. INT0bm = $01;
  978. INT1bm = $02;
  979. INT2bm = $04;
  980. INT3bm = $08;
  981. INT4bm = $10;
  982. INT5bm = $20;
  983. INT6bm = $40;
  984. INT7bm = $80;
  985. // Inverted I/O Enable
  986. INVENbm = $80;
  987. // PORT_ISC
  988. ISCmask = $07;
  989. ISC_INTDISABLE = $00;
  990. ISC_BOTHEDGES = $01;
  991. ISC_RISING = $02;
  992. ISC_FALLING = $03;
  993. ISC_INPUT_DISABLE = $04;
  994. ISC_LEVEL = $05;
  995. // Pullup enable
  996. PULLUPENbm = $08;
  997. end;
  998. TPORTMUX = object //Port Multiplexer
  999. CTRLA: byte; //Port Multiplexer Control A
  1000. CTRLB: byte; //Port Multiplexer Control B
  1001. CTRLC: byte; //Port Multiplexer Control C
  1002. CTRLD: byte; //Port Multiplexer Control D
  1003. const
  1004. // Event Output 0
  1005. EVOUT0bm = $01;
  1006. // Event Output 1
  1007. EVOUT1bm = $02;
  1008. // Event Output 2
  1009. EVOUT2bm = $04;
  1010. // PORTMUX_LUT0
  1011. LUT0mask = $10;
  1012. LUT0_DEFAULT = $00;
  1013. LUT0_ALTERNATE = $10;
  1014. // PORTMUX_LUT1
  1015. LUT1mask = $20;
  1016. LUT1_DEFAULT = $00;
  1017. LUT1_ALTERNATE = $20;
  1018. // PORTMUX_SPI0
  1019. SPI0mask = $04;
  1020. SPI0_DEFAULT = $00;
  1021. SPI0_ALTERNATE = $04;
  1022. // PORTMUX_TWI0
  1023. TWI0mask = $10;
  1024. TWI0_DEFAULT = $00;
  1025. TWI0_ALTERNATE = $10;
  1026. // PORTMUX_USART0
  1027. USART0mask = $01;
  1028. USART0_DEFAULT = $00;
  1029. USART0_ALTERNATE = $01;
  1030. // PORTMUX_TCA00
  1031. TCA00mask = $01;
  1032. TCA00_DEFAULT = $00;
  1033. TCA00_ALTERNATE = $01;
  1034. // PORTMUX_TCA01
  1035. TCA01mask = $02;
  1036. TCA01_DEFAULT = $00;
  1037. TCA01_ALTERNATE = $02;
  1038. // PORTMUX_TCA02
  1039. TCA02mask = $04;
  1040. TCA02_DEFAULT = $00;
  1041. TCA02_ALTERNATE = $04;
  1042. // PORTMUX_TCA03
  1043. TCA03mask = $08;
  1044. TCA03_DEFAULT = $00;
  1045. TCA03_ALTERNATE = $08;
  1046. // PORTMUX_TCA04
  1047. TCA04mask = $10;
  1048. TCA04_DEFAULT = $00;
  1049. TCA04_ALTERNATE = $10;
  1050. // PORTMUX_TCA05
  1051. TCA05mask = $20;
  1052. TCA05_DEFAULT = $00;
  1053. TCA05_ALTERNATE = $20;
  1054. // PORTMUX_TCB0
  1055. TCB0mask = $01;
  1056. TCB0_DEFAULT = $00;
  1057. TCB0_ALTERNATE = $01;
  1058. end;
  1059. TRSTCTRL = object //Reset controller
  1060. RSTFR: byte; //Reset Flags
  1061. SWRR: byte; //Software Reset
  1062. const
  1063. // Brown out detector Reset flag
  1064. BORFbm = $02;
  1065. // External Reset flag
  1066. EXTRFbm = $04;
  1067. // Power on Reset flag
  1068. PORFbm = $01;
  1069. // Software Reset flag
  1070. SWRFbm = $10;
  1071. // UPDI Reset flag
  1072. UPDIRFbm = $20;
  1073. // Watch dog Reset flag
  1074. WDRFbm = $08;
  1075. // Software reset enable
  1076. SWREbm = $01;
  1077. end;
  1078. TRTC = object //Real-Time Counter
  1079. CTRLA: byte; //Control A
  1080. STATUS: byte; //Status
  1081. INTCTRL: byte; //Interrupt Control
  1082. INTFLAGS: byte; //Interrupt Flags
  1083. TEMP: byte; //Temporary
  1084. DBGCTRL: byte; //Debug control
  1085. Reserved6: byte;
  1086. CLKSEL: byte; //Clock Select
  1087. CNT: word; //Counter
  1088. PER: word; //Period
  1089. CMP: word; //Compare
  1090. Reserved14: byte;
  1091. Reserved15: byte;
  1092. PITCTRLA: byte; //PIT Control A
  1093. PITSTATUS: byte; //PIT Status
  1094. PITINTCTRL: byte; //PIT Interrupt Control
  1095. PITINTFLAGS: byte; //PIT Interrupt Flags
  1096. Reserved20: byte;
  1097. PITDBGCTRL: byte; //PIT Debug control
  1098. const
  1099. // RTC_CLKSEL
  1100. CLKSELmask = $03;
  1101. CLKSEL_INT32K = $00;
  1102. CLKSEL_INT1K = $01;
  1103. CLKSEL_TOSC32K = $02;
  1104. CLKSEL_EXTCLK = $03;
  1105. // RTC_PRESCALER
  1106. PRESCALERmask = $78;
  1107. PRESCALER_DIV1 = $00;
  1108. PRESCALER_DIV2 = $08;
  1109. PRESCALER_DIV4 = $10;
  1110. PRESCALER_DIV8 = $18;
  1111. PRESCALER_DIV16 = $20;
  1112. PRESCALER_DIV32 = $28;
  1113. PRESCALER_DIV64 = $30;
  1114. PRESCALER_DIV128 = $38;
  1115. PRESCALER_DIV256 = $40;
  1116. PRESCALER_DIV512 = $48;
  1117. PRESCALER_DIV1024 = $50;
  1118. PRESCALER_DIV2048 = $58;
  1119. PRESCALER_DIV4096 = $60;
  1120. PRESCALER_DIV8192 = $68;
  1121. PRESCALER_DIV16384 = $70;
  1122. PRESCALER_DIV32768 = $78;
  1123. // Enable
  1124. RTCENbm = $01;
  1125. // Run In Standby
  1126. RUNSTDBYbm = $80;
  1127. // Run in debug
  1128. DBGRUNbm = $01;
  1129. // Compare Match Interrupt enable
  1130. CMPbm = $02;
  1131. // Overflow Interrupt enable
  1132. OVFbm = $01;
  1133. // RTC_PERIOD
  1134. PERIODmask = $78;
  1135. PERIOD_OFF = $00;
  1136. PERIOD_CYC4 = $08;
  1137. PERIOD_CYC8 = $10;
  1138. PERIOD_CYC16 = $18;
  1139. PERIOD_CYC32 = $20;
  1140. PERIOD_CYC64 = $28;
  1141. PERIOD_CYC128 = $30;
  1142. PERIOD_CYC256 = $38;
  1143. PERIOD_CYC512 = $40;
  1144. PERIOD_CYC1024 = $48;
  1145. PERIOD_CYC2048 = $50;
  1146. PERIOD_CYC4096 = $58;
  1147. PERIOD_CYC8192 = $60;
  1148. PERIOD_CYC16384 = $68;
  1149. PERIOD_CYC32768 = $70;
  1150. // Enable
  1151. PITENbm = $01;
  1152. // Periodic Interrupt
  1153. PIbm = $01;
  1154. // CTRLA Synchronization Busy Flag
  1155. CTRLBUSYbm = $01;
  1156. // Comparator Synchronization Busy Flag
  1157. CMPBUSYbm = $08;
  1158. // Count Synchronization Busy Flag
  1159. CNTBUSYbm = $02;
  1160. // CTRLA Synchronization Busy Flag
  1161. CTRLABUSYbm = $01;
  1162. // Period Synchronization Busy Flag
  1163. PERBUSYbm = $04;
  1164. end;
  1165. TSIGROW = object //Signature row
  1166. DEVICEID0: byte; //Device ID Byte 0
  1167. DEVICEID1: byte; //Device ID Byte 1
  1168. DEVICEID2: byte; //Device ID Byte 2
  1169. SERNUM0: byte; //Serial Number Byte 0
  1170. SERNUM1: byte; //Serial Number Byte 1
  1171. SERNUM2: byte; //Serial Number Byte 2
  1172. SERNUM3: byte; //Serial Number Byte 3
  1173. SERNUM4: byte; //Serial Number Byte 4
  1174. SERNUM5: byte; //Serial Number Byte 5
  1175. SERNUM6: byte; //Serial Number Byte 6
  1176. SERNUM7: byte; //Serial Number Byte 7
  1177. SERNUM8: byte; //Serial Number Byte 8
  1178. SERNUM9: byte; //Serial Number Byte 9
  1179. Reserved13: byte;
  1180. Reserved14: byte;
  1181. Reserved15: byte;
  1182. Reserved16: byte;
  1183. Reserved17: byte;
  1184. Reserved18: byte;
  1185. Reserved19: byte;
  1186. Reserved20: byte;
  1187. Reserved21: byte;
  1188. Reserved22: byte;
  1189. Reserved23: byte;
  1190. Reserved24: byte;
  1191. Reserved25: byte;
  1192. Reserved26: byte;
  1193. Reserved27: byte;
  1194. Reserved28: byte;
  1195. Reserved29: byte;
  1196. Reserved30: byte;
  1197. Reserved31: byte;
  1198. TEMPSENSE0: byte; //Temperature Sensor Calibration Byte 0
  1199. TEMPSENSE1: byte; //Temperature Sensor Calibration Byte 1
  1200. OSC16ERR3V: byte; //OSC16 error at 3V
  1201. OSC16ERR5V: byte; //OSC16 error at 5V
  1202. OSC20ERR3V: byte; //OSC20 error at 3V
  1203. OSC20ERR5V: byte; //OSC20 error at 5V
  1204. end;
  1205. TSLPCTRL = object //Sleep Controller
  1206. CTRLA: byte; //Control
  1207. const
  1208. // Sleep enable
  1209. SENbm = $01;
  1210. // SLPCTRL_SMODE
  1211. SMODEmask = $06;
  1212. SMODE_IDLE = $00;
  1213. SMODE_STDBY = $02;
  1214. SMODE_PDOWN = $04;
  1215. end;
  1216. TSPI = object //Serial Peripheral Interface
  1217. CTRLA: byte; //Control A
  1218. CTRLB: byte; //Control B
  1219. INTCTRL: byte; //Interrupt Control
  1220. INTFLAGS: byte; //Interrupt Flags
  1221. DATA: byte; //Data
  1222. const
  1223. // Enable Double Speed
  1224. CLK2Xbm = $10;
  1225. // Data Order Setting
  1226. DORDbm = $40;
  1227. // Enable Module
  1228. ENABLEbm = $01;
  1229. // Master Operation Enable
  1230. MASTERbm = $20;
  1231. // SPI_PRESC
  1232. PRESCmask = $06;
  1233. PRESC_DIV4 = $00;
  1234. PRESC_DIV16 = $02;
  1235. PRESC_DIV64 = $04;
  1236. PRESC_DIV128 = $06;
  1237. // Buffer Mode Enable
  1238. BUFENbm = $80;
  1239. // Buffer Write Mode
  1240. BUFWRbm = $40;
  1241. // SPI_MODE
  1242. MODEmask = $03;
  1243. MODE_0 = $00;
  1244. MODE_1 = $01;
  1245. MODE_2 = $02;
  1246. MODE_3 = $03;
  1247. // Slave Select Disable
  1248. SSDbm = $04;
  1249. // Data Register Empty Interrupt Enable
  1250. DREIEbm = $20;
  1251. // Interrupt Enable
  1252. IEbm = $01;
  1253. // Receive Complete Interrupt Enable
  1254. RXCIEbm = $80;
  1255. // Slave Select Trigger Interrupt Enable
  1256. SSIEbm = $10;
  1257. // Transfer Complete Interrupt Enable
  1258. TXCIEbm = $40;
  1259. // Buffer Overflow
  1260. BUFOVFbm = $01;
  1261. // Data Register Empty Interrupt Flag
  1262. DREIFbm = $20;
  1263. // Receive Complete Interrupt Flag
  1264. RXCIFbm = $80;
  1265. // Slave Select Trigger Interrupt Flag
  1266. SSIFbm = $10;
  1267. // Transfer Complete Interrupt Flag
  1268. TXCIFbm = $40;
  1269. // Interrupt Flag
  1270. IFbm = $80;
  1271. // Write Collision
  1272. WRCOLbm = $40;
  1273. end;
  1274. TSYSCFG = object //System Configuration Registers
  1275. Reserved0: byte;
  1276. REVID: byte; //Revision ID
  1277. EXTBRK: byte; //External Break
  1278. const
  1279. // External break enable
  1280. ENEXTBRKbm = $01;
  1281. end;
  1282. TTCA_SINGLE = object //16-bit Timer/Counter Type A - Single Mode
  1283. CTRLA: byte; //Control A
  1284. CTRLB: byte; //Control B
  1285. CTRLC: byte; //Control C
  1286. CTRLD: byte; //Control D
  1287. CTRLECLR: byte; //Control E Clear
  1288. CTRLESET: byte; //Control E Set
  1289. CTRLFCLR: byte; //Control F Clear
  1290. CTRLFSET: byte; //Control F Set
  1291. Reserved8: byte;
  1292. EVCTRL: byte; //Event Control
  1293. INTCTRL: byte; //Interrupt Control
  1294. INTFLAGS: byte; //Interrupt Flags
  1295. Reserved12: byte;
  1296. Reserved13: byte;
  1297. DBGCTRL: byte; //Degbug Control
  1298. TEMP: byte; //Temporary data for 16-bit Access
  1299. Reserved16: byte;
  1300. Reserved17: byte;
  1301. Reserved18: byte;
  1302. Reserved19: byte;
  1303. Reserved20: byte;
  1304. Reserved21: byte;
  1305. Reserved22: byte;
  1306. Reserved23: byte;
  1307. Reserved24: byte;
  1308. Reserved25: byte;
  1309. Reserved26: byte;
  1310. Reserved27: byte;
  1311. Reserved28: byte;
  1312. Reserved29: byte;
  1313. Reserved30: byte;
  1314. Reserved31: byte;
  1315. CNT: word; //Count
  1316. Reserved34: byte;
  1317. Reserved35: byte;
  1318. Reserved36: byte;
  1319. Reserved37: byte;
  1320. PER: word; //Period
  1321. CMP0: word; //Compare 0
  1322. CMP1: word; //Compare 1
  1323. CMP2: word; //Compare 2
  1324. Reserved46: byte;
  1325. Reserved47: byte;
  1326. Reserved48: byte;
  1327. Reserved49: byte;
  1328. Reserved50: byte;
  1329. Reserved51: byte;
  1330. Reserved52: byte;
  1331. Reserved53: byte;
  1332. PERBUF: word; //Period Buffer
  1333. CMP0BUF: word; //Compare 0 Buffer
  1334. CMP1BUF: word; //Compare 1 Buffer
  1335. CMP2BUF: word; //Compare 2 Buffer
  1336. const
  1337. // TCA_SINGLE_CLKSEL
  1338. SINGLE_CLKSELmask = $0E;
  1339. SINGLE_CLKSEL_DIV1 = $00;
  1340. SINGLE_CLKSEL_DIV2 = $02;
  1341. SINGLE_CLKSEL_DIV4 = $04;
  1342. SINGLE_CLKSEL_DIV8 = $06;
  1343. SINGLE_CLKSEL_DIV16 = $08;
  1344. SINGLE_CLKSEL_DIV64 = $0A;
  1345. SINGLE_CLKSEL_DIV256 = $0C;
  1346. SINGLE_CLKSEL_DIV1024 = $0E;
  1347. // Module Enable
  1348. ENABLEbm = $01;
  1349. // Auto Lock Update
  1350. ALUPDbm = $08;
  1351. // Compare 0 Enable
  1352. CMP0ENbm = $10;
  1353. // Compare 1 Enable
  1354. CMP1ENbm = $20;
  1355. // Compare 2 Enable
  1356. CMP2ENbm = $40;
  1357. // TCA_SINGLE_WGMODE
  1358. SINGLE_WGMODEmask = $07;
  1359. SINGLE_WGMODE_NORMAL = $00;
  1360. SINGLE_WGMODE_FRQ = $01;
  1361. SINGLE_WGMODE_SINGLESLOPE = $03;
  1362. SINGLE_WGMODE_DSTOP = $05;
  1363. SINGLE_WGMODE_DSBOTH = $06;
  1364. SINGLE_WGMODE_DSBOTTOM = $07;
  1365. // Compare 0 Waveform Output Value
  1366. CMP0OVbm = $01;
  1367. // Compare 1 Waveform Output Value
  1368. CMP1OVbm = $02;
  1369. // Compare 2 Waveform Output Value
  1370. CMP2OVbm = $04;
  1371. // Split Mode Enable
  1372. SPLITMbm = $01;
  1373. // TCA_SINGLE_CMD
  1374. SINGLE_CMDmask = $0C;
  1375. SINGLE_CMD_NONE = $00;
  1376. SINGLE_CMD_UPDATE = $04;
  1377. SINGLE_CMD_RESTART = $08;
  1378. SINGLE_CMD_RESET = $0C;
  1379. // Direction
  1380. DIRbm = $01;
  1381. // Lock Update
  1382. LUPDbm = $02;
  1383. // Compare 0 Buffer Valid
  1384. CMP0BVbm = $02;
  1385. // Compare 1 Buffer Valid
  1386. CMP1BVbm = $04;
  1387. // Compare 2 Buffer Valid
  1388. CMP2BVbm = $08;
  1389. // Period Buffer Valid
  1390. PERBVbm = $01;
  1391. // Debug Run
  1392. DBGRUNbm = $01;
  1393. // Count on Event Input
  1394. CNTEIbm = $01;
  1395. // TCA_SINGLE_EVACT
  1396. SINGLE_EVACTmask = $06;
  1397. SINGLE_EVACT_POSEDGE = $00;
  1398. SINGLE_EVACT_ANYEDGE = $02;
  1399. SINGLE_EVACT_HIGHLVL = $04;
  1400. SINGLE_EVACT_UPDOWN = $06;
  1401. // Compare 0 Interrupt
  1402. CMP0bm = $10;
  1403. // Compare 1 Interrupt
  1404. CMP1bm = $20;
  1405. // Compare 2 Interrupt
  1406. CMP2bm = $40;
  1407. // Overflow Interrupt
  1408. OVFbm = $01;
  1409. end;
  1410. TTCA_SPLIT = object //16-bit Timer/Counter Type A - Split Mode
  1411. CTRLA: byte; //Control A
  1412. CTRLB: byte; //Control B
  1413. CTRLC: byte; //Control C
  1414. CTRLD: byte; //Control D
  1415. CTRLECLR: byte; //Control E Clear
  1416. CTRLESET: byte; //Control E Set
  1417. Reserved6: byte;
  1418. Reserved7: byte;
  1419. Reserved8: byte;
  1420. Reserved9: byte;
  1421. INTCTRL: byte; //Interrupt Control
  1422. INTFLAGS: byte; //Interrupt Flags
  1423. Reserved12: byte;
  1424. Reserved13: byte;
  1425. DBGCTRL: byte; //Degbug Control
  1426. Reserved15: byte;
  1427. Reserved16: byte;
  1428. Reserved17: byte;
  1429. Reserved18: byte;
  1430. Reserved19: byte;
  1431. Reserved20: byte;
  1432. Reserved21: byte;
  1433. Reserved22: byte;
  1434. Reserved23: byte;
  1435. Reserved24: byte;
  1436. Reserved25: byte;
  1437. Reserved26: byte;
  1438. Reserved27: byte;
  1439. Reserved28: byte;
  1440. Reserved29: byte;
  1441. Reserved30: byte;
  1442. Reserved31: byte;
  1443. LCNT: byte; //Low Count
  1444. HCNT: byte; //High Count
  1445. Reserved34: byte;
  1446. Reserved35: byte;
  1447. Reserved36: byte;
  1448. Reserved37: byte;
  1449. LPER: byte; //Low Period
  1450. HPER: byte; //High Period
  1451. LCMP0: byte; //Low Compare
  1452. HCMP0: byte; //High Compare
  1453. LCMP1: byte; //Low Compare
  1454. HCMP1: byte; //High Compare
  1455. LCMP2: byte; //Low Compare
  1456. HCMP2: byte; //High Compare
  1457. const
  1458. // TCA_SPLIT_CLKSEL
  1459. SPLIT_CLKSELmask = $0E;
  1460. SPLIT_CLKSEL_DIV1 = $00;
  1461. SPLIT_CLKSEL_DIV2 = $02;
  1462. SPLIT_CLKSEL_DIV4 = $04;
  1463. SPLIT_CLKSEL_DIV8 = $06;
  1464. SPLIT_CLKSEL_DIV16 = $08;
  1465. SPLIT_CLKSEL_DIV64 = $0A;
  1466. SPLIT_CLKSEL_DIV256 = $0C;
  1467. SPLIT_CLKSEL_DIV1024 = $0E;
  1468. // Module Enable
  1469. ENABLEbm = $01;
  1470. // High Compare 0 Enable
  1471. HCMP0ENbm = $10;
  1472. // High Compare 1 Enable
  1473. HCMP1ENbm = $20;
  1474. // High Compare 2 Enable
  1475. HCMP2ENbm = $40;
  1476. // Low Compare 0 Enable
  1477. LCMP0ENbm = $01;
  1478. // Low Compare 1 Enable
  1479. LCMP1ENbm = $02;
  1480. // Low Compare 2 Enable
  1481. LCMP2ENbm = $04;
  1482. // High Compare 0 Output Value
  1483. HCMP0OVbm = $10;
  1484. // High Compare 1 Output Value
  1485. HCMP1OVbm = $20;
  1486. // High Compare 2 Output Value
  1487. HCMP2OVbm = $40;
  1488. // Low Compare 0 Output Value
  1489. LCMP0OVbm = $01;
  1490. // Low Compare 1 Output Value
  1491. LCMP1OVbm = $02;
  1492. // Low Compare 2 Output Value
  1493. LCMP2OVbm = $04;
  1494. // Split Mode Enable
  1495. SPLITMbm = $01;
  1496. // TCA_SPLIT_CMD
  1497. SPLIT_CMDmask = $0C;
  1498. SPLIT_CMD_NONE = $00;
  1499. SPLIT_CMD_UPDATE = $04;
  1500. SPLIT_CMD_RESTART = $08;
  1501. SPLIT_CMD_RESET = $0C;
  1502. // Debug Run
  1503. DBGRUNbm = $01;
  1504. // High Underflow Interrupt Enable
  1505. HUNFbm = $02;
  1506. // Low Compare 0 Interrupt Enable
  1507. LCMP0bm = $10;
  1508. // Low Compare 1 Interrupt Enable
  1509. LCMP1bm = $20;
  1510. // Low Compare 2 Interrupt Enable
  1511. LCMP2bm = $40;
  1512. // Low Underflow Interrupt Enable
  1513. LUNFbm = $01;
  1514. end;
  1515. TTCA = record //16-bit Timer/Counter Type A
  1516. case byte of
  1517. 0: (SINGLE: TTCA_SINGLE);
  1518. 1: (SPLIT: TTCA_SPLIT);
  1519. end;
  1520. TTCB = object //16-bit Timer Type B
  1521. CTRLA: byte; //Control A
  1522. CTRLB: byte; //Control Register B
  1523. Reserved2: byte;
  1524. Reserved3: byte;
  1525. EVCTRL: byte; //Event Control
  1526. INTCTRL: byte; //Interrupt Control
  1527. INTFLAGS: byte; //Interrupt Flags
  1528. STATUS: byte; //Status
  1529. DBGCTRL: byte; //Debug Control
  1530. TEMP: byte; //Temporary Value
  1531. CNT: word; //Count
  1532. CCMP: word; //Compare or Capture
  1533. const
  1534. // TCB_CLKSEL
  1535. CLKSELmask = $06;
  1536. CLKSEL_CLKDIV1 = $00;
  1537. CLKSEL_CLKDIV2 = $02;
  1538. CLKSEL_CLKTCA = $04;
  1539. // Enable
  1540. ENABLEbm = $01;
  1541. // Run Standby
  1542. RUNSTDBYbm = $40;
  1543. // Synchronize Update
  1544. SYNCUPDbm = $10;
  1545. // Asynchronous Enable
  1546. ASYNCbm = $40;
  1547. // Pin Output Enable
  1548. CCMPENbm = $10;
  1549. // Pin Initial State
  1550. CCMPINITbm = $20;
  1551. // TCB_CNTMODE
  1552. CNTMODEmask = $07;
  1553. CNTMODE_INT = $00;
  1554. CNTMODE_TIMEOUT = $01;
  1555. CNTMODE_CAPT = $02;
  1556. CNTMODE_FRQ = $03;
  1557. CNTMODE_PW = $04;
  1558. CNTMODE_FRQPW = $05;
  1559. CNTMODE_SINGLE = $06;
  1560. CNTMODE_PWM8 = $07;
  1561. // Debug Run
  1562. DBGRUNbm = $01;
  1563. // Event Input Enable
  1564. CAPTEIbm = $01;
  1565. // Event Edge
  1566. EDGEbm = $10;
  1567. // Input Capture Noise Cancellation Filter
  1568. FILTERbm = $40;
  1569. // Capture or Timeout
  1570. CAPTbm = $01;
  1571. // Run
  1572. RUNbm = $01;
  1573. end;
  1574. TTCD = object //Timer Counter D
  1575. CTRLA: byte; //Control A
  1576. CTRLB: byte; //Control B
  1577. CTRLC: byte; //Control C
  1578. CTRLD: byte; //Control D
  1579. CTRLE: byte; //Control E
  1580. Reserved5: byte;
  1581. Reserved6: byte;
  1582. Reserved7: byte;
  1583. EVCTRLA: byte; //EVCTRLA
  1584. EVCTRLB: byte; //EVCTRLB
  1585. Reserved10: byte;
  1586. Reserved11: byte;
  1587. INTCTRL: byte; //Interrupt Control
  1588. INTFLAGS: byte; //Interrupt Flags
  1589. STATUS: byte; //Status
  1590. Reserved15: byte;
  1591. INPUTCTRLA: byte; //Input Control A
  1592. INPUTCTRLB: byte; //Input Control B
  1593. FAULTCTRL: byte; //Fault Control
  1594. Reserved19: byte;
  1595. DLYCTRL: byte; //Delay Control
  1596. DLYVAL: byte; //Delay value
  1597. Reserved22: byte;
  1598. Reserved23: byte;
  1599. DITCTRL: byte; //Dither Control A
  1600. DITVAL: byte; //Dither value
  1601. Reserved26: byte;
  1602. Reserved27: byte;
  1603. Reserved28: byte;
  1604. Reserved29: byte;
  1605. DBGCTRL: byte; //Debug Control
  1606. Reserved31: byte;
  1607. Reserved32: byte;
  1608. Reserved33: byte;
  1609. CAPTUREA: word; //Capture A
  1610. CAPTUREB: word; //Capture B
  1611. Reserved38: byte;
  1612. Reserved39: byte;
  1613. CMPASET: word; //Compare A Set
  1614. CMPACLR: word; //Compare A Clear
  1615. CMPBSET: word; //Compare B Set
  1616. CMPBCLR: word; //Compare B Clear
  1617. const
  1618. // TCD_CLKSEL
  1619. CLKSELmask = $60;
  1620. CLKSEL_20MHZ = $00;
  1621. CLKSEL_EXTCLK = $40;
  1622. CLKSEL_SYSCLK = $60;
  1623. // TCD_CNTPRES
  1624. CNTPRESmask = $18;
  1625. CNTPRES_DIV1 = $00;
  1626. CNTPRES_DIV4 = $08;
  1627. CNTPRES_DIV32 = $10;
  1628. // Enable
  1629. ENABLEbm = $01;
  1630. // TCD_SYNCPRES
  1631. SYNCPRESmask = $06;
  1632. SYNCPRES_DIV1 = $00;
  1633. SYNCPRES_DIV2 = $02;
  1634. SYNCPRES_DIV4 = $04;
  1635. SYNCPRES_DIV8 = $06;
  1636. // TCD_WGMODE
  1637. WGMODEmask = $03;
  1638. WGMODE_ONERAMP = $00;
  1639. WGMODE_TWORAMP = $01;
  1640. WGMODE_FOURRAMP = $02;
  1641. WGMODE_DS = $03;
  1642. // Auto update
  1643. AUPDATEbm = $02;
  1644. // TCD_CMPCSEL
  1645. CMPCSELmask = $40;
  1646. CMPCSEL_PWMA = $00;
  1647. CMPCSEL_PWMB = $40;
  1648. // TCD_CMPDSEL
  1649. CMPDSELmask = $80;
  1650. CMPDSEL_PWMA = $00;
  1651. CMPDSEL_PWMB = $80;
  1652. // Compare output value override
  1653. CMPOVRbm = $01;
  1654. // Fifty percent waveform
  1655. FIFTYbm = $08;
  1656. // Compare A value
  1657. CMPAVAL0bm = $01;
  1658. CMPAVAL1bm = $02;
  1659. CMPAVAL2bm = $04;
  1660. CMPAVAL3bm = $08;
  1661. // Compare B value
  1662. CMPBVAL0bm = $10;
  1663. CMPBVAL1bm = $20;
  1664. CMPBVAL2bm = $40;
  1665. CMPBVAL3bm = $80;
  1666. // Disable at end of cycle
  1667. DISEOCbm = $80;
  1668. // Restart strobe
  1669. RESTARTbm = $04;
  1670. // Software Capture A Strobe
  1671. SCAPTUREAbm = $08;
  1672. // Software Capture B Strobe
  1673. SCAPTUREBbm = $10;
  1674. // synchronize strobe
  1675. SYNCbm = $02;
  1676. // synchronize end of cycle strobe
  1677. SYNCEOCbm = $01;
  1678. // Debug run
  1679. DBGRUNbm = $01;
  1680. // Fault detection
  1681. FAULTDETbm = $04;
  1682. // TCD_DITHERSEL
  1683. DITHERSELmask = $03;
  1684. DITHERSEL_ONTIMEB = $00;
  1685. DITHERSEL_ONTIMEAB = $01;
  1686. DITHERSEL_DEADTIMEB = $02;
  1687. DITHERSEL_DEADTIMEAB = $03;
  1688. // Dither value
  1689. DITHER0bm = $01;
  1690. DITHER1bm = $02;
  1691. DITHER2bm = $04;
  1692. DITHER3bm = $08;
  1693. // TCD_DLYPRESC
  1694. DLYPRESCmask = $30;
  1695. DLYPRESC_DIV1 = $00;
  1696. DLYPRESC_DIV2 = $10;
  1697. DLYPRESC_DIV4 = $20;
  1698. DLYPRESC_DIV8 = $30;
  1699. // TCD_DLYSEL
  1700. DLYSELmask = $03;
  1701. DLYSEL_OFF = $00;
  1702. DLYSEL_INBLANK = $01;
  1703. DLYSEL_EVENT = $02;
  1704. // TCD_DLYTRIG
  1705. DLYTRIGmask = $0C;
  1706. DLYTRIG_CMPASET = $00;
  1707. DLYTRIG_CMPACLR = $04;
  1708. DLYTRIG_CMPBSET = $08;
  1709. DLYTRIG_CMPBCLR = $0C;
  1710. // Delay value
  1711. DLYVAL0bm = $01;
  1712. DLYVAL1bm = $02;
  1713. DLYVAL2bm = $04;
  1714. DLYVAL3bm = $08;
  1715. DLYVAL4bm = $10;
  1716. DLYVAL5bm = $20;
  1717. DLYVAL6bm = $40;
  1718. DLYVAL7bm = $80;
  1719. // TCD_ACTION
  1720. ACTIONmask = $04;
  1721. ACTION_FAULT = $00;
  1722. ACTION_CAPTURE = $04;
  1723. // TCD_CFG
  1724. CFGmask = $C0;
  1725. CFG_NEITHER = $00;
  1726. CFG_FILTER = $40;
  1727. CFG_ASYNC = $80;
  1728. // TCD_EDGE
  1729. EDGEmask = $10;
  1730. EDGE_FALL_LOW = $00;
  1731. EDGE_RISE_HIGH = $10;
  1732. // Trigger event enable
  1733. TRIGEIbm = $01;
  1734. // Compare A value
  1735. CMPAbm = $01;
  1736. // Compare A enable
  1737. CMPAENbm = $10;
  1738. // Compare B value
  1739. CMPBbm = $02;
  1740. // Compare B enable
  1741. CMPBENbm = $20;
  1742. // Compare C value
  1743. CMPCbm = $04;
  1744. // Compare C enable
  1745. CMPCENbm = $40;
  1746. // Compare D vaule
  1747. CMPDbm = $08;
  1748. // Compare D enable
  1749. CMPDENbm = $80;
  1750. // TCD_INPUTMODE
  1751. INPUTMODEmask = $0F;
  1752. INPUTMODE_NONE = $00;
  1753. INPUTMODE_JMPWAIT = $01;
  1754. INPUTMODE_EXECWAIT = $02;
  1755. INPUTMODE_EXECFAULT = $03;
  1756. INPUTMODE_FREQ = $04;
  1757. INPUTMODE_EXECDT = $05;
  1758. INPUTMODE_WAIT = $06;
  1759. INPUTMODE_WAITSW = $07;
  1760. INPUTMODE_EDGETRIG = $08;
  1761. INPUTMODE_EDGETRIGFREQ = $09;
  1762. INPUTMODE_LVLTRIGFREQ = $0A;
  1763. // Overflow interrupt enable
  1764. OVFbm = $01;
  1765. // Trigger A interrupt enable
  1766. TRIGAbm = $04;
  1767. // Trigger B interrupt enable
  1768. TRIGBbm = $08;
  1769. // Command ready
  1770. CMDRDYbm = $02;
  1771. // Enable ready
  1772. ENRDYbm = $01;
  1773. // PWM activity on A
  1774. PWMACTAbm = $40;
  1775. // PWM activity on B
  1776. PWMACTBbm = $80;
  1777. end;
  1778. TTWI = object //Two-Wire Interface
  1779. CTRLA: byte; //Control A
  1780. Reserved1: byte;
  1781. DBGCTRL: byte; //Debug Control Register
  1782. MCTRLA: byte; //Master Control A
  1783. MCTRLB: byte; //Master Control B
  1784. MSTATUS: byte; //Master Status
  1785. MBAUD: byte; //Master Baurd Rate Control
  1786. MADDR: byte; //Master Address
  1787. MDATA: byte; //Master Data
  1788. SCTRLA: byte; //Slave Control A
  1789. SCTRLB: byte; //Slave Control B
  1790. SSTATUS: byte; //Slave Status
  1791. SADDR: byte; //Slave Address
  1792. SDATA: byte; //Slave Data
  1793. SADDRMASK: byte; //Slave Address Mask
  1794. const
  1795. // FM Plus Enable
  1796. FMPENbm = $02;
  1797. // TWI_SDAHOLD
  1798. SDAHOLDmask = $0C;
  1799. SDAHOLD_OFF = $00;
  1800. SDAHOLD_50NS = $04;
  1801. SDAHOLD_300NS = $08;
  1802. SDAHOLD_500NS = $0C;
  1803. // TWI_SDASETUP
  1804. SDASETUPmask = $10;
  1805. SDASETUP_4CYC = $00;
  1806. SDASETUP_8CYC = $10;
  1807. // Debug Run
  1808. DBGRUNbm = $01;
  1809. // Enable TWI Master
  1810. ENABLEbm = $01;
  1811. // Quick Command Enable
  1812. QCENbm = $10;
  1813. // Read Interrupt Enable
  1814. RIENbm = $80;
  1815. // Smart Mode Enable
  1816. SMENbm = $02;
  1817. // TWI_TIMEOUT
  1818. TIMEOUTmask = $0C;
  1819. TIMEOUT_DISABLED = $00;
  1820. TIMEOUT_50US = $04;
  1821. TIMEOUT_100US = $08;
  1822. TIMEOUT_200US = $0C;
  1823. // Write Interrupt Enable
  1824. WIENbm = $40;
  1825. // TWI_ACKACT
  1826. ACKACTmask = $04;
  1827. ACKACT_ACK = $00;
  1828. ACKACT_NACK = $04;
  1829. // Flush
  1830. FLUSHbm = $08;
  1831. // TWI_MCMD
  1832. MCMDmask = $03;
  1833. MCMD_NOACT = $00;
  1834. MCMD_REPSTART = $01;
  1835. MCMD_RECVTRANS = $02;
  1836. MCMD_STOP = $03;
  1837. // Arbitration Lost
  1838. ARBLOSTbm = $08;
  1839. // Bus Error
  1840. BUSERRbm = $04;
  1841. // TWI_BUSSTATE
  1842. BUSSTATEmask = $03;
  1843. BUSSTATE_UNKNOWN = $00;
  1844. BUSSTATE_IDLE = $01;
  1845. BUSSTATE_OWNER = $02;
  1846. BUSSTATE_BUSY = $03;
  1847. // Clock Hold
  1848. CLKHOLDbm = $20;
  1849. // Read Interrupt Flag
  1850. RIFbm = $80;
  1851. // Received Acknowledge
  1852. RXACKbm = $10;
  1853. // Write Interrupt Flag
  1854. WIFbm = $40;
  1855. // Address Enable
  1856. ADDRENbm = $01;
  1857. // Address Mask
  1858. ADDRMASK0bm = $02;
  1859. ADDRMASK1bm = $04;
  1860. ADDRMASK2bm = $08;
  1861. ADDRMASK3bm = $10;
  1862. ADDRMASK4bm = $20;
  1863. ADDRMASK5bm = $40;
  1864. ADDRMASK6bm = $80;
  1865. // Address/Stop Interrupt Enable
  1866. APIENbm = $40;
  1867. // Data Interrupt Enable
  1868. DIENbm = $80;
  1869. // Stop Interrupt Enable
  1870. PIENbm = $20;
  1871. // Promiscuous Mode Enable
  1872. PMENbm = $04;
  1873. // TWI_SCMD
  1874. SCMDmask = $03;
  1875. SCMD_NOACT = $00;
  1876. SCMD_COMPTRANS = $02;
  1877. SCMD_RESPONSE = $03;
  1878. // TWI_AP
  1879. APmask = $01;
  1880. AP_STOP = $00;
  1881. AP_ADR = $01;
  1882. // Address/Stop Interrupt Flag
  1883. APIFbm = $40;
  1884. // Collision
  1885. COLLbm = $08;
  1886. // Data Interrupt Flag
  1887. DIFbm = $80;
  1888. // Read/Write Direction
  1889. DIRbm = $02;
  1890. end;
  1891. TUSART = object //Universal Synchronous and Asynchronous Receiver and Transmitter
  1892. RXDATAL: byte; //Receive Data Low Byte
  1893. RXDATAH: byte; //Receive Data High Byte
  1894. TXDATAL: byte; //Transmit Data Low Byte
  1895. TXDATAH: byte; //Transmit Data High Byte
  1896. STATUS: byte; //Status
  1897. CTRLA: byte; //Control A
  1898. CTRLB: byte; //Control B
  1899. CTRLC: byte; //Control C
  1900. BAUD: word; //Baud Rate
  1901. Reserved10: byte;
  1902. DBGCTRL: byte; //Debug Control
  1903. EVCTRL: byte; //Event Control
  1904. TXPLCTRL: byte; //IRCOM Transmitter Pulse Length Control
  1905. RXPLCTRL: byte; //IRCOM Receiver Pulse Length Control
  1906. const
  1907. // Auto-baud Error Interrupt Enable
  1908. ABEIEbm = $04;
  1909. // Data Register Empty Interrupt Enable
  1910. DREIEbm = $20;
  1911. // Loop-back Mode Enable
  1912. LBMEbm = $08;
  1913. // USART_RS485
  1914. RS485mask = $03;
  1915. RS485_OFF = $00;
  1916. RS485_EXT = $01;
  1917. RS485_INT = $02;
  1918. // Receive Complete Interrupt Enable
  1919. RXCIEbm = $80;
  1920. // Receiver Start Frame Interrupt Enable
  1921. RXSIEbm = $10;
  1922. // Transmit Complete Interrupt Enable
  1923. TXCIEbm = $40;
  1924. // Multi-processor Communication Mode
  1925. MPCMbm = $01;
  1926. // Open Drain Mode Enable
  1927. ODMEbm = $08;
  1928. // Reciever enable
  1929. RXENbm = $80;
  1930. // USART_RXMODE
  1931. RXMODEmask = $06;
  1932. RXMODE_NORMAL = $00;
  1933. RXMODE_CLK2X = $02;
  1934. RXMODE_GENAUTO = $04;
  1935. RXMODE_LINAUTO = $06;
  1936. // Start Frame Detection Enable
  1937. SFDENbm = $10;
  1938. // Transmitter Enable
  1939. TXENbm = $40;
  1940. // USART_MSPI_CMODE
  1941. MSPI_CMODEmask = $C0;
  1942. MSPI_CMODE_ASYNCHRONOUS = $00;
  1943. MSPI_CMODE_SYNCHRONOUS = $40;
  1944. MSPI_CMODE_IRCOM = $80;
  1945. MSPI_CMODE_MSPI = $C0;
  1946. // SPI Master Mode, Clock Phase
  1947. UCPHAbm = $02;
  1948. // SPI Master Mode, Data Order
  1949. UDORDbm = $04;
  1950. // USART_NORMAL_CHSIZE
  1951. NORMAL_CHSIZEmask = $07;
  1952. NORMAL_CHSIZE_5BIT = $00;
  1953. NORMAL_CHSIZE_6BIT = $01;
  1954. NORMAL_CHSIZE_7BIT = $02;
  1955. NORMAL_CHSIZE_8BIT = $03;
  1956. NORMAL_CHSIZE_9BITL = $06;
  1957. NORMAL_CHSIZE_9BITH = $07;
  1958. // USART_NORMAL_CMODE
  1959. NORMAL_CMODEmask = $C0;
  1960. NORMAL_CMODE_ASYNCHRONOUS = $00;
  1961. NORMAL_CMODE_SYNCHRONOUS = $40;
  1962. NORMAL_CMODE_IRCOM = $80;
  1963. NORMAL_CMODE_MSPI = $C0;
  1964. // USART_NORMAL_PMODE
  1965. NORMAL_PMODEmask = $30;
  1966. NORMAL_PMODE_DISABLED = $00;
  1967. NORMAL_PMODE_EVEN = $20;
  1968. NORMAL_PMODE_ODD = $30;
  1969. // USART_NORMAL_SBMODE
  1970. NORMAL_SBMODEmask = $08;
  1971. NORMAL_SBMODE_1BIT = $00;
  1972. NORMAL_SBMODE_2BIT = $08;
  1973. // Debug Run
  1974. DBGRUNbm = $01;
  1975. // IrDA Event Input Enable
  1976. IREIbm = $01;
  1977. // Buffer Overflow
  1978. BUFOVFbm = $40;
  1979. // Receiver Data Register
  1980. DATA8bm = $01;
  1981. // Frame Error
  1982. FERRbm = $04;
  1983. // Parity Error
  1984. PERRbm = $02;
  1985. // Receive Complete Interrupt Flag
  1986. RXCIFbm = $80;
  1987. // RX Data
  1988. DATA0bm = $01;
  1989. DATA1bm = $02;
  1990. DATA2bm = $04;
  1991. DATA3bm = $08;
  1992. DATA4bm = $10;
  1993. DATA5bm = $20;
  1994. DATA6bm = $40;
  1995. DATA7bm = $80;
  1996. // Receiver Pulse Lenght
  1997. RXPL0bm = $01;
  1998. RXPL1bm = $02;
  1999. RXPL2bm = $04;
  2000. RXPL3bm = $08;
  2001. RXPL4bm = $10;
  2002. RXPL5bm = $20;
  2003. RXPL6bm = $40;
  2004. // Break Detected Flag
  2005. BDFbm = $02;
  2006. // Data Register Empty Flag
  2007. DREIFbm = $20;
  2008. // Inconsistent Sync Field Interrupt Flag
  2009. ISFIFbm = $08;
  2010. // Receive Start Interrupt
  2011. RXSIFbm = $10;
  2012. // Transmit Interrupt Flag
  2013. TXCIFbm = $40;
  2014. // Wait For Break
  2015. WFBbm = $01;
  2016. // Transmit pulse length
  2017. TXPL0bm = $01;
  2018. TXPL1bm = $02;
  2019. TXPL2bm = $04;
  2020. TXPL3bm = $08;
  2021. TXPL4bm = $10;
  2022. TXPL5bm = $20;
  2023. TXPL6bm = $40;
  2024. TXPL7bm = $80;
  2025. end;
  2026. TUSERROW = object //User Row
  2027. USERROW0: byte; //User Row Byte 0
  2028. USERROW1: byte; //User Row Byte 1
  2029. USERROW2: byte; //User Row Byte 2
  2030. USERROW3: byte; //User Row Byte 3
  2031. USERROW4: byte; //User Row Byte 4
  2032. USERROW5: byte; //User Row Byte 5
  2033. USERROW6: byte; //User Row Byte 6
  2034. USERROW7: byte; //User Row Byte 7
  2035. USERROW8: byte; //User Row Byte 8
  2036. USERROW9: byte; //User Row Byte 9
  2037. USERROW10: byte; //User Row Byte 10
  2038. USERROW11: byte; //User Row Byte 11
  2039. USERROW12: byte; //User Row Byte 12
  2040. USERROW13: byte; //User Row Byte 13
  2041. USERROW14: byte; //User Row Byte 14
  2042. USERROW15: byte; //User Row Byte 15
  2043. USERROW16: byte; //User Row Byte 16
  2044. USERROW17: byte; //User Row Byte 17
  2045. USERROW18: byte; //User Row Byte 18
  2046. USERROW19: byte; //User Row Byte 19
  2047. USERROW20: byte; //User Row Byte 20
  2048. USERROW21: byte; //User Row Byte 21
  2049. USERROW22: byte; //User Row Byte 22
  2050. USERROW23: byte; //User Row Byte 23
  2051. USERROW24: byte; //User Row Byte 24
  2052. USERROW25: byte; //User Row Byte 25
  2053. USERROW26: byte; //User Row Byte 26
  2054. USERROW27: byte; //User Row Byte 27
  2055. USERROW28: byte; //User Row Byte 28
  2056. USERROW29: byte; //User Row Byte 29
  2057. USERROW30: byte; //User Row Byte 30
  2058. USERROW31: byte; //User Row Byte 31
  2059. end;
  2060. TVPORT = object //Virtual Ports
  2061. DIR: byte; //Data Direction
  2062. OUT_: byte; //Output Value
  2063. IN_: byte; //Input Value
  2064. INTFLAGS: byte; //Interrupt Flags
  2065. const
  2066. // Pin Interrupt
  2067. INT0bm = $01;
  2068. INT1bm = $02;
  2069. INT2bm = $04;
  2070. INT3bm = $08;
  2071. INT4bm = $10;
  2072. INT5bm = $20;
  2073. INT6bm = $40;
  2074. INT7bm = $80;
  2075. end;
  2076. TVREF = object //Voltage reference
  2077. CTRLA: byte; //Control A
  2078. CTRLB: byte; //Control B
  2079. const
  2080. // VREF_ADC0REFSEL
  2081. ADC0REFSELmask = $70;
  2082. ADC0REFSEL_0V55 = $00;
  2083. ADC0REFSEL_1V1 = $10;
  2084. ADC0REFSEL_2V5 = $20;
  2085. ADC0REFSEL_4V34 = $30;
  2086. ADC0REFSEL_1V5 = $40;
  2087. // VREF_DAC0REFSEL
  2088. DAC0REFSELmask = $07;
  2089. DAC0REFSEL_0V55 = $00;
  2090. DAC0REFSEL_1V1 = $01;
  2091. DAC0REFSEL_2V5 = $02;
  2092. DAC0REFSEL_4V34 = $03;
  2093. DAC0REFSEL_1V5 = $04;
  2094. // ADC0 reference enable
  2095. ADC0REFENbm = $02;
  2096. // DAC0/AC0 reference enable
  2097. DAC0REFENbm = $01;
  2098. end;
  2099. TWDT = object //Watch-Dog Timer
  2100. CTRLA: byte; //Control A
  2101. STATUS: byte; //Status
  2102. const
  2103. // WDT_PERIOD
  2104. PERIODmask = $0F;
  2105. PERIOD_OFF = $00;
  2106. PERIOD_8CLK = $01;
  2107. PERIOD_16CLK = $02;
  2108. PERIOD_32CLK = $03;
  2109. PERIOD_64CLK = $04;
  2110. PERIOD_128CLK = $05;
  2111. PERIOD_256CLK = $06;
  2112. PERIOD_512CLK = $07;
  2113. PERIOD_1KCLK = $08;
  2114. PERIOD_2KCLK = $09;
  2115. PERIOD_4KCLK = $0A;
  2116. PERIOD_8KCLK = $0B;
  2117. // WDT_WINDOW
  2118. WINDOWmask = $F0;
  2119. WINDOW_OFF = $00;
  2120. WINDOW_8CLK = $10;
  2121. WINDOW_16CLK = $20;
  2122. WINDOW_32CLK = $30;
  2123. WINDOW_64CLK = $40;
  2124. WINDOW_128CLK = $50;
  2125. WINDOW_256CLK = $60;
  2126. WINDOW_512CLK = $70;
  2127. WINDOW_1KCLK = $80;
  2128. WINDOW_2KCLK = $90;
  2129. WINDOW_4KCLK = $A0;
  2130. WINDOW_8KCLK = $B0;
  2131. // Lock enable
  2132. LOCKbm = $80;
  2133. // Syncronization busy
  2134. SYNCBUSYbm = $01;
  2135. end;
  2136. const
  2137. Pin0idx = 0; Pin0bm = 1;
  2138. Pin1idx = 1; Pin1bm = 2;
  2139. Pin2idx = 2; Pin2bm = 4;
  2140. Pin3idx = 3; Pin3bm = 8;
  2141. Pin4idx = 4; Pin4bm = 16;
  2142. Pin5idx = 5; Pin5bm = 32;
  2143. Pin6idx = 6; Pin6bm = 64;
  2144. Pin7idx = 7; Pin7bm = 128;
  2145. var
  2146. VPORTA: TVPORT absolute $0000;
  2147. VPORTB: TVPORT absolute $0004;
  2148. VPORTC: TVPORT absolute $0008;
  2149. GPIO: TGPIO absolute $001C;
  2150. CPU: TCPU absolute $0030;
  2151. RSTCTRL: TRSTCTRL absolute $0040;
  2152. SLPCTRL: TSLPCTRL absolute $0050;
  2153. CLKCTRL: TCLKCTRL absolute $0060;
  2154. BOD: TBOD absolute $0080;
  2155. VREF: TVREF absolute $00A0;
  2156. WDT: TWDT absolute $0100;
  2157. CPUINT: TCPUINT absolute $0110;
  2158. CRCSCAN: TCRCSCAN absolute $0120;
  2159. RTC: TRTC absolute $0140;
  2160. EVSYS: TEVSYS absolute $0180;
  2161. CCL: TCCL absolute $01C0;
  2162. PORTMUX: TPORTMUX absolute $0200;
  2163. PORTA: TPORT absolute $0400;
  2164. PORTB: TPORT absolute $0420;
  2165. ADC0: TADC absolute $0600;
  2166. AC0: TAC absolute $0670;
  2167. DAC0: TDAC absolute $0680;
  2168. USART0: TUSART absolute $0800;
  2169. TWI0: TTWI absolute $0810;
  2170. SPI0: TSPI absolute $0820;
  2171. TCA0: TTCA absolute $0A00;
  2172. TCB0: TTCB absolute $0A40;
  2173. TCD0: TTCD absolute $0A80;
  2174. SYSCFG: TSYSCFG absolute $0F00;
  2175. NVMCTRL: TNVMCTRL absolute $1000;
  2176. SIGROW: TSIGROW absolute $1100;
  2177. FUSE: TFUSE absolute $1280;
  2178. LOCKBIT: TLOCKBIT absolute $128A;
  2179. USERROW: TUSERROW absolute $1300;
  2180. implementation
  2181. {$define RELBRANCHES}
  2182. {$i avrcommon.inc}
  2183. procedure CRCSCAN_NMI_ISR; external name 'CRCSCAN_NMI_ISR'; // Interrupt 1
  2184. procedure BOD_VLM_ISR; external name 'BOD_VLM_ISR'; // Interrupt 2
  2185. procedure PORTA_PORT_ISR; external name 'PORTA_PORT_ISR'; // Interrupt 3
  2186. procedure PORTB_PORT_ISR; external name 'PORTB_PORT_ISR'; // Interrupt 4
  2187. procedure RTC_CNT_ISR; external name 'RTC_CNT_ISR'; // Interrupt 6
  2188. procedure RTC_PIT_ISR; external name 'RTC_PIT_ISR'; // Interrupt 7
  2189. procedure TCA0_LUNF_ISR; external name 'TCA0_LUNF_ISR'; // Interrupt 8
  2190. //procedure TCA0_OVF_ISR; external name 'TCA0_OVF_ISR'; // Interrupt 8
  2191. procedure TCA0_HUNF_ISR; external name 'TCA0_HUNF_ISR'; // Interrupt 9
  2192. procedure TCA0_LCMP0_ISR; external name 'TCA0_LCMP0_ISR'; // Interrupt 10
  2193. //procedure TCA0_CMP0_ISR; external name 'TCA0_CMP0_ISR'; // Interrupt 10
  2194. procedure TCA0_CMP1_ISR; external name 'TCA0_CMP1_ISR'; // Interrupt 11
  2195. //procedure TCA0_LCMP1_ISR; external name 'TCA0_LCMP1_ISR'; // Interrupt 11
  2196. procedure TCA0_CMP2_ISR; external name 'TCA0_CMP2_ISR'; // Interrupt 12
  2197. //procedure TCA0_LCMP2_ISR; external name 'TCA0_LCMP2_ISR'; // Interrupt 12
  2198. procedure TCB0_INT_ISR; external name 'TCB0_INT_ISR'; // Interrupt 13
  2199. procedure TCD0_OVF_ISR; external name 'TCD0_OVF_ISR'; // Interrupt 14
  2200. procedure TCD0_TRIG_ISR; external name 'TCD0_TRIG_ISR'; // Interrupt 15
  2201. procedure AC0_AC_ISR; external name 'AC0_AC_ISR'; // Interrupt 16
  2202. procedure ADC0_RESRDY_ISR; external name 'ADC0_RESRDY_ISR'; // Interrupt 17
  2203. procedure ADC0_WCOMP_ISR; external name 'ADC0_WCOMP_ISR'; // Interrupt 18
  2204. procedure TWI0_TWIS_ISR; external name 'TWI0_TWIS_ISR'; // Interrupt 19
  2205. procedure TWI0_TWIM_ISR; external name 'TWI0_TWIM_ISR'; // Interrupt 20
  2206. procedure SPI0_INT_ISR; external name 'SPI0_INT_ISR'; // Interrupt 21
  2207. procedure USART0_RXC_ISR; external name 'USART0_RXC_ISR'; // Interrupt 22
  2208. procedure USART0_DRE_ISR; external name 'USART0_DRE_ISR'; // Interrupt 23
  2209. procedure USART0_TXC_ISR; external name 'USART0_TXC_ISR'; // Interrupt 24
  2210. procedure NVMCTRL_EE_ISR; external name 'NVMCTRL_EE_ISR'; // Interrupt 25
  2211. procedure _FPC_start; assembler; nostackframe;
  2212. label
  2213. _start;
  2214. asm
  2215. .init
  2216. .globl _start
  2217. rjmp _start
  2218. rjmp CRCSCAN_NMI_ISR
  2219. rjmp BOD_VLM_ISR
  2220. rjmp PORTA_PORT_ISR
  2221. rjmp PORTB_PORT_ISR
  2222. rjmp RTC_CNT_ISR
  2223. rjmp RTC_PIT_ISR
  2224. rjmp TCA0_LUNF_ISR
  2225. // rjmp TCA0_OVF_ISR
  2226. rjmp TCA0_HUNF_ISR
  2227. rjmp TCA0_LCMP0_ISR
  2228. // rjmp TCA0_CMP0_ISR
  2229. rjmp TCA0_CMP1_ISR
  2230. // rjmp TCA0_LCMP1_ISR
  2231. rjmp TCA0_CMP2_ISR
  2232. // rjmp TCA0_LCMP2_ISR
  2233. rjmp TCB0_INT_ISR
  2234. rjmp TCD0_OVF_ISR
  2235. rjmp TCD0_TRIG_ISR
  2236. rjmp AC0_AC_ISR
  2237. rjmp ADC0_RESRDY_ISR
  2238. rjmp ADC0_WCOMP_ISR
  2239. rjmp TWI0_TWIS_ISR
  2240. rjmp TWI0_TWIM_ISR
  2241. rjmp SPI0_INT_ISR
  2242. rjmp USART0_RXC_ISR
  2243. rjmp USART0_DRE_ISR
  2244. rjmp USART0_TXC_ISR
  2245. rjmp NVMCTRL_EE_ISR
  2246. {$i start.inc}
  2247. .weak CRCSCAN_NMI_ISR
  2248. .weak BOD_VLM_ISR
  2249. .weak PORTA_PORT_ISR
  2250. .weak PORTB_PORT_ISR
  2251. .weak RTC_CNT_ISR
  2252. .weak RTC_PIT_ISR
  2253. .weak TCA0_LUNF_ISR
  2254. // .weak TCA0_OVF_ISR
  2255. .weak TCA0_HUNF_ISR
  2256. .weak TCA0_LCMP0_ISR
  2257. // .weak TCA0_CMP0_ISR
  2258. .weak TCA0_CMP1_ISR
  2259. // .weak TCA0_LCMP1_ISR
  2260. .weak TCA0_CMP2_ISR
  2261. // .weak TCA0_LCMP2_ISR
  2262. .weak TCB0_INT_ISR
  2263. .weak TCD0_OVF_ISR
  2264. .weak TCD0_TRIG_ISR
  2265. .weak AC0_AC_ISR
  2266. .weak ADC0_RESRDY_ISR
  2267. .weak ADC0_WCOMP_ISR
  2268. .weak TWI0_TWIS_ISR
  2269. .weak TWI0_TWIM_ISR
  2270. .weak SPI0_INT_ISR
  2271. .weak USART0_RXC_ISR
  2272. .weak USART0_DRE_ISR
  2273. .weak USART0_TXC_ISR
  2274. .weak NVMCTRL_EE_ISR
  2275. .set CRCSCAN_NMI_ISR, Default_IRQ_handler
  2276. .set BOD_VLM_ISR, Default_IRQ_handler
  2277. .set PORTA_PORT_ISR, Default_IRQ_handler
  2278. .set PORTB_PORT_ISR, Default_IRQ_handler
  2279. .set RTC_CNT_ISR, Default_IRQ_handler
  2280. .set RTC_PIT_ISR, Default_IRQ_handler
  2281. .set TCA0_LUNF_ISR, Default_IRQ_handler
  2282. // .set TCA0_OVF_ISR, Default_IRQ_handler
  2283. .set TCA0_HUNF_ISR, Default_IRQ_handler
  2284. .set TCA0_LCMP0_ISR, Default_IRQ_handler
  2285. // .set TCA0_CMP0_ISR, Default_IRQ_handler
  2286. .set TCA0_CMP1_ISR, Default_IRQ_handler
  2287. // .set TCA0_LCMP1_ISR, Default_IRQ_handler
  2288. .set TCA0_CMP2_ISR, Default_IRQ_handler
  2289. // .set TCA0_LCMP2_ISR, Default_IRQ_handler
  2290. .set TCB0_INT_ISR, Default_IRQ_handler
  2291. .set TCD0_OVF_ISR, Default_IRQ_handler
  2292. .set TCD0_TRIG_ISR, Default_IRQ_handler
  2293. .set AC0_AC_ISR, Default_IRQ_handler
  2294. .set ADC0_RESRDY_ISR, Default_IRQ_handler
  2295. .set ADC0_WCOMP_ISR, Default_IRQ_handler
  2296. .set TWI0_TWIS_ISR, Default_IRQ_handler
  2297. .set TWI0_TWIM_ISR, Default_IRQ_handler
  2298. .set SPI0_INT_ISR, Default_IRQ_handler
  2299. .set USART0_RXC_ISR, Default_IRQ_handler
  2300. .set USART0_DRE_ISR, Default_IRQ_handler
  2301. .set USART0_TXC_ISR, Default_IRQ_handler
  2302. .set NVMCTRL_EE_ISR, Default_IRQ_handler
  2303. end;
  2304. end.