cgcpu.pas 45 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290
  1. {
  2. Copyright (c) 2008 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the code generator for the AVR
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cgcpu;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,symtype,symdef,
  23. cgbase,cgutils,cgobj,
  24. aasmbase,aasmcpu,aasmtai,aasmdata,
  25. parabase,
  26. cpubase,cpuinfo,node,cg64f32,rgcpu;
  27. type
  28. { tcgavr }
  29. tcgavr = class(tcg)
  30. { true, if the next arithmetic operation should modify the flags }
  31. cgsetflags : boolean;
  32. procedure init_register_allocators;override;
  33. procedure done_register_allocators;override;
  34. function getintregister(list:TAsmList;size:Tcgsize):Tregister;override;
  35. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : aint;const paraloc : TCGPara);override;
  36. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);override;
  37. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);override;
  38. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);override;
  39. procedure a_call_reg(list : TAsmList;reg: tregister);override;
  40. procedure a_call_ref(list : TAsmList;ref: treference);override;
  41. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; reg: TRegister); override;
  42. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; src, dst: TRegister); override;
  43. { move instructions }
  44. procedure a_load_const_reg(list : TAsmList; size: tcgsize; a : aint;reg : tregister);override;
  45. procedure a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);override;
  46. procedure a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);override;
  47. procedure a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
  48. { comparison operations }
  49. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  50. l : tasmlabel);override;
  51. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
  52. procedure a_jmp_name(list : TAsmList;const s : string); override;
  53. procedure a_jmp_always(list : TAsmList;l: tasmlabel); override;
  54. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); override;
  55. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister); override;
  56. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);override;
  57. procedure g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean); override;
  58. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
  59. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);override;
  60. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);override;
  61. procedure g_concatcopy_move(list : TAsmList;const source,dest : treference;len : aint);
  62. procedure g_concatcopy_internal(list : TAsmList;const source,dest : treference;len : aint;aligned : boolean);
  63. procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef); override;
  64. // procedure g_save_registers(list : TAsmList);override;
  65. // procedure g_restore_registers(list : TAsmList);override;
  66. procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  67. procedure fixref(list : TAsmList;var ref : treference);
  68. function normalize_ref(list:TAsmList;ref: treference):treference;
  69. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
  70. procedure emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  71. procedure a_adjust_sp(list: TAsmList; value: longint);
  72. end;
  73. tcg64favr = class(tcg64f32)
  74. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);override;
  75. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);override;
  76. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);override;
  77. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);override;
  78. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);override;
  79. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);override;
  80. end;
  81. procedure create_codegen;
  82. const
  83. TOpCG2AsmOp: Array[topcg] of TAsmOp = (A_NONE,A_MOV,A_ADD,A_AND,A_NONE,
  84. A_NONE,A_MUL,A_MULS,A_NEG,A_COM,A_OR,
  85. A_ASR,A_LSL,A_LSR,A_SUB,A_EOR,A_ROL,A_ROR);
  86. implementation
  87. uses
  88. globals,verbose,systems,cutils,
  89. fmodule,
  90. symconst,symsym,
  91. tgobj,
  92. procinfo,cpupi,
  93. paramgr;
  94. procedure tcgavr.init_register_allocators;
  95. begin
  96. inherited init_register_allocators;
  97. rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
  98. [RS_R0,RS_R2,RS_R3,RS_R4,RS_R5,RS_R6,RS_R7,RS_R8,RS_R9,
  99. RS_R10,RS_R11,RS_R12,RS_R13,RS_R14,RS_R15,RS_R16,RS_R17,RS_R18,RS_R19,
  100. RS_R20,RS_R21,RS_R22,RS_R23,RS_R24,RS_R25],first_int_imreg,[]);
  101. rg[R_ADDRESSREGISTER]:=trgintcpu.create(R_ADDRESSREGISTER,R_SUBWHOLE,
  102. [RS_R26,RS_R30],first_int_imreg,[]);
  103. end;
  104. procedure tcgavr.done_register_allocators;
  105. begin
  106. rg[R_INTREGISTER].free;
  107. rg[R_ADDRESSREGISTER].free;
  108. inherited done_register_allocators;
  109. end;
  110. function tcgavr.getintregister(list: TAsmList; size: Tcgsize): Tregister;
  111. var
  112. tmp1,tmp2,tmp3 : TRegister;
  113. begin
  114. case size of
  115. OS_8,OS_S8:
  116. Result:=inherited getintregister(list, size);
  117. OS_16,OS_S16:
  118. begin
  119. Result:=inherited getintregister(list, OS_8);
  120. { ensure that the high register can be retrieved by
  121. GetNextReg
  122. }
  123. if inherited getintregister(list, OS_8)<>GetNextReg(Result) then
  124. internalerror(2011021331);
  125. end;
  126. OS_32,OS_S32:
  127. begin
  128. Result:=inherited getintregister(list, OS_8);
  129. tmp1:=inherited getintregister(list, OS_8);
  130. { ensure that the high register can be retrieved by
  131. GetNextReg
  132. }
  133. if tmp1<>GetNextReg(Result) then
  134. internalerror(2011021332);
  135. tmp2:=inherited getintregister(list, OS_8);
  136. { ensure that the upper register can be retrieved by
  137. GetNextReg
  138. }
  139. if tmp2<>GetNextReg(tmp1) then
  140. internalerror(2011021333);
  141. tmp3:=inherited getintregister(list, OS_8);
  142. { ensure that the upper register can be retrieved by
  143. GetNextReg
  144. }
  145. if tmp3<>GetNextReg(tmp2) then
  146. internalerror(2011021334);
  147. end;
  148. else
  149. internalerror(2011021330);
  150. end;
  151. end;
  152. procedure tcgavr.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : aint;const paraloc : TCGPara);
  153. var
  154. ref: treference;
  155. begin
  156. paraloc.check_simple_location;
  157. paramanager.allocparaloc(list,paraloc.location);
  158. case paraloc.location^.loc of
  159. LOC_REGISTER,LOC_CREGISTER:
  160. a_load_const_reg(list,size,a,paraloc.location^.register);
  161. LOC_REFERENCE:
  162. begin
  163. reference_reset(ref,paraloc.alignment);
  164. ref.base:=paraloc.location^.reference.index;
  165. ref.offset:=paraloc.location^.reference.offset;
  166. a_load_const_ref(list,size,a,ref);
  167. end;
  168. else
  169. internalerror(2002081101);
  170. end;
  171. end;
  172. procedure tcgavr.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);
  173. var
  174. tmpref, ref: treference;
  175. location: pcgparalocation;
  176. sizeleft: aint;
  177. begin
  178. location := paraloc.location;
  179. tmpref := r;
  180. sizeleft := paraloc.intsize;
  181. while assigned(location) do
  182. begin
  183. paramanager.allocparaloc(list,location);
  184. case location^.loc of
  185. LOC_REGISTER,LOC_CREGISTER:
  186. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  187. LOC_REFERENCE:
  188. begin
  189. reference_reset_base(ref,location^.reference.index,location^.reference.offset,paraloc.alignment);
  190. { doubles in softemu mode have a strange order of registers and references }
  191. if location^.size=OS_32 then
  192. g_concatcopy(list,tmpref,ref,4)
  193. else
  194. begin
  195. g_concatcopy(list,tmpref,ref,sizeleft);
  196. if assigned(location^.next) then
  197. internalerror(2005010710);
  198. end;
  199. end;
  200. LOC_VOID:
  201. begin
  202. // nothing to do
  203. end;
  204. else
  205. internalerror(2002081103);
  206. end;
  207. inc(tmpref.offset,tcgsize2size[location^.size]);
  208. dec(sizeleft,tcgsize2size[location^.size]);
  209. location := location^.next;
  210. end;
  211. end;
  212. procedure tcgavr.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);
  213. var
  214. ref: treference;
  215. tmpreg: tregister;
  216. begin
  217. paraloc.check_simple_location;
  218. paramanager.allocparaloc(list,paraloc.location);
  219. case paraloc.location^.loc of
  220. LOC_REGISTER,LOC_CREGISTER:
  221. a_loadaddr_ref_reg(list,r,paraloc.location^.register);
  222. LOC_REFERENCE:
  223. begin
  224. reference_reset(ref,paraloc.alignment);
  225. ref.base := paraloc.location^.reference.index;
  226. ref.offset := paraloc.location^.reference.offset;
  227. tmpreg := getintregister(list,OS_ADDR);
  228. a_loadaddr_ref_reg(list,r,tmpreg);
  229. a_load_reg_ref(list,OS_ADDR,OS_ADDR,tmpreg,ref);
  230. end;
  231. else
  232. internalerror(2002080701);
  233. end;
  234. end;
  235. procedure tcgavr.a_call_name(list : TAsmList;const s : string; weak: boolean);
  236. begin
  237. list.concat(taicpu.op_sym(A_RCALL,current_asmdata.RefAsmSymbol(s)));
  238. {
  239. the compiler does not properly set this flag anymore in pass 1, and
  240. for now we only need it after pass 2 (I hope) (JM)
  241. if not(pi_do_call in current_procinfo.flags) then
  242. internalerror(2003060703);
  243. }
  244. include(current_procinfo.flags,pi_do_call);
  245. end;
  246. procedure tcgavr.a_call_reg(list : TAsmList;reg: tregister);
  247. begin
  248. a_reg_alloc(list,NR_ZLO);
  249. a_reg_alloc(list,NR_ZHI);
  250. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZLO,reg));
  251. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZHI,GetHigh(reg)));
  252. list.concat(taicpu.op_none(A_ICALL));
  253. a_reg_dealloc(list,NR_ZLO);
  254. a_reg_dealloc(list,NR_ZHI);
  255. include(current_procinfo.flags,pi_do_call);
  256. end;
  257. procedure tcgavr.a_call_ref(list : TAsmList;ref: treference);
  258. begin
  259. a_reg_alloc(list,NR_ZLO);
  260. a_reg_alloc(list,NR_ZHI);
  261. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,NR_ZLO);
  262. list.concat(taicpu.op_none(A_ICALL));
  263. a_reg_dealloc(list,NR_ZLO);
  264. a_reg_dealloc(list,NR_ZHI);
  265. include(current_procinfo.flags,pi_do_call);
  266. end;
  267. procedure tcgavr.a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; reg: TRegister);
  268. var
  269. mask : qword;
  270. shift : byte;
  271. i : byte;
  272. tmpreg : tregister;
  273. begin
  274. mask:=$ff;
  275. shift:=0;
  276. case op of
  277. OP_OR:
  278. begin
  279. for i:=1 to tcgsize2size[size] do
  280. begin
  281. list.concat(taicpu.op_reg_const(A_ORI,reg,(a and mask) shr shift));
  282. reg:=GetNextReg(reg);
  283. mask:=mask shl 8;
  284. inc(shift,8);
  285. end;
  286. end;
  287. OP_AND:
  288. begin
  289. for i:=1 to tcgsize2size[size] do
  290. begin
  291. list.concat(taicpu.op_reg_const(A_ANDI,reg,(a and mask) shr shift));
  292. reg:=GetNextReg(reg);
  293. mask:=mask shl 8;
  294. inc(shift,8);
  295. end;
  296. end;
  297. OP_SUB:
  298. begin
  299. list.concat(taicpu.op_reg_const(A_SUBI,reg,a));
  300. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  301. begin
  302. for i:=2 to tcgsize2size[size] do
  303. begin
  304. reg:=GetNextReg(reg);
  305. mask:=mask shl 8;
  306. inc(shift,8);
  307. list.concat(taicpu.op_reg_const(A_SBCI,reg,(a and mask) shr shift));
  308. end;
  309. end;
  310. end;
  311. else
  312. begin
  313. tmpreg:=getintregister(list,size);
  314. a_load_const_reg(list,size,a,tmpreg);
  315. a_op_reg_reg(list,op,size,tmpreg,reg);
  316. end;
  317. end;
  318. end;
  319. procedure tcgavr.a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; src, dst: TRegister);
  320. var
  321. tmpreg: tregister;
  322. i : integer;
  323. instr : taicpu;
  324. begin
  325. case op of
  326. OP_ADD:
  327. begin
  328. if src<>dst then
  329. a_load_reg_reg(list,size,size,src,dst);
  330. list.concat(taicpu.op_reg_reg(A_ADD,dst,src));
  331. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  332. begin
  333. for i:=2 to tcgsize2size[size] do
  334. begin
  335. dst:=GetNextReg(dst);
  336. src:=GetNextReg(src);
  337. list.concat(taicpu.op_reg_reg(A_ADC,dst,src));
  338. end;
  339. end
  340. else
  341. end;
  342. OP_SUB:
  343. begin
  344. if src<>dst then
  345. a_load_reg_reg(list,size,size,src,dst);
  346. list.concat(taicpu.op_reg_reg(A_SUB,dst,src));
  347. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  348. begin
  349. for i:=2 to tcgsize2size[size] do
  350. begin
  351. dst:=GetNextReg(dst);
  352. src:=GetNextReg(src);
  353. list.concat(taicpu.op_reg_reg(A_SBC,dst,src));
  354. end;
  355. end;
  356. end;
  357. OP_NEG:
  358. begin
  359. if src<>dst then
  360. a_load_reg_reg(list,size,size,src,dst);
  361. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  362. begin
  363. tmpreg:=GetNextReg(dst);
  364. for i:=2 to tcgsize2size[size] do
  365. begin
  366. list.concat(taicpu.op_reg(A_COM,tmpreg));
  367. tmpreg:=GetNextReg(tmpreg);
  368. end;
  369. list.concat(taicpu.op_reg(A_NEG,dst));
  370. tmpreg:=GetNextReg(dst);
  371. for i:=2 to tcgsize2size[size] do
  372. begin
  373. list.concat(taicpu.op_const_reg(A_SBCI,-1,dst));
  374. tmpreg:=GetNextReg(tmpreg);
  375. end;
  376. end
  377. else
  378. list.concat(taicpu.op_reg(A_NEG,dst));
  379. end;
  380. OP_NOT:
  381. begin
  382. for i:=1 to tcgsize2size[size] do
  383. begin
  384. if src<>dst then
  385. a_load_reg_reg(list,OS_8,OS_8,src,dst);
  386. list.concat(taicpu.op_reg(A_COM,dst));
  387. src:=GetNextReg(src);
  388. dst:=GetNextReg(dst);
  389. end;
  390. end;
  391. OP_MUL,OP_IMUL:
  392. begin
  393. if size in [OS_8,OS_S8] then
  394. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src))
  395. else
  396. internalerror(2011022002);
  397. end;
  398. OP_DIV,OP_IDIV:
  399. { special stuff, needs separate handling inside code }
  400. { generator }
  401. internalerror(2011022001);
  402. OP_SHR,OP_SHL,OP_SAR,OP_ROL,OP_ROR:
  403. begin
  404. {!!!!!!!}
  405. end;
  406. OP_AND,OP_OR,OP_XOR:
  407. begin
  408. if src<>dst then
  409. a_load_reg_reg(list,size,size,src,dst);
  410. for i:=1 to tcgsize2size[size] do
  411. begin
  412. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  413. dst:=GetNextReg(dst);
  414. src:=GetNextReg(src);
  415. end;
  416. end;
  417. else
  418. internalerror(2011022004);
  419. end;
  420. end;
  421. procedure tcgavr.a_load_const_reg(list : TAsmList; size: tcgsize; a : aint;reg : tregister);
  422. var
  423. mask : qword;
  424. shift : byte;
  425. i : byte;
  426. begin
  427. mask:=$ff;
  428. shift:=0;
  429. for i:=1 to tcgsize2size[size] do
  430. begin
  431. list.concat(taicpu.op_reg_const(A_LDI,reg,(qword(a) and mask) shr shift));
  432. mask:=mask shl 8;
  433. inc(shift,8);
  434. reg:=GetNextReg(reg);
  435. end;
  436. end;
  437. function tcgavr.normalize_ref(list:TAsmList;ref: treference):treference;
  438. var
  439. tmpreg : tregister;
  440. tmpref : treference;
  441. l : tasmlabel;
  442. begin
  443. tmpreg:=NR_NO;
  444. Result:=ref;
  445. if ref.addressmode<>AM_UNCHANGED then
  446. internalerror(2011021701);
  447. { Be sure to have a base register }
  448. if (ref.base=NR_NO) then
  449. begin
  450. { only symbol+offset? }
  451. if ref.index=NR_NO then
  452. exit;
  453. ref.base:=ref.index;
  454. ref.index:=NR_NO;
  455. end;
  456. if assigned(ref.symbol) or (ref.offset<>0) then
  457. begin
  458. tmpreg:=getaddressregister(list);
  459. reference_reset(tmpref,0);
  460. tmpref.symbol:=ref.symbol;
  461. tmpref.offset:=lo(word(ref.offset));
  462. tmpref.refaddr:=addr_lo8;
  463. list.concat(taicpu.op_reg_ref(A_LDI,tmpreg,tmpref));
  464. tmpref.offset:=hi(word(ref.offset));
  465. tmpref.refaddr:=addr_hi8;
  466. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(tmpreg),tmpref));
  467. if (ref.base<>NR_NO) then
  468. begin
  469. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  470. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  471. end;
  472. if (ref.index<>NR_NO) then
  473. begin
  474. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  475. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  476. end;
  477. ref.base:=tmpreg;
  478. ref.index:=NR_NO;
  479. end
  480. else if (ref.base<>NR_NO) and (ref.index<>NR_NO) then
  481. begin
  482. tmpreg:=getaddressregister(list);
  483. list.concat(taicpu.op_reg_reg(A_MOVW,tmpreg,ref.index));
  484. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  485. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  486. ref.base:=tmpreg;
  487. ref.index:=NR_NO;
  488. end;
  489. Result:=ref;
  490. end;
  491. procedure tcgavr.a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);
  492. var
  493. href : treference;
  494. conv_done: boolean;
  495. tmpreg : tregister;
  496. i : integer;
  497. begin
  498. href:=normalize_ref(list,Ref);
  499. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  500. internalerror(2011021307);
  501. conv_done:=false;
  502. if tosize<>fromsize then
  503. begin
  504. conv_done:=true;
  505. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  506. fromsize:=tosize;
  507. case fromsize of
  508. OS_8:
  509. begin
  510. if (href.base<>NR_NO) and (tcgsize2size[tosize]>1) then
  511. href.addressmode:=AM_POSTINCREMENT;
  512. list.concat(taicpu.op_ref_reg(A_ST,href,reg));
  513. for i:=2 to tcgsize2size[tosize] do
  514. begin
  515. if (href.offset<>0) or assigned(href.symbol) then
  516. inc(href.offset);
  517. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  518. href.addressmode:=AM_POSTINCREMENT
  519. else
  520. href.addressmode:=AM_UNCHANGED;
  521. list.concat(taicpu.op_ref_reg(A_ST,href,NR_R1));
  522. end;
  523. end;
  524. OS_S8:
  525. begin
  526. if (href.base<>NR_NO) and (tcgsize2size[tosize]>1) then
  527. href.addressmode:=AM_POSTINCREMENT;
  528. list.concat(taicpu.op_ref_reg(A_ST,href,reg));
  529. if tcgsize2size[tosize]>1 then
  530. begin
  531. tmpreg:=getintregister(list,OS_8);
  532. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  533. list.concat(taicpu.op_reg_const(A_SBIC,reg,7));
  534. list.concat(taicpu.op_reg(A_COM,tmpreg));
  535. for i:=2 to tcgsize2size[tosize] do
  536. begin
  537. if (href.offset<>0) or assigned(href.symbol) then
  538. inc(href.offset);
  539. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  540. href.addressmode:=AM_POSTINCREMENT
  541. else
  542. href.addressmode:=AM_UNCHANGED;
  543. list.concat(taicpu.op_ref_reg(A_ST,href,tmpreg));
  544. end;
  545. end;
  546. end;
  547. OS_16:
  548. begin
  549. if (href.base<>NR_NO) and (tcgsize2size[tosize]>1) then
  550. href.addressmode:=AM_POSTINCREMENT;
  551. list.concat(taicpu.op_ref_reg(A_ST,href,reg));
  552. if (href.offset<>0) or assigned(href.symbol) then
  553. inc(href.offset)
  554. else if (href.base<>NR_NO) and (tcgsize2size[fromsize]>2) then
  555. href.addressmode:=AM_POSTINCREMENT
  556. else
  557. href.addressmode:=AM_UNCHANGED;
  558. reg:=GetNextReg(reg);
  559. list.concat(taicpu.op_ref_reg(A_ST,href,reg));
  560. for i:=3 to tcgsize2size[tosize] do
  561. begin
  562. if (href.offset<>0) or assigned(href.symbol) then
  563. inc(href.offset);
  564. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  565. href.addressmode:=AM_POSTINCREMENT
  566. else
  567. href.addressmode:=AM_UNCHANGED;
  568. list.concat(taicpu.op_ref_reg(A_ST,href,NR_R1));
  569. end;
  570. end;
  571. OS_S16:
  572. begin
  573. if (href.base<>NR_NO) and (tcgsize2size[tosize]>1) then
  574. href.addressmode:=AM_POSTINCREMENT;
  575. list.concat(taicpu.op_ref_reg(A_ST,href,reg));
  576. if (href.offset<>0) or assigned(href.symbol) then
  577. inc(href.offset)
  578. else if (href.base<>NR_NO) and (tcgsize2size[fromsize]>2) then
  579. href.addressmode:=AM_POSTINCREMENT
  580. else
  581. href.addressmode:=AM_UNCHANGED;
  582. reg:=GetNextReg(reg);
  583. list.concat(taicpu.op_ref_reg(A_ST,href,reg));
  584. if tcgsize2size[tosize]>2 then
  585. begin
  586. tmpreg:=getintregister(list,OS_8);
  587. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  588. list.concat(taicpu.op_reg_const(A_SBIC,reg,7));
  589. list.concat(taicpu.op_reg(A_COM,tmpreg));
  590. for i:=3 to tcgsize2size[tosize] do
  591. begin
  592. if (href.offset<>0) or assigned(href.symbol) then
  593. inc(href.offset);
  594. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  595. href.addressmode:=AM_POSTINCREMENT
  596. else
  597. href.addressmode:=AM_UNCHANGED;
  598. list.concat(taicpu.op_ref_reg(A_ST,href,tmpreg));
  599. end;
  600. end;
  601. end;
  602. else
  603. conv_done:=false;
  604. end;
  605. end;
  606. if not conv_done then
  607. begin
  608. for i:=1 to tcgsize2size[fromsize] do
  609. begin
  610. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  611. href.addressmode:=AM_POSTINCREMENT
  612. else
  613. href.addressmode:=AM_UNCHANGED;
  614. list.concat(taicpu.op_ref_reg(A_ST,href,reg));
  615. if (href.offset<>0) or assigned(href.symbol) then
  616. inc(href.offset);
  617. reg:=GetNextReg(reg);
  618. end;
  619. end;
  620. end;
  621. procedure tcgavr.a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;
  622. const Ref : treference;reg : tregister);
  623. var
  624. href : treference;
  625. conv_done: boolean;
  626. tmpreg : tregister;
  627. i : integer;
  628. begin
  629. href:=normalize_ref(list,Ref);
  630. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  631. internalerror(2011021307);
  632. conv_done:=false;
  633. if tosize<>fromsize then
  634. begin
  635. conv_done:=true;
  636. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  637. fromsize:=tosize;
  638. case fromsize of
  639. OS_8:
  640. begin
  641. list.concat(taicpu.op_reg_ref(A_LD,reg,href));
  642. for i:=2 to tcgsize2size[tosize] do
  643. begin
  644. reg:=GetNextReg(reg);
  645. list.concat(taicpu.op_reg(A_CLR,reg));
  646. end;
  647. end;
  648. OS_S8:
  649. begin
  650. list.concat(taicpu.op_reg_ref(A_LD,reg,href));
  651. tmpreg:=reg;
  652. if tcgsize2size[tosize]>1 then
  653. begin
  654. reg:=GetNextReg(reg);
  655. list.concat(taicpu.op_reg(A_CLR,reg));
  656. list.concat(taicpu.op_reg_const(A_SBIC,tmpreg,7));
  657. list.concat(taicpu.op_reg(A_COM,reg));
  658. tmpreg:=reg;
  659. for i:=3 to tcgsize2size[tosize] do
  660. begin
  661. reg:=GetNextReg(reg);
  662. emit_mov(list,reg,tmpreg);
  663. end;
  664. end;
  665. end;
  666. OS_16:
  667. begin
  668. if href.base<>NR_NO then
  669. href.addressmode:=AM_POSTINCREMENT;
  670. list.concat(taicpu.op_reg_ref(A_LD,reg,href));
  671. if (href.offset<>0) or assigned(href.symbol) then
  672. inc(href.offset);
  673. href.addressmode:=AM_UNCHANGED;
  674. reg:=GetNextReg(reg);
  675. list.concat(taicpu.op_reg_ref(A_LD,reg,href));
  676. for i:=3 to tcgsize2size[tosize] do
  677. begin
  678. reg:=GetNextReg(reg);
  679. list.concat(taicpu.op_reg(A_CLR,reg));
  680. end;
  681. end;
  682. OS_S16:
  683. begin
  684. if href.base<>NR_NO then
  685. href.addressmode:=AM_POSTINCREMENT;
  686. list.concat(taicpu.op_reg_ref(A_LD,reg,href));
  687. if (href.offset<>0) or assigned(href.symbol) then
  688. inc(href.offset);
  689. href.addressmode:=AM_UNCHANGED;
  690. reg:=GetNextReg(reg);
  691. list.concat(taicpu.op_reg_ref(A_LD,reg,href));
  692. tmpreg:=reg;
  693. reg:=GetNextReg(reg);
  694. list.concat(taicpu.op_reg(A_CLR,reg));
  695. list.concat(taicpu.op_reg_const(A_SBIC,tmpreg,7));
  696. list.concat(taicpu.op_reg(A_COM,reg));
  697. tmpreg:=reg;
  698. for i:=4 to tcgsize2size[tosize] do
  699. begin
  700. reg:=GetNextReg(reg);
  701. emit_mov(list,reg,tmpreg);
  702. end;
  703. end;
  704. else
  705. conv_done:=false;
  706. end;
  707. end;
  708. if not conv_done then
  709. begin
  710. for i:=1 to tcgsize2size[fromsize] do
  711. begin
  712. if (href.base<>NR_NO) and (i<tcgsize2size[fromsize]) then
  713. href.addressmode:=AM_POSTINCREMENT
  714. else
  715. href.addressmode:=AM_UNCHANGED;
  716. list.concat(taicpu.op_reg_ref(A_LD,reg,href));
  717. if (href.offset<>0) or assigned(href.symbol) then
  718. inc(href.offset);
  719. reg:=GetNextReg(reg);
  720. end;
  721. end;
  722. end;
  723. procedure tcgavr.a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);
  724. var
  725. conv_done: boolean;
  726. tmpreg : tregister;
  727. i : integer;
  728. begin
  729. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  730. internalerror(2011021310);
  731. conv_done:=false;
  732. if tosize<>fromsize then
  733. begin
  734. conv_done:=true;
  735. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  736. fromsize:=tosize;
  737. case fromsize of
  738. OS_8:
  739. begin
  740. emit_mov(list,reg2,reg1);
  741. for i:=2 to tcgsize2size[tosize] do
  742. begin
  743. reg2:=GetNextReg(reg2);
  744. list.concat(taicpu.op_reg(A_CLR,reg2));
  745. end;
  746. end;
  747. OS_S8:
  748. begin
  749. { dest is always at least 16 bit at this point }
  750. emit_mov(list,reg2,reg1);
  751. reg2:=GetNextReg(reg2);
  752. list.concat(taicpu.op_reg(A_CLR,reg2));
  753. list.concat(taicpu.op_reg_const(A_SBIC,reg1,7));
  754. list.concat(taicpu.op_reg(A_COM,reg2));
  755. tmpreg:=reg2;
  756. for i:=3 to tcgsize2size[tosize] do
  757. begin
  758. reg2:=GetNextReg(reg2);
  759. emit_mov(list,reg2,tmpreg);
  760. end;
  761. end;
  762. OS_16:
  763. begin
  764. emit_mov(list,reg2,reg1);
  765. reg1:=GetNextReg(reg1);
  766. reg2:=GetNextReg(reg2);
  767. emit_mov(list,reg2,reg1);
  768. for i:=3 to tcgsize2size[tosize] do
  769. begin
  770. reg2:=GetNextReg(reg2);
  771. list.concat(taicpu.op_reg(A_CLR,reg2));
  772. end;
  773. end;
  774. OS_S16:
  775. begin
  776. { dest is always at least 32 bit at this point }
  777. emit_mov(list,reg2,reg1);
  778. reg1:=GetNextReg(reg1);
  779. reg2:=GetNextReg(reg2);
  780. emit_mov(list,reg2,reg1);
  781. reg2:=GetNextReg(reg2);
  782. list.concat(taicpu.op_reg(A_CLR,reg2));
  783. list.concat(taicpu.op_reg_const(A_SBIC,reg1,7));
  784. list.concat(taicpu.op_reg(A_COM,reg2));
  785. tmpreg:=reg2;
  786. for i:=4 to tcgsize2size[tosize] do
  787. begin
  788. reg2:=GetNextReg(reg2);
  789. emit_mov(list,reg2,tmpreg);
  790. end;
  791. end;
  792. else
  793. conv_done:=false;
  794. end;
  795. end;
  796. if not conv_done and (reg1<>reg2) then
  797. begin
  798. for i:=1 to tcgsize2size[fromsize] do
  799. begin
  800. emit_mov(list,reg2,reg1);
  801. reg1:=GetNextReg(reg1);
  802. reg2:=GetNextReg(reg2);
  803. end;
  804. end;
  805. end;
  806. { comparison operations }
  807. procedure tcgavr.a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  808. l : tasmlabel);
  809. begin
  810. internalerror(2011021311);
  811. end;
  812. procedure tcgavr.a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
  813. begin
  814. internalerror(2011021312);
  815. end;
  816. procedure tcgavr.a_jmp_name(list : TAsmList;const s : string);
  817. begin
  818. internalerror(2011021313);
  819. end;
  820. procedure tcgavr.a_jmp_always(list : TAsmList;l: tasmlabel);
  821. var
  822. ai : taicpu;
  823. begin
  824. ai:=taicpu.op_sym(A_JMP,l);
  825. ai.is_jmp:=true;
  826. list.concat(ai);
  827. end;
  828. procedure tcgavr.a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel);
  829. var
  830. ai : taicpu;
  831. begin
  832. ai:=setcondition(taicpu.op_sym(A_BRxx,l),flags_to_cond(f));
  833. ai.is_jmp:=true;
  834. list.concat(ai);
  835. end;
  836. procedure tcgavr.g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister);
  837. begin
  838. internalerror(2011021316);
  839. end;
  840. procedure tcgavr.a_adjust_sp(list : TAsmList; value : longint);
  841. var
  842. i : integer;
  843. begin
  844. case value of
  845. 0:
  846. ;
  847. -14..-1:
  848. begin
  849. if ((-value) mod 2)<>0 then
  850. list.concat(taicpu.op_reg(A_PUSH,NR_R0));
  851. for i:=1 to (-value) div 2 do
  852. list.concat(taicpu.op_const(A_RCALL,0));
  853. end;
  854. 1..7:
  855. begin
  856. for i:=1 to value do
  857. list.concat(taicpu.op_reg(A_POP,NR_R0));
  858. end;
  859. else
  860. begin
  861. list.concat(taicpu.op_reg_const(A_SUBI,NR_R28,lo(word(-value))));
  862. list.concat(taicpu.op_reg_const(A_SBCI,NR_R29,hi(word(-value))));
  863. // get SREG
  864. list.concat(taicpu.op_reg_const(A_IN,NR_R0,NIO_SREG));
  865. // block interrupts
  866. list.concat(taicpu.op_none(A_CLI));
  867. // write high SP
  868. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_HI,NR_R29));
  869. // release interrupts
  870. list.concat(taicpu.op_const_reg(A_OUT,NIO_SREG,NR_R0));
  871. // write low SP
  872. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_LO,NR_R28));
  873. end;
  874. end;
  875. end;
  876. procedure tcgavr.g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);
  877. var
  878. regs : tcpuregisterset;
  879. reg : tsuperregister;
  880. begin
  881. if not(nostackframe) then
  882. begin
  883. { save int registers }
  884. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  885. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  886. regs:=regs+[RS_R28,RS_R29];
  887. for reg:=RS_R31 downto RS_R0 do
  888. if reg in regs then
  889. list.concat(taicpu.op_reg(A_PUSH,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  890. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  891. begin
  892. list.concat(taicpu.op_reg_const(A_IN,NR_R28,NIO_SP_LO));
  893. list.concat(taicpu.op_reg_const(A_IN,NR_R29,NIO_SP_HI));
  894. end
  895. else
  896. { the framepointer cannot be omitted on avr because sp
  897. is not a register but part of the i/o map
  898. }
  899. internalerror(2011021901);
  900. a_adjust_sp(list,-localsize);
  901. end;
  902. end;
  903. procedure tcgavr.g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean);
  904. var
  905. regs : tcpuregisterset;
  906. reg : TSuperRegister;
  907. LocalSize : longint;
  908. begin
  909. if not(nostackframe) then
  910. begin
  911. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  912. begin
  913. LocalSize:=current_procinfo.calc_stackframe_size;
  914. a_adjust_sp(list,LocalSize);
  915. for reg:=RS_R0 to RS_R31 do
  916. if reg in regs then
  917. list.concat(taicpu.op_reg(A_POP,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  918. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  919. end
  920. else
  921. { the framepointer cannot be omitted on avr because sp
  922. is not a register but part of the i/o map
  923. }
  924. internalerror(2011021902);
  925. end;
  926. list.concat(taicpu.op_none(A_RET));
  927. end;
  928. procedure tcgavr.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
  929. begin
  930. //!!!!
  931. end;
  932. procedure tcgavr.fixref(list : TAsmList;var ref : treference);
  933. begin
  934. internalerror(2011021320);
  935. end;
  936. procedure tcgavr.g_concatcopy_move(list : TAsmList;const source,dest : treference;len : aint);
  937. var
  938. paraloc1,paraloc2,paraloc3 : TCGPara;
  939. begin
  940. paraloc1.init;
  941. paraloc2.init;
  942. paraloc3.init;
  943. paramanager.getintparaloc(pocall_default,1,paraloc1);
  944. paramanager.getintparaloc(pocall_default,2,paraloc2);
  945. paramanager.getintparaloc(pocall_default,3,paraloc3);
  946. a_load_const_cgpara(list,OS_INT,len,paraloc3);
  947. a_loadaddr_ref_cgpara(list,dest,paraloc2);
  948. a_loadaddr_ref_cgpara(list,source,paraloc1);
  949. paramanager.freecgpara(list,paraloc3);
  950. paramanager.freecgpara(list,paraloc2);
  951. paramanager.freecgpara(list,paraloc1);
  952. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  953. a_call_name_static(list,'FPC_MOVE');
  954. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  955. paraloc3.done;
  956. paraloc2.done;
  957. paraloc1.done;
  958. end;
  959. procedure tcgavr.g_concatcopy_internal(list : TAsmList;const source,dest : treference;len : aint;aligned : boolean);
  960. begin
  961. internalerror(2011021321);
  962. end;
  963. procedure tcgavr.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  964. begin
  965. g_concatcopy_internal(list,source,dest,len,false);
  966. end;
  967. procedure tcgavr.g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);
  968. var
  969. countreg,tmpreg : tregister;
  970. srcref,dstref : treference;
  971. copysize,countregsize : tcgsize;
  972. l : TAsmLabel;
  973. i : longint;
  974. begin
  975. current_asmdata.getjumplabel(l);
  976. if len>16 then
  977. begin
  978. {!!!!!!! load refs!}
  979. copysize:=OS_8;
  980. if len<256 then
  981. countregsize:=OS_8
  982. else if len<65536 then
  983. countregsize:=OS_16
  984. else
  985. internalerror(2011022007);
  986. countreg:=getintregister(list,countregsize);
  987. a_load_const_reg(list,countregsize,len,countreg);
  988. cg.a_label(list,l);
  989. tmpreg:=getintregister(list,copysize);
  990. list.concat(taicpu.op_reg_ref(A_LD,tmpreg,srcref));
  991. list.concat(taicpu.op_ref_reg(A_ST,dstref,tmpreg));
  992. a_op_const_reg(list,OP_SUB,countregsize,1,countreg);
  993. a_jmp_flags(list,F_NE,l);
  994. end
  995. else
  996. begin
  997. for i:=1 to len do
  998. begin
  999. srcref:=normalize_ref(list,source);
  1000. dstref:=normalize_ref(list,source);
  1001. copysize:=OS_8;
  1002. tmpreg:=getintregister(list,copysize);
  1003. if (srcref.base<>NR_NO) and (i<len) then
  1004. srcref.addressmode:=AM_POSTINCREMENT
  1005. else
  1006. srcref.addressmode:=AM_UNCHANGED;
  1007. if (dstref.base<>NR_NO) and (i<len) then
  1008. dstref.addressmode:=AM_POSTINCREMENT
  1009. else
  1010. dstref.addressmode:=AM_UNCHANGED;
  1011. list.concat(taicpu.op_reg_ref(A_LD,tmpreg,srcref));
  1012. list.concat(taicpu.op_ref_reg(A_ST,dstref,tmpreg));
  1013. if (dstref.offset<>0) or assigned(dstref.symbol) then
  1014. inc(dstref.offset);
  1015. if (srcref.offset<>0) or assigned(srcref.symbol) then
  1016. inc(srcref.offset);
  1017. end;
  1018. end;
  1019. end;
  1020. procedure tcgavr.g_overflowCheck(list : TAsmList;const l : tlocation;def : tdef);
  1021. var
  1022. hl : tasmlabel;
  1023. ai : taicpu;
  1024. cond : TAsmCond;
  1025. begin
  1026. if not(cs_check_overflow in current_settings.localswitches) then
  1027. exit;
  1028. current_asmdata.getjumplabel(hl);
  1029. if not ((def.typ=pointerdef) or
  1030. ((def.typ=orddef) and
  1031. (torddef(def).ordtype in [u64bit,u16bit,u32bit,u8bit,uchar,pasbool]))) then
  1032. cond:=C_VC
  1033. else
  1034. cond:=C_CC;
  1035. ai:=Taicpu.Op_Sym(A_BRxx,hl);
  1036. ai.SetCondition(cond);
  1037. ai.is_jmp:=true;
  1038. list.concat(ai);
  1039. a_call_name(list,'FPC_OVERFLOW',false);
  1040. a_label(list,hl);
  1041. end;
  1042. procedure tcgavr.a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  1043. var
  1044. ai : taicpu;
  1045. begin
  1046. {!!!!!
  1047. ai:=Taicpu.Op_sym(A_BRxx,l);
  1048. case cond of
  1049. OC_EQ:
  1050. ai.SetCondition(C_EQ);
  1051. OC_GT
  1052. OC_LT
  1053. OC_GTE
  1054. OC_LTE
  1055. OC_NE
  1056. OC_BE
  1057. OC_B
  1058. OC_AE
  1059. OC_A:
  1060. ai.is_jmp:=true;
  1061. list.concat(ai);
  1062. }
  1063. end;
  1064. procedure tcgavr.g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);
  1065. begin
  1066. internalerror(2011021324);
  1067. end;
  1068. procedure tcgavr.emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  1069. var
  1070. instr: taicpu;
  1071. begin
  1072. instr:=taicpu.op_reg_reg(A_MOV,reg2,reg1);
  1073. list.Concat(instr);
  1074. { Notify the register allocator that we have written a move instruction so
  1075. it can try to eliminate it. }
  1076. add_move_instruction(instr);
  1077. end;
  1078. procedure tcg64favr.a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);
  1079. begin
  1080. internalerror(2011021325);
  1081. end;
  1082. procedure tcg64favr.a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);
  1083. begin
  1084. a_op64_const_reg_reg(list,op,size,value,reg,reg);
  1085. end;
  1086. procedure tcg64favr.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);
  1087. var
  1088. ovloc : tlocation;
  1089. begin
  1090. a_op64_const_reg_reg_checkoverflow(list,op,size,value,regsrc,regdst,false,ovloc);
  1091. end;
  1092. procedure tcg64favr.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  1093. var
  1094. ovloc : tlocation;
  1095. begin
  1096. a_op64_reg_reg_reg_checkoverflow(list,op,size,regsrc1,regsrc2,regdst,false,ovloc);
  1097. end;
  1098. procedure tcg64favr.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  1099. begin
  1100. internalerror(2011021326);
  1101. end;
  1102. procedure tcg64favr.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  1103. begin
  1104. internalerror(2011021327);
  1105. end;
  1106. procedure create_codegen;
  1107. begin
  1108. cg:=tcgavr.create;
  1109. cg64:=tcg64favr.create;
  1110. end;
  1111. end.