cgobj.pas 191 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,constexp,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symtype,symdef,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. tsubsetloadopt = (SL_REG,SL_REGNOSRCMASK,SL_SETZERO,SL_SETMAX);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overridden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. should be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. { how many times is this current code executed }
  48. executionweight : longint;
  49. alignment : talignment;
  50. rg : array[tregistertype] of trgobj;
  51. {$ifdef flowgraph}
  52. aktflownode:word;
  53. {$endif}
  54. {************************************************}
  55. { basic routines }
  56. constructor create;
  57. {# Initialize the register allocators needed for the codegenerator.}
  58. procedure init_register_allocators;virtual;
  59. {# Clean up the register allocators needed for the codegenerator.}
  60. procedure done_register_allocators;virtual;
  61. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  62. procedure set_regalloc_live_range_direction(dir: TRADirection);
  63. {$ifdef flowgraph}
  64. procedure init_flowgraph;
  65. procedure done_flowgraph;
  66. {$endif}
  67. {# Gets a register suitable to do integer operations on.}
  68. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  69. {# Gets a register suitable to do integer operations on.}
  70. function getaddressregister(list:TAsmList):Tregister;virtual;
  71. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  73. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  74. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  75. the cpu specific child cg object have such a method?}
  76. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  77. procedure add_move_instruction(instr:Taicpu);virtual;
  78. function uses_registers(rt:Tregistertype):boolean;virtual;
  79. {# Get a specific register.}
  80. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  81. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  82. {# Get multiple registers specified.}
  83. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  84. {# Free multiple registers specified.}
  85. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  86. procedure allocallcpuregisters(list:TAsmList);virtual;
  87. procedure deallocallcpuregisters(list:TAsmList);virtual;
  88. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  89. procedure translate_register(var reg : tregister);
  90. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  91. {# Emit a label to the instruction stream. }
  92. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  93. {# Allocates register r by inserting a pai_realloc record }
  94. procedure a_reg_alloc(list : TAsmList;r : tregister);
  95. {# Deallocates register r by inserting a pa_regdealloc record}
  96. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  97. { Synchronize register, make sure it is still valid }
  98. procedure a_reg_sync(list : TAsmList;r : tregister);
  99. {# Pass a parameter, which is located in a register, to a routine.
  100. This routine should push/send the parameter to the routine, as
  101. required by the specific processor ABI and routine modifiers.
  102. It must generate register allocation information for the cgpara in
  103. case it consists of cpuregisters.
  104. @param(size size of the operand in the register)
  105. @param(r register source of the operand)
  106. @param(cgpara where the parameter will be stored)
  107. }
  108. procedure a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  109. {# Pass a parameter, which is a constant, to a routine.
  110. A generic version is provided. This routine should
  111. be overridden for optimization purposes if the cpu
  112. permits directly sending this type of parameter.
  113. It must generate register allocation information for the cgpara in
  114. case it consists of cpuregisters.
  115. @param(size size of the operand in constant)
  116. @param(a value of constant to send)
  117. @param(cgpara where the parameter will be stored)
  118. }
  119. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const cgpara : TCGPara);virtual;
  120. {# Pass the value of a parameter, which is located in memory, to a routine.
  121. A generic version is provided. This routine should
  122. be overridden for optimization purposes if the cpu
  123. permits directly sending this type of parameter.
  124. It must generate register allocation information for the cgpara in
  125. case it consists of cpuregisters.
  126. @param(size size of the operand in constant)
  127. @param(r Memory reference of value to send)
  128. @param(cgpara where the parameter will be stored)
  129. }
  130. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  131. {# Pass the value of a parameter, which can be located either in a register or memory location,
  132. to a routine.
  133. A generic version is provided.
  134. @param(l location of the operand to send)
  135. @param(nr parameter number (starting from one) of routine (from left to right))
  136. @param(cgpara where the parameter will be stored)
  137. }
  138. procedure a_load_loc_cgpara(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  139. {# Pass the address of a reference to a routine. This routine
  140. will calculate the address of the reference, and pass this
  141. calculated address as a parameter.
  142. It must generate register allocation information for the cgpara in
  143. case it consists of cpuregisters.
  144. A generic version is provided. This routine should
  145. be overridden for optimization purposes if the cpu
  146. permits directly sending this type of parameter.
  147. @param(r reference to get address from)
  148. @param(nr parameter number (starting from one) of routine (from left to right))
  149. }
  150. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  151. {# Load a cgparaloc into a memory reference.
  152. It must generate register allocation information for the cgpara in
  153. case it consists of cpuregisters.
  154. @param(paraloc the source parameter sublocation)
  155. @param(ref the destination reference)
  156. @param(sizeleft indicates the total number of bytes left in all of
  157. the remaining sublocations of this parameter (the current
  158. sublocation and all of the sublocations coming after it).
  159. In case this location is also a reference, it is assumed
  160. to be the final part sublocation of the parameter and that it
  161. contains all of the "sizeleft" bytes).)
  162. @param(align the alignment of the paraloc in case it's a reference)
  163. }
  164. procedure a_load_cgparaloc_ref(list : TAsmList;const paraloc : TCGParaLocation;const ref : treference;sizeleft : tcgint;align : longint);
  165. {# Load a cgparaloc into any kind of register (int, fp, mm).
  166. @param(regsize the size of the destination register)
  167. @param(paraloc the source parameter sublocation)
  168. @param(reg the destination register)
  169. @param(align the alignment of the paraloc in case it's a reference)
  170. }
  171. procedure a_load_cgparaloc_anyreg(list : TAsmList;regsize : tcgsize;const paraloc : TCGParaLocation;reg : tregister;align : longint);
  172. { Remarks:
  173. * If a method specifies a size you have only to take care
  174. of that number of bits, i.e. load_const_reg with OP_8 must
  175. only load the lower 8 bit of the specified register
  176. the rest of the register can be undefined
  177. if necessary the compiler will call a method
  178. to zero or sign extend the register
  179. * The a_load_XX_XX with OP_64 needn't to be
  180. implemented for 32 bit
  181. processors, the code generator takes care of that
  182. * the addr size is for work with the natural pointer
  183. size
  184. * the procedures without fpu/mm are only for integer usage
  185. * normally the first location is the source and the
  186. second the destination
  187. }
  188. {# Emits instruction to call the method specified by symbol name.
  189. This routine must be overridden for each new target cpu.
  190. }
  191. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);virtual; abstract;
  192. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  193. procedure a_call_ref(list : TAsmList;ref : treference);virtual;
  194. { same as a_call_name, might be overridden on certain architectures to emit
  195. static calls without usage of a got trampoline }
  196. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  197. { move instructions }
  198. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : tcgint;register : tregister);virtual; abstract;
  199. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : tcgint;const ref : treference);virtual;
  200. procedure a_load_const_loc(list : TAsmList;a : tcgint;const loc : tlocation);
  201. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  202. procedure a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual;
  203. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  204. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  205. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  206. procedure a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual;
  207. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  208. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  209. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  210. procedure a_load_loc_subsetreg(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  211. procedure a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  212. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  213. procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); virtual;
  214. procedure a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister); virtual;
  215. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister); virtual;
  216. procedure a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference); virtual;
  217. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister); virtual;
  218. procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: tcgint; const sreg: tsubsetregister); virtual;
  219. procedure a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation); virtual;
  220. procedure a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister); virtual;
  221. procedure a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  222. procedure a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference); virtual;
  223. procedure a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference); virtual;
  224. procedure a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference); virtual;
  225. procedure a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: tcgint; const sref: tsubsetreference); virtual;
  226. procedure a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation); virtual;
  227. procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister); virtual;
  228. procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference); virtual;
  229. { bit test instructions }
  230. procedure a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister); virtual;
  231. procedure a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: tcgint; const ref: treference; destreg: tregister); virtual;
  232. procedure a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: tcgint; setreg, destreg: tregister); virtual;
  233. procedure a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: tcgint; const setreg: tsubsetregister; destreg: tregister); virtual;
  234. procedure a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister); virtual;
  235. procedure a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  236. procedure a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: tcgint; const loc: tlocation; destreg: tregister);
  237. { bit set/clear instructions }
  238. procedure a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister); virtual;
  239. procedure a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: tcgint; const ref: treference); virtual;
  240. procedure a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: tcgint; destreg: tregister); virtual;
  241. procedure a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: tcgint; const destreg: tsubsetregister); virtual;
  242. procedure a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference); virtual;
  243. procedure a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  244. procedure a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: tcgint; const loc: tlocation);
  245. { bit scan instructions }
  246. procedure a_bit_scan_reg_reg(list: TAsmList; reverse: boolean; size: tcgsize; src, dst: TRegister); virtual; abstract;
  247. { fpu move instructions }
  248. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize:tcgsize; reg1, reg2: tregister); virtual; abstract;
  249. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  250. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  251. procedure a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  252. procedure a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  253. procedure a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  254. procedure a_loadfpu_reg_cgpara(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  255. procedure a_loadfpu_ref_cgpara(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  256. { vector register move instructions }
  257. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual;
  258. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  259. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual;
  260. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  261. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  262. procedure a_loadmm_reg_cgpara(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  263. procedure a_loadmm_ref_cgpara(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  264. procedure a_loadmm_loc_cgpara(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  265. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;
  266. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  267. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  268. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  269. procedure a_loadmm_intreg_reg(list: TAsmList; fromsize, tosize : tcgsize; intreg, mmreg: tregister; shuffle: pmmshuffle); virtual;
  270. procedure a_loadmm_reg_intreg(list: TAsmList; fromsize, tosize : tcgsize; mmreg, intreg: tregister; shuffle : pmmshuffle); virtual;
  271. { basic arithmetic operations }
  272. { note: for operators which require only one argument (not, neg), use }
  273. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  274. { that in this case the *second* operand is used as both source and }
  275. { destination (JM) }
  276. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister); virtual; abstract;
  277. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; const ref: TReference); virtual;
  278. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : tcgint; const sreg: tsubsetregister); virtual;
  279. procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : tcgint; const sref: tsubsetreference); virtual;
  280. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: tcgint; const loc: tlocation);
  281. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  282. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  283. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  284. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister); virtual;
  285. procedure a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference); virtual;
  286. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  287. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  288. { trinary operations for processors that support them, 'emulated' }
  289. { on others. None with "ref" arguments since I don't think there }
  290. { are any processors that support it (JM) }
  291. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: tcgint; src, dst: tregister); virtual;
  292. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  293. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: tcgint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  294. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  295. { comparison operations }
  296. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;reg : tregister;
  297. l : tasmlabel); virtual;
  298. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;const ref : treference;
  299. l : tasmlabel); virtual;
  300. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: tcgint; const loc: tlocation;
  301. l : tasmlabel);
  302. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  303. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  304. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  305. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel); virtual;
  306. procedure a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel); virtual;
  307. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  308. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  309. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  310. l : tasmlabel);
  311. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  312. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  313. {$ifdef cpuflags}
  314. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  315. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  316. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  317. }
  318. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  319. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  320. {$endif cpuflags}
  321. {
  322. This routine tries to optimize the op_const_reg/ref opcode, and should be
  323. called at the start of a_op_const_reg/ref. It returns the actual opcode
  324. to emit, and the constant value to emit. This function can opcode OP_NONE to
  325. remove the opcode and OP_MOVE to replace it with a simple load
  326. @param(op The opcode to emit, returns the opcode which must be emitted)
  327. @param(a The constant which should be emitted, returns the constant which must
  328. be emitted)
  329. }
  330. procedure optimize_op_const(var op: topcg; var a : tcgint);virtual;
  331. {#
  332. This routine is used in exception management nodes. It should
  333. save the exception reason currently in the FUNCTION_RETURN_REG. The
  334. save should be done either to a temp (pointed to by href).
  335. or on the stack (pushing the value on the stack).
  336. The size of the value to save is OS_S32. The default version
  337. saves the exception reason to a temp. memory area.
  338. }
  339. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  340. {#
  341. This routine is used in exception management nodes. It should
  342. save the exception reason constant. The
  343. save should be done either to a temp (pointed to by href).
  344. or on the stack (pushing the value on the stack).
  345. The size of the value to save is OS_S32. The default version
  346. saves the exception reason to a temp. memory area.
  347. }
  348. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: tcgint);virtual;
  349. {#
  350. This routine is used in exception management nodes. It should
  351. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  352. should either be in the temp. area (pointed to by href , href should
  353. *NOT* be freed) or on the stack (the value should be popped).
  354. The size of the value to save is OS_S32. The default version
  355. saves the exception reason to a temp. memory area.
  356. }
  357. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  358. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  359. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  360. {# This should emit the opcode to copy len bytes from the source
  361. to destination.
  362. It must be overridden for each new target processor.
  363. @param(source Source reference of copy)
  364. @param(dest Destination reference of copy)
  365. }
  366. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);virtual; abstract;
  367. {# This should emit the opcode to copy len bytes from the an unaligned source
  368. to destination.
  369. It must be overridden for each new target processor.
  370. @param(source Source reference of copy)
  371. @param(dest Destination reference of copy)
  372. }
  373. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : tcgint);virtual;
  374. {# This should emit the opcode to a shortrstring from the source
  375. to destination.
  376. @param(source Source reference of copy)
  377. @param(dest Destination reference of copy)
  378. }
  379. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  380. procedure g_copyvariant(list : TAsmList;const source,dest : treference);
  381. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  382. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  383. procedure g_array_rtti_helper(list: TAsmList; t: tdef; const ref: treference; const highloc: tlocation;
  384. const name: string);
  385. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  386. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  387. {# Generates range checking code. It is to note
  388. that this routine does not need to be overridden,
  389. as it takes care of everything.
  390. @param(p Node which contains the value to check)
  391. @param(todef Type definition of node to range check)
  392. }
  393. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  394. {# Generates overflow checking code for a node }
  395. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  396. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  397. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:tcgint;destreg:tregister);virtual;
  398. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  399. {# Emits instructions when compilation is done in profile
  400. mode (this is set as a command line option). The default
  401. behavior does nothing, should be overridden as required.
  402. }
  403. procedure g_profilecode(list : TAsmList);virtual;
  404. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  405. @param(size Number of bytes to allocate)
  406. }
  407. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  408. {# Emits instruction for allocating the locals in entry
  409. code of a routine. This is one of the first
  410. routine called in @var(genentrycode).
  411. @param(localsize Number of bytes to allocate as locals)
  412. }
  413. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  414. {# Emits instructions for returning from a subroutine.
  415. Should also restore the framepointer and stack.
  416. @param(parasize Number of bytes of parameters to deallocate from stack)
  417. }
  418. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  419. {# This routine is called when generating the code for the entry point
  420. of a routine. It should save all registers which are not used in this
  421. routine, and which should be declared as saved in the std_saved_registers
  422. set.
  423. This routine is mainly used when linking to code which is generated
  424. by ABI-compliant compilers (like GCC), to make sure that the reserved
  425. registers of that ABI are not clobbered.
  426. @param(usedinproc Registers which are used in the code of this routine)
  427. }
  428. procedure g_save_registers(list:TAsmList);virtual;
  429. {# This routine is called when generating the code for the exit point
  430. of a routine. It should restore all registers which were previously
  431. saved in @var(g_save_standard_registers).
  432. @param(usedinproc Registers which are used in the code of this routine)
  433. }
  434. procedure g_restore_registers(list:TAsmList);virtual;
  435. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  436. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: tcgint);virtual;
  437. function g_indirect_sym_load(list:TAsmList;const symname: string; weak: boolean): tregister;virtual;
  438. { generate a stub which only purpose is to pass control the given external method,
  439. setting up any additional environment before doing so (if required).
  440. The default implementation issues a jump instruction to the external name. }
  441. procedure g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string); virtual;
  442. { initialize the pic/got register }
  443. procedure g_maybe_got_init(list: TAsmList); virtual;
  444. { allocallcpuregisters, a_call_name, deallocallcpuregisters sequence }
  445. procedure g_call(list: TAsmList; const s: string);
  446. { Generate code to exit an unwind-protected region. The default implementation
  447. produces a simple jump to destination label. }
  448. procedure g_local_unwind(list: TAsmList; l: TAsmLabel);virtual;
  449. protected
  450. procedure get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  451. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  452. procedure a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg: tregister); virtual;
  453. procedure a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt); virtual;
  454. procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); virtual;
  455. function get_bit_const_ref_sref(bitnumber: tcgint; const ref: treference): tsubsetreference;
  456. function get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: tcgint; setreg: tregister): tsubsetregister;
  457. function get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  458. end;
  459. {$ifndef cpu64bitalu}
  460. {# @abstract(Abstract code generator for 64 Bit operations)
  461. This class implements an abstract code generator class
  462. for 64 Bit operations.
  463. }
  464. tcg64 = class
  465. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  466. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  467. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  468. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  469. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  470. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  471. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  472. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  473. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  474. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  475. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  476. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  477. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  478. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  479. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  480. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  481. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  482. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  483. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  484. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  485. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  486. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  487. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  488. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  489. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  490. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  491. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  492. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  493. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  494. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  495. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  496. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  497. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  498. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  499. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  500. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  501. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  502. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  503. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  504. procedure a_load64_reg_cgpara(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  505. procedure a_load64_const_cgpara(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  506. procedure a_load64_ref_cgpara(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  507. procedure a_load64_loc_cgpara(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  508. procedure a_loadmm_intreg64_reg(list: TAsmList; mmsize: tcgsize; intreg: tregister64; mmreg: tregister); virtual;abstract;
  509. procedure a_loadmm_reg_intreg64(list: TAsmList; mmsize: tcgsize; mmreg: tregister; intreg: tregister64); virtual;abstract;
  510. {
  511. This routine tries to optimize the const_reg opcode, and should be
  512. called at the start of a_op64_const_reg. It returns the actual opcode
  513. to emit, and the constant value to emit. If this routine returns
  514. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  515. @param(op The opcode to emit, returns the opcode which must be emitted)
  516. @param(a The constant which should be emitted, returns the constant which must
  517. be emitted)
  518. @param(reg The register to emit the opcode with, returns the register with
  519. which the opcode will be emitted)
  520. }
  521. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  522. { override to catch 64bit rangechecks }
  523. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  524. end;
  525. {$endif cpu64bitalu}
  526. var
  527. {# Main code generator class }
  528. cg : tcg;
  529. {$ifndef cpu64bitalu}
  530. {# Code generator class for all operations working with 64-Bit operands }
  531. cg64 : tcg64;
  532. {$endif cpu64bitalu}
  533. procedure destroy_codegen;
  534. implementation
  535. uses
  536. globals,options,systems,
  537. verbose,defutil,paramgr,symsym,
  538. tgobj,cutils,procinfo,
  539. ncgrtti;
  540. {*****************************************************************************
  541. basic functionallity
  542. ******************************************************************************}
  543. constructor tcg.create;
  544. begin
  545. end;
  546. {*****************************************************************************
  547. register allocation
  548. ******************************************************************************}
  549. procedure tcg.init_register_allocators;
  550. begin
  551. fillchar(rg,sizeof(rg),0);
  552. add_reg_instruction_hook:=@add_reg_instruction;
  553. executionweight:=1;
  554. end;
  555. procedure tcg.done_register_allocators;
  556. begin
  557. { Safety }
  558. fillchar(rg,sizeof(rg),0);
  559. add_reg_instruction_hook:=nil;
  560. end;
  561. {$ifdef flowgraph}
  562. procedure Tcg.init_flowgraph;
  563. begin
  564. aktflownode:=0;
  565. end;
  566. procedure Tcg.done_flowgraph;
  567. begin
  568. end;
  569. {$endif}
  570. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  571. begin
  572. if not assigned(rg[R_INTREGISTER]) then
  573. internalerror(200312122);
  574. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(R_INTREGISTER,size));
  575. end;
  576. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  577. begin
  578. if not assigned(rg[R_FPUREGISTER]) then
  579. internalerror(200312123);
  580. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(R_FPUREGISTER,size));
  581. end;
  582. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  583. begin
  584. if not assigned(rg[R_MMREGISTER]) then
  585. internalerror(2003121214);
  586. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(R_MMREGISTER,size));
  587. end;
  588. function tcg.getaddressregister(list:TAsmList):Tregister;
  589. begin
  590. if assigned(rg[R_ADDRESSREGISTER]) then
  591. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  592. else
  593. begin
  594. if not assigned(rg[R_INTREGISTER]) then
  595. internalerror(200312121);
  596. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  597. end;
  598. end;
  599. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  600. var
  601. subreg:Tsubregister;
  602. begin
  603. subreg:=cgsize2subreg(getregtype(reg),size);
  604. result:=reg;
  605. setsubreg(result,subreg);
  606. { notify RA }
  607. if result<>reg then
  608. list.concat(tai_regalloc.resize(result));
  609. end;
  610. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  611. begin
  612. if not assigned(rg[getregtype(r)]) then
  613. internalerror(200312125);
  614. rg[getregtype(r)].getcpuregister(list,r);
  615. end;
  616. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  617. begin
  618. if not assigned(rg[getregtype(r)]) then
  619. internalerror(200312126);
  620. rg[getregtype(r)].ungetcpuregister(list,r);
  621. end;
  622. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  623. begin
  624. if assigned(rg[rt]) then
  625. rg[rt].alloccpuregisters(list,r)
  626. else
  627. internalerror(200310092);
  628. end;
  629. procedure tcg.allocallcpuregisters(list:TAsmList);
  630. begin
  631. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  632. {$if not(defined(i386)) and not(defined(avr))}
  633. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  634. {$ifdef cpumm}
  635. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  636. {$endif cpumm}
  637. {$endif not(defined(i386)) and not(defined(avr))}
  638. end;
  639. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  640. begin
  641. if assigned(rg[rt]) then
  642. rg[rt].dealloccpuregisters(list,r)
  643. else
  644. internalerror(200310093);
  645. end;
  646. procedure tcg.deallocallcpuregisters(list:TAsmList);
  647. begin
  648. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  649. {$if not(defined(i386)) and not(defined(avr))}
  650. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  651. {$ifdef cpumm}
  652. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  653. {$endif cpumm}
  654. {$endif not(defined(i386)) and not(defined(avr))}
  655. end;
  656. function tcg.uses_registers(rt:Tregistertype):boolean;
  657. begin
  658. if assigned(rg[rt]) then
  659. result:=rg[rt].uses_registers
  660. else
  661. result:=false;
  662. end;
  663. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  664. var
  665. rt : tregistertype;
  666. begin
  667. rt:=getregtype(r);
  668. { Only add it when a register allocator is configured.
  669. No IE can be generated, because the VMT is written
  670. without a valid rg[] }
  671. if assigned(rg[rt]) then
  672. rg[rt].add_reg_instruction(instr,r,cg.executionweight);
  673. end;
  674. procedure tcg.add_move_instruction(instr:Taicpu);
  675. var
  676. rt : tregistertype;
  677. begin
  678. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  679. if assigned(rg[rt]) then
  680. rg[rt].add_move_instruction(instr)
  681. else
  682. internalerror(200310095);
  683. end;
  684. procedure tcg.set_regalloc_live_range_direction(dir: TRADirection);
  685. var
  686. rt : tregistertype;
  687. begin
  688. for rt:=low(rg) to high(rg) do
  689. begin
  690. if assigned(rg[rt]) then
  691. rg[rt].live_range_direction:=dir;
  692. end;
  693. end;
  694. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  695. var
  696. rt : tregistertype;
  697. begin
  698. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  699. begin
  700. if assigned(rg[rt]) then
  701. rg[rt].do_register_allocation(list,headertai);
  702. end;
  703. { running the other register allocator passes could require addition int/addr. registers
  704. when spilling so run int/addr register allocation at the end }
  705. if assigned(rg[R_INTREGISTER]) then
  706. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  707. if assigned(rg[R_ADDRESSREGISTER]) then
  708. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  709. end;
  710. procedure tcg.translate_register(var reg : tregister);
  711. begin
  712. rg[getregtype(reg)].translate_register(reg);
  713. end;
  714. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  715. begin
  716. list.concat(tai_regalloc.alloc(r,nil));
  717. end;
  718. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  719. begin
  720. list.concat(tai_regalloc.dealloc(r,nil));
  721. end;
  722. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  723. var
  724. instr : tai;
  725. begin
  726. instr:=tai_regalloc.sync(r);
  727. list.concat(instr);
  728. add_reg_instruction(instr,r);
  729. end;
  730. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  731. begin
  732. list.concat(tai_label.create(l));
  733. end;
  734. {*****************************************************************************
  735. for better code generation these methods should be overridden
  736. ******************************************************************************}
  737. procedure tcg.a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  738. var
  739. ref : treference;
  740. begin
  741. cgpara.check_simple_location;
  742. paramanager.alloccgpara(list,cgpara);
  743. case cgpara.location^.loc of
  744. LOC_REGISTER,LOC_CREGISTER:
  745. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  746. LOC_REFERENCE,LOC_CREFERENCE:
  747. begin
  748. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  749. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  750. end;
  751. LOC_MMREGISTER,LOC_CMMREGISTER:
  752. a_loadmm_intreg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register,mms_movescalar);
  753. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  754. begin
  755. tg.GetTemp(list,TCGSize2Size[size],TCGSize2Size[size],tt_normal,ref);
  756. a_load_reg_ref(list,size,size,r,ref);
  757. a_loadfpu_ref_cgpara(list,cgpara.location^.size,ref,cgpara);
  758. tg.Ungettemp(list,ref);
  759. end
  760. else
  761. internalerror(2002071004);
  762. end;
  763. end;
  764. procedure tcg.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const cgpara : TCGPara);
  765. var
  766. ref : treference;
  767. begin
  768. cgpara.check_simple_location;
  769. paramanager.alloccgpara(list,cgpara);
  770. case cgpara.location^.loc of
  771. LOC_REGISTER,LOC_CREGISTER:
  772. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  773. LOC_REFERENCE,LOC_CREFERENCE:
  774. begin
  775. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  776. a_load_const_ref(list,cgpara.location^.size,a,ref);
  777. end
  778. else
  779. internalerror(2010053109);
  780. end;
  781. end;
  782. procedure tcg.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  783. var
  784. tmpref, ref: treference;
  785. tmpreg: tregister;
  786. location: pcgparalocation;
  787. orgsizeleft,
  788. sizeleft: tcgint;
  789. reghasvalue: boolean;
  790. begin
  791. location:=cgpara.location;
  792. tmpref:=r;
  793. sizeleft:=cgpara.intsize;
  794. while assigned(location) do
  795. begin
  796. paramanager.allocparaloc(list,location);
  797. case location^.loc of
  798. LOC_REGISTER,LOC_CREGISTER:
  799. begin
  800. { Parameter locations are often allocated in multiples of
  801. entire registers. If a parameter only occupies a part of
  802. such a register (e.g. a 16 bit int on a 32 bit
  803. architecture), the size of this parameter can only be
  804. determined by looking at the "size" parameter of this
  805. method -> if the size parameter is <= sizeof(aint), then
  806. we check that there is only one parameter location and
  807. then use this "size" to load the value into the parameter
  808. location }
  809. if (size<>OS_NO) and
  810. (tcgsize2size[size]<=sizeof(aint)) then
  811. begin
  812. cgpara.check_simple_location;
  813. a_load_ref_reg(list,size,location^.size,tmpref,location^.register);
  814. end
  815. { there's a lot more data left, and the current paraloc's
  816. register is entirely filled with part of that data }
  817. else if (sizeleft>sizeof(aint)) then
  818. begin
  819. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  820. end
  821. { we're at the end of the data, and it can be loaded into
  822. the current location's register with a single regular
  823. load }
  824. else if (sizeleft in [1,2{$ifndef cpu16bitalu},4{$endif}{$ifdef cpu64bitalu},8{$endif}]) then
  825. begin
  826. a_load_ref_reg(list,int_cgsize(sizeleft),location^.size,tmpref,location^.register);
  827. end
  828. { we're at the end of the data, and we need multiple loads
  829. to get it in the register because it's an irregular size }
  830. else
  831. begin
  832. { should be the last part }
  833. if assigned(location^.next) then
  834. internalerror(2010052907);
  835. { load the value piecewise to get it into the register }
  836. orgsizeleft:=sizeleft;
  837. reghasvalue:=false;
  838. {$ifdef cpu64bitalu}
  839. if sizeleft>=4 then
  840. begin
  841. a_load_ref_reg(list,OS_32,location^.size,tmpref,location^.register);
  842. dec(sizeleft,4);
  843. if target_info.endian=endian_big then
  844. a_op_const_reg(list,OP_SHL,location^.size,sizeleft*8,location^.register);
  845. inc(tmpref.offset,4);
  846. reghasvalue:=true;
  847. end;
  848. {$endif cpu64bitalu}
  849. if sizeleft>=2 then
  850. begin
  851. tmpreg:=getintregister(list,location^.size);
  852. a_load_ref_reg(list,OS_16,location^.size,tmpref,tmpreg);
  853. dec(sizeleft,2);
  854. if reghasvalue then
  855. begin
  856. if target_info.endian=endian_big then
  857. a_op_const_reg(list,OP_SHL,location^.size,sizeleft*8,tmpreg)
  858. else
  859. a_op_const_reg(list,OP_SHL,location^.size,(orgsizeleft-(sizeleft+2))*8,tmpreg);
  860. a_op_reg_reg(list,OP_OR,location^.size,tmpreg,location^.register);
  861. end
  862. else
  863. begin
  864. if target_info.endian=endian_big then
  865. a_op_const_reg_reg(list,OP_SHL,location^.size,sizeleft*8,tmpreg,location^.register)
  866. else
  867. a_load_reg_reg(list,location^.size,location^.size,tmpreg,location^.register);
  868. end;
  869. inc(tmpref.offset,2);
  870. reghasvalue:=true;
  871. end;
  872. if sizeleft=1 then
  873. begin
  874. tmpreg:=getintregister(list,location^.size);
  875. a_load_ref_reg(list,OS_8,location^.size,tmpref,tmpreg);
  876. dec(sizeleft,1);
  877. if reghasvalue then
  878. begin
  879. if target_info.endian=endian_little then
  880. a_op_const_reg(list,OP_SHL,location^.size,(orgsizeleft-(sizeleft+1))*8,tmpreg);
  881. a_op_reg_reg(list,OP_OR,location^.size,tmpreg,location^.register)
  882. end
  883. else
  884. a_load_reg_reg(list,location^.size,location^.size,tmpreg,location^.register);
  885. inc(tmpref.offset);
  886. end;
  887. { the loop will already adjust the offset and sizeleft }
  888. dec(tmpref.offset,orgsizeleft);
  889. sizeleft:=orgsizeleft;
  890. end;
  891. end;
  892. LOC_REFERENCE,LOC_CREFERENCE:
  893. begin
  894. if assigned(location^.next) then
  895. internalerror(2010052906);
  896. reference_reset_base(ref,location^.reference.index,location^.reference.offset,newalignment(cgpara.alignment,cgpara.intsize-sizeleft));
  897. if (size <> OS_NO) and
  898. (tcgsize2size[size] <= sizeof(aint)) then
  899. a_load_ref_ref(list,size,location^.size,tmpref,ref)
  900. else
  901. { use concatcopy, because the parameter can be larger than }
  902. { what the OS_* constants can handle }
  903. g_concatcopy(list,tmpref,ref,sizeleft);
  904. end;
  905. LOC_MMREGISTER,LOC_CMMREGISTER:
  906. begin
  907. case location^.size of
  908. OS_F32,
  909. OS_F64,
  910. OS_F128:
  911. a_loadmm_ref_reg(list,location^.size,location^.size,tmpref,location^.register,mms_movescalar);
  912. OS_M8..OS_M128,
  913. OS_MS8..OS_MS128:
  914. a_loadmm_ref_reg(list,location^.size,location^.size,tmpref,location^.register,nil);
  915. else
  916. internalerror(2010053101);
  917. end;
  918. end
  919. else
  920. internalerror(2010053111);
  921. end;
  922. inc(tmpref.offset,tcgsize2size[location^.size]);
  923. dec(sizeleft,tcgsize2size[location^.size]);
  924. location:=location^.next;
  925. end;
  926. end;
  927. procedure tcg.a_load_loc_cgpara(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  928. begin
  929. case l.loc of
  930. LOC_REGISTER,
  931. LOC_CREGISTER :
  932. a_load_reg_cgpara(list,l.size,l.register,cgpara);
  933. LOC_CONSTANT :
  934. a_load_const_cgpara(list,l.size,l.value,cgpara);
  935. LOC_CREFERENCE,
  936. LOC_REFERENCE :
  937. a_load_ref_cgpara(list,l.size,l.reference,cgpara);
  938. else
  939. internalerror(2002032211);
  940. end;
  941. end;
  942. procedure tcg.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const cgpara : TCGPara);
  943. var
  944. hr : tregister;
  945. begin
  946. cgpara.check_simple_location;
  947. if cgpara.location^.loc in [LOC_CREGISTER,LOC_REGISTER] then
  948. begin
  949. paramanager.allocparaloc(list,cgpara.location);
  950. a_loadaddr_ref_reg(list,r,cgpara.location^.register)
  951. end
  952. else
  953. begin
  954. hr:=getaddressregister(list);
  955. a_loadaddr_ref_reg(list,r,hr);
  956. a_load_reg_cgpara(list,OS_ADDR,hr,cgpara);
  957. end;
  958. end;
  959. procedure tcg.a_load_cgparaloc_ref(list : TAsmList;const paraloc : TCGParaLocation;const ref : treference;sizeleft : tcgint;align : longint);
  960. var
  961. href : treference;
  962. begin
  963. case paraloc.loc of
  964. LOC_REGISTER :
  965. begin
  966. {$IFDEF POWERPC64}
  967. if (paraloc.shiftval <> 0) then
  968. a_op_const_reg_reg(list, OP_SHL, OS_INT, paraloc.shiftval, paraloc.register, paraloc.register);
  969. {$ENDIF POWERPC64}
  970. a_load_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref);
  971. end;
  972. LOC_MMREGISTER :
  973. begin
  974. case paraloc.size of
  975. OS_F32,
  976. OS_F64,
  977. OS_F128:
  978. a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,mms_movescalar);
  979. OS_M8..OS_M128,
  980. OS_MS8..OS_MS128:
  981. a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,nil);
  982. else
  983. internalerror(2010053102);
  984. end;
  985. end;
  986. LOC_FPUREGISTER :
  987. cg.a_loadfpu_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref);
  988. LOC_REFERENCE :
  989. begin
  990. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset,align);
  991. { use concatcopy, because it can also be a float which fails when
  992. load_ref_ref is used. Don't copy data when the references are equal }
  993. if not((href.base=ref.base) and (href.offset=ref.offset)) then
  994. g_concatcopy(list,href,ref,sizeleft);
  995. end;
  996. else
  997. internalerror(2002081302);
  998. end;
  999. end;
  1000. procedure tcg.a_load_cgparaloc_anyreg(list: TAsmList;regsize: tcgsize;const paraloc: TCGParaLocation;reg: tregister;align: longint);
  1001. var
  1002. href : treference;
  1003. begin
  1004. case paraloc.loc of
  1005. LOC_REGISTER :
  1006. begin
  1007. case getregtype(reg) of
  1008. R_INTREGISTER:
  1009. a_load_reg_reg(list,paraloc.size,regsize,paraloc.register,reg);
  1010. R_MMREGISTER:
  1011. a_loadmm_intreg_reg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
  1012. else
  1013. internalerror(2009112422);
  1014. end;
  1015. end;
  1016. LOC_MMREGISTER :
  1017. begin
  1018. case getregtype(reg) of
  1019. R_INTREGISTER:
  1020. a_loadmm_reg_intreg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
  1021. R_MMREGISTER:
  1022. begin
  1023. case paraloc.size of
  1024. OS_F32,
  1025. OS_F64,
  1026. OS_F128:
  1027. a_loadmm_reg_reg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
  1028. OS_M8..OS_M128,
  1029. OS_MS8..OS_MS128:
  1030. a_loadmm_reg_reg(list,paraloc.size,paraloc.size,paraloc.register,reg,nil);
  1031. else
  1032. internalerror(2010053102);
  1033. end;
  1034. end;
  1035. else
  1036. internalerror(2010053104);
  1037. end;
  1038. end;
  1039. LOC_FPUREGISTER :
  1040. a_loadfpu_reg_reg(list,paraloc.size,regsize,paraloc.register,reg);
  1041. LOC_REFERENCE :
  1042. begin
  1043. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset,align);
  1044. case getregtype(reg) of
  1045. R_INTREGISTER :
  1046. a_load_ref_reg(list,paraloc.size,regsize,href,reg);
  1047. R_FPUREGISTER :
  1048. a_loadfpu_ref_reg(list,paraloc.size,regsize,href,reg);
  1049. R_MMREGISTER :
  1050. { not paraloc.size, because it may be OS_64 instead of
  1051. OS_F64 in case the parameter is passed using integer
  1052. conventions (e.g., on ARM) }
  1053. a_loadmm_ref_reg(list,regsize,regsize,href,reg,mms_movescalar);
  1054. else
  1055. internalerror(2004101012);
  1056. end;
  1057. end;
  1058. else
  1059. internalerror(2002081302);
  1060. end;
  1061. end;
  1062. {****************************************************************************
  1063. some generic implementations
  1064. ****************************************************************************}
  1065. {$push}
  1066. {$r-}
  1067. {$q-}
  1068. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
  1069. var
  1070. bitmask: aword;
  1071. tmpreg: tregister;
  1072. stopbit: byte;
  1073. begin
  1074. tmpreg:=getintregister(list,sreg.subsetregsize);
  1075. if (subsetsize in [OS_S8..OS_S128]) then
  1076. begin
  1077. { sign extend in case the value has a bitsize mod 8 <> 0 }
  1078. { both instructions will be optimized away if not }
  1079. a_op_const_reg_reg(list,OP_SHL,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.startbit-sreg.bitlen,sreg.subsetreg,tmpreg);
  1080. a_op_const_reg(list,OP_SAR,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.bitlen,tmpreg);
  1081. end
  1082. else
  1083. begin
  1084. a_op_const_reg_reg(list,OP_SHR,sreg.subsetregsize,sreg.startbit,sreg.subsetreg,tmpreg);
  1085. stopbit := sreg.startbit + sreg.bitlen;
  1086. // on x86(64), 1 shl 32(64) = 1 instead of 0
  1087. // use aword to prevent overflow with 1 shl 31
  1088. if (stopbit - sreg.startbit <> AIntBits) then
  1089. bitmask := (aword(1) shl (stopbit - sreg.startbit)) - 1
  1090. else
  1091. bitmask := high(aword);
  1092. a_op_const_reg(list,OP_AND,sreg.subsetregsize,tcgint(bitmask),tmpreg);
  1093. end;
  1094. tmpreg := makeregsize(list,tmpreg,subsetsize);
  1095. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  1096. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  1097. end;
  1098. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister);
  1099. begin
  1100. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,SL_REG);
  1101. end;
  1102. procedure tcg.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
  1103. var
  1104. bitmask: aword;
  1105. tmpreg: tregister;
  1106. stopbit: byte;
  1107. begin
  1108. stopbit := sreg.startbit + sreg.bitlen;
  1109. // on x86(64), 1 shl 32(64) = 1 instead of 0
  1110. if (stopbit <> AIntBits) then
  1111. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  1112. else
  1113. bitmask := not(high(aword) xor ((aword(1) shl sreg.startbit)-1));
  1114. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1115. begin
  1116. tmpreg:=getintregister(list,sreg.subsetregsize);
  1117. a_load_reg_reg(list,fromsize,sreg.subsetregsize,fromreg,tmpreg);
  1118. a_op_const_reg(list,OP_SHL,sreg.subsetregsize,sreg.startbit,tmpreg);
  1119. if (slopt <> SL_REGNOSRCMASK) then
  1120. a_op_const_reg(list,OP_AND,sreg.subsetregsize,tcgint(not(bitmask)),tmpreg);
  1121. end;
  1122. if (slopt <> SL_SETMAX) then
  1123. a_op_const_reg(list,OP_AND,sreg.subsetregsize,tcgint(bitmask),sreg.subsetreg);
  1124. case slopt of
  1125. SL_SETZERO : ;
  1126. SL_SETMAX :
  1127. if (sreg.bitlen <> AIntBits) then
  1128. a_op_const_reg(list,OP_OR,sreg.subsetregsize,
  1129. tcgint(((aword(1) shl sreg.bitlen)-1) shl sreg.startbit),
  1130. sreg.subsetreg)
  1131. else
  1132. a_load_const_reg(list,sreg.subsetregsize,-1,sreg.subsetreg);
  1133. else
  1134. a_op_reg_reg(list,OP_OR,sreg.subsetregsize,tmpreg,sreg.subsetreg);
  1135. end;
  1136. end;
  1137. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister);
  1138. var
  1139. tmpreg: tregister;
  1140. bitmask: aword;
  1141. stopbit: byte;
  1142. begin
  1143. if (fromsreg.bitlen >= tosreg.bitlen) then
  1144. begin
  1145. tmpreg := getintregister(list,tosreg.subsetregsize);
  1146. a_load_reg_reg(list,fromsreg.subsetregsize,tosreg.subsetregsize,fromsreg.subsetreg,tmpreg);
  1147. if (fromsreg.startbit <= tosreg.startbit) then
  1148. a_op_const_reg(list,OP_SHL,tosreg.subsetregsize,tosreg.startbit-fromsreg.startbit,tmpreg)
  1149. else
  1150. a_op_const_reg(list,OP_SHR,tosreg.subsetregsize,fromsreg.startbit-tosreg.startbit,tmpreg);
  1151. stopbit := tosreg.startbit + tosreg.bitlen;
  1152. // on x86(64), 1 shl 32(64) = 1 instead of 0
  1153. if (stopbit <> AIntBits) then
  1154. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl tosreg.startbit)-1))
  1155. else
  1156. bitmask := (aword(1) shl tosreg.startbit) - 1;
  1157. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,tcgint(bitmask),tosreg.subsetreg);
  1158. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,tcgint(not(bitmask)),tmpreg);
  1159. a_op_reg_reg(list,OP_OR,tosreg.subsetregsize,tmpreg,tosreg.subsetreg);
  1160. end
  1161. else
  1162. begin
  1163. tmpreg := getintregister(list,tosubsetsize);
  1164. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1165. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1166. end;
  1167. end;
  1168. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference);
  1169. var
  1170. tmpreg: tregister;
  1171. begin
  1172. tmpreg := getintregister(list,tosize);
  1173. a_load_subsetreg_reg(list,subsetsize,tosize,sreg,tmpreg);
  1174. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1175. end;
  1176. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister);
  1177. var
  1178. tmpreg: tregister;
  1179. begin
  1180. tmpreg := getintregister(list,subsetsize);
  1181. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1182. a_load_reg_subsetreg(list,subsetsize,subsetsize,tmpreg,sreg);
  1183. end;
  1184. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: tcgint; const sreg: tsubsetregister);
  1185. var
  1186. bitmask: aword;
  1187. stopbit: byte;
  1188. begin
  1189. stopbit := sreg.startbit + sreg.bitlen;
  1190. // on x86(64), 1 shl 32(64) = 1 instead of 0
  1191. if (stopbit <> AIntBits) then
  1192. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  1193. else
  1194. bitmask := (aword(1) shl sreg.startbit) - 1;
  1195. if (((aword(a) shl sreg.startbit) and not bitmask) <> not bitmask) then
  1196. a_op_const_reg(list,OP_AND,sreg.subsetregsize,tcgint(bitmask),sreg.subsetreg);
  1197. a_op_const_reg(list,OP_OR,sreg.subsetregsize,tcgint((aword(a) shl sreg.startbit) and not(bitmask)),sreg.subsetreg);
  1198. end;
  1199. procedure tcg.a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  1200. begin
  1201. case loc.loc of
  1202. LOC_REFERENCE,LOC_CREFERENCE:
  1203. a_load_ref_subsetref(list,loc.size,subsetsize,loc.reference,sref);
  1204. LOC_REGISTER,LOC_CREGISTER:
  1205. a_load_reg_subsetref(list,loc.size,subsetsize,loc.register,sref);
  1206. LOC_CONSTANT:
  1207. a_load_const_subsetref(list,subsetsize,loc.value,sref);
  1208. LOC_SUBSETREG,LOC_CSUBSETREG:
  1209. a_load_subsetreg_subsetref(list,loc.size,subsetsize,loc.sreg,sref);
  1210. LOC_SUBSETREF,LOC_CSUBSETREF:
  1211. a_load_subsetref_subsetref(list,loc.size,subsetsize,loc.sref,sref);
  1212. else
  1213. internalerror(200608053);
  1214. end;
  1215. end;
  1216. (*
  1217. Subsetrefs are used for (bit)packed arrays and (bit)packed records stored
  1218. in memory. They are like a regular reference, but contain an extra bit
  1219. offset (either constant -startbit- or variable -bitindexreg-, always OS_INT)
  1220. and a bit length (always constant).
  1221. Bit packed values are stored differently in memory depending on whether we
  1222. are on a big or a little endian system (compatible with at least GPC). The
  1223. size of the basic working unit is always the smallest power-of-2 byte size
  1224. which can contain the bit value (so 1..8 bits -> 1 byte, 9..16 bits -> 2
  1225. bytes, 17..32 bits -> 4 bytes etc).
  1226. On a big endian, 5-bit: values are stored like this:
  1227. 11111222 22333334 44445555 56666677 77788888
  1228. The leftmost bit of each 5-bit value corresponds to the most significant
  1229. bit.
  1230. On little endian, it goes like this:
  1231. 22211111 43333322 55554444 77666665 88888777
  1232. In this case, per byte the left-most bit is more significant than those on
  1233. the right, but the bits in the next byte are all more significant than
  1234. those in the previous byte (e.g., the 222 in the first byte are the low
  1235. three bits of that value, while the 22 in the second byte are the upper
  1236. two bits.
  1237. Big endian, 9 bit values:
  1238. 11111111 12222222 22333333 33344444 ...
  1239. Little endian, 9 bit values:
  1240. 11111111 22222221 33333322 44444333 ...
  1241. This is memory representation and the 16 bit values are byteswapped.
  1242. Similarly as in the previous case, the 2222222 string contains the lower
  1243. bits of value 2 and the 22 string contains the upper bits. Once loaded into
  1244. registers (two 16 bit registers in the current implementation, although a
  1245. single 32 bit register would be possible too, in particular if 32 bit
  1246. alignment can be guaranteed), this becomes:
  1247. 22222221 11111111 44444333 33333322 ...
  1248. (l)ow u l l u l u
  1249. The startbit/bitindex in a subsetreference always refers to
  1250. a) on big endian: the most significant bit of the value
  1251. (bits counted from left to right, both memory an registers)
  1252. b) on little endian: the least significant bit when the value
  1253. is loaded in a register (bit counted from right to left)
  1254. Although a) results in more complex code for big endian systems, it's
  1255. needed for compatibility both with GPC and with e.g. bitpacked arrays in
  1256. Apple's universal interfaces which depend on these layout differences).
  1257. Note: when changing the loadsize calculated in get_subsetref_load_info,
  1258. make sure the appropriate alignment is guaranteed, at least in case of
  1259. {$defined cpurequiresproperalignment}.
  1260. *)
  1261. procedure tcg.get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  1262. var
  1263. intloadsize: tcgint;
  1264. begin
  1265. intloadsize := packedbitsloadsize(sref.bitlen);
  1266. if (intloadsize = 0) then
  1267. internalerror(2006081310);
  1268. if (intloadsize > sizeof(aint)) then
  1269. intloadsize := sizeof(aint);
  1270. loadsize := int_cgsize(intloadsize);
  1271. if (loadsize = OS_NO) then
  1272. internalerror(2006081311);
  1273. if (sref.bitlen > sizeof(aint)*8) then
  1274. internalerror(2006081312);
  1275. extra_load :=
  1276. (sref.bitlen <> 1) and
  1277. ((sref.bitindexreg <> NR_NO) or
  1278. (byte(sref.startbit+sref.bitlen) > byte(intloadsize*8)));
  1279. end;
  1280. procedure tcg.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  1281. var
  1282. restbits: byte;
  1283. begin
  1284. if (target_info.endian = endian_big) then
  1285. begin
  1286. { valuereg contains the upper bits, extra_value_reg the lower }
  1287. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  1288. if (subsetsize in [OS_S8..OS_S128]) then
  1289. begin
  1290. { sign extend }
  1291. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize+sref.startbit,valuereg);
  1292. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1293. end
  1294. else
  1295. begin
  1296. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  1297. { mask other bits }
  1298. if (sref.bitlen <> AIntBits) then
  1299. a_op_const_reg(list,OP_AND,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),valuereg);
  1300. end;
  1301. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
  1302. end
  1303. else
  1304. begin
  1305. { valuereg contains the lower bits, extra_value_reg the upper }
  1306. a_op_const_reg(list,OP_SHR,OS_INT,sref.startbit,valuereg);
  1307. if (subsetsize in [OS_S8..OS_S128]) then
  1308. begin
  1309. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen+loadbitsize-sref.startbit,extra_value_reg);
  1310. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,extra_value_reg);
  1311. end
  1312. else
  1313. begin
  1314. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
  1315. { mask other bits }
  1316. if (sref.bitlen <> AIntBits) then
  1317. a_op_const_reg(list,OP_AND,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),extra_value_reg);
  1318. end;
  1319. end;
  1320. { merge }
  1321. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1322. end;
  1323. procedure tcg.a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg: tregister);
  1324. var
  1325. hl: tasmlabel;
  1326. tmpref: treference;
  1327. extra_value_reg,
  1328. tmpreg: tregister;
  1329. begin
  1330. tmpreg := getintregister(list,OS_INT);
  1331. tmpref := sref.ref;
  1332. inc(tmpref.offset,loadbitsize div 8);
  1333. extra_value_reg := getintregister(list,OS_INT);
  1334. if (target_info.endian = endian_big) then
  1335. begin
  1336. { since this is a dynamic index, it's possible that the value }
  1337. { is entirely in valuereg. }
  1338. { get the data in valuereg in the right place }
  1339. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1340. if (subsetsize in [OS_S8..OS_S128]) then
  1341. begin
  1342. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1343. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg)
  1344. end
  1345. else
  1346. begin
  1347. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1348. if (loadbitsize <> AIntBits) then
  1349. { mask left over bits }
  1350. a_op_const_reg(list,OP_AND,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),valuereg);
  1351. end;
  1352. tmpreg := getintregister(list,OS_INT);
  1353. { ensure we don't load anything past the end of the array }
  1354. current_asmdata.getjumplabel(hl);
  1355. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1356. { the bits in extra_value_reg (if any) start at the most significant bit => }
  1357. { extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
  1358. { => = -(sref.bitindex+(sref.bitlen-2*loadbitsize)) }
  1359. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpreg);
  1360. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1361. { load next "loadbitsize" bits of the array }
  1362. a_load_ref_reg(list,int_cgsize(loadbitsize div 8),OS_INT,tmpref,extra_value_reg);
  1363. a_op_reg_reg(list,OP_SHR,OS_INT,tmpreg,extra_value_reg);
  1364. { if there are no bits in extra_value_reg, then sref.bitindex was }
  1365. { < loadsize-sref.bitlen, and therefore tmpreg will now be >= loadsize }
  1366. { => extra_value_reg is now 0 }
  1367. { merge }
  1368. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1369. { no need to mask, necessary masking happened earlier on }
  1370. a_label(list,hl);
  1371. end
  1372. else
  1373. begin
  1374. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1375. { ensure we don't load anything past the end of the array }
  1376. current_asmdata.getjumplabel(hl);
  1377. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1378. { Y-x = -(Y-x) }
  1379. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpreg);
  1380. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1381. { load next "loadbitsize" bits of the array }
  1382. a_load_ref_reg(list,int_cgsize(loadbitsize div 8),OS_INT,tmpref,extra_value_reg);
  1383. { tmpreg is in the range 1..<cpu_bitsize>-1 -> always ok }
  1384. a_op_reg_reg(list,OP_SHL,OS_INT,tmpreg,extra_value_reg);
  1385. { merge }
  1386. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1387. a_label(list,hl);
  1388. { sign extend or mask other bits }
  1389. if (subsetsize in [OS_S8..OS_S128]) then
  1390. begin
  1391. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1392. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1393. end
  1394. else
  1395. a_op_const_reg(list,OP_AND,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),valuereg);
  1396. end;
  1397. end;
  1398. procedure tcg.a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister);
  1399. var
  1400. tmpref: treference;
  1401. valuereg,extra_value_reg: tregister;
  1402. tosreg: tsubsetregister;
  1403. loadsize: tcgsize;
  1404. loadbitsize: byte;
  1405. extra_load: boolean;
  1406. begin
  1407. get_subsetref_load_info(sref,loadsize,extra_load);
  1408. loadbitsize := tcgsize2size[loadsize]*8;
  1409. { load the (first part) of the bit sequence }
  1410. valuereg := getintregister(list,OS_INT);
  1411. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1412. if not extra_load then
  1413. begin
  1414. { everything is guaranteed to be in a single register of loadsize }
  1415. if (sref.bitindexreg = NR_NO) then
  1416. begin
  1417. { use subsetreg routine, it may have been overridden with an optimized version }
  1418. tosreg.subsetreg := valuereg;
  1419. tosreg.subsetregsize := OS_INT;
  1420. { subsetregs always count bits from right to left }
  1421. if (target_info.endian = endian_big) then
  1422. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1423. else
  1424. tosreg.startbit := sref.startbit;
  1425. tosreg.bitlen := sref.bitlen;
  1426. a_load_subsetreg_reg(list,subsetsize,tosize,tosreg,destreg);
  1427. exit;
  1428. end
  1429. else
  1430. begin
  1431. if (sref.startbit <> 0) then
  1432. internalerror(2006081510);
  1433. if (target_info.endian = endian_big) then
  1434. begin
  1435. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1436. if (subsetsize in [OS_S8..OS_S128]) then
  1437. begin
  1438. { sign extend to entire register }
  1439. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1440. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1441. end
  1442. else
  1443. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1444. end
  1445. else
  1446. begin
  1447. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1448. if (subsetsize in [OS_S8..OS_S128]) then
  1449. begin
  1450. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1451. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1452. end
  1453. end;
  1454. { mask other bits/sign extend }
  1455. if not(subsetsize in [OS_S8..OS_S128]) then
  1456. a_op_const_reg(list,OP_AND,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),valuereg);
  1457. end
  1458. end
  1459. else
  1460. begin
  1461. { load next value as well }
  1462. extra_value_reg := getintregister(list,OS_INT);
  1463. if (sref.bitindexreg = NR_NO) then
  1464. begin
  1465. tmpref := sref.ref;
  1466. inc(tmpref.offset,loadbitsize div 8);
  1467. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1468. { can be overridden to optimize }
  1469. a_load_subsetref_regs_noindex(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg)
  1470. end
  1471. else
  1472. begin
  1473. if (sref.startbit <> 0) then
  1474. internalerror(2006080610);
  1475. a_load_subsetref_regs_index(list,subsetsize,loadbitsize,sref,valuereg);
  1476. end;
  1477. end;
  1478. { store in destination }
  1479. { avoid unnecessary sign extension and zeroing }
  1480. valuereg := makeregsize(list,valuereg,OS_INT);
  1481. destreg := makeregsize(list,destreg,OS_INT);
  1482. a_load_reg_reg(list,OS_INT,OS_INT,valuereg,destreg);
  1483. destreg := makeregsize(list,destreg,tosize);
  1484. end;
  1485. procedure tcg.a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  1486. begin
  1487. a_load_regconst_subsetref_intern(list,fromsize,subsetsize,fromreg,sref,SL_REG);
  1488. end;
  1489. procedure tcg.a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt);
  1490. var
  1491. hl: tasmlabel;
  1492. tmpreg, tmpindexreg, valuereg, extra_value_reg, maskreg: tregister;
  1493. tosreg, fromsreg: tsubsetregister;
  1494. tmpref: treference;
  1495. bitmask: aword;
  1496. loadsize: tcgsize;
  1497. loadbitsize: byte;
  1498. extra_load: boolean;
  1499. begin
  1500. { the register must be able to contain the requested value }
  1501. if (tcgsize2size[fromsize]*8 < sref.bitlen) then
  1502. internalerror(2006081613);
  1503. get_subsetref_load_info(sref,loadsize,extra_load);
  1504. loadbitsize := tcgsize2size[loadsize]*8;
  1505. { load the (first part) of the bit sequence }
  1506. valuereg := getintregister(list,OS_INT);
  1507. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1508. { constant offset of bit sequence? }
  1509. if not extra_load then
  1510. begin
  1511. if (sref.bitindexreg = NR_NO) then
  1512. begin
  1513. { use subsetreg routine, it may have been overridden with an optimized version }
  1514. tosreg.subsetreg := valuereg;
  1515. tosreg.subsetregsize := OS_INT;
  1516. { subsetregs always count bits from right to left }
  1517. if (target_info.endian = endian_big) then
  1518. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1519. else
  1520. tosreg.startbit := sref.startbit;
  1521. tosreg.bitlen := sref.bitlen;
  1522. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1523. end
  1524. else
  1525. begin
  1526. if (sref.startbit <> 0) then
  1527. internalerror(2006081710);
  1528. { should be handled by normal code and will give wrong result }
  1529. { on x86 for the '1 shl bitlen' below }
  1530. if (sref.bitlen = AIntBits) then
  1531. internalerror(2006081711);
  1532. { zero the bits we have to insert }
  1533. if (slopt <> SL_SETMAX) then
  1534. begin
  1535. maskreg := getintregister(list,OS_INT);
  1536. if (target_info.endian = endian_big) then
  1537. begin
  1538. a_load_const_reg(list,OS_INT,tcgint((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen),maskreg);
  1539. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1540. end
  1541. else
  1542. begin
  1543. a_load_const_reg(list,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),maskreg);
  1544. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1545. end;
  1546. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1547. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1548. end;
  1549. { insert the value }
  1550. if (slopt <> SL_SETZERO) then
  1551. begin
  1552. tmpreg := getintregister(list,OS_INT);
  1553. if (slopt <> SL_SETMAX) then
  1554. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1555. else if (sref.bitlen <> AIntBits) then
  1556. a_load_const_reg(list,OS_INT,tcgint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1557. else
  1558. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1559. if (target_info.endian = endian_big) then
  1560. begin
  1561. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1562. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1563. begin
  1564. if (loadbitsize <> AIntBits) then
  1565. bitmask := (((aword(1) shl loadbitsize)-1) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1))
  1566. else
  1567. bitmask := (high(aword) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1));
  1568. a_op_const_reg(list,OP_AND,OS_INT,bitmask,tmpreg);
  1569. end;
  1570. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1571. end
  1572. else
  1573. begin
  1574. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1575. a_op_const_reg(list,OP_AND,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),tmpreg);
  1576. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1577. end;
  1578. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1579. end;
  1580. end;
  1581. { store back to memory }
  1582. valuereg := makeregsize(list,valuereg,loadsize);
  1583. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1584. exit;
  1585. end
  1586. else
  1587. begin
  1588. { load next value }
  1589. extra_value_reg := getintregister(list,OS_INT);
  1590. tmpref := sref.ref;
  1591. inc(tmpref.offset,loadbitsize div 8);
  1592. { should maybe be taken out too, can be done more efficiently }
  1593. { on e.g. i386 with shld/shrd }
  1594. if (sref.bitindexreg = NR_NO) then
  1595. begin
  1596. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1597. fromsreg.subsetreg := fromreg;
  1598. fromsreg.subsetregsize := fromsize;
  1599. tosreg.subsetreg := valuereg;
  1600. tosreg.subsetregsize := OS_INT;
  1601. { transfer first part }
  1602. fromsreg.bitlen := loadbitsize-sref.startbit;
  1603. tosreg.bitlen := fromsreg.bitlen;
  1604. if (target_info.endian = endian_big) then
  1605. begin
  1606. { valuereg must contain the upper bits of the value at bits [0..loadbitsize-startbit] }
  1607. { upper bits of the value ... }
  1608. fromsreg.startbit := sref.bitlen-(loadbitsize-sref.startbit);
  1609. { ... to bit 0 }
  1610. tosreg.startbit := 0
  1611. end
  1612. else
  1613. begin
  1614. { valuereg must contain the lower bits of the value at bits [startbit..loadbitsize] }
  1615. { lower bits of the value ... }
  1616. fromsreg.startbit := 0;
  1617. { ... to startbit }
  1618. tosreg.startbit := sref.startbit;
  1619. end;
  1620. case slopt of
  1621. SL_SETZERO,
  1622. SL_SETMAX:
  1623. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1624. else
  1625. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1626. end;
  1627. valuereg := makeregsize(list,valuereg,loadsize);
  1628. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1629. { transfer second part }
  1630. if (target_info.endian = endian_big) then
  1631. begin
  1632. { extra_value_reg must contain the lower bits of the value at bits }
  1633. { [(loadbitsize-(bitlen-(loadbitsize-startbit)))..loadbitsize] }
  1634. { (loadbitsize-(bitlen-(loadbitsize-startbit))) = 2*loadbitsize }
  1635. { - bitlen - startbit }
  1636. fromsreg.startbit := 0;
  1637. tosreg.startbit := 2*loadbitsize - sref.bitlen - sref.startbit
  1638. end
  1639. else
  1640. begin
  1641. { extra_value_reg must contain the upper bits of the value at bits [0..bitlen-(loadbitsize-startbit)] }
  1642. fromsreg.startbit := fromsreg.bitlen;
  1643. tosreg.startbit := 0;
  1644. end;
  1645. tosreg.subsetreg := extra_value_reg;
  1646. fromsreg.bitlen := sref.bitlen-fromsreg.bitlen;
  1647. tosreg.bitlen := fromsreg.bitlen;
  1648. case slopt of
  1649. SL_SETZERO,
  1650. SL_SETMAX:
  1651. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1652. else
  1653. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1654. end;
  1655. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1656. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1657. exit;
  1658. end
  1659. else
  1660. begin
  1661. if (sref.startbit <> 0) then
  1662. internalerror(2006081812);
  1663. { should be handled by normal code and will give wrong result }
  1664. { on x86 for the '1 shl bitlen' below }
  1665. if (sref.bitlen = AIntBits) then
  1666. internalerror(2006081713);
  1667. { generate mask to zero the bits we have to insert }
  1668. if (slopt <> SL_SETMAX) then
  1669. begin
  1670. maskreg := getintregister(list,OS_INT);
  1671. if (target_info.endian = endian_big) then
  1672. begin
  1673. a_load_const_reg(list,OS_INT,tcgint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),maskreg);
  1674. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1675. end
  1676. else
  1677. begin
  1678. a_load_const_reg(list,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),maskreg);
  1679. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1680. end;
  1681. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1682. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1683. end;
  1684. { insert the value }
  1685. if (slopt <> SL_SETZERO) then
  1686. begin
  1687. tmpreg := getintregister(list,OS_INT);
  1688. if (slopt <> SL_SETMAX) then
  1689. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1690. else if (sref.bitlen <> AIntBits) then
  1691. a_load_const_reg(list,OS_INT,tcgint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1692. else
  1693. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1694. if (target_info.endian = endian_big) then
  1695. begin
  1696. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1697. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1698. { mask left over bits }
  1699. a_op_const_reg(list,OP_AND,OS_INT,tcgint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),tmpreg);
  1700. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1701. end
  1702. else
  1703. begin
  1704. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1705. { mask left over bits }
  1706. a_op_const_reg(list,OP_AND,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),tmpreg);
  1707. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1708. end;
  1709. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1710. end;
  1711. valuereg := makeregsize(list,valuereg,loadsize);
  1712. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1713. { make sure we do not read/write past the end of the array }
  1714. current_asmdata.getjumplabel(hl);
  1715. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1716. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1717. tmpindexreg := getintregister(list,OS_INT);
  1718. { load current array value }
  1719. if (slopt <> SL_SETZERO) then
  1720. begin
  1721. tmpreg := getintregister(list,OS_INT);
  1722. if (slopt <> SL_SETMAX) then
  1723. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1724. else if (sref.bitlen <> AIntBits) then
  1725. a_load_const_reg(list,OS_INT,tcgint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1726. else
  1727. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1728. end;
  1729. { generate mask to zero the bits we have to insert }
  1730. if (slopt <> SL_SETMAX) then
  1731. begin
  1732. maskreg := getintregister(list,OS_INT);
  1733. if (target_info.endian = endian_big) then
  1734. begin
  1735. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
  1736. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1737. a_load_const_reg(list,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),maskreg);
  1738. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1739. end
  1740. else
  1741. begin
  1742. { Y-x = -(x-Y) }
  1743. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
  1744. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1745. a_load_const_reg(list,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),maskreg);
  1746. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
  1747. end;
  1748. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1749. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,extra_value_reg);
  1750. end;
  1751. if (slopt <> SL_SETZERO) then
  1752. begin
  1753. if (target_info.endian = endian_big) then
  1754. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg)
  1755. else
  1756. begin
  1757. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1758. a_op_const_reg(list,OP_AND,OS_INT,tcgint((aword(1) shl sref.bitlen)-1),tmpreg);
  1759. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
  1760. end;
  1761. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);
  1762. end;
  1763. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1764. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1765. a_label(list,hl);
  1766. end;
  1767. end;
  1768. end;
  1769. procedure tcg.a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference);
  1770. var
  1771. tmpreg: tregister;
  1772. begin
  1773. tmpreg := getintregister(list,tosubsetsize);
  1774. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1775. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1776. end;
  1777. procedure tcg.a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference);
  1778. var
  1779. tmpreg: tregister;
  1780. begin
  1781. tmpreg := getintregister(list,tosize);
  1782. a_load_subsetref_reg(list,subsetsize,tosize,sref,tmpreg);
  1783. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1784. end;
  1785. procedure tcg.a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference);
  1786. var
  1787. tmpreg: tregister;
  1788. begin
  1789. tmpreg := getintregister(list,subsetsize);
  1790. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1791. a_load_reg_subsetref(list,subsetsize,subsetsize,tmpreg,sref);
  1792. end;
  1793. procedure tcg.a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: tcgint; const sref: tsubsetreference);
  1794. var
  1795. tmpreg: tregister;
  1796. slopt: tsubsetloadopt;
  1797. begin
  1798. { perform masking of the source value in advance }
  1799. slopt := SL_REGNOSRCMASK;
  1800. if (sref.bitlen <> AIntBits) then
  1801. a := tcgint(aword(a) and ((aword(1) shl sref.bitlen) -1));
  1802. if (
  1803. { broken x86 "x shl regbitsize = x" }
  1804. ((sref.bitlen <> AIntBits) and
  1805. ((aword(a) and ((aword(1) shl sref.bitlen) -1)) = (aword(1) shl sref.bitlen) -1)) or
  1806. ((sref.bitlen = AIntBits) and
  1807. (a = -1))
  1808. ) then
  1809. slopt := SL_SETMAX
  1810. else if (a = 0) then
  1811. slopt := SL_SETZERO;
  1812. tmpreg := getintregister(list,subsetsize);
  1813. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1814. a_load_const_reg(list,subsetsize,a,tmpreg);
  1815. a_load_regconst_subsetref_intern(list,subsetsize,subsetsize,tmpreg,sref,slopt);
  1816. end;
  1817. procedure tcg.a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation);
  1818. begin
  1819. case loc.loc of
  1820. LOC_REFERENCE,LOC_CREFERENCE:
  1821. a_load_subsetref_ref(list,subsetsize,loc.size,sref,loc.reference);
  1822. LOC_REGISTER,LOC_CREGISTER:
  1823. a_load_subsetref_reg(list,subsetsize,loc.size,sref,loc.register);
  1824. LOC_SUBSETREG,LOC_CSUBSETREG:
  1825. a_load_subsetref_subsetreg(list,subsetsize,loc.size,sref,loc.sreg);
  1826. LOC_SUBSETREF,LOC_CSUBSETREF:
  1827. a_load_subsetref_subsetref(list,subsetsize,loc.size,sref,loc.sref);
  1828. else
  1829. internalerror(200608054);
  1830. end;
  1831. end;
  1832. procedure tcg.a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
  1833. var
  1834. tmpreg: tregister;
  1835. begin
  1836. tmpreg := getintregister(list,tosubsetsize);
  1837. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1838. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1839. end;
  1840. procedure tcg.a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
  1841. var
  1842. tmpreg: tregister;
  1843. begin
  1844. tmpreg := getintregister(list,tosubsetsize);
  1845. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1846. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1847. end;
  1848. {$pop}
  1849. { generic bit address calculation routines }
  1850. function tcg.get_bit_const_ref_sref(bitnumber: tcgint; const ref: treference): tsubsetreference;
  1851. begin
  1852. result.ref:=ref;
  1853. inc(result.ref.offset,bitnumber div 8);
  1854. result.bitindexreg:=NR_NO;
  1855. result.startbit:=bitnumber mod 8;
  1856. result.bitlen:=1;
  1857. end;
  1858. function tcg.get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: tcgint; setreg: tregister): tsubsetregister;
  1859. begin
  1860. result.subsetreg:=setreg;
  1861. result.subsetregsize:=setregsize;
  1862. { subsetregs always count from the least significant to the most significant bit }
  1863. if (target_info.endian=endian_big) then
  1864. result.startbit:=(tcgsize2size[setregsize]*8)-bitnumber-1
  1865. else
  1866. result.startbit:=bitnumber;
  1867. result.bitlen:=1;
  1868. end;
  1869. function tcg.get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  1870. var
  1871. tmpreg,
  1872. tmpaddrreg: tregister;
  1873. begin
  1874. result.ref:=ref;
  1875. result.startbit:=0;
  1876. result.bitlen:=1;
  1877. tmpreg:=getintregister(list,bitnumbersize);
  1878. a_op_const_reg_reg(list,OP_SHR,bitnumbersize,3,bitnumber,tmpreg);
  1879. tmpaddrreg:=getaddressregister(list);
  1880. a_load_reg_reg(list,bitnumbersize,OS_ADDR,tmpreg,tmpaddrreg);
  1881. if (result.ref.base=NR_NO) then
  1882. result.ref.base:=tmpaddrreg
  1883. else if (result.ref.index=NR_NO) then
  1884. result.ref.index:=tmpaddrreg
  1885. else
  1886. begin
  1887. a_op_reg_reg(list,OP_ADD,OS_ADDR,result.ref.index,tmpaddrreg);
  1888. result.ref.index:=tmpaddrreg;
  1889. end;
  1890. tmpreg:=getintregister(list,OS_INT);
  1891. a_op_const_reg_reg(list,OP_AND,OS_INT,7,bitnumber,tmpreg);
  1892. result.bitindexreg:=tmpreg;
  1893. end;
  1894. { bit testing routines }
  1895. procedure tcg.a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister);
  1896. var
  1897. tmpvalue: tregister;
  1898. begin
  1899. tmpvalue:=getintregister(list,valuesize);
  1900. if (target_info.endian=endian_little) then
  1901. begin
  1902. { rotate value register "bitnumber" bits to the right }
  1903. a_op_reg_reg_reg(list,OP_SHR,valuesize,bitnumber,value,tmpvalue);
  1904. { extract the bit we want }
  1905. a_op_const_reg(list,OP_AND,valuesize,1,tmpvalue);
  1906. end
  1907. else
  1908. begin
  1909. { highest (leftmost) bit = bit 0 -> shl bitnumber results in wanted }
  1910. { bit in uppermost position, then move it to the lowest position }
  1911. { "and" is not necessary since combination of shl/shr will clear }
  1912. { all other bits }
  1913. a_op_reg_reg_reg(list,OP_SHL,valuesize,bitnumber,value,tmpvalue);
  1914. a_op_const_reg(list,OP_SHR,valuesize,tcgsize2size[valuesize]*8-1,tmpvalue);
  1915. end;
  1916. a_load_reg_reg(list,valuesize,destsize,tmpvalue,destreg);
  1917. end;
  1918. procedure tcg.a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: tcgint; const ref: treference; destreg: tregister);
  1919. begin
  1920. a_load_subsetref_reg(list,OS_8,destsize,get_bit_const_ref_sref(bitnumber,ref),destreg);
  1921. end;
  1922. procedure tcg.a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: tcgint; setreg, destreg: tregister);
  1923. begin
  1924. a_load_subsetreg_reg(list,setregsize,destsize,get_bit_const_reg_sreg(setregsize,bitnumber,setreg),destreg);
  1925. end;
  1926. procedure tcg.a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: tcgint; const setreg: tsubsetregister; destreg: tregister);
  1927. var
  1928. tmpsreg: tsubsetregister;
  1929. begin
  1930. { the first parameter is used to calculate the bit offset in }
  1931. { case of big endian, and therefore must be the size of the }
  1932. { set and not of the whole subsetreg }
  1933. tmpsreg:=get_bit_const_reg_sreg(setregsize,bitnumber,setreg.subsetreg);
  1934. { now fix the size of the subsetreg }
  1935. tmpsreg.subsetregsize:=setreg.subsetregsize;
  1936. { correct offset of the set in the subsetreg }
  1937. inc(tmpsreg.startbit,setreg.startbit);
  1938. a_load_subsetreg_reg(list,setregsize,destsize,tmpsreg,destreg);
  1939. end;
  1940. procedure tcg.a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister);
  1941. begin
  1942. a_load_subsetref_reg(list,OS_8,destsize,get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref),destreg);
  1943. end;
  1944. procedure tcg.a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  1945. var
  1946. tmpreg: tregister;
  1947. begin
  1948. case loc.loc of
  1949. LOC_REFERENCE,LOC_CREFERENCE:
  1950. a_bit_test_reg_ref_reg(list,bitnumbersize,destsize,bitnumber,loc.reference,destreg);
  1951. LOC_REGISTER,LOC_CREGISTER,
  1952. LOC_SUBSETREG,LOC_CSUBSETREG,
  1953. LOC_CONSTANT:
  1954. begin
  1955. case loc.loc of
  1956. LOC_REGISTER,LOC_CREGISTER:
  1957. tmpreg:=loc.register;
  1958. LOC_SUBSETREG,LOC_CSUBSETREG:
  1959. begin
  1960. tmpreg:=getintregister(list,loc.size);
  1961. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1962. end;
  1963. LOC_CONSTANT:
  1964. begin
  1965. tmpreg:=getintregister(list,loc.size);
  1966. a_load_const_reg(list,loc.size,loc.value,tmpreg);
  1967. end;
  1968. end;
  1969. a_bit_test_reg_reg_reg(list,bitnumbersize,loc.size,destsize,bitnumber,tmpreg,destreg);
  1970. end;
  1971. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1972. else
  1973. internalerror(2007051701);
  1974. end;
  1975. end;
  1976. procedure tcg.a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: tcgint; const loc: tlocation; destreg: tregister);
  1977. begin
  1978. case loc.loc of
  1979. LOC_REFERENCE,LOC_CREFERENCE:
  1980. a_bit_test_const_ref_reg(list,destsize,bitnumber,loc.reference,destreg);
  1981. LOC_REGISTER,LOC_CREGISTER:
  1982. a_bit_test_const_reg_reg(list,loc.size,destsize,bitnumber,loc.register,destreg);
  1983. LOC_SUBSETREG,LOC_CSUBSETREG:
  1984. a_bit_test_const_subsetreg_reg(list,loc.size,destsize,bitnumber,loc.sreg,destreg);
  1985. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1986. else
  1987. internalerror(2007051702);
  1988. end;
  1989. end;
  1990. { bit setting/clearing routines }
  1991. procedure tcg.a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister);
  1992. var
  1993. tmpvalue: tregister;
  1994. begin
  1995. tmpvalue:=getintregister(list,destsize);
  1996. if (target_info.endian=endian_little) then
  1997. begin
  1998. a_load_const_reg(list,destsize,1,tmpvalue);
  1999. { rotate bit "bitnumber" bits to the left }
  2000. a_op_reg_reg(list,OP_SHL,destsize,bitnumber,tmpvalue);
  2001. end
  2002. else
  2003. begin
  2004. { highest (leftmost) bit = bit 0 -> "$80/$8000/$80000000/ ... }
  2005. { shr bitnumber" results in correct mask }
  2006. a_load_const_reg(list,destsize,1 shl (tcgsize2size[destsize]*8-1),tmpvalue);
  2007. a_op_reg_reg(list,OP_SHR,destsize,bitnumber,tmpvalue);
  2008. end;
  2009. { set/clear the bit we want }
  2010. if (doset) then
  2011. a_op_reg_reg(list,OP_OR,destsize,tmpvalue,dest)
  2012. else
  2013. begin
  2014. a_op_reg_reg(list,OP_NOT,destsize,tmpvalue,tmpvalue);
  2015. a_op_reg_reg(list,OP_AND,destsize,tmpvalue,dest)
  2016. end;
  2017. end;
  2018. procedure tcg.a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: tcgint; const ref: treference);
  2019. begin
  2020. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_const_ref_sref(bitnumber,ref));
  2021. end;
  2022. procedure tcg.a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: tcgint; destreg: tregister);
  2023. begin
  2024. a_load_const_subsetreg(list,OS_8,ord(doset),get_bit_const_reg_sreg(destsize,bitnumber,destreg));
  2025. end;
  2026. procedure tcg.a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: tcgint; const destreg: tsubsetregister);
  2027. var
  2028. tmpsreg: tsubsetregister;
  2029. begin
  2030. { the first parameter is used to calculate the bit offset in }
  2031. { case of big endian, and therefore must be the size of the }
  2032. { set and not of the whole subsetreg }
  2033. tmpsreg:=get_bit_const_reg_sreg(destsize,bitnumber,destreg.subsetreg);
  2034. { now fix the size of the subsetreg }
  2035. tmpsreg.subsetregsize:=destreg.subsetregsize;
  2036. { correct offset of the set in the subsetreg }
  2037. inc(tmpsreg.startbit,destreg.startbit);
  2038. a_load_const_subsetreg(list,OS_8,ord(doset),tmpsreg);
  2039. end;
  2040. procedure tcg.a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference);
  2041. begin
  2042. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref));
  2043. end;
  2044. procedure tcg.a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  2045. var
  2046. tmpreg: tregister;
  2047. begin
  2048. case loc.loc of
  2049. LOC_REFERENCE:
  2050. a_bit_set_reg_ref(list,doset,bitnumbersize,bitnumber,loc.reference);
  2051. LOC_CREGISTER:
  2052. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,loc.register);
  2053. { e.g. a 2-byte set in a record regvar }
  2054. LOC_CSUBSETREG:
  2055. begin
  2056. { hard to do in-place in a generic way, so operate on a copy }
  2057. tmpreg:=getintregister(list,loc.size);
  2058. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  2059. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,tmpreg);
  2060. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  2061. end;
  2062. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  2063. else
  2064. internalerror(2007051703)
  2065. end;
  2066. end;
  2067. procedure tcg.a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: tcgint; const loc: tlocation);
  2068. begin
  2069. case loc.loc of
  2070. LOC_REFERENCE:
  2071. a_bit_set_const_ref(list,doset,loc.size,bitnumber,loc.reference);
  2072. LOC_CREGISTER:
  2073. a_bit_set_const_reg(list,doset,loc.size,bitnumber,loc.register);
  2074. LOC_CSUBSETREG:
  2075. a_bit_set_const_subsetreg(list,doset,loc.size,bitnumber,loc.sreg);
  2076. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  2077. else
  2078. internalerror(2007051704)
  2079. end;
  2080. end;
  2081. { memory/register loading }
  2082. procedure tcg.a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);
  2083. var
  2084. tmpref : treference;
  2085. tmpreg : tregister;
  2086. i : longint;
  2087. begin
  2088. if ref.alignment<tcgsize2size[fromsize] then
  2089. begin
  2090. tmpref:=ref;
  2091. { we take care of the alignment now }
  2092. tmpref.alignment:=0;
  2093. case FromSize of
  2094. OS_16,OS_S16:
  2095. begin
  2096. tmpreg:=getintregister(list,OS_16);
  2097. a_load_reg_reg(list,fromsize,OS_16,register,tmpreg);
  2098. if target_info.endian=endian_big then
  2099. inc(tmpref.offset);
  2100. tmpreg:=makeregsize(list,tmpreg,OS_8);
  2101. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  2102. tmpreg:=makeregsize(list,tmpreg,OS_16);
  2103. a_op_const_reg(list,OP_SHR,OS_16,8,tmpreg);
  2104. if target_info.endian=endian_big then
  2105. dec(tmpref.offset)
  2106. else
  2107. inc(tmpref.offset);
  2108. tmpreg:=makeregsize(list,tmpreg,OS_8);
  2109. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  2110. end;
  2111. OS_32,OS_S32:
  2112. begin
  2113. { could add an optimised case for ref.alignment=2 }
  2114. tmpreg:=getintregister(list,OS_32);
  2115. a_load_reg_reg(list,fromsize,OS_32,register,tmpreg);
  2116. if target_info.endian=endian_big then
  2117. inc(tmpref.offset,3);
  2118. tmpreg:=makeregsize(list,tmpreg,OS_8);
  2119. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  2120. tmpreg:=makeregsize(list,tmpreg,OS_32);
  2121. for i:=1 to 3 do
  2122. begin
  2123. a_op_const_reg(list,OP_SHR,OS_32,8,tmpreg);
  2124. if target_info.endian=endian_big then
  2125. dec(tmpref.offset)
  2126. else
  2127. inc(tmpref.offset);
  2128. tmpreg:=makeregsize(list,tmpreg,OS_8);
  2129. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  2130. tmpreg:=makeregsize(list,tmpreg,OS_32);
  2131. end;
  2132. end
  2133. else
  2134. a_load_reg_ref(list,fromsize,tosize,register,tmpref);
  2135. end;
  2136. end
  2137. else
  2138. a_load_reg_ref(list,fromsize,tosize,register,ref);
  2139. end;
  2140. procedure tcg.a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);
  2141. var
  2142. tmpref : treference;
  2143. tmpreg,
  2144. tmpreg2 : tregister;
  2145. i : longint;
  2146. begin
  2147. if ref.alignment in [1,2] then
  2148. begin
  2149. tmpref:=ref;
  2150. { we take care of the alignment now }
  2151. tmpref.alignment:=0;
  2152. case FromSize of
  2153. OS_16,OS_S16:
  2154. if ref.alignment=2 then
  2155. a_load_ref_reg(list,fromsize,tosize,tmpref,register)
  2156. else
  2157. begin
  2158. { first load in tmpreg, because the target register }
  2159. { may be used in ref as well }
  2160. if target_info.endian=endian_little then
  2161. inc(tmpref.offset);
  2162. tmpreg:=getintregister(list,OS_8);
  2163. a_load_ref_reg(list,OS_8,OS_8,tmpref,tmpreg);
  2164. tmpreg:=makeregsize(list,tmpreg,OS_16);
  2165. a_op_const_reg(list,OP_SHL,OS_16,8,tmpreg);
  2166. if target_info.endian=endian_little then
  2167. dec(tmpref.offset)
  2168. else
  2169. inc(tmpref.offset);
  2170. a_load_ref_reg(list,OS_8,OS_16,tmpref,register);
  2171. a_op_reg_reg(list,OP_OR,OS_16,tmpreg,register);
  2172. end;
  2173. OS_32,OS_S32:
  2174. if ref.alignment=2 then
  2175. begin
  2176. if target_info.endian=endian_little then
  2177. inc(tmpref.offset,2);
  2178. tmpreg:=getintregister(list,OS_32);
  2179. a_load_ref_reg(list,OS_16,OS_32,tmpref,tmpreg);
  2180. a_op_const_reg(list,OP_SHL,OS_32,16,tmpreg);
  2181. if target_info.endian=endian_little then
  2182. dec(tmpref.offset,2)
  2183. else
  2184. inc(tmpref.offset,2);
  2185. a_load_ref_reg(list,OS_16,OS_32,tmpref,register);
  2186. a_op_reg_reg(list,OP_OR,OS_32,tmpreg,register);
  2187. end
  2188. else
  2189. begin
  2190. if target_info.endian=endian_little then
  2191. inc(tmpref.offset,3);
  2192. tmpreg:=getintregister(list,OS_32);
  2193. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg);
  2194. tmpreg2:=getintregister(list,OS_32);
  2195. for i:=1 to 3 do
  2196. begin
  2197. a_op_const_reg(list,OP_SHL,OS_32,8,tmpreg);
  2198. if target_info.endian=endian_little then
  2199. dec(tmpref.offset)
  2200. else
  2201. inc(tmpref.offset);
  2202. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg2);
  2203. a_op_reg_reg(list,OP_OR,OS_32,tmpreg2,tmpreg);
  2204. end;
  2205. a_load_reg_reg(list,OS_32,OS_32,tmpreg,register);
  2206. end
  2207. else
  2208. a_load_ref_reg(list,fromsize,tosize,tmpref,register);
  2209. end;
  2210. end
  2211. else
  2212. a_load_ref_reg(list,fromsize,tosize,ref,register);
  2213. end;
  2214. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  2215. var
  2216. tmpreg: tregister;
  2217. begin
  2218. { verify if we have the same reference }
  2219. if references_equal(sref,dref) then
  2220. exit;
  2221. tmpreg:=getintregister(list,tosize);
  2222. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  2223. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  2224. end;
  2225. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : tcgint;const ref : treference);
  2226. var
  2227. tmpreg: tregister;
  2228. begin
  2229. tmpreg:=getintregister(list,size);
  2230. a_load_const_reg(list,size,a,tmpreg);
  2231. a_load_reg_ref(list,size,size,tmpreg,ref);
  2232. end;
  2233. procedure tcg.a_load_const_loc(list : TAsmList;a : tcgint;const loc: tlocation);
  2234. begin
  2235. case loc.loc of
  2236. LOC_REFERENCE,LOC_CREFERENCE:
  2237. a_load_const_ref(list,loc.size,a,loc.reference);
  2238. LOC_REGISTER,LOC_CREGISTER:
  2239. a_load_const_reg(list,loc.size,a,loc.register);
  2240. LOC_SUBSETREG,LOC_CSUBSETREG:
  2241. a_load_const_subsetreg(list,loc.size,a,loc.sreg);
  2242. LOC_SUBSETREF,LOC_CSUBSETREF:
  2243. a_load_const_subsetref(list,loc.size,a,loc.sref);
  2244. else
  2245. internalerror(200203272);
  2246. end;
  2247. end;
  2248. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  2249. begin
  2250. case loc.loc of
  2251. LOC_REFERENCE,LOC_CREFERENCE:
  2252. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  2253. LOC_REGISTER,LOC_CREGISTER:
  2254. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  2255. LOC_SUBSETREG,LOC_CSUBSETREG:
  2256. a_load_reg_subsetreg(list,fromsize,loc.size,reg,loc.sreg);
  2257. LOC_SUBSETREF,LOC_CSUBSETREF:
  2258. a_load_reg_subsetref(list,fromsize,loc.size,reg,loc.sref);
  2259. LOC_MMREGISTER,LOC_CMMREGISTER:
  2260. a_loadmm_intreg_reg(list,fromsize,loc.size,reg,loc.register,mms_movescalar);
  2261. else
  2262. internalerror(200203271);
  2263. end;
  2264. end;
  2265. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  2266. begin
  2267. case loc.loc of
  2268. LOC_REFERENCE,LOC_CREFERENCE:
  2269. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2270. LOC_REGISTER,LOC_CREGISTER:
  2271. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  2272. LOC_CONSTANT:
  2273. a_load_const_reg(list,tosize,loc.value,reg);
  2274. LOC_SUBSETREG,LOC_CSUBSETREG:
  2275. a_load_subsetreg_reg(list,loc.size,tosize,loc.sreg,reg);
  2276. LOC_SUBSETREF,LOC_CSUBSETREF:
  2277. a_load_subsetref_reg(list,loc.size,tosize,loc.sref,reg);
  2278. else
  2279. internalerror(200109092);
  2280. end;
  2281. end;
  2282. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  2283. begin
  2284. case loc.loc of
  2285. LOC_REFERENCE,LOC_CREFERENCE:
  2286. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  2287. LOC_REGISTER,LOC_CREGISTER:
  2288. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  2289. LOC_CONSTANT:
  2290. a_load_const_ref(list,tosize,loc.value,ref);
  2291. LOC_SUBSETREG,LOC_CSUBSETREG:
  2292. a_load_subsetreg_ref(list,loc.size,tosize,loc.sreg,ref);
  2293. LOC_SUBSETREF,LOC_CSUBSETREF:
  2294. a_load_subsetref_ref(list,loc.size,tosize,loc.sref,ref);
  2295. else
  2296. internalerror(200109302);
  2297. end;
  2298. end;
  2299. procedure tcg.a_load_loc_subsetreg(list : TAsmList; subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  2300. begin
  2301. case loc.loc of
  2302. LOC_REFERENCE,LOC_CREFERENCE:
  2303. a_load_ref_subsetreg(list,loc.size,subsetsize,loc.reference,sreg);
  2304. LOC_REGISTER,LOC_CREGISTER:
  2305. a_load_reg_subsetreg(list,loc.size,subsetsize,loc.register,sreg);
  2306. LOC_CONSTANT:
  2307. a_load_const_subsetreg(list,subsetsize,loc.value,sreg);
  2308. LOC_SUBSETREG,LOC_CSUBSETREG:
  2309. a_load_subsetreg_subsetreg(list,loc.size,subsetsize,loc.sreg,sreg);
  2310. LOC_SUBSETREF,LOC_CSUBSETREF:
  2311. a_load_subsetref_subsetreg(list,loc.size,subsetsize,loc.sref,sreg);
  2312. else
  2313. internalerror(2006052310);
  2314. end;
  2315. end;
  2316. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation);
  2317. begin
  2318. case loc.loc of
  2319. LOC_REFERENCE,LOC_CREFERENCE:
  2320. a_load_subsetreg_ref(list,subsetsize,loc.size,sreg,loc.reference);
  2321. LOC_REGISTER,LOC_CREGISTER:
  2322. a_load_subsetreg_reg(list,subsetsize,loc.size,sreg,loc.register);
  2323. LOC_SUBSETREG,LOC_CSUBSETREG:
  2324. a_load_subsetreg_subsetreg(list,subsetsize,loc.size,sreg,loc.sreg);
  2325. LOC_SUBSETREF,LOC_CSUBSETREF:
  2326. a_load_subsetreg_subsetref(list,subsetsize,loc.size,sreg,loc.sref);
  2327. else
  2328. internalerror(2006051510);
  2329. end;
  2330. end;
  2331. procedure tcg.optimize_op_const(var op: topcg; var a : tcgint);
  2332. var
  2333. powerval : longint;
  2334. begin
  2335. case op of
  2336. OP_OR :
  2337. begin
  2338. { or with zero returns same result }
  2339. if a = 0 then
  2340. op:=OP_NONE
  2341. else
  2342. { or with max returns max }
  2343. if a = -1 then
  2344. op:=OP_MOVE;
  2345. end;
  2346. OP_AND :
  2347. begin
  2348. { and with max returns same result }
  2349. if (a = -1) then
  2350. op:=OP_NONE
  2351. else
  2352. { and with 0 returns 0 }
  2353. if a=0 then
  2354. op:=OP_MOVE;
  2355. end;
  2356. OP_DIV :
  2357. begin
  2358. { division by 1 returns result }
  2359. if a = 1 then
  2360. op:=OP_NONE
  2361. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2362. begin
  2363. a := powerval;
  2364. op:= OP_SHR;
  2365. end;
  2366. end;
  2367. OP_IDIV:
  2368. begin
  2369. if a = 1 then
  2370. op:=OP_NONE;
  2371. end;
  2372. OP_MUL,OP_IMUL:
  2373. begin
  2374. if a = 1 then
  2375. op:=OP_NONE
  2376. else
  2377. if a=0 then
  2378. op:=OP_MOVE
  2379. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2380. begin
  2381. a := powerval;
  2382. op:= OP_SHL;
  2383. end;
  2384. end;
  2385. OP_ADD,OP_SUB:
  2386. begin
  2387. if a = 0 then
  2388. op:=OP_NONE;
  2389. end;
  2390. OP_SAR,OP_SHL,OP_SHR,OP_ROL,OP_ROR:
  2391. begin
  2392. if a = 0 then
  2393. op:=OP_NONE;
  2394. end;
  2395. end;
  2396. end;
  2397. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  2398. begin
  2399. case loc.loc of
  2400. LOC_REFERENCE, LOC_CREFERENCE:
  2401. a_loadfpu_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2402. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2403. a_loadfpu_reg_reg(list,loc.size,tosize,loc.register,reg);
  2404. else
  2405. internalerror(200203301);
  2406. end;
  2407. end;
  2408. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  2409. begin
  2410. case loc.loc of
  2411. LOC_REFERENCE, LOC_CREFERENCE:
  2412. a_loadfpu_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  2413. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2414. a_loadfpu_reg_reg(list,fromsize,loc.size,reg,loc.register);
  2415. else
  2416. internalerror(48991);
  2417. end;
  2418. end;
  2419. procedure tcg.a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  2420. var
  2421. reg: tregister;
  2422. regsize: tcgsize;
  2423. begin
  2424. if (fromsize>=tosize) then
  2425. regsize:=fromsize
  2426. else
  2427. regsize:=tosize;
  2428. reg:=getfpuregister(list,regsize);
  2429. a_loadfpu_ref_reg(list,fromsize,regsize,ref1,reg);
  2430. a_loadfpu_reg_ref(list,regsize,tosize,reg,ref2);
  2431. end;
  2432. procedure tcg.a_loadfpu_reg_cgpara(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  2433. var
  2434. ref : treference;
  2435. begin
  2436. paramanager.alloccgpara(list,cgpara);
  2437. case cgpara.location^.loc of
  2438. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2439. begin
  2440. cgpara.check_simple_location;
  2441. a_loadfpu_reg_reg(list,size,size,r,cgpara.location^.register);
  2442. end;
  2443. LOC_REFERENCE,LOC_CREFERENCE:
  2444. begin
  2445. cgpara.check_simple_location;
  2446. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2447. a_loadfpu_reg_ref(list,size,size,r,ref);
  2448. end;
  2449. LOC_REGISTER,LOC_CREGISTER:
  2450. begin
  2451. { paramfpu_ref does the check_simpe_location check here if necessary }
  2452. tg.GetTemp(list,TCGSize2Size[size],TCGSize2Size[size],tt_normal,ref);
  2453. a_loadfpu_reg_ref(list,size,size,r,ref);
  2454. a_loadfpu_ref_cgpara(list,size,ref,cgpara);
  2455. tg.Ungettemp(list,ref);
  2456. end;
  2457. else
  2458. internalerror(2010053112);
  2459. end;
  2460. end;
  2461. procedure tcg.a_loadfpu_ref_cgpara(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  2462. var
  2463. href : treference;
  2464. hsize: tcgsize;
  2465. begin
  2466. case cgpara.location^.loc of
  2467. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2468. begin
  2469. cgpara.check_simple_location;
  2470. paramanager.alloccgpara(list,cgpara);
  2471. a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
  2472. end;
  2473. LOC_REFERENCE,LOC_CREFERENCE:
  2474. begin
  2475. cgpara.check_simple_location;
  2476. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2477. { concatcopy should choose the best way to copy the data }
  2478. g_concatcopy(list,ref,href,tcgsize2size[size]);
  2479. end;
  2480. LOC_REGISTER,LOC_CREGISTER:
  2481. begin
  2482. { force integer size }
  2483. hsize:=int_cgsize(tcgsize2size[size]);
  2484. {$ifndef cpu64bitalu}
  2485. if (hsize in [OS_S64,OS_64]) then
  2486. cg64.a_load64_ref_cgpara(list,ref,cgpara)
  2487. else
  2488. {$endif not cpu64bitalu}
  2489. begin
  2490. cgpara.check_simple_location;
  2491. a_load_ref_cgpara(list,hsize,ref,cgpara)
  2492. end;
  2493. end
  2494. else
  2495. internalerror(200402201);
  2496. end;
  2497. end;
  2498. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; const ref: TReference);
  2499. var
  2500. tmpreg : tregister;
  2501. begin
  2502. tmpreg:=getintregister(list,size);
  2503. a_load_ref_reg(list,size,size,ref,tmpreg);
  2504. a_op_const_reg(list,op,size,a,tmpreg);
  2505. a_load_reg_ref(list,size,size,tmpreg,ref);
  2506. end;
  2507. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : tcgint; const sreg: tsubsetregister);
  2508. var
  2509. tmpreg: tregister;
  2510. begin
  2511. tmpreg := getintregister(list, size);
  2512. a_load_subsetreg_reg(list,subsetsize,size,sreg,tmpreg);
  2513. a_op_const_reg(list,op,size,a,tmpreg);
  2514. a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
  2515. end;
  2516. procedure tcg.a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : tcgint; const sref: tsubsetreference);
  2517. var
  2518. tmpreg: tregister;
  2519. begin
  2520. tmpreg := getintregister(list, size);
  2521. a_load_subsetref_reg(list,subsetsize,size,sref,tmpreg);
  2522. a_op_const_reg(list,op,size,a,tmpreg);
  2523. a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
  2524. end;
  2525. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: tcgint; const loc: tlocation);
  2526. begin
  2527. case loc.loc of
  2528. LOC_REGISTER, LOC_CREGISTER:
  2529. a_op_const_reg(list,op,loc.size,a,loc.register);
  2530. LOC_REFERENCE, LOC_CREFERENCE:
  2531. a_op_const_ref(list,op,loc.size,a,loc.reference);
  2532. LOC_SUBSETREG, LOC_CSUBSETREG:
  2533. a_op_const_subsetreg(list,op,loc.size,loc.size,a,loc.sreg);
  2534. LOC_SUBSETREF, LOC_CSUBSETREF:
  2535. a_op_const_subsetref(list,op,loc.size,loc.size,a,loc.sref);
  2536. else
  2537. internalerror(200109061);
  2538. end;
  2539. end;
  2540. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  2541. var
  2542. tmpreg : tregister;
  2543. begin
  2544. tmpreg:=getintregister(list,size);
  2545. a_load_ref_reg(list,size,size,ref,tmpreg);
  2546. a_op_reg_reg(list,op,size,reg,tmpreg);
  2547. a_load_reg_ref(list,size,size,tmpreg,ref);
  2548. end;
  2549. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  2550. var
  2551. tmpreg: tregister;
  2552. begin
  2553. case op of
  2554. OP_NOT,OP_NEG:
  2555. { handle it as "load ref,reg; op reg" }
  2556. begin
  2557. a_load_ref_reg(list,size,size,ref,reg);
  2558. a_op_reg_reg(list,op,size,reg,reg);
  2559. end;
  2560. else
  2561. begin
  2562. tmpreg:=getintregister(list,size);
  2563. a_load_ref_reg(list,size,size,ref,tmpreg);
  2564. a_op_reg_reg(list,op,size,tmpreg,reg);
  2565. end;
  2566. end;
  2567. end;
  2568. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister);
  2569. var
  2570. tmpreg: tregister;
  2571. begin
  2572. tmpreg := getintregister(list, opsize);
  2573. a_load_subsetreg_reg(list,subsetsize,opsize,sreg,tmpreg);
  2574. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2575. a_load_reg_subsetreg(list,opsize,subsetsize,tmpreg,sreg);
  2576. end;
  2577. procedure tcg.a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference);
  2578. var
  2579. tmpreg: tregister;
  2580. begin
  2581. tmpreg := getintregister(list, opsize);
  2582. a_load_subsetref_reg(list,subsetsize,opsize,sref,tmpreg);
  2583. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2584. a_load_reg_subsetref(list,opsize,subsetsize,tmpreg,sref);
  2585. end;
  2586. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  2587. begin
  2588. case loc.loc of
  2589. LOC_REGISTER, LOC_CREGISTER:
  2590. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  2591. LOC_REFERENCE, LOC_CREFERENCE:
  2592. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  2593. LOC_SUBSETREG, LOC_CSUBSETREG:
  2594. a_op_reg_subsetreg(list,op,loc.size,loc.size,reg,loc.sreg);
  2595. LOC_SUBSETREF, LOC_CSUBSETREF:
  2596. a_op_reg_subsetref(list,op,loc.size,loc.size,reg,loc.sref);
  2597. else
  2598. internalerror(200109061);
  2599. end;
  2600. end;
  2601. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  2602. var
  2603. tmpreg: tregister;
  2604. begin
  2605. case loc.loc of
  2606. LOC_REGISTER,LOC_CREGISTER:
  2607. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  2608. LOC_REFERENCE,LOC_CREFERENCE:
  2609. begin
  2610. tmpreg:=getintregister(list,loc.size);
  2611. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  2612. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  2613. end;
  2614. LOC_SUBSETREG, LOC_CSUBSETREG:
  2615. begin
  2616. tmpreg:=getintregister(list,loc.size);
  2617. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  2618. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2619. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  2620. end;
  2621. LOC_SUBSETREF, LOC_CSUBSETREF:
  2622. begin
  2623. tmpreg:=getintregister(list,loc.size);
  2624. a_load_subsetreF_reg(list,loc.size,loc.size,loc.sref,tmpreg);
  2625. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2626. a_load_reg_subsetref(list,loc.size,loc.size,tmpreg,loc.sref);
  2627. end;
  2628. else
  2629. internalerror(200109061);
  2630. end;
  2631. end;
  2632. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  2633. a:tcgint;src,dst:Tregister);
  2634. begin
  2635. a_load_reg_reg(list,size,size,src,dst);
  2636. a_op_const_reg(list,op,size,a,dst);
  2637. end;
  2638. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  2639. size: tcgsize; src1, src2, dst: tregister);
  2640. var
  2641. tmpreg: tregister;
  2642. begin
  2643. if (dst<>src1) then
  2644. begin
  2645. a_load_reg_reg(list,size,size,src2,dst);
  2646. a_op_reg_reg(list,op,size,src1,dst);
  2647. end
  2648. else
  2649. begin
  2650. { can we do a direct operation on the target register ? }
  2651. if op in [OP_ADD,OP_MUL,OP_AND,OP_MOVE,OP_XOR,OP_IMUL,OP_OR] then
  2652. a_op_reg_reg(list,op,size,src2,dst)
  2653. else
  2654. begin
  2655. tmpreg:=getintregister(list,size);
  2656. a_load_reg_reg(list,size,size,src2,tmpreg);
  2657. a_op_reg_reg(list,op,size,src1,tmpreg);
  2658. a_load_reg_reg(list,size,size,tmpreg,dst);
  2659. end;
  2660. end;
  2661. end;
  2662. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: tcgint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2663. begin
  2664. a_op_const_reg_reg(list,op,size,a,src,dst);
  2665. ovloc.loc:=LOC_VOID;
  2666. end;
  2667. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2668. begin
  2669. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  2670. ovloc.loc:=LOC_VOID;
  2671. end;
  2672. procedure tcg.a_cmp_const_reg_label(list: TAsmList; size: tcgsize;
  2673. cmp_op: topcmp; a: tcgint; reg: tregister; l: tasmlabel);
  2674. var
  2675. tmpreg: tregister;
  2676. begin
  2677. tmpreg:=getintregister(list,size);
  2678. a_load_const_reg(list,size,a,tmpreg);
  2679. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  2680. end;
  2681. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;const ref : treference;
  2682. l : tasmlabel);
  2683. var
  2684. tmpreg: tregister;
  2685. begin
  2686. tmpreg:=getintregister(list,size);
  2687. a_load_ref_reg(list,size,size,ref,tmpreg);
  2688. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2689. end;
  2690. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;const loc : tlocation;
  2691. l : tasmlabel);
  2692. var
  2693. tmpreg : tregister;
  2694. begin
  2695. case loc.loc of
  2696. LOC_REGISTER,LOC_CREGISTER:
  2697. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  2698. LOC_REFERENCE,LOC_CREFERENCE:
  2699. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  2700. LOC_SUBSETREG, LOC_CSUBSETREG:
  2701. begin
  2702. tmpreg:=getintregister(list,size);
  2703. a_load_subsetreg_reg(list,loc.size,size,loc.sreg,tmpreg);
  2704. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2705. end;
  2706. LOC_SUBSETREF, LOC_CSUBSETREF:
  2707. begin
  2708. tmpreg:=getintregister(list,size);
  2709. a_load_subsetref_reg(list,loc.size,size,loc.sref,tmpreg);
  2710. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2711. end;
  2712. else
  2713. internalerror(200109061);
  2714. end;
  2715. end;
  2716. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  2717. var
  2718. tmpreg: tregister;
  2719. begin
  2720. tmpreg:=getintregister(list,size);
  2721. a_load_ref_reg(list,size,size,ref,tmpreg);
  2722. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  2723. end;
  2724. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  2725. var
  2726. tmpreg: tregister;
  2727. begin
  2728. tmpreg:=getintregister(list,size);
  2729. a_load_ref_reg(list,size,size,ref,tmpreg);
  2730. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  2731. end;
  2732. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  2733. begin
  2734. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  2735. end;
  2736. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  2737. begin
  2738. case loc.loc of
  2739. LOC_REGISTER,
  2740. LOC_CREGISTER:
  2741. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  2742. LOC_REFERENCE,
  2743. LOC_CREFERENCE :
  2744. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  2745. LOC_CONSTANT:
  2746. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  2747. LOC_SUBSETREG,
  2748. LOC_CSUBSETREG:
  2749. a_cmp_subsetreg_reg_label(list,loc.size,size,cmp_op,loc.sreg,reg,l);
  2750. LOC_SUBSETREF,
  2751. LOC_CSUBSETREF:
  2752. a_cmp_subsetref_reg_label(list,loc.size,size,cmp_op,loc.sref,reg,l);
  2753. else
  2754. internalerror(200203231);
  2755. end;
  2756. end;
  2757. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel);
  2758. var
  2759. tmpreg: tregister;
  2760. begin
  2761. tmpreg:=getintregister(list, cmpsize);
  2762. a_load_subsetreg_reg(list,subsetsize,cmpsize,sreg,tmpreg);
  2763. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2764. end;
  2765. procedure tcg.a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel);
  2766. var
  2767. tmpreg: tregister;
  2768. begin
  2769. tmpreg:=getintregister(list, cmpsize);
  2770. a_load_subsetref_reg(list,subsetsize,cmpsize,sref,tmpreg);
  2771. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2772. end;
  2773. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  2774. l : tasmlabel);
  2775. var
  2776. tmpreg: tregister;
  2777. begin
  2778. case loc.loc of
  2779. LOC_REGISTER,LOC_CREGISTER:
  2780. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  2781. LOC_REFERENCE,LOC_CREFERENCE:
  2782. begin
  2783. tmpreg:=getintregister(list,size);
  2784. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2785. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  2786. end;
  2787. LOC_SUBSETREG, LOC_CSUBSETREG:
  2788. begin
  2789. tmpreg:=getintregister(list, size);
  2790. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2791. a_cmp_subsetreg_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sreg,tmpreg,l);
  2792. end;
  2793. LOC_SUBSETREF, LOC_CSUBSETREF:
  2794. begin
  2795. tmpreg:=getintregister(list, size);
  2796. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2797. a_cmp_subsetref_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sref,tmpreg,l);
  2798. end;
  2799. else
  2800. internalerror(200109061);
  2801. end;
  2802. end;
  2803. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  2804. begin
  2805. case loc.loc of
  2806. LOC_MMREGISTER,LOC_CMMREGISTER:
  2807. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2808. LOC_REFERENCE,LOC_CREFERENCE:
  2809. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  2810. LOC_REGISTER,LOC_CREGISTER:
  2811. a_loadmm_intreg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2812. else
  2813. internalerror(200310121);
  2814. end;
  2815. end;
  2816. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  2817. begin
  2818. case loc.loc of
  2819. LOC_MMREGISTER,LOC_CMMREGISTER:
  2820. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  2821. LOC_REFERENCE,LOC_CREFERENCE:
  2822. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  2823. else
  2824. internalerror(200310122);
  2825. end;
  2826. end;
  2827. procedure tcg.a_loadmm_reg_cgpara(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  2828. var
  2829. href : treference;
  2830. {$ifndef cpu64bitalu}
  2831. tmpreg : tregister;
  2832. reg64 : tregister64;
  2833. {$endif not cpu64bitalu}
  2834. begin
  2835. {$ifndef cpu64bitalu}
  2836. if not(cgpara.location^.loc in [LOC_REGISTER,LOC_CREGISTER]) or
  2837. (size<>OS_F64) then
  2838. {$endif not cpu64bitalu}
  2839. cgpara.check_simple_location;
  2840. paramanager.alloccgpara(list,cgpara);
  2841. case cgpara.location^.loc of
  2842. LOC_MMREGISTER,LOC_CMMREGISTER:
  2843. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  2844. LOC_REFERENCE,LOC_CREFERENCE:
  2845. begin
  2846. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2847. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  2848. end;
  2849. LOC_REGISTER,LOC_CREGISTER:
  2850. begin
  2851. if assigned(shuffle) and
  2852. not shufflescalar(shuffle) then
  2853. internalerror(2009112510);
  2854. {$ifndef cpu64bitalu}
  2855. if (size=OS_F64) then
  2856. begin
  2857. if not assigned(cgpara.location^.next) or
  2858. assigned(cgpara.location^.next^.next) then
  2859. internalerror(2009112512);
  2860. case cgpara.location^.next^.loc of
  2861. LOC_REGISTER,LOC_CREGISTER:
  2862. tmpreg:=cgpara.location^.next^.register;
  2863. LOC_REFERENCE,LOC_CREFERENCE:
  2864. tmpreg:=getintregister(list,OS_32);
  2865. else
  2866. internalerror(2009112910);
  2867. end;
  2868. if (target_info.endian=ENDIAN_BIG) then
  2869. begin
  2870. { paraloc^ -> high
  2871. paraloc^.next -> low }
  2872. reg64.reghi:=cgpara.location^.register;
  2873. reg64.reglo:=tmpreg;
  2874. end
  2875. else
  2876. begin
  2877. { paraloc^ -> low
  2878. paraloc^.next -> high }
  2879. reg64.reglo:=cgpara.location^.register;
  2880. reg64.reghi:=tmpreg;
  2881. end;
  2882. cg64.a_loadmm_reg_intreg64(list,size,reg,reg64);
  2883. if (cgpara.location^.next^.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  2884. begin
  2885. if not(cgpara.location^.next^.size in [OS_32,OS_S32]) then
  2886. internalerror(2009112911);
  2887. reference_reset_base(href,cgpara.location^.next^.reference.index,cgpara.location^.next^.reference.offset,cgpara.alignment);
  2888. a_load_reg_ref(list,OS_32,cgpara.location^.next^.size,tmpreg,href);
  2889. end;
  2890. end
  2891. else
  2892. {$endif not cpu64bitalu}
  2893. a_loadmm_reg_intreg(list,size,cgpara.location^.size,reg,cgpara.location^.register,mms_movescalar);
  2894. end
  2895. else
  2896. internalerror(200310123);
  2897. end;
  2898. end;
  2899. procedure tcg.a_loadmm_ref_cgpara(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  2900. var
  2901. hr : tregister;
  2902. hs : tmmshuffle;
  2903. begin
  2904. cgpara.check_simple_location;
  2905. hr:=getmmregister(list,cgpara.location^.size);
  2906. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  2907. if realshuffle(shuffle) then
  2908. begin
  2909. hs:=shuffle^;
  2910. removeshuffles(hs);
  2911. a_loadmm_reg_cgpara(list,cgpara.location^.size,hr,cgpara,@hs);
  2912. end
  2913. else
  2914. a_loadmm_reg_cgpara(list,cgpara.location^.size,hr,cgpara,shuffle);
  2915. end;
  2916. procedure tcg.a_loadmm_loc_cgpara(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  2917. begin
  2918. case loc.loc of
  2919. LOC_MMREGISTER,LOC_CMMREGISTER:
  2920. a_loadmm_reg_cgpara(list,loc.size,loc.register,cgpara,shuffle);
  2921. LOC_REFERENCE,LOC_CREFERENCE:
  2922. a_loadmm_ref_cgpara(list,loc.size,loc.reference,cgpara,shuffle);
  2923. else
  2924. internalerror(200310123);
  2925. end;
  2926. end;
  2927. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  2928. var
  2929. hr : tregister;
  2930. hs : tmmshuffle;
  2931. begin
  2932. hr:=getmmregister(list,size);
  2933. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2934. if realshuffle(shuffle) then
  2935. begin
  2936. hs:=shuffle^;
  2937. removeshuffles(hs);
  2938. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  2939. end
  2940. else
  2941. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  2942. end;
  2943. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  2944. var
  2945. hr : tregister;
  2946. hs : tmmshuffle;
  2947. begin
  2948. hr:=getmmregister(list,size);
  2949. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2950. if realshuffle(shuffle) then
  2951. begin
  2952. hs:=shuffle^;
  2953. removeshuffles(hs);
  2954. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  2955. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  2956. end
  2957. else
  2958. begin
  2959. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  2960. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  2961. end;
  2962. end;
  2963. procedure tcg.a_loadmm_intreg_reg(list: tasmlist; fromsize,tosize: tcgsize; intreg,mmreg: tregister; shuffle: pmmshuffle);
  2964. var
  2965. tmpref: treference;
  2966. begin
  2967. if (tcgsize2size[fromsize]<>4) or
  2968. (tcgsize2size[tosize]<>4) then
  2969. internalerror(2009112503);
  2970. tg.gettemp(list,4,4,tt_normal,tmpref);
  2971. a_load_reg_ref(list,fromsize,fromsize,intreg,tmpref);
  2972. a_loadmm_ref_reg(list,tosize,tosize,tmpref,mmreg,shuffle);
  2973. tg.ungettemp(list,tmpref);
  2974. end;
  2975. procedure tcg.a_loadmm_reg_intreg(list: tasmlist; fromsize,tosize: tcgsize; mmreg,intreg: tregister; shuffle: pmmshuffle);
  2976. var
  2977. tmpref: treference;
  2978. begin
  2979. if (tcgsize2size[fromsize]<>4) or
  2980. (tcgsize2size[tosize]<>4) then
  2981. internalerror(2009112504);
  2982. tg.gettemp(list,8,8,tt_normal,tmpref);
  2983. cg.a_loadmm_reg_ref(list,fromsize,fromsize,mmreg,tmpref,shuffle);
  2984. a_load_ref_reg(list,tosize,tosize,tmpref,intreg);
  2985. tg.ungettemp(list,tmpref);
  2986. end;
  2987. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  2988. begin
  2989. case loc.loc of
  2990. LOC_CMMREGISTER,LOC_MMREGISTER:
  2991. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  2992. LOC_CREFERENCE,LOC_REFERENCE:
  2993. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  2994. else
  2995. internalerror(200312232);
  2996. end;
  2997. end;
  2998. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : tcgint);
  2999. begin
  3000. g_concatcopy(list,source,dest,len);
  3001. end;
  3002. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  3003. var
  3004. cgpara1,cgpara2,cgpara3 : TCGPara;
  3005. begin
  3006. cgpara1.init;
  3007. cgpara2.init;
  3008. cgpara3.init;
  3009. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3010. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3011. paramanager.getintparaloc(pocall_default,3,cgpara3);
  3012. a_loadaddr_ref_cgpara(list,dest,cgpara3);
  3013. a_loadaddr_ref_cgpara(list,source,cgpara2);
  3014. a_load_const_cgpara(list,OS_INT,len,cgpara1);
  3015. paramanager.freecgpara(list,cgpara3);
  3016. paramanager.freecgpara(list,cgpara2);
  3017. paramanager.freecgpara(list,cgpara1);
  3018. allocallcpuregisters(list);
  3019. a_call_name(list,'FPC_SHORTSTR_ASSIGN',false);
  3020. deallocallcpuregisters(list);
  3021. cgpara3.done;
  3022. cgpara2.done;
  3023. cgpara1.done;
  3024. end;
  3025. procedure tcg.g_copyvariant(list : TAsmList;const source,dest : treference);
  3026. var
  3027. cgpara1,cgpara2 : TCGPara;
  3028. begin
  3029. cgpara1.init;
  3030. cgpara2.init;
  3031. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3032. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3033. a_loadaddr_ref_cgpara(list,dest,cgpara2);
  3034. a_loadaddr_ref_cgpara(list,source,cgpara1);
  3035. paramanager.freecgpara(list,cgpara2);
  3036. paramanager.freecgpara(list,cgpara1);
  3037. allocallcpuregisters(list);
  3038. a_call_name(list,'FPC_VARIANT_COPY_OVERWRITE',false);
  3039. deallocallcpuregisters(list);
  3040. cgpara2.done;
  3041. cgpara1.done;
  3042. end;
  3043. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  3044. var
  3045. href : treference;
  3046. incrfunc : string;
  3047. cgpara1,cgpara2 : TCGPara;
  3048. begin
  3049. cgpara1.init;
  3050. cgpara2.init;
  3051. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3052. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3053. if is_interfacecom_or_dispinterface(t) then
  3054. incrfunc:='FPC_INTF_INCR_REF'
  3055. else if is_ansistring(t) then
  3056. incrfunc:='FPC_ANSISTR_INCR_REF'
  3057. else if is_widestring(t) then
  3058. incrfunc:='FPC_WIDESTR_INCR_REF'
  3059. else if is_unicodestring(t) then
  3060. incrfunc:='FPC_UNICODESTR_INCR_REF'
  3061. else if is_dynamic_array(t) then
  3062. incrfunc:='FPC_DYNARRAY_INCR_REF'
  3063. else
  3064. incrfunc:='';
  3065. { call the special incr function or the generic addref }
  3066. if incrfunc<>'' then
  3067. begin
  3068. { widestrings aren't ref. counted on all platforms so we need the address
  3069. to create a real copy }
  3070. if is_widestring(t) then
  3071. a_loadaddr_ref_cgpara(list,ref,cgpara1)
  3072. else
  3073. { these functions get the pointer by value }
  3074. a_load_ref_cgpara(list,OS_ADDR,ref,cgpara1);
  3075. paramanager.freecgpara(list,cgpara1);
  3076. allocallcpuregisters(list);
  3077. a_call_name(list,incrfunc,false);
  3078. deallocallcpuregisters(list);
  3079. end
  3080. else
  3081. begin
  3082. if is_open_array(t) then
  3083. InternalError(201103054);
  3084. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  3085. a_loadaddr_ref_cgpara(list,href,cgpara2);
  3086. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3087. paramanager.freecgpara(list,cgpara1);
  3088. paramanager.freecgpara(list,cgpara2);
  3089. allocallcpuregisters(list);
  3090. a_call_name(list,'FPC_ADDREF',false);
  3091. deallocallcpuregisters(list);
  3092. end;
  3093. cgpara2.done;
  3094. cgpara1.done;
  3095. end;
  3096. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  3097. var
  3098. href : treference;
  3099. decrfunc : string;
  3100. needrtti : boolean;
  3101. cgpara1,cgpara2 : TCGPara;
  3102. tempreg1,tempreg2 : TRegister;
  3103. begin
  3104. cgpara1.init;
  3105. cgpara2.init;
  3106. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3107. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3108. needrtti:=false;
  3109. if is_interfacecom_or_dispinterface(t) then
  3110. decrfunc:='FPC_INTF_DECR_REF'
  3111. else if is_ansistring(t) then
  3112. decrfunc:='FPC_ANSISTR_DECR_REF'
  3113. else if is_widestring(t) then
  3114. decrfunc:='FPC_WIDESTR_DECR_REF'
  3115. else if is_unicodestring(t) then
  3116. decrfunc:='FPC_UNICODESTR_DECR_REF'
  3117. else if is_dynamic_array(t) then
  3118. begin
  3119. decrfunc:='FPC_DYNARRAY_DECR_REF';
  3120. needrtti:=true;
  3121. end
  3122. else
  3123. decrfunc:='';
  3124. { call the special decr function or the generic decref }
  3125. if decrfunc<>'' then
  3126. begin
  3127. if needrtti then
  3128. begin
  3129. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  3130. tempreg2:=getaddressregister(list);
  3131. a_loadaddr_ref_reg(list,href,tempreg2);
  3132. end;
  3133. tempreg1:=getaddressregister(list);
  3134. a_loadaddr_ref_reg(list,ref,tempreg1);
  3135. if needrtti then
  3136. a_load_reg_cgpara(list,OS_ADDR,tempreg2,cgpara2);
  3137. a_load_reg_cgpara(list,OS_ADDR,tempreg1,cgpara1);
  3138. paramanager.freecgpara(list,cgpara1);
  3139. if needrtti then
  3140. paramanager.freecgpara(list,cgpara2);
  3141. allocallcpuregisters(list);
  3142. a_call_name(list,decrfunc,false);
  3143. deallocallcpuregisters(list);
  3144. end
  3145. else
  3146. begin
  3147. if is_open_array(t) then
  3148. InternalError(201103053);
  3149. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  3150. a_loadaddr_ref_cgpara(list,href,cgpara2);
  3151. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3152. paramanager.freecgpara(list,cgpara1);
  3153. paramanager.freecgpara(list,cgpara2);
  3154. allocallcpuregisters(list);
  3155. a_call_name(list,'FPC_DECREF',false);
  3156. deallocallcpuregisters(list);
  3157. end;
  3158. cgpara2.done;
  3159. cgpara1.done;
  3160. end;
  3161. procedure tcg.g_array_rtti_helper(list: TAsmList; t: tdef; const ref: treference; const highloc: tlocation; const name: string);
  3162. var
  3163. cgpara1,cgpara2,cgpara3: TCGPara;
  3164. href: TReference;
  3165. hreg, lenreg: TRegister;
  3166. begin
  3167. cgpara1.init;
  3168. cgpara2.init;
  3169. cgpara3.init;
  3170. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3171. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3172. paramanager.getintparaloc(pocall_default,3,cgpara3);
  3173. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  3174. if highloc.loc=LOC_CONSTANT then
  3175. a_load_const_cgpara(list,OS_INT,highloc.value+1,cgpara3)
  3176. else
  3177. begin
  3178. if highloc.loc in [LOC_REGISTER,LOC_CREGISTER] then
  3179. hreg:=highloc.register
  3180. else
  3181. begin
  3182. hreg:=getintregister(list,OS_INT);
  3183. a_load_loc_reg(list,OS_INT,highloc,hreg);
  3184. end;
  3185. { increment, converts high(x) to length(x) }
  3186. lenreg:=getintregister(list,OS_INT);
  3187. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,hreg,lenreg);
  3188. a_load_reg_cgpara(list,OS_INT,lenreg,cgpara3);
  3189. end;
  3190. a_loadaddr_ref_cgpara(list,href,cgpara2);
  3191. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3192. paramanager.freecgpara(list,cgpara1);
  3193. paramanager.freecgpara(list,cgpara2);
  3194. paramanager.freecgpara(list,cgpara3);
  3195. allocallcpuregisters(list);
  3196. a_call_name(list,name,false);
  3197. deallocallcpuregisters(list);
  3198. cgpara3.done;
  3199. cgpara2.done;
  3200. cgpara1.done;
  3201. end;
  3202. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  3203. var
  3204. href : treference;
  3205. cgpara1,cgpara2 : TCGPara;
  3206. begin
  3207. cgpara1.init;
  3208. cgpara2.init;
  3209. if is_ansistring(t) or
  3210. is_widestring(t) or
  3211. is_unicodestring(t) or
  3212. is_interfacecom_or_dispinterface(t) or
  3213. is_dynamic_array(t) then
  3214. a_load_const_ref(list,OS_ADDR,0,ref)
  3215. else if t.typ=variantdef then
  3216. begin
  3217. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3218. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3219. paramanager.freecgpara(list,cgpara1);
  3220. allocallcpuregisters(list);
  3221. a_call_name(list,'FPC_VARIANT_INIT',false);
  3222. deallocallcpuregisters(list);
  3223. end
  3224. else
  3225. begin
  3226. if is_open_array(t) then
  3227. InternalError(201103052);
  3228. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3229. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3230. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  3231. a_loadaddr_ref_cgpara(list,href,cgpara2);
  3232. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3233. paramanager.freecgpara(list,cgpara1);
  3234. paramanager.freecgpara(list,cgpara2);
  3235. allocallcpuregisters(list);
  3236. a_call_name(list,'FPC_INITIALIZE',false);
  3237. deallocallcpuregisters(list);
  3238. end;
  3239. cgpara1.done;
  3240. cgpara2.done;
  3241. end;
  3242. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  3243. var
  3244. href : treference;
  3245. cgpara1,cgpara2 : TCGPara;
  3246. begin
  3247. cgpara1.init;
  3248. cgpara2.init;
  3249. if is_ansistring(t) or
  3250. is_widestring(t) or
  3251. is_unicodestring(t) or
  3252. is_interfacecom_or_dispinterface(t) then
  3253. begin
  3254. g_decrrefcount(list,t,ref);
  3255. a_load_const_ref(list,OS_ADDR,0,ref);
  3256. end
  3257. else if t.typ=variantdef then
  3258. begin
  3259. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3260. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3261. paramanager.freecgpara(list,cgpara1);
  3262. allocallcpuregisters(list);
  3263. a_call_name(list,'FPC_VARIANT_CLEAR',false);
  3264. deallocallcpuregisters(list);
  3265. end
  3266. else
  3267. begin
  3268. if is_open_array(t) then
  3269. InternalError(201103051);
  3270. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3271. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3272. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  3273. a_loadaddr_ref_cgpara(list,href,cgpara2);
  3274. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3275. paramanager.freecgpara(list,cgpara1);
  3276. paramanager.freecgpara(list,cgpara2);
  3277. allocallcpuregisters(list);
  3278. a_call_name(list,'FPC_FINALIZE',false);
  3279. deallocallcpuregisters(list);
  3280. end;
  3281. cgpara1.done;
  3282. cgpara2.done;
  3283. end;
  3284. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  3285. { generate range checking code for the value at location p. The type }
  3286. { type used is checked against todefs ranges. fromdef (p.resultdef) }
  3287. { is the original type used at that location. When both defs are equal }
  3288. { the check is also insert (needed for succ,pref,inc,dec) }
  3289. const
  3290. aintmax=high(aint);
  3291. var
  3292. neglabel : tasmlabel;
  3293. hreg : tregister;
  3294. lto,hto,
  3295. lfrom,hfrom : TConstExprInt;
  3296. fromsize, tosize: cardinal;
  3297. from_signed, to_signed: boolean;
  3298. begin
  3299. { range checking on and range checkable value? }
  3300. if not(cs_check_range in current_settings.localswitches) or
  3301. not(fromdef.typ in [orddef,enumdef]) or
  3302. { C-style booleans can't really fail range checks, }
  3303. { all values are always valid }
  3304. is_cbool(todef) then
  3305. exit;
  3306. {$ifndef cpu64bitalu}
  3307. { handle 64bit rangechecks separate for 32bit processors }
  3308. if is_64bit(fromdef) or is_64bit(todef) then
  3309. begin
  3310. cg64.g_rangecheck64(list,l,fromdef,todef);
  3311. exit;
  3312. end;
  3313. {$endif cpu64bitalu}
  3314. { only check when assigning to scalar, subranges are different, }
  3315. { when todef=fromdef then the check is always generated }
  3316. getrange(fromdef,lfrom,hfrom);
  3317. getrange(todef,lto,hto);
  3318. from_signed := is_signed(fromdef);
  3319. to_signed := is_signed(todef);
  3320. { check the rangedef of the array, not the array itself }
  3321. { (only change now, since getrange needs the arraydef) }
  3322. if (todef.typ = arraydef) then
  3323. todef := tarraydef(todef).rangedef;
  3324. { no range check if from and to are equal and are both longint/dword }
  3325. { (if we have a 32bit processor) or int64/qword, since such }
  3326. { operations can at most cause overflows (JM) }
  3327. { Note that these checks are mostly processor independent, they only }
  3328. { have to be changed once we introduce 64bit subrange types }
  3329. {$ifdef cpu64bitalu}
  3330. if (fromdef = todef) and
  3331. (fromdef.typ=orddef) and
  3332. (((((torddef(fromdef).ordtype = s64bit) and
  3333. (lfrom = low(int64)) and
  3334. (hfrom = high(int64))) or
  3335. ((torddef(fromdef).ordtype = u64bit) and
  3336. (lfrom = low(qword)) and
  3337. (hfrom = high(qword))) or
  3338. ((torddef(fromdef).ordtype = scurrency) and
  3339. (lfrom = low(int64)) and
  3340. (hfrom = high(int64)))))) then
  3341. exit;
  3342. {$else cpu64bitalu}
  3343. if (fromdef = todef) and
  3344. (fromdef.typ=orddef) and
  3345. (((((torddef(fromdef).ordtype = s32bit) and
  3346. (lfrom = int64(low(longint))) and
  3347. (hfrom = int64(high(longint)))) or
  3348. ((torddef(fromdef).ordtype = u32bit) and
  3349. (lfrom = low(cardinal)) and
  3350. (hfrom = high(cardinal)))))) then
  3351. exit;
  3352. {$endif cpu64bitalu}
  3353. { optimize some range checks away in safe cases }
  3354. fromsize := fromdef.size;
  3355. tosize := todef.size;
  3356. if ((from_signed = to_signed) or
  3357. (not from_signed)) and
  3358. (lto<=lfrom) and (hto>=hfrom) and
  3359. (fromsize <= tosize) then
  3360. begin
  3361. { if fromsize < tosize, and both have the same signed-ness or }
  3362. { fromdef is unsigned, then all bit patterns from fromdef are }
  3363. { valid for todef as well }
  3364. if (fromsize < tosize) then
  3365. exit;
  3366. if (fromsize = tosize) and
  3367. (from_signed = to_signed) then
  3368. { only optimize away if all bit patterns which fit in fromsize }
  3369. { are valid for the todef }
  3370. begin
  3371. {$push}
  3372. {$Q-}
  3373. {$R-}
  3374. if to_signed then
  3375. begin
  3376. { calculation of the low/high ranges must not overflow 64 bit
  3377. otherwise we end up comparing with zero for 64 bit data types on
  3378. 64 bit processors }
  3379. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  3380. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  3381. exit
  3382. end
  3383. else
  3384. begin
  3385. { calculation of the low/high ranges must not overflow 64 bit
  3386. otherwise we end up having all zeros for 64 bit data types on
  3387. 64 bit processors }
  3388. if (lto = 0) and
  3389. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  3390. exit
  3391. end;
  3392. {$pop}
  3393. end
  3394. end;
  3395. { generate the rangecheck code for the def where we are going to }
  3396. { store the result }
  3397. { use the trick that }
  3398. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  3399. { To be able to do that, we have to make sure however that either }
  3400. { fromdef and todef are both signed or unsigned, or that we leave }
  3401. { the parts < 0 and > maxlongint out }
  3402. if from_signed xor to_signed then
  3403. begin
  3404. if from_signed then
  3405. { from is signed, to is unsigned }
  3406. begin
  3407. { if high(from) < 0 -> always range error }
  3408. if (hfrom < 0) or
  3409. { if low(to) > maxlongint also range error }
  3410. (lto > aintmax) then
  3411. begin
  3412. a_call_name(list,'FPC_RANGEERROR',false);
  3413. exit
  3414. end;
  3415. { from is signed and to is unsigned -> when looking at to }
  3416. { as an signed value, it must be < maxaint (otherwise }
  3417. { it will become negative, which is invalid since "to" is unsigned) }
  3418. if hto > aintmax then
  3419. hto := aintmax;
  3420. end
  3421. else
  3422. { from is unsigned, to is signed }
  3423. begin
  3424. if (lfrom > aintmax) or
  3425. (hto < 0) then
  3426. begin
  3427. a_call_name(list,'FPC_RANGEERROR',false);
  3428. exit
  3429. end;
  3430. { from is unsigned and to is signed -> when looking at to }
  3431. { as an unsigned value, it must be >= 0 (since negative }
  3432. { values are the same as values > maxlongint) }
  3433. if lto < 0 then
  3434. lto := 0;
  3435. end;
  3436. end;
  3437. hreg:=getintregister(list,OS_INT);
  3438. a_load_loc_reg(list,OS_INT,l,hreg);
  3439. a_op_const_reg(list,OP_SUB,OS_INT,tcgint(int64(lto)),hreg);
  3440. current_asmdata.getjumplabel(neglabel);
  3441. {
  3442. if from_signed then
  3443. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  3444. else
  3445. }
  3446. {$ifdef cpu64bitalu}
  3447. if qword(hto-lto)>qword(aintmax) then
  3448. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  3449. else
  3450. {$endif cpu64bitalu}
  3451. a_cmp_const_reg_label(list,OS_INT,OC_BE,tcgint(int64(hto-lto)),hreg,neglabel);
  3452. a_call_name(list,'FPC_RANGEERROR',false);
  3453. a_label(list,neglabel);
  3454. end;
  3455. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  3456. begin
  3457. g_overflowCheck(list,loc,def);
  3458. end;
  3459. {$ifdef cpuflags}
  3460. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  3461. var
  3462. tmpreg : tregister;
  3463. begin
  3464. tmpreg:=getintregister(list,size);
  3465. g_flags2reg(list,size,f,tmpreg);
  3466. a_load_reg_ref(list,size,size,tmpreg,ref);
  3467. end;
  3468. {$endif cpuflags}
  3469. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  3470. var
  3471. OKLabel : tasmlabel;
  3472. cgpara1 : TCGPara;
  3473. begin
  3474. if (cs_check_object in current_settings.localswitches) or
  3475. (cs_check_range in current_settings.localswitches) then
  3476. begin
  3477. current_asmdata.getjumplabel(oklabel);
  3478. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  3479. cgpara1.init;
  3480. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3481. a_load_const_cgpara(list,OS_INT,tcgint(210),cgpara1);
  3482. paramanager.freecgpara(list,cgpara1);
  3483. a_call_name(list,'FPC_HANDLEERROR',false);
  3484. a_label(list,oklabel);
  3485. cgpara1.done;
  3486. end;
  3487. end;
  3488. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  3489. var
  3490. hrefvmt : treference;
  3491. cgpara1,cgpara2 : TCGPara;
  3492. begin
  3493. cgpara1.init;
  3494. cgpara2.init;
  3495. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3496. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3497. if (cs_check_object in current_settings.localswitches) then
  3498. begin
  3499. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0,sizeof(pint));
  3500. a_loadaddr_ref_cgpara(list,hrefvmt,cgpara2);
  3501. a_load_reg_cgpara(list,OS_ADDR,reg,cgpara1);
  3502. paramanager.freecgpara(list,cgpara1);
  3503. paramanager.freecgpara(list,cgpara2);
  3504. allocallcpuregisters(list);
  3505. a_call_name(list,'FPC_CHECK_OBJECT_EXT',false);
  3506. deallocallcpuregisters(list);
  3507. end
  3508. else
  3509. if (cs_check_range in current_settings.localswitches) then
  3510. begin
  3511. a_load_reg_cgpara(list,OS_ADDR,reg,cgpara1);
  3512. paramanager.freecgpara(list,cgpara1);
  3513. allocallcpuregisters(list);
  3514. a_call_name(list,'FPC_CHECK_OBJECT',false);
  3515. deallocallcpuregisters(list);
  3516. end;
  3517. cgpara1.done;
  3518. cgpara2.done;
  3519. end;
  3520. {*****************************************************************************
  3521. Entry/Exit Code Functions
  3522. *****************************************************************************}
  3523. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:tcgint;destreg:tregister);
  3524. var
  3525. sizereg,sourcereg,lenreg : tregister;
  3526. cgpara1,cgpara2,cgpara3 : TCGPara;
  3527. begin
  3528. { because some abis don't support dynamic stack allocation properly
  3529. open array value parameters are copied onto the heap
  3530. }
  3531. { calculate necessary memory }
  3532. { read/write operations on one register make the life of the register allocator hard }
  3533. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  3534. begin
  3535. lenreg:=getintregister(list,OS_INT);
  3536. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  3537. end
  3538. else
  3539. lenreg:=lenloc.register;
  3540. sizereg:=getintregister(list,OS_INT);
  3541. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  3542. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  3543. { load source }
  3544. sourcereg:=getaddressregister(list);
  3545. a_loadaddr_ref_reg(list,ref,sourcereg);
  3546. { do getmem call }
  3547. cgpara1.init;
  3548. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3549. a_load_reg_cgpara(list,OS_INT,sizereg,cgpara1);
  3550. paramanager.freecgpara(list,cgpara1);
  3551. allocallcpuregisters(list);
  3552. a_call_name(list,'FPC_GETMEM',false);
  3553. deallocallcpuregisters(list);
  3554. cgpara1.done;
  3555. { return the new address }
  3556. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  3557. { do move call }
  3558. cgpara1.init;
  3559. cgpara2.init;
  3560. cgpara3.init;
  3561. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3562. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3563. paramanager.getintparaloc(pocall_default,3,cgpara3);
  3564. { load size }
  3565. a_load_reg_cgpara(list,OS_INT,sizereg,cgpara3);
  3566. { load destination }
  3567. a_load_reg_cgpara(list,OS_ADDR,destreg,cgpara2);
  3568. { load source }
  3569. a_load_reg_cgpara(list,OS_ADDR,sourcereg,cgpara1);
  3570. paramanager.freecgpara(list,cgpara3);
  3571. paramanager.freecgpara(list,cgpara2);
  3572. paramanager.freecgpara(list,cgpara1);
  3573. allocallcpuregisters(list);
  3574. a_call_name(list,'FPC_MOVE',false);
  3575. deallocallcpuregisters(list);
  3576. cgpara3.done;
  3577. cgpara2.done;
  3578. cgpara1.done;
  3579. end;
  3580. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  3581. var
  3582. cgpara1 : TCGPara;
  3583. begin
  3584. { do move call }
  3585. cgpara1.init;
  3586. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3587. { load source }
  3588. a_load_loc_cgpara(list,l,cgpara1);
  3589. paramanager.freecgpara(list,cgpara1);
  3590. allocallcpuregisters(list);
  3591. a_call_name(list,'FPC_FREEMEM',false);
  3592. deallocallcpuregisters(list);
  3593. cgpara1.done;
  3594. end;
  3595. procedure tcg.g_save_registers(list:TAsmList);
  3596. var
  3597. href : treference;
  3598. size : longint;
  3599. r : integer;
  3600. begin
  3601. { calculate temp. size }
  3602. size:=0;
  3603. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3604. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3605. inc(size,sizeof(aint));
  3606. { mm registers }
  3607. if uses_registers(R_MMREGISTER) then
  3608. begin
  3609. { Make sure we reserve enough space to do the alignment based on the offset
  3610. later on. We can't use the size for this, because the alignment of the start
  3611. of the temp is smaller than needed for an OS_VECTOR }
  3612. inc(size,tcgsize2size[OS_VECTOR]);
  3613. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3614. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3615. inc(size,tcgsize2size[OS_VECTOR]);
  3616. end;
  3617. if size>0 then
  3618. begin
  3619. tg.GetTemp(list,size,sizeof(aint),tt_noreuse,current_procinfo.save_regs_ref);
  3620. include(current_procinfo.flags,pi_has_saved_regs);
  3621. { Copy registers to temp }
  3622. href:=current_procinfo.save_regs_ref;
  3623. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3624. begin
  3625. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3626. begin
  3627. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  3628. inc(href.offset,sizeof(aint));
  3629. end;
  3630. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  3631. end;
  3632. if uses_registers(R_MMREGISTER) then
  3633. begin
  3634. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3635. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3636. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3637. begin
  3638. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3639. begin
  3640. a_loadmm_reg_ref(list,OS_VECTOR,OS_VECTOR,newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE),href,nil);
  3641. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3642. end;
  3643. include(rg[R_MMREGISTER].preserved_by_proc,saved_mm_registers[r]);
  3644. end;
  3645. end;
  3646. end;
  3647. end;
  3648. procedure tcg.g_restore_registers(list:TAsmList);
  3649. var
  3650. href : treference;
  3651. r : integer;
  3652. hreg : tregister;
  3653. begin
  3654. if not(pi_has_saved_regs in current_procinfo.flags) then
  3655. exit;
  3656. { Copy registers from temp }
  3657. href:=current_procinfo.save_regs_ref;
  3658. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3659. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3660. begin
  3661. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  3662. { Allocate register so the optimizer does not remove the load }
  3663. a_reg_alloc(list,hreg);
  3664. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  3665. inc(href.offset,sizeof(aint));
  3666. end;
  3667. if uses_registers(R_MMREGISTER) then
  3668. begin
  3669. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3670. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3671. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3672. begin
  3673. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3674. begin
  3675. hreg:=newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE);
  3676. { Allocate register so the optimizer does not remove the load }
  3677. a_reg_alloc(list,hreg);
  3678. a_loadmm_ref_reg(list,OS_VECTOR,OS_VECTOR,href,hreg,nil);
  3679. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3680. end;
  3681. end;
  3682. end;
  3683. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  3684. end;
  3685. procedure tcg.g_profilecode(list : TAsmList);
  3686. begin
  3687. end;
  3688. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  3689. begin
  3690. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  3691. end;
  3692. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: tcgint);
  3693. begin
  3694. a_load_const_ref(list, OS_INT, a, href);
  3695. end;
  3696. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  3697. begin
  3698. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  3699. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  3700. end;
  3701. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: tcgint);
  3702. var
  3703. hsym : tsym;
  3704. href : treference;
  3705. paraloc : Pcgparalocation;
  3706. begin
  3707. { calculate the parameter info for the procdef }
  3708. procdef.init_paraloc_info(callerside);
  3709. hsym:=tsym(procdef.parast.Find('self'));
  3710. if not(assigned(hsym) and
  3711. (hsym.typ=paravarsym)) then
  3712. internalerror(200305251);
  3713. paraloc:=tparavarsym(hsym).paraloc[callerside].location;
  3714. while paraloc<>nil do
  3715. with paraloc^ do
  3716. begin
  3717. case loc of
  3718. LOC_REGISTER:
  3719. a_op_const_reg(list,OP_SUB,size,ioffset,register);
  3720. LOC_REFERENCE:
  3721. begin
  3722. { offset in the wrapper needs to be adjusted for the stored
  3723. return address }
  3724. reference_reset_base(href,reference.index,reference.offset+sizeof(pint),sizeof(pint));
  3725. a_op_const_ref(list,OP_SUB,size,ioffset,href);
  3726. end
  3727. else
  3728. internalerror(200309189);
  3729. end;
  3730. paraloc:=next;
  3731. end;
  3732. end;
  3733. procedure tcg.g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string);
  3734. begin
  3735. a_jmp_name(list,externalname);
  3736. end;
  3737. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  3738. begin
  3739. a_call_name(list,s,false);
  3740. end;
  3741. procedure tcg.a_call_ref(list : TAsmList;ref: treference);
  3742. var
  3743. tempreg : TRegister;
  3744. begin
  3745. tempreg := getintregister(list, OS_ADDR);
  3746. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,tempreg);
  3747. a_call_reg(list,tempreg);
  3748. end;
  3749. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string; weak: boolean): tregister;
  3750. var
  3751. l: tasmsymbol;
  3752. ref: treference;
  3753. nlsymname: string;
  3754. begin
  3755. result := NR_NO;
  3756. case target_info.system of
  3757. system_powerpc_darwin,
  3758. system_i386_darwin,
  3759. system_i386_iphonesim,
  3760. system_powerpc64_darwin,
  3761. system_arm_darwin:
  3762. begin
  3763. nlsymname:='L'+symname+'$non_lazy_ptr';
  3764. l:=current_asmdata.getasmsymbol(nlsymname);
  3765. if not(assigned(l)) then
  3766. begin
  3767. new_section(current_asmdata.asmlists[al_picdata],sec_data_nonlazy,'',sizeof(pint));
  3768. l:=current_asmdata.DefineAsmSymbol(nlsymname,AB_LOCAL,AT_DATA);
  3769. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  3770. if not(weak) then
  3771. current_asmdata.asmlists[al_picdata].concat(tai_directive.Create(asd_indirect_symbol,current_asmdata.RefAsmSymbol(symname).Name))
  3772. else
  3773. current_asmdata.asmlists[al_picdata].concat(tai_directive.Create(asd_indirect_symbol,current_asmdata.WeakRefAsmSymbol(symname).Name));
  3774. {$ifdef cpu64bitaddr}
  3775. current_asmdata.asmlists[al_picdata].concat(tai_const.create_64bit(0));
  3776. {$else cpu64bitaddr}
  3777. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  3778. {$endif cpu64bitaddr}
  3779. end;
  3780. result := getaddressregister(list);
  3781. reference_reset_symbol(ref,l,0,sizeof(pint));
  3782. { a_load_ref_reg will turn this into a pic-load if needed }
  3783. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  3784. end;
  3785. end;
  3786. end;
  3787. procedure tcg.g_maybe_got_init(list: TAsmList);
  3788. begin
  3789. end;
  3790. procedure tcg.g_call(list: TAsmList;const s: string);
  3791. begin
  3792. allocallcpuregisters(list);
  3793. a_call_name(list,s,false);
  3794. deallocallcpuregisters(list);
  3795. end;
  3796. procedure tcg.g_local_unwind(list: TAsmList; l: TAsmLabel);
  3797. begin
  3798. a_jmp_always(list,l);
  3799. end;
  3800. procedure tcg.a_loadmm_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister; shuffle: pmmshuffle);
  3801. begin
  3802. internalerror(200807231);
  3803. end;
  3804. procedure tcg.a_loadmm_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister; shuffle: pmmshuffle);
  3805. begin
  3806. internalerror(200807232);
  3807. end;
  3808. procedure tcg.a_loadmm_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference; shuffle: pmmshuffle);
  3809. begin
  3810. internalerror(200807233);
  3811. end;
  3812. procedure tcg.a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size: tcgsize; src, dst: tregister; shuffle: pmmshuffle);
  3813. begin
  3814. internalerror(200807234);
  3815. end;
  3816. function tcg.getflagregister(list: TAsmList; size: Tcgsize): Tregister;
  3817. begin
  3818. Result:=TRegister(0);
  3819. internalerror(200807238);
  3820. end;
  3821. {*****************************************************************************
  3822. TCG64
  3823. *****************************************************************************}
  3824. {$ifndef cpu64bitalu}
  3825. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  3826. begin
  3827. a_load64_reg_reg(list,regsrc,regdst);
  3828. a_op64_const_reg(list,op,size,value,regdst);
  3829. end;
  3830. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  3831. var
  3832. tmpreg64 : tregister64;
  3833. begin
  3834. { when src1=dst then we need to first create a temp to prevent
  3835. overwriting src1 with src2 }
  3836. if (regsrc1.reghi=regdst.reghi) or
  3837. (regsrc1.reglo=regdst.reghi) or
  3838. (regsrc1.reghi=regdst.reglo) or
  3839. (regsrc1.reglo=regdst.reglo) then
  3840. begin
  3841. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3842. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3843. a_load64_reg_reg(list,regsrc2,tmpreg64);
  3844. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  3845. a_load64_reg_reg(list,tmpreg64,regdst);
  3846. end
  3847. else
  3848. begin
  3849. a_load64_reg_reg(list,regsrc2,regdst);
  3850. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  3851. end;
  3852. end;
  3853. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  3854. var
  3855. tmpreg64 : tregister64;
  3856. begin
  3857. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3858. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3859. a_load64_subsetref_reg(list,sref,tmpreg64);
  3860. a_op64_const_reg(list,op,size,a,tmpreg64);
  3861. a_load64_reg_subsetref(list,tmpreg64,sref);
  3862. end;
  3863. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  3864. var
  3865. tmpreg64 : tregister64;
  3866. begin
  3867. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3868. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3869. a_load64_subsetref_reg(list,sref,tmpreg64);
  3870. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  3871. a_load64_reg_subsetref(list,tmpreg64,sref);
  3872. end;
  3873. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  3874. var
  3875. tmpreg64 : tregister64;
  3876. begin
  3877. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3878. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3879. a_load64_subsetref_reg(list,sref,tmpreg64);
  3880. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  3881. a_load64_reg_subsetref(list,tmpreg64,sref);
  3882. end;
  3883. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  3884. var
  3885. tmpreg64 : tregister64;
  3886. begin
  3887. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3888. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3889. a_load64_subsetref_reg(list,ssref,tmpreg64);
  3890. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  3891. end;
  3892. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3893. begin
  3894. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  3895. ovloc.loc:=LOC_VOID;
  3896. end;
  3897. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3898. begin
  3899. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  3900. ovloc.loc:=LOC_VOID;
  3901. end;
  3902. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  3903. begin
  3904. case l.loc of
  3905. LOC_REFERENCE, LOC_CREFERENCE:
  3906. a_load64_ref_subsetref(list,l.reference,sref);
  3907. LOC_REGISTER,LOC_CREGISTER:
  3908. a_load64_reg_subsetref(list,l.register64,sref);
  3909. LOC_CONSTANT :
  3910. a_load64_const_subsetref(list,l.value64,sref);
  3911. LOC_SUBSETREF,LOC_CSUBSETREF:
  3912. a_load64_subsetref_subsetref(list,l.sref,sref);
  3913. else
  3914. internalerror(2006082210);
  3915. end;
  3916. end;
  3917. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  3918. begin
  3919. case l.loc of
  3920. LOC_REFERENCE, LOC_CREFERENCE:
  3921. a_load64_subsetref_ref(list,sref,l.reference);
  3922. LOC_REGISTER,LOC_CREGISTER:
  3923. a_load64_subsetref_reg(list,sref,l.register64);
  3924. LOC_SUBSETREF,LOC_CSUBSETREF:
  3925. a_load64_subsetref_subsetref(list,sref,l.sref);
  3926. else
  3927. internalerror(2006082211);
  3928. end;
  3929. end;
  3930. {$endif cpu64bitalu}
  3931. procedure destroy_codegen;
  3932. begin
  3933. cg.free;
  3934. cg:=nil;
  3935. {$ifndef cpu64bitalu}
  3936. cg64.free;
  3937. cg64:=nil;
  3938. {$endif cpu64bitalu}
  3939. end;
  3940. end.