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cpubase.pas 14 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Contains the base types for the SPARC
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit cpubase;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. globtype,strings,cutils,cclasses,aasmbase,cpuinfo,cgbase;
  22. {*****************************************************************************
  23. Assembler Opcodes
  24. *****************************************************************************}
  25. type
  26. { TODO: CPU32 opcodes do not fully include the Ultra SPRAC instruction set.}
  27. { don't change the order of these opcodes! }
  28. TAsmOp=({$i opcode.inc});
  29. {# This should define the array of instructions as string }
  30. op2strtable=array[tasmop] of string[11];
  31. Const
  32. {# First value of opcode enumeration }
  33. firstop = low(tasmop);
  34. {# Last value of opcode enumeration }
  35. lastop = high(tasmop);
  36. std_op2str:op2strtable=({$i strinst.inc});
  37. {*****************************************************************************
  38. Registers
  39. *****************************************************************************}
  40. type
  41. { Number of registers used for indexing in tables }
  42. tregisterindex=0..{$i rspnor.inc}-1;
  43. totherregisterset = set of tregisterindex;
  44. const
  45. { Available Superregisters }
  46. {$i rspsup.inc}
  47. { No Subregisters }
  48. R_SUBWHOLE = R_SUBD;
  49. { Available Registers }
  50. {$i rspcon.inc}
  51. first_int_imreg = $20;
  52. first_fpu_imreg = $20;
  53. { MM Super register first and last }
  54. first_mm_supreg = 0;
  55. first_mm_imreg = 1;
  56. { TODO: Calculate bsstart}
  57. regnumber_count_bsstart = 128;
  58. regnumber_table : array[tregisterindex] of tregister = (
  59. {$i rspnum.inc}
  60. );
  61. regstabs_table : array[tregisterindex] of ShortInt = (
  62. {$i rspstab.inc}
  63. );
  64. regdwarf_table : array[tregisterindex] of ShortInt = (
  65. {$i rspdwrf.inc}
  66. );
  67. {*****************************************************************************
  68. Conditions
  69. *****************************************************************************}
  70. type
  71. TAsmCond=(C_None,
  72. C_A,C_AE,C_B,C_BE,C_C,C_E,C_G,C_GE,C_L,C_LE,C_NA,C_NAE,
  73. C_NB,C_NBE,C_NC,C_NE,C_NG,C_NGE,C_NL,C_NLE,C_NO,C_NP,
  74. C_NS,C_NZ,C_O,C_P,C_PE,C_PO,C_S,C_Z,
  75. C_FE,C_FG,C_FL,C_FGE,C_FLE,C_FNE
  76. );
  77. const
  78. cond2str:array[TAsmCond] of string[3]=('',
  79. 'gu','cc','cs','leu','cs','e','g','ge','l','le','leu','cs',
  80. 'cc','gu','cc','ne','le','l','ge','g','vc','XX',
  81. 'pos','ne','vs','XX','XX','XX','vs','e',
  82. 'e','g','l','ge','le','ne'
  83. );
  84. const
  85. CondAsmOps=2;
  86. CondAsmOp:array[0..CondAsmOps-1] of TAsmOp=(
  87. A_Bxx,A_FBxx
  88. );
  89. CondAsmOpStr:array[0..CondAsmOps-1] of string[7]=(
  90. 'B','FB'
  91. );
  92. {*****************************************************************************
  93. Flags
  94. *****************************************************************************}
  95. type
  96. TResFlags=(
  97. { Integer results }
  98. F_E, {Equal}
  99. F_NE, {Not Equal}
  100. F_G, {Greater}
  101. F_L, {Less}
  102. F_GE, {Greater or Equal}
  103. F_LE, {Less or Equal}
  104. F_A, {Above}
  105. F_AE, {Above or Equal}
  106. F_B, {Below}
  107. F_BE, {Below or Equal}
  108. F_C, {Carry}
  109. F_NC, {Not Carry}
  110. { Floating point results }
  111. F_FE, {Equal}
  112. F_FNE, {Not Equal}
  113. F_FG, {Greater}
  114. F_FL, {Less}
  115. F_FGE, {Greater or Equal}
  116. F_FLE {Less or Equal}
  117. );
  118. {*****************************************************************************
  119. Operand Sizes
  120. *****************************************************************************}
  121. {*****************************************************************************
  122. Constants
  123. *****************************************************************************}
  124. const
  125. max_operands = 3;
  126. maxintregs = 8;
  127. maxfpuregs = 8;
  128. maxaddrregs = 0;
  129. maxvarregs = 8;
  130. varregs : Array [1..maxvarregs] of Tsuperregister =
  131. (RS_L0,RS_L1,RS_L2,RS_L3,RS_L4,RS_L5,RS_L6,RS_L7);
  132. maxfpuvarregs = 1;
  133. fpuvarregs : Array [1..maxfpuvarregs] of TsuperRegister =
  134. (RS_F2);
  135. {*****************************************************************************
  136. Default generic sizes
  137. *****************************************************************************}
  138. {# Defines the default address size for a processor, }
  139. OS_ADDR = OS_32;
  140. {# the natural int size for a processor, }
  141. OS_INT = OS_32;
  142. OS_SINT = OS_S32;
  143. {# the maximum float size for a processor, }
  144. OS_FLOAT = OS_F64;
  145. {# the size of a vector register for a processor }
  146. OS_VECTOR = OS_M64;
  147. {*****************************************************************************
  148. Generic Register names
  149. *****************************************************************************}
  150. {# Stack pointer register }
  151. NR_STACK_POINTER_REG = NR_O6;
  152. RS_STACK_POINTER_REG = RS_O6;
  153. {# Frame pointer register }
  154. NR_FRAME_POINTER_REG = NR_I6;
  155. RS_FRAME_POINTER_REG = RS_I6;
  156. {# Register for addressing absolute data in a position independant way,
  157. such as in PIC code. The exact meaning is ABI specific. For
  158. further information look at GCC source : PIC_OFFSET_TABLE_REGNUM
  159. Taken from GCC rs6000.h
  160. }
  161. { TODO: As indicated in rs6000.h, but can't find it anywhere else!}
  162. {PIC_OFFSET_REG = R_30;}
  163. { Return address for DWARF }
  164. NR_RETURN_ADDRESS_REG = NR_I7;
  165. { the return_result_reg, is used inside the called function to store its return
  166. value when that is a scalar value otherwise a pointer to the address of the
  167. result is placed inside it }
  168. { Results are returned in this register (32-bit values) }
  169. NR_FUNCTION_RETURN_REG = NR_I0;
  170. RS_FUNCTION_RETURN_REG = RS_I0;
  171. { Low part of 64bit return value }
  172. NR_FUNCTION_RETURN64_LOW_REG = NR_I1;
  173. RS_FUNCTION_RETURN64_LOW_REG = RS_I1;
  174. { High part of 64bit return value }
  175. NR_FUNCTION_RETURN64_HIGH_REG = NR_I0;
  176. RS_FUNCTION_RETURN64_HIGH_REG = RS_I0;
  177. { The value returned from a function is available in this register }
  178. NR_FUNCTION_RESULT_REG = NR_O0;
  179. RS_FUNCTION_RESULT_REG = RS_O0;
  180. { The lowh part of 64bit value returned from a function }
  181. NR_FUNCTION_RESULT64_LOW_REG = NR_O1;
  182. RS_FUNCTION_RESULT64_LOW_REG = RS_O1;
  183. { The high part of 64bit value returned from a function }
  184. NR_FUNCTION_RESULT64_HIGH_REG = NR_O0;
  185. RS_FUNCTION_RESULT64_HIGH_REG = RS_O0;
  186. NR_FPU_RESULT_REG = NR_F0;
  187. NR_MM_RESULT_REG = NR_NO;
  188. PARENT_FRAMEPOINTER_OFFSET = 68; { o0 }
  189. {*****************************************************************************
  190. GCC /ABI linking information
  191. *****************************************************************************}
  192. {# Registers which must be saved when calling a routine declared as
  193. cppdecl, cdecl, stdcall, safecall, palmossyscall. The registers
  194. saved should be the ones as defined in the target ABI and / or GCC.
  195. This value can be deduced from CALLED_USED_REGISTERS array in the
  196. GCC source.
  197. }
  198. saved_standard_registers : array[0..0] of tsuperregister = (RS_NO);
  199. { this is only for the generic code which is not used for this architecture }
  200. saved_mm_registers : array[0..0] of tsuperregister = (RS_NO);
  201. {# Required parameter alignment when calling a routine declared as
  202. stdcall and cdecl. The alignment value should be the one defined
  203. by GCC or the target ABI.
  204. The value of this constant is equal to the constant
  205. PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
  206. }
  207. std_param_align = 4; { for 32-bit version only }
  208. {*****************************************************************************
  209. CPU Dependent Constants
  210. *****************************************************************************}
  211. const
  212. simm13lo=-4096;
  213. simm13hi=4095;
  214. {*****************************************************************************
  215. Helpers
  216. *****************************************************************************}
  217. function is_calljmp(o:tasmop):boolean;
  218. procedure inverse_flags(var f: TResFlags);
  219. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  220. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  221. function flags_to_cond(const f: TResFlags) : TAsmCond;
  222. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  223. function reg_cgsize(const reg: tregister): tcgsize;
  224. function std_regname(r:Tregister):string;
  225. function std_regnum_search(const s:string):Tregister;
  226. function findreg_by_number(r:Tregister):tregisterindex;
  227. function dwarf_reg(r:tregister):shortint;
  228. implementation
  229. uses
  230. rgBase,verbose;
  231. const
  232. std_regname_table : TRegNameTAble = (
  233. {$i rspstd.inc}
  234. );
  235. regnumber_index : TRegisterIndexTable = (
  236. {$i rsprni.inc}
  237. );
  238. std_regname_index : TRegisterIndexTable = (
  239. {$i rspsri.inc}
  240. );
  241. {*****************************************************************************
  242. Helpers
  243. *****************************************************************************}
  244. function is_calljmp(o:tasmop):boolean;
  245. const
  246. CallJmpOp=[A_JMPL..A_CBccc];
  247. begin
  248. is_calljmp:=(o in CallJmpOp);
  249. end;
  250. procedure inverse_flags(var f: TResFlags);
  251. const
  252. inv_flags: array[TResFlags] of TResFlags =
  253. (F_NE,F_E,F_LE,F_GE,F_L,F_G,F_BE,F_B,F_AE,F_A,F_NC,F_C,
  254. F_FNE,F_FE,F_FLE,F_FGE,F_FL,F_FG);
  255. begin
  256. f:=inv_flags[f];
  257. end;
  258. function flags_to_cond(const f:TResFlags):TAsmCond;
  259. const
  260. flags_2_cond:array[TResFlags] of TAsmCond=
  261. (C_E,C_NE,C_G,C_L,C_GE,C_LE,C_A,C_AE,C_B,C_BE,C_C,C_NC,
  262. C_FE,C_FNE,C_FG,C_FL,C_FGE,C_FLE);
  263. begin
  264. result:=flags_2_cond[f];
  265. end;
  266. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  267. begin
  268. case regtype of
  269. R_FPUREGISTER:
  270. case s of
  271. OS_F32:
  272. cgsize2subreg:=R_SUBFS;
  273. OS_F64:
  274. cgsize2subreg:=R_SUBFD;
  275. OS_F128:
  276. cgsize2subreg:=R_SUBFQ;
  277. else
  278. internalerror(2009071903);
  279. end;
  280. else
  281. begin
  282. if s in [OS_64,OS_S64] then
  283. cgsize2subreg:=R_SUBQ
  284. else
  285. cgsize2subreg:=R_SUBWHOLE;
  286. end;
  287. end;
  288. end;
  289. function reg_cgsize(const reg: tregister): tcgsize;
  290. begin
  291. case getregtype(reg) of
  292. R_INTREGISTER :
  293. result:=OS_32;
  294. R_FPUREGISTER :
  295. begin
  296. if getsubreg(reg)=R_SUBFD then
  297. result:=OS_F64
  298. else
  299. result:=OS_F32;
  300. end;
  301. else
  302. internalerror(200303181);
  303. end;
  304. end;
  305. function findreg_by_number(r:Tregister):tregisterindex;
  306. begin
  307. result:=findreg_by_number_table(r,regnumber_index);
  308. end;
  309. function std_regname(r:Tregister):string;
  310. var
  311. p : tregisterindex;
  312. begin
  313. { For double floats show a pair like %f0:%f1 }
  314. if (getsubreg(r)=R_SUBFD) and
  315. (getsupreg(r)<first_fpu_imreg) then
  316. begin
  317. setsubreg(r,R_SUBFS);
  318. p:=findreg_by_number(r);
  319. if p<>0 then
  320. result:=std_regname_table[p]
  321. else
  322. result:=generic_regname(r);
  323. setsupreg(r,getsupreg(r)+1);
  324. p:=findreg_by_number(r);
  325. if p<>0 then
  326. result:=result+':'+std_regname_table[p]
  327. else
  328. result:=result+':'+generic_regname(r);
  329. end
  330. else
  331. begin
  332. p:=findreg_by_number(r);
  333. if p<>0 then
  334. result:=std_regname_table[p]
  335. else
  336. result:=generic_regname(r);
  337. end;
  338. end;
  339. function std_regnum_search(const s:string):Tregister;
  340. begin
  341. result:=regnumber_table[findreg_by_name_table(s,std_regname_table,std_regname_index)];
  342. end;
  343. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  344. const
  345. inverse: array[TAsmCond] of TAsmCond=(C_None,
  346. C_NA,C_NAE,C_NB,C_NBE,C_NC,C_NE,C_NG,C_NGE,C_NL,C_NLE,C_A,C_AE,
  347. C_B,C_BE,C_C,C_E,C_G,C_GE,C_L,C_LE,C_O,C_P,
  348. C_S,C_Z,C_NO,C_NP,C_NP,C_P,C_NS,C_NZ,
  349. C_FNE,C_FLE,C_FGE,C_FL,C_FG,C_FE
  350. );
  351. begin
  352. result := inverse[c];
  353. end;
  354. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  355. begin
  356. result := c1 = c2;
  357. end;
  358. function dwarf_reg(r:tregister):shortint;
  359. begin
  360. result:=regdwarf_table[findreg_by_number(r)];
  361. if result=-1 then
  362. internalerror(200603251);
  363. end;
  364. end.