ncgutil.pas 86 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Helper routines for all code generators
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncgutil;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,cpuinfo,
  22. globtype,
  23. cpubase,cgbase,parabase,cgutils,
  24. aasmbase,aasmtai,aasmdata,aasmcpu,
  25. symconst,symbase,symdef,symsym,symtype,symtable
  26. {$ifndef cpu64bitalu}
  27. ,cg64f32
  28. {$endif not cpu64bitalu}
  29. ;
  30. type
  31. tloadregvars = (lr_dont_load_regvars, lr_load_regvars);
  32. pusedregvars = ^tusedregvars;
  33. tusedregvars = record
  34. intregvars, fpuregvars, mmregvars: Tsuperregisterworklist;
  35. end;
  36. {
  37. Not used currently, implemented because I thought we had to
  38. synchronise around if/then/else as well, but not needed. May
  39. still be useful for SSA once we get around to implementing
  40. that (JM)
  41. pusedregvarscommon = ^tusedregvarscommon;
  42. tusedregvarscommon = record
  43. allregvars, commonregvars, myregvars: tusedregvars;
  44. end;
  45. }
  46. procedure firstcomplex(p : tbinarynode);
  47. procedure maketojumpbool(list:TAsmList; p : tnode; loadregvars: tloadregvars);
  48. // procedure remove_non_regvars_from_loc(const t: tlocation; var regs:Tsuperregisterset);
  49. procedure location_force_mmreg(list:TAsmList;var l: tlocation;maybeconst:boolean);
  50. procedure location_allocate_register(list:TAsmList;out l: tlocation;def: tdef;constant: boolean);
  51. { loads a cgpara into a tlocation; assumes that loc.loc is already
  52. initialised }
  53. procedure gen_load_cgpara_loc(list: TAsmList; vardef: tdef; const para: TCGPara; var destloc: tlocation; reusepara: boolean);
  54. { allocate registers for a tlocation; assumes that loc.loc is already
  55. set to LOC_CREGISTER/LOC_CFPUREGISTER/... }
  56. procedure gen_alloc_regloc(list:TAsmList;var loc: tlocation);
  57. procedure register_maybe_adjust_setbase(list: TAsmList; var l: tlocation; setbase: aint);
  58. function has_alias_name(pd:tprocdef;const s:string):boolean;
  59. procedure alloc_proc_symbol(pd: tprocdef);
  60. procedure release_proc_symbol(pd:tprocdef);
  61. procedure gen_proc_entry_code(list:TAsmList);
  62. procedure gen_proc_exit_code(list:TAsmList);
  63. procedure gen_stack_check_size_para(list:TAsmList);
  64. procedure gen_stack_check_call(list:TAsmList);
  65. procedure gen_save_used_regs(list:TAsmList);
  66. procedure gen_restore_used_regs(list:TAsmList);
  67. procedure gen_load_para_value(list:TAsmList);
  68. procedure gen_external_stub(list:TAsmList;pd:tprocdef;const externalname:string);
  69. procedure gen_load_vmt_register(list:TAsmList;objdef:tobjectdef;selfloc:tlocation;var vmtreg:tregister);
  70. procedure get_used_regvars(n: tnode; var rv: tusedregvars);
  71. { adds the regvars used in n and its children to rv.allregvars,
  72. those which were already in rv.allregvars to rv.commonregvars and
  73. uses rv.myregvars as scratch (so that two uses of the same regvar
  74. in a single tree to make it appear in commonregvars). Useful to
  75. find out which regvars are used in two different node trees
  76. e.g. in the "else" and "then" path, or in various case blocks }
  77. // procedure get_used_regvars_common(n: tnode; var rv: tusedregvarscommon);
  78. procedure gen_sync_regvars(list:TAsmList; var rv: tusedregvars);
  79. { Allocate the buffers for exception management and setjmp environment.
  80. Return a pointer to these buffers, send them to the utility routine
  81. so they are registered, and then call setjmp.
  82. Then compare the result of setjmp with 0, and if not equal
  83. to zero, then jump to exceptlabel.
  84. Also store the result of setjmp to a temporary space by calling g_save_exception_reason
  85. It is to note that this routine may be called *after* the stackframe of a
  86. routine has been called, therefore on machines where the stack cannot
  87. be modified, all temps should be allocated on the heap instead of the
  88. stack. }
  89. type
  90. texceptiontemps=record
  91. jmpbuf,
  92. envbuf,
  93. reasonbuf : treference;
  94. end;
  95. procedure get_exception_temps(list:TAsmList;var t:texceptiontemps);
  96. procedure unget_exception_temps(list:TAsmList;const t:texceptiontemps);
  97. procedure new_exception(list:TAsmList;const t:texceptiontemps;exceptlabel:tasmlabel);
  98. procedure free_exception(list:TAsmList;const t:texceptiontemps;a:aint;endexceptlabel:tasmlabel;onlyfree:boolean);
  99. procedure gen_alloc_symtable(list:TAsmList;pd:tprocdef;st:TSymtable);
  100. procedure gen_free_symtable(list:TAsmList;st:TSymtable);
  101. procedure location_free(list: TAsmList; const location : TLocation);
  102. function getprocalign : shortint;
  103. procedure gen_fpc_dummy(list : TAsmList);
  104. procedure gen_load_frame_for_exceptfilter(list : TAsmList);
  105. implementation
  106. uses
  107. version,
  108. cutils,cclasses,
  109. globals,systems,verbose,export,
  110. ppu,defutil,
  111. procinfo,paramgr,fmodule,
  112. regvars,dbgbase,
  113. pass_1,pass_2,
  114. nbas,ncon,nld,nmem,nutils,ngenutil,
  115. tgobj,cgobj,cgcpu,hlcgobj,hlcgcpu
  116. {$ifdef powerpc}
  117. , cpupi
  118. {$endif}
  119. {$ifdef powerpc64}
  120. , cpupi
  121. {$endif}
  122. {$ifdef SUPPORT_MMX}
  123. , cgx86
  124. {$endif SUPPORT_MMX}
  125. ;
  126. {*****************************************************************************
  127. Misc Helpers
  128. *****************************************************************************}
  129. {$if first_mm_imreg = 0}
  130. {$WARN 4044 OFF} { Comparison might be always false ... }
  131. {$endif}
  132. procedure location_free(list: TAsmList; const location : TLocation);
  133. begin
  134. case location.loc of
  135. LOC_VOID:
  136. ;
  137. LOC_REGISTER,
  138. LOC_CREGISTER:
  139. begin
  140. {$ifdef cpu64bitalu}
  141. { x86-64 system v abi:
  142. structs with up to 16 bytes are returned in registers }
  143. if location.size in [OS_128,OS_S128] then
  144. begin
  145. if getsupreg(location.register)<first_int_imreg then
  146. cg.ungetcpuregister(list,location.register);
  147. if getsupreg(location.registerhi)<first_int_imreg then
  148. cg.ungetcpuregister(list,location.registerhi);
  149. end
  150. {$else cpu64bitalu}
  151. if location.size in [OS_64,OS_S64] then
  152. begin
  153. if getsupreg(location.register64.reglo)<first_int_imreg then
  154. cg.ungetcpuregister(list,location.register64.reglo);
  155. if getsupreg(location.register64.reghi)<first_int_imreg then
  156. cg.ungetcpuregister(list,location.register64.reghi);
  157. end
  158. {$endif cpu64bitalu}
  159. else
  160. if getsupreg(location.register)<first_int_imreg then
  161. cg.ungetcpuregister(list,location.register);
  162. end;
  163. LOC_FPUREGISTER,
  164. LOC_CFPUREGISTER:
  165. begin
  166. if getsupreg(location.register)<first_fpu_imreg then
  167. cg.ungetcpuregister(list,location.register);
  168. end;
  169. LOC_MMREGISTER,
  170. LOC_CMMREGISTER :
  171. begin
  172. if getsupreg(location.register)<first_mm_imreg then
  173. cg.ungetcpuregister(list,location.register);
  174. end;
  175. LOC_REFERENCE,
  176. LOC_CREFERENCE :
  177. begin
  178. if paramanager.use_fixed_stack then
  179. location_freetemp(list,location);
  180. end;
  181. else
  182. internalerror(2004110211);
  183. end;
  184. end;
  185. procedure firstcomplex(p : tbinarynode);
  186. var
  187. fcl, fcr: longint;
  188. ncl, ncr: longint;
  189. begin
  190. { always calculate boolean AND and OR from left to right }
  191. if (p.nodetype in [orn,andn]) and
  192. is_boolean(p.left.resultdef) then
  193. begin
  194. if nf_swapped in p.flags then
  195. internalerror(200709253);
  196. end
  197. else
  198. begin
  199. fcl:=node_resources_fpu(p.left);
  200. fcr:=node_resources_fpu(p.right);
  201. ncl:=node_complexity(p.left);
  202. ncr:=node_complexity(p.right);
  203. { We swap left and right if
  204. a) right needs more floating point registers than left, and
  205. left needs more than 0 floating point registers (if it
  206. doesn't need any, swapping won't change the floating
  207. point register pressure)
  208. b) both left and right need an equal amount of floating
  209. point registers or right needs no floating point registers,
  210. and in addition right has a higher complexity than left
  211. (+- needs more integer registers, but not necessarily)
  212. }
  213. if ((fcr>fcl) and
  214. (fcl>0)) or
  215. (((fcr=fcl) or
  216. (fcr=0)) and
  217. (ncr>ncl)) then
  218. p.swapleftright
  219. end;
  220. end;
  221. procedure maketojumpbool(list:TAsmList; p : tnode; loadregvars: tloadregvars);
  222. {
  223. produces jumps to true respectively false labels using boolean expressions
  224. depending on whether the loading of regvars is currently being
  225. synchronized manually (such as in an if-node) or automatically (most of
  226. the other cases where this procedure is called), loadregvars can be
  227. "lr_load_regvars" or "lr_dont_load_regvars"
  228. }
  229. var
  230. opsize : tcgsize;
  231. storepos : tfileposinfo;
  232. tmpreg : tregister;
  233. begin
  234. if nf_error in p.flags then
  235. exit;
  236. storepos:=current_filepos;
  237. current_filepos:=p.fileinfo;
  238. if is_boolean(p.resultdef) then
  239. begin
  240. {$ifdef OLDREGVARS}
  241. if loadregvars = lr_load_regvars then
  242. load_all_regvars(list);
  243. {$endif OLDREGVARS}
  244. if is_constboolnode(p) then
  245. begin
  246. if Tordconstnode(p).value.uvalue<>0 then
  247. cg.a_jmp_always(list,current_procinfo.CurrTrueLabel)
  248. else
  249. cg.a_jmp_always(list,current_procinfo.CurrFalseLabel)
  250. end
  251. else
  252. begin
  253. opsize:=def_cgsize(p.resultdef);
  254. case p.location.loc of
  255. LOC_SUBSETREG,LOC_CSUBSETREG,
  256. LOC_SUBSETREF,LOC_CSUBSETREF:
  257. begin
  258. tmpreg := cg.getintregister(list,OS_INT);
  259. hlcg.a_load_loc_reg(list,p.resultdef,osuinttype,p.location,tmpreg);
  260. cg.a_cmp_const_reg_label(list,OS_INT,OC_NE,0,tmpreg,current_procinfo.CurrTrueLabel);
  261. cg.a_jmp_always(list,current_procinfo.CurrFalseLabel);
  262. end;
  263. LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE :
  264. begin
  265. {$ifdef cpu64bitalu}
  266. if opsize in [OS_128,OS_S128] then
  267. begin
  268. hlcg.location_force_reg(list,p.location,p.resultdef,cgsize_orddef(opsize),true);
  269. tmpreg:=cg.getintregister(list,OS_64);
  270. cg.a_op_reg_reg_reg(list,OP_OR,OS_64,p.location.register128.reglo,p.location.register128.reghi,tmpreg);
  271. location_reset(p.location,LOC_REGISTER,OS_64);
  272. p.location.register:=tmpreg;
  273. opsize:=OS_64;
  274. end;
  275. {$else cpu64bitalu}
  276. if opsize in [OS_64,OS_S64] then
  277. begin
  278. hlcg.location_force_reg(list,p.location,p.resultdef,cgsize_orddef(opsize),true);
  279. tmpreg:=cg.getintregister(list,OS_32);
  280. cg.a_op_reg_reg_reg(list,OP_OR,OS_32,p.location.register64.reglo,p.location.register64.reghi,tmpreg);
  281. location_reset(p.location,LOC_REGISTER,OS_32);
  282. p.location.register:=tmpreg;
  283. opsize:=OS_32;
  284. end;
  285. {$endif cpu64bitalu}
  286. cg.a_cmp_const_loc_label(list,opsize,OC_NE,0,p.location,current_procinfo.CurrTrueLabel);
  287. cg.a_jmp_always(list,current_procinfo.CurrFalseLabel);
  288. end;
  289. LOC_JUMP:
  290. ;
  291. {$ifdef cpuflags}
  292. LOC_FLAGS :
  293. begin
  294. cg.a_jmp_flags(list,p.location.resflags,current_procinfo.CurrTrueLabel);
  295. cg.a_reg_dealloc(list,NR_DEFAULTFLAGS);
  296. cg.a_jmp_always(list,current_procinfo.CurrFalseLabel);
  297. end;
  298. {$endif cpuflags}
  299. else
  300. begin
  301. printnode(output,p);
  302. internalerror(200308241);
  303. end;
  304. end;
  305. end;
  306. end
  307. else
  308. internalerror(200112305);
  309. current_filepos:=storepos;
  310. end;
  311. (*
  312. This code needs fixing. It is not safe to use rgint; on the m68000 it
  313. would be rgaddr.
  314. procedure remove_non_regvars_from_loc(const t: tlocation; var regs:Tsuperregisterset);
  315. begin
  316. case t.loc of
  317. LOC_REGISTER:
  318. begin
  319. { can't be a regvar, since it would be LOC_CREGISTER then }
  320. exclude(regs,getsupreg(t.register));
  321. if t.register64.reghi<>NR_NO then
  322. exclude(regs,getsupreg(t.register64.reghi));
  323. end;
  324. LOC_CREFERENCE,LOC_REFERENCE:
  325. begin
  326. if not(cs_opt_regvar in current_settings.optimizerswitches) or
  327. (getsupreg(t.reference.base) in cg.rgint.usableregs) then
  328. exclude(regs,getsupreg(t.reference.base));
  329. if not(cs_opt_regvar in current_settings.optimizerswitches) or
  330. (getsupreg(t.reference.index) in cg.rgint.usableregs) then
  331. exclude(regs,getsupreg(t.reference.index));
  332. end;
  333. end;
  334. end;
  335. *)
  336. {*****************************************************************************
  337. EXCEPTION MANAGEMENT
  338. *****************************************************************************}
  339. procedure get_exception_temps(list:TAsmList;var t:texceptiontemps);
  340. var
  341. except_buf_size: longint;
  342. begin
  343. { todo: is there a way to retrieve the except_buf_size from the size of
  344. the TExceptAddr record from the system unit (like we do for jmp_buf_size),
  345. without moving TExceptAddr to the interface part? }
  346. except_buf_size:=voidpointertype.size*2+sizeof(pint);
  347. get_jumpbuf_size;
  348. tg.GetTemp(list,except_buf_size,sizeof(pint),tt_persistent,t.envbuf);
  349. tg.GetTemp(list,jmp_buf_size,jmp_buf_align,tt_persistent,t.jmpbuf);
  350. tg.GetTemp(list,sizeof(pint),sizeof(pint),tt_persistent,t.reasonbuf);
  351. end;
  352. procedure unget_exception_temps(list:TAsmList;const t:texceptiontemps);
  353. begin
  354. tg.Ungettemp(list,t.jmpbuf);
  355. tg.ungettemp(list,t.envbuf);
  356. tg.ungettemp(list,t.reasonbuf);
  357. end;
  358. procedure new_exception(list:TAsmList;const t:texceptiontemps;exceptlabel:tasmlabel);
  359. const
  360. {$ifdef cpu16bitaddr}
  361. pushexceptaddr_frametype_cgsize = OS_S16;
  362. setjmp_result_cgsize = OS_S16;
  363. {$else cpu16bitaddr}
  364. pushexceptaddr_frametype_cgsize = OS_S32;
  365. setjmp_result_cgsize = OS_S32;
  366. {$endif cpu16bitaddr}
  367. var
  368. paraloc1,paraloc2,paraloc3 : tcgpara;
  369. pd: tprocdef;
  370. {$ifdef i8086}
  371. tmpreg: TRegister;
  372. {$endif i8086}
  373. begin
  374. pd:=search_system_proc('fpc_pushexceptaddr');
  375. paraloc1.init;
  376. paraloc2.init;
  377. paraloc3.init;
  378. paramanager.getintparaloc(pd,1,paraloc1);
  379. paramanager.getintparaloc(pd,2,paraloc2);
  380. paramanager.getintparaloc(pd,3,paraloc3);
  381. if pd.is_pushleftright then
  382. begin
  383. { push type of exceptionframe }
  384. cg.a_load_const_cgpara(list,pushexceptaddr_frametype_cgsize,1,paraloc1);
  385. cg.a_loadaddr_ref_cgpara(list,t.jmpbuf,paraloc2);
  386. cg.a_loadaddr_ref_cgpara(list,t.envbuf,paraloc3);
  387. end
  388. else
  389. begin
  390. cg.a_loadaddr_ref_cgpara(list,t.envbuf,paraloc3);
  391. cg.a_loadaddr_ref_cgpara(list,t.jmpbuf,paraloc2);
  392. { push type of exceptionframe }
  393. cg.a_load_const_cgpara(list,pushexceptaddr_frametype_cgsize,1,paraloc1);
  394. end;
  395. paramanager.freecgpara(list,paraloc3);
  396. paramanager.freecgpara(list,paraloc2);
  397. paramanager.freecgpara(list,paraloc1);
  398. cg.allocallcpuregisters(list);
  399. cg.a_call_name(list,'FPC_PUSHEXCEPTADDR',false);
  400. cg.deallocallcpuregisters(list);
  401. pd:=search_system_proc('fpc_setjmp');
  402. paramanager.getintparaloc(pd,1,paraloc1);
  403. {$ifdef i8086}
  404. if current_settings.x86memorymodel in x86_far_data_models then
  405. begin
  406. tmpreg:=cg.getintregister(list,OS_32);
  407. cg.a_load_reg_reg(list,OS_16,OS_16,NR_FUNCTION_RESULT32_LOW_REG,tmpreg);
  408. cg.a_load_reg_reg(list,OS_16,OS_16,NR_FUNCTION_RESULT32_HIGH_REG,GetNextReg(tmpreg));
  409. cg.a_load_reg_cgpara(list,OS_32,tmpreg,paraloc1);
  410. end
  411. else
  412. {$endif i8086}
  413. cg.a_load_reg_cgpara(list,OS_ADDR,NR_FUNCTION_RESULT_REG,paraloc1);
  414. paramanager.freecgpara(list,paraloc1);
  415. cg.allocallcpuregisters(list);
  416. cg.a_call_name(list,'FPC_SETJMP',false);
  417. cg.deallocallcpuregisters(list);
  418. cg.alloccpuregisters(list,R_INTREGISTER,[RS_FUNCTION_RESULT_REG]);
  419. cg.g_exception_reason_save(list, t.reasonbuf);
  420. cg.a_cmp_const_reg_label(list,setjmp_result_cgsize,OC_NE,0,cg.makeregsize(list,NR_FUNCTION_RESULT_REG,setjmp_result_cgsize),exceptlabel);
  421. cg.dealloccpuregisters(list,R_INTREGISTER,[RS_FUNCTION_RESULT_REG]);
  422. paraloc1.done;
  423. paraloc2.done;
  424. paraloc3.done;
  425. end;
  426. procedure free_exception(list:TAsmList;const t:texceptiontemps;a:aint;endexceptlabel:tasmlabel;onlyfree:boolean);
  427. begin
  428. cg.allocallcpuregisters(list);
  429. cg.a_call_name(list,'FPC_POPADDRSTACK',false);
  430. cg.deallocallcpuregisters(list);
  431. if not onlyfree then
  432. begin
  433. { g_exception_reason_load already allocates NR_FUNCTION_RESULT_REG }
  434. cg.g_exception_reason_load(list, t.reasonbuf);
  435. cg.a_cmp_const_reg_label(list,OS_INT,OC_EQ,a,NR_FUNCTION_RESULT_REG,endexceptlabel);
  436. cg.a_reg_dealloc(list,NR_FUNCTION_RESULT_REG);
  437. end;
  438. end;
  439. {*****************************************************************************
  440. TLocation
  441. *****************************************************************************}
  442. procedure register_maybe_adjust_setbase(list: TAsmList; var l: tlocation; setbase: aint);
  443. var
  444. tmpreg: tregister;
  445. begin
  446. if (setbase<>0) then
  447. begin
  448. if not(l.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  449. internalerror(2007091502);
  450. { subtract the setbase }
  451. case l.loc of
  452. LOC_CREGISTER:
  453. begin
  454. tmpreg := cg.getintregister(list,l.size);
  455. cg.a_op_const_reg_reg(list,OP_SUB,l.size,setbase,l.register,tmpreg);
  456. l.loc:=LOC_REGISTER;
  457. l.register:=tmpreg;
  458. end;
  459. LOC_REGISTER:
  460. begin
  461. cg.a_op_const_reg(list,OP_SUB,l.size,setbase,l.register);
  462. end;
  463. end;
  464. end;
  465. end;
  466. procedure location_force_mmreg(list:TAsmList;var l: tlocation;maybeconst:boolean);
  467. var
  468. reg : tregister;
  469. begin
  470. if (l.loc<>LOC_MMREGISTER) and
  471. ((l.loc<>LOC_CMMREGISTER) or (not maybeconst)) then
  472. begin
  473. reg:=cg.getmmregister(list,OS_VECTOR);
  474. cg.a_loadmm_loc_reg(list,OS_VECTOR,l,reg,nil);
  475. location_freetemp(list,l);
  476. location_reset(l,LOC_MMREGISTER,OS_VECTOR);
  477. l.register:=reg;
  478. end;
  479. end;
  480. procedure location_allocate_register(list: TAsmList;out l: tlocation;def: tdef;constant: boolean);
  481. begin
  482. l.size:=def_cgsize(def);
  483. if (def.typ=floatdef) and
  484. not(cs_fp_emulation in current_settings.moduleswitches) then
  485. begin
  486. if use_vectorfpu(def) then
  487. begin
  488. if constant then
  489. location_reset(l,LOC_CMMREGISTER,l.size)
  490. else
  491. location_reset(l,LOC_MMREGISTER,l.size);
  492. l.register:=cg.getmmregister(list,l.size);
  493. end
  494. else
  495. begin
  496. if constant then
  497. location_reset(l,LOC_CFPUREGISTER,l.size)
  498. else
  499. location_reset(l,LOC_FPUREGISTER,l.size);
  500. l.register:=cg.getfpuregister(list,l.size);
  501. end;
  502. end
  503. else
  504. begin
  505. if constant then
  506. location_reset(l,LOC_CREGISTER,l.size)
  507. else
  508. location_reset(l,LOC_REGISTER,l.size);
  509. {$ifdef cpu64bitalu}
  510. if l.size in [OS_128,OS_S128,OS_F128] then
  511. begin
  512. l.register128.reglo:=cg.getintregister(list,OS_64);
  513. l.register128.reghi:=cg.getintregister(list,OS_64);
  514. end
  515. else
  516. {$else cpu64bitalu}
  517. if l.size in [OS_64,OS_S64,OS_F64] then
  518. begin
  519. l.register64.reglo:=cg.getintregister(list,OS_32);
  520. l.register64.reghi:=cg.getintregister(list,OS_32);
  521. end
  522. else
  523. {$endif cpu64bitalu}
  524. { Note: for widths of records (and maybe objects, classes, etc.) an
  525. address register could be set here, but that is later
  526. changed to an intregister neverthless when in the
  527. tcgassignmentnode thlcgobj.maybe_change_load_node_reg is
  528. called for the temporary node; so the workaround for now is
  529. to fix the symptoms... }
  530. l.register:=cg.getintregister(list,l.size);
  531. end;
  532. end;
  533. {****************************************************************************
  534. Init/Finalize Code
  535. ****************************************************************************}
  536. procedure copyvalueparas(p:TObject;arg:pointer);
  537. var
  538. href : treference;
  539. hreg : tregister;
  540. list : TAsmList;
  541. hsym : tparavarsym;
  542. l : longint;
  543. localcopyloc : tlocation;
  544. sizedef : tdef;
  545. begin
  546. list:=TAsmList(arg);
  547. if (tsym(p).typ=paravarsym) and
  548. (tparavarsym(p).varspez=vs_value) and
  549. (paramanager.push_addr_param(tparavarsym(p).varspez,tparavarsym(p).vardef,current_procinfo.procdef.proccalloption)) then
  550. begin
  551. { we have no idea about the alignment at the caller side }
  552. hlcg.location_get_data_ref(list,tparavarsym(p).vardef,tparavarsym(p).initialloc,href,true,1);
  553. if is_open_array(tparavarsym(p).vardef) or
  554. is_array_of_const(tparavarsym(p).vardef) then
  555. begin
  556. { cdecl functions don't have a high pointer so it is not possible to generate
  557. a local copy }
  558. if not(current_procinfo.procdef.proccalloption in cdecl_pocalls) then
  559. begin
  560. hsym:=tparavarsym(get_high_value_sym(tparavarsym(p)));
  561. if not assigned(hsym) then
  562. internalerror(200306061);
  563. sizedef:=getpointerdef(tparavarsym(p).vardef);
  564. hreg:=hlcg.getaddressregister(list,sizedef);
  565. if not is_packed_array(tparavarsym(p).vardef) then
  566. hlcg.g_copyvaluepara_openarray(list,href,hsym.initialloc,tarraydef(tparavarsym(p).vardef),hreg)
  567. else
  568. internalerror(2006080401);
  569. // cg.g_copyvaluepara_packedopenarray(list,href,hsym.intialloc,tarraydef(tparavarsym(p).vardef).elepackedbitsize,hreg);
  570. hlcg.a_load_reg_loc(list,sizedef,sizedef,hreg,tparavarsym(p).initialloc);
  571. end;
  572. end
  573. else
  574. begin
  575. { Allocate space for the local copy }
  576. l:=tparavarsym(p).getsize;
  577. localcopyloc.loc:=LOC_REFERENCE;
  578. localcopyloc.size:=int_cgsize(l);
  579. tg.GetLocal(list,l,tparavarsym(p).vardef,localcopyloc.reference);
  580. { Copy data }
  581. if is_shortstring(tparavarsym(p).vardef) then
  582. begin
  583. { this code is only executed before the code for the body and the entry/exit code is generated
  584. so we're allowed to include pi_do_call here; after pass1 is run, this isn't allowed anymore
  585. }
  586. include(current_procinfo.flags,pi_do_call);
  587. hlcg.g_copyshortstring(list,href,localcopyloc.reference,tstringdef(tparavarsym(p).vardef));
  588. end
  589. else if tparavarsym(p).vardef.typ = variantdef then
  590. begin
  591. { this code is only executed before the code for the body and the entry/exit code is generated
  592. so we're allowed to include pi_do_call here; after pass1 is run, this isn't allowed anymore
  593. }
  594. include(current_procinfo.flags,pi_do_call);
  595. hlcg.g_copyvariant(list,href,localcopyloc.reference,tvariantdef(tparavarsym(p).vardef))
  596. end
  597. else
  598. begin
  599. { pass proper alignment info }
  600. localcopyloc.reference.alignment:=tparavarsym(p).vardef.alignment;
  601. cg.g_concatcopy(list,href,localcopyloc.reference,tparavarsym(p).vardef.size);
  602. end;
  603. { update localloc of varsym }
  604. tg.Ungetlocal(list,tparavarsym(p).localloc.reference);
  605. tparavarsym(p).localloc:=localcopyloc;
  606. tparavarsym(p).initialloc:=localcopyloc;
  607. end;
  608. end;
  609. end;
  610. { generates the code for incrementing the reference count of parameters and
  611. initialize out parameters }
  612. procedure init_paras(p:TObject;arg:pointer);
  613. var
  614. href : treference;
  615. hsym : tparavarsym;
  616. eldef : tdef;
  617. list : TAsmList;
  618. needs_inittable : boolean;
  619. begin
  620. list:=TAsmList(arg);
  621. if (tsym(p).typ=paravarsym) then
  622. begin
  623. needs_inittable:=is_managed_type(tparavarsym(p).vardef);
  624. if not needs_inittable then
  625. exit;
  626. case tparavarsym(p).varspez of
  627. vs_value :
  628. begin
  629. { variants are already handled by the call to fpc_variant_copy_overwrite if
  630. they are passed by reference }
  631. if not((tparavarsym(p).vardef.typ=variantdef) and
  632. paramanager.push_addr_param(tparavarsym(p).varspez,tparavarsym(p).vardef,current_procinfo.procdef.proccalloption)) then
  633. begin
  634. hlcg.location_get_data_ref(list,tparavarsym(p).vardef,tparavarsym(p).initialloc,href,is_open_array(tparavarsym(p).vardef),sizeof(pint));
  635. if is_open_array(tparavarsym(p).vardef) then
  636. begin
  637. { open arrays do not contain correct element count in their rtti,
  638. the actual count must be passed separately. }
  639. hsym:=tparavarsym(get_high_value_sym(tparavarsym(p)));
  640. eldef:=tarraydef(tparavarsym(p).vardef).elementdef;
  641. if not assigned(hsym) then
  642. internalerror(201003031);
  643. hlcg.g_array_rtti_helper(list,eldef,href,hsym.initialloc,'fpc_addref_array');
  644. end
  645. else
  646. hlcg.g_incrrefcount(list,tparavarsym(p).vardef,href);
  647. end;
  648. end;
  649. vs_out :
  650. begin
  651. { we have no idea about the alignment at the callee side,
  652. and the user also cannot specify "unaligned" here, so
  653. assume worst case }
  654. hlcg.location_get_data_ref(list,tparavarsym(p).vardef,tparavarsym(p).initialloc,href,true,1);
  655. if is_open_array(tparavarsym(p).vardef) then
  656. begin
  657. hsym:=tparavarsym(get_high_value_sym(tparavarsym(p)));
  658. eldef:=tarraydef(tparavarsym(p).vardef).elementdef;
  659. if not assigned(hsym) then
  660. internalerror(201103033);
  661. hlcg.g_array_rtti_helper(list,eldef,href,hsym.initialloc,'fpc_initialize_array');
  662. end
  663. else
  664. hlcg.g_initialize(list,tparavarsym(p).vardef,href);
  665. end;
  666. end;
  667. end;
  668. end;
  669. procedure gen_alloc_regloc(list:TAsmList;var loc: tlocation);
  670. begin
  671. case loc.loc of
  672. LOC_CREGISTER:
  673. begin
  674. {$ifdef cpu64bitalu}
  675. if loc.size in [OS_128,OS_S128] then
  676. begin
  677. loc.register128.reglo:=cg.getintregister(list,OS_64);
  678. loc.register128.reghi:=cg.getintregister(list,OS_64);
  679. end
  680. else
  681. {$else cpu64bitalu}
  682. if loc.size in [OS_64,OS_S64] then
  683. begin
  684. loc.register64.reglo:=cg.getintregister(list,OS_32);
  685. loc.register64.reghi:=cg.getintregister(list,OS_32);
  686. end
  687. else
  688. {$endif cpu64bitalu}
  689. loc.register:=cg.getintregister(list,loc.size);
  690. end;
  691. LOC_CFPUREGISTER:
  692. begin
  693. loc.register:=cg.getfpuregister(list,loc.size);
  694. end;
  695. LOC_CMMREGISTER:
  696. begin
  697. loc.register:=cg.getmmregister(list,loc.size);
  698. end;
  699. end;
  700. end;
  701. procedure gen_alloc_regvar(list:TAsmList;sym: tabstractnormalvarsym; allocreg: boolean);
  702. begin
  703. if allocreg then
  704. gen_alloc_regloc(list,sym.initialloc);
  705. if (pi_has_label in current_procinfo.flags) then
  706. begin
  707. { Allocate register already, to prevent first allocation to be
  708. inside a loop }
  709. {$if defined(cpu64bitalu)}
  710. if sym.initialloc.size in [OS_128,OS_S128] then
  711. begin
  712. cg.a_reg_sync(list,sym.initialloc.register128.reglo);
  713. cg.a_reg_sync(list,sym.initialloc.register128.reghi);
  714. end
  715. else
  716. {$elseif defined(cpu32bitalu)}
  717. if sym.initialloc.size in [OS_64,OS_S64] then
  718. begin
  719. cg.a_reg_sync(list,sym.initialloc.register64.reglo);
  720. cg.a_reg_sync(list,sym.initialloc.register64.reghi);
  721. end
  722. else
  723. {$elseif defined(cpu16bitalu)}
  724. if sym.initialloc.size in [OS_64,OS_S64] then
  725. begin
  726. cg.a_reg_sync(list,sym.initialloc.register64.reglo);
  727. cg.a_reg_sync(list,GetNextReg(sym.initialloc.register64.reglo));
  728. cg.a_reg_sync(list,sym.initialloc.register64.reghi);
  729. cg.a_reg_sync(list,GetNextReg(sym.initialloc.register64.reghi));
  730. end
  731. else
  732. if sym.initialloc.size in [OS_32,OS_S32] then
  733. begin
  734. cg.a_reg_sync(list,sym.initialloc.register);
  735. cg.a_reg_sync(list,GetNextReg(sym.initialloc.register));
  736. end
  737. else
  738. {$elseif defined(cpu8bitalu)}
  739. if sym.initialloc.size in [OS_64,OS_S64] then
  740. begin
  741. cg.a_reg_sync(list,sym.initialloc.register64.reglo);
  742. cg.a_reg_sync(list,GetNextReg(sym.initialloc.register64.reglo));
  743. cg.a_reg_sync(list,GetNextReg(GetNextReg(sym.initialloc.register64.reglo)));
  744. cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(sym.initialloc.register64.reglo))));
  745. cg.a_reg_sync(list,sym.initialloc.register64.reghi);
  746. cg.a_reg_sync(list,GetNextReg(sym.initialloc.register64.reghi));
  747. cg.a_reg_sync(list,GetNextReg(GetNextReg(sym.initialloc.register64.reghi)));
  748. cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(sym.initialloc.register64.reghi))));
  749. end
  750. else
  751. if sym.initialloc.size in [OS_32,OS_S32] then
  752. begin
  753. cg.a_reg_sync(list,sym.initialloc.register);
  754. cg.a_reg_sync(list,GetNextReg(sym.initialloc.register));
  755. cg.a_reg_sync(list,GetNextReg(GetNextReg(sym.initialloc.register)));
  756. cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(sym.initialloc.register))));
  757. end
  758. else
  759. if sym.initialloc.size in [OS_16,OS_S16] then
  760. begin
  761. cg.a_reg_sync(list,sym.initialloc.register);
  762. cg.a_reg_sync(list,GetNextReg(sym.initialloc.register));
  763. end
  764. else
  765. {$endif}
  766. cg.a_reg_sync(list,sym.initialloc.register);
  767. end;
  768. sym.localloc:=sym.initialloc;
  769. end;
  770. procedure gen_load_cgpara_loc(list: TAsmList; vardef: tdef; const para: TCGPara; var destloc: tlocation; reusepara: boolean);
  771. procedure unget_para(const paraloc:TCGParaLocation);
  772. begin
  773. case paraloc.loc of
  774. LOC_REGISTER :
  775. begin
  776. if getsupreg(paraloc.register)<first_int_imreg then
  777. cg.ungetcpuregister(list,paraloc.register);
  778. end;
  779. LOC_MMREGISTER :
  780. begin
  781. if getsupreg(paraloc.register)<first_mm_imreg then
  782. cg.ungetcpuregister(list,paraloc.register);
  783. end;
  784. LOC_FPUREGISTER :
  785. begin
  786. if getsupreg(paraloc.register)<first_fpu_imreg then
  787. cg.ungetcpuregister(list,paraloc.register);
  788. end;
  789. end;
  790. end;
  791. var
  792. paraloc : pcgparalocation;
  793. href : treference;
  794. sizeleft : aint;
  795. {$if defined(sparc) or defined(arm) or defined(mips)}
  796. tempref : treference;
  797. {$endif defined(sparc) or defined(arm) or defined(mips)}
  798. {$ifdef mips}
  799. tmpreg : tregister;
  800. {$endif mips}
  801. {$ifndef cpu64bitalu}
  802. tempreg : tregister;
  803. reg64 : tregister64;
  804. {$endif not cpu64bitalu}
  805. begin
  806. paraloc:=para.location;
  807. if not assigned(paraloc) then
  808. internalerror(200408203);
  809. { skip e.g. empty records }
  810. if (paraloc^.loc = LOC_VOID) then
  811. exit;
  812. case destloc.loc of
  813. LOC_REFERENCE :
  814. begin
  815. { If the parameter location is reused we don't need to copy
  816. anything }
  817. if not reusepara then
  818. begin
  819. href:=destloc.reference;
  820. sizeleft:=para.intsize;
  821. while assigned(paraloc) do
  822. begin
  823. if (paraloc^.size=OS_NO) then
  824. begin
  825. { Can only be a reference that contains the rest
  826. of the parameter }
  827. if (paraloc^.loc<>LOC_REFERENCE) or
  828. assigned(paraloc^.next) then
  829. internalerror(2005013010);
  830. cg.a_load_cgparaloc_ref(list,paraloc^,href,sizeleft,destloc.reference.alignment);
  831. inc(href.offset,sizeleft);
  832. sizeleft:=0;
  833. end
  834. else
  835. begin
  836. cg.a_load_cgparaloc_ref(list,paraloc^,href,tcgsize2size[paraloc^.size],destloc.reference.alignment);
  837. inc(href.offset,TCGSize2Size[paraloc^.size]);
  838. dec(sizeleft,TCGSize2Size[paraloc^.size]);
  839. end;
  840. unget_para(paraloc^);
  841. paraloc:=paraloc^.next;
  842. end;
  843. end;
  844. end;
  845. LOC_REGISTER,
  846. LOC_CREGISTER :
  847. begin
  848. {$ifdef cpu64bitalu}
  849. if (para.size in [OS_128,OS_S128,OS_F128]) and
  850. ({ in case of fpu emulation, or abi's that pass fpu values
  851. via integer registers }
  852. (vardef.typ=floatdef) or
  853. is_methodpointer(vardef) or
  854. is_record(vardef)) then
  855. begin
  856. case paraloc^.loc of
  857. LOC_REGISTER:
  858. begin
  859. if not assigned(paraloc^.next) then
  860. internalerror(200410104);
  861. if (target_info.endian=ENDIAN_BIG) then
  862. begin
  863. { paraloc^ -> high
  864. paraloc^.next -> low }
  865. unget_para(paraloc^);
  866. gen_alloc_regloc(list,destloc);
  867. { reg->reg, alignment is irrelevant }
  868. cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^,destloc.register128.reghi,8);
  869. unget_para(paraloc^.next^);
  870. cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^.next^,destloc.register128.reglo,8);
  871. end
  872. else
  873. begin
  874. { paraloc^ -> low
  875. paraloc^.next -> high }
  876. unget_para(paraloc^);
  877. gen_alloc_regloc(list,destloc);
  878. cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^,destloc.register128.reglo,8);
  879. unget_para(paraloc^.next^);
  880. cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^.next^,destloc.register128.reghi,8);
  881. end;
  882. end;
  883. LOC_REFERENCE:
  884. begin
  885. gen_alloc_regloc(list,destloc);
  886. reference_reset_base(href,paraloc^.reference.index,paraloc^.reference.offset,para.alignment);
  887. cg128.a_load128_ref_reg(list,href,destloc.register128);
  888. unget_para(paraloc^);
  889. end;
  890. else
  891. internalerror(2012090607);
  892. end
  893. end
  894. else
  895. {$else cpu64bitalu}
  896. if (para.size in [OS_64,OS_S64,OS_F64]) and
  897. (is_64bit(vardef) or
  898. { in case of fpu emulation, or abi's that pass fpu values
  899. via integer registers }
  900. (vardef.typ=floatdef) or
  901. is_methodpointer(vardef) or
  902. is_record(vardef)) then
  903. begin
  904. case paraloc^.loc of
  905. LOC_REGISTER:
  906. begin
  907. case para.locations_count of
  908. {$if defined(cpu16bitalu) or defined(cpu8bitalu)}
  909. { 4 paralocs? }
  910. 4:
  911. if (target_info.endian=ENDIAN_BIG) then
  912. begin
  913. { paraloc^ -> high
  914. paraloc^.next^.next -> low }
  915. unget_para(paraloc^);
  916. gen_alloc_regloc(list,destloc);
  917. { reg->reg, alignment is irrelevant }
  918. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^,GetNextReg(destloc.register64.reghi),2);
  919. unget_para(paraloc^.next^);
  920. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^,destloc.register64.reghi,2);
  921. unget_para(paraloc^.next^.next^);
  922. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^,GetNextReg(destloc.register64.reglo),2);
  923. unget_para(paraloc^.next^.next^.next^);
  924. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^.next^,destloc.register64.reglo,2);
  925. end
  926. else
  927. begin
  928. { paraloc^ -> low
  929. paraloc^.next^.next -> high }
  930. unget_para(paraloc^);
  931. gen_alloc_regloc(list,destloc);
  932. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^,destloc.register64.reglo,2);
  933. unget_para(paraloc^.next^);
  934. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^,GetNextReg(destloc.register64.reglo),2);
  935. unget_para(paraloc^.next^.next^);
  936. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^,destloc.register64.reghi,2);
  937. unget_para(paraloc^.next^.next^.next^);
  938. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^.next^,GetNextReg(destloc.register64.reghi),2);
  939. end;
  940. {$endif defined(cpu16bitalu) or defined(cpu8bitalu)}
  941. 2:
  942. if (target_info.endian=ENDIAN_BIG) then
  943. begin
  944. { paraloc^ -> high
  945. paraloc^.next -> low }
  946. unget_para(paraloc^);
  947. gen_alloc_regloc(list,destloc);
  948. { reg->reg, alignment is irrelevant }
  949. cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^,destloc.register64.reghi,4);
  950. unget_para(paraloc^.next^);
  951. cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^.next^,destloc.register64.reglo,4);
  952. end
  953. else
  954. begin
  955. { paraloc^ -> low
  956. paraloc^.next -> high }
  957. unget_para(paraloc^);
  958. gen_alloc_regloc(list,destloc);
  959. cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^,destloc.register64.reglo,4);
  960. unget_para(paraloc^.next^);
  961. cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^.next^,destloc.register64.reghi,4);
  962. end;
  963. else
  964. { unexpected number of paralocs }
  965. internalerror(200410104);
  966. end;
  967. end;
  968. LOC_REFERENCE:
  969. begin
  970. gen_alloc_regloc(list,destloc);
  971. reference_reset_base(href,paraloc^.reference.index,paraloc^.reference.offset,para.alignment);
  972. cg64.a_load64_ref_reg(list,href,destloc.register64);
  973. unget_para(paraloc^);
  974. end;
  975. else
  976. internalerror(2005101501);
  977. end
  978. end
  979. else
  980. {$endif cpu64bitalu}
  981. begin
  982. if assigned(paraloc^.next) then
  983. begin
  984. if (destloc.size in [OS_PAIR,OS_SPAIR]) and
  985. (para.Size in [OS_PAIR,OS_SPAIR]) then
  986. begin
  987. unget_para(paraloc^);
  988. gen_alloc_regloc(list,destloc);
  989. cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^,destloc.register,sizeof(aint));
  990. unget_para(paraloc^.Next^);
  991. {$if defined(cpu16bitalu) or defined(cpu8bitalu)}
  992. cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^,GetNextReg(destloc.register),sizeof(aint));
  993. {$else}
  994. cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^,destloc.registerhi,sizeof(aint));
  995. {$endif}
  996. end
  997. {$if defined(cpu8bitalu)}
  998. else if (destloc.size in [OS_32,OS_S32]) and
  999. (para.Size in [OS_32,OS_S32]) then
  1000. begin
  1001. unget_para(paraloc^);
  1002. gen_alloc_regloc(list,destloc);
  1003. cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^,destloc.register,sizeof(aint));
  1004. unget_para(paraloc^.Next^);
  1005. cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^,GetNextReg(destloc.register),sizeof(aint));
  1006. unget_para(paraloc^.Next^.Next^);
  1007. cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^.Next^,GetNextReg(GetNextReg(destloc.register)),sizeof(aint));
  1008. unget_para(paraloc^.Next^.Next^.Next^);
  1009. cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^.Next^.Next^,GetNextReg(GetNextReg(GetNextReg(destloc.register))),sizeof(aint));
  1010. end
  1011. {$endif defined(cpu8bitalu)}
  1012. else
  1013. internalerror(200410105);
  1014. end
  1015. else
  1016. begin
  1017. unget_para(paraloc^);
  1018. gen_alloc_regloc(list,destloc);
  1019. cg.a_load_cgparaloc_anyreg(list,destloc.size,paraloc^,destloc.register,sizeof(aint));
  1020. end;
  1021. end;
  1022. end;
  1023. LOC_FPUREGISTER,
  1024. LOC_CFPUREGISTER :
  1025. begin
  1026. {$ifdef mips}
  1027. if (destloc.size = paraloc^.Size) and
  1028. (paraloc^.Loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
  1029. begin
  1030. unget_para(paraloc^);
  1031. gen_alloc_regloc(list,destloc);
  1032. cg.a_load_cgparaloc_anyreg(list,destloc.size,paraloc^,destloc.register,para.alignment);
  1033. end
  1034. else if (destloc.size = OS_F32) and
  1035. (paraloc^.Loc in [LOC_REGISTER,LOC_CREGISTER]) then
  1036. begin
  1037. gen_alloc_regloc(list,destloc);
  1038. unget_para(paraloc^);
  1039. list.Concat(taicpu.op_reg_reg(A_MTC1,paraloc^.register,destloc.register));
  1040. end
  1041. { TODO: Produces invalid code, needs fixing together with regalloc setup. }
  1042. {
  1043. else if (destloc.size = OS_F64) and
  1044. (paraloc^.Loc in [LOC_REGISTER,LOC_CREGISTER]) and
  1045. (paraloc^.next^.Loc in [LOC_REGISTER,LOC_CREGISTER]) then
  1046. begin
  1047. gen_alloc_regloc(list,destloc);
  1048. tmpreg:=destloc.register;
  1049. unget_para(paraloc^);
  1050. list.Concat(taicpu.op_reg_reg(A_MTC1,paraloc^.register,tmpreg));
  1051. setsupreg(tmpreg,getsupreg(tmpreg)+1);
  1052. unget_para(paraloc^.next^);
  1053. list.Concat(taicpu.op_reg_reg(A_MTC1,paraloc^.Next^.register,tmpreg));
  1054. end
  1055. }
  1056. else
  1057. begin
  1058. sizeleft := TCGSize2Size[destloc.size];
  1059. tg.GetTemp(list,sizeleft,sizeleft,tt_normal,tempref);
  1060. href:=tempref;
  1061. while assigned(paraloc) do
  1062. begin
  1063. unget_para(paraloc^);
  1064. cg.a_load_cgparaloc_ref(list,paraloc^,href,sizeleft,destloc.reference.alignment);
  1065. inc(href.offset,TCGSize2Size[paraloc^.size]);
  1066. dec(sizeleft,TCGSize2Size[paraloc^.size]);
  1067. paraloc:=paraloc^.next;
  1068. end;
  1069. gen_alloc_regloc(list,destloc);
  1070. cg.a_loadfpu_ref_reg(list,destloc.size,destloc.size,tempref,destloc.register);
  1071. tg.UnGetTemp(list,tempref);
  1072. end;
  1073. {$else mips}
  1074. {$if defined(sparc) or defined(arm)}
  1075. { Arm and Sparc passes floats in int registers, when loading to fpu register
  1076. we need a temp }
  1077. sizeleft := TCGSize2Size[destloc.size];
  1078. tg.GetTemp(list,sizeleft,sizeleft,tt_normal,tempref);
  1079. href:=tempref;
  1080. while assigned(paraloc) do
  1081. begin
  1082. unget_para(paraloc^);
  1083. cg.a_load_cgparaloc_ref(list,paraloc^,href,sizeleft,destloc.reference.alignment);
  1084. inc(href.offset,TCGSize2Size[paraloc^.size]);
  1085. dec(sizeleft,TCGSize2Size[paraloc^.size]);
  1086. paraloc:=paraloc^.next;
  1087. end;
  1088. gen_alloc_regloc(list,destloc);
  1089. cg.a_loadfpu_ref_reg(list,destloc.size,destloc.size,tempref,destloc.register);
  1090. tg.UnGetTemp(list,tempref);
  1091. {$else defined(sparc) or defined(arm)}
  1092. unget_para(paraloc^);
  1093. gen_alloc_regloc(list,destloc);
  1094. { from register to register -> alignment is irrelevant }
  1095. cg.a_load_cgparaloc_anyreg(list,destloc.size,paraloc^,destloc.register,0);
  1096. if assigned(paraloc^.next) then
  1097. internalerror(200410109);
  1098. {$endif defined(sparc) or defined(arm)}
  1099. {$endif mips}
  1100. end;
  1101. LOC_MMREGISTER,
  1102. LOC_CMMREGISTER :
  1103. begin
  1104. {$ifndef cpu64bitalu}
  1105. { ARM vfp floats are passed in integer registers }
  1106. if (para.size=OS_F64) and
  1107. (paraloc^.size in [OS_32,OS_S32]) and
  1108. use_vectorfpu(vardef) then
  1109. begin
  1110. { we need 2x32bit reg }
  1111. if not assigned(paraloc^.next) or
  1112. assigned(paraloc^.next^.next) then
  1113. internalerror(2009112421);
  1114. unget_para(paraloc^.next^);
  1115. case paraloc^.next^.loc of
  1116. LOC_REGISTER:
  1117. tempreg:=paraloc^.next^.register;
  1118. LOC_REFERENCE:
  1119. begin
  1120. tempreg:=cg.getintregister(list,OS_32);
  1121. cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^.next^,tempreg,4);
  1122. end;
  1123. else
  1124. internalerror(2012051301);
  1125. end;
  1126. { don't free before the above, because then the getintregister
  1127. could reallocate this register and overwrite it }
  1128. unget_para(paraloc^);
  1129. gen_alloc_regloc(list,destloc);
  1130. if (target_info.endian=endian_big) then
  1131. { paraloc^ -> high
  1132. paraloc^.next -> low }
  1133. reg64:=joinreg64(tempreg,paraloc^.register)
  1134. else
  1135. reg64:=joinreg64(paraloc^.register,tempreg);
  1136. cg64.a_loadmm_intreg64_reg(list,OS_F64,reg64,destloc.register);
  1137. end
  1138. else
  1139. {$endif not cpu64bitalu}
  1140. begin
  1141. unget_para(paraloc^);
  1142. gen_alloc_regloc(list,destloc);
  1143. { from register to register -> alignment is irrelevant }
  1144. cg.a_load_cgparaloc_anyreg(list,destloc.size,paraloc^,destloc.register,0);
  1145. { data could come in two memory locations, for now
  1146. we simply ignore the sanity check (FK)
  1147. if assigned(paraloc^.next) then
  1148. internalerror(200410108);
  1149. }
  1150. end;
  1151. end;
  1152. else
  1153. internalerror(2010052903);
  1154. end;
  1155. end;
  1156. procedure gen_load_para_value(list:TAsmList);
  1157. procedure get_para(const paraloc:TCGParaLocation);
  1158. begin
  1159. case paraloc.loc of
  1160. LOC_REGISTER :
  1161. begin
  1162. if getsupreg(paraloc.register)<first_int_imreg then
  1163. cg.getcpuregister(list,paraloc.register);
  1164. end;
  1165. LOC_MMREGISTER :
  1166. begin
  1167. if getsupreg(paraloc.register)<first_mm_imreg then
  1168. cg.getcpuregister(list,paraloc.register);
  1169. end;
  1170. LOC_FPUREGISTER :
  1171. begin
  1172. if getsupreg(paraloc.register)<first_fpu_imreg then
  1173. cg.getcpuregister(list,paraloc.register);
  1174. end;
  1175. end;
  1176. end;
  1177. var
  1178. i : longint;
  1179. currpara : tparavarsym;
  1180. paraloc : pcgparalocation;
  1181. begin
  1182. if (po_assembler in current_procinfo.procdef.procoptions) or
  1183. { exceptfilters have a single hidden 'parentfp' parameter, which
  1184. is handled by tcg.g_proc_entry. }
  1185. (current_procinfo.procdef.proctypeoption=potype_exceptfilter) then
  1186. exit;
  1187. { Allocate registers used by parameters }
  1188. for i:=0 to current_procinfo.procdef.paras.count-1 do
  1189. begin
  1190. currpara:=tparavarsym(current_procinfo.procdef.paras[i]);
  1191. paraloc:=currpara.paraloc[calleeside].location;
  1192. while assigned(paraloc) do
  1193. begin
  1194. if paraloc^.loc in [LOC_REGISTER,LOC_FPUREGISTER,LOC_MMREGISTER] then
  1195. get_para(paraloc^);
  1196. paraloc:=paraloc^.next;
  1197. end;
  1198. end;
  1199. { Copy parameters to local references/registers }
  1200. for i:=0 to current_procinfo.procdef.paras.count-1 do
  1201. begin
  1202. currpara:=tparavarsym(current_procinfo.procdef.paras[i]);
  1203. gen_load_cgpara_loc(list,currpara.vardef,currpara.paraloc[calleeside],currpara.initialloc,paramanager.param_use_paraloc(currpara.paraloc[calleeside]));
  1204. { gen_load_cgpara_loc() already allocated the initialloc
  1205. -> don't allocate again }
  1206. if currpara.initialloc.loc in [LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMREGISTER] then
  1207. gen_alloc_regvar(list,currpara,false);
  1208. end;
  1209. { generate copies of call by value parameters, must be done before
  1210. the initialization and body is parsed because the refcounts are
  1211. incremented using the local copies }
  1212. current_procinfo.procdef.parast.SymList.ForEachCall(@copyvalueparas,list);
  1213. {$ifdef powerpc}
  1214. { unget the register that contains the stack pointer before the procedure entry, }
  1215. { which is used to access the parameters in their original callee-side location }
  1216. if (tppcprocinfo(current_procinfo).needs_frame_pointer) then
  1217. cg.a_reg_dealloc(list,NR_R12);
  1218. {$endif powerpc}
  1219. {$ifdef powerpc64}
  1220. { unget the register that contains the stack pointer before the procedure entry, }
  1221. { which is used to access the parameters in their original callee-side location }
  1222. if (tppcprocinfo(current_procinfo).needs_frame_pointer) then
  1223. cg.a_reg_dealloc(list, NR_OLD_STACK_POINTER_REG);
  1224. {$endif powerpc64}
  1225. if not(po_assembler in current_procinfo.procdef.procoptions) then
  1226. begin
  1227. { initialize refcounted paras, and trash others. Needed here
  1228. instead of in gen_initialize_code, because when a reference is
  1229. intialised or trashed while the pointer to that reference is kept
  1230. in a regvar, we add a register move and that one again has to
  1231. come after the parameter loading code as far as the register
  1232. allocator is concerned }
  1233. current_procinfo.procdef.parast.SymList.ForEachCall(@init_paras,list);
  1234. end;
  1235. end;
  1236. {****************************************************************************
  1237. Entry/Exit
  1238. ****************************************************************************}
  1239. function has_alias_name(pd:tprocdef;const s:string):boolean;
  1240. var
  1241. item : TCmdStrListItem;
  1242. begin
  1243. result:=true;
  1244. if pd.mangledname=s then
  1245. exit;
  1246. item := TCmdStrListItem(pd.aliasnames.first);
  1247. while assigned(item) do
  1248. begin
  1249. if item.str=s then
  1250. exit;
  1251. item := TCmdStrListItem(item.next);
  1252. end;
  1253. result:=false;
  1254. end;
  1255. procedure alloc_proc_symbol(pd: tprocdef);
  1256. var
  1257. item : TCmdStrListItem;
  1258. begin
  1259. item := TCmdStrListItem(pd.aliasnames.first);
  1260. while assigned(item) do
  1261. begin
  1262. current_asmdata.DefineAsmSymbol(item.str,AB_GLOBAL,AT_FUNCTION);
  1263. item := TCmdStrListItem(item.next);
  1264. end;
  1265. end;
  1266. procedure release_proc_symbol(pd:tprocdef);
  1267. var
  1268. idx : longint;
  1269. item : TCmdStrListItem;
  1270. begin
  1271. item:=TCmdStrListItem(pd.aliasnames.first);
  1272. while assigned(item) do
  1273. begin
  1274. idx:=current_asmdata.AsmSymbolDict.findindexof(item.str);
  1275. if idx>=0 then
  1276. current_asmdata.AsmSymbolDict.Delete(idx);
  1277. item:=TCmdStrListItem(item.next);
  1278. end;
  1279. end;
  1280. procedure gen_proc_entry_code(list:TAsmList);
  1281. var
  1282. hitemp,
  1283. lotemp, stack_frame_size : longint;
  1284. begin
  1285. { generate call frame marker for dwarf call frame info }
  1286. current_asmdata.asmcfi.start_frame(list);
  1287. { All temps are know, write offsets used for information }
  1288. if (cs_asm_source in current_settings.globalswitches) and
  1289. (current_procinfo.tempstart<>tg.lasttemp) then
  1290. begin
  1291. if tg.direction>0 then
  1292. begin
  1293. lotemp:=current_procinfo.tempstart;
  1294. hitemp:=tg.lasttemp;
  1295. end
  1296. else
  1297. begin
  1298. lotemp:=tg.lasttemp;
  1299. hitemp:=current_procinfo.tempstart;
  1300. end;
  1301. list.concat(Tai_comment.Create(strpnew('Temps allocated between '+std_regname(current_procinfo.framepointer)+
  1302. tostr_with_plus(lotemp)+' and '+std_regname(current_procinfo.framepointer)+tostr_with_plus(hitemp))));
  1303. end;
  1304. { generate target specific proc entry code }
  1305. stack_frame_size := current_procinfo.calc_stackframe_size;
  1306. if (stack_frame_size <> 0) and
  1307. (po_nostackframe in current_procinfo.procdef.procoptions) then
  1308. message1(parser_e_nostackframe_with_locals,tostr(stack_frame_size));
  1309. hlcg.g_proc_entry(list,stack_frame_size,(po_nostackframe in current_procinfo.procdef.procoptions));
  1310. end;
  1311. procedure gen_proc_exit_code(list:TAsmList);
  1312. var
  1313. parasize : longint;
  1314. begin
  1315. { c style clearstack does not need to remove parameters from the stack, only the
  1316. return value when it was pushed by arguments }
  1317. if current_procinfo.procdef.proccalloption in clearstack_pocalls then
  1318. begin
  1319. parasize:=0;
  1320. if paramanager.ret_in_param(current_procinfo.procdef.returndef,current_procinfo.procdef) then
  1321. inc(parasize,sizeof(pint));
  1322. end
  1323. else
  1324. begin
  1325. parasize:=current_procinfo.para_stack_size;
  1326. { the parent frame pointer para has to be removed by the caller in
  1327. case of Delphi-style parent frame pointer passing }
  1328. if not paramanager.use_fixed_stack and
  1329. (po_delphi_nested_cc in current_procinfo.procdef.procoptions) then
  1330. dec(parasize,sizeof(pint));
  1331. end;
  1332. { generate target specific proc exit code }
  1333. hlcg.g_proc_exit(list,parasize,(po_nostackframe in current_procinfo.procdef.procoptions));
  1334. { release return registers, needed for optimizer }
  1335. if not is_void(current_procinfo.procdef.returndef) then
  1336. paramanager.freecgpara(list,current_procinfo.procdef.funcretloc[calleeside]);
  1337. { end of frame marker for call frame info }
  1338. current_asmdata.asmcfi.end_frame(list);
  1339. end;
  1340. procedure gen_stack_check_size_para(list:TAsmList);
  1341. var
  1342. paraloc1 : tcgpara;
  1343. pd : tprocdef;
  1344. begin
  1345. pd:=search_system_proc('fpc_stackcheck');
  1346. paraloc1.init;
  1347. paramanager.getintparaloc(pd,1,paraloc1);
  1348. cg.a_load_const_cgpara(list,OS_INT,current_procinfo.calc_stackframe_size,paraloc1);
  1349. paramanager.freecgpara(list,paraloc1);
  1350. paraloc1.done;
  1351. end;
  1352. procedure gen_stack_check_call(list:TAsmList);
  1353. var
  1354. paraloc1 : tcgpara;
  1355. pd : tprocdef;
  1356. begin
  1357. pd:=search_system_proc('fpc_stackcheck');
  1358. paraloc1.init;
  1359. { Also alloc the register needed for the parameter }
  1360. paramanager.getintparaloc(pd,1,paraloc1);
  1361. paramanager.freecgpara(list,paraloc1);
  1362. { Call the helper }
  1363. cg.allocallcpuregisters(list);
  1364. cg.a_call_name(list,'FPC_STACKCHECK',false);
  1365. cg.deallocallcpuregisters(list);
  1366. paraloc1.done;
  1367. end;
  1368. procedure gen_save_used_regs(list:TAsmList);
  1369. begin
  1370. { Pure assembler routines need to save the registers themselves }
  1371. if (po_assembler in current_procinfo.procdef.procoptions) then
  1372. exit;
  1373. { oldfpccall expects all registers to be destroyed }
  1374. if current_procinfo.procdef.proccalloption<>pocall_oldfpccall then
  1375. cg.g_save_registers(list);
  1376. end;
  1377. procedure gen_restore_used_regs(list:TAsmList);
  1378. begin
  1379. { Pure assembler routines need to save the registers themselves }
  1380. if (po_assembler in current_procinfo.procdef.procoptions) then
  1381. exit;
  1382. { oldfpccall expects all registers to be destroyed }
  1383. if current_procinfo.procdef.proccalloption<>pocall_oldfpccall then
  1384. cg.g_restore_registers(list);
  1385. end;
  1386. {****************************************************************************
  1387. External handling
  1388. ****************************************************************************}
  1389. procedure gen_external_stub(list:TAsmList;pd:tprocdef;const externalname:string);
  1390. begin
  1391. create_hlcodegen;
  1392. { add the procedure to the al_procedures }
  1393. maybe_new_object_file(list);
  1394. new_section(list,sec_code,lower(pd.mangledname),current_settings.alignment.procalign);
  1395. if (po_global in pd.procoptions) then
  1396. list.concat(Tai_symbol.createname_global(pd.mangledname,AT_FUNCTION,0))
  1397. else
  1398. list.concat(Tai_symbol.createname(pd.mangledname,AT_FUNCTION,0));
  1399. cg.g_external_wrapper(list,pd,externalname);
  1400. destroy_hlcodegen;
  1401. end;
  1402. {****************************************************************************
  1403. Const Data
  1404. ****************************************************************************}
  1405. procedure gen_alloc_symtable(list:TAsmList;pd:tprocdef;st:TSymtable);
  1406. procedure setlocalloc(vs:tabstractnormalvarsym);
  1407. begin
  1408. if cs_asm_source in current_settings.globalswitches then
  1409. begin
  1410. case vs.initialloc.loc of
  1411. LOC_REFERENCE :
  1412. begin
  1413. if not assigned(vs.initialloc.reference.symbol) then
  1414. list.concat(Tai_comment.Create(strpnew('Var '+vs.realname+' located at '+
  1415. std_regname(vs.initialloc.reference.base)+tostr_with_plus(vs.initialloc.reference.offset)+
  1416. ', size='+tcgsize2str(vs.initialloc.size))));
  1417. end;
  1418. end;
  1419. end;
  1420. vs.localloc:=vs.initialloc;
  1421. FillChar(vs.currentregloc,sizeof(vs.currentregloc),0);
  1422. end;
  1423. var
  1424. i : longint;
  1425. highsym,
  1426. sym : tsym;
  1427. vs : tabstractnormalvarsym;
  1428. isaddr : boolean;
  1429. begin
  1430. for i:=0 to st.SymList.Count-1 do
  1431. begin
  1432. sym:=tsym(st.SymList[i]);
  1433. case sym.typ of
  1434. staticvarsym :
  1435. begin
  1436. vs:=tabstractnormalvarsym(sym);
  1437. { The code in loadnode.pass_generatecode will create the
  1438. LOC_REFERENCE instead for all none register variables. This is
  1439. required because we can't store an asmsymbol in the localloc because
  1440. the asmsymbol is invalid after an unit is compiled. This gives
  1441. problems when this procedure is inlined in another unit (PFV) }
  1442. if vs.is_regvar(false) then
  1443. begin
  1444. vs.initialloc.loc:=tvarregable2tcgloc[vs.varregable];
  1445. vs.initialloc.size:=def_cgsize(vs.vardef);
  1446. gen_alloc_regvar(list,vs,true);
  1447. setlocalloc(vs);
  1448. end;
  1449. end;
  1450. paravarsym :
  1451. begin
  1452. vs:=tabstractnormalvarsym(sym);
  1453. { Parameters passed to assembler procedures need to be kept
  1454. in the original location }
  1455. if (po_assembler in pd.procoptions) then
  1456. tparavarsym(vs).paraloc[calleeside].get_location(vs.initialloc)
  1457. { exception filters receive their frame pointer as a parameter }
  1458. else if (pd.proctypeoption=potype_exceptfilter) and
  1459. (vo_is_parentfp in vs.varoptions) then
  1460. begin
  1461. location_reset(vs.initialloc,LOC_REGISTER,OS_ADDR);
  1462. vs.initialloc.register:=NR_FRAME_POINTER_REG;
  1463. end
  1464. else
  1465. begin
  1466. { if an open array is used, also its high parameter is used,
  1467. since the hidden high parameters are inserted after the corresponding symbols,
  1468. we can increase the ref. count here }
  1469. if is_open_array(vs.vardef) or is_array_of_const(vs.vardef) then
  1470. begin
  1471. highsym:=get_high_value_sym(tparavarsym(vs));
  1472. if assigned(highsym) then
  1473. inc(highsym.refs);
  1474. end;
  1475. isaddr:=paramanager.push_addr_param(vs.varspez,vs.vardef,pd.proccalloption);
  1476. if isaddr then
  1477. vs.initialloc.size:=def_cgsize(voidpointertype)
  1478. else
  1479. vs.initialloc.size:=def_cgsize(vs.vardef);
  1480. if vs.is_regvar(isaddr) then
  1481. vs.initialloc.loc:=tvarregable2tcgloc[vs.varregable]
  1482. else
  1483. begin
  1484. vs.initialloc.loc:=LOC_REFERENCE;
  1485. { Reuse the parameter location for values to are at a single location on the stack }
  1486. if paramanager.param_use_paraloc(tparavarsym(sym).paraloc[calleeside]) then
  1487. begin
  1488. reference_reset_base(vs.initialloc.reference,tparavarsym(sym).paraloc[calleeside].location^.reference.index,
  1489. tparavarsym(sym).paraloc[calleeside].location^.reference.offset,tparavarsym(sym).paraloc[calleeside].alignment);
  1490. end
  1491. else
  1492. begin
  1493. if isaddr then
  1494. tg.GetLocal(list,voidpointertype.size,voidpointertype,vs.initialloc.reference)
  1495. else
  1496. tg.GetLocal(list,vs.getsize,tparavarsym(sym).paraloc[calleeside].alignment,vs.vardef,vs.initialloc.reference);
  1497. end;
  1498. end;
  1499. end;
  1500. setlocalloc(vs);
  1501. end;
  1502. localvarsym :
  1503. begin
  1504. vs:=tabstractnormalvarsym(sym);
  1505. vs.initialloc.size:=def_cgsize(vs.vardef);
  1506. if ([po_assembler,po_nostackframe] * pd.procoptions = [po_assembler,po_nostackframe]) and
  1507. (vo_is_funcret in vs.varoptions) then
  1508. begin
  1509. paramanager.create_funcretloc_info(pd,calleeside);
  1510. if assigned(pd.funcretloc[calleeside].location^.next) then
  1511. begin
  1512. { can't replace references to "result" with a complex
  1513. location expression inside assembler code }
  1514. location_reset(vs.initialloc,LOC_INVALID,OS_NO);
  1515. end
  1516. else
  1517. pd.funcretloc[calleeside].get_location(vs.initialloc);
  1518. end
  1519. else if (m_delphi in current_settings.modeswitches) and
  1520. (po_assembler in pd.procoptions) and
  1521. (vo_is_funcret in vs.varoptions) and
  1522. (vs.refs=0) then
  1523. begin
  1524. { not referenced, so don't allocate. Use dummy to }
  1525. { avoid ie's later on because of LOC_INVALID }
  1526. vs.initialloc.loc:=LOC_REGISTER;
  1527. vs.initialloc.size:=OS_INT;
  1528. vs.initialloc.register:=NR_FUNCTION_RESULT_REG;
  1529. end
  1530. else if vs.is_regvar(false) then
  1531. begin
  1532. vs.initialloc.loc:=tvarregable2tcgloc[vs.varregable];
  1533. gen_alloc_regvar(list,vs,true);
  1534. end
  1535. else
  1536. begin
  1537. vs.initialloc.loc:=LOC_REFERENCE;
  1538. tg.GetLocal(list,vs.getsize,vs.vardef,vs.initialloc.reference);
  1539. end;
  1540. setlocalloc(vs);
  1541. end;
  1542. end;
  1543. end;
  1544. end;
  1545. procedure add_regvars(var rv: tusedregvars; const location: tlocation);
  1546. begin
  1547. case location.loc of
  1548. LOC_CREGISTER:
  1549. {$if defined(cpu64bitalu)}
  1550. if location.size in [OS_128,OS_S128] then
  1551. begin
  1552. rv.intregvars.addnodup(getsupreg(location.register128.reglo));
  1553. rv.intregvars.addnodup(getsupreg(location.register128.reghi));
  1554. end
  1555. else
  1556. {$elseif defined(cpu32bitalu)}
  1557. if location.size in [OS_64,OS_S64] then
  1558. begin
  1559. rv.intregvars.addnodup(getsupreg(location.register64.reglo));
  1560. rv.intregvars.addnodup(getsupreg(location.register64.reghi));
  1561. end
  1562. else
  1563. {$elseif defined(cpu16bitalu)}
  1564. if location.size in [OS_64,OS_S64] then
  1565. begin
  1566. rv.intregvars.addnodup(getsupreg(location.register64.reglo));
  1567. rv.intregvars.addnodup(getsupreg(GetNextReg(location.register64.reglo)));
  1568. rv.intregvars.addnodup(getsupreg(location.register64.reghi));
  1569. rv.intregvars.addnodup(getsupreg(GetNextReg(location.register64.reghi)));
  1570. end
  1571. else
  1572. if location.size in [OS_32,OS_S32] then
  1573. begin
  1574. rv.intregvars.addnodup(getsupreg(location.register));
  1575. rv.intregvars.addnodup(getsupreg(GetNextReg(location.register)));
  1576. end
  1577. else
  1578. {$elseif defined(cpu8bitalu)}
  1579. if location.size in [OS_64,OS_S64] then
  1580. begin
  1581. rv.intregvars.addnodup(getsupreg(location.register64.reglo));
  1582. rv.intregvars.addnodup(getsupreg(GetNextReg(location.register64.reglo)));
  1583. rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(location.register64.reglo))));
  1584. rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(GetNextReg(location.register64.reglo)))));
  1585. rv.intregvars.addnodup(getsupreg(location.register64.reghi));
  1586. rv.intregvars.addnodup(getsupreg(GetNextReg(location.register64.reghi)));
  1587. rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(location.register64.reghi))));
  1588. rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(GetNextReg(location.register64.reghi)))));
  1589. end
  1590. else
  1591. if location.size in [OS_32,OS_S32] then
  1592. begin
  1593. rv.intregvars.addnodup(getsupreg(location.register));
  1594. rv.intregvars.addnodup(getsupreg(GetNextReg(location.register)));
  1595. rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(location.register))));
  1596. rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(GetNextReg(location.register)))));
  1597. end
  1598. else
  1599. if location.size in [OS_16,OS_S16] then
  1600. begin
  1601. rv.intregvars.addnodup(getsupreg(location.register));
  1602. rv.intregvars.addnodup(getsupreg(GetNextReg(location.register)));
  1603. end
  1604. else
  1605. {$endif}
  1606. rv.intregvars.addnodup(getsupreg(location.register));
  1607. LOC_CFPUREGISTER:
  1608. rv.fpuregvars.addnodup(getsupreg(location.register));
  1609. LOC_CMMREGISTER:
  1610. rv.mmregvars.addnodup(getsupreg(location.register));
  1611. end;
  1612. end;
  1613. function do_get_used_regvars(var n: tnode; arg: pointer): foreachnoderesult;
  1614. var
  1615. rv: pusedregvars absolute arg;
  1616. begin
  1617. case (n.nodetype) of
  1618. temprefn:
  1619. { We only have to synchronise a tempnode before a loop if it is }
  1620. { not created inside the loop, and only synchronise after the }
  1621. { loop if it's not destroyed inside the loop. If it's created }
  1622. { before the loop and not yet destroyed, then before the loop }
  1623. { is secondpassed tempinfo^.valid will be true, and we get the }
  1624. { correct registers. If it's not destroyed inside the loop, }
  1625. { then after the loop has been secondpassed tempinfo^.valid }
  1626. { be true and we also get the right registers. In other cases, }
  1627. { tempinfo^.valid will be false and so we do not add }
  1628. { unnecessary registers. This way, we don't have to look at }
  1629. { tempcreate and tempdestroy nodes to get this info (JM) }
  1630. if (ti_valid in ttemprefnode(n).tempinfo^.flags) then
  1631. add_regvars(rv^,ttemprefnode(n).tempinfo^.location);
  1632. loadn:
  1633. if (tloadnode(n).symtableentry.typ in [staticvarsym,localvarsym,paravarsym]) then
  1634. add_regvars(rv^,tabstractnormalvarsym(tloadnode(n).symtableentry).localloc);
  1635. vecn:
  1636. { range checks sometimes need the high parameter }
  1637. if (cs_check_range in current_settings.localswitches) and
  1638. (is_open_array(tvecnode(n).left.resultdef) or
  1639. is_array_of_const(tvecnode(n).left.resultdef)) and
  1640. not(current_procinfo.procdef.proccalloption in cdecl_pocalls) then
  1641. add_regvars(rv^,tabstractnormalvarsym(get_high_value_sym(tparavarsym(tloadnode(tvecnode(n).left).symtableentry))).localloc)
  1642. end;
  1643. result := fen_true;
  1644. end;
  1645. procedure get_used_regvars(n: tnode; var rv: tusedregvars);
  1646. begin
  1647. foreachnodestatic(n,@do_get_used_regvars,@rv);
  1648. end;
  1649. (*
  1650. See comments at declaration of pusedregvarscommon
  1651. function do_get_used_regvars_common(var n: tnode; arg: pointer): foreachnoderesult;
  1652. var
  1653. rv: pusedregvarscommon absolute arg;
  1654. begin
  1655. if (n.nodetype = loadn) and
  1656. (tloadnode(n).symtableentry.typ in [staticvarsym,localvarsym,paravarsym]) then
  1657. with tabstractnormalvarsym(tloadnode(n).symtableentry).localloc do
  1658. case loc of
  1659. LOC_CREGISTER:
  1660. { if not yet encountered in this node tree }
  1661. if (rv^.myregvars.intregvars.addnodup(getsupreg(register))) and
  1662. { but nevertheless already encountered somewhere }
  1663. not(rv^.allregvars.intregvars.addnodup(getsupreg(register))) then
  1664. { then it's a regvar used in two or more node trees }
  1665. rv^.commonregvars.intregvars.addnodup(getsupreg(register));
  1666. LOC_CFPUREGISTER:
  1667. if (rv^.myregvars.intregvars.addnodup(getsupreg(register))) and
  1668. not(rv^.allregvars.intregvars.addnodup(getsupreg(register))) then
  1669. rv^.commonregvars.intregvars.addnodup(getsupreg(register));
  1670. LOC_CMMREGISTER:
  1671. if (rv^.myregvars.intregvars.addnodup(getsupreg(register))) and
  1672. not(rv^.allregvars.intregvars.addnodup(getsupreg(register))) then
  1673. rv^.commonregvars.intregvars.addnodup(getsupreg(register));
  1674. end;
  1675. result := fen_true;
  1676. end;
  1677. procedure get_used_regvars_common(n: tnode; var rv: tusedregvarscommon);
  1678. begin
  1679. rv.myregvars.intregvars.clear;
  1680. rv.myregvars.fpuregvars.clear;
  1681. rv.myregvars.mmregvars.clear;
  1682. foreachnodestatic(n,@do_get_used_regvars_common,@rv);
  1683. end;
  1684. *)
  1685. procedure gen_sync_regvars(list:TAsmList; var rv: tusedregvars);
  1686. var
  1687. count: longint;
  1688. begin
  1689. for count := 1 to rv.intregvars.length do
  1690. cg.a_reg_sync(list,newreg(R_INTREGISTER,rv.intregvars.readidx(count-1),R_SUBWHOLE));
  1691. for count := 1 to rv.fpuregvars.length do
  1692. cg.a_reg_sync(list,newreg(R_FPUREGISTER,rv.fpuregvars.readidx(count-1),R_SUBWHOLE));
  1693. for count := 1 to rv.mmregvars.length do
  1694. cg.a_reg_sync(list,newreg(R_MMREGISTER,rv.mmregvars.readidx(count-1),R_SUBWHOLE));
  1695. end;
  1696. procedure gen_free_symtable(list:TAsmList;st:TSymtable);
  1697. var
  1698. i : longint;
  1699. sym : tsym;
  1700. begin
  1701. for i:=0 to st.SymList.Count-1 do
  1702. begin
  1703. sym:=tsym(st.SymList[i]);
  1704. if (sym.typ in [staticvarsym,localvarsym,paravarsym]) then
  1705. begin
  1706. with tabstractnormalvarsym(sym) do
  1707. begin
  1708. { Note: We need to keep the data available in memory
  1709. for the sub procedures that can access local data
  1710. in the parent procedures }
  1711. case localloc.loc of
  1712. LOC_CREGISTER :
  1713. if (pi_has_label in current_procinfo.flags) then
  1714. {$if defined(cpu64bitalu)}
  1715. if def_cgsize(vardef) in [OS_128,OS_S128] then
  1716. begin
  1717. cg.a_reg_sync(list,localloc.register128.reglo);
  1718. cg.a_reg_sync(list,localloc.register128.reghi);
  1719. end
  1720. else
  1721. {$elseif defined(cpu32bitalu)}
  1722. if def_cgsize(vardef) in [OS_64,OS_S64] then
  1723. begin
  1724. cg.a_reg_sync(list,localloc.register64.reglo);
  1725. cg.a_reg_sync(list,localloc.register64.reghi);
  1726. end
  1727. else
  1728. {$elseif defined(cpu16bitalu)}
  1729. if def_cgsize(vardef) in [OS_64,OS_S64] then
  1730. begin
  1731. cg.a_reg_sync(list,localloc.register64.reglo);
  1732. cg.a_reg_sync(list,GetNextReg(localloc.register64.reglo));
  1733. cg.a_reg_sync(list,localloc.register64.reghi);
  1734. cg.a_reg_sync(list,GetNextReg(localloc.register64.reghi));
  1735. end
  1736. else
  1737. if def_cgsize(vardef) in [OS_32,OS_S32] then
  1738. begin
  1739. cg.a_reg_sync(list,localloc.register);
  1740. cg.a_reg_sync(list,GetNextReg(localloc.register));
  1741. end
  1742. else
  1743. {$elseif defined(cpu8bitalu)}
  1744. if def_cgsize(vardef) in [OS_64,OS_S64] then
  1745. begin
  1746. cg.a_reg_sync(list,localloc.register64.reglo);
  1747. cg.a_reg_sync(list,GetNextReg(localloc.register64.reglo));
  1748. cg.a_reg_sync(list,GetNextReg(GetNextReg(localloc.register64.reglo)));
  1749. cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(localloc.register64.reglo))));
  1750. cg.a_reg_sync(list,localloc.register64.reghi);
  1751. cg.a_reg_sync(list,GetNextReg(localloc.register64.reghi));
  1752. cg.a_reg_sync(list,GetNextReg(GetNextReg(localloc.register64.reghi)));
  1753. cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(localloc.register64.reghi))));
  1754. end
  1755. else
  1756. if def_cgsize(vardef) in [OS_32,OS_S32] then
  1757. begin
  1758. cg.a_reg_sync(list,localloc.register);
  1759. cg.a_reg_sync(list,GetNextReg(localloc.register));
  1760. cg.a_reg_sync(list,GetNextReg(GetNextReg(localloc.register)));
  1761. cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(localloc.register))));
  1762. end
  1763. else
  1764. if def_cgsize(vardef) in [OS_16,OS_S16] then
  1765. begin
  1766. cg.a_reg_sync(list,localloc.register);
  1767. cg.a_reg_sync(list,GetNextReg(localloc.register));
  1768. end
  1769. else
  1770. {$endif}
  1771. cg.a_reg_sync(list,localloc.register);
  1772. LOC_CFPUREGISTER,
  1773. LOC_CMMREGISTER:
  1774. if (pi_has_label in current_procinfo.flags) then
  1775. cg.a_reg_sync(list,localloc.register);
  1776. LOC_REFERENCE :
  1777. begin
  1778. if typ in [localvarsym,paravarsym] then
  1779. tg.Ungetlocal(list,localloc.reference);
  1780. end;
  1781. end;
  1782. end;
  1783. end;
  1784. end;
  1785. end;
  1786. procedure gen_load_vmt_register(list:TAsmList;objdef:tobjectdef;selfloc:tlocation;var vmtreg:tregister);
  1787. var
  1788. href : treference;
  1789. selfdef: tdef;
  1790. begin
  1791. if is_object(objdef) then
  1792. begin
  1793. case selfloc.loc of
  1794. LOC_CREFERENCE,
  1795. LOC_REFERENCE:
  1796. begin
  1797. hlcg.reference_reset_base(href,voidpointertype,hlcg.getaddressregister(list,voidpointertype),objdef.vmt_offset,voidpointertype.size);
  1798. hlcg.a_loadaddr_ref_reg(list,voidpointertype,voidpointertype,selfloc.reference,href.base);
  1799. selfdef:=getpointerdef(objdef);
  1800. end;
  1801. else
  1802. internalerror(200305056);
  1803. end;
  1804. end
  1805. else
  1806. { This is also valid for Objective-C classes: vmt_offset is 0 there,
  1807. and the first "field" of an Objective-C class instance is a pointer
  1808. to its "meta-class". }
  1809. begin
  1810. selfdef:=objdef;
  1811. case selfloc.loc of
  1812. LOC_REGISTER:
  1813. begin
  1814. {$ifdef cpu_uses_separate_address_registers}
  1815. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  1816. begin
  1817. reference_reset_base(href,cg.getaddressregister(list),objdef.vmt_offset,sizeof(pint));
  1818. cg.a_load_reg_reg(list,OS_ADDR,OS_ADDR,selfloc.register,href.base);
  1819. end
  1820. else
  1821. {$endif cpu_uses_separate_address_registers}
  1822. hlcg.reference_reset_base(href,voidpointertype,selfloc.register,objdef.vmt_offset,voidpointertype.size);
  1823. end;
  1824. LOC_CONSTANT,
  1825. LOC_CREGISTER,
  1826. LOC_CREFERENCE,
  1827. LOC_REFERENCE,
  1828. LOC_CSUBSETREG,
  1829. LOC_SUBSETREG,
  1830. LOC_CSUBSETREF,
  1831. LOC_SUBSETREF:
  1832. begin
  1833. hlcg.reference_reset_base(href,voidpointertype,hlcg.getaddressregister(list,voidpointertype),objdef.vmt_offset,voidpointertype.size);
  1834. { todo: pass actual vmt pointer type to hlcg }
  1835. hlcg.a_load_loc_reg(list,voidpointertype,voidpointertype,selfloc,href.base);
  1836. end;
  1837. else
  1838. internalerror(200305057);
  1839. end;
  1840. end;
  1841. vmtreg:=hlcg.getaddressregister(list,voidpointertype);
  1842. hlcg.g_maybe_testself(list,selfdef,href.base);
  1843. hlcg.a_load_ref_reg(list,voidpointertype,voidpointertype,href,vmtreg);
  1844. { test validity of VMT }
  1845. if not(is_interface(objdef)) and
  1846. not(is_cppclass(objdef)) and
  1847. not(is_objc_class_or_protocol(objdef)) then
  1848. cg.g_maybe_testvmt(list,vmtreg,objdef);
  1849. end;
  1850. function getprocalign : shortint;
  1851. begin
  1852. { gprof uses 16 byte granularity }
  1853. if (cs_profile in current_settings.moduleswitches) then
  1854. result:=16
  1855. else
  1856. result:=current_settings.alignment.procalign;
  1857. end;
  1858. procedure gen_fpc_dummy(list : TAsmList);
  1859. begin
  1860. {$ifdef i386}
  1861. { fix me! }
  1862. list.concat(Taicpu.Op_const_reg(A_MOV,S_L,1,NR_EAX));
  1863. list.concat(Taicpu.Op_const(A_RET,S_W,12));
  1864. {$endif i386}
  1865. end;
  1866. procedure gen_load_frame_for_exceptfilter(list : TAsmList);
  1867. var
  1868. para: tparavarsym;
  1869. begin
  1870. para:=tparavarsym(current_procinfo.procdef.paras[0]);
  1871. if not (vo_is_parentfp in para.varoptions) then
  1872. InternalError(201201142);
  1873. if (para.paraloc[calleeside].location^.loc<>LOC_REGISTER) or
  1874. (para.paraloc[calleeside].location^.next<>nil) then
  1875. InternalError(201201143);
  1876. cg.a_load_reg_reg(list,OS_ADDR,OS_ADDR,para.paraloc[calleeside].location^.register,
  1877. NR_FRAME_POINTER_REG);
  1878. end;
  1879. end.