daopt386.pas 96 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  3. development team
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. unit daopt386;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. cclasses,aasmbase,aasmtai,aasmdata,aasmcpu,cgbase,cgutils,
  25. cpubase,optbase;
  26. {******************************* Constants *******************************}
  27. const
  28. { Possible register content types }
  29. con_Unknown = 0;
  30. con_ref = 1;
  31. con_const = 2;
  32. { The contents aren't usable anymore for CSE, but they may still be }
  33. { usefull for detecting whether the result of a load is actually used }
  34. con_invalid = 3;
  35. { the reverse of the above (in case a (conditional) jump is encountered): }
  36. { CSE is still possible, but the original instruction can't be removed }
  37. con_noRemoveRef = 4;
  38. { same, but for constants }
  39. con_noRemoveConst = 5;
  40. const
  41. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  42. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  43. OS_16,OS_32,OS_64,
  44. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  45. OS_M32,
  46. OS_ADDR,OS_NO,OS_NO,
  47. OS_NO,
  48. OS_NO);
  49. {********************************* Types *********************************}
  50. type
  51. TRegArray = Array[RS_EAX..RS_ESP] of tsuperregister;
  52. TRegSet = Set of RS_EAX..RS_ESP;
  53. toptreginfo = Record
  54. NewRegsEncountered, OldRegsEncountered: TRegSet;
  55. RegsLoadedForRef: TRegSet;
  56. lastReload: array[RS_EAX..RS_ESP] of tai;
  57. New2OldReg: TRegArray;
  58. end;
  59. {possible actions on an operand: read, write or modify (= read & write)}
  60. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  61. {the possible states of a flag}
  62. TFlagContents = (F_Unknown, F_notSet, F_Set);
  63. TContent = Packed Record
  64. {start and end of block instructions that defines the
  65. content of this register.}
  66. StartMod: tai;
  67. MemWrite: taicpu;
  68. {how many instructions starting with StarMod does the block consist of}
  69. NrOfMods: Word;
  70. {the type of the content of the register: unknown, memory, constant}
  71. Typ: Byte;
  72. case byte of
  73. {starts at 0, gets increased everytime the register is written to}
  74. 1: (WState: Byte;
  75. {starts at 0, gets increased everytime the register is read from}
  76. RState: Byte);
  77. { to compare both states in one operation }
  78. 2: (state: word);
  79. end;
  80. {Contents of the integer registers}
  81. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  82. {contents of the FPU registers}
  83. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  84. {$ifdef tempOpts}
  85. { linked list which allows searching/deleting based on value, no extra frills}
  86. PSearchLinkedListItem = ^TSearchLinkedListItem;
  87. TSearchLinkedListItem = object(TLinkedList_Item)
  88. constructor init;
  89. function equals(p: PSearchLinkedListItem): boolean; virtual;
  90. end;
  91. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  92. TSearchDoubleIntItem = object(TLinkedList_Item)
  93. constructor init(_int1,_int2: longint);
  94. function equals(p: PSearchLinkedListItem): boolean; virtual;
  95. private
  96. int1, int2: longint;
  97. end;
  98. PSearchLinkedList = ^TSearchLinkedList;
  99. TSearchLinkedList = object(TLinkedList)
  100. function searchByValue(p: PSearchLinkedListItem): boolean;
  101. procedure removeByValue(p: PSearchLinkedListItem);
  102. end;
  103. {$endif tempOpts}
  104. {information record with the contents of every register. Every tai object
  105. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  106. TtaiProp = Record
  107. Regs: TRegContent;
  108. { FPURegs: TRegFPUContent;} {currently not yet used}
  109. { allocated Registers }
  110. UsedRegs: TRegSet;
  111. { status of the direction flag }
  112. DirFlag: TFlagContents;
  113. {$ifdef tempOpts}
  114. { currently used temps }
  115. tempAllocs: PSearchLinkedList;
  116. {$endif tempOpts}
  117. { can this instruction be removed? }
  118. CanBeRemoved: Boolean;
  119. { are the resultflags set by this instruction used? }
  120. FlagsUsed: Boolean;
  121. end;
  122. ptaiprop = ^TtaiProp;
  123. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  124. PtaiPropBlock = ^TtaiPropBlock;
  125. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  126. TLabelTableItem = Record
  127. taiObj: tai;
  128. {$ifDef JumpAnal}
  129. InstrNr: Longint;
  130. RefsFound: Word;
  131. JmpsProcessed: Word
  132. {$endif JumpAnal}
  133. end;
  134. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  135. PLabelTable = ^TLabelTable;
  136. {*********************** procedures and functions ************************}
  137. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  138. function RefsEqual(const R1, R2: TReference): Boolean;
  139. function isgp32reg(supreg: tsuperregister): Boolean;
  140. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  141. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  142. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  143. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  144. function reginop(supreg: tsuperregister; const o:toper): boolean;
  145. function instrWritesFlags(p: tai): boolean;
  146. function instrReadsFlags(p: tai): boolean;
  147. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  148. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  149. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  150. const c: tcontent): boolean;
  151. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  152. const c: tcontent; var memwritedestroyed: boolean): boolean;
  153. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  154. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  155. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  156. procedure SkipHead(var p: tai);
  157. function labelCanBeSkipped(p: tai_label): boolean;
  158. procedure RemoveLastDeallocForFuncRes(asmL: TAsmList; p: tai);
  159. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  160. hp: tai): boolean;
  161. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  162. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  163. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  164. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  165. function sizescompatible(loadsize,newsize: topsize): boolean;
  166. function OpsEqual(const o1,o2:toper): Boolean;
  167. type
  168. tdfaobj = class
  169. constructor create(_list: TAsmList); virtual;
  170. function pass_1(_blockstart: tai): tai;
  171. function pass_generate_code: boolean;
  172. procedure clear;
  173. function getlabelwithsym(sym: tasmlabel): tai;
  174. private
  175. { Walks through the list to find the lowest and highest label number, inits the }
  176. { labeltable and fixes/optimizes some regallocs }
  177. procedure initlabeltable;
  178. function initdfapass2: boolean;
  179. procedure dodfapass2;
  180. { asm list we're working on }
  181. list: TAsmList;
  182. { current part of the asm list }
  183. blockstart, blockend: tai;
  184. { the amount of taiObjects in the current part of the assembler list }
  185. nroftaiobjs: longint;
  186. { Array which holds all TtaiProps }
  187. taipropblock: ptaipropblock;
  188. { all labels in the current block: their value mapped to their location }
  189. lolab, hilab, labdif: longint;
  190. labeltable: plabeltable;
  191. end;
  192. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  193. procedure incState(var S: Byte; amount: longint);
  194. {******************************* Variables *******************************}
  195. var
  196. dfa: tdfaobj;
  197. {*********************** end of Interface section ************************}
  198. Implementation
  199. Uses
  200. {$ifdef csdebug}
  201. cutils,
  202. {$else}
  203. {$ifdef statedebug}
  204. cutils,
  205. {$else}
  206. {$ifdef allocregdebug}
  207. cutils,
  208. {$endif}
  209. {$endif}
  210. {$endif}
  211. globals, systems, verbose, symconst, cgobj,procinfo;
  212. Type
  213. TRefCompare = function(const r1, r2: treference; size1, size2: tcgsize): boolean;
  214. var
  215. {How many instructions are between the current instruction and the last one
  216. that modified the register}
  217. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  218. {$ifdef tempOpts}
  219. constructor TSearchLinkedListItem.init;
  220. begin
  221. end;
  222. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  223. begin
  224. equals := false;
  225. end;
  226. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  227. begin
  228. int1 := _int1;
  229. int2 := _int2;
  230. end;
  231. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  232. begin
  233. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  234. (TSearchDoubleIntItem(p).int2 = int2);
  235. end;
  236. function TSearchLinkedList.FindByValue(p: PSearchLinkedListItem): boolean;
  237. var temp: PSearchLinkedListItem;
  238. begin
  239. temp := first;
  240. while (temp <> last.next) and
  241. not(temp.equals(p)) do
  242. temp := temp.next;
  243. searchByValue := temp <> last.next;
  244. end;
  245. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  246. begin
  247. temp := first;
  248. while (temp <> last.next) and
  249. not(temp.equals(p)) do
  250. temp := temp.next;
  251. if temp <> last.next then
  252. begin
  253. remove(temp);
  254. dispose(temp,done);
  255. end;
  256. end;
  257. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  258. {updates UsedRegs with the RegAlloc Information coming after p}
  259. begin
  260. repeat
  261. while assigned(p) and
  262. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  263. ((p.typ = ait_label) and
  264. labelCanBeSkipped(tai_label(current)))) Do
  265. p := tai(p.next);
  266. while assigned(p) and
  267. (p.typ=ait_RegAlloc) Do
  268. begin
  269. case tai_regalloc(p).ratype of
  270. ra_alloc :
  271. UsedRegs := UsedRegs + [tai_regalloc(p).reg];
  272. ra_dealloc :
  273. UsedRegs := UsedRegs - [tai_regalloc(p).reg];
  274. end;
  275. p := tai(p.next);
  276. end;
  277. until not(assigned(p)) or
  278. (not(p.typ in SkipInstr) and
  279. not((p.typ = ait_label) and
  280. labelCanBeSkipped(tai_label(current))));
  281. end;
  282. {$endif tempOpts}
  283. {************************ Create the Label table ************************}
  284. function findregalloc(supreg: tsuperregister; starttai: tai; ratyp: tregalloctype): boolean;
  285. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  286. { starting with Starttai and ending with the next "real" instruction }
  287. begin
  288. findregalloc := false;
  289. repeat
  290. while assigned(starttai) and
  291. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  292. ((starttai.typ = ait_label) and
  293. labelcanbeskipped(tai_label(starttai)))) do
  294. starttai := tai(starttai.next);
  295. if assigned(starttai) and
  296. (starttai.typ = ait_regalloc) then
  297. begin
  298. if (tai_regalloc(Starttai).ratype = ratyp) and
  299. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  300. begin
  301. findregalloc:=true;
  302. break;
  303. end;
  304. starttai := tai(starttai.next);
  305. end
  306. else
  307. break;
  308. until false;
  309. end;
  310. procedure RemoveLastDeallocForFuncRes(asml: TAsmList; p: tai);
  311. procedure DoRemoveLastDeallocForFuncRes(asml: TAsmList; supreg: tsuperregister);
  312. var
  313. hp2: tai;
  314. begin
  315. hp2 := p;
  316. repeat
  317. hp2 := tai(hp2.previous);
  318. if assigned(hp2) and
  319. (hp2.typ = ait_regalloc) and
  320. (tai_regalloc(hp2).ratype=ra_dealloc) and
  321. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  322. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  323. begin
  324. asml.remove(hp2);
  325. hp2.free;
  326. break;
  327. end;
  328. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  329. end;
  330. begin
  331. case current_procinfo.procdef.returndef.typ of
  332. arraydef,recorddef,pointerdef,
  333. stringdef,enumdef,procdef,objectdef,errordef,
  334. filedef,setdef,procvardef,
  335. classrefdef,forwarddef:
  336. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  337. orddef:
  338. if current_procinfo.procdef.returndef.size <> 0 then
  339. begin
  340. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  341. { for int64/qword }
  342. if current_procinfo.procdef.returndef.size = 8 then
  343. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  344. end;
  345. end;
  346. end;
  347. procedure getNoDeallocRegs(var regs: tregset);
  348. var
  349. regCounter: TSuperRegister;
  350. begin
  351. regs := [];
  352. case current_procinfo.procdef.returndef.typ of
  353. arraydef,recorddef,pointerdef,
  354. stringdef,enumdef,procdef,objectdef,errordef,
  355. filedef,setdef,procvardef,
  356. classrefdef,forwarddef:
  357. regs := [RS_EAX];
  358. orddef:
  359. if current_procinfo.procdef.returndef.size <> 0 then
  360. begin
  361. regs := [RS_EAX];
  362. { for int64/qword }
  363. if current_procinfo.procdef.returndef.size = 8 then
  364. regs := regs + [RS_EDX];
  365. end;
  366. end;
  367. for regCounter := RS_EAX to RS_EBX do
  368. { if not(regCounter in rg.usableregsint) then}
  369. include(regs,regcounter);
  370. end;
  371. procedure AddRegDeallocFor(asml: TAsmList; reg: tregister; p: tai);
  372. var
  373. hp1: tai;
  374. funcResRegs: tregset;
  375. funcResReg: boolean;
  376. begin
  377. { if not(supreg in rg.usableregsint) then
  378. exit;}
  379. { if not(supreg in [RS_EDI]) then
  380. exit;}
  381. getNoDeallocRegs(funcresregs);
  382. { funcResRegs := funcResRegs - rg.usableregsint;}
  383. { funcResRegs := funcResRegs - [RS_EDI];}
  384. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  385. funcResReg := getsupreg(reg) in funcresregs;
  386. hp1 := p;
  387. {
  388. while not(funcResReg and
  389. (p.typ = ait_instruction) and
  390. (taicpu(p).opcode = A_JMP) and
  391. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  392. getLastInstruction(p, p) and
  393. not(regInInstruction(supreg, p)) do
  394. hp1 := p;
  395. }
  396. { don't insert a dealloc for registers which contain the function result }
  397. { if they are followed by a jump to the exit label (for exit(...)) }
  398. { if not(funcResReg) or
  399. not((hp1.typ = ait_instruction) and
  400. (taicpu(hp1).opcode = A_JMP) and
  401. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  402. begin
  403. p := tai_regalloc.deAlloc(reg,nil);
  404. insertLLItem(AsmL, hp1.previous, hp1, p);
  405. end;
  406. end;
  407. {************************ Search the Label table ************************}
  408. function findlabel(l: tasmlabel; var hp: tai): boolean;
  409. {searches for the specified label starting from hp as long as the
  410. encountered instructions are labels, to be able to optimize constructs like
  411. jne l2 jmp l2
  412. jmp l3 and l1:
  413. l1: l2:
  414. l2:}
  415. var
  416. p: tai;
  417. begin
  418. p := hp;
  419. while assigned(p) and
  420. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  421. if (p.typ <> ait_Label) or
  422. (tai_label(p).labsym <> l) then
  423. GetNextInstruction(p, p)
  424. else
  425. begin
  426. hp := p;
  427. findlabel := true;
  428. exit
  429. end;
  430. findlabel := false;
  431. end;
  432. {************************ Some general functions ************************}
  433. function tch2reg(ch: tinschange): tsuperregister;
  434. {converts a TChange variable to a TRegister}
  435. const
  436. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  437. begin
  438. if (ch <= CH_REDI) then
  439. tch2reg := ch2reg[ch]
  440. else if (ch <= CH_WEDI) then
  441. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  442. else if (ch <= CH_RWEDI) then
  443. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  444. else if (ch <= CH_MEDI) then
  445. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  446. else
  447. InternalError($db)
  448. end;
  449. { inserts new_one between prev and foll }
  450. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  451. begin
  452. if assigned(prev) then
  453. if assigned(foll) then
  454. begin
  455. if assigned(new_one) then
  456. begin
  457. new_one.previous := prev;
  458. new_one.next := foll;
  459. prev.next := new_one;
  460. foll.previous := new_one;
  461. { shgould we update line information }
  462. if (not (tai(new_one).typ in SkipLineInfo)) and
  463. (not (tai(foll).typ in SkipLineInfo)) then
  464. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  465. end;
  466. end
  467. else
  468. asml.Concat(new_one)
  469. else
  470. if assigned(foll) then
  471. asml.Insert(new_one)
  472. end;
  473. {********************* Compare parts of tai objects *********************}
  474. function regssamesize(reg1, reg2: tregister): boolean;
  475. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  476. 8bit, 16bit or 32bit)}
  477. begin
  478. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  479. internalerror(2003111602);
  480. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  481. end;
  482. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  483. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  484. OldReg and NewReg have the same size (has to be chcked in advance with
  485. RegsSameSize) and that neither equals RS_INVALID}
  486. var
  487. newsupreg, oldsupreg: tsuperregister;
  488. begin
  489. if (newreg = NR_NO) or (oldreg = NR_NO) then
  490. internalerror(2003111601);
  491. newsupreg := getsupreg(newreg);
  492. oldsupreg := getsupreg(oldreg);
  493. with RegInfo Do
  494. begin
  495. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  496. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  497. New2OldReg[newsupreg] := oldsupreg;
  498. end;
  499. end;
  500. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  501. begin
  502. case o.typ Of
  503. top_reg:
  504. if (o.reg <> NR_NO) then
  505. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  506. top_ref:
  507. begin
  508. if o.ref^.base <> NR_NO then
  509. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  510. if o.ref^.index <> NR_NO then
  511. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  512. end;
  513. end;
  514. end;
  515. function RegsEquivalent(oldreg, newreg: tregister; const oldinst, newinst: taicpu; var reginfo: toptreginfo; opact: topaction): Boolean;
  516. begin
  517. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  518. if RegsSameSize(oldreg, newreg) then
  519. with reginfo do
  520. {here we always check for the 32 bit component, because it is possible that
  521. the 8 bit component has not been set, event though NewReg already has been
  522. processed. This happens if it has been compared with a register that doesn't
  523. have an 8 bit component (such as EDI). in that case the 8 bit component is
  524. still set to RS_NO and the comparison in the else-part will fail}
  525. if (getsupreg(oldReg) in OldRegsEncountered) then
  526. if (getsupreg(NewReg) in NewRegsEncountered) then
  527. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  528. { if we haven't encountered the new register yet, but we have encountered the
  529. old one already, the new one can only be correct if it's being written to
  530. (and consequently the old one is also being written to), otherwise
  531. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  532. movl (%eax), %eax movl (%edx), %edx
  533. are considered equivalent}
  534. else
  535. if (opact = opact_write) then
  536. begin
  537. AddReg2RegInfo(oldreg, newreg, reginfo);
  538. RegsEquivalent := true
  539. end
  540. else
  541. Regsequivalent := false
  542. else
  543. if not(getsupreg(newreg) in NewRegsEncountered) and
  544. ((opact = opact_write) or
  545. ((newreg = oldreg) and
  546. (ptaiprop(oldinst.optinfo)^.regs[getsupreg(oldreg)].wstate =
  547. ptaiprop(newinst.optinfo)^.regs[getsupreg(oldreg)].wstate) and
  548. not(regmodifiedbyinstruction(getsupreg(oldreg),oldinst)))) then
  549. begin
  550. AddReg2RegInfo(oldreg, newreg, reginfo);
  551. RegsEquivalent := true
  552. end
  553. else
  554. RegsEquivalent := false
  555. else
  556. RegsEquivalent := false
  557. else
  558. RegsEquivalent := oldreg = newreg
  559. end;
  560. function RefsEquivalent(const r1, r2: treference; const oldinst, newinst: taicpu; var regInfo: toptreginfo): boolean;
  561. begin
  562. RefsEquivalent :=
  563. (r1.offset = r2.offset) and
  564. RegsEquivalent(r1.base, r2.base, oldinst, newinst, reginfo, OpAct_Read) and
  565. RegsEquivalent(r1.index, r2.index, oldinst, newinst, reginfo, OpAct_Read) and
  566. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  567. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  568. (r1.relsymbol = r2.relsymbol);
  569. end;
  570. function refsequal(const r1, r2: treference): boolean;
  571. begin
  572. refsequal :=
  573. (r1.offset = r2.offset) and
  574. (r1.segment = r2.segment) and (r1.base = r2.base) and
  575. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  576. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  577. (r1.relsymbol = r2.relsymbol);
  578. end;
  579. {$ifdef q+}
  580. {$q-}
  581. {$define overflowon}
  582. {$endif q+}
  583. // checks whether a write to r2 of size "size" contains address r1
  584. function refsoverlapping(const r1, r2: treference; size1, size2: tcgsize): boolean;
  585. var
  586. realsize1, realsize2: aint;
  587. begin
  588. realsize1 := tcgsize2size[size1];
  589. realsize2 := tcgsize2size[size2];
  590. refsoverlapping :=
  591. (r2.offset <= r1.offset+realsize1) and
  592. (r1.offset <= r2.offset+realsize2) and
  593. (r1.segment = r2.segment) and (r1.base = r2.base) and
  594. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  595. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  596. (r1.relsymbol = r2.relsymbol);
  597. end;
  598. {$ifdef overflowon}
  599. {$q+}
  600. {$undef overflowon}
  601. {$endif overflowon}
  602. function isgp32reg(supreg: tsuperregister): boolean;
  603. {Checks if the register is a 32 bit general purpose register}
  604. begin
  605. isgp32reg := false;
  606. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  607. isgp32reg := true
  608. end;
  609. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  610. begin {checks whether ref contains a reference to reg}
  611. reginref :=
  612. ((ref.base <> NR_NO) and
  613. (getsupreg(ref.base) = supreg)) or
  614. ((ref.index <> NR_NO) and
  615. (getsupreg(ref.index) = supreg))
  616. end;
  617. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  618. var
  619. p: taicpu;
  620. opcount: longint;
  621. begin
  622. RegReadByInstruction := false;
  623. if hp.typ <> ait_instruction then
  624. exit;
  625. p := taicpu(hp);
  626. case p.opcode of
  627. A_CALL:
  628. regreadbyinstruction := true;
  629. A_IMUL:
  630. case p.ops of
  631. 1:
  632. regReadByInstruction :=
  633. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  634. 2,3:
  635. regReadByInstruction :=
  636. reginop(supreg,p.oper[0]^) or
  637. reginop(supreg,p.oper[1]^);
  638. end;
  639. A_IDIV,A_DIV,A_MUL:
  640. begin
  641. regReadByInstruction :=
  642. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  643. end;
  644. else
  645. begin
  646. for opcount := 0 to p.ops-1 do
  647. if (p.oper[opCount]^.typ = top_ref) and
  648. reginref(supreg,p.oper[opcount]^.ref^) then
  649. begin
  650. RegReadByInstruction := true;
  651. exit
  652. end;
  653. for opcount := 1 to maxinschanges do
  654. case insprop[p.opcode].ch[opcount] of
  655. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  656. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  657. begin
  658. RegReadByInstruction := true;
  659. exit
  660. end;
  661. CH_RWOP1,CH_ROP1,CH_MOP1:
  662. if //(p.oper[0]^.typ = top_reg) and
  663. reginop(supreg,p.oper[0]^) then
  664. begin
  665. RegReadByInstruction := true;
  666. exit
  667. end;
  668. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  669. if //(p.oper[1]^.typ = top_reg) and
  670. reginop(supreg,p.oper[1]^) then
  671. begin
  672. RegReadByInstruction := true;
  673. exit
  674. end;
  675. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  676. if //(p.oper[2]^.typ = top_reg) and
  677. reginop(supreg,p.oper[2]^) then
  678. begin
  679. RegReadByInstruction := true;
  680. exit
  681. end;
  682. end;
  683. end;
  684. end;
  685. end;
  686. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  687. { Checks if reg is used by the instruction p1 }
  688. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  689. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  690. var
  691. p: taicpu;
  692. opcount: longint;
  693. begin
  694. regInInstruction := false;
  695. if p1.typ <> ait_instruction then
  696. exit;
  697. p := taicpu(p1);
  698. case p.opcode of
  699. A_CALL:
  700. regininstruction := true;
  701. A_IMUL:
  702. case p.ops of
  703. 1:
  704. regInInstruction :=
  705. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  706. 2,3:
  707. regInInstruction :=
  708. reginop(supreg,p.oper[0]^) or
  709. reginop(supreg,p.oper[1]^) or
  710. (assigned(p.oper[2]) and
  711. reginop(supreg,p.oper[2]^));
  712. end;
  713. A_IDIV,A_DIV,A_MUL:
  714. regInInstruction :=
  715. reginop(supreg,p.oper[0]^) or
  716. (supreg in [RS_EAX,RS_EDX])
  717. else
  718. begin
  719. for opcount := 0 to p.ops-1 do
  720. if (p.oper[opCount]^.typ = top_ref) and
  721. reginref(supreg,p.oper[opcount]^.ref^) then
  722. begin
  723. regInInstruction := true;
  724. exit
  725. end;
  726. for opcount := 1 to maxinschanges do
  727. case insprop[p.opcode].Ch[opCount] of
  728. CH_REAX..CH_MEDI:
  729. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  730. begin
  731. regInInstruction := true;
  732. exit;
  733. end;
  734. CH_ROp1..CH_MOp1:
  735. if reginop(supreg,p.oper[0]^) then
  736. begin
  737. regInInstruction := true;
  738. exit
  739. end;
  740. Ch_ROp2..Ch_MOp2:
  741. if reginop(supreg,p.oper[1]^) then
  742. begin
  743. regInInstruction := true;
  744. exit
  745. end;
  746. Ch_ROp3..Ch_MOp3:
  747. if reginop(supreg,p.oper[2]^) then
  748. begin
  749. regInInstruction := true;
  750. exit
  751. end;
  752. end;
  753. end;
  754. end;
  755. end;
  756. function reginop(supreg: tsuperregister; const o:toper): boolean;
  757. begin
  758. reginop := false;
  759. case o.typ Of
  760. top_reg:
  761. reginop :=
  762. (getregtype(o.reg) = R_INTREGISTER) and
  763. (supreg = getsupreg(o.reg));
  764. top_ref:
  765. reginop :=
  766. ((o.ref^.base <> NR_NO) and
  767. (supreg = getsupreg(o.ref^.base))) or
  768. ((o.ref^.index <> NR_NO) and
  769. (supreg = getsupreg(o.ref^.index)));
  770. end;
  771. end;
  772. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  773. var
  774. InstrProp: TInsProp;
  775. TmpResult: Boolean;
  776. Cnt: Word;
  777. begin
  778. TmpResult := False;
  779. if supreg = RS_INVALID then
  780. exit;
  781. if (p1.typ = ait_instruction) then
  782. case taicpu(p1).opcode of
  783. A_IMUL:
  784. With taicpu(p1) Do
  785. TmpResult :=
  786. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  787. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  788. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  789. A_DIV, A_IDIV, A_MUL:
  790. With taicpu(p1) Do
  791. TmpResult :=
  792. (supreg in [RS_EAX,RS_EDX]);
  793. else
  794. begin
  795. Cnt := 1;
  796. InstrProp := InsProp[taicpu(p1).OpCode];
  797. while (Cnt <= maxinschanges) and
  798. (InstrProp.Ch[Cnt] <> Ch_None) and
  799. not(TmpResult) Do
  800. begin
  801. case InstrProp.Ch[Cnt] Of
  802. Ch_WEAX..Ch_MEDI:
  803. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  804. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  805. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  806. reginop(supreg,taicpu(p1).oper[0]^);
  807. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  808. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  809. reginop(supreg,taicpu(p1).oper[1]^);
  810. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  811. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  812. reginop(supreg,taicpu(p1).oper[2]^);
  813. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  814. Ch_ALL: TmpResult := true;
  815. end;
  816. inc(Cnt)
  817. end
  818. end
  819. end;
  820. RegModifiedByInstruction := TmpResult
  821. end;
  822. function instrWritesFlags(p: tai): boolean;
  823. var
  824. l: longint;
  825. begin
  826. instrWritesFlags := true;
  827. case p.typ of
  828. ait_instruction:
  829. begin
  830. for l := 1 to maxinschanges do
  831. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  832. exit;
  833. end;
  834. ait_label:
  835. exit;
  836. end;
  837. instrWritesFlags := false;
  838. end;
  839. function instrReadsFlags(p: tai): boolean;
  840. var
  841. l: longint;
  842. begin
  843. instrReadsFlags := true;
  844. case p.typ of
  845. ait_instruction:
  846. begin
  847. for l := 1 to maxinschanges do
  848. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  849. exit;
  850. end;
  851. ait_label:
  852. exit;
  853. end;
  854. instrReadsFlags := false;
  855. end;
  856. {********************* GetNext and GetLastInstruction *********************}
  857. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  858. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  859. { next tai object in Next. Returns false if there isn't any }
  860. begin
  861. repeat
  862. if (Current.typ = ait_marker) and
  863. (tai_Marker(current).Kind = mark_AsmBlockStart) then
  864. begin
  865. GetNextInstruction := False;
  866. Next := Nil;
  867. Exit
  868. end;
  869. Current := tai(current.Next);
  870. while assigned(Current) and
  871. ((current.typ in skipInstr) or
  872. ((current.typ = ait_label) and
  873. labelCanBeSkipped(tai_label(current)))) do
  874. Current := tai(current.Next);
  875. { if assigned(Current) and
  876. (current.typ = ait_Marker) and
  877. (tai_Marker(current).Kind = mark_NoPropInfoStart) then
  878. begin
  879. while assigned(Current) and
  880. ((current.typ <> ait_Marker) or
  881. (tai_Marker(current).Kind <> mark_NoPropInfoEnd)) Do
  882. Current := tai(current.Next);
  883. end;}
  884. until not(assigned(Current)) or
  885. (current.typ <> ait_Marker) or
  886. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  887. Next := Current;
  888. if assigned(Current) and
  889. not((current.typ in SkipInstr) or
  890. ((current.typ = ait_label) and
  891. labelCanBeSkipped(tai_label(current))))
  892. then
  893. GetNextInstruction :=
  894. not((current.typ = ait_marker) and
  895. (tai_marker(current).kind = mark_AsmBlockStart))
  896. else
  897. begin
  898. GetNextInstruction := False;
  899. Next := nil;
  900. end;
  901. end;
  902. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  903. {skips the ait-types in SkipInstr puts the previous tai object in
  904. Last. Returns false if there isn't any}
  905. begin
  906. repeat
  907. Current := tai(current.previous);
  908. while assigned(Current) and
  909. (((current.typ = ait_Marker) and
  910. not(tai_Marker(current).Kind in [mark_AsmBlockEnd{,mark_NoPropInfoEnd}])) or
  911. (current.typ in SkipInstr) or
  912. ((current.typ = ait_label) and
  913. labelCanBeSkipped(tai_label(current)))) Do
  914. Current := tai(current.previous);
  915. { if assigned(Current) and
  916. (current.typ = ait_Marker) and
  917. (tai_Marker(current).Kind = mark_NoPropInfoEnd) then
  918. begin
  919. while assigned(Current) and
  920. ((current.typ <> ait_Marker) or
  921. (tai_Marker(current).Kind <> mark_NoPropInfoStart)) Do
  922. Current := tai(current.previous);
  923. end;}
  924. until not(assigned(Current)) or
  925. (current.typ <> ait_Marker) or
  926. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  927. if not(assigned(Current)) or
  928. (current.typ in SkipInstr) or
  929. ((current.typ = ait_label) and
  930. labelCanBeSkipped(tai_label(current))) or
  931. ((current.typ = ait_Marker) and
  932. (tai_Marker(current).Kind = mark_AsmBlockEnd))
  933. then
  934. begin
  935. Last := nil;
  936. GetLastInstruction := False
  937. end
  938. else
  939. begin
  940. Last := Current;
  941. GetLastInstruction := True;
  942. end;
  943. end;
  944. procedure SkipHead(var p: tai);
  945. var
  946. oldp: tai;
  947. begin
  948. repeat
  949. oldp := p;
  950. if (p.typ in SkipInstr) or
  951. ((p.typ = ait_marker) and
  952. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_InlineStart,mark_InlineEnd])) then
  953. GetNextInstruction(p,p)
  954. else if ((p.Typ = Ait_Marker) and
  955. (tai_Marker(p).Kind = mark_NoPropInfoStart)) then
  956. {a marker of the mark_NoPropInfoStart can't be the first instruction of a
  957. TAsmList list}
  958. GetNextInstruction(tai(p.previous),p);
  959. until p = oldp
  960. end;
  961. function labelCanBeSkipped(p: tai_label): boolean;
  962. begin
  963. labelCanBeSkipped := not(p.labsym.is_used) or (p.labsym.labeltype<>alt_jump);
  964. end;
  965. {******************* The Data Flow Analyzer functions ********************}
  966. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  967. hp: tai): boolean;
  968. { assumes reg is a 32bit register }
  969. var
  970. p: taicpu;
  971. begin
  972. if not assigned(hp) or
  973. (hp.typ <> ait_instruction) then
  974. begin
  975. regLoadedWithNewValue := false;
  976. exit;
  977. end;
  978. p := taicpu(hp);
  979. regLoadedWithNewValue :=
  980. (((p.opcode = A_MOV) or
  981. (p.opcode = A_MOVZX) or
  982. (p.opcode = A_MOVSX) or
  983. (p.opcode = A_LEA)) and
  984. (p.oper[1]^.typ = top_reg) and
  985. (getsupreg(p.oper[1]^.reg) = supreg) and
  986. (canDependOnPrevValue or
  987. (p.oper[0]^.typ <> top_ref) or
  988. not regInRef(supreg,p.oper[0]^.ref^)) or
  989. ((p.opcode = A_POP) and
  990. (getsupreg(p.oper[0]^.reg) = supreg)));
  991. end;
  992. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  993. {updates UsedRegs with the RegAlloc Information coming after p}
  994. begin
  995. repeat
  996. while assigned(p) and
  997. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  998. ((p.typ = ait_label) and
  999. labelCanBeSkipped(tai_label(p))) or
  1000. ((p.typ = ait_marker) and
  1001. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_InlineStart,mark_InlineEnd]))) do
  1002. p := tai(p.next);
  1003. while assigned(p) and
  1004. (p.typ=ait_RegAlloc) Do
  1005. begin
  1006. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1007. begin
  1008. case tai_regalloc(p).ratype of
  1009. ra_alloc :
  1010. UsedRegs := UsedRegs + [getsupreg(tai_regalloc(p).reg)];
  1011. ra_dealloc :
  1012. UsedRegs := UsedRegs - [getsupreg(tai_regalloc(p).reg)];
  1013. end;
  1014. end;
  1015. p := tai(p.next);
  1016. end;
  1017. until not(assigned(p)) or
  1018. (not(p.typ in SkipInstr) and
  1019. not((p.typ = ait_label) and
  1020. labelCanBeSkipped(tai_label(p))));
  1021. end;
  1022. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  1023. { allocates register reg between (and including) instructions p1 and p2 }
  1024. { the type of p1 and p2 must not be in SkipInstr }
  1025. { note that this routine is both called from the peephole optimizer }
  1026. { where optinfo is not yet initialised) and from the cse (where it is) }
  1027. var
  1028. hp, start: tai;
  1029. removedsomething,
  1030. firstRemovedWasAlloc,
  1031. lastRemovedWasDealloc: boolean;
  1032. supreg: tsuperregister;
  1033. begin
  1034. {$ifdef EXTDEBUG}
  1035. if assigned(p1.optinfo) and
  1036. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1037. internalerror(2004101010);
  1038. {$endif EXTDEBUG}
  1039. start := p1;
  1040. if (reg = NR_ESP) or
  1041. (reg = current_procinfo.framepointer) or
  1042. not(assigned(p1)) then
  1043. { this happens with registers which are loaded implicitely, outside the }
  1044. { current block (e.g. esi with self) }
  1045. exit;
  1046. supreg := getsupreg(reg);
  1047. { make sure we allocate it for this instruction }
  1048. getnextinstruction(p2,p2);
  1049. lastRemovedWasDealloc := false;
  1050. removedSomething := false;
  1051. firstRemovedWasAlloc := false;
  1052. {$ifdef allocregdebug}
  1053. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1054. ' from here...'));
  1055. insertllitem(asml,p1.previous,p1,hp);
  1056. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1057. ' till here...'));
  1058. insertllitem(asml,p2,p2.next,hp);
  1059. {$endif allocregdebug}
  1060. if not(supreg in initialusedregs) then
  1061. begin
  1062. hp := tai_regalloc.alloc(reg,nil);
  1063. insertllItem(asmL,p1.previous,p1,hp);
  1064. end;
  1065. while assigned(p1) and
  1066. (p1 <> p2) do
  1067. begin
  1068. if assigned(p1.optinfo) then
  1069. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1070. p1 := tai(p1.next);
  1071. repeat
  1072. while assigned(p1) and
  1073. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1074. p1 := tai(p1.next);
  1075. { remove all allocation/deallocation info about the register in between }
  1076. if assigned(p1) and
  1077. (p1.typ = ait_regalloc) then
  1078. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1079. begin
  1080. if not removedSomething then
  1081. begin
  1082. firstRemovedWasAlloc := tai_regalloc(p1).ratype=ra_alloc;
  1083. removedSomething := true;
  1084. end;
  1085. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1086. hp := tai(p1.Next);
  1087. asml.Remove(p1);
  1088. p1.free;
  1089. p1 := hp;
  1090. end
  1091. else p1 := tai(p1.next);
  1092. until not(assigned(p1)) or
  1093. not(p1.typ in SkipInstr);
  1094. end;
  1095. if assigned(p1) then
  1096. begin
  1097. if firstRemovedWasAlloc then
  1098. begin
  1099. hp := tai_regalloc.Alloc(reg,nil);
  1100. insertLLItem(asmL,start.previous,start,hp);
  1101. end;
  1102. if lastRemovedWasDealloc then
  1103. begin
  1104. hp := tai_regalloc.DeAlloc(reg,nil);
  1105. insertLLItem(asmL,p1.previous,p1,hp);
  1106. end;
  1107. end;
  1108. end;
  1109. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1110. var
  1111. hp: tai;
  1112. first: boolean;
  1113. begin
  1114. findregdealloc := false;
  1115. first := true;
  1116. while assigned(p.previous) and
  1117. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1118. ((tai(p.previous).typ = ait_label) and
  1119. labelCanBeSkipped(tai_label(p.previous)))) do
  1120. begin
  1121. p := tai(p.previous);
  1122. if (p.typ = ait_regalloc) and
  1123. (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) and
  1124. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1125. if (tai_regalloc(p).ratype=ra_dealloc) then
  1126. if first then
  1127. begin
  1128. findregdealloc := true;
  1129. break;
  1130. end
  1131. else
  1132. begin
  1133. findRegDealloc :=
  1134. getNextInstruction(p,hp) and
  1135. regLoadedWithNewValue(supreg,false,hp);
  1136. break
  1137. end
  1138. else
  1139. first := false;
  1140. end
  1141. end;
  1142. procedure incState(var S: Byte; amount: longint);
  1143. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1144. errors}
  1145. begin
  1146. if (s <= $ff - amount) then
  1147. inc(s, amount)
  1148. else s := longint(s) + amount - $ff;
  1149. end;
  1150. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1151. { Content is the sequence of instructions that describes the contents of }
  1152. { seqReg. reg is being overwritten by the current instruction. if the }
  1153. { content of seqReg depends on reg (ie. because of a }
  1154. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1155. var
  1156. p: tai;
  1157. Counter: Word;
  1158. TmpResult: Boolean;
  1159. RegsChecked: TRegSet;
  1160. begin
  1161. RegsChecked := [];
  1162. p := Content.StartMod;
  1163. TmpResult := False;
  1164. Counter := 1;
  1165. while not(TmpResult) and
  1166. (Counter <= Content.NrOfMods) Do
  1167. begin
  1168. if (p.typ = ait_instruction) and
  1169. ((taicpu(p).opcode = A_MOV) or
  1170. (taicpu(p).opcode = A_MOVZX) or
  1171. (taicpu(p).opcode = A_MOVSX) or
  1172. (taicpu(p).opcode = A_LEA)) and
  1173. (taicpu(p).oper[0]^.typ = top_ref) then
  1174. With taicpu(p).oper[0]^.ref^ Do
  1175. if ((base = current_procinfo.FramePointer) or
  1176. (assigned(symbol) and (base = NR_NO))) and
  1177. (index = NR_NO) then
  1178. begin
  1179. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1180. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1181. break;
  1182. end
  1183. else
  1184. tmpResult :=
  1185. regReadByInstruction(supreg,p) and
  1186. regModifiedByInstruction(seqReg,p)
  1187. else
  1188. tmpResult :=
  1189. regReadByInstruction(supreg,p) and
  1190. regModifiedByInstruction(seqReg,p);
  1191. inc(Counter);
  1192. GetNextInstruction(p,p)
  1193. end;
  1194. sequenceDependsonReg := TmpResult
  1195. end;
  1196. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1197. var
  1198. counter: tsuperregister;
  1199. begin
  1200. for counter := RS_EAX to RS_EDI do
  1201. if counter <> supreg then
  1202. with p1^.regs[counter] Do
  1203. begin
  1204. if (typ in [con_ref,con_noRemoveRef]) and
  1205. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1206. if typ in [con_ref, con_invalid] then
  1207. typ := con_invalid
  1208. { con_noRemoveRef = con_unknown }
  1209. else
  1210. typ := con_unknown;
  1211. if assigned(memwrite) and
  1212. regInRef(counter,memwrite.oper[1]^.ref^) then
  1213. memwrite := nil;
  1214. end;
  1215. end;
  1216. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1217. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1218. contents of registers are loaded with a memory location based on reg.
  1219. doincState is false when this register has to be destroyed not because
  1220. it's contents are directly modified/overwritten, but because of an indirect
  1221. action (e.g. this register holds the contents of a variable and the value
  1222. of the variable in memory is changed) }
  1223. begin
  1224. { the following happens for fpu registers }
  1225. if (supreg < low(NrOfInstrSinceLastMod)) or
  1226. (supreg > high(NrOfInstrSinceLastMod)) then
  1227. exit;
  1228. NrOfInstrSinceLastMod[supreg] := 0;
  1229. with p1^.regs[supreg] do
  1230. begin
  1231. if doincState then
  1232. begin
  1233. incState(wstate,1);
  1234. typ := con_unknown;
  1235. startmod := nil;
  1236. end
  1237. else
  1238. if typ in [con_ref,con_const,con_invalid] then
  1239. typ := con_invalid
  1240. { con_noRemoveRef = con_unknown }
  1241. else
  1242. typ := con_unknown;
  1243. memwrite := nil;
  1244. end;
  1245. invalidateDependingRegs(p1,supreg);
  1246. end;
  1247. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1248. begin
  1249. if (p.typ = ait_instruction) then
  1250. begin
  1251. case taicpu(p).oper[0]^.typ Of
  1252. top_reg:
  1253. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1254. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1255. top_ref:
  1256. With TReference(taicpu(p).oper[0]^) Do
  1257. begin
  1258. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1259. then RegSet := RegSet + [base];
  1260. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1261. then RegSet := RegSet + [index];
  1262. end;
  1263. end;
  1264. case taicpu(p).oper[1]^.typ Of
  1265. top_reg:
  1266. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1267. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1268. top_ref:
  1269. With TReference(taicpu(p).oper[1]^) Do
  1270. begin
  1271. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1272. then RegSet := RegSet + [base];
  1273. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1274. then RegSet := RegSet + [index];
  1275. end;
  1276. end;
  1277. end;
  1278. end;}
  1279. function OpsEquivalent(const o1, o2: toper; const oldinst, newinst: taicpu; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1280. begin {checks whether the two ops are equivalent}
  1281. OpsEquivalent := False;
  1282. if o1.typ=o2.typ then
  1283. case o1.typ Of
  1284. top_reg:
  1285. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, oldinst, newinst, RegInfo, OpAct);
  1286. top_ref:
  1287. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, oldinst, newinst, RegInfo);
  1288. Top_Const:
  1289. OpsEquivalent := o1.val = o2.val;
  1290. Top_None:
  1291. OpsEquivalent := True
  1292. end;
  1293. end;
  1294. function OpsEqual(const o1,o2:toper): Boolean;
  1295. begin {checks whether the two ops are equal}
  1296. OpsEqual := False;
  1297. if o1.typ=o2.typ then
  1298. case o1.typ Of
  1299. top_reg :
  1300. OpsEqual:=o1.reg=o2.reg;
  1301. top_ref :
  1302. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1303. Top_Const :
  1304. OpsEqual:=o1.val=o2.val;
  1305. Top_None :
  1306. OpsEqual := True
  1307. end;
  1308. end;
  1309. function sizescompatible(loadsize,newsize: topsize): boolean;
  1310. begin
  1311. case loadsize of
  1312. S_B,S_BW,S_BL:
  1313. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1314. S_W,S_WL:
  1315. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1316. else
  1317. sizescompatible := newsize = S_L;
  1318. end;
  1319. end;
  1320. function opscompatible(p1,p2: taicpu): boolean;
  1321. begin
  1322. case p1.opcode of
  1323. A_MOVZX,A_MOVSX:
  1324. opscompatible :=
  1325. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1326. sizescompatible(p1.opsize,p2.opsize);
  1327. else
  1328. opscompatible :=
  1329. (p1.opcode = p2.opcode) and
  1330. (p1.ops = p2.ops) and
  1331. (p1.opsize = p2.opsize);
  1332. end;
  1333. end;
  1334. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1335. {$ifdef csdebug}
  1336. var
  1337. hp: tai;
  1338. {$endif csdebug}
  1339. begin {checks whether two taicpu instructions are equal}
  1340. if assigned(p1) and assigned(p2) and
  1341. (tai(p1).typ = ait_instruction) and
  1342. (tai(p2).typ = ait_instruction) and
  1343. opscompatible(taicpu(p1),taicpu(p2)) and
  1344. (not(assigned(taicpu(p1).oper[0])) or
  1345. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1346. (not(assigned(taicpu(p1).oper[1])) or
  1347. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1348. (not(assigned(taicpu(p1).oper[2])) or
  1349. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1350. {both instructions have the same structure:
  1351. "<operator> <operand of type1>, <operand of type 2>"}
  1352. if ((taicpu(p1).opcode = A_MOV) or
  1353. (taicpu(p1).opcode = A_MOVZX) or
  1354. (taicpu(p1).opcode = A_MOVSX) or
  1355. (taicpu(p1).opcode = A_LEA)) and
  1356. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1357. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1358. {the "old" instruction is a load of a register with a new value, not with
  1359. a value based on the contents of this register (so no "mov (reg), reg")}
  1360. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1361. RefsEquivalent(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^,taicpu(p1), taicpu(p2), reginfo) then
  1362. {the "new" instruction is also a load of a register with a new value, and
  1363. this value is fetched from the same memory location}
  1364. begin
  1365. With taicpu(p2).oper[0]^.ref^ Do
  1366. begin
  1367. if (base <> NR_NO) and
  1368. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1369. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1370. if (index <> NR_NO) and
  1371. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1372. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1373. end;
  1374. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1375. from the reference are the same in the old and in the new instruction
  1376. sequence}
  1377. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1378. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1379. InstructionsEquivalent :=
  1380. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1381. taicpu(p2).oper[1]^.reg, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write);
  1382. end
  1383. {the registers are loaded with values from different memory locations. if
  1384. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1385. would be considered equivalent}
  1386. else
  1387. InstructionsEquivalent := False
  1388. else
  1389. {load register with a value based on the current value of this register}
  1390. begin
  1391. With taicpu(p2).oper[0]^.ref^ Do
  1392. begin
  1393. if (base <> NR_NO) and
  1394. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1395. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1396. {it won't do any harm if the register is already in RegsLoadedForRef}
  1397. begin
  1398. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1399. {$ifdef csdebug}
  1400. Writeln(std_regname(base), ' added');
  1401. {$endif csdebug}
  1402. end;
  1403. if (index <> NR_NO) and
  1404. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1405. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1406. begin
  1407. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1408. {$ifdef csdebug}
  1409. Writeln(std_regname(index), ' added');
  1410. {$endif csdebug}
  1411. end;
  1412. end;
  1413. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1414. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1415. begin
  1416. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1417. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1418. {$ifdef csdebug}
  1419. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1420. {$endif csdebug}
  1421. end;
  1422. InstructionsEquivalent :=
  1423. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Read) and
  1424. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write)
  1425. end
  1426. else
  1427. {an instruction <> mov, movzx, movsx}
  1428. begin
  1429. {$ifdef csdebug}
  1430. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1431. hp.previous := p2;
  1432. hp.next := p2.next;
  1433. p2.next.previous := hp;
  1434. p2.next := hp;
  1435. {$endif csdebug}
  1436. InstructionsEquivalent :=
  1437. (not(assigned(taicpu(p1).oper[0])) or
  1438. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1439. (not(assigned(taicpu(p1).oper[1])) or
  1440. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1441. (not(assigned(taicpu(p1).oper[2])) or
  1442. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown))
  1443. end
  1444. {the instructions haven't even got the same structure, so they're certainly
  1445. not equivalent}
  1446. else
  1447. begin
  1448. {$ifdef csdebug}
  1449. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1450. hp.previous := p2;
  1451. hp.next := p2.next;
  1452. p2.next.previous := hp;
  1453. p2.next := hp;
  1454. {$endif csdebug}
  1455. InstructionsEquivalent := False;
  1456. end;
  1457. {$ifdef csdebug}
  1458. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1459. hp.previous := p2;
  1460. hp.next := p2.next;
  1461. p2.next.previous := hp;
  1462. p2.next := hp;
  1463. {$endif csdebug}
  1464. end;
  1465. (*
  1466. function InstructionsEqual(p1, p2: tai): Boolean;
  1467. begin {checks whether two taicpu instructions are equal}
  1468. InstructionsEqual :=
  1469. assigned(p1) and assigned(p2) and
  1470. ((tai(p1).typ = ait_instruction) and
  1471. (tai(p1).typ = ait_instruction) and
  1472. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1473. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1474. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1475. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1476. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1477. end;
  1478. *)
  1479. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1480. begin
  1481. if supreg in [RS_EAX..RS_EDI] then
  1482. incState(p^.regs[supreg].rstate,1)
  1483. end;
  1484. procedure readref(p: ptaiprop; const ref: preference);
  1485. begin
  1486. if ref^.base <> NR_NO then
  1487. readreg(p, getsupreg(ref^.base));
  1488. if ref^.index <> NR_NO then
  1489. readreg(p, getsupreg(ref^.index));
  1490. end;
  1491. procedure ReadOp(p: ptaiprop;const o:toper);
  1492. begin
  1493. case o.typ Of
  1494. top_reg: readreg(p, getsupreg(o.reg));
  1495. top_ref: readref(p, o.ref);
  1496. end;
  1497. end;
  1498. function RefInInstruction(const ref: TReference; p: tai;
  1499. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1500. {checks whehter ref is used in p}
  1501. var
  1502. mysize: tcgsize;
  1503. TmpResult: Boolean;
  1504. begin
  1505. TmpResult := False;
  1506. if (p.typ = ait_instruction) then
  1507. begin
  1508. mysize := topsize2tcgsize[taicpu(p).opsize];
  1509. if (taicpu(p).ops >= 1) and
  1510. (taicpu(p).oper[0]^.typ = top_ref) then
  1511. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,mysize,size);
  1512. if not(TmpResult) and
  1513. (taicpu(p).ops >= 2) and
  1514. (taicpu(p).oper[1]^.typ = top_ref) then
  1515. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,mysize,size);
  1516. if not(TmpResult) and
  1517. (taicpu(p).ops >= 3) and
  1518. (taicpu(p).oper[2]^.typ = top_ref) then
  1519. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,mysize,size);
  1520. end;
  1521. RefInInstruction := TmpResult;
  1522. end;
  1523. function RefInSequence(const ref: TReference; Content: TContent;
  1524. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1525. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1526. tai objects) to see whether ref is used somewhere}
  1527. var p: tai;
  1528. Counter: Word;
  1529. TmpResult: Boolean;
  1530. begin
  1531. p := Content.StartMod;
  1532. TmpResult := False;
  1533. Counter := 1;
  1534. while not(TmpResult) and
  1535. (Counter <= Content.NrOfMods) Do
  1536. begin
  1537. if (p.typ = ait_instruction) and
  1538. RefInInstruction(ref, p, RefsEq, size)
  1539. then TmpResult := True;
  1540. inc(Counter);
  1541. GetNextInstruction(p,p)
  1542. end;
  1543. RefInSequence := TmpResult
  1544. end;
  1545. {$ifdef q+}
  1546. {$q-}
  1547. {$define overflowon}
  1548. {$endif q+}
  1549. // checks whether a write to r2 of size "size" contains address r1
  1550. function arrayrefsoverlapping(const r1, r2: treference; size1, size2: tcgsize): Boolean;
  1551. var
  1552. realsize1, realsize2: aint;
  1553. begin
  1554. realsize1 := tcgsize2size[size1];
  1555. realsize2 := tcgsize2size[size2];
  1556. arrayrefsoverlapping :=
  1557. (r2.offset <= r1.offset+realsize1) and
  1558. (r1.offset <= r2.offset+realsize2) and
  1559. (r1.segment = r2.segment) and
  1560. (r1.symbol=r2.symbol) and
  1561. (r1.base = r2.base)
  1562. end;
  1563. {$ifdef overflowon}
  1564. {$q+}
  1565. {$undef overflowon}
  1566. {$endif overflowon}
  1567. function isSimpleRef(const ref: treference): boolean;
  1568. { returns true if ref is reference to a local or global variable, to a }
  1569. { parameter or to an object field (this includes arrays). Returns false }
  1570. { otherwise. }
  1571. begin
  1572. isSimpleRef :=
  1573. assigned(ref.symbol) or
  1574. (ref.base = current_procinfo.framepointer);
  1575. end;
  1576. function containsPointerRef(p: tai): boolean;
  1577. { checks if an instruction contains a reference which is a pointer location }
  1578. var
  1579. hp: taicpu;
  1580. count: longint;
  1581. begin
  1582. containsPointerRef := false;
  1583. if p.typ <> ait_instruction then
  1584. exit;
  1585. hp := taicpu(p);
  1586. for count := 0 to hp.ops-1 do
  1587. begin
  1588. case hp.oper[count]^.typ of
  1589. top_ref:
  1590. if not isSimpleRef(hp.oper[count]^.ref^) then
  1591. begin
  1592. containsPointerRef := true;
  1593. exit;
  1594. end;
  1595. top_none:
  1596. exit;
  1597. end;
  1598. end;
  1599. end;
  1600. function containsPointerLoad(c: tcontent): boolean;
  1601. { checks whether the contents of a register contain a pointer reference }
  1602. var
  1603. p: tai;
  1604. count: longint;
  1605. begin
  1606. containsPointerLoad := false;
  1607. p := c.startmod;
  1608. for count := c.nrOfMods downto 1 do
  1609. begin
  1610. if containsPointerRef(p) then
  1611. begin
  1612. containsPointerLoad := true;
  1613. exit;
  1614. end;
  1615. getnextinstruction(p,p);
  1616. end;
  1617. end;
  1618. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1619. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1620. { returns whether the contents c of reg are invalid after regWritten is }
  1621. { is written to ref }
  1622. var
  1623. refsEq: trefCompare;
  1624. begin
  1625. if isSimpleRef(ref) then
  1626. begin
  1627. if (ref.index <> NR_NO) or
  1628. (assigned(ref.symbol) and
  1629. (ref.base <> NR_NO)) then
  1630. { local/global variable or parameter which is an array }
  1631. refsEq := @arrayRefsOverlapping
  1632. else
  1633. { local/global variable or parameter which is not an array }
  1634. refsEq := @refsOverlapping;
  1635. invalsmemwrite :=
  1636. assigned(c.memwrite) and
  1637. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1638. containsPointerRef(c.memwrite)) or
  1639. refsEq(c.memwrite.oper[1]^.ref^,ref,topsize2tcgsize[c.memwrite.opsize],size));
  1640. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1641. begin
  1642. writeToMemDestroysContents := false;
  1643. exit;
  1644. end;
  1645. { write something to a parameter, a local or global variable, so }
  1646. { * with uncertain optimizations on: }
  1647. { - destroy the contents of registers whose contents have somewhere a }
  1648. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1649. { are being written to memory) is not destroyed if it's StartMod is }
  1650. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1651. { expression based on ref) }
  1652. { * with uncertain optimizations off: }
  1653. { - also destroy registers that contain any pointer }
  1654. with c do
  1655. writeToMemDestroysContents :=
  1656. (typ in [con_ref,con_noRemoveRef]) and
  1657. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1658. containsPointerLoad(c)
  1659. ) or
  1660. (refInSequence(ref,c,refsEq,size) and
  1661. ((supreg <> regWritten) or
  1662. not((nrOfMods = 1) and
  1663. {StarMod is always of the type ait_instruction}
  1664. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1665. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, topsize2tcgsize[taicpu(StartMod).opsize],size)
  1666. )
  1667. )
  1668. )
  1669. );
  1670. end
  1671. else
  1672. { write something to a pointer location, so }
  1673. { * with uncertain optimzations on: }
  1674. { - do not destroy registers which contain a local/global variable or }
  1675. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1676. { * with uncertain optimzations off: }
  1677. { - destroy every register which contains a memory location }
  1678. begin
  1679. invalsmemwrite :=
  1680. assigned(c.memwrite) and
  1681. (not(cs_opt_size in current_settings.optimizerswitches) or
  1682. containsPointerRef(c.memwrite));
  1683. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1684. begin
  1685. writeToMemDestroysContents := false;
  1686. exit;
  1687. end;
  1688. with c do
  1689. writeToMemDestroysContents :=
  1690. (typ in [con_ref,con_noRemoveRef]) and
  1691. (not(cs_opt_size in current_settings.optimizerswitches) or
  1692. { for movsl }
  1693. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1694. { don't destroy if reg contains a parameter, local or global variable }
  1695. containsPointerLoad(c)
  1696. );
  1697. end;
  1698. end;
  1699. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1700. const c: tcontent): boolean;
  1701. { returns whether the contents c of reg are invalid after destReg is }
  1702. { modified }
  1703. begin
  1704. writeToRegDestroysContents :=
  1705. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1706. sequenceDependsOnReg(c,supreg,destReg);
  1707. end;
  1708. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1709. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1710. { returns whether the contents c of reg are invalid after regWritten is }
  1711. { is written to op }
  1712. begin
  1713. memwritedestroyed := false;
  1714. case op.typ of
  1715. top_reg:
  1716. writeDestroysContents :=
  1717. (getregtype(op.reg) = R_INTREGISTER) and
  1718. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1719. top_ref:
  1720. writeDestroysContents :=
  1721. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1722. else
  1723. writeDestroysContents := false;
  1724. end;
  1725. end;
  1726. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1727. { destroys all registers which possibly contain a reference to ref, regWritten }
  1728. { is the register whose contents are being written to memory (if this proc }
  1729. { is called because of a "mov?? %reg, (mem)" instruction) }
  1730. var
  1731. counter: tsuperregister;
  1732. destroymemwrite: boolean;
  1733. begin
  1734. for counter := RS_EAX to RS_EDI Do
  1735. begin
  1736. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1737. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1738. destroyReg(ptaiprop(p.optInfo), counter, false)
  1739. else if destroymemwrite then
  1740. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1741. end;
  1742. end;
  1743. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1744. var Counter: tsuperregister;
  1745. begin {initializes/desrtoys all registers}
  1746. For Counter := RS_EAX To RS_EDI Do
  1747. begin
  1748. if read then
  1749. readreg(p, Counter);
  1750. DestroyReg(p, Counter, written);
  1751. p^.regs[counter].MemWrite := nil;
  1752. end;
  1753. p^.DirFlag := F_Unknown;
  1754. end;
  1755. procedure DestroyOp(taiObj: tai; const o:Toper);
  1756. {$ifdef statedebug}
  1757. var
  1758. hp: tai;
  1759. {$endif statedebug}
  1760. begin
  1761. case o.typ Of
  1762. top_reg:
  1763. begin
  1764. {$ifdef statedebug}
  1765. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1766. hp.next := taiobj.next;
  1767. hp.previous := taiobj;
  1768. taiobj.next := hp;
  1769. if assigned(hp.next) then
  1770. hp.next.previous := hp;
  1771. {$endif statedebug}
  1772. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1773. end;
  1774. top_ref:
  1775. begin
  1776. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1777. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1778. end;
  1779. end;
  1780. end;
  1781. procedure AddInstr2RegContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1782. p: taicpu; supreg: tsuperregister);
  1783. {$ifdef statedebug}
  1784. var
  1785. hp: tai;
  1786. {$endif statedebug}
  1787. begin
  1788. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1789. if (typ in [con_ref,con_noRemoveRef]) then
  1790. begin
  1791. incState(wstate,1);
  1792. { also store how many instructions are part of the sequence in the first }
  1793. { instructions ptaiprop, so it can be easily accessed from within }
  1794. { CheckSequence}
  1795. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1796. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1797. NrOfInstrSinceLastMod[supreg] := 0;
  1798. invalidateDependingRegs(p.optinfo,supreg);
  1799. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1800. {$ifdef StateDebug}
  1801. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1802. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1803. InsertLLItem(AsmL, p, p.next, hp);
  1804. {$endif StateDebug}
  1805. end
  1806. else
  1807. begin
  1808. {$ifdef statedebug}
  1809. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1810. insertllitem(asml,p,p.next,hp);
  1811. {$endif statedebug}
  1812. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1813. {$ifdef StateDebug}
  1814. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1815. InsertLLItem(AsmL, p, p.next, hp);
  1816. {$endif StateDebug}
  1817. end
  1818. end;
  1819. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1820. p: taicpu; const oper: TOper);
  1821. begin
  1822. if oper.typ = top_reg then
  1823. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1824. else
  1825. begin
  1826. ReadOp(ptaiprop(p.optinfo), oper);
  1827. DestroyOp(p, oper);
  1828. end
  1829. end;
  1830. {*************************************************************************************}
  1831. {************************************** TDFAOBJ **************************************}
  1832. {*************************************************************************************}
  1833. constructor tdfaobj.create(_list: TAsmList);
  1834. begin
  1835. list := _list;
  1836. blockstart := nil;
  1837. blockend := nil;
  1838. nroftaiobjs := 0;
  1839. taipropblock := nil;
  1840. lolab := 0;
  1841. hilab := 0;
  1842. labdif := 0;
  1843. labeltable := nil;
  1844. end;
  1845. procedure tdfaobj.initlabeltable;
  1846. var
  1847. labelfound: boolean;
  1848. p, prev: tai;
  1849. hp1, hp2: tai;
  1850. {$ifdef i386}
  1851. regcounter,
  1852. supreg : tsuperregister;
  1853. {$endif i386}
  1854. usedregs, nodeallocregs: tregset;
  1855. begin
  1856. labelfound := false;
  1857. lolab := maxlongint;
  1858. hilab := 0;
  1859. p := blockstart;
  1860. prev := p;
  1861. while assigned(p) do
  1862. begin
  1863. if (tai(p).typ = ait_label) then
  1864. if not labelcanbeskipped(tai_label(p)) then
  1865. begin
  1866. labelfound := true;
  1867. if (tai_Label(p).labsym.labelnr < lolab) then
  1868. lolab := tai_label(p).labsym.labelnr;
  1869. if (tai_Label(p).labsym.labelnr > hilab) then
  1870. hilab := tai_label(p).labsym.labelnr;
  1871. end;
  1872. prev := p;
  1873. getnextinstruction(p, p);
  1874. end;
  1875. if (prev.typ = ait_marker) and
  1876. (tai_marker(prev).kind = mark_AsmBlockStart) then
  1877. blockend := prev
  1878. else blockend := nil;
  1879. if labelfound then
  1880. labdif := hilab+1-lolab
  1881. else labdif := 0;
  1882. usedregs := [];
  1883. if (labdif <> 0) then
  1884. begin
  1885. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1886. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1887. end;
  1888. p := blockstart;
  1889. prev := p;
  1890. while (p <> blockend) do
  1891. begin
  1892. case p.typ of
  1893. ait_label:
  1894. if not labelcanbeskipped(tai_label(p)) then
  1895. labeltable^[tai_label(p).labsym.labelnr-lolab].taiobj := p;
  1896. {$ifdef i386}
  1897. ait_regalloc:
  1898. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1899. begin
  1900. supreg:=getsupreg(tai_regalloc(p).reg);
  1901. case tai_regalloc(p).ratype of
  1902. ra_alloc :
  1903. begin
  1904. if not(supreg in usedregs) then
  1905. include(usedregs, supreg)
  1906. else
  1907. begin
  1908. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1909. hp1 := tai(p.previous);
  1910. list.remove(p);
  1911. p.free;
  1912. p := hp1;
  1913. end;
  1914. end;
  1915. ra_dealloc :
  1916. begin
  1917. exclude(usedregs, supreg);
  1918. hp1 := p;
  1919. hp2 := nil;
  1920. while not(findregalloc(supreg,tai(hp1.next),ra_alloc)) and
  1921. getnextinstruction(hp1, hp1) and
  1922. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1923. hp2 := hp1;
  1924. if hp2 <> nil then
  1925. begin
  1926. hp1 := tai(p.previous);
  1927. list.remove(p);
  1928. insertllitem(list, hp2, tai(hp2.next), p);
  1929. p := hp1;
  1930. end
  1931. else if findregalloc(getsupreg(tai_regalloc(p).reg), tai(p.next),ra_alloc)
  1932. and getnextinstruction(p,hp1) then
  1933. begin
  1934. hp1 := tai(p.previous);
  1935. list.remove(p);
  1936. p.free;
  1937. p := hp1;
  1938. // don't include here, since then the allocation will be removed when it's processed
  1939. // include(usedregs,supreg);
  1940. end;
  1941. end;
  1942. end;
  1943. end;
  1944. {$endif i386}
  1945. end;
  1946. repeat
  1947. prev := p;
  1948. p := tai(p.next);
  1949. until not(assigned(p)) or
  1950. (p = blockend) or
  1951. not(p.typ in (skipinstr - [ait_regalloc]));
  1952. end;
  1953. {$ifdef i386}
  1954. { don't add deallocation for function result variable or for regvars}
  1955. getNoDeallocRegs(noDeallocRegs);
  1956. usedRegs := usedRegs - noDeallocRegs;
  1957. for regCounter := RS_EAX to RS_EDI do
  1958. if regCounter in usedRegs then
  1959. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1960. {$endif i386}
  1961. end;
  1962. function tdfaobj.pass_1(_blockstart: tai): tai;
  1963. begin
  1964. blockstart := _blockstart;
  1965. initlabeltable;
  1966. pass_1 := blockend;
  1967. end;
  1968. function tdfaobj.initdfapass2: boolean;
  1969. {reserves memory for the PtaiProps in one big memory block when not using
  1970. TP, returns False if not enough memory is available for the optimizer in all
  1971. cases}
  1972. var
  1973. p: tai;
  1974. count: Longint;
  1975. { TmpStr: String; }
  1976. begin
  1977. p := blockstart;
  1978. skiphead(p);
  1979. nroftaiobjs := 0;
  1980. while (p <> blockend) do
  1981. begin
  1982. {$ifDef JumpAnal}
  1983. case p.typ of
  1984. ait_label:
  1985. begin
  1986. if not labelcanbeskipped(tai_label(p)) then
  1987. labeltable^[tai_label(p).labsym.labelnr-lolab].instrnr := nroftaiobjs
  1988. end;
  1989. ait_instruction:
  1990. begin
  1991. if taicpu(p).is_jmp then
  1992. begin
  1993. if (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr >= lolab) and
  1994. (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr <= hilab) then
  1995. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-lolab].refsfound);
  1996. end;
  1997. end;
  1998. { ait_instruction:
  1999. begin
  2000. if (taicpu(p).opcode = A_PUSH) and
  2001. (taicpu(p).oper[0]^.typ = top_symbol) and
  2002. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  2003. begin
  2004. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  2005. if}
  2006. end;
  2007. {$endif JumpAnal}
  2008. inc(NrOftaiObjs);
  2009. getnextinstruction(p,p);
  2010. end;
  2011. if nroftaiobjs <> 0 then
  2012. begin
  2013. initdfapass2 := True;
  2014. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2015. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  2016. p := blockstart;
  2017. skiphead(p);
  2018. for count := 1 To nroftaiobjs do
  2019. begin
  2020. ptaiprop(p.optinfo) := @taipropblock^[count];
  2021. getnextinstruction(p, p);
  2022. end;
  2023. end
  2024. else
  2025. initdfapass2 := false;
  2026. end;
  2027. procedure tdfaobj.dodfapass2;
  2028. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  2029. contents for the instructions starting with p. Returns the last tai which has
  2030. been processed}
  2031. var
  2032. curprop, LastFlagsChangeProp: ptaiprop;
  2033. Cnt, InstrCnt : Longint;
  2034. InstrProp: TInsProp;
  2035. UsedRegs: TRegSet;
  2036. prev,p : tai;
  2037. tmpref: TReference;
  2038. tmpsupreg: tsuperregister;
  2039. {$ifdef statedebug}
  2040. hp : tai;
  2041. {$endif}
  2042. {$ifdef AnalyzeLoops}
  2043. hp : tai;
  2044. TmpState: Byte;
  2045. {$endif AnalyzeLoops}
  2046. begin
  2047. p := BlockStart;
  2048. LastFlagsChangeProp := nil;
  2049. prev := nil;
  2050. UsedRegs := [];
  2051. UpdateUsedregs(UsedRegs, p);
  2052. SkipHead(p);
  2053. BlockStart := p;
  2054. InstrCnt := 1;
  2055. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2056. while (p <> Blockend) Do
  2057. begin
  2058. curprop := @taiPropBlock^[InstrCnt];
  2059. if assigned(prev)
  2060. then
  2061. begin
  2062. {$ifdef JumpAnal}
  2063. if (p.Typ <> ait_label) then
  2064. {$endif JumpAnal}
  2065. begin
  2066. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2067. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2068. curprop^.FlagsUsed := false;
  2069. end
  2070. end
  2071. else
  2072. begin
  2073. fillchar(curprop^, SizeOf(curprop^), 0);
  2074. { For tmpreg := RS_EAX to RS_EDI Do
  2075. curprop^.regs[tmpreg].WState := 1;}
  2076. end;
  2077. curprop^.UsedRegs := UsedRegs;
  2078. curprop^.CanBeRemoved := False;
  2079. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2080. For tmpsupreg := RS_EAX To RS_EDI Do
  2081. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2082. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2083. else
  2084. begin
  2085. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2086. curprop^.regs[tmpsupreg].typ := con_unknown;
  2087. end;
  2088. case p.typ Of
  2089. ait_marker:;
  2090. ait_label:
  2091. {$ifndef JumpAnal}
  2092. if not labelCanBeSkipped(tai_label(p)) then
  2093. DestroyAllRegs(curprop,false,false);
  2094. {$else JumpAnal}
  2095. begin
  2096. if not labelCanBeSkipped(tai_label(p)) then
  2097. With LTable^[tai_Label(p).labsym^.labelnr-LoLab] Do
  2098. {$ifDef AnalyzeLoops}
  2099. if (RefsFound = tai_Label(p).labsym^.RefCount)
  2100. {$else AnalyzeLoops}
  2101. if (JmpsProcessed = tai_Label(p).labsym^.RefCount)
  2102. {$endif AnalyzeLoops}
  2103. then
  2104. {all jumps to this label have been found}
  2105. {$ifDef AnalyzeLoops}
  2106. if (JmpsProcessed > 0)
  2107. then
  2108. {$endif AnalyzeLoops}
  2109. {we've processed at least one jump to this label}
  2110. begin
  2111. if (GetLastInstruction(p, hp) and
  2112. not(((hp.typ = ait_instruction)) and
  2113. (taicpu_labeled(hp).is_jmp))
  2114. then
  2115. {previous instruction not a JMP -> the contents of the registers after the
  2116. previous intruction has been executed have to be taken into account as well}
  2117. For tmpsupreg := RS_EAX to RS_EDI Do
  2118. begin
  2119. if (curprop^.regs[tmpsupreg].WState <>
  2120. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2121. then DestroyReg(curprop, tmpsupreg, true)
  2122. end
  2123. end
  2124. {$ifDef AnalyzeLoops}
  2125. else
  2126. {a label from a backward jump (e.g. a loop), no jump to this label has
  2127. already been processed}
  2128. if GetLastInstruction(p, hp) and
  2129. not(hp.typ = ait_instruction) and
  2130. (taicpu_labeled(hp).opcode = A_JMP))
  2131. then
  2132. {previous instruction not a jmp, so keep all the registers' contents from the
  2133. previous instruction}
  2134. begin
  2135. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2136. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2137. end
  2138. else
  2139. {previous instruction a jmp and no jump to this label processed yet}
  2140. begin
  2141. hp := p;
  2142. Cnt := InstrCnt;
  2143. {continue until we find a jump to the label or a label which has already
  2144. been processed}
  2145. while GetNextInstruction(hp, hp) and
  2146. not((hp.typ = ait_instruction) and
  2147. (taicpu(hp).is_jmp) and
  2148. (tasmlabel(taicpu(hp).oper[0]^.sym).labsymabelnr = tai_Label(p).labsym^.labelnr)) and
  2149. not((hp.typ = ait_label) and
  2150. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].RefsFound
  2151. = tai_Label(hp).labsym^.RefCount) and
  2152. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2153. inc(Cnt);
  2154. if (hp.typ = ait_label)
  2155. then
  2156. {there's a processed label after the current one}
  2157. begin
  2158. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2159. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2160. end
  2161. else
  2162. {there's no label anymore after the current one, or they haven't been
  2163. processed yet}
  2164. begin
  2165. GetLastInstruction(p, hp);
  2166. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2167. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2168. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2169. end
  2170. end
  2171. {$endif AnalyzeLoops}
  2172. else
  2173. {not all references to this label have been found, so destroy all registers}
  2174. begin
  2175. GetLastInstruction(p, hp);
  2176. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2177. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2178. DestroyAllRegs(curprop,true,true)
  2179. end;
  2180. end;
  2181. {$endif JumpAnal}
  2182. ait_stab, ait_force_line, ait_function_name:;
  2183. ait_align: ; { may destroy flags !!! }
  2184. ait_instruction:
  2185. begin
  2186. if taicpu(p).is_jmp or
  2187. (taicpu(p).opcode = A_JMP) then
  2188. begin
  2189. {$ifNDef JumpAnal}
  2190. for tmpsupreg := RS_EAX to RS_EDI do
  2191. with curprop^.regs[tmpsupreg] do
  2192. case typ of
  2193. con_ref: typ := con_noRemoveRef;
  2194. con_const: typ := con_noRemoveConst;
  2195. con_invalid: typ := con_unknown;
  2196. end;
  2197. {$else JumpAnal}
  2198. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-LoLab] Do
  2199. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2200. begin
  2201. if (InstrCnt < InstrNr)
  2202. then
  2203. {forward jump}
  2204. if (JmpsProcessed = 0) then
  2205. {no jump to this label has been processed yet}
  2206. begin
  2207. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2208. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2209. inc(JmpsProcessed);
  2210. end
  2211. else
  2212. begin
  2213. For tmpreg := RS_EAX to RS_EDI Do
  2214. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2215. curprop^.regs[tmpreg].WState) then
  2216. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2217. inc(JmpsProcessed);
  2218. end
  2219. {$ifdef AnalyzeLoops}
  2220. else
  2221. { backward jump, a loop for example}
  2222. { if (JmpsProcessed > 0) or
  2223. not(GetLastInstruction(taiObj, hp) and
  2224. (hp.typ = ait_labeled_instruction) and
  2225. (taicpu_labeled(hp).opcode = A_JMP))
  2226. then}
  2227. {instruction prior to label is not a jmp, or at least one jump to the label
  2228. has yet been processed}
  2229. begin
  2230. inc(JmpsProcessed);
  2231. For tmpreg := RS_EAX to RS_EDI Do
  2232. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2233. curprop^.regs[tmpreg].WState)
  2234. then
  2235. begin
  2236. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2237. Cnt := InstrNr;
  2238. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2239. begin
  2240. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2241. inc(Cnt);
  2242. end;
  2243. while (Cnt <= InstrCnt) Do
  2244. begin
  2245. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2246. inc(Cnt)
  2247. end
  2248. end;
  2249. end
  2250. { else }
  2251. {instruction prior to label is a jmp and no jumps to the label have yet been
  2252. processed}
  2253. { begin
  2254. inc(JmpsProcessed);
  2255. For tmpreg := RS_EAX to RS_EDI Do
  2256. begin
  2257. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2258. Cnt := InstrNr;
  2259. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2260. begin
  2261. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2262. inc(Cnt);
  2263. end;
  2264. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2265. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2266. begin
  2267. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2268. inc(Cnt);
  2269. end;
  2270. while (Cnt <= InstrCnt) Do
  2271. begin
  2272. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2273. inc(Cnt)
  2274. end
  2275. end
  2276. end}
  2277. {$endif AnalyzeLoops}
  2278. end;
  2279. {$endif JumpAnal}
  2280. end
  2281. else
  2282. begin
  2283. InstrProp := InsProp[taicpu(p).opcode];
  2284. case taicpu(p).opcode Of
  2285. A_MOV, A_MOVZX, A_MOVSX:
  2286. begin
  2287. case taicpu(p).oper[0]^.typ Of
  2288. top_ref, top_reg:
  2289. case taicpu(p).oper[1]^.typ Of
  2290. top_reg:
  2291. begin
  2292. {$ifdef statedebug}
  2293. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2294. insertllitem(list,p,p.next,hp);
  2295. {$endif statedebug}
  2296. readOp(curprop, taicpu(p).oper[0]^);
  2297. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2298. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2299. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2300. begin
  2301. with curprop^.regs[tmpsupreg] Do
  2302. begin
  2303. incState(wstate,1);
  2304. { also store how many instructions are part of the sequence in the first }
  2305. { instruction's ptaiprop, so it can be easily accessed from within }
  2306. { CheckSequence }
  2307. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2308. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2309. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2310. { Destroy the contents of the registers }
  2311. { that depended on the previous value of }
  2312. { this register }
  2313. invalidateDependingRegs(curprop,tmpsupreg);
  2314. curprop^.regs[tmpsupreg].memwrite := nil;
  2315. end;
  2316. end
  2317. else
  2318. begin
  2319. {$ifdef statedebug}
  2320. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2321. insertllitem(list,p,p.next,hp);
  2322. {$endif statedebug}
  2323. destroyReg(curprop, tmpsupreg, true);
  2324. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2325. with curprop^.regs[tmpsupreg] Do
  2326. begin
  2327. typ := con_ref;
  2328. startmod := p;
  2329. nrOfMods := 1;
  2330. end
  2331. end;
  2332. {$ifdef StateDebug}
  2333. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2334. insertllitem(list,p,p.next,hp);
  2335. {$endif StateDebug}
  2336. end;
  2337. top_ref:
  2338. begin
  2339. readref(curprop, taicpu(p).oper[1]^.ref);
  2340. if taicpu(p).oper[0]^.typ = top_reg then
  2341. begin
  2342. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2343. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2344. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2345. taicpu(p);
  2346. end
  2347. else
  2348. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2349. end;
  2350. end;
  2351. top_Const:
  2352. begin
  2353. case taicpu(p).oper[1]^.typ Of
  2354. top_reg:
  2355. begin
  2356. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2357. {$ifdef statedebug}
  2358. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2359. insertllitem(list,p,p.next,hp);
  2360. {$endif statedebug}
  2361. With curprop^.regs[tmpsupreg] Do
  2362. begin
  2363. DestroyReg(curprop, tmpsupreg, true);
  2364. typ := Con_Const;
  2365. StartMod := p;
  2366. nrOfMods := 1;
  2367. end
  2368. end;
  2369. top_ref:
  2370. begin
  2371. readref(curprop, taicpu(p).oper[1]^.ref);
  2372. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2373. end;
  2374. end;
  2375. end;
  2376. end;
  2377. end;
  2378. A_DIV, A_IDIV, A_MUL:
  2379. begin
  2380. ReadOp(curprop, taicpu(p).oper[0]^);
  2381. readreg(curprop,RS_EAX);
  2382. if (taicpu(p).OpCode = A_IDIV) or
  2383. (taicpu(p).OpCode = A_DIV) then
  2384. begin
  2385. readreg(curprop,RS_EDX);
  2386. end;
  2387. {$ifdef statedebug}
  2388. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2389. insertllitem(list,p,p.next,hp);
  2390. {$endif statedebug}
  2391. { DestroyReg(curprop, RS_EAX, true);}
  2392. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2393. taicpu(p), RS_EAX);
  2394. DestroyReg(curprop, RS_EDX, true);
  2395. LastFlagsChangeProp := curprop;
  2396. end;
  2397. A_IMUL:
  2398. begin
  2399. ReadOp(curprop,taicpu(p).oper[0]^);
  2400. if (taicpu(p).ops >= 2) then
  2401. ReadOp(curprop,taicpu(p).oper[1]^);
  2402. if (taicpu(p).ops <= 2) then
  2403. if (taicpu(p).ops=1) then
  2404. begin
  2405. readreg(curprop,RS_EAX);
  2406. {$ifdef statedebug}
  2407. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2408. insertllitem(list,p,p.next,hp);
  2409. {$endif statedebug}
  2410. { DestroyReg(curprop, RS_EAX, true); }
  2411. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2412. taicpu(p), RS_EAX);
  2413. DestroyReg(curprop,RS_EDX, true)
  2414. end
  2415. else
  2416. AddInstr2OpContents(
  2417. {$ifdef statedebug}list,{$endif}
  2418. taicpu(p), taicpu(p).oper[1]^)
  2419. else
  2420. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2421. taicpu(p), taicpu(p).oper[2]^);
  2422. LastFlagsChangeProp := curprop;
  2423. end;
  2424. A_LEA:
  2425. begin
  2426. readop(curprop,taicpu(p).oper[0]^);
  2427. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2428. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2429. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2430. else
  2431. begin
  2432. {$ifdef statedebug}
  2433. hp := tai_comment.Create(strpnew('destroying & initing'+
  2434. std_regname(taicpu(p).oper[1]^.reg)));
  2435. insertllitem(list,p,p.next,hp);
  2436. {$endif statedebug}
  2437. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2438. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2439. begin
  2440. typ := con_ref;
  2441. startmod := p;
  2442. nrOfMods := 1;
  2443. end
  2444. end;
  2445. end;
  2446. else
  2447. begin
  2448. Cnt := 1;
  2449. while (Cnt <= maxinschanges) and
  2450. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2451. begin
  2452. case InstrProp.Ch[Cnt] Of
  2453. Ch_REAX..Ch_REDI:
  2454. begin
  2455. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2456. readreg(curprop,tmpsupreg);
  2457. end;
  2458. Ch_WEAX..Ch_RWEDI:
  2459. begin
  2460. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2461. begin
  2462. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2463. readreg(curprop,tmpsupreg);
  2464. end;
  2465. {$ifdef statedebug}
  2466. hp := tai_comment.Create(strpnew('destroying '+
  2467. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2468. insertllitem(list,p,p.next,hp);
  2469. {$endif statedebug}
  2470. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2471. DestroyReg(curprop,tmpsupreg, true);
  2472. end;
  2473. Ch_MEAX..Ch_MEDI:
  2474. begin
  2475. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2476. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2477. taicpu(p),tmpsupreg);
  2478. end;
  2479. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2480. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2481. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2482. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2483. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2484. Ch_Wop1..Ch_RWop1:
  2485. begin
  2486. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2487. ReadOp(curprop, taicpu(p).oper[0]^);
  2488. DestroyOp(p, taicpu(p).oper[0]^);
  2489. end;
  2490. Ch_Mop1:
  2491. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2492. taicpu(p), taicpu(p).oper[0]^);
  2493. Ch_Wop2..Ch_RWop2:
  2494. begin
  2495. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2496. ReadOp(curprop, taicpu(p).oper[1]^);
  2497. DestroyOp(p, taicpu(p).oper[1]^);
  2498. end;
  2499. Ch_Mop2:
  2500. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2501. taicpu(p), taicpu(p).oper[1]^);
  2502. Ch_WOp3..Ch_RWOp3:
  2503. begin
  2504. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2505. ReadOp(curprop, taicpu(p).oper[2]^);
  2506. DestroyOp(p, taicpu(p).oper[2]^);
  2507. end;
  2508. Ch_Mop3:
  2509. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2510. taicpu(p), taicpu(p).oper[2]^);
  2511. Ch_WMemEDI:
  2512. begin
  2513. readreg(curprop, RS_EDI);
  2514. fillchar(tmpref, SizeOf(tmpref), 0);
  2515. tmpref.base := NR_EDI;
  2516. tmpref.index := NR_EDI;
  2517. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2518. end;
  2519. Ch_RFlags:
  2520. if assigned(LastFlagsChangeProp) then
  2521. LastFlagsChangeProp^.FlagsUsed := true;
  2522. Ch_WFlags:
  2523. LastFlagsChangeProp := curprop;
  2524. Ch_RWFlags:
  2525. begin
  2526. if assigned(LastFlagsChangeProp) then
  2527. LastFlagsChangeProp^.FlagsUsed := true;
  2528. LastFlagsChangeProp := curprop;
  2529. end;
  2530. Ch_FPU:;
  2531. else
  2532. begin
  2533. {$ifdef statedebug}
  2534. hp := tai_comment.Create(strpnew(
  2535. 'destroying all regs for prev instruction'));
  2536. insertllitem(list,p, p.next,hp);
  2537. {$endif statedebug}
  2538. DestroyAllRegs(curprop,true,true);
  2539. LastFlagsChangeProp := curprop;
  2540. end;
  2541. end;
  2542. inc(Cnt);
  2543. end
  2544. end;
  2545. end;
  2546. end;
  2547. end
  2548. else
  2549. begin
  2550. {$ifdef statedebug}
  2551. hp := tai_comment.Create(strpnew(
  2552. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2553. insertllitem(list,p, p.next,hp);
  2554. {$endif statedebug}
  2555. DestroyAllRegs(curprop,true,true);
  2556. end;
  2557. end;
  2558. inc(InstrCnt);
  2559. prev := p;
  2560. GetNextInstruction(p, p);
  2561. end;
  2562. end;
  2563. function tdfaobj.pass_generate_code: boolean;
  2564. begin
  2565. if initdfapass2 then
  2566. begin
  2567. dodfapass2;
  2568. pass_generate_code := true
  2569. end
  2570. else
  2571. pass_generate_code := false;
  2572. end;
  2573. {$ifopt r+}
  2574. {$define rangewason}
  2575. {$r-}
  2576. {$endif}
  2577. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2578. begin
  2579. if (sym.labelnr >= lolab) and
  2580. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2581. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2582. else
  2583. getlabelwithsym := nil;
  2584. end;
  2585. {$ifdef rangewason}
  2586. {$r+}
  2587. {$undef rangewason}
  2588. {$endif}
  2589. procedure tdfaobj.clear;
  2590. begin
  2591. if labdif <> 0 then
  2592. begin
  2593. freemem(labeltable);
  2594. labeltable := nil;
  2595. end;
  2596. if assigned(taipropblock) then
  2597. begin
  2598. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2599. taipropblock := nil;
  2600. end;
  2601. end;
  2602. end.