nx86inl.pas 14 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate x86 inline nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit nx86inl;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ninl,ncginl;
  22. type
  23. tx86inlinenode = class(tcginlinenode)
  24. { first pass override
  25. so that the code generator will actually generate
  26. these nodes.
  27. }
  28. function first_pi: tnode ; override;
  29. function first_arctan_real: tnode; override;
  30. function first_abs_real: tnode; override;
  31. function first_sqr_real: tnode; override;
  32. function first_sqrt_real: tnode; override;
  33. function first_ln_real: tnode; override;
  34. function first_cos_real: tnode; override;
  35. function first_sin_real: tnode; override;
  36. { second pass override to generate these nodes }
  37. procedure second_IncludeExclude;override;
  38. procedure second_pi; override;
  39. procedure second_arctan_real; override;
  40. procedure second_abs_real; override;
  41. procedure second_sqr_real; override;
  42. procedure second_sqrt_real; override;
  43. procedure second_ln_real; override;
  44. procedure second_cos_real; override;
  45. procedure second_sin_real; override;
  46. procedure second_prefetch;override;
  47. private
  48. procedure load_fpu_location;
  49. end;
  50. implementation
  51. uses
  52. systems,
  53. globals,
  54. cutils,verbose,
  55. symconst,
  56. defutil,
  57. aasmbase,aasmtai,aasmdata,aasmcpu,
  58. symdef,
  59. cgbase,pass_2,
  60. cpuinfo,cpubase,paramgr,
  61. nbas,ncon,ncal,ncnv,nld,ncgutil,
  62. cga,cgutils,cgx86,cgobj;
  63. {*****************************************************************************
  64. TX86INLINENODE
  65. *****************************************************************************}
  66. function tx86inlinenode.first_pi : tnode;
  67. begin
  68. expectloc:=LOC_FPUREGISTER;
  69. registersfpu:=1;
  70. first_pi := nil;
  71. end;
  72. function tx86inlinenode.first_arctan_real : tnode;
  73. begin
  74. expectloc:=LOC_FPUREGISTER;
  75. registersint:=left.registersint;
  76. registersfpu:=max(left.registersfpu,2);
  77. {$ifdef SUPPORT_MMX}
  78. registersmmx:=left.registersmmx;
  79. {$endif SUPPORT_MMX}
  80. first_arctan_real := nil;
  81. end;
  82. function tx86inlinenode.first_abs_real : tnode;
  83. begin
  84. if use_sse(resultdef) then
  85. begin
  86. expectloc:=LOC_MMREGISTER;
  87. registersmm:=max(left.registersmm,1);
  88. end
  89. else
  90. begin
  91. expectloc:=LOC_FPUREGISTER;
  92. registersfpu:=max(left.registersfpu,1);
  93. end;
  94. registersint:=left.registersint;
  95. {$ifdef SUPPORT_MMX}
  96. registersmmx:=left.registersmmx;
  97. {$endif SUPPORT_MMX}
  98. first_abs_real := nil;
  99. end;
  100. function tx86inlinenode.first_sqr_real : tnode;
  101. begin
  102. expectloc:=LOC_FPUREGISTER;
  103. registersint:=left.registersint;
  104. registersfpu:=max(left.registersfpu,1);
  105. {$ifdef SUPPORT_MMX}
  106. registersmmx:=left.registersmmx;
  107. {$endif SUPPORT_MMX}
  108. first_sqr_real := nil;
  109. end;
  110. function tx86inlinenode.first_sqrt_real : tnode;
  111. begin
  112. expectloc:=LOC_FPUREGISTER;
  113. registersint:=left.registersint;
  114. registersfpu:=max(left.registersfpu,1);
  115. {$ifdef SUPPORT_MMX}
  116. registersmmx:=left.registersmmx;
  117. {$endif SUPPORT_MMX}
  118. first_sqrt_real := nil;
  119. end;
  120. function tx86inlinenode.first_ln_real : tnode;
  121. begin
  122. expectloc:=LOC_FPUREGISTER;
  123. registersint:=left.registersint;
  124. registersfpu:=max(left.registersfpu,2);
  125. {$ifdef SUPPORT_MMX}
  126. registersmmx:=left.registersmmx;
  127. {$endif SUPPORT_MMX}
  128. first_ln_real := nil;
  129. end;
  130. function tx86inlinenode.first_cos_real : tnode;
  131. begin
  132. expectloc:=LOC_FPUREGISTER;
  133. registersint:=left.registersint;
  134. registersfpu:=max(left.registersfpu,1);
  135. {$ifdef SUPPORT_MMX}
  136. registersmmx:=left.registersmmx;
  137. {$endif SUPPORT_MMX}
  138. first_cos_real := nil;
  139. end;
  140. function tx86inlinenode.first_sin_real : tnode;
  141. begin
  142. expectloc:=LOC_FPUREGISTER;
  143. registersint:=left.registersint;
  144. registersfpu:=max(left.registersfpu,1);
  145. {$ifdef SUPPORT_MMX}
  146. registersmmx:=left.registersmmx;
  147. {$endif SUPPORT_MMX}
  148. first_sin_real := nil;
  149. end;
  150. procedure tx86inlinenode.second_Pi;
  151. begin
  152. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  153. emit_none(A_FLDPI,S_NO);
  154. tcgx86(cg).inc_fpu_stack;
  155. location.register:=NR_FPU_RESULT_REG;
  156. end;
  157. { load the FPU into the an fpu register }
  158. procedure tx86inlinenode.load_fpu_location;
  159. begin
  160. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  161. location.register:=NR_FPU_RESULT_REG;
  162. secondpass(left);
  163. case left.location.loc of
  164. LOC_FPUREGISTER:
  165. ;
  166. LOC_CFPUREGISTER:
  167. begin
  168. cg.a_loadfpu_reg_reg(current_asmdata.CurrAsmList,left.location.size,
  169. left.location.size,left.location.register,location.register);
  170. end;
  171. LOC_REFERENCE,LOC_CREFERENCE:
  172. begin
  173. cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList,
  174. left.location.size,left.location.size,
  175. left.location.reference,location.register);
  176. end;
  177. LOC_MMREGISTER,LOC_CMMREGISTER:
  178. begin
  179. location:=left.location;
  180. location_force_fpureg(current_asmdata.CurrAsmList,location,false);
  181. end;
  182. else
  183. internalerror(309991);
  184. end;
  185. end;
  186. procedure tx86inlinenode.second_arctan_real;
  187. begin
  188. load_fpu_location;
  189. emit_none(A_FLD1,S_NO);
  190. emit_none(A_FPATAN,S_NO);
  191. end;
  192. procedure tx86inlinenode.second_abs_real;
  193. var
  194. href : treference;
  195. begin
  196. if use_sse(resultdef) then
  197. begin
  198. secondpass(left);
  199. location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
  200. location:=left.location;
  201. case tfloatdef(resultdef).floattype of
  202. s32real:
  203. reference_reset_symbol(href,current_asmdata.RefAsmSymbol('FPC_ABSMASK_SINGLE'),0);
  204. s64real:
  205. reference_reset_symbol(href,current_asmdata.RefAsmSymbol('FPC_ABSMASK_DOUBLE'),0);
  206. else
  207. internalerror(200506081);
  208. end;
  209. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(A_ANDPS,S_XMM,href,location.register))
  210. end
  211. else
  212. begin
  213. load_fpu_location;
  214. emit_none(A_FABS,S_NO);
  215. end;
  216. end;
  217. procedure tx86inlinenode.second_sqr_real;
  218. begin
  219. if use_sse(resultdef) then
  220. begin
  221. secondpass(left);
  222. location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
  223. location:=left.location;
  224. cg.a_opmm_loc_reg(current_asmdata.CurrAsmList,OP_MUL,left.location.size,left.location,left.location.register,mms_movescalar);
  225. end
  226. else
  227. begin
  228. load_fpu_location;
  229. emit_reg_reg(A_FMUL,S_NO,NR_ST0,NR_ST0);
  230. end;
  231. end;
  232. procedure tx86inlinenode.second_sqrt_real;
  233. begin
  234. if use_sse(resultdef) then
  235. begin
  236. secondpass(left);
  237. location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
  238. location:=left.location;
  239. case tfloatdef(resultdef).floattype of
  240. s32real:
  241. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_SQRTSS,S_XMM,location.register,location.register));
  242. s64real:
  243. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_SQRTSD,S_XMM,location.register,location.register));
  244. else
  245. internalerror(200510031);
  246. end;
  247. end
  248. else
  249. begin
  250. load_fpu_location;
  251. emit_none(A_FSQRT,S_NO);
  252. end;
  253. end;
  254. procedure tx86inlinenode.second_ln_real;
  255. begin
  256. load_fpu_location;
  257. emit_none(A_FLDLN2,S_NO);
  258. emit_none(A_FXCH,S_NO);
  259. emit_none(A_FYL2X,S_NO);
  260. end;
  261. procedure tx86inlinenode.second_cos_real;
  262. begin
  263. load_fpu_location;
  264. emit_none(A_FCOS,S_NO);
  265. end;
  266. procedure tx86inlinenode.second_sin_real;
  267. begin
  268. load_fpu_location;
  269. emit_none(A_FSIN,S_NO)
  270. end;
  271. procedure tx86inlinenode.second_prefetch;
  272. var
  273. ref : treference;
  274. r : tregister;
  275. begin
  276. {$ifdef i386}
  277. if current_settings.cputype>=cpu_Pentium3 then
  278. {$endif i386}
  279. begin
  280. secondpass(left);
  281. case left.location.loc of
  282. LOC_CREFERENCE,
  283. LOC_REFERENCE:
  284. begin
  285. r:=cg.getintregister(current_asmdata.CurrAsmList,OS_ADDR);
  286. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,r);
  287. reference_reset_base(ref,r,0);
  288. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_PREFETCHNTA,S_NO,ref));
  289. end;
  290. else
  291. internalerror(200402021);
  292. end;
  293. end;
  294. end;
  295. {*****************************************************************************
  296. INCLUDE/EXCLUDE GENERIC HANDLING
  297. *****************************************************************************}
  298. procedure tx86inlinenode.second_IncludeExclude;
  299. var
  300. hregister : tregister;
  301. asmop : tasmop;
  302. bitsperop,l : longint;
  303. cgop : topcg;
  304. opsize : tcgsize;
  305. begin
  306. if not(is_varset(tcallparanode(left).resultdef)) then
  307. opsize:=int_cgsize(tcallparanode(left).resultdef.size)
  308. else
  309. opsize:=OS_32;
  310. bitsperop:=(8*tcgsize2size[opsize]);
  311. secondpass(tcallparanode(left).left);
  312. if tcallparanode(tcallparanode(left).right).left.nodetype=ordconstn then
  313. begin
  314. { calculate bit position }
  315. l:=1 shl (tordconstnode(tcallparanode(tcallparanode(left).right).left).value mod bitsperop);
  316. { determine operator }
  317. if inlinenumber=in_include_x_y then
  318. cgop:=OP_OR
  319. else
  320. begin
  321. cgop:=OP_AND;
  322. l:=not(l);
  323. end;
  324. case tcallparanode(left).left.location.loc of
  325. LOC_REFERENCE :
  326. begin
  327. inc(tcallparanode(left).left.location.reference.offset,
  328. (tordconstnode(tcallparanode(tcallparanode(left).right).left).value div bitsperop)*tcgsize2size[opsize]);
  329. cg.a_op_const_ref(current_asmdata.CurrAsmList,cgop,opsize,l,tcallparanode(left).left.location.reference);
  330. end;
  331. LOC_CREGISTER :
  332. cg.a_op_const_reg(current_asmdata.CurrAsmList,cgop,tcallparanode(left).left.location.size,l,tcallparanode(left).left.location.register);
  333. else
  334. internalerror(200405022);
  335. end;
  336. end
  337. else
  338. begin
  339. if opsize=OS_8 then
  340. opsize:=OS_32;
  341. { generate code for the element to set }
  342. secondpass(tcallparanode(tcallparanode(left).right).left);
  343. { determine asm operator }
  344. if inlinenumber=in_include_x_y then
  345. asmop:=A_BTS
  346. else
  347. asmop:=A_BTR;
  348. if tcallparanode(tcallparanode(left).right).left.location.loc in [LOC_CREGISTER,LOC_REGISTER] then
  349. { we don't need a mod 32 because this is done automatically }
  350. { by the bts instruction. For proper checking we would }
  351. { note: bts doesn't do any mod'ing, that's why we can also use }
  352. { it for normalsets! (JM) }
  353. { need a cmp and jmp, but this should be done by the }
  354. { type cast code which does range checking if necessary (FK) }
  355. hregister:=cg.makeregsize(current_asmdata.CurrAsmList,Tcallparanode(Tcallparanode(left).right).left.location.register,opsize)
  356. else
  357. hregister:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
  358. cg.a_load_loc_reg(current_asmdata.CurrAsmList,opsize,tcallparanode(tcallparanode(left).right).left.location,hregister);
  359. if (tcallparanode(left).left.location.loc=LOC_REFERENCE) then
  360. emit_reg_ref(asmop,tcgsize2opsize[opsize],hregister,tcallparanode(left).left.location.reference)
  361. else
  362. emit_reg_reg(asmop,tcgsize2opsize[opsize],hregister,tcallparanode(left).left.location.register);
  363. end;
  364. end;
  365. end.