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cgobj.pas 169 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symtype,symdef,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. tsubsetloadopt = (SL_REG,SL_REGNOSRCMASK,SL_SETZERO,SL_SETMAX);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overriden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. sould be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. alignment : talignment;
  48. rg : array[tregistertype] of trgobj;
  49. t_times : longint;
  50. {$ifdef flowgraph}
  51. aktflownode:word;
  52. {$endif}
  53. {************************************************}
  54. { basic routines }
  55. constructor create;
  56. {# Initialize the register allocators needed for the codegenerator.}
  57. procedure init_register_allocators;virtual;
  58. {# Clean up the register allocators needed for the codegenerator.}
  59. procedure done_register_allocators;virtual;
  60. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  61. procedure set_regalloc_live_range_direction(dir: TRADirection);
  62. {$ifdef flowgraph}
  63. procedure init_flowgraph;
  64. procedure done_flowgraph;
  65. {$endif}
  66. {# Gets a register suitable to do integer operations on.}
  67. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  68. {# Gets a register suitable to do integer operations on.}
  69. function getaddressregister(list:TAsmList):Tregister;virtual;
  70. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  71. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;abstract;
  73. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  74. the cpu specific child cg object have such a method?}
  75. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  76. procedure add_move_instruction(instr:Taicpu);virtual;
  77. function uses_registers(rt:Tregistertype):boolean;virtual;
  78. {# Get a specific register.}
  79. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  80. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  81. {# Get multiple registers specified.}
  82. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  83. {# Free multiple registers specified.}
  84. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  85. procedure allocallcpuregisters(list:TAsmList);virtual;
  86. procedure deallocallcpuregisters(list:TAsmList);virtual;
  87. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  88. procedure translate_register(var reg : tregister);
  89. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  90. {# Emit a label to the instruction stream. }
  91. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  92. {# Allocates register r by inserting a pai_realloc record }
  93. procedure a_reg_alloc(list : TAsmList;r : tregister);
  94. {# Deallocates register r by inserting a pa_regdealloc record}
  95. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  96. { Synchronize register, make sure it is still valid }
  97. procedure a_reg_sync(list : TAsmList;r : tregister);
  98. {# Pass a parameter, which is located in a register, to a routine.
  99. This routine should push/send the parameter to the routine, as
  100. required by the specific processor ABI and routine modifiers.
  101. This must be overriden for each CPU target.
  102. @param(size size of the operand in the register)
  103. @param(r register source of the operand)
  104. @param(cgpara where the parameter will be stored)
  105. }
  106. procedure a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  107. {# Pass a parameter, which is a constant, to a routine.
  108. A generic version is provided. This routine should
  109. be overriden for optimization purposes if the cpu
  110. permits directly sending this type of parameter.
  111. @param(size size of the operand in constant)
  112. @param(a value of constant to send)
  113. @param(cgpara where the parameter will be stored)
  114. }
  115. procedure a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  116. {# Pass the value of a parameter, which is located in memory, to a routine.
  117. A generic version is provided. This routine should
  118. be overriden for optimization purposes if the cpu
  119. permits directly sending this type of parameter.
  120. @param(size size of the operand in constant)
  121. @param(r Memory reference of value to send)
  122. @param(cgpara where the parameter will be stored)
  123. }
  124. procedure a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  125. {# Pass the value of a parameter, which can be located either in a register or memory location,
  126. to a routine.
  127. A generic version is provided.
  128. @param(l location of the operand to send)
  129. @param(nr parameter number (starting from one) of routine (from left to right))
  130. @param(cgpara where the parameter will be stored)
  131. }
  132. procedure a_param_loc(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  133. {# Pass the address of a reference to a routine. This routine
  134. will calculate the address of the reference, and pass this
  135. calculated address as a parameter.
  136. A generic version is provided. This routine should
  137. be overriden for optimization purposes if the cpu
  138. permits directly sending this type of parameter.
  139. @param(r reference to get address from)
  140. @param(nr parameter number (starting from one) of routine (from left to right))
  141. }
  142. procedure a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  143. { Remarks:
  144. * If a method specifies a size you have only to take care
  145. of that number of bits, i.e. load_const_reg with OP_8 must
  146. only load the lower 8 bit of the specified register
  147. the rest of the register can be undefined
  148. if necessary the compiler will call a method
  149. to zero or sign extend the register
  150. * The a_load_XX_XX with OP_64 needn't to be
  151. implemented for 32 bit
  152. processors, the code generator takes care of that
  153. * the addr size is for work with the natural pointer
  154. size
  155. * the procedures without fpu/mm are only for integer usage
  156. * normally the first location is the source and the
  157. second the destination
  158. }
  159. {# Emits instruction to call the method specified by symbol name.
  160. This routine must be overriden for each new target cpu.
  161. There is no a_call_ref because loading the reference will use
  162. a temp register on most cpu's resulting in conflicts with the
  163. registers used for the parameters (PFV)
  164. }
  165. procedure a_call_name(list : TAsmList;const s : string);virtual; abstract;
  166. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  167. procedure a_call_ref(list : TAsmList;ref : treference);virtual; abstract;
  168. { same as a_call_name, might be overriden on certain architectures to emit
  169. static calls without usage of a got trampoline }
  170. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  171. { move instructions }
  172. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  173. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);virtual;
  174. procedure a_load_const_loc(list : TAsmList;a : aint;const loc : tlocation);
  175. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  176. procedure a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual;
  177. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  178. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  179. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  180. procedure a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual;
  181. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  182. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  183. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  184. procedure a_load_loc_subsetreg(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  185. procedure a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  186. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  187. procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); virtual;
  188. procedure a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister); virtual;
  189. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister); virtual;
  190. procedure a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference); virtual;
  191. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister); virtual;
  192. procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister); virtual;
  193. procedure a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation); virtual;
  194. procedure a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister); virtual;
  195. procedure a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  196. procedure a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference); virtual;
  197. procedure a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference); virtual;
  198. procedure a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference); virtual;
  199. procedure a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference); virtual;
  200. procedure a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation); virtual;
  201. procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister); virtual;
  202. procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference); virtual;
  203. { bit test instructions }
  204. procedure a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister); virtual;
  205. procedure a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister); virtual;
  206. procedure a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister); virtual;
  207. procedure a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister); virtual;
  208. procedure a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister); virtual;
  209. procedure a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  210. procedure a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  211. { bit set/clear instructions }
  212. procedure a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister); virtual;
  213. procedure a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference); virtual;
  214. procedure a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister); virtual;
  215. procedure a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister); virtual;
  216. procedure a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference); virtual;
  217. procedure a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  218. procedure a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  219. { fpu move instructions }
  220. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize:tcgsize; reg1, reg2: tregister); virtual; abstract;
  221. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  222. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  223. procedure a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  224. procedure a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  225. procedure a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  226. procedure a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  227. procedure a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  228. { vector register move instructions }
  229. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  230. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  231. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  232. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  233. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  234. procedure a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  235. procedure a_parammm_ref(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  236. procedure a_parammm_loc(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  237. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  238. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  239. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  240. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  241. { basic arithmetic operations }
  242. { note: for operators which require only one argument (not, neg), use }
  243. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  244. { that in this case the *second* operand is used as both source and }
  245. { destination (JM) }
  246. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  247. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  248. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister); virtual;
  249. procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference); virtual;
  250. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: Aint; const loc: tlocation);
  251. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  252. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  253. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  254. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister); virtual;
  255. procedure a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference); virtual;
  256. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  257. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  258. { trinary operations for processors that support them, 'emulated' }
  259. { on others. None with "ref" arguments since I don't think there }
  260. { are any processors that support it (JM) }
  261. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  262. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  263. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  264. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  265. { comparison operations }
  266. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  267. l : tasmlabel);virtual; abstract;
  268. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  269. l : tasmlabel); virtual;
  270. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  271. l : tasmlabel);
  272. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  273. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  274. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  275. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel); virtual;
  276. procedure a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel); virtual;
  277. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  278. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  279. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  280. l : tasmlabel);
  281. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  282. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  283. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  284. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  285. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  286. }
  287. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  288. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  289. {
  290. This routine tries to optimize the op_const_reg/ref opcode, and should be
  291. called at the start of a_op_const_reg/ref. It returns the actual opcode
  292. to emit, and the constant value to emit. This function can opcode OP_NONE to
  293. remove the opcode and OP_MOVE to replace it with a simple load
  294. @param(op The opcode to emit, returns the opcode which must be emitted)
  295. @param(a The constant which should be emitted, returns the constant which must
  296. be emitted)
  297. }
  298. procedure optimize_op_const(var op: topcg; var a : aint);virtual;
  299. {#
  300. This routine is used in exception management nodes. It should
  301. save the exception reason currently in the FUNCTION_RETURN_REG. The
  302. save should be done either to a temp (pointed to by href).
  303. or on the stack (pushing the value on the stack).
  304. The size of the value to save is OS_S32. The default version
  305. saves the exception reason to a temp. memory area.
  306. }
  307. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  308. {#
  309. This routine is used in exception management nodes. It should
  310. save the exception reason constant. The
  311. save should be done either to a temp (pointed to by href).
  312. or on the stack (pushing the value on the stack).
  313. The size of the value to save is OS_S32. The default version
  314. saves the exception reason to a temp. memory area.
  315. }
  316. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);virtual;
  317. {#
  318. This routine is used in exception management nodes. It should
  319. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  320. should either be in the temp. area (pointed to by href , href should
  321. *NOT* be freed) or on the stack (the value should be popped).
  322. The size of the value to save is OS_S32. The default version
  323. saves the exception reason to a temp. memory area.
  324. }
  325. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  326. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  327. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  328. {# This should emit the opcode to copy len bytes from the source
  329. to destination.
  330. It must be overriden for each new target processor.
  331. @param(source Source reference of copy)
  332. @param(dest Destination reference of copy)
  333. }
  334. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);virtual; abstract;
  335. {# This should emit the opcode to copy len bytes from the an unaligned source
  336. to destination.
  337. It must be overriden for each new target processor.
  338. @param(source Source reference of copy)
  339. @param(dest Destination reference of copy)
  340. }
  341. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);virtual;
  342. {# This should emit the opcode to a shortrstring from the source
  343. to destination.
  344. @param(source Source reference of copy)
  345. @param(dest Destination reference of copy)
  346. }
  347. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  348. procedure g_copyvariant(list : TAsmList;const source,dest : treference);
  349. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  350. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  351. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  352. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  353. {# Generates range checking code. It is to note
  354. that this routine does not need to be overriden,
  355. as it takes care of everything.
  356. @param(p Node which contains the value to check)
  357. @param(todef Type definition of node to range check)
  358. }
  359. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  360. {# Generates overflow checking code for a node }
  361. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  362. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  363. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  364. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  365. {# Emits instructions when compilation is done in profile
  366. mode (this is set as a command line option). The default
  367. behavior does nothing, should be overriden as required.
  368. }
  369. procedure g_profilecode(list : TAsmList);virtual;
  370. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  371. @param(size Number of bytes to allocate)
  372. }
  373. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  374. {# Emits instruction for allocating the locals in entry
  375. code of a routine. This is one of the first
  376. routine called in @var(genentrycode).
  377. @param(localsize Number of bytes to allocate as locals)
  378. }
  379. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  380. {# Emits instructions for returning from a subroutine.
  381. Should also restore the framepointer and stack.
  382. @param(parasize Number of bytes of parameters to deallocate from stack)
  383. }
  384. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  385. {# This routine is called when generating the code for the entry point
  386. of a routine. It should save all registers which are not used in this
  387. routine, and which should be declared as saved in the std_saved_registers
  388. set.
  389. This routine is mainly used when linking to code which is generated
  390. by ABI-compliant compilers (like GCC), to make sure that the reserved
  391. registers of that ABI are not clobbered.
  392. @param(usedinproc Registers which are used in the code of this routine)
  393. }
  394. procedure g_save_registers(list:TAsmList);virtual;
  395. {# This routine is called when generating the code for the exit point
  396. of a routine. It should restore all registers which were previously
  397. saved in @var(g_save_standard_registers).
  398. @param(usedinproc Registers which are used in the code of this routine)
  399. }
  400. procedure g_restore_registers(list:TAsmList);virtual;
  401. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  402. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);virtual;
  403. function g_indirect_sym_load(list:TAsmList;const symname: string): tregister;virtual;
  404. { generate a stub which only purpose is to pass control the given external method,
  405. setting up any additional environment before doing so (if required).
  406. The default implementation issues a jump instruction to the external name. }
  407. procedure g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string); virtual;
  408. { initialize the pic/got register }
  409. procedure g_maybe_got_init(list: TAsmList); virtual;
  410. protected
  411. procedure get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  412. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  413. procedure a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  414. procedure a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt); virtual;
  415. procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); virtual;
  416. function get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  417. function get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  418. function get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  419. end;
  420. {$ifndef cpu64bit}
  421. {# @abstract(Abstract code generator for 64 Bit operations)
  422. This class implements an abstract code generator class
  423. for 64 Bit operations.
  424. }
  425. tcg64 = class
  426. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  427. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  428. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  429. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  430. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  431. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  432. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  433. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  434. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  435. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  436. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  437. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  438. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  439. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  440. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  441. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  442. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  443. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  444. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  445. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  446. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  447. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  448. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  449. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  450. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  451. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  452. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  453. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  454. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  455. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  456. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  457. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  458. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  459. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  460. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  461. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  462. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  463. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  464. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  465. procedure a_param64_reg(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  466. procedure a_param64_const(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  467. procedure a_param64_ref(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  468. procedure a_param64_loc(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  469. {
  470. This routine tries to optimize the const_reg opcode, and should be
  471. called at the start of a_op64_const_reg. It returns the actual opcode
  472. to emit, and the constant value to emit. If this routine returns
  473. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  474. @param(op The opcode to emit, returns the opcode which must be emitted)
  475. @param(a The constant which should be emitted, returns the constant which must
  476. be emitted)
  477. @param(reg The register to emit the opcode with, returns the register with
  478. which the opcode will be emitted)
  479. }
  480. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  481. { override to catch 64bit rangechecks }
  482. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  483. end;
  484. {$endif cpu64bit}
  485. var
  486. {# Main code generator class }
  487. cg : tcg;
  488. {$ifndef cpu64bit}
  489. {# Code generator class for all operations working with 64-Bit operands }
  490. cg64 : tcg64;
  491. {$endif cpu64bit}
  492. implementation
  493. uses
  494. globals,options,systems,
  495. verbose,defutil,paramgr,symsym,
  496. tgobj,cutils,procinfo,
  497. ncgrtti;
  498. {*****************************************************************************
  499. basic functionallity
  500. ******************************************************************************}
  501. constructor tcg.create;
  502. begin
  503. end;
  504. {*****************************************************************************
  505. register allocation
  506. ******************************************************************************}
  507. procedure tcg.init_register_allocators;
  508. begin
  509. fillchar(rg,sizeof(rg),0);
  510. add_reg_instruction_hook:=@add_reg_instruction;
  511. end;
  512. procedure tcg.done_register_allocators;
  513. begin
  514. { Safety }
  515. fillchar(rg,sizeof(rg),0);
  516. add_reg_instruction_hook:=nil;
  517. end;
  518. {$ifdef flowgraph}
  519. procedure Tcg.init_flowgraph;
  520. begin
  521. aktflownode:=0;
  522. end;
  523. procedure Tcg.done_flowgraph;
  524. begin
  525. end;
  526. {$endif}
  527. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  528. begin
  529. if not assigned(rg[R_INTREGISTER]) then
  530. internalerror(200312122);
  531. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  532. end;
  533. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  534. begin
  535. if not assigned(rg[R_FPUREGISTER]) then
  536. internalerror(200312123);
  537. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  538. end;
  539. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  540. begin
  541. if not assigned(rg[R_MMREGISTER]) then
  542. internalerror(2003121214);
  543. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  544. end;
  545. function tcg.getaddressregister(list:TAsmList):Tregister;
  546. begin
  547. if assigned(rg[R_ADDRESSREGISTER]) then
  548. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  549. else
  550. begin
  551. if not assigned(rg[R_INTREGISTER]) then
  552. internalerror(200312121);
  553. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  554. end;
  555. end;
  556. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  557. var
  558. subreg:Tsubregister;
  559. begin
  560. subreg:=cgsize2subreg(size);
  561. result:=reg;
  562. setsubreg(result,subreg);
  563. { notify RA }
  564. if result<>reg then
  565. list.concat(tai_regalloc.resize(result));
  566. end;
  567. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  568. begin
  569. if not assigned(rg[getregtype(r)]) then
  570. internalerror(200312125);
  571. rg[getregtype(r)].getcpuregister(list,r);
  572. end;
  573. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  574. begin
  575. if not assigned(rg[getregtype(r)]) then
  576. internalerror(200312126);
  577. rg[getregtype(r)].ungetcpuregister(list,r);
  578. end;
  579. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  580. begin
  581. if assigned(rg[rt]) then
  582. rg[rt].alloccpuregisters(list,r)
  583. else
  584. internalerror(200310092);
  585. end;
  586. procedure tcg.allocallcpuregisters(list:TAsmList);
  587. begin
  588. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  589. {$ifndef i386}
  590. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  591. {$ifdef cpumm}
  592. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  593. {$endif cpumm}
  594. {$endif i386}
  595. end;
  596. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  597. begin
  598. if assigned(rg[rt]) then
  599. rg[rt].dealloccpuregisters(list,r)
  600. else
  601. internalerror(200310093);
  602. end;
  603. procedure tcg.deallocallcpuregisters(list:TAsmList);
  604. begin
  605. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  606. {$ifndef i386}
  607. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  608. {$ifdef cpumm}
  609. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  610. {$endif cpumm}
  611. {$endif i386}
  612. end;
  613. function tcg.uses_registers(rt:Tregistertype):boolean;
  614. begin
  615. if assigned(rg[rt]) then
  616. result:=rg[rt].uses_registers
  617. else
  618. result:=false;
  619. end;
  620. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  621. var
  622. rt : tregistertype;
  623. begin
  624. rt:=getregtype(r);
  625. { Only add it when a register allocator is configured.
  626. No IE can be generated, because the VMT is written
  627. without a valid rg[] }
  628. if assigned(rg[rt]) then
  629. rg[rt].add_reg_instruction(instr,r);
  630. end;
  631. procedure tcg.add_move_instruction(instr:Taicpu);
  632. var
  633. rt : tregistertype;
  634. begin
  635. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  636. if assigned(rg[rt]) then
  637. rg[rt].add_move_instruction(instr)
  638. else
  639. internalerror(200310095);
  640. end;
  641. procedure tcg.set_regalloc_live_range_direction(dir: TRADirection);
  642. var
  643. rt : tregistertype;
  644. begin
  645. for rt:=low(rg) to high(rg) do
  646. begin
  647. if assigned(rg[rt]) then
  648. rg[rt].live_range_direction:=dir;
  649. end;
  650. end;
  651. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  652. var
  653. rt : tregistertype;
  654. begin
  655. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  656. begin
  657. if assigned(rg[rt]) then
  658. rg[rt].do_register_allocation(list,headertai);
  659. end;
  660. { running the other register allocator passes could require addition int/addr. registers
  661. when spilling so run int/addr register allocation at the end }
  662. if assigned(rg[R_INTREGISTER]) then
  663. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  664. if assigned(rg[R_ADDRESSREGISTER]) then
  665. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  666. end;
  667. procedure tcg.translate_register(var reg : tregister);
  668. begin
  669. rg[getregtype(reg)].translate_register(reg);
  670. end;
  671. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  672. begin
  673. list.concat(tai_regalloc.alloc(r,nil));
  674. end;
  675. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  676. begin
  677. list.concat(tai_regalloc.dealloc(r,nil));
  678. end;
  679. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  680. var
  681. instr : tai;
  682. begin
  683. instr:=tai_regalloc.sync(r);
  684. list.concat(instr);
  685. add_reg_instruction(instr,r);
  686. end;
  687. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  688. begin
  689. list.concat(tai_label.create(l));
  690. end;
  691. {*****************************************************************************
  692. for better code generation these methods should be overridden
  693. ******************************************************************************}
  694. procedure tcg.a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  695. var
  696. ref : treference;
  697. begin
  698. cgpara.check_simple_location;
  699. case cgpara.location^.loc of
  700. LOC_REGISTER,LOC_CREGISTER:
  701. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  702. LOC_REFERENCE,LOC_CREFERENCE:
  703. begin
  704. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  705. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  706. end
  707. else
  708. internalerror(2002071004);
  709. end;
  710. end;
  711. procedure tcg.a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);
  712. var
  713. ref : treference;
  714. begin
  715. cgpara.check_simple_location;
  716. case cgpara.location^.loc of
  717. LOC_REGISTER,LOC_CREGISTER:
  718. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  719. LOC_REFERENCE,LOC_CREFERENCE:
  720. begin
  721. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  722. a_load_const_ref(list,cgpara.location^.size,a,ref);
  723. end
  724. else
  725. internalerror(2002071004);
  726. end;
  727. end;
  728. procedure tcg.a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  729. var
  730. ref : treference;
  731. begin
  732. cgpara.check_simple_location;
  733. case cgpara.location^.loc of
  734. LOC_REGISTER,LOC_CREGISTER:
  735. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  736. LOC_REFERENCE,LOC_CREFERENCE:
  737. begin
  738. reference_reset(ref);
  739. ref.base:=cgpara.location^.reference.index;
  740. ref.offset:=cgpara.location^.reference.offset;
  741. if (size <> OS_NO) and
  742. (tcgsize2size[size] < sizeof(aint)) then
  743. begin
  744. if (cgpara.size = OS_NO) or
  745. assigned(cgpara.location^.next) then
  746. internalerror(2006052401);
  747. a_load_ref_ref(list,size,cgpara.size,r,ref);
  748. end
  749. else
  750. { use concatcopy, because the parameter can be larger than }
  751. { what the OS_* constants can handle }
  752. g_concatcopy(list,r,ref,cgpara.intsize);
  753. end
  754. else
  755. internalerror(2002071004);
  756. end;
  757. end;
  758. procedure tcg.a_param_loc(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  759. begin
  760. case l.loc of
  761. LOC_REGISTER,
  762. LOC_CREGISTER :
  763. a_param_reg(list,l.size,l.register,cgpara);
  764. LOC_CONSTANT :
  765. a_param_const(list,l.size,l.value,cgpara);
  766. LOC_CREFERENCE,
  767. LOC_REFERENCE :
  768. a_param_ref(list,l.size,l.reference,cgpara);
  769. else
  770. internalerror(2002032211);
  771. end;
  772. end;
  773. procedure tcg.a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);
  774. var
  775. hr : tregister;
  776. begin
  777. cgpara.check_simple_location;
  778. if cgpara.location^.loc in [LOC_CREGISTER,LOC_REGISTER] then
  779. a_loadaddr_ref_reg(list,r,cgpara.location^.register)
  780. else
  781. begin
  782. hr:=getaddressregister(list);
  783. a_loadaddr_ref_reg(list,r,hr);
  784. a_param_reg(list,OS_ADDR,hr,cgpara);
  785. end;
  786. end;
  787. {****************************************************************************
  788. some generic implementations
  789. ****************************************************************************}
  790. {$ifopt r+}
  791. {$define rangeon}
  792. {$r-}
  793. {$endif}
  794. {$ifopt q+}
  795. {$define overflowon}
  796. {$q-}
  797. {$endif}
  798. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
  799. var
  800. bitmask: aword;
  801. tmpreg: tregister;
  802. stopbit: byte;
  803. begin
  804. tmpreg:=getintregister(list,sreg.subsetregsize);
  805. if (subsetsize in [OS_S8..OS_S128]) then
  806. begin
  807. { sign extend in case the value has a bitsize mod 8 <> 0 }
  808. { both instructions will be optimized away if not }
  809. a_op_const_reg_reg(list,OP_SHL,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.startbit-sreg.bitlen,sreg.subsetreg,tmpreg);
  810. a_op_const_reg(list,OP_SAR,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.bitlen,tmpreg);
  811. end
  812. else
  813. begin
  814. a_op_const_reg_reg(list,OP_SHR,sreg.subsetregsize,sreg.startbit,sreg.subsetreg,tmpreg);
  815. stopbit := sreg.startbit + sreg.bitlen;
  816. // on x86(64), 1 shl 32(64) = 1 instead of 0
  817. // use aword to prevent overflow with 1 shl 31
  818. if (stopbit - sreg.startbit <> AIntBits) then
  819. bitmask := (aword(1) shl (stopbit - sreg.startbit)) - 1
  820. else
  821. bitmask := high(aword);
  822. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),tmpreg);
  823. end;
  824. tmpreg := makeregsize(list,tmpreg,subsetsize);
  825. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  826. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  827. end;
  828. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister);
  829. begin
  830. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,SL_REG);
  831. end;
  832. procedure tcg.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
  833. var
  834. bitmask: aword;
  835. tmpreg: tregister;
  836. stopbit: byte;
  837. begin
  838. stopbit := sreg.startbit + sreg.bitlen;
  839. // on x86(64), 1 shl 32(64) = 1 instead of 0
  840. if (stopbit <> AIntBits) then
  841. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  842. else
  843. bitmask := not(high(aword) xor ((aword(1) shl sreg.startbit)-1));
  844. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  845. begin
  846. tmpreg:=getintregister(list,sreg.subsetregsize);
  847. a_load_reg_reg(list,fromsize,sreg.subsetregsize,fromreg,tmpreg);
  848. a_op_const_reg(list,OP_SHL,sreg.subsetregsize,sreg.startbit,tmpreg);
  849. if (slopt <> SL_REGNOSRCMASK) then
  850. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(not(bitmask)),tmpreg);
  851. end;
  852. if (slopt <> SL_SETMAX) then
  853. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  854. case slopt of
  855. SL_SETZERO : ;
  856. SL_SETMAX :
  857. if (sreg.bitlen <> AIntBits) then
  858. a_op_const_reg(list,OP_OR,sreg.subsetregsize,
  859. aint(((aword(1) shl sreg.bitlen)-1) shl sreg.startbit),
  860. sreg.subsetreg)
  861. else
  862. a_load_const_reg(list,sreg.subsetregsize,-1,sreg.subsetreg);
  863. else
  864. a_op_reg_reg(list,OP_OR,sreg.subsetregsize,tmpreg,sreg.subsetreg);
  865. end;
  866. end;
  867. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister);
  868. var
  869. tmpreg: tregister;
  870. bitmask: aword;
  871. stopbit: byte;
  872. begin
  873. if (fromsreg.bitlen >= tosreg.bitlen) then
  874. begin
  875. tmpreg := getintregister(list,tosreg.subsetregsize);
  876. a_load_reg_reg(list,fromsreg.subsetregsize,tosreg.subsetregsize,fromsreg.subsetreg,tmpreg);
  877. if (fromsreg.startbit <= tosreg.startbit) then
  878. a_op_const_reg(list,OP_SHL,tosreg.subsetregsize,tosreg.startbit-fromsreg.startbit,tmpreg)
  879. else
  880. a_op_const_reg(list,OP_SHR,tosreg.subsetregsize,fromsreg.startbit-tosreg.startbit,tmpreg);
  881. stopbit := tosreg.startbit + tosreg.bitlen;
  882. // on x86(64), 1 shl 32(64) = 1 instead of 0
  883. if (stopbit <> AIntBits) then
  884. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl tosreg.startbit)-1))
  885. else
  886. bitmask := (aword(1) shl tosreg.startbit) - 1;
  887. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(bitmask),tosreg.subsetreg);
  888. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(not(bitmask)),tmpreg);
  889. a_op_reg_reg(list,OP_OR,tosreg.subsetregsize,tmpreg,tosreg.subsetreg);
  890. end
  891. else
  892. begin
  893. tmpreg := getintregister(list,tosubsetsize);
  894. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  895. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  896. end;
  897. end;
  898. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference);
  899. var
  900. tmpreg: tregister;
  901. begin
  902. tmpreg := getintregister(list,tosize);
  903. a_load_subsetreg_reg(list,subsetsize,tosize,sreg,tmpreg);
  904. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  905. end;
  906. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister);
  907. var
  908. tmpreg: tregister;
  909. begin
  910. tmpreg := getintregister(list,subsetsize);
  911. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  912. a_load_reg_subsetreg(list,subsetsize,subsetsize,tmpreg,sreg);
  913. end;
  914. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister);
  915. var
  916. bitmask: aword;
  917. stopbit: byte;
  918. begin
  919. stopbit := sreg.startbit + sreg.bitlen;
  920. // on x86(64), 1 shl 32(64) = 1 instead of 0
  921. if (stopbit <> AIntBits) then
  922. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  923. else
  924. bitmask := (aword(1) shl sreg.startbit) - 1;
  925. if (((aword(a) shl sreg.startbit) and not bitmask) <> not bitmask) then
  926. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  927. a_op_const_reg(list,OP_OR,sreg.subsetregsize,aint((aword(a) shl sreg.startbit) and not(bitmask)),sreg.subsetreg);
  928. end;
  929. procedure tcg.a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  930. begin
  931. case loc.loc of
  932. LOC_REFERENCE,LOC_CREFERENCE:
  933. a_load_ref_subsetref(list,loc.size,subsetsize,loc.reference,sref);
  934. LOC_REGISTER,LOC_CREGISTER:
  935. a_load_reg_subsetref(list,loc.size,subsetsize,loc.register,sref);
  936. LOC_CONSTANT:
  937. a_load_const_subsetref(list,subsetsize,loc.value,sref);
  938. LOC_SUBSETREG,LOC_CSUBSETREG:
  939. a_load_subsetreg_subsetref(list,loc.size,subsetsize,loc.sreg,sref);
  940. LOC_SUBSETREF,LOC_CSUBSETREF:
  941. a_load_subsetref_subsetref(list,loc.size,subsetsize,loc.sref,sref);
  942. else
  943. internalerror(200608053);
  944. end;
  945. end;
  946. (*
  947. Subsetrefs are used for (bit)packed arrays and (bit)packed records stored
  948. in memory. They are like a regular reference, but contain an extra bit
  949. offset (either constant -startbit- or variable -bitindexreg-, always OS_INT)
  950. and a bit length (always constant).
  951. Bit packed values are stored differently in memory depending on whether we
  952. are on a big or a little endian system (compatible with at least GPC). The
  953. size of the basic working unit is always the smallest power-of-2 byte size
  954. which can contain the bit value (so 1..8 bits -> 1 byte, 9..16 bits -> 2
  955. bytes, 17..32 bits -> 4 bytes etc).
  956. On a big endian, 5-bit: values are stored like this:
  957. 11111222 22333334 44445555 56666677 77788888
  958. The leftmost bit of each 5-bit value corresponds to the most significant
  959. bit.
  960. On little endian, it goes like this:
  961. 22211111 43333322 55554444 77666665 88888777
  962. In this case, per byte the left-most bit is more significant than those on
  963. the right, but the bits in the next byte are all more significant than
  964. those in the previous byte (e.g., the 222 in the first byte are the low
  965. three bits of that value, while the 22 in the second byte are the upper
  966. two bits.
  967. Big endian, 9 bit values:
  968. 11111111 12222222 22333333 33344444 ...
  969. Little endian, 9 bit values:
  970. 11111111 22222221 33333322 44444333 ...
  971. This is memory representation and the 16 bit values are byteswapped.
  972. Similarly as in the previous case, the 2222222 string contains the lower
  973. bits of value 2 and the 22 string contains the upper bits. Once loaded into
  974. registers (two 16 bit registers in the current implementation, although a
  975. single 32 bit register would be possible too, in particular if 32 bit
  976. alignment can be guaranteed), this becomes:
  977. 22222221 11111111 44444333 33333322 ...
  978. (l)ow u l l u l u
  979. The startbit/bitindex in a subsetreference always refers to
  980. a) on big endian: the most significant bit of the value
  981. (bits counted from left to right, both memory an registers)
  982. b) on little endian: the least significant bit when the value
  983. is loaded in a register (bit counted from right to left)
  984. Although a) results in more complex code for big endian systems, it's
  985. needed for compatibility both with GPC and with e.g. bitpacked arrays in
  986. Apple's universal interfaces which depend on these layout differences).
  987. Note: when changing the loadsize calculated in get_subsetref_load_info,
  988. make sure the appropriate alignment is guaranteed, at least in case of
  989. {$defined cpurequiresproperalignment}.
  990. *)
  991. procedure tcg.get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  992. var
  993. intloadsize: aint;
  994. begin
  995. intloadsize := packedbitsloadsize(sref.bitlen);
  996. if (intloadsize = 0) then
  997. internalerror(2006081310);
  998. if (intloadsize > sizeof(aint)) then
  999. intloadsize := sizeof(aint);
  1000. loadsize := int_cgsize(intloadsize);
  1001. if (loadsize = OS_NO) then
  1002. internalerror(2006081311);
  1003. if (sref.bitlen > sizeof(aint)*8) then
  1004. internalerror(2006081312);
  1005. extra_load :=
  1006. (sref.bitlen <> 1) and
  1007. ((sref.bitindexreg <> NR_NO) or
  1008. (byte(sref.startbit+sref.bitlen) > byte(intloadsize*8)));
  1009. end;
  1010. procedure tcg.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  1011. var
  1012. restbits: byte;
  1013. begin
  1014. if (target_info.endian = endian_big) then
  1015. begin
  1016. { valuereg contains the upper bits, extra_value_reg the lower }
  1017. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  1018. if (subsetsize in [OS_S8..OS_S128]) then
  1019. begin
  1020. { sign extend }
  1021. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize+sref.startbit,valuereg);
  1022. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1023. end
  1024. else
  1025. begin
  1026. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  1027. { mask other bits }
  1028. if (sref.bitlen <> AIntBits) then
  1029. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1030. end;
  1031. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
  1032. end
  1033. else
  1034. begin
  1035. { valuereg contains the lower bits, extra_value_reg the upper }
  1036. a_op_const_reg(list,OP_SHR,OS_INT,sref.startbit,valuereg);
  1037. if (subsetsize in [OS_S8..OS_S128]) then
  1038. begin
  1039. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen+loadbitsize-sref.startbit,extra_value_reg);
  1040. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,extra_value_reg);
  1041. end
  1042. else
  1043. begin
  1044. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
  1045. { mask other bits }
  1046. if (sref.bitlen <> AIntBits) then
  1047. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),extra_value_reg);
  1048. end;
  1049. end;
  1050. { merge }
  1051. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1052. end;
  1053. procedure tcg.a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  1054. var
  1055. tmpreg: tregister;
  1056. begin
  1057. tmpreg := getintregister(list,OS_INT);
  1058. if (target_info.endian = endian_big) then
  1059. begin
  1060. { since this is a dynamic index, it's possible that the value }
  1061. { is entirely in valuereg. }
  1062. { get the data in valuereg in the right place }
  1063. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1064. if (subsetsize in [OS_S8..OS_S128]) then
  1065. begin
  1066. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1067. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg)
  1068. end
  1069. else
  1070. begin
  1071. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1072. if (loadbitsize <> AIntBits) then
  1073. { mask left over bits }
  1074. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1075. end;
  1076. tmpreg := getintregister(list,OS_INT);
  1077. { the bits in extra_value_reg (if any) start at the most significant bit => }
  1078. { extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
  1079. { => = -(sref.bitindex+(sref.bitlen-2*loadbitsize)) }
  1080. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpreg);
  1081. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1082. a_op_reg_reg(list,OP_SHR,OS_INT,tmpreg,extra_value_reg);
  1083. { if there are no bits in extra_value_reg, then sref.bitindex was }
  1084. { < loadsize-sref.bitlen, and therefore tmpreg will now be >= loadsize }
  1085. { => extra_value_reg is now 0 }
  1086. {$ifdef sparc}
  1087. { except on sparc, where "shr X" = "shr (X and (bitsize-1))" }
  1088. if (loadbitsize = AIntBits) then
  1089. begin
  1090. { if (tmpreg >= cpu_bit_size) then tmpreg := 1 else tmpreg := 0 }
  1091. a_op_const_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpreg);
  1092. { if (tmpreg = cpu_bit_size) then tmpreg := 0 else tmpreg := -1 }
  1093. a_op_const_reg(list,OP_SUB,OS_INT,1,tmpreg);
  1094. { if (tmpreg = cpu_bit_size) then extra_value_reg := 0 }
  1095. a_op_reg_reg(list,OP_AND,OS_INT,tmpreg,extra_value_reg);
  1096. end;
  1097. {$endif sparc}
  1098. { merge }
  1099. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1100. { no need to mask, necessary masking happened earlier on }
  1101. end
  1102. else
  1103. begin
  1104. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1105. { Y-x = -(Y-x) }
  1106. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpreg);
  1107. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1108. { tmpreg is in the range 1..<cpu_bitsize> -> will zero extra_value_reg }
  1109. { if all bits are in valuereg }
  1110. a_op_reg_reg(list,OP_SHL,OS_INT,tmpreg,extra_value_reg);
  1111. {$ifdef x86}
  1112. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1113. if (loadbitsize = AIntBits) then
  1114. begin
  1115. { if (tmpreg >= cpu_bit_size) then tmpreg := 1 else tmpreg := 0 }
  1116. a_op_const_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpreg);
  1117. { if (tmpreg = cpu_bit_size) then tmpreg := 0 else tmpreg := -1 }
  1118. a_op_const_reg(list,OP_SUB,OS_INT,1,tmpreg);
  1119. { if (tmpreg = cpu_bit_size) then extra_value_reg := 0 }
  1120. a_op_reg_reg(list,OP_AND,OS_INT,tmpreg,extra_value_reg);
  1121. end;
  1122. {$endif x86}
  1123. { merge }
  1124. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1125. { sign extend or mask other bits }
  1126. if (subsetsize in [OS_S8..OS_S128]) then
  1127. begin
  1128. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1129. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1130. end
  1131. else
  1132. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1133. end;
  1134. end;
  1135. procedure tcg.a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister);
  1136. var
  1137. tmpref: treference;
  1138. valuereg,extra_value_reg: tregister;
  1139. tosreg: tsubsetregister;
  1140. loadsize: tcgsize;
  1141. loadbitsize: byte;
  1142. extra_load: boolean;
  1143. begin
  1144. get_subsetref_load_info(sref,loadsize,extra_load);
  1145. loadbitsize := tcgsize2size[loadsize]*8;
  1146. { load the (first part) of the bit sequence }
  1147. valuereg := getintregister(list,OS_INT);
  1148. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1149. if not extra_load then
  1150. begin
  1151. { everything is guaranteed to be in a single register of loadsize }
  1152. if (sref.bitindexreg = NR_NO) then
  1153. begin
  1154. { use subsetreg routine, it may have been overridden with an optimized version }
  1155. tosreg.subsetreg := valuereg;
  1156. tosreg.subsetregsize := OS_INT;
  1157. { subsetregs always count bits from right to left }
  1158. if (target_info.endian = endian_big) then
  1159. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1160. else
  1161. tosreg.startbit := sref.startbit;
  1162. tosreg.bitlen := sref.bitlen;
  1163. a_load_subsetreg_reg(list,subsetsize,tosize,tosreg,destreg);
  1164. exit;
  1165. end
  1166. else
  1167. begin
  1168. if (sref.startbit <> 0) then
  1169. internalerror(2006081510);
  1170. if (target_info.endian = endian_big) then
  1171. begin
  1172. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1173. if (subsetsize in [OS_S8..OS_S128]) then
  1174. begin
  1175. { sign extend to entire register }
  1176. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1177. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1178. end
  1179. else
  1180. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1181. end
  1182. else
  1183. begin
  1184. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1185. if (subsetsize in [OS_S8..OS_S128]) then
  1186. begin
  1187. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1188. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1189. end
  1190. end;
  1191. { mask other bits/sign extend }
  1192. if not(subsetsize in [OS_S8..OS_S128]) then
  1193. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1194. end
  1195. end
  1196. else
  1197. begin
  1198. { load next value as well }
  1199. extra_value_reg := getintregister(list,OS_INT);
  1200. tmpref := sref.ref;
  1201. inc(tmpref.offset,loadbitsize div 8);
  1202. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1203. if (sref.bitindexreg = NR_NO) then
  1204. { can be overridden to optimize }
  1205. a_load_subsetref_regs_noindex(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg)
  1206. else
  1207. begin
  1208. if (sref.startbit <> 0) then
  1209. internalerror(2006080610);
  1210. a_load_subsetref_regs_index(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg);
  1211. end;
  1212. end;
  1213. { store in destination }
  1214. { avoid unnecessary sign extension and zeroing }
  1215. valuereg := makeregsize(list,valuereg,OS_INT);
  1216. destreg := makeregsize(list,destreg,OS_INT);
  1217. a_load_reg_reg(list,OS_INT,OS_INT,valuereg,destreg);
  1218. destreg := makeregsize(list,destreg,tosize);
  1219. end;
  1220. procedure tcg.a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  1221. begin
  1222. a_load_regconst_subsetref_intern(list,fromsize,subsetsize,fromreg,sref,SL_REG);
  1223. end;
  1224. procedure tcg.a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt);
  1225. var
  1226. tmpreg, tmpindexreg, valuereg, extra_value_reg, maskreg: tregister;
  1227. tosreg, fromsreg: tsubsetregister;
  1228. tmpref: treference;
  1229. bitmask: aword;
  1230. loadsize: tcgsize;
  1231. loadbitsize: byte;
  1232. extra_load: boolean;
  1233. begin
  1234. { the register must be able to contain the requested value }
  1235. if (tcgsize2size[fromsize]*8 < sref.bitlen) then
  1236. internalerror(2006081613);
  1237. get_subsetref_load_info(sref,loadsize,extra_load);
  1238. loadbitsize := tcgsize2size[loadsize]*8;
  1239. { load the (first part) of the bit sequence }
  1240. valuereg := getintregister(list,OS_INT);
  1241. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1242. { constant offset of bit sequence? }
  1243. if not extra_load then
  1244. begin
  1245. if (sref.bitindexreg = NR_NO) then
  1246. begin
  1247. { use subsetreg routine, it may have been overridden with an optimized version }
  1248. tosreg.subsetreg := valuereg;
  1249. tosreg.subsetregsize := OS_INT;
  1250. { subsetregs always count bits from right to left }
  1251. if (target_info.endian = endian_big) then
  1252. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1253. else
  1254. tosreg.startbit := sref.startbit;
  1255. tosreg.bitlen := sref.bitlen;
  1256. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1257. end
  1258. else
  1259. begin
  1260. if (sref.startbit <> 0) then
  1261. internalerror(2006081710);
  1262. { should be handled by normal code and will give wrong result }
  1263. { on x86 for the '1 shl bitlen' below }
  1264. if (sref.bitlen = AIntBits) then
  1265. internalerror(2006081711);
  1266. { zero the bits we have to insert }
  1267. if (slopt <> SL_SETMAX) then
  1268. begin
  1269. maskreg := getintregister(list,OS_INT);
  1270. if (target_info.endian = endian_big) then
  1271. begin
  1272. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen),maskreg);
  1273. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1274. end
  1275. else
  1276. begin
  1277. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1278. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1279. end;
  1280. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1281. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1282. end;
  1283. { insert the value }
  1284. if (slopt <> SL_SETZERO) then
  1285. begin
  1286. tmpreg := getintregister(list,OS_INT);
  1287. if (slopt <> SL_SETMAX) then
  1288. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1289. else if (sref.bitlen <> AIntBits) then
  1290. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1291. else
  1292. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1293. if (target_info.endian = endian_big) then
  1294. begin
  1295. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1296. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1297. begin
  1298. if (loadbitsize <> AIntBits) then
  1299. bitmask := (((aword(1) shl loadbitsize)-1) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1))
  1300. else
  1301. bitmask := (high(aword) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1));
  1302. a_op_const_reg(list,OP_AND,OS_INT,bitmask,tmpreg);
  1303. end;
  1304. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1305. end
  1306. else
  1307. begin
  1308. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1309. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1310. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1311. end;
  1312. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1313. end;
  1314. end;
  1315. { store back to memory }
  1316. valuereg := makeregsize(list,valuereg,loadsize);
  1317. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1318. exit;
  1319. end
  1320. else
  1321. begin
  1322. { load next value }
  1323. extra_value_reg := getintregister(list,OS_INT);
  1324. tmpref := sref.ref;
  1325. inc(tmpref.offset,loadbitsize div 8);
  1326. { should maybe be taken out too, can be done more efficiently }
  1327. { on e.g. i386 with shld/shrd }
  1328. if (sref.bitindexreg = NR_NO) then
  1329. begin
  1330. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1331. fromsreg.subsetreg := fromreg;
  1332. fromsreg.subsetregsize := fromsize;
  1333. tosreg.subsetreg := valuereg;
  1334. tosreg.subsetregsize := OS_INT;
  1335. { transfer first part }
  1336. fromsreg.bitlen := loadbitsize-sref.startbit;
  1337. tosreg.bitlen := fromsreg.bitlen;
  1338. if (target_info.endian = endian_big) then
  1339. begin
  1340. { valuereg must contain the upper bits of the value at bits [0..loadbitsize-startbit] }
  1341. { upper bits of the value ... }
  1342. fromsreg.startbit := sref.bitlen-(loadbitsize-sref.startbit);
  1343. { ... to bit 0 }
  1344. tosreg.startbit := 0
  1345. end
  1346. else
  1347. begin
  1348. { valuereg must contain the lower bits of the value at bits [startbit..loadbitsize] }
  1349. { lower bits of the value ... }
  1350. fromsreg.startbit := 0;
  1351. { ... to startbit }
  1352. tosreg.startbit := sref.startbit;
  1353. end;
  1354. case slopt of
  1355. SL_SETZERO,
  1356. SL_SETMAX:
  1357. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1358. else
  1359. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1360. end;
  1361. valuereg := makeregsize(list,valuereg,loadsize);
  1362. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1363. { transfer second part }
  1364. if (target_info.endian = endian_big) then
  1365. begin
  1366. { extra_value_reg must contain the lower bits of the value at bits }
  1367. { [(loadbitsize-(bitlen-(loadbitsize-startbit)))..loadbitsize] }
  1368. { (loadbitsize-(bitlen-(loadbitsize-startbit))) = 2*loadbitsize }
  1369. { - bitlen - startbit }
  1370. fromsreg.startbit := 0;
  1371. tosreg.startbit := 2*loadbitsize - sref.bitlen - sref.startbit
  1372. end
  1373. else
  1374. begin
  1375. { extra_value_reg must contain the upper bits of the value at bits [0..bitlen-(loadbitsize-startbit)] }
  1376. fromsreg.startbit := fromsreg.bitlen;
  1377. tosreg.startbit := 0;
  1378. end;
  1379. tosreg.subsetreg := extra_value_reg;
  1380. fromsreg.bitlen := sref.bitlen-fromsreg.bitlen;
  1381. tosreg.bitlen := fromsreg.bitlen;
  1382. case slopt of
  1383. SL_SETZERO,
  1384. SL_SETMAX:
  1385. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1386. else
  1387. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1388. end;
  1389. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1390. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1391. exit;
  1392. end
  1393. else
  1394. begin
  1395. if (sref.startbit <> 0) then
  1396. internalerror(2006081812);
  1397. { should be handled by normal code and will give wrong result }
  1398. { on x86 for the '1 shl bitlen' below }
  1399. if (sref.bitlen = AIntBits) then
  1400. internalerror(2006081713);
  1401. { generate mask to zero the bits we have to insert }
  1402. if (slopt <> SL_SETMAX) then
  1403. begin
  1404. maskreg := getintregister(list,OS_INT);
  1405. if (target_info.endian = endian_big) then
  1406. begin
  1407. a_load_const_reg(list,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),maskreg);
  1408. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1409. end
  1410. else
  1411. begin
  1412. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1413. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1414. end;
  1415. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1416. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1417. end;
  1418. { insert the value }
  1419. if (slopt <> SL_SETZERO) then
  1420. begin
  1421. tmpreg := getintregister(list,OS_INT);
  1422. if (slopt <> SL_SETMAX) then
  1423. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1424. else if (sref.bitlen <> AIntBits) then
  1425. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1426. else
  1427. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1428. if (target_info.endian = endian_big) then
  1429. begin
  1430. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1431. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1432. { mask left over bits }
  1433. a_op_const_reg(list,OP_AND,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),tmpreg);
  1434. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1435. end
  1436. else
  1437. begin
  1438. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1439. { mask left over bits }
  1440. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1441. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1442. end;
  1443. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1444. end;
  1445. valuereg := makeregsize(list,valuereg,loadsize);
  1446. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1447. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1448. tmpindexreg := getintregister(list,OS_INT);
  1449. { load current array value }
  1450. if (slopt <> SL_SETZERO) then
  1451. begin
  1452. tmpreg := getintregister(list,OS_INT);
  1453. if (slopt <> SL_SETMAX) then
  1454. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1455. else if (sref.bitlen <> AIntBits) then
  1456. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1457. else
  1458. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1459. end;
  1460. { generate mask to zero the bits we have to insert }
  1461. if (slopt <> SL_SETMAX) then
  1462. begin
  1463. maskreg := getintregister(list,OS_INT);
  1464. if (target_info.endian = endian_big) then
  1465. begin
  1466. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
  1467. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1468. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1469. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1470. {$ifdef sparc}
  1471. { on sparc, "shr X" = "shr (X and (bitsize-1))" -> fix so shr (x>32) = 0 }
  1472. if (loadbitsize = AIntBits) then
  1473. begin
  1474. { if (tmpindexreg >= cpu_bit_size) then tmpreg := 1 else tmpreg := 0 }
  1475. a_op_const_reg_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpindexreg,valuereg);
  1476. { if (tmpindexreg = cpu_bit_size) then maskreg := 0 else maskreg := -1 }
  1477. a_op_const_reg(list,OP_SUB,OS_INT,1,valuereg);
  1478. { if (tmpindexreg = cpu_bit_size) then maskreg := 0 }
  1479. if (slopt <> SL_SETZERO) then
  1480. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,tmpreg);
  1481. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,maskreg);
  1482. end;
  1483. {$endif sparc}
  1484. end
  1485. else
  1486. begin
  1487. { Y-x = -(Y-x) }
  1488. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
  1489. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1490. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1491. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
  1492. {$ifdef x86}
  1493. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1494. if (loadbitsize = AIntBits) then
  1495. begin
  1496. valuereg := getintregister(list,OS_INT);
  1497. { if (tmpindexreg >= cpu_bit_size) then valuereg := 1 else valuereg := 0 }
  1498. a_op_const_reg_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpindexreg,valuereg);
  1499. { if (tmpindexreg = cpu_bit_size) then valuereg := 0 else valuereg := -1 }
  1500. a_op_const_reg(list,OP_SUB,OS_INT,1,valuereg);
  1501. { if (tmpindexreg = cpu_bit_size) then tmpreg := maskreg := 0 }
  1502. if (slopt <> SL_SETZERO) then
  1503. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,tmpreg);
  1504. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,maskreg);
  1505. end;
  1506. {$endif x86}
  1507. end;
  1508. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1509. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,extra_value_reg);
  1510. end;
  1511. if (slopt <> SL_SETZERO) then
  1512. begin
  1513. if (target_info.endian = endian_big) then
  1514. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg)
  1515. else
  1516. begin
  1517. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1518. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1519. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
  1520. end;
  1521. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);
  1522. end;
  1523. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1524. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1525. end;
  1526. end;
  1527. end;
  1528. procedure tcg.a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference);
  1529. var
  1530. tmpreg: tregister;
  1531. begin
  1532. tmpreg := getintregister(list,tosubsetsize);
  1533. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1534. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1535. end;
  1536. procedure tcg.a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference);
  1537. var
  1538. tmpreg: tregister;
  1539. begin
  1540. tmpreg := getintregister(list,tosize);
  1541. a_load_subsetref_reg(list,subsetsize,tosize,sref,tmpreg);
  1542. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1543. end;
  1544. procedure tcg.a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference);
  1545. var
  1546. tmpreg: tregister;
  1547. begin
  1548. tmpreg := getintregister(list,subsetsize);
  1549. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1550. a_load_reg_subsetref(list,subsetsize,subsetsize,tmpreg,sref);
  1551. end;
  1552. procedure tcg.a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference);
  1553. var
  1554. tmpreg: tregister;
  1555. slopt: tsubsetloadopt;
  1556. begin
  1557. { perform masking of the source value in advance }
  1558. slopt := SL_REGNOSRCMASK;
  1559. if (sref.bitlen <> AIntBits) then
  1560. aword(a) := aword(a) and ((aword(1) shl sref.bitlen) -1);
  1561. if (
  1562. { broken x86 "x shl regbitsize = x" }
  1563. ((sref.bitlen <> AIntBits) and
  1564. ((aword(a) and ((aword(1) shl sref.bitlen) -1)) = (aword(1) shl sref.bitlen) -1)) or
  1565. ((sref.bitlen = AIntBits) and
  1566. (a = -1))
  1567. ) then
  1568. slopt := SL_SETMAX
  1569. else if (a = 0) then
  1570. slopt := SL_SETZERO;
  1571. tmpreg := getintregister(list,subsetsize);
  1572. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1573. a_load_const_reg(list,subsetsize,a,tmpreg);
  1574. a_load_regconst_subsetref_intern(list,subsetsize,subsetsize,tmpreg,sref,slopt);
  1575. end;
  1576. procedure tcg.a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation);
  1577. begin
  1578. case loc.loc of
  1579. LOC_REFERENCE,LOC_CREFERENCE:
  1580. a_load_subsetref_ref(list,subsetsize,loc.size,sref,loc.reference);
  1581. LOC_REGISTER,LOC_CREGISTER:
  1582. a_load_subsetref_reg(list,subsetsize,loc.size,sref,loc.register);
  1583. LOC_SUBSETREG,LOC_CSUBSETREG:
  1584. a_load_subsetref_subsetreg(list,subsetsize,loc.size,sref,loc.sreg);
  1585. LOC_SUBSETREF,LOC_CSUBSETREF:
  1586. a_load_subsetref_subsetref(list,subsetsize,loc.size,sref,loc.sref);
  1587. else
  1588. internalerror(200608054);
  1589. end;
  1590. end;
  1591. procedure tcg.a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
  1592. var
  1593. tmpreg: tregister;
  1594. begin
  1595. tmpreg := getintregister(list,tosubsetsize);
  1596. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1597. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1598. end;
  1599. procedure tcg.a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
  1600. var
  1601. tmpreg: tregister;
  1602. begin
  1603. tmpreg := getintregister(list,tosubsetsize);
  1604. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1605. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1606. end;
  1607. {$ifdef rangeon}
  1608. {$r+}
  1609. {$undef rangeon}
  1610. {$endif}
  1611. {$ifdef overflowon}
  1612. {$q+}
  1613. {$undef overflowon}
  1614. {$endif}
  1615. { generic bit address calculation routines }
  1616. function tcg.get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  1617. begin
  1618. result.ref:=ref;
  1619. inc(result.ref.offset,bitnumber div 8);
  1620. result.bitindexreg:=NR_NO;
  1621. result.startbit:=bitnumber mod 8;
  1622. result.bitlen:=1;
  1623. end;
  1624. function tcg.get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  1625. begin
  1626. result.subsetreg:=setreg;
  1627. result.subsetregsize:=setregsize;
  1628. { subsetregs always count from the least significant to the most significant bit }
  1629. if (target_info.endian=endian_big) then
  1630. result.startbit:=(tcgsize2size[setregsize]*8)-bitnumber-1
  1631. else
  1632. result.startbit:=bitnumber;
  1633. result.bitlen:=1;
  1634. end;
  1635. function tcg.get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  1636. var
  1637. tmpreg,
  1638. tmpaddrreg: tregister;
  1639. begin
  1640. result.ref:=ref;
  1641. result.startbit:=0;
  1642. result.bitlen:=1;
  1643. tmpreg:=getintregister(list,bitnumbersize);
  1644. a_op_const_reg_reg(list,OP_SHR,bitnumbersize,3,bitnumber,tmpreg);
  1645. tmpaddrreg:=getaddressregister(list);
  1646. a_load_reg_reg(list,bitnumbersize,OS_ADDR,tmpreg,tmpaddrreg);
  1647. if (result.ref.base=NR_NO) then
  1648. result.ref.base:=tmpaddrreg
  1649. else if (result.ref.index=NR_NO) then
  1650. result.ref.index:=tmpaddrreg
  1651. else
  1652. begin
  1653. a_op_reg_reg(list,OP_ADD,OS_ADDR,result.ref.index,tmpaddrreg);
  1654. result.ref.index:=tmpaddrreg;
  1655. end;
  1656. tmpreg:=getintregister(list,OS_INT);
  1657. a_op_const_reg_reg(list,OP_AND,OS_INT,7,bitnumber,tmpreg);
  1658. result.bitindexreg:=tmpreg;
  1659. end;
  1660. { bit testing routines }
  1661. procedure tcg.a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister);
  1662. var
  1663. tmpvalue: tregister;
  1664. begin
  1665. tmpvalue:=getintregister(list,valuesize);
  1666. if (target_info.endian=endian_little) then
  1667. begin
  1668. { rotate value register "bitnumber" bits to the right }
  1669. a_op_reg_reg_reg(list,OP_SHR,valuesize,bitnumber,value,tmpvalue);
  1670. { extract the bit we want }
  1671. a_op_const_reg(list,OP_AND,valuesize,1,tmpvalue);
  1672. end
  1673. else
  1674. begin
  1675. { highest (leftmost) bit = bit 0 -> shl bitnumber results in wanted }
  1676. { bit in uppermost position, then move it to the lowest position }
  1677. { "and" is not necessary since combination of shl/shr will clear }
  1678. { all other bits }
  1679. a_op_reg_reg_reg(list,OP_SHL,valuesize,bitnumber,value,tmpvalue);
  1680. a_op_const_reg(list,OP_SHR,valuesize,tcgsize2size[valuesize]*8-1,tmpvalue);
  1681. end;
  1682. a_load_reg_reg(list,valuesize,destsize,tmpvalue,destreg);
  1683. end;
  1684. procedure tcg.a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister);
  1685. begin
  1686. a_load_subsetref_reg(list,OS_8,destsize,get_bit_const_ref_sref(bitnumber,ref),destreg);
  1687. end;
  1688. procedure tcg.a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister);
  1689. begin
  1690. a_load_subsetreg_reg(list,setregsize,destsize,get_bit_const_reg_sreg(setregsize,bitnumber,setreg),destreg);
  1691. end;
  1692. procedure tcg.a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister);
  1693. var
  1694. tmpsreg: tsubsetregister;
  1695. begin
  1696. { the first parameter is used to calculate the bit offset in }
  1697. { case of big endian, and therefore must be the size of the }
  1698. { set and not of the whole subsetreg }
  1699. tmpsreg:=get_bit_const_reg_sreg(setregsize,bitnumber,setreg.subsetreg);
  1700. { now fix the size of the subsetreg }
  1701. tmpsreg.subsetregsize:=setreg.subsetregsize;
  1702. { correct offset of the set in the subsetreg }
  1703. inc(tmpsreg.startbit,setreg.startbit);
  1704. a_load_subsetreg_reg(list,setregsize,destsize,tmpsreg,destreg);
  1705. end;
  1706. procedure tcg.a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister);
  1707. begin
  1708. a_load_subsetref_reg(list,OS_8,destsize,get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref),destreg);
  1709. end;
  1710. procedure tcg.a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  1711. var
  1712. tmpreg: tregister;
  1713. begin
  1714. case loc.loc of
  1715. LOC_REFERENCE,LOC_CREFERENCE:
  1716. a_bit_test_reg_ref_reg(list,bitnumbersize,destsize,bitnumber,loc.reference,destreg);
  1717. LOC_REGISTER,LOC_CREGISTER,
  1718. LOC_SUBSETREG,LOC_CSUBSETREG,
  1719. LOC_CONSTANT:
  1720. begin
  1721. case loc.loc of
  1722. LOC_REGISTER,LOC_CREGISTER:
  1723. tmpreg:=loc.register;
  1724. LOC_SUBSETREG,LOC_CSUBSETREG:
  1725. begin
  1726. tmpreg:=getintregister(list,loc.size);
  1727. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1728. end;
  1729. LOC_CONSTANT:
  1730. begin
  1731. tmpreg:=getintregister(list,loc.size);
  1732. a_load_const_reg(list,loc.size,loc.value,tmpreg);
  1733. end;
  1734. end;
  1735. a_bit_test_reg_reg_reg(list,bitnumbersize,loc.size,destsize,bitnumber,tmpreg,destreg);
  1736. end;
  1737. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1738. else
  1739. internalerror(2007051701);
  1740. end;
  1741. end;
  1742. procedure tcg.a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  1743. begin
  1744. case loc.loc of
  1745. LOC_REFERENCE,LOC_CREFERENCE:
  1746. a_bit_test_const_ref_reg(list,destsize,bitnumber,loc.reference,destreg);
  1747. LOC_REGISTER,LOC_CREGISTER:
  1748. a_bit_test_const_reg_reg(list,loc.size,destsize,bitnumber,loc.register,destreg);
  1749. LOC_SUBSETREG,LOC_CSUBSETREG:
  1750. a_bit_test_const_subsetreg_reg(list,loc.size,destsize,bitnumber,loc.sreg,destreg);
  1751. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1752. else
  1753. internalerror(2007051702);
  1754. end;
  1755. end;
  1756. { bit setting/clearing routines }
  1757. procedure tcg.a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister);
  1758. var
  1759. tmpvalue: tregister;
  1760. begin
  1761. tmpvalue:=getintregister(list,destsize);
  1762. if (target_info.endian=endian_little) then
  1763. begin
  1764. a_load_const_reg(list,destsize,1,tmpvalue);
  1765. { rotate bit "bitnumber" bits to the left }
  1766. a_op_reg_reg(list,OP_SHL,destsize,bitnumber,tmpvalue);
  1767. end
  1768. else
  1769. begin
  1770. { highest (leftmost) bit = bit 0 -> "$80/$8000/$80000000/ ... }
  1771. { shr bitnumber" results in correct mask }
  1772. a_load_const_reg(list,destsize,1 shl (tcgsize2size[destsize]*8-1),tmpvalue);
  1773. a_op_reg_reg(list,OP_SHR,destsize,bitnumber,tmpvalue);
  1774. end;
  1775. { set/clear the bit we want }
  1776. if (doset) then
  1777. a_op_reg_reg(list,OP_OR,destsize,tmpvalue,dest)
  1778. else
  1779. begin
  1780. a_op_reg_reg(list,OP_NOT,destsize,tmpvalue,tmpvalue);
  1781. a_op_reg_reg(list,OP_AND,destsize,tmpvalue,dest)
  1782. end;
  1783. end;
  1784. procedure tcg.a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference);
  1785. begin
  1786. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_const_ref_sref(bitnumber,ref));
  1787. end;
  1788. procedure tcg.a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister);
  1789. begin
  1790. a_load_const_subsetreg(list,OS_8,ord(doset),get_bit_const_reg_sreg(destsize,bitnumber,destreg));
  1791. end;
  1792. procedure tcg.a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister);
  1793. var
  1794. tmpsreg: tsubsetregister;
  1795. begin
  1796. { the first parameter is used to calculate the bit offset in }
  1797. { case of big endian, and therefore must be the size of the }
  1798. { set and not of the whole subsetreg }
  1799. tmpsreg:=get_bit_const_reg_sreg(destsize,bitnumber,destreg.subsetreg);
  1800. { now fix the size of the subsetreg }
  1801. tmpsreg.subsetregsize:=destreg.subsetregsize;
  1802. { correct offset of the set in the subsetreg }
  1803. inc(tmpsreg.startbit,destreg.startbit);
  1804. a_load_const_subsetreg(list,OS_8,ord(doset),tmpsreg);
  1805. end;
  1806. procedure tcg.a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference);
  1807. begin
  1808. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref));
  1809. end;
  1810. procedure tcg.a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  1811. var
  1812. tmpreg: tregister;
  1813. begin
  1814. case loc.loc of
  1815. LOC_REFERENCE:
  1816. a_bit_set_reg_ref(list,doset,bitnumbersize,bitnumber,loc.reference);
  1817. LOC_CREGISTER:
  1818. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,loc.register);
  1819. { e.g. a 2-byte set in a record regvar }
  1820. LOC_CSUBSETREG:
  1821. begin
  1822. { hard to do in-place in a generic way, so operate on a copy }
  1823. tmpreg:=getintregister(list,loc.size);
  1824. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1825. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,tmpreg);
  1826. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  1827. end;
  1828. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1829. else
  1830. internalerror(2007051703)
  1831. end;
  1832. end;
  1833. procedure tcg.a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  1834. begin
  1835. case loc.loc of
  1836. LOC_REFERENCE:
  1837. a_bit_set_const_ref(list,doset,loc.size,bitnumber,loc.reference);
  1838. LOC_CREGISTER:
  1839. a_bit_set_const_reg(list,doset,loc.size,bitnumber,loc.register);
  1840. LOC_CSUBSETREG:
  1841. a_bit_set_const_subsetreg(list,doset,loc.size,bitnumber,loc.sreg);
  1842. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1843. else
  1844. internalerror(2007051704)
  1845. end;
  1846. end;
  1847. { memory/register loading }
  1848. procedure tcg.a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);
  1849. var
  1850. tmpref : treference;
  1851. tmpreg : tregister;
  1852. i : longint;
  1853. begin
  1854. if ref.alignment<>0 then
  1855. begin
  1856. tmpref:=ref;
  1857. { we take care of the alignment now }
  1858. tmpref.alignment:=0;
  1859. case FromSize of
  1860. OS_16,OS_S16:
  1861. begin
  1862. tmpreg:=getintregister(list,OS_16);
  1863. a_load_reg_reg(list,fromsize,OS_16,register,tmpreg);
  1864. if target_info.endian=endian_big then
  1865. inc(tmpref.offset);
  1866. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1867. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1868. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1869. a_op_const_reg(list,OP_SHR,OS_16,8,tmpreg);
  1870. if target_info.endian=endian_big then
  1871. dec(tmpref.offset)
  1872. else
  1873. inc(tmpref.offset);
  1874. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1875. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1876. end;
  1877. OS_32,OS_S32:
  1878. begin
  1879. tmpreg:=getintregister(list,OS_32);
  1880. a_load_reg_reg(list,fromsize,OS_32,register,tmpreg);
  1881. if target_info.endian=endian_big then
  1882. inc(tmpref.offset,3);
  1883. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1884. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1885. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1886. for i:=1 to 3 do
  1887. begin
  1888. a_op_const_reg(list,OP_SHR,OS_32,8,tmpreg);
  1889. if target_info.endian=endian_big then
  1890. dec(tmpref.offset)
  1891. else
  1892. inc(tmpref.offset);
  1893. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1894. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1895. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1896. end;
  1897. end
  1898. else
  1899. a_load_reg_ref(list,fromsize,tosize,register,tmpref);
  1900. end;
  1901. end
  1902. else
  1903. a_load_reg_ref(list,fromsize,tosize,register,ref);
  1904. end;
  1905. procedure tcg.a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);
  1906. var
  1907. tmpref : treference;
  1908. tmpreg,
  1909. tmpreg2 : tregister;
  1910. i : longint;
  1911. begin
  1912. if ref.alignment<>0 then
  1913. begin
  1914. tmpref:=ref;
  1915. { we take care of the alignment now }
  1916. tmpref.alignment:=0;
  1917. case FromSize of
  1918. OS_16,OS_S16:
  1919. begin
  1920. { first load in tmpreg, because the target register }
  1921. { may be used in ref as well }
  1922. if target_info.endian=endian_little then
  1923. inc(tmpref.offset);
  1924. tmpreg:=getintregister(list,OS_8);
  1925. a_load_ref_reg(list,OS_8,OS_8,tmpref,tmpreg);
  1926. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1927. a_op_const_reg(list,OP_SHL,OS_16,8,tmpreg);
  1928. if target_info.endian=endian_little then
  1929. dec(tmpref.offset)
  1930. else
  1931. inc(tmpref.offset);
  1932. a_load_ref_reg(list,OS_8,OS_16,tmpref,register);
  1933. a_op_reg_reg(list,OP_OR,OS_16,tmpreg,register);
  1934. end;
  1935. OS_32,OS_S32:
  1936. begin
  1937. if target_info.endian=endian_little then
  1938. inc(tmpref.offset,3);
  1939. tmpreg:=getintregister(list,OS_32);
  1940. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg);
  1941. tmpreg2:=getintregister(list,OS_32);
  1942. for i:=1 to 3 do
  1943. begin
  1944. a_op_const_reg(list,OP_SHL,OS_32,8,tmpreg);
  1945. if target_info.endian=endian_little then
  1946. dec(tmpref.offset)
  1947. else
  1948. inc(tmpref.offset);
  1949. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg2);
  1950. a_op_reg_reg(list,OP_OR,OS_32,tmpreg2,tmpreg);
  1951. end;
  1952. a_load_reg_reg(list,OS_32,OS_32,tmpreg,register);
  1953. end
  1954. else
  1955. a_load_ref_reg(list,fromsize,tosize,tmpref,register);
  1956. end;
  1957. end
  1958. else
  1959. a_load_ref_reg(list,fromsize,tosize,ref,register);
  1960. end;
  1961. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  1962. var
  1963. tmpreg: tregister;
  1964. begin
  1965. { verify if we have the same reference }
  1966. if references_equal(sref,dref) then
  1967. exit;
  1968. tmpreg:=getintregister(list,tosize);
  1969. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  1970. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  1971. end;
  1972. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);
  1973. var
  1974. tmpreg: tregister;
  1975. begin
  1976. tmpreg:=getintregister(list,size);
  1977. a_load_const_reg(list,size,a,tmpreg);
  1978. a_load_reg_ref(list,size,size,tmpreg,ref);
  1979. end;
  1980. procedure tcg.a_load_const_loc(list : TAsmList;a : aint;const loc: tlocation);
  1981. begin
  1982. case loc.loc of
  1983. LOC_REFERENCE,LOC_CREFERENCE:
  1984. a_load_const_ref(list,loc.size,a,loc.reference);
  1985. LOC_REGISTER,LOC_CREGISTER:
  1986. a_load_const_reg(list,loc.size,a,loc.register);
  1987. LOC_SUBSETREG,LOC_CSUBSETREG:
  1988. a_load_const_subsetreg(list,loc.size,a,loc.sreg);
  1989. LOC_SUBSETREF,LOC_CSUBSETREF:
  1990. a_load_const_subsetref(list,loc.size,a,loc.sref);
  1991. else
  1992. internalerror(200203272);
  1993. end;
  1994. end;
  1995. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  1996. begin
  1997. case loc.loc of
  1998. LOC_REFERENCE,LOC_CREFERENCE:
  1999. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  2000. LOC_REGISTER,LOC_CREGISTER:
  2001. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  2002. LOC_SUBSETREG,LOC_CSUBSETREG:
  2003. a_load_reg_subsetreg(list,fromsize,loc.size,reg,loc.sreg);
  2004. LOC_SUBSETREF,LOC_CSUBSETREF:
  2005. a_load_reg_subsetref(list,fromsize,loc.size,reg,loc.sref);
  2006. else
  2007. internalerror(200203271);
  2008. end;
  2009. end;
  2010. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  2011. begin
  2012. case loc.loc of
  2013. LOC_REFERENCE,LOC_CREFERENCE:
  2014. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2015. LOC_REGISTER,LOC_CREGISTER:
  2016. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  2017. LOC_CONSTANT:
  2018. a_load_const_reg(list,tosize,loc.value,reg);
  2019. LOC_SUBSETREG,LOC_CSUBSETREG:
  2020. a_load_subsetreg_reg(list,loc.size,tosize,loc.sreg,reg);
  2021. LOC_SUBSETREF,LOC_CSUBSETREF:
  2022. a_load_subsetref_reg(list,loc.size,tosize,loc.sref,reg);
  2023. else
  2024. internalerror(200109092);
  2025. end;
  2026. end;
  2027. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  2028. begin
  2029. case loc.loc of
  2030. LOC_REFERENCE,LOC_CREFERENCE:
  2031. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  2032. LOC_REGISTER,LOC_CREGISTER:
  2033. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  2034. LOC_CONSTANT:
  2035. a_load_const_ref(list,tosize,loc.value,ref);
  2036. LOC_SUBSETREG,LOC_CSUBSETREG:
  2037. a_load_subsetreg_ref(list,loc.size,tosize,loc.sreg,ref);
  2038. LOC_SUBSETREF,LOC_CSUBSETREF:
  2039. a_load_subsetref_ref(list,loc.size,tosize,loc.sref,ref);
  2040. else
  2041. internalerror(200109302);
  2042. end;
  2043. end;
  2044. procedure tcg.a_load_loc_subsetreg(list : TAsmList; subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  2045. begin
  2046. case loc.loc of
  2047. LOC_REFERENCE,LOC_CREFERENCE:
  2048. a_load_ref_subsetreg(list,loc.size,subsetsize,loc.reference,sreg);
  2049. LOC_REGISTER,LOC_CREGISTER:
  2050. a_load_reg_subsetreg(list,loc.size,subsetsize,loc.register,sreg);
  2051. LOC_CONSTANT:
  2052. a_load_const_subsetreg(list,subsetsize,loc.value,sreg);
  2053. LOC_SUBSETREG,LOC_CSUBSETREG:
  2054. a_load_subsetreg_subsetreg(list,loc.size,subsetsize,loc.sreg,sreg);
  2055. LOC_SUBSETREF,LOC_CSUBSETREF:
  2056. a_load_subsetref_subsetreg(list,loc.size,subsetsize,loc.sref,sreg);
  2057. else
  2058. internalerror(2006052310);
  2059. end;
  2060. end;
  2061. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation);
  2062. begin
  2063. case loc.loc of
  2064. LOC_REFERENCE,LOC_CREFERENCE:
  2065. a_load_subsetreg_ref(list,subsetsize,loc.size,sreg,loc.reference);
  2066. LOC_REGISTER,LOC_CREGISTER:
  2067. a_load_subsetreg_reg(list,subsetsize,loc.size,sreg,loc.register);
  2068. LOC_SUBSETREG,LOC_CSUBSETREG:
  2069. a_load_subsetreg_subsetreg(list,subsetsize,loc.size,sreg,loc.sreg);
  2070. LOC_SUBSETREF,LOC_CSUBSETREF:
  2071. a_load_subsetreg_subsetref(list,subsetsize,loc.size,sreg,loc.sref);
  2072. else
  2073. internalerror(2006051510);
  2074. end;
  2075. end;
  2076. procedure tcg.optimize_op_const(var op: topcg; var a : aint);
  2077. var
  2078. powerval : longint;
  2079. begin
  2080. case op of
  2081. OP_OR :
  2082. begin
  2083. { or with zero returns same result }
  2084. if a = 0 then
  2085. op:=OP_NONE
  2086. else
  2087. { or with max returns max }
  2088. if a = -1 then
  2089. op:=OP_MOVE;
  2090. end;
  2091. OP_AND :
  2092. begin
  2093. { and with max returns same result }
  2094. if (a = -1) then
  2095. op:=OP_NONE
  2096. else
  2097. { and with 0 returns 0 }
  2098. if a=0 then
  2099. op:=OP_MOVE;
  2100. end;
  2101. OP_DIV :
  2102. begin
  2103. { division by 1 returns result }
  2104. if a = 1 then
  2105. op:=OP_NONE
  2106. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2107. begin
  2108. a := powerval;
  2109. op:= OP_SHR;
  2110. end;
  2111. end;
  2112. OP_IDIV:
  2113. begin
  2114. if a = 1 then
  2115. op:=OP_NONE;
  2116. end;
  2117. OP_MUL,OP_IMUL:
  2118. begin
  2119. if a = 1 then
  2120. op:=OP_NONE
  2121. else
  2122. if a=0 then
  2123. op:=OP_MOVE
  2124. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2125. begin
  2126. a := powerval;
  2127. op:= OP_SHL;
  2128. end;
  2129. end;
  2130. OP_ADD,OP_SUB:
  2131. begin
  2132. if a = 0 then
  2133. op:=OP_NONE;
  2134. end;
  2135. OP_SAR,OP_SHL,OP_SHR:
  2136. begin
  2137. if a = 0 then
  2138. op:=OP_NONE;
  2139. end;
  2140. end;
  2141. end;
  2142. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  2143. begin
  2144. case loc.loc of
  2145. LOC_REFERENCE, LOC_CREFERENCE:
  2146. a_loadfpu_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2147. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2148. a_loadfpu_reg_reg(list,loc.size,tosize,loc.register,reg);
  2149. else
  2150. internalerror(200203301);
  2151. end;
  2152. end;
  2153. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  2154. begin
  2155. case loc.loc of
  2156. LOC_REFERENCE, LOC_CREFERENCE:
  2157. a_loadfpu_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  2158. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2159. a_loadfpu_reg_reg(list,fromsize,loc.size,reg,loc.register);
  2160. else
  2161. internalerror(48991);
  2162. end;
  2163. end;
  2164. procedure tcg.a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  2165. var
  2166. reg: tregister;
  2167. regsize: tcgsize;
  2168. begin
  2169. if (fromsize>=tosize) then
  2170. regsize:=fromsize
  2171. else
  2172. regsize:=tosize;
  2173. reg:=getfpuregister(list,regsize);
  2174. a_loadfpu_ref_reg(list,fromsize,regsize,ref1,reg);
  2175. a_loadfpu_reg_ref(list,regsize,tosize,reg,ref2);
  2176. end;
  2177. procedure tcg.a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  2178. var
  2179. ref : treference;
  2180. begin
  2181. case cgpara.location^.loc of
  2182. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2183. begin
  2184. cgpara.check_simple_location;
  2185. a_loadfpu_reg_reg(list,size,size,r,cgpara.location^.register);
  2186. end;
  2187. LOC_REFERENCE,LOC_CREFERENCE:
  2188. begin
  2189. cgpara.check_simple_location;
  2190. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  2191. a_loadfpu_reg_ref(list,size,size,r,ref);
  2192. end;
  2193. LOC_REGISTER,LOC_CREGISTER:
  2194. begin
  2195. { paramfpu_ref does the check_simpe_location check here if necessary }
  2196. tg.GetTemp(list,TCGSize2Size[size],tt_normal,ref);
  2197. a_loadfpu_reg_ref(list,size,size,r,ref);
  2198. a_paramfpu_ref(list,size,ref,cgpara);
  2199. tg.Ungettemp(list,ref);
  2200. end;
  2201. else
  2202. internalerror(2002071004);
  2203. end;
  2204. end;
  2205. procedure tcg.a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  2206. var
  2207. href : treference;
  2208. begin
  2209. cgpara.check_simple_location;
  2210. case cgpara.location^.loc of
  2211. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2212. a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
  2213. LOC_REFERENCE,LOC_CREFERENCE:
  2214. begin
  2215. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  2216. { concatcopy should choose the best way to copy the data }
  2217. g_concatcopy(list,ref,href,tcgsize2size[size]);
  2218. end;
  2219. else
  2220. internalerror(200402201);
  2221. end;
  2222. end;
  2223. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  2224. var
  2225. tmpreg : tregister;
  2226. begin
  2227. tmpreg:=getintregister(list,size);
  2228. a_load_ref_reg(list,size,size,ref,tmpreg);
  2229. a_op_const_reg(list,op,size,a,tmpreg);
  2230. a_load_reg_ref(list,size,size,tmpreg,ref);
  2231. end;
  2232. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister);
  2233. var
  2234. tmpreg: tregister;
  2235. begin
  2236. tmpreg := getintregister(list, size);
  2237. a_load_subsetreg_reg(list,subsetsize,size,sreg,tmpreg);
  2238. a_op_const_reg(list,op,size,a,tmpreg);
  2239. a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
  2240. end;
  2241. procedure tcg.a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference);
  2242. var
  2243. tmpreg: tregister;
  2244. begin
  2245. tmpreg := getintregister(list, size);
  2246. a_load_subsetref_reg(list,subsetsize,size,sref,tmpreg);
  2247. a_op_const_reg(list,op,size,a,tmpreg);
  2248. a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
  2249. end;
  2250. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: aint; const loc: tlocation);
  2251. begin
  2252. case loc.loc of
  2253. LOC_REGISTER, LOC_CREGISTER:
  2254. a_op_const_reg(list,op,loc.size,a,loc.register);
  2255. LOC_REFERENCE, LOC_CREFERENCE:
  2256. a_op_const_ref(list,op,loc.size,a,loc.reference);
  2257. LOC_SUBSETREG, LOC_CSUBSETREG:
  2258. a_op_const_subsetreg(list,op,loc.size,loc.size,a,loc.sreg);
  2259. LOC_SUBSETREF, LOC_CSUBSETREF:
  2260. a_op_const_subsetref(list,op,loc.size,loc.size,a,loc.sref);
  2261. else
  2262. internalerror(200109061);
  2263. end;
  2264. end;
  2265. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  2266. var
  2267. tmpreg : tregister;
  2268. begin
  2269. tmpreg:=getintregister(list,size);
  2270. a_load_ref_reg(list,size,size,ref,tmpreg);
  2271. a_op_reg_reg(list,op,size,reg,tmpreg);
  2272. a_load_reg_ref(list,size,size,tmpreg,ref);
  2273. end;
  2274. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  2275. var
  2276. tmpreg: tregister;
  2277. begin
  2278. case op of
  2279. OP_NOT,OP_NEG:
  2280. { handle it as "load ref,reg; op reg" }
  2281. begin
  2282. a_load_ref_reg(list,size,size,ref,reg);
  2283. a_op_reg_reg(list,op,size,reg,reg);
  2284. end;
  2285. else
  2286. begin
  2287. tmpreg:=getintregister(list,size);
  2288. a_load_ref_reg(list,size,size,ref,tmpreg);
  2289. a_op_reg_reg(list,op,size,tmpreg,reg);
  2290. end;
  2291. end;
  2292. end;
  2293. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister);
  2294. var
  2295. tmpreg: tregister;
  2296. begin
  2297. tmpreg := getintregister(list, opsize);
  2298. a_load_subsetreg_reg(list,subsetsize,opsize,sreg,tmpreg);
  2299. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2300. a_load_reg_subsetreg(list,opsize,subsetsize,tmpreg,sreg);
  2301. end;
  2302. procedure tcg.a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference);
  2303. var
  2304. tmpreg: tregister;
  2305. begin
  2306. tmpreg := getintregister(list, opsize);
  2307. a_load_subsetref_reg(list,subsetsize,opsize,sref,tmpreg);
  2308. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2309. a_load_reg_subsetref(list,opsize,subsetsize,tmpreg,sref);
  2310. end;
  2311. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  2312. begin
  2313. case loc.loc of
  2314. LOC_REGISTER, LOC_CREGISTER:
  2315. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  2316. LOC_REFERENCE, LOC_CREFERENCE:
  2317. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  2318. LOC_SUBSETREG, LOC_CSUBSETREG:
  2319. a_op_reg_subsetreg(list,op,loc.size,loc.size,reg,loc.sreg);
  2320. LOC_SUBSETREF, LOC_CSUBSETREF:
  2321. a_op_reg_subsetref(list,op,loc.size,loc.size,reg,loc.sref);
  2322. else
  2323. internalerror(200109061);
  2324. end;
  2325. end;
  2326. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  2327. var
  2328. tmpreg: tregister;
  2329. begin
  2330. case loc.loc of
  2331. LOC_REGISTER,LOC_CREGISTER:
  2332. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  2333. LOC_REFERENCE,LOC_CREFERENCE:
  2334. begin
  2335. tmpreg:=getintregister(list,loc.size);
  2336. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  2337. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  2338. end;
  2339. LOC_SUBSETREG, LOC_CSUBSETREG:
  2340. begin
  2341. tmpreg:=getintregister(list,loc.size);
  2342. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  2343. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2344. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  2345. end;
  2346. LOC_SUBSETREF, LOC_CSUBSETREF:
  2347. begin
  2348. tmpreg:=getintregister(list,loc.size);
  2349. a_load_subsetreF_reg(list,loc.size,loc.size,loc.sref,tmpreg);
  2350. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2351. a_load_reg_subsetref(list,loc.size,loc.size,tmpreg,loc.sref);
  2352. end;
  2353. else
  2354. internalerror(200109061);
  2355. end;
  2356. end;
  2357. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  2358. a:aint;src,dst:Tregister);
  2359. begin
  2360. a_load_reg_reg(list,size,size,src,dst);
  2361. a_op_const_reg(list,op,size,a,dst);
  2362. end;
  2363. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  2364. size: tcgsize; src1, src2, dst: tregister);
  2365. var
  2366. tmpreg: tregister;
  2367. begin
  2368. if (dst<>src1) then
  2369. begin
  2370. a_load_reg_reg(list,size,size,src2,dst);
  2371. a_op_reg_reg(list,op,size,src1,dst);
  2372. end
  2373. else
  2374. begin
  2375. { can we do a direct operation on the target register ? }
  2376. if op in [OP_ADD,OP_MUL,OP_AND,OP_MOVE,OP_XOR,OP_IMUL,OP_OR] then
  2377. a_op_reg_reg(list,op,size,src2,dst)
  2378. else
  2379. begin
  2380. tmpreg:=getintregister(list,size);
  2381. a_load_reg_reg(list,size,size,src2,tmpreg);
  2382. a_op_reg_reg(list,op,size,src1,tmpreg);
  2383. a_load_reg_reg(list,size,size,tmpreg,dst);
  2384. end;
  2385. end;
  2386. end;
  2387. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2388. begin
  2389. a_op_const_reg_reg(list,op,size,a,src,dst);
  2390. ovloc.loc:=LOC_VOID;
  2391. end;
  2392. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2393. begin
  2394. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  2395. ovloc.loc:=LOC_VOID;
  2396. end;
  2397. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  2398. l : tasmlabel);
  2399. var
  2400. tmpreg: tregister;
  2401. begin
  2402. tmpreg:=getintregister(list,size);
  2403. a_load_ref_reg(list,size,size,ref,tmpreg);
  2404. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2405. end;
  2406. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  2407. l : tasmlabel);
  2408. var
  2409. tmpreg : tregister;
  2410. begin
  2411. case loc.loc of
  2412. LOC_REGISTER,LOC_CREGISTER:
  2413. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  2414. LOC_REFERENCE,LOC_CREFERENCE:
  2415. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  2416. LOC_SUBSETREG, LOC_CSUBSETREG:
  2417. begin
  2418. tmpreg:=getintregister(list,size);
  2419. a_load_subsetreg_reg(list,loc.size,size,loc.sreg,tmpreg);
  2420. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2421. end;
  2422. LOC_SUBSETREF, LOC_CSUBSETREF:
  2423. begin
  2424. tmpreg:=getintregister(list,size);
  2425. a_load_subsetref_reg(list,loc.size,size,loc.sref,tmpreg);
  2426. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2427. end;
  2428. else
  2429. internalerror(200109061);
  2430. end;
  2431. end;
  2432. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  2433. var
  2434. tmpreg: tregister;
  2435. begin
  2436. tmpreg:=getintregister(list,size);
  2437. a_load_ref_reg(list,size,size,ref,tmpreg);
  2438. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  2439. end;
  2440. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  2441. var
  2442. tmpreg: tregister;
  2443. begin
  2444. tmpreg:=getintregister(list,size);
  2445. a_load_ref_reg(list,size,size,ref,tmpreg);
  2446. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  2447. end;
  2448. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  2449. begin
  2450. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  2451. end;
  2452. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  2453. begin
  2454. case loc.loc of
  2455. LOC_REGISTER,
  2456. LOC_CREGISTER:
  2457. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  2458. LOC_REFERENCE,
  2459. LOC_CREFERENCE :
  2460. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  2461. LOC_CONSTANT:
  2462. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  2463. LOC_SUBSETREG,
  2464. LOC_CSUBSETREG:
  2465. a_cmp_subsetreg_reg_label(list,loc.size,size,cmp_op,loc.sreg,reg,l);
  2466. LOC_SUBSETREF,
  2467. LOC_CSUBSETREF:
  2468. a_cmp_subsetref_reg_label(list,loc.size,size,cmp_op,loc.sref,reg,l);
  2469. else
  2470. internalerror(200203231);
  2471. end;
  2472. end;
  2473. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel);
  2474. var
  2475. tmpreg: tregister;
  2476. begin
  2477. tmpreg:=getintregister(list, cmpsize);
  2478. a_load_subsetreg_reg(list,subsetsize,cmpsize,sreg,tmpreg);
  2479. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2480. end;
  2481. procedure tcg.a_cmp_subsetref_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel);
  2482. var
  2483. tmpreg: tregister;
  2484. begin
  2485. tmpreg:=getintregister(list, cmpsize);
  2486. a_load_subsetref_reg(list,subsetsize,cmpsize,sref,tmpreg);
  2487. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2488. end;
  2489. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  2490. l : tasmlabel);
  2491. var
  2492. tmpreg: tregister;
  2493. begin
  2494. case loc.loc of
  2495. LOC_REGISTER,LOC_CREGISTER:
  2496. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  2497. LOC_REFERENCE,LOC_CREFERENCE:
  2498. begin
  2499. tmpreg:=getintregister(list,size);
  2500. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2501. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  2502. end;
  2503. LOC_SUBSETREG, LOC_CSUBSETREG:
  2504. begin
  2505. tmpreg:=getintregister(list, size);
  2506. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2507. a_cmp_subsetreg_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sreg,tmpreg,l);
  2508. end;
  2509. LOC_SUBSETREF, LOC_CSUBSETREF:
  2510. begin
  2511. tmpreg:=getintregister(list, size);
  2512. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2513. a_cmp_subsetref_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sref,tmpreg,l);
  2514. end;
  2515. else
  2516. internalerror(200109061);
  2517. end;
  2518. end;
  2519. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  2520. begin
  2521. case loc.loc of
  2522. LOC_MMREGISTER,LOC_CMMREGISTER:
  2523. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2524. LOC_REFERENCE,LOC_CREFERENCE:
  2525. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  2526. else
  2527. internalerror(200310121);
  2528. end;
  2529. end;
  2530. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  2531. begin
  2532. case loc.loc of
  2533. LOC_MMREGISTER,LOC_CMMREGISTER:
  2534. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  2535. LOC_REFERENCE,LOC_CREFERENCE:
  2536. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  2537. else
  2538. internalerror(200310122);
  2539. end;
  2540. end;
  2541. procedure tcg.a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  2542. var
  2543. href : treference;
  2544. begin
  2545. cgpara.check_simple_location;
  2546. case cgpara.location^.loc of
  2547. LOC_MMREGISTER,LOC_CMMREGISTER:
  2548. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  2549. LOC_REFERENCE,LOC_CREFERENCE:
  2550. begin
  2551. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  2552. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  2553. end
  2554. else
  2555. internalerror(200310123);
  2556. end;
  2557. end;
  2558. procedure tcg.a_parammm_ref(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  2559. var
  2560. hr : tregister;
  2561. hs : tmmshuffle;
  2562. begin
  2563. cgpara.check_simple_location;
  2564. hr:=getmmregister(list,cgpara.location^.size);
  2565. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  2566. if realshuffle(shuffle) then
  2567. begin
  2568. hs:=shuffle^;
  2569. removeshuffles(hs);
  2570. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,@hs);
  2571. end
  2572. else
  2573. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,shuffle);
  2574. end;
  2575. procedure tcg.a_parammm_loc(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  2576. begin
  2577. case loc.loc of
  2578. LOC_MMREGISTER,LOC_CMMREGISTER:
  2579. a_parammm_reg(list,loc.size,loc.register,cgpara,shuffle);
  2580. LOC_REFERENCE,LOC_CREFERENCE:
  2581. a_parammm_ref(list,loc.size,loc.reference,cgpara,shuffle);
  2582. else
  2583. internalerror(200310123);
  2584. end;
  2585. end;
  2586. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  2587. var
  2588. hr : tregister;
  2589. hs : tmmshuffle;
  2590. begin
  2591. hr:=getmmregister(list,size);
  2592. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2593. if realshuffle(shuffle) then
  2594. begin
  2595. hs:=shuffle^;
  2596. removeshuffles(hs);
  2597. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  2598. end
  2599. else
  2600. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  2601. end;
  2602. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  2603. var
  2604. hr : tregister;
  2605. hs : tmmshuffle;
  2606. begin
  2607. hr:=getmmregister(list,size);
  2608. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2609. if realshuffle(shuffle) then
  2610. begin
  2611. hs:=shuffle^;
  2612. removeshuffles(hs);
  2613. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  2614. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  2615. end
  2616. else
  2617. begin
  2618. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  2619. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  2620. end;
  2621. end;
  2622. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  2623. begin
  2624. case loc.loc of
  2625. LOC_CMMREGISTER,LOC_MMREGISTER:
  2626. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  2627. LOC_CREFERENCE,LOC_REFERENCE:
  2628. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  2629. else
  2630. internalerror(200312232);
  2631. end;
  2632. end;
  2633. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  2634. begin
  2635. g_concatcopy(list,source,dest,len);
  2636. end;
  2637. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  2638. var
  2639. cgpara1,cgpara2,cgpara3 : TCGPara;
  2640. begin
  2641. cgpara1.init;
  2642. cgpara2.init;
  2643. cgpara3.init;
  2644. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2645. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2646. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2647. paramanager.allocparaloc(list,cgpara3);
  2648. a_paramaddr_ref(list,dest,cgpara3);
  2649. paramanager.allocparaloc(list,cgpara2);
  2650. a_paramaddr_ref(list,source,cgpara2);
  2651. paramanager.allocparaloc(list,cgpara1);
  2652. a_param_const(list,OS_INT,len,cgpara1);
  2653. paramanager.freeparaloc(list,cgpara3);
  2654. paramanager.freeparaloc(list,cgpara2);
  2655. paramanager.freeparaloc(list,cgpara1);
  2656. allocallcpuregisters(list);
  2657. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  2658. deallocallcpuregisters(list);
  2659. cgpara3.done;
  2660. cgpara2.done;
  2661. cgpara1.done;
  2662. end;
  2663. procedure tcg.g_copyvariant(list : TAsmList;const source,dest : treference);
  2664. var
  2665. cgpara1,cgpara2 : TCGPara;
  2666. begin
  2667. cgpara1.init;
  2668. cgpara2.init;
  2669. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2670. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2671. paramanager.allocparaloc(list,cgpara2);
  2672. a_paramaddr_ref(list,dest,cgpara2);
  2673. paramanager.allocparaloc(list,cgpara1);
  2674. a_paramaddr_ref(list,source,cgpara1);
  2675. paramanager.freeparaloc(list,cgpara2);
  2676. paramanager.freeparaloc(list,cgpara1);
  2677. allocallcpuregisters(list);
  2678. a_call_name(list,'FPC_VARIANT_COPY_OVERWRITE');
  2679. deallocallcpuregisters(list);
  2680. cgpara2.done;
  2681. cgpara1.done;
  2682. end;
  2683. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2684. var
  2685. href : treference;
  2686. incrfunc : string;
  2687. cgpara1,cgpara2 : TCGPara;
  2688. begin
  2689. cgpara1.init;
  2690. cgpara2.init;
  2691. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2692. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2693. if is_interfacecom(t) then
  2694. incrfunc:='FPC_INTF_INCR_REF'
  2695. else if is_ansistring(t) then
  2696. incrfunc:='FPC_ANSISTR_INCR_REF'
  2697. else if is_widestring(t) then
  2698. incrfunc:='FPC_WIDESTR_INCR_REF'
  2699. else if is_dynamic_array(t) then
  2700. incrfunc:='FPC_DYNARRAY_INCR_REF'
  2701. else
  2702. incrfunc:='';
  2703. { call the special incr function or the generic addref }
  2704. if incrfunc<>'' then
  2705. begin
  2706. paramanager.allocparaloc(list,cgpara1);
  2707. { widestrings aren't ref. counted on all platforms so we need the address
  2708. to create a real copy }
  2709. if is_widestring(t) then
  2710. a_paramaddr_ref(list,ref,cgpara1)
  2711. else
  2712. { these functions get the pointer by value }
  2713. a_param_ref(list,OS_ADDR,ref,cgpara1);
  2714. paramanager.freeparaloc(list,cgpara1);
  2715. allocallcpuregisters(list);
  2716. a_call_name(list,incrfunc);
  2717. deallocallcpuregisters(list);
  2718. end
  2719. else
  2720. begin
  2721. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2722. paramanager.allocparaloc(list,cgpara2);
  2723. a_paramaddr_ref(list,href,cgpara2);
  2724. paramanager.allocparaloc(list,cgpara1);
  2725. a_paramaddr_ref(list,ref,cgpara1);
  2726. paramanager.freeparaloc(list,cgpara1);
  2727. paramanager.freeparaloc(list,cgpara2);
  2728. allocallcpuregisters(list);
  2729. a_call_name(list,'FPC_ADDREF');
  2730. deallocallcpuregisters(list);
  2731. end;
  2732. cgpara2.done;
  2733. cgpara1.done;
  2734. end;
  2735. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2736. var
  2737. href : treference;
  2738. decrfunc : string;
  2739. needrtti : boolean;
  2740. cgpara1,cgpara2 : TCGPara;
  2741. tempreg1,tempreg2 : TRegister;
  2742. begin
  2743. cgpara1.init;
  2744. cgpara2.init;
  2745. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2746. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2747. needrtti:=false;
  2748. if is_interfacecom(t) then
  2749. decrfunc:='FPC_INTF_DECR_REF'
  2750. else if is_ansistring(t) then
  2751. decrfunc:='FPC_ANSISTR_DECR_REF'
  2752. else if is_widestring(t) then
  2753. decrfunc:='FPC_WIDESTR_DECR_REF'
  2754. else if is_dynamic_array(t) then
  2755. begin
  2756. decrfunc:='FPC_DYNARRAY_DECR_REF';
  2757. needrtti:=true;
  2758. end
  2759. else
  2760. decrfunc:='';
  2761. { call the special decr function or the generic decref }
  2762. if decrfunc<>'' then
  2763. begin
  2764. if needrtti then
  2765. begin
  2766. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2767. tempreg2:=getaddressregister(list);
  2768. a_loadaddr_ref_reg(list,href,tempreg2);
  2769. end;
  2770. tempreg1:=getaddressregister(list);
  2771. a_loadaddr_ref_reg(list,ref,tempreg1);
  2772. if needrtti then
  2773. begin
  2774. paramanager.allocparaloc(list,cgpara2);
  2775. a_param_reg(list,OS_ADDR,tempreg2,cgpara2);
  2776. paramanager.freeparaloc(list,cgpara2);
  2777. end;
  2778. paramanager.allocparaloc(list,cgpara1);
  2779. a_param_reg(list,OS_ADDR,tempreg1,cgpara1);
  2780. paramanager.freeparaloc(list,cgpara1);
  2781. allocallcpuregisters(list);
  2782. a_call_name(list,decrfunc);
  2783. deallocallcpuregisters(list);
  2784. end
  2785. else
  2786. begin
  2787. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2788. paramanager.allocparaloc(list,cgpara2);
  2789. a_paramaddr_ref(list,href,cgpara2);
  2790. paramanager.allocparaloc(list,cgpara1);
  2791. a_paramaddr_ref(list,ref,cgpara1);
  2792. paramanager.freeparaloc(list,cgpara1);
  2793. paramanager.freeparaloc(list,cgpara2);
  2794. allocallcpuregisters(list);
  2795. a_call_name(list,'FPC_DECREF');
  2796. deallocallcpuregisters(list);
  2797. end;
  2798. cgpara2.done;
  2799. cgpara1.done;
  2800. end;
  2801. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  2802. var
  2803. href : treference;
  2804. cgpara1,cgpara2 : TCGPara;
  2805. begin
  2806. cgpara1.init;
  2807. cgpara2.init;
  2808. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2809. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2810. if is_ansistring(t) or
  2811. is_widestring(t) or
  2812. is_interfacecom(t) or
  2813. is_dynamic_array(t) then
  2814. a_load_const_ref(list,OS_ADDR,0,ref)
  2815. else
  2816. begin
  2817. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2818. paramanager.allocparaloc(list,cgpara2);
  2819. a_paramaddr_ref(list,href,cgpara2);
  2820. paramanager.allocparaloc(list,cgpara1);
  2821. a_paramaddr_ref(list,ref,cgpara1);
  2822. paramanager.freeparaloc(list,cgpara1);
  2823. paramanager.freeparaloc(list,cgpara2);
  2824. allocallcpuregisters(list);
  2825. a_call_name(list,'FPC_INITIALIZE');
  2826. deallocallcpuregisters(list);
  2827. end;
  2828. cgpara1.done;
  2829. cgpara2.done;
  2830. end;
  2831. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  2832. var
  2833. href : treference;
  2834. cgpara1,cgpara2 : TCGPara;
  2835. begin
  2836. cgpara1.init;
  2837. cgpara2.init;
  2838. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2839. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2840. if is_ansistring(t) or
  2841. is_widestring(t) or
  2842. is_interfacecom(t) then
  2843. begin
  2844. g_decrrefcount(list,t,ref);
  2845. a_load_const_ref(list,OS_ADDR,0,ref);
  2846. end
  2847. else
  2848. begin
  2849. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2850. paramanager.allocparaloc(list,cgpara2);
  2851. a_paramaddr_ref(list,href,cgpara2);
  2852. paramanager.allocparaloc(list,cgpara1);
  2853. a_paramaddr_ref(list,ref,cgpara1);
  2854. paramanager.freeparaloc(list,cgpara1);
  2855. paramanager.freeparaloc(list,cgpara2);
  2856. allocallcpuregisters(list);
  2857. a_call_name(list,'FPC_FINALIZE');
  2858. deallocallcpuregisters(list);
  2859. end;
  2860. cgpara1.done;
  2861. cgpara2.done;
  2862. end;
  2863. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  2864. { generate range checking code for the value at location p. The type }
  2865. { type used is checked against todefs ranges. fromdef (p.resultdef) }
  2866. { is the original type used at that location. When both defs are equal }
  2867. { the check is also insert (needed for succ,pref,inc,dec) }
  2868. const
  2869. aintmax=high(aint);
  2870. var
  2871. neglabel : tasmlabel;
  2872. hreg : tregister;
  2873. lto,hto,
  2874. lfrom,hfrom : TConstExprInt;
  2875. fromsize, tosize: cardinal;
  2876. from_signed, to_signed: boolean;
  2877. begin
  2878. { range checking on and range checkable value? }
  2879. if not(cs_check_range in current_settings.localswitches) or
  2880. not(fromdef.typ in [orddef,enumdef]) then
  2881. exit;
  2882. {$ifndef cpu64bit}
  2883. { handle 64bit rangechecks separate for 32bit processors }
  2884. if is_64bit(fromdef) or is_64bit(todef) then
  2885. begin
  2886. cg64.g_rangecheck64(list,l,fromdef,todef);
  2887. exit;
  2888. end;
  2889. {$endif cpu64bit}
  2890. { only check when assigning to scalar, subranges are different, }
  2891. { when todef=fromdef then the check is always generated }
  2892. getrange(fromdef,lfrom,hfrom);
  2893. getrange(todef,lto,hto);
  2894. from_signed := is_signed(fromdef);
  2895. to_signed := is_signed(todef);
  2896. { check the rangedef of the array, not the array itself }
  2897. { (only change now, since getrange needs the arraydef) }
  2898. if (todef.typ = arraydef) then
  2899. todef := tarraydef(todef).rangedef;
  2900. { no range check if from and to are equal and are both longint/dword }
  2901. { no range check if from and to are equal and are both longint/dword }
  2902. { (if we have a 32bit processor) or int64/qword, since such }
  2903. { operations can at most cause overflows (JM) }
  2904. { Note that these checks are mostly processor independent, they only }
  2905. { have to be changed once we introduce 64bit subrange types }
  2906. {$ifdef cpu64bit}
  2907. if (fromdef = todef) and
  2908. (fromdef.typ=orddef) and
  2909. (((((torddef(fromdef).ordtype = s64bit) and
  2910. (lfrom = low(int64)) and
  2911. (hfrom = high(int64))) or
  2912. ((torddef(fromdef).ordtype = u64bit) and
  2913. (lfrom = low(qword)) and
  2914. (hfrom = high(qword))) or
  2915. ((torddef(fromdef).ordtype = scurrency) and
  2916. (lfrom = low(int64)) and
  2917. (hfrom = high(int64)))))) then
  2918. exit;
  2919. {$else cpu64bit}
  2920. if (fromdef = todef) and
  2921. (fromdef.typ=orddef) and
  2922. (((((torddef(fromdef).ordtype = s32bit) and
  2923. (lfrom = int64(low(longint))) and
  2924. (hfrom = int64(high(longint)))) or
  2925. ((torddef(fromdef).ordtype = u32bit) and
  2926. (lfrom = low(cardinal)) and
  2927. (hfrom = high(cardinal)))))) then
  2928. exit;
  2929. {$endif cpu64bit}
  2930. { optimize some range checks away in safe cases }
  2931. fromsize := fromdef.size;
  2932. tosize := todef.size;
  2933. if ((from_signed = to_signed) or
  2934. (not from_signed)) and
  2935. (lto<=lfrom) and (hto>=hfrom) and
  2936. (fromsize <= tosize) then
  2937. begin
  2938. { if fromsize < tosize, and both have the same signed-ness or }
  2939. { fromdef is unsigned, then all bit patterns from fromdef are }
  2940. { valid for todef as well }
  2941. if (fromsize < tosize) then
  2942. exit;
  2943. if (fromsize = tosize) and
  2944. (from_signed = to_signed) then
  2945. { only optimize away if all bit patterns which fit in fromsize }
  2946. { are valid for the todef }
  2947. begin
  2948. {$ifopt Q+}
  2949. {$define overflowon}
  2950. {$Q-}
  2951. {$endif}
  2952. if to_signed then
  2953. begin
  2954. { calculation of the low/high ranges must not overflow 64 bit
  2955. otherwise we end up comparing with zero for 64 bit data types on
  2956. 64 bit processors }
  2957. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  2958. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  2959. exit
  2960. end
  2961. else
  2962. begin
  2963. { calculation of the low/high ranges must not overflow 64 bit
  2964. otherwise we end up having all zeros for 64 bit data types on
  2965. 64 bit processors }
  2966. if (lto = 0) and
  2967. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  2968. exit
  2969. end;
  2970. {$ifdef overflowon}
  2971. {$Q+}
  2972. {$undef overflowon}
  2973. {$endif}
  2974. end
  2975. end;
  2976. { generate the rangecheck code for the def where we are going to }
  2977. { store the result }
  2978. { use the trick that }
  2979. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  2980. { To be able to do that, we have to make sure however that either }
  2981. { fromdef and todef are both signed or unsigned, or that we leave }
  2982. { the parts < 0 and > maxlongint out }
  2983. if from_signed xor to_signed then
  2984. begin
  2985. if from_signed then
  2986. { from is signed, to is unsigned }
  2987. begin
  2988. { if high(from) < 0 -> always range error }
  2989. if (hfrom < 0) or
  2990. { if low(to) > maxlongint also range error }
  2991. (lto > aintmax) then
  2992. begin
  2993. a_call_name(list,'FPC_RANGEERROR');
  2994. exit
  2995. end;
  2996. { from is signed and to is unsigned -> when looking at to }
  2997. { as an signed value, it must be < maxaint (otherwise }
  2998. { it will become negative, which is invalid since "to" is unsigned) }
  2999. if hto > aintmax then
  3000. hto := aintmax;
  3001. end
  3002. else
  3003. { from is unsigned, to is signed }
  3004. begin
  3005. if (lfrom > aintmax) or
  3006. (hto < 0) then
  3007. begin
  3008. a_call_name(list,'FPC_RANGEERROR');
  3009. exit
  3010. end;
  3011. { from is unsigned and to is signed -> when looking at to }
  3012. { as an unsigned value, it must be >= 0 (since negative }
  3013. { values are the same as values > maxlongint) }
  3014. if lto < 0 then
  3015. lto := 0;
  3016. end;
  3017. end;
  3018. hreg:=getintregister(list,OS_INT);
  3019. a_load_loc_reg(list,OS_INT,l,hreg);
  3020. a_op_const_reg(list,OP_SUB,OS_INT,aint(int64(lto)),hreg);
  3021. current_asmdata.getjumplabel(neglabel);
  3022. {
  3023. if from_signed then
  3024. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  3025. else
  3026. }
  3027. {$ifdef cpu64bit}
  3028. if qword(hto-lto)>qword(aintmax) then
  3029. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  3030. else
  3031. {$endif cpu64bit}
  3032. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(int64(hto-lto)),hreg,neglabel);
  3033. a_call_name(list,'FPC_RANGEERROR');
  3034. a_label(list,neglabel);
  3035. end;
  3036. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  3037. begin
  3038. g_overflowCheck(list,loc,def);
  3039. end;
  3040. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  3041. var
  3042. tmpreg : tregister;
  3043. begin
  3044. tmpreg:=getintregister(list,size);
  3045. g_flags2reg(list,size,f,tmpreg);
  3046. a_load_reg_ref(list,size,size,tmpreg,ref);
  3047. end;
  3048. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  3049. var
  3050. OKLabel : tasmlabel;
  3051. cgpara1 : TCGPara;
  3052. begin
  3053. if (cs_check_object in current_settings.localswitches) or
  3054. (cs_check_range in current_settings.localswitches) then
  3055. begin
  3056. current_asmdata.getjumplabel(oklabel);
  3057. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  3058. cgpara1.init;
  3059. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3060. paramanager.allocparaloc(list,cgpara1);
  3061. a_param_const(list,OS_INT,210,cgpara1);
  3062. paramanager.freeparaloc(list,cgpara1);
  3063. a_call_name(list,'FPC_HANDLEERROR');
  3064. a_label(list,oklabel);
  3065. cgpara1.done;
  3066. end;
  3067. end;
  3068. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  3069. var
  3070. hrefvmt : treference;
  3071. cgpara1,cgpara2 : TCGPara;
  3072. begin
  3073. cgpara1.init;
  3074. cgpara2.init;
  3075. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3076. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3077. if (cs_check_object in current_settings.localswitches) then
  3078. begin
  3079. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0);
  3080. paramanager.allocparaloc(list,cgpara2);
  3081. a_paramaddr_ref(list,hrefvmt,cgpara2);
  3082. paramanager.allocparaloc(list,cgpara1);
  3083. a_param_reg(list,OS_ADDR,reg,cgpara1);
  3084. paramanager.freeparaloc(list,cgpara1);
  3085. paramanager.freeparaloc(list,cgpara2);
  3086. allocallcpuregisters(list);
  3087. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  3088. deallocallcpuregisters(list);
  3089. end
  3090. else
  3091. if (cs_check_range in current_settings.localswitches) then
  3092. begin
  3093. paramanager.allocparaloc(list,cgpara1);
  3094. a_param_reg(list,OS_ADDR,reg,cgpara1);
  3095. paramanager.freeparaloc(list,cgpara1);
  3096. allocallcpuregisters(list);
  3097. a_call_name(list,'FPC_CHECK_OBJECT');
  3098. deallocallcpuregisters(list);
  3099. end;
  3100. cgpara1.done;
  3101. cgpara2.done;
  3102. end;
  3103. {*****************************************************************************
  3104. Entry/Exit Code Functions
  3105. *****************************************************************************}
  3106. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  3107. var
  3108. sizereg,sourcereg,lenreg : tregister;
  3109. cgpara1,cgpara2,cgpara3 : TCGPara;
  3110. begin
  3111. { because some abis don't support dynamic stack allocation properly
  3112. open array value parameters are copied onto the heap
  3113. }
  3114. { calculate necessary memory }
  3115. { read/write operations on one register make the life of the register allocator hard }
  3116. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  3117. begin
  3118. lenreg:=getintregister(list,OS_INT);
  3119. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  3120. end
  3121. else
  3122. lenreg:=lenloc.register;
  3123. sizereg:=getintregister(list,OS_INT);
  3124. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  3125. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  3126. { load source }
  3127. sourcereg:=getaddressregister(list);
  3128. a_loadaddr_ref_reg(list,ref,sourcereg);
  3129. { do getmem call }
  3130. cgpara1.init;
  3131. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3132. paramanager.allocparaloc(list,cgpara1);
  3133. a_param_reg(list,OS_INT,sizereg,cgpara1);
  3134. paramanager.freeparaloc(list,cgpara1);
  3135. allocallcpuregisters(list);
  3136. a_call_name(list,'FPC_GETMEM');
  3137. deallocallcpuregisters(list);
  3138. cgpara1.done;
  3139. { return the new address }
  3140. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  3141. { do move call }
  3142. cgpara1.init;
  3143. cgpara2.init;
  3144. cgpara3.init;
  3145. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3146. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3147. paramanager.getintparaloc(pocall_default,3,cgpara3);
  3148. { load size }
  3149. paramanager.allocparaloc(list,cgpara3);
  3150. a_param_reg(list,OS_INT,sizereg,cgpara3);
  3151. { load destination }
  3152. paramanager.allocparaloc(list,cgpara2);
  3153. a_param_reg(list,OS_ADDR,destreg,cgpara2);
  3154. { load source }
  3155. paramanager.allocparaloc(list,cgpara1);
  3156. a_param_reg(list,OS_ADDR,sourcereg,cgpara1);
  3157. paramanager.freeparaloc(list,cgpara3);
  3158. paramanager.freeparaloc(list,cgpara2);
  3159. paramanager.freeparaloc(list,cgpara1);
  3160. allocallcpuregisters(list);
  3161. a_call_name(list,'FPC_MOVE');
  3162. deallocallcpuregisters(list);
  3163. cgpara3.done;
  3164. cgpara2.done;
  3165. cgpara1.done;
  3166. end;
  3167. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  3168. var
  3169. cgpara1 : TCGPara;
  3170. begin
  3171. { do move call }
  3172. cgpara1.init;
  3173. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3174. { load source }
  3175. paramanager.allocparaloc(list,cgpara1);
  3176. a_param_loc(list,l,cgpara1);
  3177. paramanager.freeparaloc(list,cgpara1);
  3178. allocallcpuregisters(list);
  3179. a_call_name(list,'FPC_FREEMEM');
  3180. deallocallcpuregisters(list);
  3181. cgpara1.done;
  3182. end;
  3183. procedure tcg.g_save_registers(list:TAsmList);
  3184. var
  3185. href : treference;
  3186. size : longint;
  3187. r : integer;
  3188. begin
  3189. { calculate temp. size }
  3190. size:=0;
  3191. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3192. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3193. inc(size,sizeof(aint));
  3194. { mm registers }
  3195. if uses_registers(R_MMREGISTER) then
  3196. begin
  3197. { Make sure we reserve enough space to do the alignment based on the offset
  3198. later on. We can't use the size for this, because the alignment of the start
  3199. of the temp is smaller than needed for an OS_VECTOR }
  3200. inc(size,tcgsize2size[OS_VECTOR]);
  3201. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3202. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3203. inc(size,tcgsize2size[OS_VECTOR]);
  3204. end;
  3205. if size>0 then
  3206. begin
  3207. tg.GetTemp(list,size,tt_noreuse,current_procinfo.save_regs_ref);
  3208. include(current_procinfo.flags,pi_has_saved_regs);
  3209. { Copy registers to temp }
  3210. href:=current_procinfo.save_regs_ref;
  3211. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3212. begin
  3213. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3214. begin
  3215. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  3216. inc(href.offset,sizeof(aint));
  3217. end;
  3218. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  3219. end;
  3220. if uses_registers(R_MMREGISTER) then
  3221. begin
  3222. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3223. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3224. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3225. begin
  3226. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3227. begin
  3228. a_loadmm_reg_ref(list,OS_VECTOR,OS_VECTOR,newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE),href,nil);
  3229. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3230. end;
  3231. include(rg[R_MMREGISTER].preserved_by_proc,saved_mm_registers[r]);
  3232. end;
  3233. end;
  3234. end;
  3235. end;
  3236. procedure tcg.g_restore_registers(list:TAsmList);
  3237. var
  3238. href : treference;
  3239. r : integer;
  3240. hreg : tregister;
  3241. begin
  3242. if not(pi_has_saved_regs in current_procinfo.flags) then
  3243. exit;
  3244. { Copy registers from temp }
  3245. href:=current_procinfo.save_regs_ref;
  3246. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3247. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3248. begin
  3249. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  3250. { Allocate register so the optimizer does not remove the load }
  3251. a_reg_alloc(list,hreg);
  3252. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  3253. inc(href.offset,sizeof(aint));
  3254. end;
  3255. if uses_registers(R_MMREGISTER) then
  3256. begin
  3257. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3258. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3259. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3260. begin
  3261. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3262. begin
  3263. hreg:=newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE);
  3264. { Allocate register so the optimizer does not remove the load }
  3265. a_reg_alloc(list,hreg);
  3266. a_loadmm_ref_reg(list,OS_VECTOR,OS_VECTOR,href,hreg,nil);
  3267. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3268. end;
  3269. end;
  3270. end;
  3271. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  3272. end;
  3273. procedure tcg.g_profilecode(list : TAsmList);
  3274. begin
  3275. end;
  3276. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  3277. begin
  3278. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  3279. end;
  3280. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);
  3281. begin
  3282. a_load_const_ref(list, OS_INT, a, href);
  3283. end;
  3284. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  3285. begin
  3286. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  3287. end;
  3288. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);
  3289. var
  3290. hsym : tsym;
  3291. href : treference;
  3292. paraloc : Pcgparalocation;
  3293. begin
  3294. { calculate the parameter info for the procdef }
  3295. if not procdef.has_paraloc_info then
  3296. begin
  3297. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  3298. procdef.has_paraloc_info:=true;
  3299. end;
  3300. hsym:=tsym(procdef.parast.Find('self'));
  3301. if not(assigned(hsym) and
  3302. (hsym.typ=paravarsym)) then
  3303. internalerror(200305251);
  3304. paraloc:=tparavarsym(hsym).paraloc[callerside].location;
  3305. while paraloc<>nil do
  3306. with paraloc^ do
  3307. begin
  3308. case loc of
  3309. LOC_REGISTER:
  3310. a_op_const_reg(list,OP_SUB,size,ioffset,register);
  3311. LOC_REFERENCE:
  3312. begin
  3313. { offset in the wrapper needs to be adjusted for the stored
  3314. return address }
  3315. reference_reset_base(href,reference.index,reference.offset+sizeof(aint));
  3316. a_op_const_ref(list,OP_SUB,size,ioffset,href);
  3317. end
  3318. else
  3319. internalerror(200309189);
  3320. end;
  3321. paraloc:=next;
  3322. end;
  3323. end;
  3324. procedure tcg.g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string);
  3325. begin
  3326. a_jmp_name(list,externalname);
  3327. end;
  3328. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  3329. begin
  3330. a_call_name(list,s);
  3331. end;
  3332. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string): tregister;
  3333. var
  3334. l: tasmsymbol;
  3335. ref: treference;
  3336. begin
  3337. result := NR_NO;
  3338. case target_info.system of
  3339. system_powerpc_darwin,
  3340. system_i386_darwin,
  3341. system_powerpc64_darwin,
  3342. system_x86_64_darwin:
  3343. begin
  3344. l:=current_asmdata.getasmsymbol('L'+symname+'$non_lazy_ptr');
  3345. if not(assigned(l)) then
  3346. begin
  3347. l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_LOCAL,AT_DATA);
  3348. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  3349. current_asmdata.asmlists[al_picdata].concat(tai_const.create_indirect_sym(current_asmdata.RefAsmSymbol(symname)));
  3350. {$ifdef cpu64bit}
  3351. current_asmdata.asmlists[al_picdata].concat(tai_const.create_64bit(0));
  3352. {$else cpu64bit}
  3353. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  3354. {$endif cpu64bit}
  3355. end;
  3356. result := getaddressregister(list);
  3357. reference_reset_symbol(ref,l,0);
  3358. { a_load_ref_reg will turn this into a pic-load if needed }
  3359. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  3360. end;
  3361. end;
  3362. end;
  3363. procedure tcg.g_maybe_got_init(list: TAsmList);
  3364. begin
  3365. end;
  3366. {*****************************************************************************
  3367. TCG64
  3368. *****************************************************************************}
  3369. {$ifndef cpu64bit}
  3370. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  3371. begin
  3372. a_load64_reg_reg(list,regsrc,regdst);
  3373. a_op64_const_reg(list,op,size,value,regdst);
  3374. end;
  3375. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  3376. var
  3377. tmpreg64 : tregister64;
  3378. begin
  3379. { when src1=dst then we need to first create a temp to prevent
  3380. overwriting src1 with src2 }
  3381. if (regsrc1.reghi=regdst.reghi) or
  3382. (regsrc1.reglo=regdst.reghi) or
  3383. (regsrc1.reghi=regdst.reglo) or
  3384. (regsrc1.reglo=regdst.reglo) then
  3385. begin
  3386. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3387. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3388. a_load64_reg_reg(list,regsrc2,tmpreg64);
  3389. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  3390. a_load64_reg_reg(list,tmpreg64,regdst);
  3391. end
  3392. else
  3393. begin
  3394. a_load64_reg_reg(list,regsrc2,regdst);
  3395. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  3396. end;
  3397. end;
  3398. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  3399. var
  3400. tmpreg64 : tregister64;
  3401. begin
  3402. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3403. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3404. a_load64_subsetref_reg(list,sref,tmpreg64);
  3405. a_op64_const_reg(list,op,size,a,tmpreg64);
  3406. a_load64_reg_subsetref(list,tmpreg64,sref);
  3407. end;
  3408. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  3409. var
  3410. tmpreg64 : tregister64;
  3411. begin
  3412. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3413. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3414. a_load64_subsetref_reg(list,sref,tmpreg64);
  3415. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  3416. a_load64_reg_subsetref(list,tmpreg64,sref);
  3417. end;
  3418. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  3419. var
  3420. tmpreg64 : tregister64;
  3421. begin
  3422. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3423. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3424. a_load64_subsetref_reg(list,sref,tmpreg64);
  3425. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  3426. a_load64_reg_subsetref(list,tmpreg64,sref);
  3427. end;
  3428. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  3429. var
  3430. tmpreg64 : tregister64;
  3431. begin
  3432. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3433. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3434. a_load64_subsetref_reg(list,ssref,tmpreg64);
  3435. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  3436. end;
  3437. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3438. begin
  3439. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  3440. ovloc.loc:=LOC_VOID;
  3441. end;
  3442. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3443. begin
  3444. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  3445. ovloc.loc:=LOC_VOID;
  3446. end;
  3447. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  3448. begin
  3449. case l.loc of
  3450. LOC_REFERENCE, LOC_CREFERENCE:
  3451. a_load64_ref_subsetref(list,l.reference,sref);
  3452. LOC_REGISTER,LOC_CREGISTER:
  3453. a_load64_reg_subsetref(list,l.register64,sref);
  3454. LOC_CONSTANT :
  3455. a_load64_const_subsetref(list,l.value64,sref);
  3456. LOC_SUBSETREF,LOC_CSUBSETREF:
  3457. a_load64_subsetref_subsetref(list,l.sref,sref);
  3458. else
  3459. internalerror(2006082210);
  3460. end;
  3461. end;
  3462. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  3463. begin
  3464. case l.loc of
  3465. LOC_REFERENCE, LOC_CREFERENCE:
  3466. a_load64_subsetref_ref(list,sref,l.reference);
  3467. LOC_REGISTER,LOC_CREGISTER:
  3468. a_load64_subsetref_reg(list,sref,l.register64);
  3469. LOC_SUBSETREF,LOC_CSUBSETREF:
  3470. a_load64_subsetref_subsetref(list,sref,l.sref);
  3471. else
  3472. internalerror(2006082211);
  3473. end;
  3474. end;
  3475. {$endif cpu64bit}
  3476. initialization
  3477. ;
  3478. finalization
  3479. cg.free;
  3480. {$ifndef cpu64bit}
  3481. cg64.free;
  3482. {$endif cpu64bit}
  3483. end.